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mist-modules.qip
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mist-modules.qip
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set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) mist-modules/mist.vhd]
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) mist-modules/user_io.v]
#set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) mist-modules/mist_video.v]
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) mist-modules/scandoubler.v]
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) mist-modules/osd.v]
set_global_assignment -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) mist-modules/rgb2ypbpr.sv]
set_global_assignment -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) mist-modules/cofi.sv]
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) mist-modules/data_io.v]
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) mist-modules/arcade_inputs.v]
set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) mist-modules/dac.vhd]