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apply patches from jakeday to fix wakelocks

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sonicxml authored and jdkoreclipse committed Feb 9, 2012
1 parent aec5fa7 commit 65c17fa021bea284b1b15bc43c049b062b35e4a3
Showing with 40 additions and 14 deletions.
  1. +34 −11 arch/arm/mach-omap2/pm44xx.c
  2. +6 −3 drivers/gpio/gpio-omap.c
@@ -107,6 +107,9 @@ static struct clockdomain *emif_clkdm, *mpuss_clkdm;
*/
#define OMAP4_PM_ERRATUM_MPU_EMIF_NO_DYNDEP_IDLE_iXXX BIT(4)
+#define OMAP4_PM_ERRATUM_LPDDR_CLK_IO_iXXX BIT(5)
+#define LPDDR_WD_PULL_DOWN 0x02
+
u8 pm44xx_errata;
#define is_pm44xx_erratum(erratum) (pm44xx_errata & OMAP4_PM_ERRATUM_##erratum)
@@ -123,6 +126,28 @@ void check_cawake_wakeup_event(void)
}
}
+void syscontrol_lpddr_clk_io_errata(bool enable)
+{
+ u32 v = 0;
+
+ if (!is_pm44xx_erratum(LPDDR_CLK_IO_iXXX))
+ return;
+
+ v = omap4_ctrl_pad_readl(OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO1_2);
+ if (enable)
+ v &= ~OMAP4_LPDDR2IO1_GR10_WD_MASK;
+ else
+ v |= LPDDR_WD_PULL_DOWN << OMAP4_LPDDR2IO1_GR10_WD_SHIFT;
+ omap4_ctrl_pad_writel(v, OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO1_2);
+
+ v = omap4_ctrl_pad_readl(OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO2_2);
+ if (enable)
+ v &= ~OMAP4_LPDDR2IO2_GR10_WD_MASK;
+ else
+ v |= LPDDR_WD_PULL_DOWN << OMAP4_LPDDR2IO1_GR10_WD_SHIFT;
+ omap4_ctrl_pad_writel(v, OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO2_2);
+}
+
#define MAX_IOPAD_LATCH_TIME 1000
void omap4_trigger_ioctrl(void)
{
@@ -273,8 +298,14 @@ void omap4_enter_sleep(unsigned int cpu, unsigned int power_state, bool suspend)
OMAP4430_PRM_DEVICE_INST, OMAP4_PRM_IO_PMCTRL_OFFSET);
}
+ if (suspend)
+ syscontrol_lpddr_clk_io_errata(false);
+
omap4_enter_lowpower(cpu, power_state);
+ if (suspend)
+ syscontrol_lpddr_clk_io_errata(true);
+
if (omap4_device_prev_state_off()) {
/* Reconfigure the trim settings as well */
omap4_ldo_trim_configure();
@@ -906,16 +937,7 @@ static void __init syscontrol_setup_regs(void)
v |= OMAP4_LPDDR21_VREF_AUTO_EN_CA_MASK | OMAP4_LPDDR21_VREF_AUTO_EN_DQ_MASK;
omap4_ctrl_pad_writel(v, OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO2_3);
- /*
- * Workaround for CK differential IO PADn, PADp values due to bug in
- * EMIF CMD phy.
- */
- v = omap4_ctrl_pad_readl(OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO1_2);
- v &= ~OMAP4_LPDDR2IO1_GR10_WD_MASK;
- omap4_ctrl_pad_writel(v, OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO1_2);
- v = omap4_ctrl_pad_readl(OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO2_2);
- v &= ~OMAP4_LPDDR2IO2_GR10_WD_MASK;
- omap4_ctrl_pad_writel(v, OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO2_2);
+ syscontrol_lpddr_clk_io_errata(true);
}
static void __init prcm_setup_regs(void)
@@ -1236,7 +1258,8 @@ static void __init omap4_pm_setup_errata(void)
*/
if (cpu_is_omap44xx())
pm44xx_errata |= OMAP4_PM_ERRATUM_IVA_AUTO_RET_iXXX |
- OMAP4_PM_ERRATUM_HSI_SWAKEUP_iXXX;
+ OMAP4_PM_ERRATUM_HSI_SWAKEUP_iXXX |
+ OMAP4_PM_ERRATUM_LPDDR_CLK_IO_iXXX;
/* Dynamic Dependency errata for all silicon !=443x */
if (cpu_is_omap443x())
pm44xx_errata |= OMAP4_PM_ERRATUM_MPU_EMIF_NO_DYNDEP_i688;
View
@@ -1312,14 +1312,17 @@ static int omap_gpio_resume(struct device *dev)
static void omap_gpio_save_context(struct gpio_bank *bank);
static void omap_gpio_restore_context(struct gpio_bank *bank);
-static void omap2_gpio_set_wakeupenables(struct gpio_bank *bank)
+static void omap2_gpio_set_wakeupenables(struct gpio_bank *bank, bool suspend)
{
unsigned long pad_wakeup;
int i;
bank->context.pad_set_wakeupenable = 0;
- pad_wakeup = __raw_readl(bank->base + bank->regs->irqenable);
+ if (suspend)
+ pad_wakeup = bank->suspend_wakeup;
+ else
+ pad_wakeup = __raw_readl(bank->base + bank->regs->irqenable);
/*
* HACK: Ignore gpios that have multiple sources.
@@ -1578,7 +1581,7 @@ int omap2_gpio_prepare_for_idle(int off_mode, bool suspend)
if (!bank->mod_usage)
continue;
- omap2_gpio_set_wakeupenables(bank);
+ omap2_gpio_set_wakeupenables(bank, suspend);
if (omap2_gpio_set_edge_wakeup(bank, suspend))
ret = -EBUSY;

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