-
Notifications
You must be signed in to change notification settings - Fork 3
Commit
This commit does not belong to any branch on this repository, and may belong to a fork outside of the repository.
FEAT: add EE332 digital system design
- Loading branch information
1 parent
44cb591
commit c770a34
Showing
1 changed file
with
23 additions
and
0 deletions.
There are no files selected for viewing
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,23 @@ | ||
# EE332 Digital System Design | ||
|
||
## Introduction | ||
|
||
Digital system design with FPGAs using VHDL. | ||
|
||
For the difference between VHDL and Verilog, refer to [Hardware Description Languages: VHDL vs Verilog, and Their Functional Uses](https://resources.pcb.cadence.com/blog/2020-hardware-description-languages-vhdl-vs-verilog-and-their-functional-uses) by Cadence. | ||
|
||
## Lecture | ||
|
||
- [Stupid-WOLF/EE332_SUSTech](https://github.com/Stupid-WOLF/EE332_SUSTech) | ||
|
||
## Labs | ||
- [Gralerfics/SUSTech-EE332-Digital-System-Designing-Laboratory](https://github.com/Gralerfics/SUSTech-EE332-Digital-System-Designing-Laboratory) | ||
- [gaozheng2001/EE332_VHDL](https://github.com/gaozheng2001/EE332_VHDL) | ||
|
||
## Project | ||
- [Gralerfics/FmcPGA](https://github.com/Gralerfics/FmcPGA) | ||
A pseudo Minecraft game running on Artix-7 FPGA in VHDL. | ||
|
||
## Books | ||
|
||
- P.P. Chu, RTL hardware design using VHDL, John Wiley & Sons, 2006. |