From 4f5a8041d1f5a20c62042bce00c0c976a2765ae7 Mon Sep 17 00:00:00 2001 From: Akio Ogawa Date: Fri, 24 Jul 2020 17:25:32 +0000 Subject: [PATCH] update satge2/3 with EPD mask and actual stage3 --- StRoot/RTS/src/TRG_FCS/fcs_trg_base.cxx | 30 ++++++---- StRoot/RTS/src/TRG_FCS/fcs_trg_base.h | 20 +++++-- StRoot/RTS/src/TRG_FCS/stage_2_202201.cxx | 69 ++++++++++++++++------ StRoot/RTS/src/TRG_FCS/stage_3_202201.cxx | 72 ++++++++++------------- 4 files changed, 113 insertions(+), 78 deletions(-) diff --git a/StRoot/RTS/src/TRG_FCS/fcs_trg_base.cxx b/StRoot/RTS/src/TRG_FCS/fcs_trg_base.cxx index 122f1ddc6bb..44a275ceed6 100644 --- a/StRoot/RTS/src/TRG_FCS/fcs_trg_base.cxx +++ b/StRoot/RTS/src/TRG_FCS/fcs_trg_base.cxx @@ -16,16 +16,22 @@ u_int fcs_trg_base::stage_version[4] ; u_int fcs_trg_base::s2_ch_mask[NS_COU] ; u_int fcs_trg_base::s3_ch_mask ; - int fcs_trg_base::fcs_trgDebug ; +int fcs_trg_base::fcs_readPresMaskFromText; +u_int fcs_trg_base::PRES_MASK[15][9][6]; + u_short fcs_trg_base::EM_HERATIO_THR ; u_short fcs_trg_base::HAD_HERATIO_THR ; u_short fcs_trg_base::EMTHR1 ; u_short fcs_trg_base::EMTHR2 ; +u_short fcs_trg_base::EMTHR3 ; u_short fcs_trg_base::HADTHR1 ; u_short fcs_trg_base::HADTHR2 ; +u_short fcs_trg_base::HADTHR3 ; u_short fcs_trg_base::JETTHR1 ; u_short fcs_trg_base::JETTHR2 ; +u_short fcs_trg_base::ETOTTHR ; +u_short fcs_trg_base::HTOTTHR ; fcs_trg_base::fcs_trg_base() { @@ -161,19 +167,21 @@ void fcs_trg_base::init(const char* fname) // for Akio's code fcs_trgDebug = 0 ; + fcs_readPresMaskFromText=0; // stage2 params (defaults are from Akio's code) EM_HERATIO_THR = 32 ; // or 128*(1/4) HAD_HERATIO_THR = 32 ; EMTHR1 = 16 ; EMTHR2 = 32 ; + EMTHR3 = 48 ; HADTHR1 = 16 ; HADTHR2 = 32 ; + HADTHR3 = 48 ; JETTHR1 = 32 ; JETTHR2 = 64 ; - - - + ETOTTHR = 10 ; + HTOTTHR = 10 ; // IMPORTANT: Requested Stage_x versions defaults // Either set by the user to her/his wishes or picked up from the DAQ file @@ -182,13 +190,10 @@ void fcs_trg_base::init(const char* fname) stage_version[2] = 0 ; stage_version[3] = 0 ; - - // DEP/Trigger masks - s3_ch_mask = (1<<2) ; // South 0 - - s2_ch_mask[0] = 0 ; // Nothing in North - s2_ch_mask[1] = (1<<3) ; // just 1 fPRE channel in South for early FY19 + //s3_ch_mask = (1<<2) ; // South 0 + //s2_ch_mask[0] = 0 ; // Nothing in North + //s2_ch_mask[1] = (1<<3) ; // just 1 fPRE channel in South for early FY19 } @@ -812,7 +817,6 @@ u_short fcs_trg_base::run_event_sim(int xing, int type) } stage_2(ecal_in, hcal_in, fpre_in, geo, d_out.s2[i].s2_to_s3) ; - } } @@ -825,7 +829,7 @@ u_short fcs_trg_base::run_event_sim(int xing, int type) if(type==0) { // special for FY19 which acts also as stage_3 - if(tb_cou[1][3][0]==0) return 0 ; + if(tb_cou[1][3][0]==0) return 0 ; // otherwise it will be //if(tb_cou[0][3][1]==0) return 0 ; @@ -837,7 +841,7 @@ u_short fcs_trg_base::run_event_sim(int xing, int type) l_in[0] = d_out.s2[0].s2_to_s3[0] ; l_in[1] = d_out.s2[0].s2_to_s3[1] ; - l_in[2] = d_out.s2[1].s2_to_s3[0] ; //FY19 + l_in[2] = d_out.s2[1].s2_to_s3[0] ; l_in[3] = d_out.s2[1].s2_to_s3[1] ; stage_3(l_in,&d_out.s3.dsm_out) ; diff --git a/StRoot/RTS/src/TRG_FCS/fcs_trg_base.h b/StRoot/RTS/src/TRG_FCS/fcs_trg_base.h index 004e99ba0f4..7a2002fda6f 100644 --- a/StRoot/RTS/src/TRG_FCS/fcs_trg_base.h +++ b/StRoot/RTS/src/TRG_FCS/fcs_trg_base.h @@ -222,17 +222,22 @@ class fcs_trg_base { // for use by stage_2: static u_int s2_ch_mask[NS_COU] ; static int fcs_trgDebug ; + static int fcs_readPresMaskFromText; + static u_int PRES_MASK[15][9][6]; + + // various thresholds static u_short EM_HERATIO_THR ; static u_short HAD_HERATIO_THR ; static u_short EMTHR1 ; static u_short EMTHR2 ; + static u_short EMTHR3 ; static u_short HADTHR1 ; static u_short HADTHR2 ; + static u_short HADTHR3 ; static u_short JETTHR1 ; - static u_short JETTHR2 ; - - // various thresholds - + static u_short JETTHR2 ; + static u_short ETOTTHR ; + static u_short HTOTTHR ; // for use by stage_3: // various stuff... @@ -240,13 +245,16 @@ class fcs_trg_base { // Ecal and Hcal 4x4 sums, Ecal+nearest Hcal sum, and Pres(EPD) hit pattern at stage2 u_int esum[2][15][9]; + u_int epdcoin[2][15][9]; u_int hsum[2][9][5]; u_int padc[2][6][32]; u_int phit[2][6][32]; u_int sum [2][15][9]; float ratio[2][15][9]; - float jet[2][3]; - + u_int jet[2][3]; + u_int etot[2]; + u_int htot[2]; + u_int dsmout; }; #endif diff --git a/StRoot/RTS/src/TRG_FCS/stage_2_202201.cxx b/StRoot/RTS/src/TRG_FCS/stage_2_202201.cxx index 5a8f89288bf..01fb219799a 100644 --- a/StRoot/RTS/src/TRG_FCS/stage_2_202201.cxx +++ b/StRoot/RTS/src/TRG_FCS/stage_2_202201.cxx @@ -3,6 +3,7 @@ #include #include "fcs_trg_base.h" +#include "fcs_ecal_epd_mask.h" // Processing on the North or South DEP/IO flavoured board. // Inputs are up to 32 links but I already organized them according to strawman. @@ -116,10 +117,11 @@ void fcs_trg_base::stage_2_202201(link_t ecal[], link_t hcal[], link_t pres[], //u_int esum[15][9]; //u_int sum[15][9]; //float ratio[15][9]; - u_int EM1 =0, EM2 =0; - u_int GAM1=0, GAM2=0; - u_int ELE1=0, ELE2=0; - u_int HAD1=0, HAD2=0; + u_int EM1 =0, EM2 =0, EM3=0; + u_int GAM1=0, GAM2=0, GAM3=0; + u_int ELE1=0, ELE2=0, ELE3=0; + u_int HAD1=0, HAD2=0, HAD3=0; + u_int ETOT=0, HTOT=0; for(int r=0; r<15; r++){ if(fcs_trgDebug>=2) printf("E4x4 "); for(int c=0; c<9; c++){ @@ -143,26 +145,50 @@ void fcs_trg_base::stage_2_202201(link_t ecal[], link_t hcal[], link_t pres[], ratio[ns][r][c] = float(esum[ns][r][c]) / float(sum[ns][r][c]); } + //check EPD hits using the mask + epdcoin[ns][r][c]=0; + for(int dep=0; dep<6; dep++){ + int mask; + if(fcs_readPresMaskFromText==0){ + mask = fcs_ecal_epd_mask[r][c][dep]; //from include file + }else{ + mask = PRES_MASK[r][c][dep]; //from static which was from text file + } + for(int j=0; j<4; j++) { + for(int k=0; k<8; k++){ + if( (mask >> (j*8 + k)) & 0x1) { //if this is 0, don't even put the logic in VHDL + epdcoin[ns][r][c] |= (pres[dep].d[j] >> k) & 0x1; + } + } + } + } + // integer multiplication as in VHDL! // ratio thresholds are in fixed point integer where 1.0==128 u_int h128 = h*128 ; if(h128 < esum[ns][r][c] * EM_HERATIO_THR){ if(sum[ns][r][c] > EMTHR1){ - EM1 |= (1< EMTHR2){ - EM2 |= (1< EMTHR3){ + EM3 = 1; + if(epdcoin[ns][r][c]==0) {GAM3 = 1;} + else {ELE3 = 1;} } } if(h128 > esum[ns][r][c] * HAD_HERATIO_THR){ - if(sum[ns][r][c] > HADTHR1) HAD1 |= (1< HADTHR2) HAD2 |= (1< HADTHR1) HAD1 = 1; + if(sum[ns][r][c] > HADTHR2) HAD2 = 1; + if(sum[ns][r][c] > HADTHR3) HAD3 = 1; } - if(fcs_trgDebug>=2) printf("%5d %3.2f ",esum[ns][r][c],ratio[ns][r][c]); + if(fcs_trgDebug>=2) printf("%5d %1d %3.2f ",esum[ns][r][c],epdcoin[ns][r][c],ratio[ns][r][c]); } if(fcs_trgDebug>=2) printf("\n"); } @@ -200,13 +226,20 @@ void fcs_trg_base::stage_2_202201(link_t ecal[], link_t hcal[], link_t pres[], } if(fcs_trgDebug>=2) printf("Jet = %3d %3d %3d\n",jet[ns][0],jet[ns][1],jet[ns][2]); + //total ET + etot[ns] = esub[0] + esub[1] + esub[2] + esub[3]; + htot[ns] = hsub[0] + hsub[1] + hsub[2] + hsub[3]; + if(etot[ns]>ETOTTHR) ETOT=1; + if(htot[ns]>HTOTTHR) HTOT=1; + if(fcs_trgDebug>=2) printf("E/H Tot = %3d %3d\n",etot[ns],htot[ns]); + //sending output bits - output[0].d[0] = 0x80 | (EM1 + (EM2 <<3)); // Tonko: added last bit - output[0].d[1] = GAM1 + (GAM2<<3); - output[0].d[2] = ELE1 + (ELE2<<3); - output[0].d[3] = HAD1 + (HAD2<<3); + output[0].d[0] = EM1 + (EM2 <<1) + (EM3 <<2) + 0x80; // Tonko: added last bit + output[0].d[1] = ELE1 + (ELE2<<1) + (ELE3<<2); + output[0].d[2] = GAM1 + (GAM2<<1) + (GAM3<<2); + output[0].d[3] = HAD1 + (HAD2<<1) + (HAD3<<2); output[0].d[4] = JP1 + (JP2 <<1); - output[0].d[5] = pres[0].d[0] ; // Tonko: added + output[0].d[5] = ETOT + (HTOT<<1); output[0].d[6] = pres[0].d[1] ; // Tonko: added output[0].d[7] = pres[0].d[7] ; // Tonko: added diff --git a/StRoot/RTS/src/TRG_FCS/stage_3_202201.cxx b/StRoot/RTS/src/TRG_FCS/stage_3_202201.cxx index 8be67bdfb81..7ffea88a60c 100644 --- a/StRoot/RTS/src/TRG_FCS/stage_3_202201.cxx +++ b/StRoot/RTS/src/TRG_FCS/stage_3_202201.cxx @@ -16,45 +16,35 @@ void fcs_trg_base::stage_3_202201(link_t link[], u_short *dsm_out) { *dsm_out = 0; - // Tonko: it is link[2] in FY19 (South, first) and not link[1] - // as it was in the original code - // Tonko: also, why ">0"?? - - if((link[2].d[0] & 0x07)>0) *dsm_out |= 0x1; - if((link[2].d[0] & 0x38)>0) *dsm_out |= 0x2; - if((link[2].d[1] & 0x07)>0) *dsm_out |= 0x4; - if((link[2].d[1] & 0x38)>0) *dsm_out |= 0x8; - if((link[2].d[2] & 0x07)>0) *dsm_out |= 0x10; - if((link[2].d[2] & 0x38)>0) *dsm_out |= 0x20; - if((link[2].d[3] & 0x07)>0) *dsm_out |= 0x40; - if((link[2].d[3] & 0x38)>0) *dsm_out |= 0x80; - if((link[2].d[4] & 0x01)>0) *dsm_out |= 0x100; - if((link[2].d[4] & 0x02)>0) *dsm_out |= 0x200; - - //Tonko: use 12th bit - if(link[2].d[7] & 0x80) *dsm_out |= 0x800; - - - // Tonko: slighly modified so I can run GEANT emulation. - // This part is ignored in FY19 VHDL since it didn't exist anyway - - if((link[0].d[0] & 0x07)>0) *dsm_out |= 0x1; - if((link[0].d[0] & 0x38)>0) *dsm_out |= 0x2; - if((link[0].d[1] & 0x07)>0) *dsm_out |= 0x4; - if((link[0].d[1] & 0x38)>0) *dsm_out |= 0x8; - if((link[0].d[2] & 0x07)>0) *dsm_out |= 0x10; - if((link[0].d[2] & 0x38)>0) *dsm_out |= 0x20; - if((link[0].d[3] & 0x07)>0) *dsm_out |= 0x40; - if((link[0].d[3] & 0x38)>0) *dsm_out |= 0x80; - if((link[0].d[4] & 0x01)>0) *dsm_out |= 0x100; - if((link[0].d[4] & 0x02)>0) *dsm_out |= 0x200; - - //Tonko: use 12th bit - if(link[0].d[7] & 0x80) *dsm_out |= 0x800; - - - - if(fcs_trgDebug>=1) printf("FCS STG3 output = %04x\n",*dsm_out); - + if( (link[0].d[0] & 0x01) || (link[2].d[0] & 0x01) ) *dsm_out |= 0x1; //EM1 + if( (link[0].d[0] & 0x02) || (link[2].d[0] & 0x02) ) *dsm_out |= 0x2; //EM2 + if( (link[0].d[0] & 0x01) && (link[2].d[0] & 0x01) ) *dsm_out |= 0x4; //EM1 N*S + if( (link[0].d[1] & 0x01) || (link[2].d[1] & 0x01) ) *dsm_out |= 0x8; //ELE1 + if( (link[0].d[1] & 0x02) || (link[2].d[1] & 0x02) ) *dsm_out |= 0x10; //ELE2 + if( (link[0].d[1] & 0x01) && (link[2].d[1] & 0x01) ) *dsm_out |= 0x20; //ELE1 N*S + if( (link[0].d[2] & 0x01) || (link[2].d[2] & 0x01) ) *dsm_out |= 0x40; //GAM1 + if( (link[0].d[2] & 0x02) || (link[2].d[2] & 0x02) ) *dsm_out |= 0x80; //GAM2 + if( (link[0].d[3] & 0x01) || (link[2].d[3] & 0x01) ) *dsm_out |= 0x100; //HAD1 + if( (link[0].d[4] & 0x01) || (link[2].d[4] & 0x01) ) *dsm_out |= 0x200; //JP1 + if( (link[0].d[5] & 0x01) || (link[2].d[5] & 0x01) ) *dsm_out |= 0x400; //ETOT + if( (link[0].d[5] & 0x02) || (link[2].d[5] & 0x02) ) *dsm_out |= 0x800; //HTOT + + dsmout = *dsm_out; + + if(fcs_trgDebug>=1) { + printf("FCS STG3 input 0 = %02x %02x %02x %02x %02x %02x %02x %02x\n", + link[0].d[0],link[0].d[1],link[0].d[2],link[0].d[3], + link[0].d[4],link[0].d[5],link[0].d[6],link[0].d[7]); + printf("FCS STG3 input 1 = %02x %02x %02x %02x %02x %02x %02x %02x\n", + link[2].d[0],link[2].d[1],link[2].d[2],link[2].d[3], + link[2].d[4],link[2].d[5],link[2].d[6],link[2].d[7]); + printf("FCS STG3 output = %04x EM=%1d%1d%1d ELE=%1d%1d%1d GAM=%1d%1d HAD=%1d JP=%1d TOT=%1d%1d\n", + *dsm_out, + (*dsm_out)>>0 & 0x1,(*dsm_out)>>1 & 0x1,(*dsm_out)>>2 & 0x1, + (*dsm_out)>>3 & 0x1,(*dsm_out)>>4 & 0x1,(*dsm_out)>>5 & 0x1, + (*dsm_out)>>6 & 0x1,(*dsm_out)>>7 & 0x1, + (*dsm_out)>>8 & 0x1, + (*dsm_out)>>9 & 0x1, + (*dsm_out)>>10 & 0x1,(*dsm_out)>>11 & 0x1); + } } -