From c718e751f438a527020ebbb44ab941be23153cc0 Mon Sep 17 00:00:00 2001 From: Hongbo Zheng Date: Wed, 31 Mar 2021 18:01:37 +0800 Subject: [PATCH] net/hns3: fix FLR miss detection [ upstream commit 32040ae365735f94253ce317b4b01e8bc4ea9c6b ] When FLR occurs, the head pointer register of the command queue will be cleared, resulting in abnormal detection of the head pointer register of the command queue. At present, FLR is detected in this way, and the reset recovery process is executed. However, when FLR occurs, the header pointer register of the command queue is not necessarily abnormal. For example, when the driver runs normally, the value of the header pointer register of the command queue may also be 0, which will lead to the miss detection of FLR. Therefore, the judgment that whether the base address register of command queue is 0 is added to ensure that FLR not miss detection. Fixes: 2790c6464725 ("net/hns3: support device reset") Signed-off-by: Hongbo Zheng Signed-off-by: Min Hu (Connor) --- drivers/net/hns3/hns3_cmd.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/net/hns3/hns3_cmd.c b/drivers/net/hns3/hns3_cmd.c index 5f6bdbd42f5..8a48714a54d 100644 --- a/drivers/net/hns3/hns3_cmd.c +++ b/drivers/net/hns3/hns3_cmd.c @@ -195,12 +195,14 @@ hns3_cmd_csq_clean(struct hns3_hw *hw) { struct hns3_cmq_ring *csq = &hw->cmq.csq; uint32_t head; + uint32_t addr; int clean; head = hns3_read_dev(hw, HNS3_CMDQ_TX_HEAD_REG); - if (!is_valid_csq_clean_head(csq, head)) { - hns3_err(hw, "wrong cmd head (%u, %u-%u)", head, - csq->next_to_use, csq->next_to_clean); + addr = hns3_read_dev(hw, HNS3_CMDQ_TX_ADDR_L_REG); + if (!is_valid_csq_clean_head(csq, head) || addr == 0) { + hns3_err(hw, "wrong cmd addr(%0x) head (%u, %u-%u)", addr, head, + csq->next_to_use, csq->next_to_clean); if (rte_eal_process_type() == RTE_PROC_PRIMARY) { rte_atomic16_set(&hw->reset.disable_cmd, 1); hns3_schedule_delayed_reset(HNS3_DEV_HW_TO_ADAPTER(hw));