CPU/Recompiler: Remove load delay flag from lwc2

stenzek · stenzek · commit 7eb7ad684ced · 2025-03-07T15:08:00.000+10:00
Shouldn't make any difference since it's not a register write.
diff --git a/src/core/cpu_recompiler.cpp b/src/core/cpu_recompiler.cpp
@@ -1314,7 +1314,7 @@ void CPU::Recompiler::Recompiler::CompileInstruction()
       }
       break;
 
-    case InstructionOp::lwc2: CompileLoadStoreTemplate(&Recompiler::Compile_lwc2, MemoryAccessSize::Word, false, false, TF_READS_S | TF_LOAD_DELAY); break;
+    case InstructionOp::lwc2: CompileLoadStoreTemplate(&Recompiler::Compile_lwc2, MemoryAccessSize::Word, false, false, TF_READS_S); break;
     case InstructionOp::swc2: CompileLoadStoreTemplate(&Recompiler::Compile_swc2, MemoryAccessSize::Word, true, false, TF_GTE_STALL | TF_READS_S); SpecExec_swc2(); break;
 
       // swc0/lwc0/cop1/cop3 are essentially no-ops

Original file line number	Diff line number	Diff line change
`@@ -1314,7 +1314,7 @@ void CPU::Recompiler::Recompiler::CompileInstruction()`
`1314`	`1314`	`}`
`1315`	`1315`	`break;`
`1316`	`1316`
`1317`		`- case InstructionOp::lwc2: CompileLoadStoreTemplate(&Recompiler::Compile_lwc2, MemoryAccessSize::Word, false, false, TF_READS_S \| TF_LOAD_DELAY); break;`
	`1317`	`+ case InstructionOp::lwc2: CompileLoadStoreTemplate(&Recompiler::Compile_lwc2, MemoryAccessSize::Word, false, false, TF_READS_S); break;`
`1318`	`1318`	`case InstructionOp::swc2: CompileLoadStoreTemplate(&Recompiler::Compile_swc2, MemoryAccessSize::Word, true, false, TF_GTE_STALL \| TF_READS_S); SpecExec_swc2(); break;`
`1319`	`1319`
`1320`	`1320`	`// swc0/lwc0/cop1/cop3 are essentially no-ops`