Spelling fixes (larry doolittle)

cadpli/configure.in

@@ -37,7 +37,7 @@ AC_SUBST(DLLIB)
 
 AX_CPP_PRECOMP
 
-# Compiler option for position independent code, needed whan making shared objects.
+# Compiler option for position independent code, needed when making shared objects.
 AX_C_PICFLAG
 
 # Linker option used when compiling the target

configure.in

@@ -96,7 +96,7 @@ AC_C_BIGENDIAN
 
 AX_LD_EXTRALIBS
 
-# Compiler option for position independent code, needed whan making shared objects.
+# Compiler option for position independent code, needed when making shared objects.
 # CFLAGS inherited by cadpli/Makefile?
 AX_C_PICFLAG
 

cprop.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: cprop.cc,v 1.47.2.6 2006/11/12 01:20:45 steve Exp $"
+#ident "$Id: cprop.cc,v 1.47.2.7 2007/02/26 19:51:38 steve Exp $"
 #endif
 
 # include "config.h"
@@ -1070,7 +1070,7 @@ void cprop_functor::lpm_mux_large(Design*des, NetMux*obj)
 	   throughout. If we find any, we can reduce the width of the
 	   MUX to eliminate the fixed value. */
 
-	/* After the following for look, this array of bools will
+	/* After the following for loop, this array of bools will
 	   contain "true" for each bit slice that is constant and
 	   identical, and "false" otherwise. The reduce_width will
 	   count the number of true entries in the flags array. */
@@ -1336,6 +1336,9 @@ void cprop(Design*des)
 
 /*
  * $Log: cprop.cc,v $
+ * Revision 1.47.2.7  2007/02/26 19:51:38  steve
+ *  Spelling fixes (larry doolittle)
+ *
  * Revision 1.47.2.6  2006/11/12 01:20:45  steve
  *  Prevent constant mux outputs from confusing itself.
  *

expr_synth.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: expr_synth.cc,v 1.59.2.10 2006/11/26 01:54:05 steve Exp $"
+#ident "$Id: expr_synth.cc,v 1.59.2.11 2007/02/26 19:51:38 steve Exp $"
 #endif
 
 # include "config.h"
@@ -709,7 +709,7 @@ NetNet* NetEMemory::synthesize(Design*des)
 		  cerr << get_line() << ": debug: synthesize read of "
 		       << explode->pin_count() << " bit exploded memory." << endl;
 
-	      /* Only make a muc big enough to address the words that
+	      /* Only make a mux big enough to address the words that
 		 the address can generate. (If the address is
 		 0-extended, then only the low words are addressable.) */
 	    unsigned use_count = mem_->count();
@@ -1096,6 +1096,9 @@ NetNet* NetESignal::synthesize(Design*des)
 
 /*
  * $Log: expr_synth.cc,v $
+ * Revision 1.59.2.11  2007/02/26 19:51:38  steve
+ *  Spelling fixes (larry doolittle)
+ *
  * Revision 1.59.2.10  2006/11/26 01:54:05  steve
  *  Add synthesis of user defined functions.
  *

libveriuser/configure.in

@@ -23,7 +23,7 @@ AC_CHECK_SIZEOF(unsigned)
 # may modify CPPFLAGS and CFLAGS
 AX_CPP_PRECOMP
 
-# Compiler option for position independent code, needed whan making shared objects.
+# Compiler option for position independent code, needed when making shared objects.
 AX_C_PICFLAG
 
 AC_SUBST(EXEEXT)

solaris/README-solaris_pkg.txt

@@ -1,8 +1,8 @@
-# $Id: README-solaris_pkg.txt,v 1.2 2004/10/04 01:10:56 steve Exp $
+# $Id: README-solaris_pkg.txt,v 1.2.2.1 2007/02/26 19:51:39 steve Exp $
 
 Notes about the solaris package.
 
-I.  Installing a prebuild solaris package
+I.  Installing a prebuilt solaris package
 -----------------------------------------
 
 To install the solaris package do the following as root on your machine:
@@ -24,10 +24,10 @@ To install the solaris package do the following as root on your machine:
    this will install the package.  The package will be registered under the
    name "IVLver"
 
-II.  Deinstalling the solaris package
+II.  Uninstalling the solaris package
 -------------------------------------
 
-To deinstall an installed solaris package do the following as root on your machine:
+To uninstall an installed solaris package do the following as root on your machine:
 
     pkgrm IVLver
 

tgt-edif/configure.in

@@ -19,7 +19,7 @@ AC_CHECK_HEADERS(malloc.h)
 # may modify CPPFLAGS and CFLAGS
 AX_CPP_PRECOMP
 
-# Compiler option for position independent code, needed whan making shared objects.
+# Compiler option for position independent code, needed when making shared objects.
 AX_C_PICFLAG
 
 # linker options when building a shared library

tgt-edif/edif.h

@@ -27,7 +27,7 @@
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: edif.h,v 1.1.2.2 2005/09/25 16:35:36 steve Exp $"
+#ident "$Id: edif.h,v 1.1.2.3 2007/02/26 19:51:39 steve Exp $"
 #endif
 
 # include  <stdio.h>
@@ -55,7 +55,7 @@
  *
  *   Declare external libraries with edif_xlibrary_create
  *     Normally, this is the single technology library that contains
- *     the primitive cells that the code generator intendes to
+ *     the primitive cells that the code generator intends to
  *     use. The library is given a name, such as VIRTEX or whatever
  *     the implementation tools expect. Cells are attached to the
  *     library later. An edif netlist may include multiple external
@@ -204,7 +204,7 @@ extern edif_cellref_t edif_cellref_create(edif_t edf, edif_cell_t cell);
 
 /* Instances can have properties attached to them. The name and value
    given here are turned into a (property <name> (string "val"))
-   sexpression attached to the instance.
+   expression attached to the instance.
 
    Examples of string properties commonly attached to cellref devices
    include such things as the INIT=<value> to initialize LUT cells in
@@ -251,6 +251,9 @@ extern FILE*xnf;
 
 /*
  * $Log: edif.h,v $
+ * Revision 1.1.2.3  2007/02/26 19:51:39  steve
+ *  Spelling fixes (larry doolittle)
+ *
  * Revision 1.1.2.2  2005/09/25 16:35:36  steve
  *  Add Xilinx virtex as a reference EDIF device.
  *

tgt-edif/tables.c

@@ -25,7 +25,7 @@
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: tables.c,v 1.1.2.2 2005/09/25 16:35:37 steve Exp $"
+#ident "$Id: tables.c,v 1.1.2.3 2007/02/26 19:51:39 steve Exp $"
 #endif
 
 # include  "device.h"
@@ -35,7 +35,7 @@
 /*
  * This is where you hook new device types into the module. Simply
  * declare your struct device_s objects (as done with d_lpm_edif) and
- * add an enty in to the edif_device_table so that the user may invoke
+ * add an entry in to the edif_device_table so that the user may invoke
  * it via the -parch=<foo> command line switch.
  */
 extern const struct device_s d_lpm_edif;
@@ -49,6 +49,9 @@ const struct device_table_s edif_device_table[] = {
 
 /*
  * $Log: tables.c,v $
+ * Revision 1.1.2.3  2007/02/26 19:51:39  steve
+ *  Spelling fixes (larry doolittle)
+ *
  * Revision 1.1.2.2  2005/09/25 16:35:37  steve
  *  Add Xilinx virtex as a reference EDIF device.
  *

tgt-edif/xilinx.c

@@ -25,13 +25,13 @@
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: xilinx.c,v 1.1.2.1 2005/09/25 16:35:37 steve Exp $"
+#ident "$Id: xilinx.c,v 1.1.2.2 2007/02/26 19:51:39 steve Exp $"
 #endif
 
 /*
  * This source file contains common functions used by Xilinx
  * devices. The functions here do not support any specific Xilinx part
- * fimily, but instead provide some core functions that are used by
+ * family, but instead provide some core functions that are used by
  * specific devices.
  *
  * For example, some xilinx_* functions are suitable for placing
@@ -295,7 +295,7 @@ edif_cell_t xilinx_cell_xorcy(edif_xlibrary_t xlib)
 
 /*
  * This function does a lot of the stuff common to the header
- * functions of various Xilinx familes. This includes creating the edf
+ * functions of various Xilinx families. This includes creating the edf
  * object that holds the netlist.
  */
 void xilinx_common_header(ivl_design_t des)
@@ -857,14 +857,14 @@ void xilinx_shiftl(ivl_lpm_t net)
 
 	/* Allocate a matrix of edif_cellref_t variables. A devices
 	   will be addressed by the expression table[sdx][qdx];
-	   This should make the algorighm code easier to read. */
+	   This should make the algorithm code easier to read. */
       cells = calloc(nsel * width, sizeof(edif_cellref_t));
       table = calloc(nsel, sizeof(edif_cellref_t*));
 
       for (sdx = 0 ;  sdx < nsel ;  sdx += 1)
 	    table[sdx] = cells + sdx*width;
 
-	/* Make a 0 valued pad bit. I wlil use this for all the shifin
+	/* Make a 0 valued pad bit. I will use this for all the shift in
 	   values that are beyond the input. */
       pad0_cell = edif_cellref_create(edf, cell_0);
       pad0 = edif_joint_create(edf);
@@ -973,6 +973,9 @@ void xilinx_shiftl(ivl_lpm_t net)
 
 /*
  * $Log: xilinx.c,v $
+ * Revision 1.1.2.2  2007/02/26 19:51:39  steve
+ *  Spelling fixes (larry doolittle)
+ *
  * Revision 1.1.2.1  2005/09/25 16:35:37  steve
  *  Add Xilinx virtex as a reference EDIF device.
  *

tgt-edif/xilinx.h

@@ -27,13 +27,13 @@
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: xilinx.h,v 1.1.2.1 2005/09/25 16:35:37 steve Exp $"
+#ident "$Id: xilinx.h,v 1.1.2.2 2007/02/26 19:51:39 steve Exp $"
 #endif
 
 /*
  * This header file includes XILINX library support functions. They
  * manage the creation and reference of cells from the library. Use
- * the xililx_cell_* functions to get an edif_cell_t from the
+ * the xilinx_cell_* functions to get an edif_cell_t from the
  * library. The function will create the cell in the library if
  * needed, or will return the existing cell if it was already called.
  *
@@ -142,6 +142,9 @@ extern void xilinx_shiftl(ivl_lpm_t net);
 
 /*
  * $Log: xilinx.h,v $
+ * Revision 1.1.2.2  2007/02/26 19:51:39  steve
+ *  Spelling fixes (larry doolittle)
+ *
  * Revision 1.1.2.1  2005/09/25 16:35:37  steve
  *  Add Xilinx virtex as a reference EDIF device.
  *

tgt-fpga/configure.in

@@ -19,7 +19,7 @@ AC_CHECK_HEADERS(malloc.h)
 # may modify CPPFLAGS and CFLAGS
 AX_CPP_PRECOMP
 
-# Compiler option for position independent code, needed whan making shared objects.
+# Compiler option for position independent code, needed when making shared objects.
 AX_C_PICFLAG
 
 # linker options when building a shared library

tgt-fpga/edif.h

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: edif.h,v 1.7.2.1 2005/08/27 22:29:31 steve Exp $"
+#ident "$Id: edif.h,v 1.7.2.2 2007/02/26 19:51:39 steve Exp $"
 #endif
 
 # include  <stdio.h>
@@ -47,7 +47,7 @@
  *
  *   Declare external libraries with edif_xlibrary_create
  *     Normally, this is the single technology library that contains
- *     the primitive cells that the code generator intendes to
+ *     the primitive cells that the code generator intends to
  *     use. The library is given a name, such as VIRTEX or whatever
  *     the implementation tools expect. Cells are attached to the
  *     library later. An edif netlist may include multiple external
@@ -196,7 +196,7 @@ extern edif_cellref_t edif_cellref_create(edif_t edf, edif_cell_t cell);
 
 /* Instances can have properties attached to them. The name and value
    given here are turned into a (property <name> (string "val"))
-   sexpression attached to the instance.
+   expression attached to the instance.
 
    Examples of string properties commonly attached to cellref devices
    include such things as the INIT=<value> to initialize LUT cells in
@@ -233,6 +233,9 @@ extern void edif_print(FILE*fd, edif_t design);
 
 /*
  * $Log: edif.h,v $
+ * Revision 1.7.2.2  2007/02/26 19:51:39  steve
+ *  Spelling fixes (larry doolittle)
+ *
  * Revision 1.7.2.1  2005/08/27 22:29:31  steve
  *  Back-port edif_nexus_to_joint from tgt-edif.
  *

tgt-fpga/xilinx.c

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: xilinx.c,v 1.12 2004/02/15 18:03:30 steve Exp $"
+#ident "$Id: xilinx.c,v 1.12.2.1 2007/02/26 19:51:39 steve Exp $"
 #endif
 
 # include  "edif.h"
@@ -273,7 +273,7 @@ edif_cell_t xilinx_cell_xorcy(edif_xlibrary_t xlib)
 
 /*
  * This function does a lot of the stuff common to the header
- * functions of various Xilinx familes. This includes creating the edf
+ * functions of various Xilinx families. This includes creating the edf
  * object that holds the netlist.
  */
 void xilinx_common_header(ivl_design_t des)
@@ -835,14 +835,14 @@ void xilinx_shiftl(ivl_lpm_t net)
 
 	/* Allocate a matrix of edif_cellref_t variables. A devices
 	   will be addressed by the expression table[sdx][qdx];
-	   This should make the algorighm code easier to read. */
+	   This should make the algorithm code easier to read. */
       cells = calloc(nsel * width, sizeof(edif_cellref_t));
       table = calloc(nsel, sizeof(edif_cellref_t*));
 
       for (sdx = 0 ;  sdx < nsel ;  sdx += 1)
 	    table[sdx] = cells + sdx*width;
 
-	/* Make a 0 valued pad bit. I wlil use this for all the shifin
+	/* Make a 0 valued pad bit. I will use this for all the shift in
 	   values that are beyond the input. */
       pad0_cell = edif_cellref_create(edf, cell_0);
       pad0 = edif_joint_create(edf);
@@ -951,6 +951,9 @@ void xilinx_shiftl(ivl_lpm_t net)
 
 /*
  * $Log: xilinx.c,v $
+ * Revision 1.12.2.1  2007/02/26 19:51:39  steve
+ *  Spelling fixes (larry doolittle)
+ *
  * Revision 1.12  2004/02/15 18:03:30  steve
  *  Cleanup of warnings.
  *

tgt-fpga/xilinx.h

@@ -19,13 +19,13 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: xilinx.h,v 1.8 2003/08/15 02:23:53 steve Exp $"
+#ident "$Id: xilinx.h,v 1.8.2.1 2007/02/26 19:51:39 steve Exp $"
 #endif
 
 /*
  * This header file includes XILINX library support functions. They
  * manage the creation and reference of cells from the library. Use
- * the xililx_cell_* functions to get an edif_cell_t from the
+ * the xilinx_cell_* functions to get an edif_cell_t from the
  * library. The function will create the cell in the library if
  * needed, or will return the existing cell if it was already called.
  */
@@ -130,6 +130,9 @@ extern void xilinx_shiftl(ivl_lpm_t net);
 
 /*
  * $Log: xilinx.h,v $
+ * Revision 1.8.2.1  2007/02/26 19:51:39  steve
+ *  Spelling fixes (larry doolittle)
+ *
  * Revision 1.8  2003/08/15 02:23:53  steve
  *  Add synthesis support for synchronous reset.
  *