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Add language support for Verilog-2001 attribute

 syntax. Hook this support into existing $attribute
 handling, and add number and void value types.

 Add to the ivl_target API new functions for access
 of complex attributes attached to gates.
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1 parent 01efffe commit e6c0629626c9c62c51c1369436a651f44907f728 steve committed May 23, 2002
Showing with 638 additions and 166 deletions.
  1. +19 −8 Attrib.cc
  2. +16 −7 Attrib.h
  3. +2 −2 Makefile.in
  4. +10 −1 PExpr.h
  5. +10 −2 PGate.h
  6. +12 −2 PUdp.h
  7. +10 −2 PWire.h
  8. +10 −2 cprop.cc
  9. +11 −3 elab_net.cc
  10. +16 −2 elab_sig.cc
  11. +32 −3 elaborate.cc
  12. +14 −1 eval.cc
  13. +81 −0 eval_attrib.cc
  14. +11 −3 expr_synth.cc
  15. +2 −0 ivl.def
  16. +37 −1 ivl_target.h
  17. +3 −8 lexor.lex
  18. +13 −10 netlist.cc
  19. +12 −5 netlist.h
  20. +83 −29 parse.y
  21. +40 −13 pform.cc
  22. +22 −7 pform.h
  23. +13 −5 pform_dump.cc
  24. +3 −3 syn-rules.y
  25. +26 −4 t-dll-api.cc
  26. +30 −12 t-dll.cc
  27. +11 −4 t-dll.h
  28. +16 −8 t-xnf.cc
  29. +25 −1 tgt-stub/stub.c
  30. +27 −1 util.h
  31. +21 −17 xnfio.cc
View
@@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT)
-#ident "$Id: Attrib.cc,v 1.2 2001/07/25 03:10:48 steve Exp $"
+#ident "$Id: Attrib.cc,v 1.3 2002/05/23 03:08:50 steve Exp $"
#endif
# include "config.h"
@@ -36,34 +36,37 @@ Attrib::~Attrib()
delete[] list_;
}
-void Attrib::set_attributes(const map<string,string>&attr)
+#if 0
+void Attrib::copy_attributes(const map<string,verinum>&attr)
{
assert(list_ == 0);
nlist_ = attr.size();
list_ = new cell_[nlist_];
- map<string,string>::const_iterator idx;
+ map<string,verinum>::const_iterator idx;
unsigned jdx;
for (idx = attr.begin(), jdx = 0 ; idx != attr.end() ; idx ++, jdx++) {
struct cell_*tmp = list_ + jdx;
tmp->key = (*idx).first;
tmp->val = (*idx).second;
}
}
+#endif
-string Attrib::attribute(const string&key) const
+const verinum& Attrib::attribute(const string&key) const
{
for (unsigned idx = 0 ; idx < nlist_ ; idx += 1) {
if (key == list_[idx].key)
return list_[idx].val;
}
- return "";
+ static const verinum null;
+ return null;
}
-void Attrib::attribute(const string&key, const string&value)
+void Attrib::attribute(const string&key, const verinum&value)
{
unsigned idx;
@@ -92,7 +95,7 @@ bool Attrib::has_compat_attributes(const Attrib&that) const
for (idx = 0 ; idx < that.nlist_ ; idx += 1) {
- string tmp = attribute(that.list_[idx].key);
+ verinum tmp = attribute(that.list_[idx].key);
if (tmp != that.list_[idx].val)
return false;
}
@@ -111,7 +114,7 @@ string Attrib::key(unsigned idx) const
return list_[idx].key;
}
-string Attrib::value(unsigned idx) const
+const verinum& Attrib::value(unsigned idx) const
{
assert(idx < nlist_);
return list_[idx].val;
@@ -120,6 +123,14 @@ string Attrib::value(unsigned idx) const
/*
* $Log: Attrib.cc,v $
+ * Revision 1.3 2002/05/23 03:08:50 steve
+ * Add language support for Verilog-2001 attribute
+ * syntax. Hook this support into existing $attribute
+ * handling, and add number and void value types.
+ *
+ * Add to the ivl_target API new functions for access
+ * of complex attributes attached to gates.
+ *
* Revision 1.2 2001/07/25 03:10:48 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
View
@@ -19,11 +19,12 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT)
-#ident "$Id: Attrib.h,v 1.1 2000/12/04 17:37:03 steve Exp $"
+#ident "$Id: Attrib.h,v 1.2 2002/05/23 03:08:50 steve Exp $"
#endif
# include <string>
# include <map>
+# include "verinum.h"
/*
* This class keeps a map of key/value pairs. The map can be set from
@@ -35,21 +36,21 @@ class Attrib {
Attrib();
~Attrib();
- void set_attributes(const map<string,string>&attr);
- string attribute(const string&key) const;
- void attribute(const string&key, const string&value);
+ const verinum&attribute(const string&key) const;
+ void attribute(const string&key, const verinum&value);
bool has_compat_attributes(const Attrib&that) const;
/* Provide a means of iterating over the entries in the map. */
unsigned size() const;
string key(unsigned idx) const;
- string value(unsigned idx) const;
+ const verinum& value(unsigned idx) const;
+
private:
struct cell_ {
- string key;
- string val;
+ string key;
+ verinum val;
};
unsigned nlist_;
@@ -62,6 +63,14 @@ class Attrib {
/*
* $Log: Attrib.h,v $
+ * Revision 1.2 2002/05/23 03:08:50 steve
+ * Add language support for Verilog-2001 attribute
+ * syntax. Hook this support into existing $attribute
+ * handling, and add number and void value types.
+ *
+ * Add to the ivl_target API new functions for access
+ * of complex attributes attached to gates.
+ *
* Revision 1.1 2000/12/04 17:37:03 steve
* Add Attrib class for holding NetObj attributes.
*
View
@@ -16,7 +16,7 @@
# 59 Temple Place - Suite 330
# Boston, MA 02111-1307, USA
#
-#ident "$Id: Makefile.in,v 1.122 2002/05/19 05:21:00 steve Exp $"
+#ident "$Id: Makefile.in,v 1.123 2002/05/23 03:08:50 steve Exp $"
#
#
SHELL = /bin/sh
@@ -126,7 +126,7 @@ FF = nodangle.o synth.o syn-rules.o xnfio.o
O = main.o cprop.o design_dump.o dup_expr.o elaborate.o elab_expr.o \
elab_lval.o elab_net.o elab_anet.o elab_pexpr.o elab_scope.o \
-elab_sig.o emit.o eval.o eval_rconst.o \
+elab_sig.o emit.o eval.o eval_attrib.o eval_rconst.o \
eval_tree.o expr_synth.o functor.o lexor.o lexor_keyword.o link_const.o \
load_module.o netlist.o netmisc.o net_assign.o \
net_design.o net_event.o net_expr.o net_force.o net_func.o \
View
11 PExpr.h
@@ -19,7 +19,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: PExpr.h,v 1.59 2002/04/23 03:53:59 steve Exp $"
+#ident "$Id: PExpr.h,v 1.60 2002/05/23 03:08:51 steve Exp $"
#endif
# include <string>
@@ -328,6 +328,7 @@ class PEString : public PExpr {
virtual NetEConst*elaborate_expr(Design*des, NetScope*,
bool sys_task_arg =false) const;
virtual NetEConst*elaborate_pexpr(Design*des, NetScope*sc) const;
+ verinum* PEString::eval_const(const Design*, const NetScope*) const;
virtual bool is_constant(Module*) const;
@@ -496,6 +497,14 @@ class PECallFunction : public PExpr {
/*
* $Log: PExpr.h,v $
+ * Revision 1.60 2002/05/23 03:08:51 steve
+ * Add language support for Verilog-2001 attribute
+ * syntax. Hook this support into existing $attribute
+ * handling, and add number and void value types.
+ *
+ * Add to the ivl_target API new functions for access
+ * of complex attributes attached to gates.
+ *
* Revision 1.59 2002/04/23 03:53:59 steve
* Add support for non-constant bit select.
*
View
12 PGate.h
@@ -19,7 +19,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: PGate.h,v 1.22 2001/11/22 06:20:59 steve Exp $"
+#ident "$Id: PGate.h,v 1.23 2002/05/23 03:08:51 steve Exp $"
#endif
# include "svector.h"
@@ -79,7 +79,7 @@ class PGate : public LineInfo {
void strength0(strength_t);
void strength1(strength_t);
- map<string,string> attributes;
+ map<string,PExpr*> attributes;
virtual void dump(ostream&out) const;
virtual void elaborate(Design*des, NetScope*scope) const;
@@ -222,6 +222,14 @@ class PGModule : public PGate {
/*
* $Log: PGate.h,v $
+ * Revision 1.23 2002/05/23 03:08:51 steve
+ * Add language support for Verilog-2001 attribute
+ * syntax. Hook this support into existing $attribute
+ * handling, and add number and void value types.
+ *
+ * Add to the ivl_target API new functions for access
+ * of complex attributes attached to gates.
+ *
* Revision 1.22 2001/11/22 06:20:59 steve
* Use NetScope instead of string for scope path.
*
View
14 PUdp.h
@@ -19,14 +19,16 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: PUdp.h,v 1.5 2001/04/22 23:09:45 steve Exp $"
+#ident "$Id: PUdp.h,v 1.6 2002/05/23 03:08:51 steve Exp $"
#endif
# include <map>
# include "svector.h"
# include <string>
# include "verinum.h"
+class PExpr;
+
svector<string>::svector<string>(unsigned size)
: nitems_(size), items_(new string[size])
{
@@ -68,7 +70,7 @@ class PUdp {
verinum::V initial;
- map<string,string> attributes;
+ map<string,PExpr*> attributes;
void dump(ostream&out) const;
@@ -82,6 +84,14 @@ class PUdp {
/*
* $Log: PUdp.h,v $
+ * Revision 1.6 2002/05/23 03:08:51 steve
+ * Add language support for Verilog-2001 attribute
+ * syntax. Hook this support into existing $attribute
+ * handling, and add number and void value types.
+ *
+ * Add to the ivl_target API new functions for access
+ * of complex attributes attached to gates.
+ *
* Revision 1.5 2001/04/22 23:09:45 steve
* More UDP consolidation from Stephan Boettcher.
*
View
12 PWire.h
@@ -19,7 +19,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: PWire.h,v 1.11 2001/12/03 04:47:14 steve Exp $"
+#ident "$Id: PWire.h,v 1.12 2002/05/23 03:08:51 steve Exp $"
#endif
# include "netlist.h"
@@ -69,7 +69,7 @@ class PWire : public LineInfo {
void set_memory_idx(PExpr*ldx, PExpr*rdx);
- map<string,string> attributes;
+ map<string,PExpr*> attributes;
// Write myself to the specified stream.
void dump(ostream&out) const;
@@ -99,6 +99,14 @@ class PWire : public LineInfo {
/*
* $Log: PWire.h,v $
+ * Revision 1.12 2002/05/23 03:08:51 steve
+ * Add language support for Verilog-2001 attribute
+ * syntax. Hook this support into existing $attribute
+ * handling, and add number and void value types.
+ *
+ * Add to the ivl_target API new functions for access
+ * of complex attributes attached to gates.
+ *
* Revision 1.11 2001/12/03 04:47:14 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
View
@@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: cprop.cc,v 1.33 2002/04/14 02:51:37 steve Exp $"
+#ident "$Id: cprop.cc,v 1.34 2002/05/23 03:08:51 steve Exp $"
#endif
# include "config.h"
@@ -56,7 +56,7 @@ void cprop_functor::signal(Design*des, NetNet*obj)
void cprop_functor::lpm_add_sub(Design*des, NetAddSub*obj)
{
// For now, only additions are handled.
- if (obj->attribute("LPM_Direction") != "ADD")
+ if (obj->attribute("LPM_Direction") != verinum("ADD"))
return;
// If the low bit on the A side is 0, then eliminate it from
@@ -949,6 +949,14 @@ void cprop(Design*des)
/*
* $Log: cprop.cc,v $
+ * Revision 1.34 2002/05/23 03:08:51 steve
+ * Add language support for Verilog-2001 attribute
+ * syntax. Hook this support into existing $attribute
+ * handling, and add number and void value types.
+ *
+ * Add to the ivl_target API new functions for access
+ * of complex attributes attached to gates.
+ *
* Revision 1.33 2002/04/14 02:51:37 steve
* Fix bug removing pairs of ones in XOR.
*
View
@@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: elab_net.cc,v 1.89 2002/04/23 03:53:59 steve Exp $"
+#ident "$Id: elab_net.cc,v 1.90 2002/05/23 03:08:51 steve Exp $"
#endif
# include "config.h"
@@ -240,10 +240,10 @@ NetNet* PEBinary::elaborate_net_add_(Design*des, NetScope*scope,
switch (op_) {
case '+':
- gate->attribute("LPM_Direction", "ADD");
+ gate->attribute("LPM_Direction", verinum("ADD"));
break;
case '-':
- gate->attribute("LPM_Direction", "SUB");
+ gate->attribute("LPM_Direction", verinum("SUB"));
break;
}
@@ -2102,6 +2102,14 @@ NetNet* PEUnary::elaborate_net(Design*des, NetScope*scope,
/*
* $Log: elab_net.cc,v $
+ * Revision 1.90 2002/05/23 03:08:51 steve
+ * Add language support for Verilog-2001 attribute
+ * syntax. Hook this support into existing $attribute
+ * handling, and add number and void value types.
+ *
+ * Add to the ivl_target API new functions for access
+ * of complex attributes attached to gates.
+ *
* Revision 1.89 2002/04/23 03:53:59 steve
* Add support for non-constant bit select.
*
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