This patch adds some preliminary module port information to the ivl interface. This may change as I investigate exactly what is needed. It also fixes a few minor bugs (a missed local variable and spacing)
Add support for analog processes with analog contributation statements all the way down to the ivl_target code generator API.
This patch adds .cast/int and updates .cast/real to act as a local (temporary) net and to support either a signed or unsigned input. The vvp_vector4_t class not can convert an arbitrarily sized double to a vector value. This removes the restriction of lround(). Also document the new statements.
This handles the general case of a non-real operand to a real-valued division. This can turn up if only 1 operand of a divide is real. In this case the division as a whole is real and the other operand must be cast to real. This method creates an extra node, but it should be a very compact node and this node does no evaluation tricks so in the run time should be no more expensive then folding the cast into the .arith/div.r itself.
This patch adds the power operator for real values in a continuous assignment.
more general concept of arrays. The NetMemory and NetEMemory classes are removed from the ivl core program, and the IVL_LPM_RAM lpm type is removed from the ivl_target API.
behavior into the NetESelect node and IVL_EX_SELECT ivl_target expression type.
including assing, cassign and force. Generate NetConcat devices for gate outputs that feed into a vector results. Use this to hande gate arrays. Also let gate arrays handle vectors of gates when the outputs allow for it.
of single bits. Make the ivl, tgt-vvp and vvp initial changes down this path.