Commits on Jun 9, 2008
  1. Turn of concat output scheduling.

    steveicarus committed Jun 9, 2008
    We really want lazy processing of concatenation because it has multiple
    inputs and lazy processing should (in theory) prevent redundant and
    useless propagations through the net.
    But enabling it seems to cause many tests in the regression test suite
    to fail to compare their results. There are races in many tests that
    are interacting badly with this feature. So for now, ifdef it out.
  2. Do not do lazy processing of part selects.

    steveicarus committed Jun 9, 2008
    It doesn't really make any sense to do lazy processing of part selects,
    but it is possible to use the part select position to more toroughly
    check for changes in output and suppress non-changes. In particular,
    we only need to check that the output part actually changes, and by the
    way we only need to save those bits for the next go-round.
    We do want to make sure that the very first input causes an output,
    though, so that time-0 values get propagated.
  3. Add means for &A<> to index using a calculated index.

    steveicarus committed Jun 9, 2008
    This is not a solution to all the problems, but is a better catch-all
    then what is currently there. Allow the index field to be a T<> that
    accesses the thread to get the address index.
    Note that the lexor.lex currently returns the T<> as a T_SYMBOL, and the
    users of T_SYMBOL objects need to interpret the meaning. This is
    probably not the best idea, in light of all the other *<> formats that
    now exist.
  4. Rework parameter indexed part select up.

    steveicarus committed Jun 9, 2008
    Indexed part select reworked to be more compact and more like the
    part select.
Commits on Jun 8, 2008
  1. Fix up parameter name part select

    steveicarus committed Jun 8, 2008
    Part select of parameter names is fixed up to be structurally similar
    to part select of signals, and also to behave similarly. (Though not
    identically, for reason.)
Commits on Jun 7, 2008
  1. Allow part selects to fall off the ends of the selected identifier

    steveicarus committed Jun 7, 2008
    Part selects to signals are allowed to be off the ends of the signal
    itself. The bits that are beyond the vector return X. This may mean
    creating constant X bits on one or both ends of the result.
  2. Add missing include to

    ldoolitt committed with steveicarus Jun 6, 2008
    Add # include <string.h>, needed for compilation with gcc-4.3
  3. Clean up more compiletf routines, etc.

    caryr committed with steveicarus Jun 6, 2008
    This patch cleans up some of the code to use common compiletf
    routines where appropriate. It also adds code to print the
    number of extra arguments and cleans up the messages a bit.
  4. Merge branch 'verilog-ams'

    steveicarus committed Jun 7, 2008
  5. Add more array word properties.

    caryr committed with steveicarus Jun 4, 2008
    This patch adds more array word properties.
  6. ASSIGN transfer data to scheduler efficiently/permalloc vvp_net_t obj…

    steveicarus committed Jun 7, 2008
    The vvp_net_t objects are never deleted, so overload the new operator
    to do a more space efficient permanent allocation.
    The %assign/v instruction copied the vvp_vector4_t object needlessly
    on its way to the scheduler. Eliminate that duplication.
Commits on Jun 6, 2008
  1. Rework scheduling of concat, part, buf/not and resolv for efficiency.

    steveicarus committed Jun 6, 2008
    The concat and resolv functors are best evaluated lazily, because each
    evaluation is costly and there is a high probability that an evaluation
    will be invalidated when new input comes in.
    Also optimization the recv_vec4_pv method of the resolver, which is
    commonly used, and adjust the order of handling of vvp_fun_part to
    work more efficiently.
  2. Obvious optimizations of vvp_vector8_t handling.

    steveicarus committed Jun 6, 2008
    The vvp_vector8_t constructor and destructor involve memory allocation
    so it is best to pass these objects by reference as much as possible.
    Also rework the resolver functor to only perform resolution after inputs
    are in so that it doesn't get needlessly repeated. This eliminates many
    resolve function calls, as well as activations throughout the net.
    Also have the islands take more care not to perform resolution if the
    inputs aren't really different.
  3. Add support for exclude of a point

    steveicarus committed Jun 6, 2008
    Parameter value ranges support the exclude of a point as well as
    range, so add the syntax to support that case. Internally it is
    handled as a degenerate range, but the parse and initial elaboration
    need to know about it.
Commits on Jun 5, 2008
  1. Add missing functions to ivl.def

    caryr committed with steveicarus Jun 5, 2008
    This patch adds ivl_island_flag_set and ivl_island_flag_test
    to the ivl.def file. This is needed by both Cygwin and MinGW.
  2. Fix default parameter type if localparams are present.

    steveicarus committed Jun 5, 2008
    localparam declarations were messing up the state of parser variables
    so that the default types of following parameters got messed up.
  3. Compile problems after merge with verilog-ams

    steveicarus committed Jun 5, 2008
    The NetPartSelect::BI enumeration value does not exist any more.
  4. For undefined memory words (size == 0) return an X vector.

    caryr committed with steveicarus Jun 5, 2008
    If a memory word was accessed before it was defined the
    code was returning a zero width vector result. Now it
    returns an appropriately sized vector of 'x'.
  5. Remove documentation for memory opcodes.

    caryr committed with steveicarus Jun 4, 2008
    The memory opcodes %assign/mv, %load/mv and %set/mv
    were removed by a previous patch. This one removes
    the documentation from opcodes.txt. It also removes
    the documentation for the .mem* statements for the
    same reason.
  6. Fix problem linking a-side and b-side tran branches.

    steveicarus committed Jun 5, 2008
    Tran devices linked in series were not getting properly joined up
    due to a problem with the add_branch method.
Commits on Jun 4, 2008
  1. Try to eliminate excessive processing recursions.

    steveicarus committed Jun 4, 2008
    After calculating the A side of a tran[if/vp], the B side is usually
    fully specified, so make an effort to push the calculated value through.
  2. Optimize recursive branch resolution

    steveicarus committed Jun 4, 2008
    Recursive branch resolution was scanning every branch end, even though
    many branch ends share ports and need not be repeatedly scanned. Handle
    marks and flags to cut off recursion where it is not needed so as to
    save much run time.
  3. Merge branch 'master' into verilog-ams

    steveicarus committed Jun 4, 2008
    Note that the draw_net_input.c takes in a lot of the codes that used
    to be in vvp_scope.c, so some changes may have been lost.
  4. Clean up dump routines and support of MemoryWord dump.

    caryr committed with steveicarus Jun 4, 2008
    This patch cleans up the dump routines and adds file and
    line number information for errors. It also adds some of
    the missing MemoryWord properties so they can now be
    dumped and monitored correctly.
  5. Add $simparam and other fixes.

    caryr committed with steveicarus Jun 3, 2008
    This patch adds $simparam and $simparam$str from Verilog-A.
    The analog simulator parameters return 0.0 or N/A. The
    vvp_cpu_wordsize system function has been moved into the
    $simparam call and is now named CPUWordSize.
    This patch also starts the factoring of common code in the
    vpi directory. Some routines were renamed.
    The priv.c file was renamed to sys_priv.c to match the
    include file.
    System functions can now have strings put to their output.
  6. Don't duplicate Makefile shell code

    ldoolitt committed with steveicarus May 29, 2008
    Smaller, and conceptually easier to keep in sync,
    way of handling build machines with and without git.
  7. Fix probable precedence bug

    ldoolitt committed with steveicarus May 29, 2008
    and at least get rid of a compiler warning
  8. More cost effective and reliable island joining algorithm.

    steveicarus committed Jun 4, 2008
    Rather then join islands while branches are initially created, save the
    island creating for the end. This way, the process is actually recursive
    and greedy, reliably collecting branches into islands without conflict.