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More details about running Icarus Verilog.
Make the vvp target the default.
Detect parameter mismatches.
Support non-const right shift (unsigned).
typo in CYMODE=EXAMINE-CI string.
Get include and lib paths right for mingw and vvm.
Describe the mingw compile.
Redo the ivl_root calculator for mingw.
Handle null parameters to system tasks.
Relax limit on width of structural sum.
Properly support signal full names.
Get a private copy of the object name.
Report line of unsupported cassign.
Get include and lib paths from Makefile.
Give task/function definitions a vpi type object.
More robust about incorrect arguments.
Look up functor return register with tail of name.
Generate %shiftl instructions for shift.
Add the %shiftl/i0 instruction.
Only try the readline library if vvp_debus is enabled.
Allow forward references of task scopes. (Stephan Boettcher)
Support macromodule as module.
Handle short inputs to tasks. (Stephan Boettcher)
Infinitely wide behavioral add.
Initialize stmt_cur_ substatements during dll case building.
Some documentation of callback behavior.
Support cbValueChange callbacks.
Escaped identifiers in behavioral expressions. (Stephan Boettcher)
Add dumpon and dumpoff (Stephan Boettcher)
Edit ivl_install_dir only on mingw
Get va_start arguments in right order.
Add structural EEQ gates (Stephan Boettcher)
RAM_DQ pins are inputs, so connect HiZ to the nexus.