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tag: s20010902
Commits on Sep 2, 2001
  1. Add documentation for the code generator.

    steve authored
  2. Add virtex support for some basic logic, the DFF

    steve authored
     and constant signals.
  3. Rearrange the XNF code generator to be generic-xnf

    steve authored
     so that non-XNF code generation is also possible.
    
     Start into the virtex EDIF output driver.
Commits on Sep 1, 2001
  1. Generic ADD code.

    steve authored
  2. Generate code for MUX devices.

    steve authored
  3. dead comments.

    steve authored
Commits on Aug 31, 2001
  1. Support DFF CE inputs.

    steve authored
  2. Handle more path polarity cases.

    steve authored
  3. Parse $setuphold statements.

    steve authored
  4. Add the fpga target.

    steve authored
  5. Many more logic gate types.

    steve authored
  6. Add root port SIG records.

    steve authored
Commits on Aug 30, 2001
  1. Mangle nexus names.

    steve authored
Commits on Aug 28, 2001
  1. Add the fpga target.

    steve authored
  2. Add some ivl_target convenience functions.

    steve authored
Commits on Aug 26, 2001
  1. Generate code for l-value bit selects.

    steve authored
  2. Add the assign/x0 and set/x opcodes.

    steve authored
Commits on Aug 25, 2001
  1. Change the NetAssign_ class to refer to the signal

    steve authored
     instead of link into the netlist. This is faster
     and uses less space. Make the NetAssignNB carry
     the delays instead of the NetAssign_ lval objects.
    
     Change the vvp code generator to support multiple
     l-values, i.e. concatenations of part selects.
  2. Only use fvectors for nets and vars.

    steve authored
Commits on Aug 23, 2001
Commits on Aug 16, 2001
  1. statement ends after while loop labels.

    steve authored
  2. Add some missing print escape sequences.

    steve authored
Commits on Aug 10, 2001
  1. Describe the new .net behavior.

    steve authored
  2. Neaten and document the resolv object.

    steve authored
Commits on Aug 9, 2001
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