Array words don't have a vpiHandle with a label, so the %vpi_call needs a special syntac for arguments that reference array words. This syntax creates an array word reference that persists and can be used at a VPI object by system tasks.
Memory words may have part selects assigned, but the code messed up the testing for the validity of the part select base. This fixes do detect constant bases so that base validity tests are handled at compile time.
The draw_input_from_net function was being used to access words of a var array, which doesn't work. Have the draw_input_from_net punt on that case, and by the way the mux inputs don't need to use that function, instead they should use the general draw_net_input function to get the input labels.
It is possible for an array to have 1 word in it, so using the array count to detect an array is incorrect. Use the ivl_signal_dimensions function, which is there exactly for that purpose.
The non-array set statements no longer work on array words. Handle the various cases properly.
VPI code may need to access words of a variable array. If so, create a compact handle format that gains that access with minimal pain.
Save tons of space per memory word by not creating a vpi handle for each and every word of a variable array. (Net arrays still get a vpiHandle for every word.) The consequence of this is that all accesses to a variable array need to go through the indexing. This commit handles the most common places where this impacts, but there are still problems.
vpi_handle_by_name() was assuming it was always given a valid scope object. In the context of vpi_chk_error() this is not required and some users use/abuse the interface by calling the function with invalid objects expecting a 0 return value. This patch adds an explicit check for the supported types vpiScope and as an extension vpiModule. Anything else should be flagged as an error once we have vpi_chk_error() implemented, but for now it just returns 0.
The arguments to $ungetc() were backwards! This patch fixes that and adds a bit more checking to the compile_tf routine. It still needs more work, but that can wait for the major system function clean up I have planned when I can find the time.
The PWile and PRepeat statements need elaborate_sig() methods to recurse into the contained statements.
It is a quirk of the $signed() system function that the argument is converted to signed, but the operation that is performed is not changed. So arithmetic operators on unsigned arguments inside a $signed() expression still perform unsigned arithmetic.
This reverts commit 3c5bf03. A latter patch is more complete.
The Verilog LRM specifies that it is legal to give constant part selects that are beyond the bounds of the identifier being selected. But elaboration was flagging that as an error. This patch changes it to a warning, and handles the cases by generating 'bx bits as needed.
It is wrong to assume that the result of a unary minus is signed. Doing so can cause incorrect results in subsequent math.
If there is an x or z bin in the sign position of a logic number to be padded, pad with the x or z, not zero.
Verilog does not allow macro expansion in strings, and that's that. But sometimes people want strings of a macro expansion, so add a stringify syntax that does the trick.