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@@ -1,7 +1,7 @@ |
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#ifndef __verinum_H |
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#define __verinum_H |
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/* |
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* Copyright (c) 1998-2013 Stephen Williams (steve@icarus.com) |
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* Copyright (c) 1998-2014 Stephen Williams (steve@icarus.com) |
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* |
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* This source code is free software; you can redistribute it |
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* and/or modify it in source code form under the terms of the GNU |
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@@ -171,11 +171,13 @@ inline verinum::V operator != (const verinum&left, const verinum&right) |
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{ return (left == right)? verinum::V0 : verinum::V1; } |
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/* These are arithmetic operators. These generally work to produce |
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results that do not overflow. That means the result may expand or |
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contract to hold the bits needed to hold the operation results |
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accurately. It is up to the caller to truncate or pad if a specific |
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width is expected. */ |
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/* These are arithmetic operators. If any operand is unsized, they |
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generally work to produce results that do not overflow. That means |
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the result may expand or contract to hold the bits needed to hold |
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the operation results accurately. It is up to the caller to truncate |
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or pad if a specific width is expected. If all operands are sized, |
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the normal Verilog rules for result size are used. */ |
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extern verinum operator - (const verinum&right); |
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extern verinum operator + (const verinum&left, const verinum&right); |
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extern verinum operator - (const verinum&left, const verinum&right); |
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extern verinum operator * (const verinum&left, const verinum&right); |
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@@ -190,6 +192,6 @@ extern verinum operator>> (const verinum&left, unsigned shift); |
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extern verinum concat(const verinum&left, const verinum&right); |
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/* Bitwise not returns the ones complement. */ |
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extern verinum v_not(const verinum&left); |
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extern verinum operator ~ (const verinum&left); |
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#endif |