Icarus does undef propagation of const multiplies incorrectly

[cliffordwolf]

The following module should set the output to constant 4'bxxxx:

module test(y);
  output [3:0] y;
  assign y = 4'b0 * 4'bx;
endmodule

But Icarus Verilog (git a3450bf) is too smart and outputs 4'b0000 instead.

I guess this is related to issue #15.

[martinwhitaker]

It's not exactly related, as it is one of the general optimisations the compiler does, so would happen even if the second operand was a variable. I've fixed this in other places by adding a check that the second operand is not a four-state signal, but I missed this one.

[martinwhitaker]

I've pushed a fix for this to the git master branch.