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4ccd216 @caryr Add specify block test for inertial delays.
caryr authored
1 `timescale 1ns/1ps
2
3 module top;
4 reg pass;
5 reg ina, inb;
6 wire out;
7
8 my_or dut(out, ina, inb);
9
10 initial begin
11 pass = 1'b1;
12 ina = 1'b0;
13 inb = 1'b0;
14 #0.399
15 if (out !== 1'bx && out !== 1'bz) begin
16 $display("FAILED: gate had incorrect delay, expected x/z, got %b.", out);
17 pass = 1'b0;
18 end
19 #0.002
20 if (out !== 1'b0) begin
21 $display("FAILED: gate had incorrect delay, expected 0, got %b.", out);
22 pass = 1'b0;
23 end
24
25 // Check inertial delays.
26 ina = 1'b1;
27 #0.399
28 ina = 1'b0;
29 #0.002
30 if (out !== 1'b0) begin
31 $display("FAILED: inertial delay, expected 0, got %b.", out);
32 pass = 1'b0;
33 end
34
35 // Check that this change is relative to the first edge.
36 ina = 1'b1;
37 #0.200;
38 inb = 1'b1;
39 #0.201;
40 if (out !== 1'b1) begin
41 $display("FAILED: double edge delay, expected 1, got %b.", out);
42 pass = 1'b0;
43 #0.200;
44 if (out === 1'b1) begin
45 $display("FAILED: double edge delay was off second edge.");
46 end
47 end
48
49 if (pass) $display("PASSED");
50 end
51 endmodule
52
53 module my_or(out, ina, inb);
54 output out;
55 input ina, inb;
56
57 or(out, ina, inb);
58
59 specify
60 (ina, inb *> out) = 0.4;
61 endspecify
62 endmodule
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