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refactor: redesign CPU State + Execution debugger cards#184

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stid merged 2 commits into
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refactor/cpu-state-panel-redesign
May 31, 2026
Merged

refactor: redesign CPU State + Execution debugger cards#184
stid merged 2 commits into
masterfrom
refactor/cpu-state-panel-redesign

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@stid

@stid stid commented May 31, 2026

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Context

Redesign of the CPU State and Execution cards in the debugger Overview tab,
using a Claude Design–assisted mockup as the visual target. The original cards were
visually flat (labels, values, and the cycle counter all at similar weight), so nothing
guided the eye. This gives them a clear hierarchy while keeping the data contract and
design-token system intact.

What changed

  • Extracted the two inline cards (~146 lines) out of DebuggerLayout.tsx into
    prop-driven presentational components — CpuStateCard and ExecutionCard — which take
    debugInfo and are unit-testable in isolation. Net code is roughly flat.
  • CPU State: segmented A/X/Y/SP register rail (label-over-value), a clickable
    PC pill (reuses AddressLink with context menu / run-to-cursor), a labeled
    flag-chip strip with distinct ON / clear / unused (-,B) states, and a
    de-emphasized purple cycle counter.
  • Execution: divider-separated rows with a status dot on IRQ/NMI; prominent
    semibold title and emphasized (semibold) values so it reads as redesigned, not just
    re-bordered.
  • Every value maps to an existing design token — zero new tokens, no hardcoded colors.

Design decisions

  • The flag section stays labeled "FLAGS", not the mockup's "STATUS FLAGS":
    the AC-7 guard test (DebuggerLayout-debugger-exec-bar.vitest.test.tsx) deliberately
    forbids reusing "Status" as a label here. Honored the existing decision rather than
    reverting it.
  • Titles bumped to text-base/semibold (closest token to the mockup's 20px); the change
    is scoped to these two cards — sibling cards (Memory Map, Stack, …) keep their current
    title size. Happy to harmonize those in a follow-up if desired.

Verification

  • yarn test:ci (lint + type-check + vitest): 785 passed, 1 skipped (the WASM
    benchmark that skips in Node, as documented).
  • 7 new behavioral tests for the cards (flag SET→success, unused→disabled,
    IRQ/NMI ACTIVE→warning, register-rail values, PC renders as a button, value emphasis).
  • Verified live in-browser against the mockup (register rail, flag chips, status dots,
    typography hierarchy all match).
  • Version bumped 4.51.34.51.4 (refactor → patch).

Engine parity

UI-only change — no CPU/engine code touched, JS↔WASM parity unaffected.

🤖 Generated with Claude Code

Summary by CodeRabbit

  • New Features

    • Added CPU State card component displaying register values, flags, and cycle information in the debugger
    • Added Execution card component displaying last opcode, instruction count, and interrupt line status in the debugger
  • Tests

    • Added comprehensive test coverage for debugger display components
  • Chores

    • Version bumped to 4.51.4

stid and others added 2 commits May 30, 2026 17:24
Extract the inline Overview-tab cards into prop-driven presentational
components (CpuStateCard, ExecutionCard) and restyle per a Claude
Design-assisted mockup, mapping every value to existing design tokens:

- CPU State: segmented A/X/Y/SP register rail, a clickable PC pill
  (AddressLink), a labeled flag-chip strip with clear ON/clear/unused
  states, and a de-emphasized purple cycle counter.
- Execution: divider-separated rows with a status dot on IRQ/NMI.

Keeps the existing debugInfo data contract and helpers unchanged; flag
register stays labeled "Flags" (honors AC-7 guard, no "Status" overload).
Adds behavioral tests for both cards. Version bump 4.51.3 -> 4.51.4.

Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
The first pass left Execution looking unchanged: values stayed at normal
weight and both card titles kept the original 16px/medium size, so only
CPU State (with its bold register rail) read as redesigned. Match the
measured mockup: card titles -> 18px semibold (text-base), data values ->
semibold, row labels -> 14px (text-xs). Keeps the flag label "FLAGS"
(AC-7 guard) and all tokens. Lock the value emphasis in ExecutionCard tests.

Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
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coderabbitai Bot commented May 31, 2026

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Review Change Stack

📝 Walkthrough

Walkthrough

This PR refactors the debugger panel by extracting CPU state and execution display from inline DebuggerLayout markup into two new memoized components: CpuStateCard (registers, flags, cycles) and ExecutionCard (opcode, instruction count, interrupt status). Both are backed by comprehensive tests. Version bumped to 4.51.4.

Changes

Debugger Panel Refactoring

Layer / File(s) Summary
CpuStateCard Component
src/components/CpuStateCard.tsx
New memoized component renders a 4-cell register rail (A/X/Y/SP), a per-flag styling row where SET flags receive success class and CLR/unused flags use secondary/disabled classes, a clickable PC pill (via AddressLink when REG_PC exists, otherwise $0000 default), and an HW_CYCLES counter. Configuration maps register fields and flag bit glyph positions to display values and CSS class derivation logic.
ExecutionCard Component
src/components/ExecutionCard.tsx
New memoized component displays last opcode and instruction count with fallback defaults, plus two status rows ("IRQ Line" and "NMI Line") that render ACTIVE or INACTIVE state with corresponding warning/secondary text styling.
DebuggerLayout Integration
src/components/DebuggerLayout.tsx
Overview column replaces 145 lines of inline CPU/execution metrics with CpuStateCard and ExecutionCard component calls. Corresponding imports are updated to add the new components and remove getDebugValueOrDefault helper no longer needed in this file.
Component Test Suite
src/components/__tests__/CpuStateCard-cpu-state-panel-redesign.vitest.test.tsx, src/components/__tests__/ExecutionCard-cpu-state-panel-redesign.vitest.test.tsx
Vitest/RTL tests verify CpuStateCard renders title, register labels/values, clickable PC, correct flag token classes (text-success for SET, text-text-secondary for CLR, text-text-disabled for unused), and HW_CYCLES with text-data-status class. ExecutionCard tests verify title, metric labels/values, and ACTIVE/INACTIVE interrupt styling.
Version Bump
src/version.ts
APP_VERSION updated from '4.51.3' to '4.51.4'.

Estimated code review effort

🎯 2 (Simple) | ⏱️ ~12 minutes

Possibly related PRs

  • stid/Apple1JS#168: Both PRs refactor the same src/components/DebuggerLayout.tsx overview column to restructure CPU state and execution status display with updated styling and field organization.

Poem

🐰 A debugger dreams, components arise,
CPU state and execution now split and wise,
Registers dance, flags glow with care,
Tests wrap them round with meticulous pair—
Version bumps gently: 4.51.4 shines bright! ✨

🚥 Pre-merge checks | ✅ 5
✅ Passed checks (5 passed)
Check name Status Explanation
Description Check ✅ Passed Check skipped - CodeRabbit’s high-level summary is enabled.
Title check ✅ Passed The title clearly and concisely describes the main refactoring work: extracting CPU State and Execution cards into dedicated components with a visual redesign. It directly matches the primary changeset.
Docstring Coverage ✅ Passed No functions found in the changed files to evaluate docstring coverage. Skipping docstring coverage check.
Linked Issues check ✅ Passed Check skipped because no linked issues were found for this pull request.
Out of Scope Changes check ✅ Passed Check skipped because no linked issues were found for this pull request.

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Actionable comments posted: 2

🧹 Nitpick comments (1)
src/components/CpuStateCard.tsx (1)

68-82: ⚡ Quick win

Consider bg-surface-overlay for register rail cells.

The register cells use bg-surface-secondary/40 for translucency. For consistency with the design token system, consider using bg-surface-overlay for translucent surfaces within the card. Based on learnings, bg-surface-overlay is preferred for overlay surfaces that require transparency.

♻️ Alternative approach
                     <div
                         key={reg.label}
-                        className={`flex flex-col items-center gap-xs py-sm bg-surface-secondary/40 ${
+                        className={`flex flex-col items-center gap-xs py-sm bg-surface-overlay ${
                             i > 0 ? 'border-l border-border-primary' : ''
                         }`}
                     >
🤖 Prompt for AI Agents
Verify each finding against current code. Fix only still-valid issues, skip the
rest with a brief reason, keep changes minimal, and validate.

In `@src/components/CpuStateCard.tsx` around lines 68 - 82, The register cells in
CpuStateCard use the tailwind class "bg-surface-secondary/40" which should be
replaced with the design-token overlay class "bg-surface-overlay" for consistent
translucent surface styling; update the JSX inside the REGISTERS.map render (the
div with className containing bg-surface-secondary/40) to use bg-surface-overlay
instead, keeping the rest of the classes and behavior (including the key using
reg.label and the displayed value via getDebugValueOrDefault(cpu?.[reg.field],
reg.def)) unchanged.
🤖 Prompt for all review comments with AI agents
Verify each finding against current code. Fix only still-valid issues, skip the
rest with a brief reason, keep changes minimal, and validate.

Inline comments:
In `@src/components/CpuStateCard.tsx`:
- Line 47: Replace the opaque background token with the translucent overlay
token in the CpuStateCard component: locate the root div in CpuStateCard (the
element with className including "bg-surface-primary") and change that token to
"bg-surface-overlay" so the card uses the translucent panel background
consistent with other panels.

In `@src/components/ExecutionCard.tsx`:
- Line 29: In ExecutionCard (the component rendering the outer div with
className "bg-surface-primary rounded-lg p-md border border-border-primary"),
replace the opaque background token "bg-surface-primary" with the translucent
token "bg-surface-overlay" (keeping the other utility classes intact) so the
card uses the overlay surface style consistent with other panels.

---

Nitpick comments:
In `@src/components/CpuStateCard.tsx`:
- Around line 68-82: The register cells in CpuStateCard use the tailwind class
"bg-surface-secondary/40" which should be replaced with the design-token overlay
class "bg-surface-overlay" for consistent translucent surface styling; update
the JSX inside the REGISTERS.map render (the div with className containing
bg-surface-secondary/40) to use bg-surface-overlay instead, keeping the rest of
the classes and behavior (including the key using reg.label and the displayed
value via getDebugValueOrDefault(cpu?.[reg.field], reg.def)) unchanged.
🪄 Autofix (Beta)

Fix all unresolved CodeRabbit comments on this PR:

  • Push a commit to this branch (recommended)
  • Create a new PR with the fixes

ℹ️ Review info
⚙️ Run configuration

Configuration used: Path: .coderabbit.yaml

Review profile: CHILL

Plan: Pro Plus

Run ID: ebc0a1ff-fef6-451d-b3ec-d773661ad717

📥 Commits

Reviewing files that changed from the base of the PR and between 1a83205 and 5f93afd.

📒 Files selected for processing (6)
  • src/components/CpuStateCard.tsx
  • src/components/DebuggerLayout.tsx
  • src/components/ExecutionCard.tsx
  • src/components/__tests__/CpuStateCard-cpu-state-panel-redesign.vitest.test.tsx
  • src/components/__tests__/ExecutionCard-cpu-state-panel-redesign.vitest.test.tsx
  • src/version.ts

Comment thread src/components/CpuStateCard.tsx
Comment thread src/components/ExecutionCard.tsx
@stid stid merged commit 96e18ce into master May 31, 2026
9 checks passed
@stid stid deleted the refactor/cpu-state-panel-redesign branch May 31, 2026 01:06
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