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Add support for all remaining AES modes #22

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Merged
merged 18 commits into from
Aug 1, 2019
Merged

Add support for all remaining AES modes #22

merged 18 commits into from
Aug 1, 2019

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hannobraun
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This pull request is based on #19. I recommend reviewing/merging that one first, before taking a look at this one.

cc @lthiery

I'm working on some changes that require `Transfer::new` to be opened up
to the rest of the crate, so I think it makes sense to not require weird
PAC types when calling it.
The problem with these constructors is that they're not flexible enough.
In general, peripheral APIs might want to present DMA transfers to the
user in a different way than they work in hardware.

For example, the AES peripheral supports only transfers of 32-bit words,
but might want to present an API that works with byte slices (I'm
currently working on this). Another example would be SPI, which might
want to hide two simultaneous DMA transfers (for read and write) behind
a single transfer struct.

This commit doesn't make these use cases possible yet, as some
modifications to the unsafe constructor are still required. But it paves
the way, by exposing that constructor to the peripheral APIs.

Please note that none of this exposes any unsafety to the users. They
will still use the same (safe) peripheral APIs to access DMA.
The new trait, `Buffer`, provides everything the DMA code needs from the
buffer, without requiring implementers to be able to return a slice.
This makes the trait more flexible, as it can be implemented for a
larger variety of types, without requiring any complex transmuting.
The type parameter names were wrong, as they were in a different order
than was used everywhere else in the code. Please note that this didn't
cause any incorrect behavior, as just the names were wrong and nothing
else.
This should be more natural than operating with `u32` words.
I'm working on adding support for more modes besides CTR, so the current
examples need to be renamed to qualify them.
I'm about to add support for more AES modes, so the old name is too
specific.
I'm about to add support for more AES modes, so the old name was too
specific.
The new name is consistent with `AES::enable`. The old name was
consistent once, but the method it was consistent with has since been
renamend.
@arkorobotics arkorobotics marked this pull request as ready for review August 1, 2019 00:20
@arkorobotics arkorobotics merged commit d05d495 into stm32-rs:master Aug 1, 2019
@arkorobotics
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Thanks so much for adding the AES support and for cleaning up the PWM source code and examples!

@hannobraun hannobraun deleted the aes branch August 1, 2019 05:57
@hannobraun
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Thanks so much for adding the AES support and for cleaning up the PWM source code and examples!

No problem. Thank my client, they paid for it :-)

Thank you for creating stm32l0xx-hal in the first place, and for keeping up with all my pull requests!

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2 participants