From e878c6e11ec456b52dfe3ecd3c23f309c9e528a5 Mon Sep 17 00:00:00 2001 From: Shuncey Balba Date: Thu, 6 Nov 2025 13:06:05 +0700 Subject: [PATCH 1/8] Necessary stuff for board to boot, still needs works --- boards.txt | 10 + .../ldscript.ld | 30 +- .../variant_WeActMiniH723VGTX.cpp | 208 ++++++++++++++ .../variant_WeActMiniH723VGTX.h | 263 ++++++++++++++++++ 4 files changed, 494 insertions(+), 17 deletions(-) create mode 100644 variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/variant_WeActMiniH723VGTX.cpp create mode 100644 variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/variant_WeActMiniH723VGTX.h diff --git a/boards.txt b/boards.txt index 3d40c56814..4665cf3f5d 100644 --- a/boards.txt +++ b/boards.txt @@ -9488,6 +9488,16 @@ GenH7.menu.pnum.WeActMiniH750VBTX.build.variant_h=variant_WeActMiniH7xx.h GenH7.menu.pnum.WeActMiniH750VBTX.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS GenH7.menu.pnum.WeActMiniH750VBTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32H7xx/STM32H750.svd +# WeAct Mini H723VGTX +GenH7.menu.pnum.WeActMiniH723VGTX=WeAct MiniSTM32H723VGTX +GenH7.menu.pnum.WeActMiniH723VGTX.upload.maximum_size=1048576 +GenH7.menu.pnum.WeActMiniH723VGTX.upload.maximum_data_size=577536 +GenH7.menu.pnum.WeActMiniH723VGTX.build.board=WeActMiniH723VGTX +GenH7.menu.pnum.WeActMiniH723VGTX.build.product_line=STM32H723xx +GenH7.menu.pnum.WeActMiniH750VBTX.build.variant_h=variant_WeActMiniH7xx.h +GenH7.menu.pnum.WeActMiniH723VGTX.build.variant=STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T) +GenH7.menu.pnum.WeActMiniH723VGTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32H7xx/STM32H723.svd + # Generic H723VEHx GenH7.menu.pnum.GENERIC_H723VEHX=Generic H723VEHx GenH7.menu.pnum.GENERIC_H723VEHX.upload.maximum_size=524288 diff --git a/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/ldscript.ld b/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/ldscript.ld index f580ff2a2e..efdd501eb8 100644 --- a/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/ldscript.ld +++ b/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/ldscript.ld @@ -6,7 +6,7 @@ ** Author : STM32CubeIDE ** ** Abstract : Linker script for STM32H7 series -** 1024Kbytes FLASH and 560Kbytes RAM +** 512Kbytes FLASH and 560Kbytes RAM ** ** Set heap size, stack size and stack location according ** to application requirements. @@ -21,7 +21,7 @@ ***************************************************************************** ** @attention ** -** Copyright (c) 2025 STMicroelectronics. +** Copyright (c) 2022 STMicroelectronics. ** All rights reserved. ** ** This software is licensed under terms that can be found in the LICENSE file @@ -37,18 +37,18 @@ ENTRY(Reset_Handler) /* Highest address of the user mode stack */ _estack = ORIGIN(RAM_D1) + LENGTH(RAM_D1); /* end of RAM */ /* Generate a link error if heap and stack don't fit into RAM */ -_Min_Heap_Size = 0x200; /* required amount of heap */ -_Min_Stack_Size = 0x400; /* required amount of stack */ +_Min_Heap_Size = 0x200 ; /* required amount of heap */ +_Min_Stack_Size = 0x400 ; /* required amount of stack */ /* Specify the memory areas */ MEMORY { ITCMRAM (xrw) : ORIGIN = 0x00000000, LENGTH = 64K DTCMRAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K - FLASH (rx) : ORIGIN = 0x08000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET - RAM_D1 (xrw) : ORIGIN = 0x24000000, LENGTH = LD_MAX_DATA_SIZE + FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET + RAM_D1 (xrw) : ORIGIN = 0x24000000, LENGTH = 320K RAM_D2 (xrw) : ORIGIN = 0x30000000, LENGTH = 32K - RAM_D3 (xrw) : ORIGIN = 0x38000000, LENGTH = 16K + RAM_D3 (xrw) : ORIGIN = 0x38000000, LENGTH = 16K } /* Define output sections */ @@ -88,25 +88,21 @@ SECTIONS . = ALIGN(4); } >FLASH - .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } >FLASH - .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ - { + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { __exidx_start = .; *(.ARM.exidx*) __exidx_end = .; } >FLASH - .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + .preinit_array : { PROVIDE_HIDDEN (__preinit_array_start = .); KEEP (*(.preinit_array*)) PROVIDE_HIDDEN (__preinit_array_end = .); } >FLASH - .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + .init_array : { PROVIDE_HIDDEN (__init_array_start = .); KEEP (*(SORT(.init_array.*))) @@ -114,7 +110,7 @@ SECTIONS PROVIDE_HIDDEN (__init_array_end = .); } >FLASH - .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + .fini_array : { PROVIDE_HIDDEN (__fini_array_start = .); KEEP (*(SORT(.fini_array.*))) @@ -175,4 +171,4 @@ SECTIONS } .ARM.attributes 0 : { *(.ARM.attributes) } -} +} \ No newline at end of file diff --git a/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/variant_WeActMiniH723VGTX.cpp b/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/variant_WeActMiniH723VGTX.cpp new file mode 100644 index 0000000000..a4dd3ec9e6 --- /dev/null +++ b/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/variant_WeActMiniH723VGTX.cpp @@ -0,0 +1,208 @@ +/* + ******************************************************************************* + * Copyright (c) 2020, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_WeActMiniH723VGTX) +#include "pins_arduino.h" + +// Digital PinName array +const PinName digitalPin[] = { + PA_0, // D0/A0 + PA_1, // D1/A1 + PA_2, // D2/A2 + PA_3, // D3/A3 + PA_4, // D4/A4 + PA_5, // D5/A5 + PA_6, // D6/A6 + PA_7, // D7/A7 + PA_8, // D8 + PA_9, // D9 + PA_10, // D10 + PA_11, // D11 + PA_12, // D12 + PA_13, // D13 + PA_14, // D14 + PA_15, // D15 + PB_0, // D16/A8 + PB_1, // D17/A9 + PB_2, // D18 + PB_3, // D19 + PB_4, // D20 + PB_5, // D21 + PB_6, // D22 + PB_7, // D23 + PB_8, // D24 + PB_9, // D25 + PB_10, // D26 + PB_11, // D27 + PB_12, // D28 + PB_13, // D29 + PB_14, // D30 + PB_15, // D31 + PC_0, // D32/A10 + PC_1, // D33/A11 + PC_4, // D34/A12 + PC_5, // D35/A13 + PC_6, // D36 + PC_7, // D37 + PC_8, // D38 + PC_9, // D39 + PC_10, // D40 + PC_11, // D41 + PC_12, // D42 + PC_13, // D43 + PC_14, // D44 + PC_15, // D45 + PD_0, // D46 + PD_1, // D47 + PD_2, // D48 + PD_3, // D49 + PD_4, // D50 + PD_5, // D51 + PD_6, // D52 + PD_7, // D53 + PD_8, // D54 + PD_9, // D55 + PD_10, // D56 + PD_11, // D57 + PD_12, // D58 + PD_13, // D59 + PD_14, // D60 + PD_15, // D61 + PE_0, // D62 + PE_1, // D63 + PE_2, // D64 + PE_3, // D65 + PE_4, // D66 + PE_5, // D67 + PE_6, // D68 + PE_7, // D69 + PE_8, // D70 + PE_9, // D71 + PE_10, // D72 + PE_11, // D73 + PE_12, // D74 + PE_13, // D75 + PE_14, // D76 + PE_15, // D77 + PH_0, // D78 + PH_1, // D79 + PC_2_C, // D80/A14 + PC_3_C // D81/A15 +}; + +// Analog (Ax) pin number array +const uint32_t analogInputPin[] = { + 0, // A0, PA0 + 1, // A1, PA1 + 2, // A2, PA2 + 3, // A3, PA3 + 4, // A4, PA4 + 5, // A5, PA5 + 6, // A6, PA6 + 7, // A7, PA7 + 16, // A8, PB0 + 17, // A9, PB1 + 32, // A10, PC0 + 33, // A11, PC1 + 34, // A12, PC4 + 35, // A13, PC5 + 80, // A14, PC2_C + 81 // A15, PC3_C +}; + +WEAK void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; + RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {}; + + /** Supply configuration update enable + */ + HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY); + + /** Configure the main internal regulator output voltage + */ + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0); + + while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {} + + /** Configure LSE Drive Capability + */ + HAL_PWR_EnableBkUpAccess(); + __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_HIGH); + + /** Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE|RCC_OSCILLATORTYPE_LSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.LSEState = RCC_LSE_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLM = 5; + RCC_OscInitStruct.PLL.PLLN = 48; + RCC_OscInitStruct.PLL.PLLP = 1; + RCC_OscInitStruct.PLL.PLLQ = 5; + RCC_OscInitStruct.PLL.PLLR = 2; + RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2; + RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE; + RCC_OscInitStruct.PLL.PLLFRACN = 0; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + + /** Initializes the CPU, AHB and APB buses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2 + |RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2; + RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2; + RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) + { + Error_Handler(); + } + + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB | RCC_PERIPHCLK_OSPI + | RCC_PERIPHCLK_SDMMC | RCC_PERIPHCLK_ADC + | RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_USART16 + | RCC_PERIPHCLK_USART234578 | RCC_PERIPHCLK_I2C123 + | RCC_PERIPHCLK_I2C4 | RCC_PERIPHCLK_SPI123 + | RCC_PERIPHCLK_SPI45 | RCC_PERIPHCLK_SPI6; + PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL; + PeriphClkInitStruct.OspiClockSelection = RCC_OSPICLKSOURCE_D1HCLK; + PeriphClkInitStruct.SdmmcClockSelection = RCC_SDMMCCLKSOURCE_PLL; + PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLL2; + PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_D3PCLK1; + PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16910CLKSOURCE_D2PCLK2; + PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1; + PeriphClkInitStruct.I2c123ClockSelection = RCC_I2C1235CLKSOURCE_D2PCLK1; + PeriphClkInitStruct.I2c4ClockSelection = RCC_I2C4CLKSOURCE_D3PCLK1; + PeriphClkInitStruct.Spi123ClockSelection = RCC_SPI123CLKSOURCE_PLL; + PeriphClkInitStruct.Spi45ClockSelection = RCC_SPI45CLKSOURCE_D2PCLK1; + PeriphClkInitStruct.Spi6ClockSelection = RCC_SPI6CLKSOURCE_D3PCLK1; + + + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) + { + Error_Handler(); + } +} + +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/variant_WeActMiniH723VGTX.h b/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/variant_WeActMiniH723VGTX.h new file mode 100644 index 0000000000..8b245cb6fa --- /dev/null +++ b/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/variant_WeActMiniH723VGTX.h @@ -0,0 +1,263 @@ +/* + ******************************************************************************* + * Copyright (c) 2020, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#pragma once + +/*---------------------------------------------------------------------------- + * STM32 pins number + *----------------------------------------------------------------------------*/ +#define PA0 PIN_A0 +#define PA1 PIN_A1 +#define PA2 PIN_A2 +#define PA3 PIN_A3 +#define PA4 PIN_A4 +#define PA5 PIN_A5 +#define PA6 PIN_A6 +#define PA7 PIN_A7 +#define PA8 8 +#define PA9 9 +#define PA10 10 +#define PA11 11 +#define PA12 12 +#define PA13 13 +#define PA14 14 +#define PA15 15 +#define PB0 PIN_A8 +#define PB1 PIN_A9 +#define PB2 18 +#define PB3 19 +#define PB4 20 +#define PB5 21 +#define PB6 22 +#define PB7 23 +#define PB8 24 +#define PB9 25 +#define PB10 26 +#define PB11 27 +#define PB12 28 +#define PB13 29 +#define PB14 30 +#define PB15 31 +#define PC0 PIN_A10 +#define PC1 PIN_A11 +#define PC4 PIN_A12 +#define PC5 PIN_A13 +#define PC6 36 +#define PC7 37 +#define PC8 38 +#define PC9 39 +#define PC10 40 +#define PC11 41 +#define PC12 42 +#define PC13 43 +#define PC14 44 +#define PC15 45 +#define PD0 46 +#define PD1 47 +#define PD2 48 +#define PD3 49 +#define PD4 50 +#define PD5 51 +#define PD6 52 +#define PD7 53 +#define PD8 54 +#define PD9 55 +#define PD10 56 +#define PD11 57 +#define PD12 58 +#define PD13 59 +#define PD14 60 +#define PD15 61 +#define PE0 62 +#define PE1 63 +#define PE2 64 +#define PE3 65 +#define PE4 66 +#define PE5 67 +#define PE6 68 +#define PE7 69 +#define PE8 70 +#define PE9 71 +#define PE10 72 +#define PE11 73 +#define PE12 74 +#define PE13 75 +#define PE14 76 +#define PE15 77 +#define PH0 78 +#define PH1 79 +#define PC2_C PIN_A14 +#define PC3_C PIN_A15 + +// Alternate pins number +#define PA0_ALT1 (PA0 | ALT1) +#define PA1_ALT1 (PA1 | ALT1) +#define PA1_ALT2 (PA1 | ALT2) +#define PA2_ALT1 (PA2 | ALT1) +#define PA2_ALT2 (PA2 | ALT2) +#define PA3_ALT1 (PA3 | ALT1) +#define PA3_ALT2 (PA3 | ALT2) +#define PA4_ALT1 (PA4 | ALT1) +#define PA4_ALT2 (PA4 | ALT2) +#define PA5_ALT1 (PA5 | ALT1) +#define PA6_ALT1 (PA6 | ALT1) +#define PA7_ALT1 (PA7 | ALT1) +#define PA7_ALT2 (PA7 | ALT2) +#define PA7_ALT3 (PA7 | ALT3) +#define PA8_ALT1 (PA8 | ALT1) +#define PA9_ALT1 (PA9 | ALT1) +#define PA10_ALT1 (PA10 | ALT1) +#define PA11_ALT1 (PA11 | ALT1) +#define PA12_ALT1 (PA12 | ALT1) +#define PA15_ALT1 (PA15 | ALT1) +#define PA15_ALT2 (PA15 | ALT2) +#define PB0_ALT1 (PB0 | ALT1) +#define PB0_ALT2 (PB0 | ALT2) +#define PB1_ALT1 (PB1 | ALT1) +#define PB1_ALT2 (PB1 | ALT2) +#define PB3_ALT1 (PB3 | ALT1) +#define PB3_ALT2 (PB3 | ALT2) +#define PB4_ALT1 (PB4 | ALT1) +#define PB4_ALT2 (PB4 | ALT2) +#define PB5_ALT1 (PB5 | ALT1) +#define PB5_ALT2 (PB5 | ALT2) +#define PB6_ALT1 (PB6 | ALT1) +#define PB6_ALT2 (PB6 | ALT2) +#define PB7_ALT1 (PB7 | ALT1) +#define PB8_ALT1 (PB8 | ALT1) +#define PB9_ALT1 (PB9 | ALT1) +#define PB14_ALT1 (PB14 | ALT1) +#define PB14_ALT2 (PB14 | ALT2) +#define PB15_ALT1 (PB15 | ALT1) +#define PB15_ALT2 (PB15 | ALT2) +#define PC0_ALT1 (PC0 | ALT1) +#define PC0_ALT2 (PC0 | ALT2) +#define PC1_ALT1 (PC1 | ALT1) +#define PC1_ALT2 (PC1 | ALT2) +#define PC4_ALT1 (PC4 | ALT1) +#define PC5_ALT1 (PC5 | ALT1) +#define PC6_ALT1 (PC6 | ALT1) +#define PC7_ALT1 (PC7 | ALT1) +#define PC8_ALT1 (PC8 | ALT1) +#define PC9_ALT1 (PC9 | ALT1) +#define PC10_ALT1 (PC10 | ALT1) +#define PC11_ALT1 (PC11 | ALT1) + +#define NUM_DIGITAL_PINS 82 +#define NUM_DUALPAD_PINS 2 +#define NUM_ANALOG_INPUTS 16 + +// On-board LED pin number +#ifndef LED_BUILTIN + #define LED_BUILTIN PE3 +#endif + +// On-board user button +#ifndef USER_BTN + #define USER_BTN PNUM_NOT_DEFINED +#endif + +// SPI definitions +#ifndef PIN_SPI_SS + #define PIN_SPI_SS PA4 +#endif +#ifndef PIN_SPI_SS1 + #define PIN_SPI_SS1 PA15 +#endif +#ifndef PIN_SPI_SS2 + #define PIN_SPI_SS2 PNUM_NOT_DEFINED +#endif +#ifndef PIN_SPI_SS3 + #define PIN_SPI_SS3 PNUM_NOT_DEFINED +#endif +#ifndef PIN_SPI_MOSI + #define PIN_SPI_MOSI PA7 +#endif +#ifndef PIN_SPI_MISO + #define PIN_SPI_MISO PA6 +#endif +#ifndef PIN_SPI_SCK + #define PIN_SPI_SCK PA5 +#endif + +// I2C definitions +#ifndef PIN_WIRE_SDA + #define PIN_WIRE_SDA PB7 +#endif +#ifndef PIN_WIRE_SCL + #define PIN_WIRE_SCL PB6 +#endif + +// Timer Definitions +// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin +#ifndef TIMER_TONE + #define TIMER_TONE TIM6 +#endif +#ifndef TIMER_SERVO + #define TIMER_SERVO TIM7 +#endif + +// UART Definitions +#ifndef SERIAL_UART_INSTANCE + #define SERIAL_UART_INSTANCE 101 +#endif + +// Default pin used for generic 'Serial' instance +// Mandatory for Firmata +#ifndef PIN_SERIAL_RX + #define PIN_SERIAL_RX PA10 +#endif +#ifndef PIN_SERIAL_TX + #define PIN_SERIAL_TX PA9 +#endif + +// Extra HAL modules +#if !defined(HAL_DAC_MODULE_DISABLED) + #define HAL_DAC_MODULE_ENABLED +#endif +#if !defined(HAL_ETH_MODULE_DISABLED) + #define HAL_ETH_MODULE_ENABLED +#endif +#if !defined(HAL_OSPI_MODULE_DISABLED) + #define HAL_OSPI_MODULE_ENABLED +#endif +#if !defined(HAL_SD_MODULE_DISABLED) + #define HAL_SD_MODULE_ENABLED +#endif + +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus + // These serial port names are intended to allow libraries and architecture-neutral + // sketches to automatically default to the correct port name for a particular type + // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, + // the first hardware serial port whose RX/TX pins are not dedicated to another use. + // + // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor + // + // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial + // + // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library + // + // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. + // + // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX + // pins are NOT connected to anything by default. + #ifndef SERIAL_PORT_MONITOR + #define SERIAL_PORT_MONITOR Serial + #endif + #ifndef SERIAL_PORT_HARDWARE + #define SERIAL_PORT_HARDWARE Serial + #endif +#endif From 0eb950647bf43eff9df54c741cc8b3d2ddd88f1b Mon Sep 17 00:00:00 2001 From: Shuncey Balba Date: Wed, 19 Nov 2025 17:40:15 +0700 Subject: [PATCH 2/8] Add on-board button --- .../variant_WeActMiniH723VGTX.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/variant_WeActMiniH723VGTX.h b/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/variant_WeActMiniH723VGTX.h index 8b245cb6fa..0033405493 100644 --- a/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/variant_WeActMiniH723VGTX.h +++ b/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/variant_WeActMiniH723VGTX.h @@ -163,7 +163,7 @@ // On-board user button #ifndef USER_BTN - #define USER_BTN PNUM_NOT_DEFINED + #define USER_BTN PC13 #endif // SPI definitions From ef6dd43c61861fe8f963014a907e5ba8d66280ba Mon Sep 17 00:00:00 2001 From: Shuncey Balba Date: Thu, 20 Nov 2025 09:39:45 +0700 Subject: [PATCH 3/8] Update boards.txt order --- boards.txt | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/boards.txt b/boards.txt index c7f6864b74..a7014e3a95 100644 --- a/boards.txt +++ b/boards.txt @@ -9500,6 +9500,16 @@ GenH7.menu.pnum.DevEBoxH750VBTX.build.variant_h=variant_DevEBoxH7xx.h GenH7.menu.pnum.DevEBoxH750VBTX.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS GenH7.menu.pnum.DevEBoxH750VBTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32H7xx/STM32H750.svd +# WeAct Mini H723VGTX +GenH7.menu.pnum.WeActMiniH723VGTX=WeAct MiniSTM32H723VGTX +GenH7.menu.pnum.WeActMiniH723VGTX.upload.maximum_size=1048576 +GenH7.menu.pnum.WeActMiniH723VGTX.upload.maximum_data_size=577536 +GenH7.menu.pnum.WeActMiniH723VGTX.build.board=WeActMiniH723VGTX +GenH7.menu.pnum.WeActMiniH723VGTX.build.product_line=STM32H723xx +GenH7.menu.pnum.WeActMiniH750VBTX.build.variant_h=variant_WeActMiniH7xx.h +GenH7.menu.pnum.WeActMiniH723VGTX.build.variant=STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T) +GenH7.menu.pnum.WeActMiniH723VGTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32H7xx/STM32H723.svd + # WeAct MiniSTM32H743VITX GenH7.menu.pnum.WeActMiniH743VITX=WeAct MiniSTM32H743VITX GenH7.menu.pnum.WeActMiniH743VITX.upload.maximum_size=2097152 @@ -9522,16 +9532,6 @@ GenH7.menu.pnum.WeActMiniH750VBTX.build.variant_h=variant_WeActMiniH7xx.h GenH7.menu.pnum.WeActMiniH750VBTX.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS GenH7.menu.pnum.WeActMiniH750VBTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32H7xx/STM32H750.svd -# WeAct Mini H723VGTX -GenH7.menu.pnum.WeActMiniH723VGTX=WeAct MiniSTM32H723VGTX -GenH7.menu.pnum.WeActMiniH723VGTX.upload.maximum_size=1048576 -GenH7.menu.pnum.WeActMiniH723VGTX.upload.maximum_data_size=577536 -GenH7.menu.pnum.WeActMiniH723VGTX.build.board=WeActMiniH723VGTX -GenH7.menu.pnum.WeActMiniH723VGTX.build.product_line=STM32H723xx -GenH7.menu.pnum.WeActMiniH750VBTX.build.variant_h=variant_WeActMiniH7xx.h -GenH7.menu.pnum.WeActMiniH723VGTX.build.variant=STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T) -GenH7.menu.pnum.WeActMiniH723VGTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32H7xx/STM32H723.svd - # Generic H723VEHx GenH7.menu.pnum.GENERIC_H723VEHX=Generic H723VEHx GenH7.menu.pnum.GENERIC_H723VEHX.upload.maximum_size=524288 From fbc95721406b7939e9077654617d0369eec70ef6 Mon Sep 17 00:00:00 2001 From: Shuncey Balba Date: Thu, 20 Nov 2025 10:15:45 +0700 Subject: [PATCH 4/8] Run astyle to fix errors in github actions --- .../variant_WeActMiniH723VGTX.cpp | 31 +++++++++---------- 1 file changed, 14 insertions(+), 17 deletions(-) diff --git a/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/variant_WeActMiniH723VGTX.cpp b/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/variant_WeActMiniH723VGTX.cpp index a4dd3ec9e6..04db94b19a 100644 --- a/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/variant_WeActMiniH723VGTX.cpp +++ b/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/variant_WeActMiniH723VGTX.cpp @@ -10,7 +10,7 @@ * ******************************************************************************* */ -#if defined(ARDUINO_WeActMiniH723VGTX) +#if defined(ARDUINO_WeActMiniH723VGTX) #include "pins_arduino.h" // Digital PinName array @@ -133,7 +133,7 @@ WEAK void SystemClock_Config(void) */ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0); - while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {} + while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {} /** Configure LSE Drive Capability */ @@ -143,7 +143,7 @@ WEAK void SystemClock_Config(void) /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE|RCC_OSCILLATORTYPE_LSE; + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_LSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.LSEState = RCC_LSE_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; @@ -156,16 +156,15 @@ WEAK void SystemClock_Config(void) RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2; RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE; RCC_OscInitStruct.PLL.PLLFRACN = 0; - if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - { + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { Error_Handler(); } /** Initializes the CPU, AHB and APB buses clocks */ - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2 - |RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1; + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 + | RCC_CLOCKTYPE_D3PCLK1 | RCC_CLOCKTYPE_D1PCLK1; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV1; @@ -174,17 +173,16 @@ WEAK void SystemClock_Config(void) RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2; RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2; - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) - { + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) { Error_Handler(); } PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB | RCC_PERIPHCLK_OSPI - | RCC_PERIPHCLK_SDMMC | RCC_PERIPHCLK_ADC - | RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_USART16 - | RCC_PERIPHCLK_USART234578 | RCC_PERIPHCLK_I2C123 - | RCC_PERIPHCLK_I2C4 | RCC_PERIPHCLK_SPI123 - | RCC_PERIPHCLK_SPI45 | RCC_PERIPHCLK_SPI6; + | RCC_PERIPHCLK_SDMMC | RCC_PERIPHCLK_ADC + | RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_USART16 + | RCC_PERIPHCLK_USART234578 | RCC_PERIPHCLK_I2C123 + | RCC_PERIPHCLK_I2C4 | RCC_PERIPHCLK_SPI123 + | RCC_PERIPHCLK_SPI45 | RCC_PERIPHCLK_SPI6; PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL; PeriphClkInitStruct.OspiClockSelection = RCC_OSPICLKSOURCE_D1HCLK; PeriphClkInitStruct.SdmmcClockSelection = RCC_SDMMCCLKSOURCE_PLL; @@ -199,8 +197,7 @@ WEAK void SystemClock_Config(void) PeriphClkInitStruct.Spi6ClockSelection = RCC_SPI6CLKSOURCE_D3PCLK1; - if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) - { + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { Error_Handler(); } } From 62346f2358f7385dc203db5194432998f11d3e83 Mon Sep 17 00:00:00 2001 From: Shuncey Balba Date: Thu, 20 Nov 2025 10:25:13 +0700 Subject: [PATCH 5/8] Revert ldscript, and fix maximum_data_size --- boards.txt | 2 +- .../ldscript.ld | 30 +++++++++++-------- 2 files changed, 18 insertions(+), 14 deletions(-) diff --git a/boards.txt b/boards.txt index a7014e3a95..d80f727533 100644 --- a/boards.txt +++ b/boards.txt @@ -9503,7 +9503,7 @@ GenH7.menu.pnum.DevEBoxH750VBTX.debug.svd_file={runtime.tools.STM32_SVD.path}/sv # WeAct Mini H723VGTX GenH7.menu.pnum.WeActMiniH723VGTX=WeAct MiniSTM32H723VGTX GenH7.menu.pnum.WeActMiniH723VGTX.upload.maximum_size=1048576 -GenH7.menu.pnum.WeActMiniH723VGTX.upload.maximum_data_size=577536 +GenH7.menu.pnum.WeActMiniH723VGTX.upload.maximum_data_size=327680 GenH7.menu.pnum.WeActMiniH723VGTX.build.board=WeActMiniH723VGTX GenH7.menu.pnum.WeActMiniH723VGTX.build.product_line=STM32H723xx GenH7.menu.pnum.WeActMiniH750VBTX.build.variant_h=variant_WeActMiniH7xx.h diff --git a/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/ldscript.ld b/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/ldscript.ld index efdd501eb8..f580ff2a2e 100644 --- a/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/ldscript.ld +++ b/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/ldscript.ld @@ -6,7 +6,7 @@ ** Author : STM32CubeIDE ** ** Abstract : Linker script for STM32H7 series -** 512Kbytes FLASH and 560Kbytes RAM +** 1024Kbytes FLASH and 560Kbytes RAM ** ** Set heap size, stack size and stack location according ** to application requirements. @@ -21,7 +21,7 @@ ***************************************************************************** ** @attention ** -** Copyright (c) 2022 STMicroelectronics. +** Copyright (c) 2025 STMicroelectronics. ** All rights reserved. ** ** This software is licensed under terms that can be found in the LICENSE file @@ -37,18 +37,18 @@ ENTRY(Reset_Handler) /* Highest address of the user mode stack */ _estack = ORIGIN(RAM_D1) + LENGTH(RAM_D1); /* end of RAM */ /* Generate a link error if heap and stack don't fit into RAM */ -_Min_Heap_Size = 0x200 ; /* required amount of heap */ -_Min_Stack_Size = 0x400 ; /* required amount of stack */ +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ /* Specify the memory areas */ MEMORY { ITCMRAM (xrw) : ORIGIN = 0x00000000, LENGTH = 64K DTCMRAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K - FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET - RAM_D1 (xrw) : ORIGIN = 0x24000000, LENGTH = 320K + FLASH (rx) : ORIGIN = 0x08000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET + RAM_D1 (xrw) : ORIGIN = 0x24000000, LENGTH = LD_MAX_DATA_SIZE RAM_D2 (xrw) : ORIGIN = 0x30000000, LENGTH = 32K - RAM_D3 (xrw) : ORIGIN = 0x38000000, LENGTH = 16K + RAM_D3 (xrw) : ORIGIN = 0x38000000, LENGTH = 16K } /* Define output sections */ @@ -88,21 +88,25 @@ SECTIONS . = ALIGN(4); } >FLASH - .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH - .ARM : { + .ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } >FLASH + .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { __exidx_start = .; *(.ARM.exidx*) __exidx_end = .; } >FLASH - .preinit_array : + .preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ { PROVIDE_HIDDEN (__preinit_array_start = .); KEEP (*(.preinit_array*)) PROVIDE_HIDDEN (__preinit_array_end = .); } >FLASH - .init_array : + .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ { PROVIDE_HIDDEN (__init_array_start = .); KEEP (*(SORT(.init_array.*))) @@ -110,7 +114,7 @@ SECTIONS PROVIDE_HIDDEN (__init_array_end = .); } >FLASH - .fini_array : + .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ { PROVIDE_HIDDEN (__fini_array_start = .); KEEP (*(SORT(.fini_array.*))) @@ -171,4 +175,4 @@ SECTIONS } .ARM.attributes 0 : { *(.ARM.attributes) } -} \ No newline at end of file +} From 829f6484d6ec7427eed63956addfbe35c2630085 Mon Sep 17 00:00:00 2001 From: Shuncey Balba Date: Thu, 20 Nov 2025 11:03:15 +0700 Subject: [PATCH 6/8] Follow other weact boards' pin ordering --- .../variant_WeActMiniH723VGTX.h | 139 +++++++++--------- 1 file changed, 71 insertions(+), 68 deletions(-) diff --git a/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/variant_WeActMiniH723VGTX.h b/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/variant_WeActMiniH723VGTX.h index 0033405493..37e0e0c6d4 100644 --- a/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/variant_WeActMiniH723VGTX.h +++ b/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/variant_WeActMiniH723VGTX.h @@ -15,6 +15,60 @@ /*---------------------------------------------------------------------------- * STM32 pins number *----------------------------------------------------------------------------*/ +/* P1 connector - Left side */ +#define PE1 0 +#define PE0 1 +#define PB9 2 +#define PB8 3 +#define PB7 4 +#define PB6 5 +#define PB5 6 +#define PB4 7 +#define PB3 8 +#define PD7 9 +#define PD6 10 +#define PD5 11 +#define PD4 12 +#define PD3 13 +#define PD2 14 +#define PD1 15 +#define PD0 16 +#define PC12 17 +#define PC11 18 +#define PC10 19 +#define PA15 20 +#define PA12 21 +#define PA11 22 +#define PA10 23 +#define PA9 24 +#define PA8 25 +#define PC9 26 +#define PC8 27 +#define PC7 28 +#define PC6 29 +#define PD15 30 +#define PD14 31 +#define PD13 32 +#define PD12 33 +#define PD11 34 +#define PD10 35 +#define PD9 36 +#define PD8 37 +#define PB15 38 +#define PB14 39 +#define PB13 40 +#define PB12 41 +/* P2 connector - Right side */ +#define PE2 42 +#define PE3 43 +#define PE4 44 +#define PE5 45 +#define PE6 46 +#define PC13 47 +#define PC0 PIN_A10 +#define PC1 PIN_A11 +#define PC2_C PIN_A14 +#define PC3_C PIN_A15 #define PA0 PIN_A0 #define PA1 PIN_A1 #define PA2 PIN_A2 @@ -23,80 +77,29 @@ #define PA5 PIN_A5 #define PA6 PIN_A6 #define PA7 PIN_A7 -#define PA8 8 -#define PA9 9 -#define PA10 10 -#define PA11 11 -#define PA12 12 -#define PA13 13 -#define PA14 14 -#define PA15 15 -#define PB0 PIN_A8 -#define PB1 PIN_A9 -#define PB2 18 -#define PB3 19 -#define PB4 20 -#define PB5 21 -#define PB6 22 -#define PB7 23 -#define PB8 24 -#define PB9 25 -#define PB10 26 -#define PB11 27 -#define PB12 28 -#define PB13 29 -#define PB14 30 -#define PB15 31 -#define PC0 PIN_A10 -#define PC1 PIN_A11 #define PC4 PIN_A12 #define PC5 PIN_A13 -#define PC6 36 -#define PC7 37 -#define PC8 38 -#define PC9 39 -#define PC10 40 -#define PC11 41 -#define PC12 42 -#define PC13 43 +#define PB0 PIN_A8 +#define PB1 PIN_A9 +#define PB2 64 +#define PE7 65 +#define PE8 66 +#define PE9 67 +#define PE10 68 +#define PE11 69 +#define PE12 70 +#define PE13 71 +#define PE14 72 +#define PE15 73 +#define PB10 74 +#define PB11 75 +// Other +#define PA13 13 +#define PA14 14 #define PC14 44 #define PC15 45 -#define PD0 46 -#define PD1 47 -#define PD2 48 -#define PD3 49 -#define PD4 50 -#define PD5 51 -#define PD6 52 -#define PD7 53 -#define PD8 54 -#define PD9 55 -#define PD10 56 -#define PD11 57 -#define PD12 58 -#define PD13 59 -#define PD14 60 -#define PD15 61 -#define PE0 62 -#define PE1 63 -#define PE2 64 -#define PE3 65 -#define PE4 66 -#define PE5 67 -#define PE6 68 -#define PE7 69 -#define PE8 70 -#define PE9 71 -#define PE10 72 -#define PE11 73 -#define PE12 74 -#define PE13 75 -#define PE14 76 -#define PE15 77 #define PH0 78 #define PH1 79 -#define PC2_C PIN_A14 -#define PC3_C PIN_A15 // Alternate pins number #define PA0_ALT1 (PA0 | ALT1) From d8bfd2ef9fee76700b82a59b61436d0ed1d1ff76 Mon Sep 17 00:00:00 2001 From: Shuncey Balba Date: Thu, 20 Nov 2025 11:10:08 +0700 Subject: [PATCH 7/8] Add to readme --- README.md | 1 + 1 file changed, 1 insertion(+) diff --git a/README.md b/README.md index 323704d3f7..8b27bc2d26 100644 --- a/README.md +++ b/README.md @@ -597,6 +597,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | Status | Device(s) | Name | Release | Notes | | :----: | :-------: | ---- | :-----: | :---- | | :yellow_heart: | STM32H723VE
STM32H723VG | Generic Board | **2.12.0** | | +| :yellow_heart: | STM32H723VGT | [WeActStudio MiniSTM32H723VGT6](https://github.com/WeActStudio/WeActStudio.MiniSTM32H723) | **2.12.0** | | | :green_heart: | STM32H723ZE
STM32H723ZG | Generic Board | *2.4.0* | | | :yellow_heart: | STM32H730VB
STM32H733VGT | Generic Board | **2.12.0** | | | :green_heart: | STM32H730ZBT | Generic Board | *2.4.0* | | From 85be6a3aa33ade4cfd5ead83efbd0dffbf9b64dc Mon Sep 17 00:00:00 2001 From: Shuncey Balba Date: Fri, 21 Nov 2025 09:10:52 +0700 Subject: [PATCH 8/8] update pin definitions --- .../variant_WeActMiniH723VGTX.cpp | 196 +++++++++--------- .../variant_WeActMiniH723VGTX.h | 40 ++-- 2 files changed, 118 insertions(+), 118 deletions(-) diff --git a/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/variant_WeActMiniH723VGTX.cpp b/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/variant_WeActMiniH723VGTX.cpp index 04db94b19a..3ef1a0bba0 100644 --- a/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/variant_WeActMiniH723VGTX.cpp +++ b/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/variant_WeActMiniH723VGTX.cpp @@ -15,108 +15,108 @@ // Digital PinName array const PinName digitalPin[] = { - PA_0, // D0/A0 - PA_1, // D1/A1 - PA_2, // D2/A2 - PA_3, // D3/A3 - PA_4, // D4/A4 - PA_5, // D5/A5 - PA_6, // D6/A6 - PA_7, // D7/A7 - PA_8, // D8 - PA_9, // D9 - PA_10, // D10 - PA_11, // D11 - PA_12, // D12 - PA_13, // D13 - PA_14, // D14 - PA_15, // D15 - PB_0, // D16/A8 - PB_1, // D17/A9 - PB_2, // D18 - PB_3, // D19 - PB_4, // D20 - PB_5, // D21 - PB_6, // D22 - PB_7, // D23 - PB_8, // D24 - PB_9, // D25 - PB_10, // D26 - PB_11, // D27 - PB_12, // D28 - PB_13, // D29 - PB_14, // D30 - PB_15, // D31 - PC_0, // D32/A10 - PC_1, // D33/A11 - PC_4, // D34/A12 - PC_5, // D35/A13 - PC_6, // D36 - PC_7, // D37 - PC_8, // D38 - PC_9, // D39 - PC_10, // D40 - PC_11, // D41 - PC_12, // D42 - PC_13, // D43 - PC_14, // D44 - PC_15, // D45 - PD_0, // D46 - PD_1, // D47 - PD_2, // D48 - PD_3, // D49 - PD_4, // D50 - PD_5, // D51 - PD_6, // D52 - PD_7, // D53 - PD_8, // D54 - PD_9, // D55 - PD_10, // D56 - PD_11, // D57 - PD_12, // D58 - PD_13, // D59 - PD_14, // D60 - PD_15, // D61 - PE_0, // D62 - PE_1, // D63 - PE_2, // D64 - PE_3, // D65 - PE_4, // D66 - PE_5, // D67 - PE_6, // D68 - PE_7, // D69 - PE_8, // D70 - PE_9, // D71 - PE_10, // D72 - PE_11, // D73 - PE_12, // D74 - PE_13, // D75 - PE_14, // D76 - PE_15, // D77 - PH_0, // D78 - PH_1, // D79 - PC_2_C, // D80/A14 - PC_3_C // D81/A15 + PE_1, // D0 + PE_0, // D1 + PB_9, // D2 + PB_8, // D3 + PB_7, // D4 + PB_6, // D5 + PB_5, // D6 + PB_4, // D7 + PB_3, // D8 + PD_7, // D9 + PD_6, // D10 + PD_5, // D11 + PD_4, // D12 + PD_3, // D13 + PD_2, // D14 + PD_1, // D15 + PD_0, // D16 + PC_12, // D17 + PC_11, // D18 + PC_10, // D19 + PA_15, // D20 + PA_12, // D21 + PA_11, // D22 + PA_10, // D23 + PA_9, // D24 + PA_8, // D25 + PC_9, // D26 + PC_8, // D27 + PC_7, // D28 + PC_6, // D29 + PD_15, // D30 + PD_14, // D31 + PD_13, // D32 + PD_12, // D33 + PD_11, // D34 + PD_10, // D35 + PD_9, // D36 + PD_8, // D37 + PB_15, // D38 + PB_14, // D39 + PB_13, // D40 + PB_12, // D41 + PE_2, // D42 + PE_3, // D43 + PE_4, // D44 + PE_5, // D45 + PE_6, // D46 + PC_13, // D47 + PC_0, // D48/A0 + PC_1, // D49/A1 + PC_2_C, // D50/A2 + PC_3_C, // D51/A3 + PA_0, // D52/A4 + PA_1, // D53/A5 + PA_2, // D54/A6 + PA_3, // D55/A7 + PA_4, // D56/A8 + PA_5, // D57/A9 + PA_6, // D58/A10 + PA_7, // D59/A11 + PC_4, // D60/A12 + PC_5, // D61/A13 + PB_0, // D62/A14 + PB_1, // D63/A15 + PB_2, // D64 + PE_7, // D65 + PE_8, // D66 + PE_9, // D67 + PE_10, // D68 + PE_11, // D69 + PE_12, // D70 + PE_13, // D71 + PE_14, // D72 + PE_15, // D73 + PB_10, // D74 + PB_11, // D75 + PA_13, // D76 + PA_14, // D77 + PC_14, // D78 + PC_15, // D79 + PH_0, // D80 + PH_1 // D81 }; // Analog (Ax) pin number array const uint32_t analogInputPin[] = { - 0, // A0, PA0 - 1, // A1, PA1 - 2, // A2, PA2 - 3, // A3, PA3 - 4, // A4, PA4 - 5, // A5, PA5 - 6, // A6, PA6 - 7, // A7, PA7 - 16, // A8, PB0 - 17, // A9, PB1 - 32, // A10, PC0 - 33, // A11, PC1 - 34, // A12, PC4 - 35, // A13, PC5 - 80, // A14, PC2_C - 81 // A15, PC3_C + 48, // A0, PC0 + 49, // A1, PC1 + 50, // A2, PC2_C + 51, // A3, PC3_C + 52, // A4, PA0 + 53, // A5, PA1 + 54, // A6, PA2 + 55, // A7, PA3 + 56, // A8, PA4 + 57, // A9, PA5 + 58, // A10, PA6 + 59, // A11, PA7 + 60, // A12, PC4 + 61, // A13, PC5 + 62, // A14, PB0 + 63 // A15, PB1 }; WEAK void SystemClock_Config(void) diff --git a/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/variant_WeActMiniH723VGTX.h b/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/variant_WeActMiniH723VGTX.h index 37e0e0c6d4..d91f9b4e68 100644 --- a/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/variant_WeActMiniH723VGTX.h +++ b/variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)/variant_WeActMiniH723VGTX.h @@ -65,22 +65,22 @@ #define PE5 45 #define PE6 46 #define PC13 47 -#define PC0 PIN_A10 -#define PC1 PIN_A11 -#define PC2_C PIN_A14 -#define PC3_C PIN_A15 -#define PA0 PIN_A0 -#define PA1 PIN_A1 -#define PA2 PIN_A2 -#define PA3 PIN_A3 -#define PA4 PIN_A4 -#define PA5 PIN_A5 -#define PA6 PIN_A6 -#define PA7 PIN_A7 +#define PC0 PIN_A0 +#define PC1 PIN_A1 +#define PC2_C PIN_A2 +#define PC3_C PIN_A3 +#define PA0 PIN_A4 +#define PA1 PIN_A5 +#define PA2 PIN_A6 +#define PA3 PIN_A7 +#define PA4 PIN_A8 +#define PA5 PIN_A9 +#define PA6 PIN_A10 +#define PA7 PIN_A11 #define PC4 PIN_A12 #define PC5 PIN_A13 -#define PB0 PIN_A8 -#define PB1 PIN_A9 +#define PB0 PIN_A14 +#define PB1 PIN_A15 #define PB2 64 #define PE7 65 #define PE8 66 @@ -94,12 +94,12 @@ #define PB10 74 #define PB11 75 // Other -#define PA13 13 -#define PA14 14 -#define PC14 44 -#define PC15 45 -#define PH0 78 -#define PH1 79 +#define PA13 76 +#define PA14 77 +#define PC14 78 +#define PC15 79 +#define PH0 80 +#define PH1 81 // Alternate pins number #define PA0_ALT1 (PA0 | ALT1)