diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h b/system/Drivers/STM32WBxx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h
index 51ba1ee6e6..dc2f074df7 100644
--- a/system/Drivers/STM32WBxx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h
+++ b/system/Drivers/STM32WBxx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h
@@ -361,7 +361,10 @@ extern "C" {
#if defined(STM32L4R5xx) || defined(STM32L4R9xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || \
defined(STM32L4S7xx) || defined(STM32L4S9xx)
#define DMA_REQUEST_DCMI_PSSI DMA_REQUEST_DCMI
-#endif
+#elif defined(STM32L4P5xx) || defined(STM32L4Q5xx)
+#define DMA_REQUEST_PSSI DMA_REQUEST_DCMI_PSSI
+#define LL_DMAMUX_REQ_PSSI LL_DMAMUX_REQ_DCMI_PSSI
+#endif /* STM32L4R5xx || STM32L4R9xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */
#endif /* STM32L4 */
@@ -2149,6 +2152,13 @@ extern "C" {
#define UFB_MODE_BitNumber UFB_MODE_BIT_NUMBER
#define CMP_PD_BitNumber CMP_PD_BIT_NUMBER
+#if defined(STM32H7RS) || defined(STM32N6)
+#define FMC_SWAPBMAP_DISABLE FMC_SWAPBANK_MODE0
+#define FMC_SWAPBMAP_SDRAM_SRAM FMC_SWAPBANK_MODE1
+#define HAL_SetFMCMemorySwappingConfig HAL_FMC_SetBankSwapConfig
+#define HAL_GetFMCMemorySwappingConfig HAL_FMC_GetBankSwapConfig
+#endif /* STM32H7RS || STM32N6 */
+
/**
* @}
*/
diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_cryp.h b/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_cryp.h
index 07b0ec6a9d..88afed3334 100644
--- a/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_cryp.h
+++ b/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_cryp.h
@@ -32,7 +32,6 @@ extern "C" {
*/
-
/** @defgroup CRYP CRYP
* @brief CRYP HAL module driver.
* @{
diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_cryp_ex.h b/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_cryp_ex.h
index 0673d7c0c6..29cce0f552 100644
--- a/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_cryp_ex.h
+++ b/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_cryp_ex.h
@@ -32,7 +32,6 @@ extern "C" {
*/
-
/** @defgroup CRYPEx CRYPEx
* @brief CRYP Extension HAL module driver.
* @{
@@ -93,8 +92,10 @@ extern "C" {
/** @addtogroup CRYPEx_Exported_Functions_Group1
* @{
*/
-HAL_StatusTypeDef HAL_CRYPEx_AESGCM_GenerateAuthTAG(CRYP_HandleTypeDef *hcryp, uint32_t *AuthTag, uint32_t Timeout);
-HAL_StatusTypeDef HAL_CRYPEx_AESCCM_GenerateAuthTAG(CRYP_HandleTypeDef *hcryp, uint32_t *AuthTag, uint32_t Timeout);
+HAL_StatusTypeDef HAL_CRYPEx_AESGCM_GenerateAuthTAG(CRYP_HandleTypeDef *hcryp, const uint32_t *AuthTag,
+ uint32_t Timeout);
+HAL_StatusTypeDef HAL_CRYPEx_AESCCM_GenerateAuthTAG(CRYP_HandleTypeDef *hcryp, const uint32_t *AuthTag,
+ uint32_t Timeout);
/**
* @}
diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_dma_ex.h b/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_dma_ex.h
index e140e635b4..b39a729325 100644
--- a/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_dma_ex.h
+++ b/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_dma_ex.h
@@ -193,7 +193,7 @@ typedef struct
/* ------------------------- REQUEST -----------------------------------------*/
HAL_StatusTypeDef HAL_DMAEx_ConfigMuxRequestGenerator(DMA_HandleTypeDef *hdma,
- HAL_DMA_MuxRequestGeneratorConfigTypeDef *pRequestGeneratorConfig);
+ const HAL_DMA_MuxRequestGeneratorConfigTypeDef *pRequestGeneratorConfig);
HAL_StatusTypeDef HAL_DMAEx_EnableMuxRequestGenerator(DMA_HandleTypeDef *hdma);
HAL_StatusTypeDef HAL_DMAEx_DisableMuxRequestGenerator(DMA_HandleTypeDef *hdma);
/* -------------------------------------------------------------------------- */
diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_exti.h b/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_exti.h
index a586d2dcd1..3cf6246def 100644
--- a/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_exti.h
+++ b/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_exti.h
@@ -321,9 +321,9 @@ typedef struct
* @{
*/
/* Configuration functions ****************************************************/
-HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig);
-HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig);
-HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(EXTI_HandleTypeDef *hexti);
+HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, const EXTI_ConfigTypeDef *pExtiConfig);
+HAL_StatusTypeDef HAL_EXTI_GetConfigLine(const EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig);
+HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(const EXTI_HandleTypeDef *hexti);
HAL_StatusTypeDef HAL_EXTI_RegisterCallback(EXTI_HandleTypeDef *hexti, EXTI_CallbackIDTypeDef CallbackID, void (*pPendingCbfn)(void));
HAL_StatusTypeDef HAL_EXTI_GetHandle(EXTI_HandleTypeDef *hexti, uint32_t ExtiLine);
/**
@@ -335,10 +335,10 @@ HAL_StatusTypeDef HAL_EXTI_GetHandle(EXTI_HandleTypeDef *hexti, uint32_t ExtiLin
* @{
*/
/* IO operation functions *****************************************************/
-void HAL_EXTI_IRQHandler(EXTI_HandleTypeDef *hexti);
-uint32_t HAL_EXTI_GetPending(EXTI_HandleTypeDef *hexti, uint32_t Edge);
-void HAL_EXTI_ClearPending(EXTI_HandleTypeDef *hexti, uint32_t Edge);
-void HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef *hexti);
+void HAL_EXTI_IRQHandler(const EXTI_HandleTypeDef *hexti);
+uint32_t HAL_EXTI_GetPending(const EXTI_HandleTypeDef *hexti, uint32_t Edge);
+void HAL_EXTI_ClearPending(const EXTI_HandleTypeDef *hexti, uint32_t Edge);
+void HAL_EXTI_GenerateSWI(const EXTI_HandleTypeDef *hexti);
/**
* @}
diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_gpio.h b/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_gpio.h
index 74f461f62a..f589605abb 100644
--- a/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_gpio.h
+++ b/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_gpio.h
@@ -285,7 +285,7 @@ typedef enum
*/
/* Initialization and de-initialization functions *****************************/
-void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init);
+void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, const GPIO_InitTypeDef *GPIO_Init);
void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin);
/**
@@ -298,7 +298,7 @@ void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin);
*/
/* IO operation functions *****************************************************/
-GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin);
+GPIO_PinState HAL_GPIO_ReadPin(const GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin);
void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState);
void HAL_GPIO_WriteMultipleStatePin(GPIO_TypeDef *GPIOx, uint16_t PinReset, uint16_t PinSet);
void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin);
diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_pcd.h b/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_pcd.h
index 2f023a607f..686aaca295 100644
--- a/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_pcd.h
+++ b/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_pcd.h
@@ -366,7 +366,7 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef const *hpcd);
*/
-#define USB_WAKEUP_EXTI_LINE (0x1U << 28) /*!< USB FS EXTI Line WakeUp Interrupt */
+#define USB_WAKEUP_EXTI_LINE (0x1UL << 28) /*!< USB FS EXTI Line WakeUp Interrupt */
/**
@@ -418,8 +418,8 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef const *hpcd);
*/
/******************** Bit definition for USB_COUNTn_RX register *************/
-#define USB_CNTRX_NBLK_MSK (0x1FU << 10)
-#define USB_CNTRX_BLSIZE (0x1U << 15)
+#define USB_CNTRX_NBLK_MSK (0x1FUL << 10)
+#define USB_CNTRX_BLSIZE (0x1UL << 15)
/* SetENDPOINT */
#define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue) \
@@ -808,7 +808,7 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef const *hpcd);
\
if ((wCount) == 0U) \
{ \
- *(pdwReg) |= USB_CNTRX_BLSIZE; \
+ *(pdwReg) |= (uint16_t)USB_CNTRX_BLSIZE; \
} \
else if ((wCount) <= 62U) \
{ \
diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_pka.h b/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_pka.h
index 505d3d7973..fb477ecb02 100644
--- a/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_pka.h
+++ b/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_pka.h
@@ -541,8 +541,8 @@ void HAL_PKA_IRQHandler(PKA_HandleTypeDef *hpka);
* @{
*/
/* Peripheral State and Error functions ***************************************/
-HAL_PKA_StateTypeDef HAL_PKA_GetState(PKA_HandleTypeDef *hpka);
-uint32_t HAL_PKA_GetError(PKA_HandleTypeDef *hpka);
+HAL_PKA_StateTypeDef HAL_PKA_GetState(const PKA_HandleTypeDef *hpka);
+uint32_t HAL_PKA_GetError(const PKA_HandleTypeDef *hpka);
/**
* @}
*/
diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_tim.h b/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_tim.h
index 91288bf203..ceff87018b 100644
--- a/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_tim.h
+++ b/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_tim.h
@@ -2105,18 +2105,12 @@ mode.
#define TIM_CHANNEL_STATE_SET_ALL(__HANDLE__, __CHANNEL_STATE__)\
do {\
- (__HANDLE__)->ChannelState[0] = \
- (__CHANNEL_STATE__); \
- (__HANDLE__)->ChannelState[1] = \
- (__CHANNEL_STATE__); \
- (__HANDLE__)->ChannelState[2] = \
- (__CHANNEL_STATE__); \
- (__HANDLE__)->ChannelState[3] = \
- (__CHANNEL_STATE__); \
- (__HANDLE__)->ChannelState[4] = \
- (__CHANNEL_STATE__); \
- (__HANDLE__)->ChannelState[5] = \
- (__CHANNEL_STATE__); \
+ (__HANDLE__)->ChannelState[0] = (__CHANNEL_STATE__); \
+ (__HANDLE__)->ChannelState[1] = (__CHANNEL_STATE__); \
+ (__HANDLE__)->ChannelState[2] = (__CHANNEL_STATE__); \
+ (__HANDLE__)->ChannelState[3] = (__CHANNEL_STATE__); \
+ (__HANDLE__)->ChannelState[4] = (__CHANNEL_STATE__); \
+ (__HANDLE__)->ChannelState[5] = (__CHANNEL_STATE__); \
} while(0)
#define TIM_CHANNEL_N_STATE_GET(__HANDLE__, __CHANNEL__)\
@@ -2133,14 +2127,10 @@ mode.
#define TIM_CHANNEL_N_STATE_SET_ALL(__HANDLE__, __CHANNEL_STATE__)\
do {\
- (__HANDLE__)->ChannelNState[0] = \
- (__CHANNEL_STATE__); \
- (__HANDLE__)->ChannelNState[1] = \
- (__CHANNEL_STATE__); \
- (__HANDLE__)->ChannelNState[2] = \
- (__CHANNEL_STATE__); \
- (__HANDLE__)->ChannelNState[3] = \
- (__CHANNEL_STATE__); \
+ (__HANDLE__)->ChannelNState[0] = (__CHANNEL_STATE__); \
+ (__HANDLE__)->ChannelNState[1] = (__CHANNEL_STATE__); \
+ (__HANDLE__)->ChannelNState[2] = (__CHANNEL_STATE__); \
+ (__HANDLE__)->ChannelNState[3] = (__CHANNEL_STATE__); \
} while(0)
/**
diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_adc.h b/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_adc.h
index d9eab2bd18..090ad92303 100644
--- a/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_adc.h
+++ b/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_adc.h
@@ -435,11 +435,11 @@ extern "C" {
/* ADC internal channels related definitions */
/* Internal voltage reference VrefInt */
-#define VREFINT_CAL_ADDR ((uint16_t*) (0x1FFF75AAUL)) /* Internal voltage reference, address of parameter VREFINT: VrefInt ADC raw data acquired at temperature 30 DegC (tolerance: +-5 DegC), Vref+ = 3.6 V (tolerance: +-10 mV). */
+#define VREFINT_CAL_ADDR ((const uint16_t*) (0x1FFF75AAUL)) /* Internal voltage reference, address of parameter VREFINT: VrefInt ADC raw data acquired at temperature 30 DegC (tolerance: +-5 DegC), Vref+ = 3.6 V (tolerance: +-10 mV). */
#define VREFINT_CAL_VREF (3600UL) /* Analog voltage reference (Vref+) value with which temperature sensor has been calibrated in production (tolerance: +-10 mV) (unit: mV). */
/* Temperature sensor */
-#define TEMPSENSOR_CAL1_ADDR ((uint16_t*) (0x1FFF75A8UL)) /* Internal temperature sensor, address of parameter TS_CAL1: On STM32WB, temperature sensor ADC raw data acquired at temperature 30 DegC (tolerance: +-5 DegC), Vref+ = 3.0 V (tolerance: +-10 mV). */
-#define TEMPSENSOR_CAL2_ADDR ((uint16_t*) (0x1FFF75CAUL)) /* Internal temperature sensor, address of parameter TS_CAL2: On STM32WB, temperature sensor ADC raw data acquired at temperature 130 DegC (tolerance: +-5 DegC), Vref+ = 3.0 V (tolerance: +-10 mV). */
+#define TEMPSENSOR_CAL1_ADDR ((const uint16_t*) (0x1FFF75A8UL)) /* Internal temperature sensor, address of parameter TS_CAL1: On STM32WB, temperature sensor ADC raw data acquired at temperature 30 DegC (tolerance: +-5 DegC), Vref+ = 3.0 V (tolerance: +-10 mV). */
+#define TEMPSENSOR_CAL2_ADDR ((const uint16_t*) (0x1FFF75CAUL)) /* Internal temperature sensor, address of parameter TS_CAL2: On STM32WB, temperature sensor ADC raw data acquired at temperature 130 DegC (tolerance: +-5 DegC), Vref+ = 3.0 V (tolerance: +-10 mV). */
#define TEMPSENSOR_CAL1_TEMP (30L) /* Internal temperature sensor, temperature at which temperature sensor has been calibrated in production for data into TEMPSENSOR_CAL1_ADDR (tolerance: +-5 DegC) (unit: DegC). */
#define TEMPSENSOR_CAL2_TEMP (130L) /* Internal temperature sensor, temperature at which temperature sensor has been calibrated in production for data into TEMPSENSOR_CAL2_ADDR (tolerance: +-5 DegC) (unit: DegC). */
#define TEMPSENSOR_CAL_VREFANALOG (3000UL) /* Analog voltage reference (Vref+) voltage with which temperature sensor has been calibrated in production (+-10 mV) (unit: mV). */
diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_crs.h b/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_crs.h
index 619ab90be4..a0df5a6acb 100644
--- a/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_crs.h
+++ b/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_crs.h
@@ -39,24 +39,8 @@ extern "C" {
/* Private types -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
-
/* Private constants ---------------------------------------------------------*/
-/** @defgroup CRS_LL_Private_Constants CRS Private Constants
- * @{
- */
-
-/* Defines used for the bit position in the register and perform offsets*/
-#define CRS_POSITION_TRIM (CRS_CR_TRIM_Pos) /* bit position in CR reg */
-#define CRS_POSITION_FECAP (CRS_ISR_FECAP_Pos) /* bit position in ISR reg */
-#define CRS_POSITION_FELIM (CRS_CFGR_FELIM_Pos) /* bit position in CFGR reg */
-
-
-/**
- * @}
- */
-
/* Private macros ------------------------------------------------------------*/
-
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/** @defgroup CRS_LL_Exported_Constants CRS Exported Constants
@@ -127,8 +111,8 @@ extern "C" {
/** @defgroup CRS_LL_EC_FREQERRORDIR Frequency Error Direction
* @{
*/
-#define LL_CRS_FREQ_ERROR_DIR_UP 0x00000000U /*!< Upcounting direction, the actual frequency is above the target */
-#define LL_CRS_FREQ_ERROR_DIR_DOWN CRS_ISR_FEDIR /*!< Downcounting direction, the actual frequency is below the target */
+#define LL_CRS_FREQ_ERROR_DIR_UP 0x00000000U /*!< Upcounting direction, the actual frequency is above the target */
+#define LL_CRS_FREQ_ERROR_DIR_DOWN CRS_ISR_FEDIR /*!< Downcounting direction, the actual frequency is below the target */
/**
* @}
*/
@@ -150,15 +134,16 @@ extern "C" {
/**
* @brief Reset value of the HSI48 Calibration field
- * @note The default value is 32, which corresponds to the middle of the trimming interval.
- * The trimming step is around 67 kHz between two consecutive TRIM steps.
- * A higher TRIM value corresponds to a higher output frequency
+ * @note The default value is 32,
+ * which corresponds to the middle of the trimming interval.
+ * The trimming step is specified in the product datasheet.
+ * A higher TRIM value corresponds to a higher output frequency.
*/
-#define LL_CRS_HSI48CALIBRATION_DEFAULT 0x00000020U
+#define LL_CRS_HSI48CALIBRATION_DEFAULT 0x00000020U
/**
* @}
- */
-
+ */
+
/**
* @}
*/
@@ -198,7 +183,7 @@ extern "C" {
/**
* @brief Macro to calculate reload value to be set in CRS register according to target and sync frequencies
- * @note The RELOAD value should be selected according to the ratio between
+ * @note The RELOAD value should be selected according to the ratio between
* the target frequency and the frequency of the synchronization source after
* prescaling. It is then decreased by one in order to reach the expected
* synchronization on the zero value. The formula is the following:
@@ -292,12 +277,12 @@ __STATIC_INLINE uint32_t LL_CRS_IsEnabledAutoTrimming(void)
* @note When the AUTOTRIMEN bit is set, this field is controlled by hardware and is read-only
* @rmtoll CR TRIM LL_CRS_SetHSI48SmoothTrimming
* @param Value a number between Min_Data = 0 and Max_Data = 63
- * @note Default value can be set thanks to @ref LL_CRS_HSI48CALIBRATION_DEFAULT
+ * @note Default value can be set thanks to @ref LL_CRS_HSI48CALIBRATION_DEFAULT
* @retval None
*/
__STATIC_INLINE void LL_CRS_SetHSI48SmoothTrimming(uint32_t Value)
{
- MODIFY_REG(CRS->CR, CRS_CR_TRIM, Value << CRS_POSITION_TRIM);
+ MODIFY_REG(CRS->CR, CRS_CR_TRIM, Value << CRS_CR_TRIM_Pos);
}
/**
@@ -307,14 +292,14 @@ __STATIC_INLINE void LL_CRS_SetHSI48SmoothTrimming(uint32_t Value)
*/
__STATIC_INLINE uint32_t LL_CRS_GetHSI48SmoothTrimming(void)
{
- return (uint32_t)(READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_POSITION_TRIM);
+ return (uint32_t)(READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_CR_TRIM_Pos);
}
/**
* @brief Set counter reload value
* @rmtoll CFGR RELOAD LL_CRS_SetReloadCounter
* @param Value a number between Min_Data = 0 and Max_Data = 0xFFFF
- * @note Default value can be set thanks to @ref LL_CRS_RELOADVALUE_DEFAULT
+ * @note Default value can be set thanks to @ref LL_CRS_RELOADVALUE_DEFAULT
* Otherwise it can be calculated in using macro @ref __LL_CRS_CALC_CALCULATE_RELOADVALUE (_FTARGET_, _FSYNC_)
* @retval None
*/
@@ -337,12 +322,12 @@ __STATIC_INLINE uint32_t LL_CRS_GetReloadCounter(void)
* @brief Set frequency error limit
* @rmtoll CFGR FELIM LL_CRS_SetFreqErrorLimit
* @param Value a number between Min_Data = 0 and Max_Data = 255
- * @note Default value can be set thanks to @ref LL_CRS_ERRORLIMIT_DEFAULT
+ * @note Default value can be set thanks to @ref LL_CRS_ERRORLIMIT_DEFAULT
* @retval None
*/
__STATIC_INLINE void LL_CRS_SetFreqErrorLimit(uint32_t Value)
{
- MODIFY_REG(CRS->CFGR, CRS_CFGR_FELIM, Value << CRS_POSITION_FELIM);
+ MODIFY_REG(CRS->CFGR, CRS_CFGR_FELIM, Value << CRS_CFGR_FELIM_Pos);
}
/**
@@ -352,7 +337,7 @@ __STATIC_INLINE void LL_CRS_SetFreqErrorLimit(uint32_t Value)
*/
__STATIC_INLINE uint32_t LL_CRS_GetFreqErrorLimit(void)
{
- return (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_FELIM) >> CRS_POSITION_FELIM);
+ return (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_FELIM) >> CRS_CFGR_FELIM_Pos);
}
/**
@@ -456,18 +441,21 @@ __STATIC_INLINE uint32_t LL_CRS_GetSyncPolarity(void)
* @param ErrorLimitValue a number between Min_Data = 0 and Max_Data = 0xFFFF
* @param ReloadValue a number between Min_Data = 0 and Max_Data = 255
* @param Settings This parameter can be a combination of the following values:
- * @arg @ref LL_CRS_SYNC_DIV_1 or @ref LL_CRS_SYNC_DIV_2 or @ref LL_CRS_SYNC_DIV_4 or @ref LL_CRS_SYNC_DIV_8
- * or @ref LL_CRS_SYNC_DIV_16 or @ref LL_CRS_SYNC_DIV_32 or @ref LL_CRS_SYNC_DIV_64 or @ref LL_CRS_SYNC_DIV_128
+ * @arg @ref LL_CRS_SYNC_DIV_1 or @ref LL_CRS_SYNC_DIV_2 or @ref LL_CRS_SYNC_DIV_4
+ * or @ref LL_CRS_SYNC_DIV_8 or @ref LL_CRS_SYNC_DIV_16 or @ref LL_CRS_SYNC_DIV_32
+ * or @ref LL_CRS_SYNC_DIV_64 or @ref LL_CRS_SYNC_DIV_128
* @arg @ref LL_CRS_SYNC_SOURCE_GPIO or @ref LL_CRS_SYNC_SOURCE_LSE or @ref LL_CRS_SYNC_SOURCE_USB
* @arg @ref LL_CRS_SYNC_POLARITY_RISING or @ref LL_CRS_SYNC_POLARITY_FALLING
* @retval None
*/
-__STATIC_INLINE void LL_CRS_ConfigSynchronization(uint32_t HSI48CalibrationValue, uint32_t ErrorLimitValue, uint32_t ReloadValue, uint32_t Settings)
+__STATIC_INLINE void LL_CRS_ConfigSynchronization(uint32_t HSI48CalibrationValue, uint32_t ErrorLimitValue,
+ uint32_t ReloadValue, uint32_t Settings)
{
- MODIFY_REG(CRS->CR, CRS_CR_TRIM, HSI48CalibrationValue);
- MODIFY_REG(CRS->CFGR,
- CRS_CFGR_RELOAD | CRS_CFGR_FELIM | CRS_CFGR_SYNCDIV | CRS_CFGR_SYNCSRC | CRS_CFGR_SYNCPOL,
- ReloadValue | (ErrorLimitValue << CRS_POSITION_FELIM) | Settings);
+ MODIFY_REG(CRS->CR, CRS_CR_TRIM, HSI48CalibrationValue << CRS_CR_TRIM_Pos);
+
+ MODIFY_REG(CRS->CFGR,
+ CRS_CFGR_RELOAD | CRS_CFGR_FELIM | CRS_CFGR_SYNCDIV | CRS_CFGR_SYNCSRC | CRS_CFGR_SYNCPOL,
+ ReloadValue | (ErrorLimitValue << CRS_CFGR_FELIM_Pos) | Settings);
}
/**
@@ -489,7 +477,7 @@ __STATIC_INLINE void LL_CRS_GenerateEvent_SWSYNC(void)
}
/**
- * @brief Get the frequency error direction latched in the time of the last
+ * @brief Get the frequency error direction latched in the time of the last
* SYNC event
* @rmtoll ISR FEDIR LL_CRS_GetFreqErrorDirection
* @retval Returned value can be one of the following values:
@@ -508,7 +496,7 @@ __STATIC_INLINE uint32_t LL_CRS_GetFreqErrorDirection(void)
*/
__STATIC_INLINE uint32_t LL_CRS_GetFreqErrorCapture(void)
{
- return (uint32_t)(READ_BIT(CRS->ISR, CRS_ISR_FECAP) >> CRS_POSITION_FECAP);
+ return (uint32_t)(READ_BIT(CRS->ISR, CRS_ISR_FECAP) >> CRS_ISR_FECAP_Pos);
}
/**
@@ -610,7 +598,7 @@ __STATIC_INLINE void LL_CRS_ClearFlag_SYNCWARN(void)
}
/**
- * @brief Clear TRIMOVF, SYNCMISS and SYNCERR bits and consequently also
+ * @brief Clear TRIMOVF, SYNCMISS and SYNCERR bits and consequently also
* the ERR flag
* @rmtoll ICR ERRC LL_CRS_ClearFlag_ERR
* @retval None
@@ -766,7 +754,7 @@ __STATIC_INLINE uint32_t LL_CRS_IsEnabledIT_ESYNC(void)
/** @defgroup CRS_LL_EF_Init Initialization and de-initialization functions
* @{
*/
-
+
ErrorStatus LL_CRS_DeInit(void);
/**
diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_dmamux.h b/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_dmamux.h
index 606b8f7c05..035b47c5e2 100644
--- a/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_dmamux.h
+++ b/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_dmamux.h
@@ -405,7 +405,7 @@ extern "C" {
* @arg @ref LL_DMAMUX_REQ_AES2_OUT
* @retval None
*/
-__STATIC_INLINE void LL_DMAMUX_SetRequestID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t Request)
+__STATIC_INLINE void LL_DMAMUX_SetRequestID(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t Request)
{
(void)(DMAMUXx);
MODIFY_REG((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_DMAREQ_ID, Request);
@@ -477,7 +477,7 @@ __STATIC_INLINE void LL_DMAMUX_SetRequestID(DMAMUX_Channel_TypeDef *DMAMUXx, uin
* @arg @ref LL_DMAMUX_REQ_AES2_IN
* @arg @ref LL_DMAMUX_REQ_AES2_OUT
*/
-__STATIC_INLINE uint32_t LL_DMAMUX_GetRequestID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
+__STATIC_INLINE uint32_t LL_DMAMUX_GetRequestID(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
{
(void)(DMAMUXx);
return (uint32_t)(READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_DMAREQ_ID));
@@ -509,7 +509,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_GetRequestID(DMAMUX_Channel_TypeDef *DMAMUXx,
* @param RequestNb This parameter must be a value between Min_Data = 1 and Max_Data = 32.
* @retval None
*/
-__STATIC_INLINE void LL_DMAMUX_SetSyncRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t RequestNb)
+__STATIC_INLINE void LL_DMAMUX_SetSyncRequestNb(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t RequestNb)
{
(void)(DMAMUXx);
MODIFY_REG((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_NBREQ, ((RequestNb - 1U) << DMAMUX_CxCR_NBREQ_Pos));
@@ -540,7 +540,7 @@ __STATIC_INLINE void LL_DMAMUX_SetSyncRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx,
* @arg @ref LL_DMAMUX_CHANNEL_13
* @retval Between Min_Data = 1 and Max_Data = 32
*/
-__STATIC_INLINE uint32_t LL_DMAMUX_GetSyncRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
+__STATIC_INLINE uint32_t LL_DMAMUX_GetSyncRequestNb(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
{
(void)(DMAMUXx);
return (uint32_t)(((READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_NBREQ)) >> DMAMUX_CxCR_NBREQ_Pos) + 1U);
@@ -576,7 +576,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_GetSyncRequestNb(DMAMUX_Channel_TypeDef *DMAM
* @arg @ref LL_DMAMUX_SYNC_POL_RISING_FALLING
* @retval None
*/
-__STATIC_INLINE void LL_DMAMUX_SetSyncPolarity(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t Polarity)
+__STATIC_INLINE void LL_DMAMUX_SetSyncPolarity(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t Polarity)
{
(void)(DMAMUXx);
MODIFY_REG((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SPOL, Polarity);
@@ -611,7 +611,7 @@ __STATIC_INLINE void LL_DMAMUX_SetSyncPolarity(DMAMUX_Channel_TypeDef *DMAMUXx,
* @arg @ref LL_DMAMUX_SYNC_POL_FALLING
* @arg @ref LL_DMAMUX_SYNC_POL_RISING_FALLING
*/
-__STATIC_INLINE uint32_t LL_DMAMUX_GetSyncPolarity(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
+__STATIC_INLINE uint32_t LL_DMAMUX_GetSyncPolarity(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
{
(void)(DMAMUXx);
return (uint32_t)(READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SPOL));
@@ -642,7 +642,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_GetSyncPolarity(DMAMUX_Channel_TypeDef *DMAMU
* @arg @ref LL_DMAMUX_CHANNEL_13
* @retval None
*/
-__STATIC_INLINE void LL_DMAMUX_EnableEventGeneration(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
+__STATIC_INLINE void LL_DMAMUX_EnableEventGeneration(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
{
(void)(DMAMUXx);
SET_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_EGE);
@@ -673,7 +673,7 @@ __STATIC_INLINE void LL_DMAMUX_EnableEventGeneration(DMAMUX_Channel_TypeDef *DMA
* @arg @ref LL_DMAMUX_CHANNEL_13
* @retval None
*/
-__STATIC_INLINE void LL_DMAMUX_DisableEventGeneration(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
+__STATIC_INLINE void LL_DMAMUX_DisableEventGeneration(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
{
(void)(DMAMUXx);
CLEAR_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_EGE);
@@ -704,7 +704,7 @@ __STATIC_INLINE void LL_DMAMUX_DisableEventGeneration(DMAMUX_Channel_TypeDef *DM
* @arg @ref LL_DMAMUX_CHANNEL_13
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledEventGeneration(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledEventGeneration(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
{
(void)(DMAMUXx);
return ((READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_EGE) == (DMAMUX_CxCR_EGE)) ? 1UL : 0UL);
@@ -735,7 +735,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledEventGeneration(DMAMUX_Channel_TypeD
* @arg @ref LL_DMAMUX_CHANNEL_13
* @retval None
*/
-__STATIC_INLINE void LL_DMAMUX_EnableSync(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
+__STATIC_INLINE void LL_DMAMUX_EnableSync(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
{
(void)(DMAMUXx);
SET_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SE);
@@ -766,7 +766,7 @@ __STATIC_INLINE void LL_DMAMUX_EnableSync(DMAMUX_Channel_TypeDef *DMAMUXx, uint3
* @arg @ref LL_DMAMUX_CHANNEL_13
* @retval None
*/
-__STATIC_INLINE void LL_DMAMUX_DisableSync(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
+__STATIC_INLINE void LL_DMAMUX_DisableSync(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
{
(void)(DMAMUXx);
CLEAR_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SE);
@@ -797,7 +797,7 @@ __STATIC_INLINE void LL_DMAMUX_DisableSync(DMAMUX_Channel_TypeDef *DMAMUXx, uint
* @arg @ref LL_DMAMUX_CHANNEL_13
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledSync(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledSync(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
{
(void)(DMAMUXx);
return ((READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SE) == (DMAMUX_CxCR_SE)) ? 1UL : 0UL);
@@ -849,7 +849,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledSync(DMAMUX_Channel_TypeDef *DMAMUXx
* @arg @ref LL_DMAMUX_SYNC_LPTIM2_OUT
* @retval None
*/
-__STATIC_INLINE void LL_DMAMUX_SetSyncID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t SyncID)
+__STATIC_INLINE void LL_DMAMUX_SetSyncID(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t SyncID)
{
(void)(DMAMUXx);
MODIFY_REG((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SYNC_ID, SyncID);
@@ -900,7 +900,7 @@ __STATIC_INLINE void LL_DMAMUX_SetSyncID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32
* @arg @ref LL_DMAMUX_SYNC_LPTIM1_OUT
* @arg @ref LL_DMAMUX_SYNC_LPTIM2_OUT
*/
-__STATIC_INLINE uint32_t LL_DMAMUX_GetSyncID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
+__STATIC_INLINE uint32_t LL_DMAMUX_GetSyncID(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
{
(void)(DMAMUXx);
return (uint32_t)(READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SYNC_ID));
@@ -917,7 +917,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_GetSyncID(DMAMUX_Channel_TypeDef *DMAMUXx, ui
* @arg @ref LL_DMAMUX_REQ_GEN_3
* @retval None
*/
-__STATIC_INLINE void LL_DMAMUX_EnableRequestGen(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
+__STATIC_INLINE void LL_DMAMUX_EnableRequestGen(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
{
(void)(DMAMUXx);
SET_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE *
@@ -935,7 +935,7 @@ __STATIC_INLINE void LL_DMAMUX_EnableRequestGen(DMAMUX_Channel_TypeDef *DMAMUXx,
* @arg @ref LL_DMAMUX_REQ_GEN_3
* @retval None
*/
-__STATIC_INLINE void LL_DMAMUX_DisableRequestGen(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
+__STATIC_INLINE void LL_DMAMUX_DisableRequestGen(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
{
(void)(DMAMUXx);
CLEAR_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE *
@@ -953,7 +953,7 @@ __STATIC_INLINE void LL_DMAMUX_DisableRequestGen(DMAMUX_Channel_TypeDef *DMAMUXx
* @arg @ref LL_DMAMUX_REQ_GEN_3
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledRequestGen(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledRequestGen(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
{
(void)(DMAMUXx);
return ((READ_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE *
@@ -976,7 +976,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledRequestGen(DMAMUX_Channel_TypeDef *D
* @arg @ref LL_DMAMUX_REQ_GEN_POL_RISING_FALLING
* @retval None
*/
-__STATIC_INLINE void LL_DMAMUX_SetRequestGenPolarity(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel,
+__STATIC_INLINE void LL_DMAMUX_SetRequestGenPolarity(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel,
uint32_t Polarity)
{
(void)(DMAMUXx);
@@ -999,7 +999,7 @@ __STATIC_INLINE void LL_DMAMUX_SetRequestGenPolarity(DMAMUX_Channel_TypeDef *DMA
* @arg @ref LL_DMAMUX_REQ_GEN_POL_FALLING
* @arg @ref LL_DMAMUX_REQ_GEN_POL_RISING_FALLING
*/
-__STATIC_INLINE uint32_t LL_DMAMUX_GetRequestGenPolarity(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
+__STATIC_INLINE uint32_t LL_DMAMUX_GetRequestGenPolarity(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
{
(void)(DMAMUXx);
return (uint32_t)(READ_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 +
@@ -1019,7 +1019,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_GetRequestGenPolarity(DMAMUX_Channel_TypeDef
* @param RequestNb This parameter must be a value between Min_Data = 1 and Max_Data = 32.
* @retval None
*/
-__STATIC_INLINE void LL_DMAMUX_SetGenRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel,
+__STATIC_INLINE void LL_DMAMUX_SetGenRequestNb(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel,
uint32_t RequestNb)
{
(void)(DMAMUXx);
@@ -1038,7 +1038,7 @@ __STATIC_INLINE void LL_DMAMUX_SetGenRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx,
* @arg @ref LL_DMAMUX_REQ_GEN_3
* @retval Between Min_Data = 1 and Max_Data = 32
*/
-__STATIC_INLINE uint32_t LL_DMAMUX_GetGenRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
+__STATIC_INLINE uint32_t LL_DMAMUX_GetGenRequestNb(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
{
(void)(DMAMUXx);
return (uint32_t)((READ_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 +
@@ -1077,7 +1077,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_GetGenRequestNb(DMAMUX_Channel_TypeDef *DMAMU
* @arg @ref LL_DMAMUX_REQ_GEN_LPTIM2_OUT
* @retval None
*/
-__STATIC_INLINE void LL_DMAMUX_SetRequestSignalID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel,
+__STATIC_INLINE void LL_DMAMUX_SetRequestSignalID(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel,
uint32_t RequestSignalID)
{
(void)(DMAMUXx);
@@ -1116,7 +1116,7 @@ __STATIC_INLINE void LL_DMAMUX_SetRequestSignalID(DMAMUX_Channel_TypeDef *DMAMUX
* @arg @ref LL_DMAMUX_REQ_GEN_LPTIM1_OUT
* @arg @ref LL_DMAMUX_REQ_GEN_LPTIM2_OUT
*/
-__STATIC_INLINE uint32_t LL_DMAMUX_GetRequestSignalID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
+__STATIC_INLINE uint32_t LL_DMAMUX_GetRequestSignalID(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
{
(void)(DMAMUXx);
return (uint32_t)(READ_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 +
@@ -1137,7 +1137,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_GetRequestSignalID(DMAMUX_Channel_TypeDef *DM
* @param DMAMUXx DMAMUXx DMAMUXx Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO0(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO0(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
(void)(DMAMUXx);
return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF0) == (DMAMUX_CSR_SOF0)) ? 1UL : 0UL);
@@ -1149,7 +1149,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO0(DMAMUX_Channel_TypeDef *DMAM
* @param DMAMUXx DMAMUXx DMAMUXx Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO1(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO1(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
(void)(DMAMUXx);
return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF1) == (DMAMUX_CSR_SOF1)) ? 1UL : 0UL);
@@ -1161,7 +1161,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO1(DMAMUX_Channel_TypeDef *DMAM
* @param DMAMUXx DMAMUXx DMAMUXx Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO2(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO2(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
(void)(DMAMUXx);
return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF2) == (DMAMUX_CSR_SOF2)) ? 1UL : 0UL);
@@ -1173,7 +1173,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO2(DMAMUX_Channel_TypeDef *DMAM
* @param DMAMUXx DMAMUXx DMAMUXx Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO3(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO3(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
(void)(DMAMUXx);
return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF3) == (DMAMUX_CSR_SOF3)) ? 1UL : 0UL);
@@ -1185,7 +1185,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO3(DMAMUX_Channel_TypeDef *DMAM
* @param DMAMUXx DMAMUXx DMAMUXx Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO4(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO4(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
(void)(DMAMUXx);
return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF4) == (DMAMUX_CSR_SOF4)) ? 1UL : 0UL);
@@ -1197,7 +1197,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO4(DMAMUX_Channel_TypeDef *DMAM
* @param DMAMUXx DMAMUXx DMAMUXx Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO5(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO5(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
(void)(DMAMUXx);
return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF5) == (DMAMUX_CSR_SOF5)) ? 1UL : 0UL);
@@ -1209,7 +1209,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO5(DMAMUX_Channel_TypeDef *DMAM
* @param DMAMUXx DMAMUXx DMAMUXx Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO6(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO6(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
(void)(DMAMUXx);
return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF6) == (DMAMUX_CSR_SOF6)) ? 1UL : 0UL);
@@ -1222,7 +1222,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO6(DMAMUX_Channel_TypeDef *DMAM
* @param DMAMUXx DMAMUXx DMAMUXx Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO7(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO7(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
(void)(DMAMUXx);
return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF7) == (DMAMUX_CSR_SOF7)) ? 1UL : 0UL);
@@ -1236,7 +1236,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO7(DMAMUX_Channel_TypeDef *DMAM
* @param DMAMUXx DMAMUXx DMAMUXx Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO8(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO8(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
(void)(DMAMUXx);
return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF8) == (DMAMUX_CSR_SOF8)) ? 1UL : 0UL);
@@ -1250,7 +1250,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO8(DMAMUX_Channel_TypeDef *DMAM
* @param DMAMUXx DMAMUXx DMAMUXx Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO9(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO9(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
(void)(DMAMUXx);
return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF9) == (DMAMUX_CSR_SOF9)) ? 1UL : 0UL);
@@ -1264,7 +1264,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO9(DMAMUX_Channel_TypeDef *DMAM
* @param DMAMUXx DMAMUXx DMAMUXx Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO10(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO10(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
(void)(DMAMUXx);
return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF10) == (DMAMUX_CSR_SOF10)) ? 1UL : 0UL);
@@ -1278,7 +1278,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO10(DMAMUX_Channel_TypeDef *DMA
* @param DMAMUXx DMAMUXx DMAMUXx Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO11(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO11(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
(void)(DMAMUXx);
return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF11) == (DMAMUX_CSR_SOF11)) ? 1UL : 0UL);
@@ -1292,7 +1292,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO11(DMAMUX_Channel_TypeDef *DMA
* @param DMAMUXx DMAMUXx DMAMUXx Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO12(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO12(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
(void)(DMAMUXx);
return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF12) == (DMAMUX_CSR_SOF12)) ? 1UL : 0UL);
@@ -1306,7 +1306,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO12(DMAMUX_Channel_TypeDef *DMA
* @param DMAMUXx DMAMUXx DMAMUXx Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO13(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO13(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
(void)(DMAMUXx);
return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF13) == (DMAMUX_CSR_SOF13)) ? 1UL : 0UL);
@@ -1319,7 +1319,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO13(DMAMUX_Channel_TypeDef *DMA
* @param DMAMUXx DMAMUXx DMAMUXx Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO0(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO0(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
(void)(DMAMUXx);
return ((READ_BIT(DMAMUX1_RequestGenStatus->RGSR, DMAMUX_RGSR_OF0) == (DMAMUX_RGSR_OF0)) ? 1UL : 0UL);
@@ -1331,7 +1331,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO0(DMAMUX_Channel_TypeDef *DMA
* @param DMAMUXx DMAMUXx DMAMUXx Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO1(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO1(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
(void)(DMAMUXx);
return ((READ_BIT(DMAMUX1_RequestGenStatus->RGSR, DMAMUX_RGSR_OF1) == (DMAMUX_RGSR_OF1)) ? 1UL : 0UL);
@@ -1343,7 +1343,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO1(DMAMUX_Channel_TypeDef *DMA
* @param DMAMUXx DMAMUXx DMAMUXx Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO2(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO2(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
(void)(DMAMUXx);
return ((READ_BIT(DMAMUX1_RequestGenStatus->RGSR, DMAMUX_RGSR_OF2) == (DMAMUX_RGSR_OF2)) ? 1UL : 0UL);
@@ -1355,7 +1355,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO2(DMAMUX_Channel_TypeDef *DMA
* @param DMAMUXx DMAMUXx DMAMUXx Instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO3(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO3(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
(void)(DMAMUXx);
return ((READ_BIT(DMAMUX1_RequestGenStatus->RGSR, DMAMUX_RGSR_OF3) == (DMAMUX_RGSR_OF3)) ? 1UL : 0UL);
@@ -1367,7 +1367,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO3(DMAMUX_Channel_TypeDef *DMA
* @param DMAMUXx DMAMUXx DMAMUXx Instance
* @retval None
*/
-__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO0(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO0(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
(void)(DMAMUXx);
SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF0);
@@ -1379,7 +1379,7 @@ __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO0(DMAMUX_Channel_TypeDef *DMAMUXx)
* @param DMAMUXx DMAMUXx DMAMUXx Instance
* @retval None
*/
-__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO1(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO1(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
(void)(DMAMUXx);
SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF1);
@@ -1391,7 +1391,7 @@ __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO1(DMAMUX_Channel_TypeDef *DMAMUXx)
* @param DMAMUXx DMAMUXx DMAMUXx Instance
* @retval None
*/
-__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO2(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO2(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
(void)(DMAMUXx);
SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF2);
@@ -1403,7 +1403,7 @@ __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO2(DMAMUX_Channel_TypeDef *DMAMUXx)
* @param DMAMUXx DMAMUXx DMAMUXx Instance
* @retval None
*/
-__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO3(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO3(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
(void)(DMAMUXx);
SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF3);
@@ -1415,7 +1415,7 @@ __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO3(DMAMUX_Channel_TypeDef *DMAMUXx)
* @param DMAMUXx DMAMUXx DMAMUXx Instance
* @retval None
*/
-__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO4(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO4(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
(void)(DMAMUXx);
SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF4);
@@ -1427,7 +1427,7 @@ __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO4(DMAMUX_Channel_TypeDef *DMAMUXx)
* @param DMAMUXx DMAMUXx DMAMUXx Instance
* @retval None
*/
-__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO5(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO5(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
(void)(DMAMUXx);
SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF5);
@@ -1439,7 +1439,7 @@ __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO5(DMAMUX_Channel_TypeDef *DMAMUXx)
* @param DMAMUXx DMAMUXx DMAMUXx Instance
* @retval None
*/
-__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO6(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO6(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
(void)(DMAMUXx);
SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF6);
@@ -1452,7 +1452,7 @@ __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO6(DMAMUX_Channel_TypeDef *DMAMUXx)
* @param DMAMUXx DMAMUXx DMAMUXx Instance
* @retval None
*/
-__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO7(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO7(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
(void)(DMAMUXx);
SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF7);
@@ -1466,7 +1466,7 @@ __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO7(DMAMUX_Channel_TypeDef *DMAMUXx)
* @param DMAMUXx DMAMUXx DMAMUXx Instance
* @retval None
*/
-__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO8(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO8(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
(void)(DMAMUXx);
SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF8);
@@ -1480,7 +1480,7 @@ __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO8(DMAMUX_Channel_TypeDef *DMAMUXx)
* @param DMAMUXx DMAMUXx DMAMUXx Instance
* @retval None
*/
-__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO9(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO9(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
(void)(DMAMUXx);
SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF9);
@@ -1494,7 +1494,7 @@ __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO9(DMAMUX_Channel_TypeDef *DMAMUXx)
* @param DMAMUXx DMAMUXx DMAMUXx Instance
* @retval None
*/
-__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO10(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO10(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
(void)(DMAMUXx);
SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF10);
@@ -1508,7 +1508,7 @@ __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO10(DMAMUX_Channel_TypeDef *DMAMUXx)
* @param DMAMUXx DMAMUXx DMAMUXx Instance
* @retval None
*/
-__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO11(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO11(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
(void)(DMAMUXx);
SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF11);
@@ -1522,7 +1522,7 @@ __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO11(DMAMUX_Channel_TypeDef *DMAMUXx)
* @param DMAMUXx DMAMUXx DMAMUXx Instance
* @retval None
*/
-__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO12(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO12(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
(void)(DMAMUXx);
SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF12);
@@ -1536,7 +1536,7 @@ __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO12(DMAMUX_Channel_TypeDef *DMAMUXx)
* @param DMAMUXx DMAMUXx DMAMUXx Instance
* @retval None
*/
-__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO13(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE void LL_DMAMUX_ClearFlag_SO13(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
(void)(DMAMUXx);
SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF13);
@@ -1549,7 +1549,7 @@ __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO13(DMAMUX_Channel_TypeDef *DMAMUXx)
* @param DMAMUXx DMAMUXx DMAMUXx Instance
* @retval None
*/
-__STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO0(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO0(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
(void)(DMAMUXx);
SET_BIT(DMAMUX1_RequestGenStatus->RGCFR, DMAMUX_RGCFR_COF0);
@@ -1561,7 +1561,7 @@ __STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO0(DMAMUX_Channel_TypeDef *DMAMUXx)
* @param DMAMUXx DMAMUXx DMAMUXx Instance
* @retval None
*/
-__STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO1(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO1(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
(void)(DMAMUXx);
SET_BIT(DMAMUX1_RequestGenStatus->RGCFR, DMAMUX_RGCFR_COF1);
@@ -1573,7 +1573,7 @@ __STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO1(DMAMUX_Channel_TypeDef *DMAMUXx)
* @param DMAMUXx DMAMUXx DMAMUXx Instance
* @retval None
*/
-__STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO2(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO2(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
(void)(DMAMUXx);
SET_BIT(DMAMUX1_RequestGenStatus->RGCFR, DMAMUX_RGCFR_COF2);
@@ -1585,7 +1585,7 @@ __STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO2(DMAMUX_Channel_TypeDef *DMAMUXx)
* @param DMAMUXx DMAMUXx DMAMUXx Instance
* @retval None
*/
-__STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO3(DMAMUX_Channel_TypeDef *DMAMUXx)
+__STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO3(const DMAMUX_Channel_TypeDef *DMAMUXx)
{
(void)(DMAMUXx);
SET_BIT(DMAMUX1_RequestGenStatus->RGCFR, DMAMUX_RGCFR_COF3);
@@ -1624,7 +1624,7 @@ __STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO3(DMAMUX_Channel_TypeDef *DMAMUXx)
* @arg @ref LL_DMAMUX_CHANNEL_13
* @retval None
*/
-__STATIC_INLINE void LL_DMAMUX_EnableIT_SO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
+__STATIC_INLINE void LL_DMAMUX_EnableIT_SO(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
{
(void)(DMAMUXx);
SET_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SOIE);
@@ -1655,7 +1655,7 @@ __STATIC_INLINE void LL_DMAMUX_EnableIT_SO(DMAMUX_Channel_TypeDef *DMAMUXx, uint
* @arg @ref LL_DMAMUX_CHANNEL_13
* @retval None
*/
-__STATIC_INLINE void LL_DMAMUX_DisableIT_SO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
+__STATIC_INLINE void LL_DMAMUX_DisableIT_SO(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
{
(void)(DMAMUXx);
CLEAR_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SOIE);
@@ -1686,7 +1686,7 @@ __STATIC_INLINE void LL_DMAMUX_DisableIT_SO(DMAMUX_Channel_TypeDef *DMAMUXx, uin
* @arg @ref LL_DMAMUX_CHANNEL_13
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledIT_SO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
+__STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledIT_SO(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
{
(void)(DMAMUXx);
return (((READ_BIT((DMAMUX1_Channel0 + Channel)->CCR, DMAMUX_CxCR_SOIE)) == (DMAMUX_CxCR_SOIE)) ? 1UL : 0UL);
@@ -1703,7 +1703,7 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledIT_SO(DMAMUX_Channel_TypeDef *DMAMUX
* @arg @ref LL_DMAMUX_REQ_GEN_3
* @retval None
*/
-__STATIC_INLINE void LL_DMAMUX_EnableIT_RGO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
+__STATIC_INLINE void LL_DMAMUX_EnableIT_RGO(const DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
{
(void)(DMAMUXx);
SET_BIT((DMAMUX1_RequestGenerator0 + RequestGenChannel)->RGCR, DMAMUX_RGxCR_OIE);
diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_gpio.h b/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_gpio.h
index 2c3c205f4a..21fabf9b8e 100644
--- a/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_gpio.h
+++ b/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_gpio.h
@@ -312,7 +312,7 @@ __STATIC_INLINE void LL_GPIO_SetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin, uint3
* @arg @ref LL_GPIO_MODE_ALTERNATE
* @arg @ref LL_GPIO_MODE_ANALOG
*/
-__STATIC_INLINE uint32_t LL_GPIO_GetPinMode(GPIO_TypeDef *GPIOx, uint32_t Pin)
+__STATIC_INLINE uint32_t LL_GPIO_GetPinMode(const GPIO_TypeDef *GPIOx, uint32_t Pin)
{
return (uint32_t)(READ_BIT(GPIOx->MODER,
(GPIO_MODER_MODE0 << (POSITION_VAL(Pin) * 2U))) >> (POSITION_VAL(Pin) * 2U));
@@ -381,7 +381,7 @@ __STATIC_INLINE void LL_GPIO_SetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t PinM
* @arg @ref LL_GPIO_OUTPUT_PUSHPULL
* @arg @ref LL_GPIO_OUTPUT_OPENDRAIN
*/
-__STATIC_INLINE uint32_t LL_GPIO_GetPinOutputType(GPIO_TypeDef *GPIOx, uint32_t Pin)
+__STATIC_INLINE uint32_t LL_GPIO_GetPinOutputType(const GPIO_TypeDef *GPIOx, uint32_t Pin)
{
return (uint32_t)(READ_BIT(GPIOx->OTYPER, Pin) >> POSITION_VAL(Pin));
}
@@ -455,7 +455,7 @@ __STATIC_INLINE void LL_GPIO_SetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin, uint
* @arg @ref LL_GPIO_SPEED_FREQ_HIGH
* @arg @ref LL_GPIO_SPEED_FREQ_VERY_HIGH
*/
-__STATIC_INLINE uint32_t LL_GPIO_GetPinSpeed(GPIO_TypeDef *GPIOx, uint32_t Pin)
+__STATIC_INLINE uint32_t LL_GPIO_GetPinSpeed(const GPIO_TypeDef *GPIOx, uint32_t Pin)
{
return (uint32_t)(READ_BIT(GPIOx->OSPEEDR,
(GPIO_OSPEEDR_OSPEED0 << (POSITION_VAL(Pin) * 2U))) >> (POSITION_VAL(Pin) * 2U));
@@ -521,7 +521,7 @@ __STATIC_INLINE void LL_GPIO_SetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin, uint3
* @arg @ref LL_GPIO_PULL_UP
* @arg @ref LL_GPIO_PULL_DOWN
*/
-__STATIC_INLINE uint32_t LL_GPIO_GetPinPull(GPIO_TypeDef *GPIOx, uint32_t Pin)
+__STATIC_INLINE uint32_t LL_GPIO_GetPinPull(const GPIO_TypeDef *GPIOx, uint32_t Pin)
{
return (uint32_t)(READ_BIT(GPIOx->PUPDR,
(GPIO_PUPDR_PUPD0 << (POSITION_VAL(Pin) * 2U))) >> (POSITION_VAL(Pin) * 2U));
@@ -598,7 +598,7 @@ __STATIC_INLINE void LL_GPIO_SetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin, uin
* @arg @ref LL_GPIO_AF_14
* @arg @ref LL_GPIO_AF_15
*/
-__STATIC_INLINE uint32_t LL_GPIO_GetAFPin_0_7(GPIO_TypeDef *GPIOx, uint32_t Pin)
+__STATIC_INLINE uint32_t LL_GPIO_GetAFPin_0_7(const GPIO_TypeDef *GPIOx, uint32_t Pin)
{
return (uint32_t)(READ_BIT(GPIOx->AFR[0],
(GPIO_AFRL_AFSEL0 << (POSITION_VAL(Pin) * 4U))) >> (POSITION_VAL(Pin) * 4U));
@@ -676,7 +676,7 @@ __STATIC_INLINE void LL_GPIO_SetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin, ui
* @arg @ref LL_GPIO_AF_14
* @arg @ref LL_GPIO_AF_15
*/
-__STATIC_INLINE uint32_t LL_GPIO_GetAFPin_8_15(GPIO_TypeDef *GPIOx, uint32_t Pin)
+__STATIC_INLINE uint32_t LL_GPIO_GetAFPin_8_15(const GPIO_TypeDef *GPIOx, uint32_t Pin)
{
return (uint32_t)(READ_BIT(GPIOx->AFR[1],
(GPIO_AFRH_AFSEL8 << (POSITION_VAL(Pin >> 8U) * 4U))) >> (POSITION_VAL(Pin >> 8U) * 4U));
@@ -747,7 +747,7 @@ __STATIC_INLINE void LL_GPIO_LockPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
* @arg @ref LL_GPIO_PIN_ALL
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_GPIO_IsPinLocked(GPIO_TypeDef *GPIOx, uint32_t PinMask)
+__STATIC_INLINE uint32_t LL_GPIO_IsPinLocked(const GPIO_TypeDef *GPIOx, uint32_t PinMask)
{
return ((READ_BIT(GPIOx->LCKR, PinMask) == (PinMask)) ? 1UL : 0UL);
}
@@ -758,7 +758,7 @@ __STATIC_INLINE uint32_t LL_GPIO_IsPinLocked(GPIO_TypeDef *GPIOx, uint32_t PinMa
* @param GPIOx GPIO Port
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_GPIO_IsAnyPinLocked(GPIO_TypeDef *GPIOx)
+__STATIC_INLINE uint32_t LL_GPIO_IsAnyPinLocked(const GPIO_TypeDef *GPIOx)
{
return ((READ_BIT(GPIOx->LCKR, GPIO_LCKR_LCKK) == (GPIO_LCKR_LCKK)) ? 1UL : 0UL);
}
@@ -777,7 +777,7 @@ __STATIC_INLINE uint32_t LL_GPIO_IsAnyPinLocked(GPIO_TypeDef *GPIOx)
* @param GPIOx GPIO Port
* @retval Input data register value of port
*/
-__STATIC_INLINE uint32_t LL_GPIO_ReadInputPort(GPIO_TypeDef *GPIOx)
+__STATIC_INLINE uint32_t LL_GPIO_ReadInputPort(const GPIO_TypeDef *GPIOx)
{
return (uint32_t)(READ_REG(GPIOx->IDR));
}
@@ -806,7 +806,7 @@ __STATIC_INLINE uint32_t LL_GPIO_ReadInputPort(GPIO_TypeDef *GPIOx)
* @arg @ref LL_GPIO_PIN_ALL
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_GPIO_IsInputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask)
+__STATIC_INLINE uint32_t LL_GPIO_IsInputPinSet(const GPIO_TypeDef *GPIOx, uint32_t PinMask)
{
return ((READ_BIT(GPIOx->IDR, PinMask) == (PinMask)) ? 1UL : 0UL);
}
@@ -829,7 +829,7 @@ __STATIC_INLINE void LL_GPIO_WriteOutputPort(GPIO_TypeDef *GPIOx, uint32_t PortV
* @param GPIOx GPIO Port
* @retval Output data register value of port
*/
-__STATIC_INLINE uint32_t LL_GPIO_ReadOutputPort(GPIO_TypeDef *GPIOx)
+__STATIC_INLINE uint32_t LL_GPIO_ReadOutputPort(const GPIO_TypeDef *GPIOx)
{
return (uint32_t)(READ_REG(GPIOx->ODR));
}
@@ -858,7 +858,7 @@ __STATIC_INLINE uint32_t LL_GPIO_ReadOutputPort(GPIO_TypeDef *GPIOx)
* @arg @ref LL_GPIO_PIN_ALL
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_GPIO_IsOutputPinSet(GPIO_TypeDef *GPIOx, uint32_t PinMask)
+__STATIC_INLINE uint32_t LL_GPIO_IsOutputPinSet(const GPIO_TypeDef *GPIOx, uint32_t PinMask)
{
return ((READ_BIT(GPIOx->ODR, PinMask) == (PinMask)) ? 1UL : 0UL);
}
@@ -960,7 +960,7 @@ __STATIC_INLINE void LL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
* @{
*/
-ErrorStatus LL_GPIO_DeInit(GPIO_TypeDef *GPIOx);
+ErrorStatus LL_GPIO_DeInit(const GPIO_TypeDef *GPIOx);
ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStruct);
void LL_GPIO_StructInit(LL_GPIO_InitTypeDef *GPIO_InitStruct);
diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_pka.h b/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_pka.h
index b38e918a5d..c342a1bef4 100644
--- a/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_pka.h
+++ b/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_pka.h
@@ -223,7 +223,7 @@ __STATIC_INLINE void LL_PKA_Disable(PKA_TypeDef *PKAx)
* @param PKAx PKA Instance.
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_PKA_IsEnabled(PKA_TypeDef *PKAx)
+__STATIC_INLINE uint32_t LL_PKA_IsEnabled(const PKA_TypeDef *PKAx)
{
return ((READ_BIT(PKAx->CR, PKA_CR_EN) == (PKA_CR_EN)) ? 1UL : 0UL);
}
@@ -282,7 +282,7 @@ __STATIC_INLINE void LL_PKA_SetMode(PKA_TypeDef *PKAx, uint32_t Mode)
* @arg @ref LL_PKA_MODE_MODULAR_SUB
* @arg @ref LL_PKA_MODE_MONTGOMERY_MUL
*/
-__STATIC_INLINE uint32_t LL_PKA_GetMode(PKA_TypeDef *PKAx)
+__STATIC_INLINE uint32_t LL_PKA_GetMode(const PKA_TypeDef *PKAx)
{
return (uint32_t)(READ_BIT(PKAx->CR, PKA_CR_MODE) >> PKA_CR_MODE_Pos);
}
@@ -379,7 +379,7 @@ __STATIC_INLINE void LL_PKA_DisableIT_PROCEND(PKA_TypeDef *PKAx)
* @param PKAx PKA Instance.
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_PKA_IsEnabledIT_ADDRERR(PKA_TypeDef *PKAx)
+__STATIC_INLINE uint32_t LL_PKA_IsEnabledIT_ADDRERR(const PKA_TypeDef *PKAx)
{
return ((READ_BIT(PKAx->CR, PKA_CR_ADDRERRIE) == (PKA_CR_ADDRERRIE)) ? 1UL : 0UL);
}
@@ -390,7 +390,7 @@ __STATIC_INLINE uint32_t LL_PKA_IsEnabledIT_ADDRERR(PKA_TypeDef *PKAx)
* @param PKAx PKA Instance.
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_PKA_IsEnabledIT_RAMERR(PKA_TypeDef *PKAx)
+__STATIC_INLINE uint32_t LL_PKA_IsEnabledIT_RAMERR(const PKA_TypeDef *PKAx)
{
return ((READ_BIT(PKAx->CR, PKA_CR_RAMERRIE) == (PKA_CR_RAMERRIE)) ? 1UL : 0UL);
}
@@ -402,7 +402,7 @@ __STATIC_INLINE uint32_t LL_PKA_IsEnabledIT_RAMERR(PKA_TypeDef *PKAx)
* @param PKAx PKA Instance.
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_PKA_IsEnabledIT_PROCEND(PKA_TypeDef *PKAx)
+__STATIC_INLINE uint32_t LL_PKA_IsEnabledIT_PROCEND(const PKA_TypeDef *PKAx)
{
return ((READ_BIT(PKAx->CR, PKA_CR_PROCENDIE) == (PKA_CR_PROCENDIE)) ? 1UL : 0UL);
}
@@ -421,7 +421,7 @@ __STATIC_INLINE uint32_t LL_PKA_IsEnabledIT_PROCEND(PKA_TypeDef *PKAx)
* @param PKAx PKA Instance.
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_PKA_IsActiveFlag_ADDRERR(PKA_TypeDef *PKAx)
+__STATIC_INLINE uint32_t LL_PKA_IsActiveFlag_ADDRERR(const PKA_TypeDef *PKAx)
{
return ((READ_BIT(PKAx->SR, PKA_SR_ADDRERRF) == (PKA_SR_ADDRERRF)) ? 1UL : 0UL);
}
@@ -432,7 +432,7 @@ __STATIC_INLINE uint32_t LL_PKA_IsActiveFlag_ADDRERR(PKA_TypeDef *PKAx)
* @param PKAx PKA Instance.
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_PKA_IsActiveFlag_RAMERR(PKA_TypeDef *PKAx)
+__STATIC_INLINE uint32_t LL_PKA_IsActiveFlag_RAMERR(const PKA_TypeDef *PKAx)
{
return ((READ_BIT(PKAx->SR, PKA_SR_RAMERRF) == (PKA_SR_RAMERRF)) ? 1UL : 0UL);
}
@@ -444,7 +444,7 @@ __STATIC_INLINE uint32_t LL_PKA_IsActiveFlag_RAMERR(PKA_TypeDef *PKAx)
* @param PKAx PKA Instance.
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_PKA_IsActiveFlag_PROCEND(PKA_TypeDef *PKAx)
+__STATIC_INLINE uint32_t LL_PKA_IsActiveFlag_PROCEND(const PKA_TypeDef *PKAx)
{
return ((READ_BIT(PKAx->SR, PKA_SR_PROCENDF) == (PKA_SR_PROCENDF)) ? 1UL : 0UL);
}
@@ -455,11 +455,22 @@ __STATIC_INLINE uint32_t LL_PKA_IsActiveFlag_PROCEND(PKA_TypeDef *PKAx)
* @param PKAx PKA Instance.
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_PKA_IsActiveFlag_BUSY(PKA_TypeDef *PKAx)
+__STATIC_INLINE uint32_t LL_PKA_IsActiveFlag_BUSY(const PKA_TypeDef *PKAx)
{
return ((READ_BIT(PKAx->SR, PKA_SR_BUSY) == (PKA_SR_BUSY)) ? 1UL : 0UL);
}
-
+#if defined(PKA_SR_INITOK)
+/**
+ * @brief Get PKA init ok flag.
+ * @rmtoll SR INITOK LL_PKA_IsActiveFlag_INITOK
+ * @param PKAx PKA Instance.
+ * @retval State of bit (1 or 0).
+ */
+__STATIC_INLINE uint32_t LL_PKA_IsActiveFlag_INITOK(const PKA_TypeDef *PKAx)
+{
+ return ((READ_BIT(PKAx->SR, PKA_SR_INITOK) == (PKA_SR_INITOK)) ? 1UL : 0UL);
+}
+#endif /* PKA_SR_INITOK */
/**
* @brief Clear PKA address error flag.
* @rmtoll CLRFR ADDRERRFC LL_PKA_ClearFlag_ADDERR
@@ -504,7 +515,7 @@ __STATIC_INLINE void LL_PKA_ClearFlag_PROCEND(PKA_TypeDef *PKAx)
* @{
*/
-ErrorStatus LL_PKA_DeInit(PKA_TypeDef *PKAx);
+ErrorStatus LL_PKA_DeInit(const PKA_TypeDef *PKAx);
ErrorStatus LL_PKA_Init(PKA_TypeDef *PKAx, LL_PKA_InitTypeDef *PKA_InitStruct);
void LL_PKA_StructInit(LL_PKA_InitTypeDef *PKA_InitStruct);
diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_rtc.h b/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_rtc.h
index a4846f620f..8a2faabaac 100644
--- a/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_rtc.h
+++ b/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_rtc.h
@@ -614,7 +614,7 @@ typedef struct
* @param __VALUE__ Value to be written in the register
* @retval None
*/
-#define LL_RTC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
+#define LL_RTC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG((__INSTANCE__)->__REG__, (__VALUE__))
/**
* @brief Read a value in RTC register
@@ -622,7 +622,7 @@ typedef struct
* @param __REG__ Register to be read
* @retval Register value
*/
-#define LL_RTC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
+#define LL_RTC_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__)
/**
* @}
*/
@@ -643,7 +643,7 @@ typedef struct
* @param __VALUE__ BCD value to be converted
* @retval Converted byte
*/
-#define __LL_RTC_CONVERT_BCD2BIN(__VALUE__) (uint8_t)(((uint8_t)((__VALUE__) & (uint8_t)0xF0U) >> (uint8_t)0x4U) * 10U + ((__VALUE__) & (uint8_t)0x0FU))
+#define __LL_RTC_CONVERT_BCD2BIN(__VALUE__) (uint8_t)((((uint8_t)((__VALUE__) & (uint8_t)0xF0U) >> (uint8_t)0x4U) * 10U) + ((__VALUE__) & (uint8_t)0x0FU))
/**
* @}
diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_usb.h b/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_usb.h
index 52b7ec9275..e0bb3b9402 100644
--- a/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_usb.h
+++ b/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_usb.h
@@ -75,6 +75,7 @@ typedef struct
uint8_t battery_charging_enable; /*!< Enable or disable Battery charging. */
} USB_CfgTypeDef;
+#if defined (HAL_PCD_MODULE_ENABLED)
typedef struct
{
uint8_t num; /*!< Endpoint number
@@ -119,6 +120,7 @@ typedef struct
uint8_t xfer_fill_db; /*!< double buffer Need to Fill new buffer used with bulk_in */
} USB_EPTypeDef;
+#endif /* defined (HAL_PCD_MODULE_ENABLED) */
/* Exported constants --------------------------------------------------------*/
@@ -161,7 +163,7 @@ typedef struct
#define PMA_ACCESS 1U
#ifndef USB_EP_RX_STRX
-#define USB_EP_RX_STRX (0x3U << 12)
+#define USB_EP_RX_STRX (0x3UL << 12)
#endif /* USB_EP_RX_STRX */
#define EP_ADDR_MSK 0x7U
@@ -186,11 +188,11 @@ typedef struct
*/
-HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg);
+HAL_StatusTypeDef USB_CoreInit(USB_TypeDef const *USBx, USB_CfgTypeDef cfg);
HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg);
HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx);
HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx);
-HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode);
+HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef const *USBx, USB_ModeTypeDef mode);
HAL_StatusTypeDef USB_FlushRxFifo(USB_TypeDef const *USBx);
HAL_StatusTypeDef USB_FlushTxFifo(USB_TypeDef const *USBx, uint32_t num);
@@ -239,5 +241,4 @@ void USB_ReadPMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf,
}
#endif /* __cplusplus */
-
#endif /* STM32WBxx_LL_USB_H */
diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Release_Notes.html b/system/Drivers/STM32WBxx_HAL_Driver/Release_Notes.html
index 87ae8f1f29..7026188a80 100644
--- a/system/Drivers/STM32WBxx_HAL_Driver/Release_Notes.html
+++ b/system/Drivers/STM32WBxx_HAL_Driver/Release_Notes.html
@@ -40,7 +40,7 @@
Purpose
Update History
-
+
Main Changes
@@ -50,6 +50,71 @@
Main Changes
Contents
HAL Drivers updates
+
HAL ADC driver
+
+
Add const qualifier for calibrated values (read only, in system flash)
+
+
HAL CRYP driver
+
+
Remove invocation of __HAL_UNLOCK() when __HAL_LOCK() is not present
+
+
HAL GPIO driver
+
+
Fixed timer timebase initialization sequence by registering the callback before starting the timer to ensure correct callback handling in FreeRTOS projects
+
+
HAL RTC driver
+
+
Fixed MISRA 13.5 warnings
+
+
HAL LPTIM driver
+
+
Removed duplicated macro
+
+
+
HAL LPUART driver
+
+
Fix transfer count underflow when using polling mode
+
+
HAL TIM driver
+
+
Fix complementary channel systematically disabled by TIM_OCx_SetConfig().
+
+
HAL UART driver
+
+
Fix transfer count underflow when using polling mode
+
+
HAL USART driver
+
+
Replaced UART calls by USART
+
+
+
LL Drivers updates
+
+
LL ADC driver
+
+
Add const qualifier for calibrated values (read only, in system flash
+
+
LL RTC driver
+
+
Add missing parentheses into macros LL_RTC_WriteReg() and LL_RTC_ReadReg() to comply with MISRA-C 2012 rule 20.7
+
+
+
+
Backward Compatibility
+
This release is compatible with the previous versions.
+
+
+
+
+
+
Main Changes
+
+
Maintenance release of HAL and Low Layer drivers to include latest corrections
+
HAL/LL code quality enhancement
+
+
Contents
+
HAL Drivers updates
+
HAL IWDG driver
Calculate the maximum IWDG Timeout period “HAL_IWDG_DEFAULT_TIMEOUT”, based on a Prescaler=128 at LSI frequency=32kHz.
@@ -78,7 +143,7 @@
HAL Drivers updates
Update TIM_CCER_CCxE_MASK to support internal TIM Channel5 and TIM Channel6.
-
LL Drivers updates
+
LL Drivers updates
LL IWDG driver
@@ -86,20 +151,20 @@
LL Drivers updates
-
Backward Compatibility
+
Backward Compatibility
This release is compatible with the previous versions.
-
+
-
Main Changes
+
Main Changes
Maintenance release of HAL and Low Layer drivers to include latest corrections
HAL/LL code quality enhancement
-
Contents
-
HAL Drivers updates
+
Contents
+
HAL Drivers updates
HAL RNG driver
@@ -130,7 +195,7 @@
HAL Drivers updates
Fix update flag (UIF) clearing in TIM_Base_SetConfig
-
LL Drivers updates
+
LL Drivers updates
LL LPUART driver
@@ -140,20 +205,20 @@
LL Drivers updates
-
Backward Compatibility
+
Backward Compatibility
This release is compatible with the previous versions.
-
Main Changes
+
Main Changes
Maintenance release of HAL and Low Layer drivers to include latest corrections
HAL/LL code quality enhancement
-
Contents
-
HAL Drivers updates
+
Contents
+
HAL Drivers updates
HAL ADC driver
@@ -177,7 +242,7 @@
HAL Drivers updates
Fix added to support bulk transfer in double buffer mode
-
LL Drivers updates
+
LL Drivers updates
LL ADC driver
@@ -194,20 +259,20 @@
LL Drivers updates
-
Backward Compatibility
+
Backward Compatibility
This release is compatible with the previous versions.
-
Main Changes
+
Main Changes
Maintenance release of HAL and Low Layer drivers to include latest corrections
HAL/LL code quality enhancement
-
Contents
-
HAL Drivers updates
+
Contents
+
HAL Drivers updates
HAL CRYP driver
@@ -237,7 +302,7 @@
HAL Drivers updates
-
LL Drivers updates
+
LL Drivers updates
LL LPUART driver
@@ -250,20 +315,20 @@
LL Drivers updates
-
Backward Compatibility
+
Backward Compatibility
This release is compatible with the previous versions.
-
Main Changes
+
Main Changes
Maintenance release of HAL and Low Layer drivers to include latest corrections
HAL/LL code quality enhancement
-
Contents
-
HAL Drivers updates
+
Contents
+
HAL Drivers updates
HAL GPIO driver
@@ -303,7 +368,7 @@
HAL Drivers updates
-
LL Drivers updates
+
LL Drivers updates
LL UTILS driver
@@ -312,20 +377,20 @@
LL Drivers updates
-
Backward Compatibility
+
Backward Compatibility
This release is compatible with the previous versions.
-
Main Changes
+
Main Changes
Maintenance release of HAL and Low Layer drivers to include latest corrections
HAL/LL code quality enhancement
-
Contents
-
HAL Drivers updates
+
Contents
+
HAL Drivers updates
HAL I2C driver
@@ -360,7 +425,7 @@
HAL Drivers updates
-
LL Drivers updates
+
LL Drivers updates
LL I2C driver
@@ -378,20 +443,20 @@
LL Drivers updates
-
Backward Compatibility
+
Backward Compatibility
This release is compatible with the previous versions.
-
Main Changes
+
Main Changes
Maintenance release of HAL and Low Layer drivers to include latest corrections
HAL/LL code quality enhancement
-
Contents
-
HAL Drivers updates
+
Contents
+
HAL Drivers updates
HAL CRYP driver
@@ -430,7 +495,7 @@
HAL Drivers updates
-
LL Drivers updates
+
LL Drivers updates
LL USB driver
@@ -439,20 +504,20 @@
LL Drivers updates
-
Backward Compatibility
+
Backward Compatibility
This release is compatible with the previous versions.
-
Main Changes
+
Main Changes
Maintenance release of HAL and Low Layer drivers to include latest corrections
HAL/LL code quality enhancement
-
Contents
-
HAL Drivers updates
+
Contents
+
HAL Drivers updates
HAL FLASH driver
@@ -483,20 +548,20 @@
HAL Drivers updates
-
Backward Compatibility
+
Backward Compatibility
This release is compatible with the previous versions.
-
Main Changes
+
Main Changes
Maintenance release of HAL and Low Layer drivers to include latest corrections
Remove HAL_LOCK/HAL_UNLOCK calls in HAL_xxxx_RegisterCallback & HAL_xxxx_UnregisterCallback for IPs (IRDA, LPTIM, SMARTCARD, TIM, UART, USART)
-
Contents
-
HAL Drivers updates
+
Contents
+
HAL Drivers updates
HAL ADC driver
@@ -543,7 +608,7 @@
HAL Drivers updates
-
LL Drivers updates
+
LL Drivers updates
LL ADC driver
@@ -564,20 +629,20 @@
LL Drivers updates
-
Backward Compatibility
+
Backward Compatibility
This release is compatible with the previous versions.
-
Main Changes
+
Main Changes
Maintenance release of HAL and Low Layer drivers to include latest corrections
Correct English spelling errors and typos
-
Contents
-
HAL Drivers updates
+
Contents
+
HAL Drivers updates
HAL EXTI driver
@@ -653,7 +718,7 @@
HAL Drivers updates
-
LL Drivers updates
+
LL Drivers updates
LL I2C driver
@@ -689,19 +754,19 @@
LL Drivers updates
-
Backward Compatibility
+
Backward Compatibility
This release is compatible with the previous versions.
-
Main Changes
+
Main Changes
Patch release of HAL and Low Layer drivers
-
Contents
-
HAL Drivers updates
+
Contents
+
HAL Drivers updates
HAL COMP driver
@@ -710,7 +775,7 @@
HAL Drivers updates
-
LL Drivers updates
+
LL Drivers updates
LL COMP driver
@@ -719,21 +784,21 @@
LL Drivers updates
-
Backward Compatibility
+
Backward Compatibility
This release is compatible with the previous versions.
-
Main Changes
+
Main Changes
Maintenance release of HAL and Low Layer drivers to include latest corrections
All source files: update disclaimer to add reference to the new license agreement
Correct English spelling errors and typos
-
Contents
-
HAL Drivers updates
+
Contents
+
HAL Drivers updates
HAL ADC driver
@@ -804,7 +869,7 @@
HAL Drivers updates
-
LL Drivers updates
+
LL Drivers updates
LL ADC driver
@@ -819,14 +884,14 @@
LL Drivers updates
-
Backward Compatibility
+
Backward Compatibility
This release is compatible with the previous versions.
-
Main Changes
+
Main Changes
Maintenance release of HAL and Low Layer drivers to include latest corrections
Update of HAL SMBUS driver to introduce fast mode and fast mode plus
@@ -840,8 +905,8 @@
Main Changes
-
Contents
-
HAL Drivers updates
+
Contents
+
HAL Drivers updates
HAL CORTEX driver
@@ -917,7 +982,7 @@
HAL Drivers updates
-
LL Drivers updates
+
LL Drivers updates
LL DMA driver
@@ -944,14 +1009,14 @@
LL Drivers updates
-
Backward Compatibility
+
Backward Compatibility
This release is compatible with the previous versions.
-
Main Changes
+
Main Changes
Add support for STM32WB15xx and STM32WB10xx
@@ -1087,14 +1152,14 @@
Add support for STM32WB15xx
-
Backward Compatibility
+
Backward Compatibility
This release is compatible with the previous versions.
-
Main Changes
+
Main Changes
Maitenance release
All peripheral
@@ -1167,14 +1232,14 @@
Maitenance release
-
Backward Compatibility
+
Backward Compatibility
This release is compatible with the previous versions.
-
Main Changes
+
Main Changes
Maitenance release
All peripheral
@@ -1279,14 +1344,14 @@
Maitenance release
-
Backward Compatibility
+
Backward Compatibility
This release is compatible with the previous versions.
-
Main Changes
+
Main Changes
Introduction of STM32WB5M, STM32WB35xx and STM32WB30xx product
This release introduce the support of STM32WB5Mxx, STM32WB35xx product and its value line STM32WB30xx.
Added features:
@@ -1331,14 +1396,14 @@
Introduct
-
Backward Compatibility
+
Backward Compatibility
This release is compatible with the previous versions.
-
Main Changes
+
Main Changes
Maitenance release
@@ -1382,7 +1447,7 @@
Maitenance release
-
Backward Compatibility
+
Backward Compatibility
This release is compatible with the previous versions.
Dependencies
This software release is compatible with:
@@ -1392,7 +1457,7 @@
Dependencies
-
Main Changes
+
Main Changes
Maitenance release
@@ -1464,7 +1529,7 @@
Maitenance release
-
Backward Compatibility
+
Backward Compatibility
This release is compatible with the previous versions.
Dependencies
This software release is compatible with:
@@ -1474,7 +1539,7 @@
Dependencies
-
Main Changes
+
Main Changes
STM32WB50xx introduction and maintenance release
First release for STM32WBxx HAL drivers introducing stm32wb50xx devices.
@@ -1543,7 +1608,7 @@
STM32WB50xx introducti
-
Backward Compatibility
+
Backward Compatibility
This release is compatible with the previous versions.
Dependencies
This software release is compatible with:
@@ -1553,7 +1618,7 @@
Dependencies
-
Main Changes
+
Main Changes
Maintenance release
Maintenance release of HAL and Low layers drivers supporting STM32WB55xx devices.
@@ -1607,7 +1672,7 @@
Maintenance release
-
Backward Compatibility
+
Backward Compatibility
This release is compatible with the previous versions.
Dependencies
This software release is compatible with:
@@ -1617,7 +1682,7 @@
Dependencies
-
Main Changes
+
Main Changes
First release
First official release of HAL (Hardware Abstraction Layer) and LL (Low layers) drivers to support STM32WB55xx.
diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal.c b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal.c
index c848af1601..6322132981 100644
--- a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal.c
+++ b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal.c
@@ -56,7 +56,7 @@
*/
#define __STM32WBxx_HAL_VERSION_MAIN (0x01U) /*!< [31:24] main version */
#define __STM32WBxx_HAL_VERSION_SUB1 (0x0EU) /*!< [23:16] sub1 version */
-#define __STM32WBxx_HAL_VERSION_SUB2 (0x06U) /*!< [15:8] sub2 version */
+#define __STM32WBxx_HAL_VERSION_SUB2 (0x07U) /*!< [15:8] sub2 version */
#define __STM32WBxx_HAL_VERSION_RC (0x00U) /*!< [7:0] release candidate */
#define __STM32WBxx_HAL_VERSION ((__STM32WBxx_HAL_VERSION_MAIN << 24U)\
|(__STM32WBxx_HAL_VERSION_SUB1 << 16U)\
diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_crc.c b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_crc.c
index d7882aacb5..164da41cd8 100644
--- a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_crc.c
+++ b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_crc.c
@@ -452,13 +452,13 @@ static uint32_t CRC_Handle_8(CRC_HandleTypeDef *hcrc, uint8_t pBuffer[], uint32_
{
*(__IO uint8_t *)(__IO void *)(&hcrc->Instance->DR) = pBuffer[4U * i]; /* Derogation MisraC2012 R.11.5 */
}
- if ((BufferLength % 4U) == 2U)
+ else if ((BufferLength % 4U) == 2U)
{
data = ((uint16_t)(pBuffer[4U * i]) << 8U) | (uint16_t)pBuffer[(4U * i) + 1U];
pReg = (__IO uint16_t *)(__IO void *)(&hcrc->Instance->DR); /* Derogation MisraC2012 R.11.5 */
*pReg = data;
}
- if ((BufferLength % 4U) == 3U)
+ else if ((BufferLength % 4U) == 3U)
{
data = ((uint16_t)(pBuffer[4U * i]) << 8U) | (uint16_t)pBuffer[(4U * i) + 1U];
pReg = (__IO uint16_t *)(__IO void *)(&hcrc->Instance->DR); /* Derogation MisraC2012 R.11.5 */
@@ -466,6 +466,10 @@ static uint32_t CRC_Handle_8(CRC_HandleTypeDef *hcrc, uint8_t pBuffer[], uint32_
*(__IO uint8_t *)(__IO void *)(&hcrc->Instance->DR) = pBuffer[(4U * i) + 2U]; /* Derogation MisraC2012 R.11.5 */
}
+ else
+ {
+ /* Nothing to do */
+ }
}
/* Return the CRC computed value */
diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_cryp.c b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_cryp.c
index 620a032392..b155299f59 100644
--- a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_cryp.c
+++ b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_cryp.c
@@ -629,9 +629,6 @@ HAL_StatusTypeDef HAL_CRYP_SetConfig(CRYP_HandleTypeDef *hcryp, CRYP_ConfigTypeD
}
else
{
- /* Process Unlocked */
- __HAL_UNLOCK(hcryp);
-
/* Busy error code field */
hcryp->ErrorCode |= HAL_CRYP_ERROR_BUSY;
return HAL_ERROR;
@@ -685,9 +682,6 @@ HAL_StatusTypeDef HAL_CRYP_GetConfig(CRYP_HandleTypeDef *hcryp, CRYP_ConfigTypeD
}
else
{
- /* Process Unlocked */
- __HAL_UNLOCK(hcryp);
-
/* Busy error code field */
hcryp->ErrorCode |= HAL_CRYP_ERROR_BUSY;
return HAL_ERROR;
@@ -2519,10 +2513,11 @@ static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma)
uint32_t loopcounter;
uint32_t headersize_in_bytes;
uint32_t tmp;
- static const uint32_t mask[12U] = {0x0U, 0xFF000000U, 0xFFFF0000U, 0xFFFFFF00U, /* 32-bit data type */
- 0x0U, 0x0000FF00U, 0x0000FFFFU, 0xFF00FFFFU, /* 16-bit data type */
- 0x0U, 0x000000FFU, 0x0000FFFFU, 0x00FFFFFFU
- }; /* 8-bit data type */
+ const uint32_t mask[16] = {0x0U, 0xFF000000U, 0xFFFF0000U, 0xFFFFFF00U, /* 32-bit data type */
+ 0x0U, 0x0000FF00U, 0x0000FFFFU, 0xFF00FFFFU, /* 16-bit data type */
+ 0x0U, 0x000000FFU, 0x0000FFFFU, 0x00FFFFFFU, /* 8-bit data type */
+ 0x0U, 0x000000FFU, 0x0000FFFFU, 0x00FFFFFFU /* 1-bit data type */
+ };
/* Stop the DMA transfers to the IN FIFO by clearing to "0" the DMAINEN */
CLEAR_BIT(hcryp->Instance->CR, AES_CR_DMAINEN);
@@ -2628,7 +2623,7 @@ static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma)
uint32_t count;
uint32_t npblb;
uint32_t lastwordsize;
- uint32_t temp[4]; /* Temporary CrypOutBuff */
+ uint32_t temp[4] = {0U}; /* Temporary CrypOutBuff */
uint32_t mode;
CRYP_HandleTypeDef *hcryp = (CRYP_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
@@ -2869,7 +2864,7 @@ static HAL_StatusTypeDef CRYP_SetHeaderDMAConfig(CRYP_HandleTypeDef *hcryp, uint
static void CRYP_AES_ProcessData(CRYP_HandleTypeDef *hcryp, uint32_t Timeout)
{
- uint32_t temp[4]; /* Temporary CrypOutBuff */
+ uint32_t temp[4] = {0U}; /* Temporary CrypOutBuff */
uint32_t i;
/* Write the input block in the IN FIFO */
@@ -2931,7 +2926,7 @@ static void CRYP_AES_ProcessData(CRYP_HandleTypeDef *hcryp, uint32_t Timeout)
*/
static void CRYP_AES_IT(CRYP_HandleTypeDef *hcryp)
{
- uint32_t temp[4]; /* Temporary CrypOutBuff */
+ uint32_t temp[4] = {0U}; /* Temporary CrypOutBuff */
uint32_t i;
if (hcryp->State == HAL_CRYP_STATE_BUSY)
@@ -3085,7 +3080,7 @@ static HAL_StatusTypeDef CRYP_AESGCM_Process(CRYP_HandleTypeDef *hcryp, uint32_t
uint32_t tickstart;
uint32_t wordsize = ((uint32_t)hcryp->Size / 4U) ;
uint32_t npblb;
- uint32_t temp[4]; /* Temporary CrypOutBuff */
+ uint32_t temp[4] = {0U}; /* Temporary CrypOutBuff */
uint32_t index;
uint32_t lastwordsize;
uint32_t incount; /* Temporary CrypInCount Value */
@@ -3293,10 +3288,11 @@ static HAL_StatusTypeDef CRYP_AESGCM_Process_IT(CRYP_HandleTypeDef *hcryp)
uint32_t DoKeyIVConfig = 1U; /* By default, carry out peripheral Key and IV configuration */
uint32_t headersize_in_bytes;
uint32_t tmp;
- static const uint32_t mask[12U] = {0x0U, 0xFF000000U, 0xFFFF0000U, 0xFFFFFF00U, /* 32-bit data type */
- 0x0U, 0x0000FF00U, 0x0000FFFFU, 0xFF00FFFFU, /* 16-bit data type */
- 0x0U, 0x000000FFU, 0x0000FFFFU, 0x00FFFFFFU
- }; /* 8-bit data type */
+ const uint32_t mask[16] = {0x0U, 0xFF000000U, 0xFFFF0000U, 0xFFFFFF00U, /* 32-bit data type */
+ 0x0U, 0x0000FF00U, 0x0000FFFFU, 0xFF00FFFFU, /* 16-bit data type */
+ 0x0U, 0x000000FFU, 0x0000FFFFU, 0x00FFFFFFU, /* 8-bit data type */
+ 0x0U, 0x000000FFU, 0x0000FFFFU, 0x00FFFFFFU /* 1-bit data type */
+ };
#if (USE_HAL_CRYP_SUSPEND_RESUME == 1U)
@@ -3762,7 +3758,7 @@ static HAL_StatusTypeDef CRYP_AESCCM_Process(CRYP_HandleTypeDef *hcryp, uint32_t
uint32_t loopcounter;
uint32_t npblb;
uint32_t lastwordsize;
- uint32_t temp[4] ; /* Temporary CrypOutBuff */
+ uint32_t temp[4] = {0U}; /* Temporary CrypOutBuff */
uint32_t incount; /* Temporary CrypInCount Value */
uint32_t outcount; /* Temporary CrypOutCount Value */
uint32_t DoKeyIVConfig = 1U; /* By default, carry out peripheral Key and IV configuration */
@@ -3965,10 +3961,11 @@ static HAL_StatusTypeDef CRYP_AESCCM_Process_IT(CRYP_HandleTypeDef *hcryp)
uint32_t DoKeyIVConfig = 1U; /* By default, carry out peripheral Key and IV configuration */
uint32_t headersize_in_bytes;
uint32_t tmp;
- static const uint32_t mask[12U] = {0x0U, 0xFF000000U, 0xFFFF0000U, 0xFFFFFF00U, /* 32-bit data type */
- 0x0U, 0x0000FF00U, 0x0000FFFFU, 0xFF00FFFFU, /* 16-bit data type */
- 0x0U, 0x000000FFU, 0x0000FFFFU, 0x00FFFFFFU
- }; /* 8-bit data type */
+ const uint32_t mask[16] = {0x0U, 0xFF000000U, 0xFFFF0000U, 0xFFFFFF00U, /* 32-bit data type */
+ 0x0U, 0x0000FF00U, 0x0000FFFFU, 0xFF00FFFFU, /* 16-bit data type */
+ 0x0U, 0x000000FFU, 0x0000FFFFU, 0x00FFFFFFU, /* 8-bit data type */
+ 0x0U, 0x000000FFU, 0x0000FFFFU, 0x00FFFFFFU /* 1-bit data type */
+ };
#if (USE_HAL_CRYP_SUSPEND_RESUME == 1U)
if ((hcryp->Phase == CRYP_PHASE_HEADER_SUSPENDED) || (hcryp->Phase == CRYP_PHASE_PAYLOAD_SUSPENDED))
@@ -4418,7 +4415,7 @@ static HAL_StatusTypeDef CRYP_AESCCM_Process_DMA(CRYP_HandleTypeDef *hcryp)
static void CRYP_GCMCCM_SetPayloadPhase_IT(CRYP_HandleTypeDef *hcryp)
{
uint32_t loopcounter;
- uint32_t temp[4]; /* Temporary CrypOutBuff */
+ uint32_t temp[4] = {0U}; /* Temporary CrypOutBuff */
uint32_t lastwordsize;
uint32_t npblb;
uint32_t mode;
@@ -4576,7 +4573,7 @@ static HAL_StatusTypeDef CRYP_GCMCCM_SetPayloadPhase_DMA(CRYP_HandleTypeDef *hcr
uint32_t index;
uint32_t npblb;
uint32_t lastwordsize;
- uint32_t temp[4]; /* Temporary CrypOutBuff */
+ uint32_t temp[4] = {0U}; /* Temporary CrypOutBuff */
uint32_t count;
uint32_t reg;
@@ -4709,10 +4706,11 @@ static HAL_StatusTypeDef CRYP_GCMCCM_SetHeaderPhase(CRYP_HandleTypeDef *hcryp, u
uint32_t loopcounter;
uint32_t size_in_bytes;
uint32_t tmp;
- static const uint32_t mask[12U] = {0x0U, 0xFF000000U, 0xFFFF0000U, 0xFFFFFF00U, /* 32-bit data type */
- 0x0U, 0x0000FF00U, 0x0000FFFFU, 0xFF00FFFFU, /* 16-bit data type */
- 0x0U, 0x000000FFU, 0x0000FFFFU, 0x00FFFFFFU
- }; /* 8-bit data type */
+ const uint32_t mask[16] = {0x0U, 0xFF000000U, 0xFFFF0000U, 0xFFFFFF00U, /* 32-bit data type */
+ 0x0U, 0x0000FF00U, 0x0000FFFFU, 0xFF00FFFFU, /* 16-bit data type */
+ 0x0U, 0x000000FFU, 0x0000FFFFU, 0x00FFFFFFU, /* 8-bit data type */
+ 0x0U, 0x000000FFU, 0x0000FFFFU, 0x00FFFFFFU /* 1-bit data type */
+ };
/***************************** Header phase for GCM/GMAC or CCM *********************************/
if (hcryp->Init.HeaderWidthUnit == CRYP_HEADERWIDTHUNIT_WORD)
@@ -4870,10 +4868,11 @@ static HAL_StatusTypeDef CRYP_GCMCCM_SetHeaderPhase_DMA(CRYP_HandleTypeDef *hcry
uint32_t loopcounter;
uint32_t headersize_in_bytes;
uint32_t tmp;
- static const uint32_t mask[12U] = {0x0U, 0xFF000000U, 0xFFFF0000U, 0xFFFFFF00U, /* 32-bit data type */
- 0x0U, 0x0000FF00U, 0x0000FFFFU, 0xFF00FFFFU, /* 16-bit data type */
- 0x0U, 0x000000FFU, 0x0000FFFFU, 0x00FFFFFFU
- }; /* 8-bit data type */
+ const uint32_t mask[16] = {0x0U, 0xFF000000U, 0xFFFF0000U, 0xFFFFFF00U, /* 32-bit data type */
+ 0x0U, 0x0000FF00U, 0x0000FFFFU, 0xFF00FFFFU, /* 16-bit data type */
+ 0x0U, 0x000000FFU, 0x0000FFFFU, 0x00FFFFFFU, /* 8-bit data type */
+ 0x0U, 0x000000FFU, 0x0000FFFFU, 0x00FFFFFFU /* 1-bit data type */
+ };
/***************************** Header phase for GCM/GMAC or CCM *********************************/
if (hcryp->Init.HeaderWidthUnit == CRYP_HEADERWIDTHUNIT_WORD)
@@ -4993,10 +4992,11 @@ static void CRYP_GCMCCM_SetHeaderPhase_IT(CRYP_HandleTypeDef *hcryp)
uint32_t mode;
uint32_t headersize_in_bytes;
uint32_t tmp;
- static const uint32_t mask[12U] = {0x0U, 0xFF000000U, 0xFFFF0000U, 0xFFFFFF00U, /* 32-bit data type */
- 0x0U, 0x0000FF00U, 0x0000FFFFU, 0xFF00FFFFU, /* 16-bit data type */
- 0x0U, 0x000000FFU, 0x0000FFFFU, 0x00FFFFFFU
- }; /* 8-bit data type */
+ const uint32_t mask[16] = {0x0U, 0xFF000000U, 0xFFFF0000U, 0xFFFFFF00U, /* 32-bit data type */
+ 0x0U, 0x0000FF00U, 0x0000FFFFU, 0xFF00FFFFU, /* 16-bit data type */
+ 0x0U, 0x000000FFU, 0x0000FFFFU, 0x00FFFFFFU, /* 8-bit data type */
+ 0x0U, 0x000000FFU, 0x0000FFFFU, 0x00FFFFFFU /* 1-bit data type */
+ };
if (hcryp->Init.HeaderWidthUnit == CRYP_HEADERWIDTHUNIT_WORD)
{
diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_cryp_ex.c b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_cryp_ex.c
index 16ec9793df..919811a710 100644
--- a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_cryp_ex.c
+++ b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_cryp_ex.c
@@ -31,7 +31,6 @@
*/
-
#ifdef HAL_CRYP_MODULE_ENABLED
/* Private typedef -----------------------------------------------------------*/
@@ -95,7 +94,8 @@
* @param Timeout Timeout duration
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_CRYPEx_AESGCM_GenerateAuthTAG(CRYP_HandleTypeDef *hcryp, uint32_t *AuthTag, uint32_t Timeout)
+HAL_StatusTypeDef HAL_CRYPEx_AESGCM_GenerateAuthTAG(CRYP_HandleTypeDef *hcryp, const uint32_t *AuthTag,
+ uint32_t Timeout)
{
uint32_t tickstart;
/* Assume first Init.HeaderSize is in words */
@@ -216,7 +216,8 @@ HAL_StatusTypeDef HAL_CRYPEx_AESGCM_GenerateAuthTAG(CRYP_HandleTypeDef *hcryp, u
* @param Timeout Timeout duration
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_CRYPEx_AESCCM_GenerateAuthTAG(CRYP_HandleTypeDef *hcryp, uint32_t *AuthTag, uint32_t Timeout)
+HAL_StatusTypeDef HAL_CRYPEx_AESCCM_GenerateAuthTAG(CRYP_HandleTypeDef *hcryp, const uint32_t *AuthTag,
+ uint32_t Timeout)
{
uint32_t tagaddr = (uint32_t)AuthTag;
uint32_t tickstart;
diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_dma_ex.c b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_dma_ex.c
index 239665cc64..9d30cc159b 100644
--- a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_dma_ex.c
+++ b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_dma_ex.c
@@ -140,7 +140,7 @@ HAL_StatusTypeDef HAL_DMAEx_ConfigMuxSync(DMA_HandleTypeDef *hdma, HAL_DMA_MuxSy
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMAEx_ConfigMuxRequestGenerator(DMA_HandleTypeDef *hdma,
- HAL_DMA_MuxRequestGeneratorConfigTypeDef *pRequestGeneratorConfig)
+ const HAL_DMA_MuxRequestGeneratorConfigTypeDef *pRequestGeneratorConfig)
{
/* Check the parameters */
assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_exti.c b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_exti.c
index ec29590244..5656f52d5b 100644
--- a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_exti.c
+++ b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_exti.c
@@ -138,7 +138,7 @@
* @param pExtiConfig Pointer on EXTI configuration to be set.
* @retval HAL Status.
*/
-HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig)
+HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, const EXTI_ConfigTypeDef *pExtiConfig)
{
__IO uint32_t *regaddr;
uint32_t regval;
@@ -263,9 +263,9 @@ HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigT
* @param pExtiConfig Pointer on structure to store Exti configuration.
* @retval HAL Status.
*/
-HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig)
+HAL_StatusTypeDef HAL_EXTI_GetConfigLine(const EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig)
{
- __IO uint32_t *regaddr;
+ const __IO uint32_t *regaddr;
uint32_t regval;
uint32_t linepos;
uint32_t maskline;
@@ -357,7 +357,7 @@ HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigT
* @param hexti Exti handle.
* @retval HAL Status.
*/
-HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(EXTI_HandleTypeDef *hexti)
+HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(const EXTI_HandleTypeDef *hexti)
{
__IO uint32_t *regaddr;
uint32_t regval;
@@ -491,7 +491,7 @@ HAL_StatusTypeDef HAL_EXTI_GetHandle(EXTI_HandleTypeDef *hexti, uint32_t ExtiLin
* @param hexti Exti handle.
* @retval none.
*/
-void HAL_EXTI_IRQHandler(EXTI_HandleTypeDef *hexti)
+void HAL_EXTI_IRQHandler(const EXTI_HandleTypeDef *hexti)
{
__IO uint32_t *regaddr;
uint32_t regval;
@@ -529,12 +529,12 @@ void HAL_EXTI_IRQHandler(EXTI_HandleTypeDef *hexti)
* This parameter is kept for compatibility with other series.
* @retval 1 if interrupt is pending else 0.
*/
-uint32_t HAL_EXTI_GetPending(EXTI_HandleTypeDef *hexti, uint32_t Edge)
+uint32_t HAL_EXTI_GetPending(const EXTI_HandleTypeDef *hexti, uint32_t Edge)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(Edge);
- __IO uint32_t *regaddr;
+ const __IO uint32_t *regaddr;
uint32_t regval;
uint32_t linepos;
uint32_t maskline;
@@ -567,7 +567,7 @@ uint32_t HAL_EXTI_GetPending(EXTI_HandleTypeDef *hexti, uint32_t Edge)
* This parameter is kept for compatibility with other series.
* @retval None.
*/
-void HAL_EXTI_ClearPending(EXTI_HandleTypeDef *hexti, uint32_t Edge)
+void HAL_EXTI_ClearPending(const EXTI_HandleTypeDef *hexti, uint32_t Edge)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(Edge);
@@ -597,7 +597,7 @@ void HAL_EXTI_ClearPending(EXTI_HandleTypeDef *hexti, uint32_t Edge)
* @param hexti Exti handle.
* @retval None.
*/
-void HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef *hexti)
+void HAL_EXTI_GenerateSWI(const EXTI_HandleTypeDef *hexti)
{
__IO uint32_t *regaddr;
uint32_t maskline;
diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_gpio.c b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_gpio.c
index 564acc3c4c..70ff6ad27d 100644
--- a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_gpio.c
+++ b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_gpio.c
@@ -161,9 +161,9 @@
* the configuration information for the specified GPIO peripheral.
* @retval None
*/
-void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
+void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, const GPIO_InitTypeDef *GPIO_Init)
{
- uint32_t position = 0x00u;
+ uint32_t position = 0x00UL;
uint32_t iocurrent;
uint32_t temp;
@@ -218,7 +218,7 @@ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
/* Configure Alternate function mapped with the current IO */
temp = GPIOx->AFR[position >> 3u];
- temp &= ~(0xFu << ((position & 0x07u) * 4u));
+ temp &= ~(0xFUL << ((position & 0x07UL) * 4UL));
temp |= ((GPIO_Init->Alternate) << ((position & 0x07u) * 4u));
GPIOx->AFR[position >> 3u] = temp;
}
@@ -327,7 +327,7 @@ void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin)
GPIOx->MODER |= (GPIO_MODER_MODE0 << (position * 2u));
/* Configure the default Alternate Function in current IO */
- GPIOx->AFR[position >> 3u] &= ~(0xFu << ((position & 0x07u) * 4u)) ;
+ GPIOx->AFR[position >> 3UL] &= ~(0xFUL << ((position & 0x07UL) * 4UL)) ;
/* Deactivate the Pull-up and Pull-down resistor for the current IO */
GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPD0 << (position * 2u));
@@ -366,7 +366,7 @@ void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin)
* This parameter can be GPIO_PIN_x where x can be (0..15).
* @retval The input port pin value.
*/
-GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
+GPIO_PinState HAL_GPIO_ReadPin(const GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
{
GPIO_PinState bitstatus;
diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pcd.c b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pcd.c
index a5fd6ec9c5..95463497c9 100644
--- a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pcd.c
+++ b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pcd.c
@@ -1903,7 +1903,7 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
}
else
{
- ep->xfer_buff += count;
+ ep->xfer_buff += count;
(void)USB_EPStartXfer(hpcd->Instance, ep);
}
}
diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pcd_ex.c b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pcd_ex.c
index baadd33678..6dc4d431a6 100644
--- a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pcd_ex.c
+++ b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pcd_ex.c
@@ -82,7 +82,7 @@ HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr
{
PCD_EPTypeDef *ep;
- /* initialize ep structure*/
+ /* Initialize ep structure */
if ((0x80U & ep_addr) == 0x80U)
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
@@ -97,6 +97,7 @@ HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr
{
/* Single Buffer */
ep->doublebuffer = 0U;
+
/* Configure the PMA */
ep->pmaadress = (uint16_t)pmaadress;
}
@@ -105,6 +106,7 @@ HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr
{
/* Double Buffer Endpoint */
ep->doublebuffer = 1U;
+
/* Configure the PMA */
ep->pmaaddr0 = (uint16_t)(pmaadress & 0xFFFFU);
ep->pmaaddr1 = (uint16_t)((pmaadress & 0xFFFF0000U) >> 16);
@@ -124,13 +126,11 @@ HAL_StatusTypeDef HAL_PCDEx_ActivateBCD(PCD_HandleTypeDef *hpcd)
USB_TypeDef *USBx = hpcd->Instance;
hpcd->battery_charging_active = 1U;
- /* Enable BCD feature */
- USBx->BCDR |= USB_BCDR_BCDEN;
-
- /* Enable DCD : Data Contact Detect */
USBx->BCDR &= ~(USB_BCDR_PDEN);
USBx->BCDR &= ~(USB_BCDR_SDEN);
- USBx->BCDR |= USB_BCDR_DCDEN;
+
+ /* Enable BCD feature */
+ USBx->BCDR |= USB_BCDR_BCDEN;
return HAL_OK;
}
@@ -162,21 +162,10 @@ void HAL_PCDEx_BCD_VBUSDetect(PCD_HandleTypeDef *hpcd)
uint32_t tickstart = HAL_GetTick();
/* Wait for Min DCD Timeout */
- HAL_Delay(300U);
+ HAL_Delay(350U);
- /* Data Pin Contact ? Check Detect flag */
- if ((USBx->BCDR & USB_BCDR_DCDET) == USB_BCDR_DCDET)
- {
-#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
- hpcd->BCDCallback(hpcd, PCD_BCD_CONTACT_DETECTION);
-#else
- HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_CONTACT_DETECTION);
-#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
- }
/* Primary detection: checks if connected to Standard Downstream Port
(without charging capability) */
- USBx->BCDR &= ~(USB_BCDR_DCDEN);
- HAL_Delay(50U);
USBx->BCDR |= (USB_BCDR_PDEN);
HAL_Delay(50U);
diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pka.c b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pka.c
index 7feb7b5741..74c3466122 100644
--- a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pka.c
+++ b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pka.c
@@ -276,9 +276,9 @@
/** @defgroup PKA_Private_Functions PKA Private Functions
* @{
*/
-uint32_t PKA_GetMode(PKA_HandleTypeDef *hpka);
-HAL_StatusTypeDef PKA_PollEndOfOperation(PKA_HandleTypeDef *hpka, uint32_t Timeout, uint32_t Tickstart);
-uint32_t PKA_CheckError(PKA_HandleTypeDef *hpka, uint32_t mode);
+uint32_t PKA_GetMode(const PKA_HandleTypeDef *hpka);
+HAL_StatusTypeDef PKA_PollEndOfOperation(const PKA_HandleTypeDef *hpka, uint32_t Timeout, uint32_t Tickstart);
+uint32_t PKA_CheckError(const PKA_HandleTypeDef *hpka, uint32_t mode);
uint32_t PKA_GetBitSize_u8(uint32_t byteNumber);
uint32_t PKA_GetOptBitSize_u8(uint32_t byteNumber, uint8_t msb);
uint32_t PKA_GetBitSize_u32(uint32_t wordNumber);
@@ -760,7 +760,6 @@ HAL_StatusTypeDef HAL_PKA_ModExp(PKA_HandleTypeDef *hpka, PKA_ModExpInTypeDef *i
{
/* Set input parameter in PKA RAM */
PKA_ModExp_Set(hpka, in);
-
/* Start the operation */
return PKA_Process(hpka, PKA_MODE_MODULAR_EXP, Timeout);
}
@@ -775,7 +774,6 @@ HAL_StatusTypeDef HAL_PKA_ModExp_IT(PKA_HandleTypeDef *hpka, PKA_ModExpInTypeDef
{
/* Set input parameter in PKA RAM */
PKA_ModExp_Set(hpka, in);
-
/* Start the operation */
return PKA_Process_IT(hpka, PKA_MODE_MODULAR_EXP);
}
@@ -791,7 +789,6 @@ HAL_StatusTypeDef HAL_PKA_ModExpFastMode(PKA_HandleTypeDef *hpka, PKA_ModExpFast
{
/* Set input parameter in PKA RAM */
PKA_ModExpFastMode_Set(hpka, in);
-
/* Start the operation */
return PKA_Process(hpka, PKA_MODE_MODULAR_EXP_FAST_MODE, Timeout);
}
@@ -806,7 +803,6 @@ HAL_StatusTypeDef HAL_PKA_ModExpFastMode_IT(PKA_HandleTypeDef *hpka, PKA_ModExpF
{
/* Set input parameter in PKA RAM */
PKA_ModExpFastMode_Set(hpka, in);
-
/* Start the operation */
return PKA_Process_IT(hpka, PKA_MODE_MODULAR_EXP_FAST_MODE);
}
@@ -840,7 +836,6 @@ HAL_StatusTypeDef HAL_PKA_ECDSASign(PKA_HandleTypeDef *hpka, PKA_ECDSASignInType
{
/* Set input parameter in PKA RAM */
PKA_ECDSASign_Set(hpka, in);
-
/* Start the operation */
return PKA_Process(hpka, PKA_MODE_ECDSA_SIGNATURE, Timeout);
}
@@ -855,7 +850,6 @@ HAL_StatusTypeDef HAL_PKA_ECDSASign_IT(PKA_HandleTypeDef *hpka, PKA_ECDSASignInT
{
/* Set input parameter in PKA RAM */
PKA_ECDSASign_Set(hpka, in);
-
/* Start the operation */
return PKA_Process_IT(hpka, PKA_MODE_ECDSA_SIGNATURE);
}
@@ -1032,7 +1026,6 @@ HAL_StatusTypeDef HAL_PKA_ECCMul(PKA_HandleTypeDef *hpka, PKA_ECCMulInTypeDef *i
{
/* Set input parameter in PKA RAM */
PKA_ECCMul_Set(hpka, in);
-
/* Start the operation */
return PKA_Process(hpka, PKA_MODE_ECC_MUL, Timeout);
}
@@ -1047,7 +1040,6 @@ HAL_StatusTypeDef HAL_PKA_ECCMul_IT(PKA_HandleTypeDef *hpka, PKA_ECCMulInTypeDef
{
/* Set input parameter in PKA RAM */
PKA_ECCMul_Set(hpka, in);
-
/* Start the operation */
return PKA_Process_IT(hpka, PKA_MODE_ECC_MUL);
}
@@ -1544,12 +1536,11 @@ void HAL_PKA_RAMReset(PKA_HandleTypeDef *hpka)
void HAL_PKA_IRQHandler(PKA_HandleTypeDef *hpka)
{
uint32_t mode = PKA_GetMode(hpka);
- FlagStatus addErrFlag = __HAL_PKA_GET_FLAG(hpka, PKA_FLAG_ADDRERR);
- FlagStatus ramErrFlag = __HAL_PKA_GET_FLAG(hpka, PKA_FLAG_RAMERR);
- FlagStatus procEndFlag = __HAL_PKA_GET_FLAG(hpka, PKA_FLAG_PROCEND);
+ uint32_t itsource = READ_REG(hpka->Instance->CR);
+ uint32_t flag = READ_REG(hpka->Instance->SR);
/* Address error interrupt occurred */
- if ((__HAL_PKA_GET_IT_SOURCE(hpka, PKA_IT_ADDRERR) == SET) && (addErrFlag == SET))
+ if (((itsource & PKA_IT_ADDRERR) == PKA_IT_ADDRERR) && ((flag & PKA_FLAG_ADDRERR) == PKA_FLAG_ADDRERR))
{
hpka->ErrorCode |= HAL_PKA_ERROR_ADDRERR;
@@ -1558,7 +1549,7 @@ void HAL_PKA_IRQHandler(PKA_HandleTypeDef *hpka)
}
/* RAM access error interrupt occurred */
- if ((__HAL_PKA_GET_IT_SOURCE(hpka, PKA_IT_RAMERR) == SET) && (ramErrFlag == SET))
+ if (((itsource & PKA_IT_RAMERR) == PKA_IT_RAMERR) && ((flag & PKA_FLAG_RAMERR) == PKA_FLAG_RAMERR))
{
hpka->ErrorCode |= HAL_PKA_ERROR_RAMERR;
@@ -1586,7 +1577,7 @@ void HAL_PKA_IRQHandler(PKA_HandleTypeDef *hpka)
}
/* End Of Operation interrupt occurred */
- if ((__HAL_PKA_GET_IT_SOURCE(hpka, PKA_IT_PROCEND) == SET) && (procEndFlag == SET))
+ if (((itsource & PKA_IT_PROCEND) == PKA_IT_PROCEND) && ((flag & PKA_FLAG_PROCEND) == PKA_FLAG_PROCEND))
{
/* Clear PROCEND flag */
__HAL_PKA_CLEAR_FLAG(hpka, PKA_FLAG_PROCEND);
@@ -1655,7 +1646,7 @@ __weak void HAL_PKA_ErrorCallback(PKA_HandleTypeDef *hpka)
* @param hpka PKA handle
* @retval HAL status
*/
-HAL_PKA_StateTypeDef HAL_PKA_GetState(PKA_HandleTypeDef *hpka)
+HAL_PKA_StateTypeDef HAL_PKA_GetState(const PKA_HandleTypeDef *hpka)
{
/* Return PKA handle state */
return hpka->State;
@@ -1666,7 +1657,7 @@ HAL_PKA_StateTypeDef HAL_PKA_GetState(PKA_HandleTypeDef *hpka)
* @param hpka PKA handle
* @retval PKA error code
*/
-uint32_t HAL_PKA_GetError(PKA_HandleTypeDef *hpka)
+uint32_t HAL_PKA_GetError(const PKA_HandleTypeDef *hpka)
{
/* Return PKA handle error code */
return hpka->ErrorCode;
@@ -1689,7 +1680,7 @@ uint32_t HAL_PKA_GetError(PKA_HandleTypeDef *hpka)
* @param hpka PKA handle
* @retval Return the current mode
*/
-uint32_t PKA_GetMode(PKA_HandleTypeDef *hpka)
+uint32_t PKA_GetMode(const PKA_HandleTypeDef *hpka)
{
/* return the shifted PKA_CR_MODE value */
return (uint32_t)(READ_BIT(hpka->Instance->CR, PKA_CR_MODE) >> PKA_CR_MODE_Pos);
@@ -1702,7 +1693,7 @@ uint32_t PKA_GetMode(PKA_HandleTypeDef *hpka)
* @param Tickstart Tick start value
* @retval HAL status
*/
-HAL_StatusTypeDef PKA_PollEndOfOperation(PKA_HandleTypeDef *hpka, uint32_t Timeout, uint32_t Tickstart)
+HAL_StatusTypeDef PKA_PollEndOfOperation(const PKA_HandleTypeDef *hpka, uint32_t Timeout, uint32_t Tickstart)
{
/* Wait for the end of operation or timeout */
while ((hpka->Instance->SR & PKA_SR_PROCENDF) == 0UL)
@@ -1725,7 +1716,7 @@ HAL_StatusTypeDef PKA_PollEndOfOperation(PKA_HandleTypeDef *hpka, uint32_t Timeo
* @param mode PKA operating mode
* @retval error code
*/
-uint32_t PKA_CheckError(PKA_HandleTypeDef *hpka, uint32_t mode)
+uint32_t PKA_CheckError(const PKA_HandleTypeDef *hpka, uint32_t mode)
{
uint32_t err = HAL_PKA_ERROR_NONE;
@@ -2061,20 +2052,20 @@ void PKA_ModExpFastMode_Set(PKA_HandleTypeDef *hpka, PKA_ModExpFastModeInTypeDef
/* Move the input parameters pOp1 to PKA RAM */
PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_MODULAR_EXP_IN_EXPONENT_BASE], in->pOp1, in->OpSize);
- __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_MODULAR_EXP_IN_EXPONENT_BASE + (in->OpSize / 4UL));
+ __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_MODULAR_EXP_IN_EXPONENT_BASE + ((in->OpSize + 3UL) / 4UL));
/* Move the exponent to PKA RAM */
PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_MODULAR_EXP_IN_EXPONENT], in->pExp, in->expSize);
- __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_MODULAR_EXP_IN_EXPONENT + (in->expSize / 4UL));
+ __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_MODULAR_EXP_IN_EXPONENT + ((in->expSize + 3UL) / 4UL));
/* Move the modulus to PKA RAM */
PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_MODULAR_EXP_IN_MODULUS], in->pMod, in->OpSize);
- __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_MODULAR_EXP_IN_MODULUS + (in->OpSize / 4UL));
+ __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_MODULAR_EXP_IN_MODULUS + ((in->OpSize + 3UL) / 4UL));
/* Move the Montgomery parameter to PKA RAM */
PKA_Memcpy_u32_to_u32(&hpka->Instance->RAM[PKA_MODULAR_EXP_IN_MONTGOMERY_PARAM], in->pMontgomeryParam,
in->OpSize / 4UL);
- __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_MODULAR_EXP_IN_MONTGOMERY_PARAM + (in->OpSize / 4UL));
+ __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_MODULAR_EXP_IN_MONTGOMERY_PARAM + ((in->OpSize + 3UL) / 4UL));
}
@@ -2082,6 +2073,8 @@ void PKA_ModExpFastMode_Set(PKA_HandleTypeDef *hpka, PKA_ModExpFastModeInTypeDef
* @brief Set input parameters.
* @param hpka PKA handle
* @param in Input information
+ * @note If the modulus size is bigger than the hash size (with a curve SECP521R1 when using a SHA256 hash
+ * for example)the hash value should be written at the end of the buffer with zeros padding at beginning.
*/
void PKA_ECDSASign_Set(PKA_HandleTypeDef *hpka, PKA_ECDSASignInTypeDef *in)
{
@@ -2294,7 +2287,6 @@ void PKA_ECCMul_Set(PKA_HandleTypeDef *hpka, PKA_ECCMulInTypeDef *in)
}
-
/**
* @brief Set input parameters.
* @param hpka PKA handle
@@ -2374,7 +2366,7 @@ void PKA_ModRed_Set(PKA_HandleTypeDef *hpka, PKA_ModRedInTypeDef *in)
/* Move the input parameters modulus value n to PKA RAM */
PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_MODULAR_REDUC_IN_MODULUS], in->pMod, in->modSize);
- __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_MODULAR_REDUC_IN_MODULUS + (in->modSize / 4UL));
+ __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_MODULAR_REDUC_IN_MODULUS + ((in->modSize + 3UL) / 4UL));
}
/**
diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rtc.c b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rtc.c
index b5ba9b2fba..8d249c8181 100644
--- a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rtc.c
+++ b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rtc.c
@@ -1656,7 +1656,7 @@ HAL_StatusTypeDef HAL_RTC_PollForAlarmAEvent(RTC_HandleTypeDef *hrtc, uint32_t T
{
if (Timeout != HAL_MAX_DELAY)
{
- if ((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
+ if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
{
hrtc->State = HAL_RTC_STATE_TIMEOUT;
return HAL_TIMEOUT;
@@ -1909,14 +1909,15 @@ HAL_StatusTypeDef RTC_ExitInitMode(RTC_HandleTypeDef *hrtc)
uint8_t RTC_ByteToBcd2(uint8_t number)
{
uint32_t bcdhigh = 0U;
+ uint8_t bcdlow = number;
- while (number >= 10U)
+ while (bcdlow >= 10U)
{
bcdhigh++;
- number -= 10U;
+ bcdlow -= 10U;
}
- return ((uint8_t)(bcdhigh << 4U) | number);
+ return ((uint8_t)(bcdhigh << 4U) | bcdlow);
}
/**
diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rtc_ex.c b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rtc_ex.c
index c7944f3c0f..d937a55597 100644
--- a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rtc_ex.c
+++ b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rtc_ex.c
@@ -1033,7 +1033,7 @@ HAL_StatusTypeDef HAL_RTCEx_PollForTimeStampEvent(RTC_HandleTypeDef *hrtc, uint3
{
if (Timeout != HAL_MAX_DELAY)
{
- if ((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
+ if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
{
hrtc->State = HAL_RTC_STATE_TIMEOUT;
return HAL_TIMEOUT;
@@ -1078,7 +1078,7 @@ HAL_StatusTypeDef HAL_RTCEx_PollForTamper1Event(RTC_HandleTypeDef *hrtc, uint32_
{
if (Timeout != HAL_MAX_DELAY)
{
- if ((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
+ if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
{
hrtc->State = HAL_RTC_STATE_TIMEOUT;
return HAL_TIMEOUT;
@@ -1115,7 +1115,7 @@ HAL_StatusTypeDef HAL_RTCEx_PollForTamper2Event(RTC_HandleTypeDef *hrtc, uint32_
{
if (Timeout != HAL_MAX_DELAY)
{
- if ((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
+ if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
{
hrtc->State = HAL_RTC_STATE_TIMEOUT;
return HAL_TIMEOUT;
@@ -1149,7 +1149,7 @@ HAL_StatusTypeDef HAL_RTCEx_PollForTamper3Event(RTC_HandleTypeDef *hrtc, uint32_
{
if (Timeout != HAL_MAX_DELAY)
{
- if ((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
+ if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
{
hrtc->State = HAL_RTC_STATE_TIMEOUT;
return HAL_TIMEOUT;
@@ -1519,7 +1519,7 @@ HAL_StatusTypeDef HAL_RTCEx_PollForWakeUpTimerEvent(RTC_HandleTypeDef *hrtc, uin
{
if (Timeout != HAL_MAX_DELAY)
{
- if ((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
+ if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
{
hrtc->State = HAL_RTC_STATE_TIMEOUT;
return HAL_TIMEOUT;
@@ -2069,7 +2069,7 @@ HAL_StatusTypeDef HAL_RTCEx_PollForAlarmBEvent(RTC_HandleTypeDef *hrtc, uint32_t
{
if (Timeout != HAL_MAX_DELAY)
{
- if ((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
+ if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
{
hrtc->State = HAL_RTC_STATE_TIMEOUT;
return HAL_TIMEOUT;
diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_tim.c b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_tim.c
index 8704dc8295..9c80aa6d71 100644
--- a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_tim.c
+++ b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_tim.c
@@ -4585,7 +4585,6 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t
((BurstLength) >> 8U) + 1U);
-
return status;
}
@@ -7036,12 +7035,13 @@ static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Co
/* Check parameters */
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
+ /* Disable the Channel 1N: Reset the CC1NE Bit */
+ TIMx->CCER &= ~TIM_CCER_CC1NE;
+
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC1NP;
/* Set the Output N Polarity */
tmpccer |= OC_Config->OCNPolarity;
- /* Reset the Output N State */
- tmpccer &= ~TIM_CCER_CC1NE;
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
@@ -7112,12 +7112,13 @@ void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
+ /* Disable the Channel 2N: Reset the CC2NE Bit */
+ TIMx->CCER &= ~TIM_CCER_CC2NE;
+
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC2NP;
/* Set the Output N Polarity */
tmpccer |= (OC_Config->OCNPolarity << 4U);
- /* Reset the Output N State */
- tmpccer &= ~TIM_CCER_CC2NE;
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
@@ -7187,12 +7188,13 @@ static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Co
{
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
+ /* Disable the Channel 3N: Reset the CC3NE Bit */
+ TIMx->CCER &= ~TIM_CCER_CC3NE;
+
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC3NP;
/* Set the Output N Polarity */
tmpccer |= (OC_Config->OCNPolarity << 8U);
- /* Reset the Output N State */
- tmpccer &= ~TIM_CCER_CC3NE;
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
@@ -7539,9 +7541,18 @@ void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_
uint32_t tmpccmr1;
uint32_t tmpccer;
- /* Disable the Channel 1: Reset the CC1E Bit */
+ /* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
+
+ /* Disable the Channel 1: Reset the CC1E Bit */
TIMx->CCER &= ~TIM_CCER_CC1E;
+ /* Disable the Channel 1N: Reset the CC1NE Bit */
+ if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1))
+ {
+ TIMx->CCER &= ~TIM_CCER_CC1NE;
+ }
+
+ /* Get the TIMx CCMR1 register value */
tmpccmr1 = TIMx->CCMR1;
/* Select the Input */
@@ -7585,9 +7596,18 @@ static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity,
uint32_t tmpccmr1;
uint32_t tmpccer;
- /* Disable the Channel 1: Reset the CC1E Bit */
+ /* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
+
+ /* Disable the Channel 1: Reset the CC1E Bit */
TIMx->CCER &= ~TIM_CCER_CC1E;
+ /* Disable the Channel 1N: Reset the CC1NE Bit */
+ if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1))
+ {
+ TIMx->CCER &= ~TIM_CCER_CC1NE;
+ }
+
+ /* Get the TIMx CCMR1 register value */
tmpccmr1 = TIMx->CCMR1;
/* Set the filter */
@@ -7629,9 +7649,18 @@ static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32
uint32_t tmpccmr1;
uint32_t tmpccer;
- /* Disable the Channel 2: Reset the CC2E Bit */
+ /* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
+
+ /* Disable the Channel 2: Reset the CC2E Bit */
TIMx->CCER &= ~TIM_CCER_CC2E;
+ /* Disable the Channel 2N: Reset the CC2NE Bit */
+ if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2))
+ {
+ TIMx->CCER &= ~TIM_CCER_CC2NE;
+ }
+
+ /* Get the TIMx CCMR1 register value */
tmpccmr1 = TIMx->CCMR1;
/* Select the Input */
@@ -7668,9 +7697,18 @@ static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity,
uint32_t tmpccmr1;
uint32_t tmpccer;
- /* Disable the Channel 2: Reset the CC2E Bit */
+ /* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
+
+ /* Disable the Channel 2: Reset the CC2E Bit */
TIMx->CCER &= ~TIM_CCER_CC2E;
+ /* Disable the Channel 2N: Reset the CC2NE Bit */
+ if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2))
+ {
+ TIMx->CCER &= ~TIM_CCER_CC2NE;
+ }
+
+ /* Get the TIMx CCMR1 register value */
tmpccmr1 = TIMx->CCMR1;
/* Set the filter */
@@ -7712,9 +7750,18 @@ static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32
uint32_t tmpccmr2;
uint32_t tmpccer;
- /* Disable the Channel 3: Reset the CC3E Bit */
+ /* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
+
+ /* Disable the Channel 3: Reset the CC3E Bit */
TIMx->CCER &= ~TIM_CCER_CC3E;
+ /* Disable the Channel 3N: Reset the CC3NE Bit */
+ if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3))
+ {
+ TIMx->CCER &= ~TIM_CCER_CC3NE;
+ }
+
+ /* Get the TIMx CCMR2 register value */
tmpccmr2 = TIMx->CCMR2;
/* Select the Input */
@@ -7760,9 +7807,13 @@ static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32
uint32_t tmpccmr2;
uint32_t tmpccer;
- /* Disable the Channel 4: Reset the CC4E Bit */
+ /* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
+
+ /* Disable the Channel 4: Reset the CC4E Bit */
TIMx->CCER &= ~TIM_CCER_CC4E;
+
+ /* Get the TIMx CCMR2 register value */
tmpccmr2 = TIMx->CCMR2;
/* Select the Input */
@@ -7849,10 +7900,10 @@ void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler,
* @param TIMx to select the TIM peripheral
* @param Channel specifies the TIM Channel
* This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1
- * @arg TIM_CHANNEL_2: TIM Channel 2
- * @arg TIM_CHANNEL_3: TIM Channel 3
- * @arg TIM_CHANNEL_4: TIM Channel 4
+ * @arg TIM_CHANNEL_1: TIM Channel 1 selected
+ * @arg TIM_CHANNEL_2: TIM Channel 2 selected
+ * @arg TIM_CHANNEL_3: TIM Channel 3 selected
+ * @arg TIM_CHANNEL_4: TIM Channel 4 selected
* @arg TIM_CHANNEL_5: TIM Channel 5 selected
* @arg TIM_CHANNEL_6: TIM Channel 6 selected
* @param ChannelState specifies the TIM Channel CCxE bit new state.
diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_tim_ex.c b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_tim_ex.c
index 8b327a5f41..303aa5bbe5 100644
--- a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_tim_ex.c
+++ b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_tim_ex.c
@@ -2612,9 +2612,9 @@ HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(const TIM_HandleTypeDef *htim
* @param htim TIM handle
* @param ChannelN TIM Complementary channel
* This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1
- * @arg TIM_CHANNEL_2: TIM Channel 2
- * @arg TIM_CHANNEL_3: TIM Channel 3
+ * @arg TIM_CHANNEL_1: TIM Channel 1 selected
+ * @arg TIM_CHANNEL_2: TIM Channel 2 selected
+ * @arg TIM_CHANNEL_3: TIM Channel 3 selected
* @retval TIM Complementary channel state
*/
HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(const TIM_HandleTypeDef *htim, uint32_t ChannelN)
@@ -2773,9 +2773,9 @@ static void TIM_DMAErrorCCxN(DMA_HandleTypeDef *hdma)
* @param TIMx to select the TIM peripheral
* @param Channel specifies the TIM Channel
* This parameter can be one of the following values:
- * @arg TIM_CHANNEL_1: TIM Channel 1
- * @arg TIM_CHANNEL_2: TIM Channel 2
- * @arg TIM_CHANNEL_3: TIM Channel 3
+ * @arg TIM_CHANNEL_1: TIM Channel 1 selected
+ * @arg TIM_CHANNEL_2: TIM Channel 2 selected
+ * @arg TIM_CHANNEL_3: TIM Channel 3 selected
* @param ChannelNState specifies the TIM Channel CCxNE bit new state.
* This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable.
* @retval None
diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_timebase_tim_template.c b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_timebase_tim_template.c
index dcf86f3ca5..70fc9a4b59 100644
--- a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_timebase_tim_template.c
+++ b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_timebase_tim_template.c
@@ -116,6 +116,11 @@ HAL_StatusTypeDef status = HAL_OK;
TimHandle.Init.RepetitionCounter = 0U;
if (HAL_TIM_Base_Init(&TimHandle) == HAL_OK)
{
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1U)
+ /* Register callback */
+ HAL_TIM_RegisterCallback(&TimHandle, HAL_TIM_PERIOD_ELAPSED_CB_ID, TimeBase_TIM_PeriodElapsedCallback);
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+
/* Start the TIM time Base generation in interrupt mode */
if (HAL_TIM_Base_Start_IT(&TimHandle) == HAL_OK)
{
diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_uart.c b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_uart.c
index 43e4986a90..529530d8ca 100644
--- a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_uart.c
+++ b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_uart.c
@@ -1190,7 +1190,15 @@ HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pD
huart->Instance->TDR = (uint8_t)(*pdata8bits & 0xFFU);
pdata8bits++;
}
- huart->TxXferCount--;
+ if ((huart->gState & HAL_UART_STATE_BUSY_TX) == HAL_UART_STATE_BUSY_TX)
+ {
+ huart->TxXferCount--;
+ }
+ else
+ {
+ /* Process was aborted during the transmission */
+ return HAL_ERROR;
+ }
}
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
@@ -1294,7 +1302,15 @@ HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, ui
*pdata8bits = (uint8_t)(huart->Instance->RDR & (uint8_t)uhMask);
pdata8bits++;
}
- huart->RxXferCount--;
+ if (huart->RxState == HAL_UART_STATE_BUSY_RX)
+ {
+ huart->RxXferCount--;
+ }
+ else
+ {
+ /* Process was aborted during the reception */
+ return HAL_ERROR;
+ }
}
/* At end of Rx process, restore huart->RxState to Ready */
@@ -1784,10 +1800,6 @@ HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart)
}
}
- /* Reset Tx and Rx transfer counters */
- huart->TxXferCount = 0U;
- huart->RxXferCount = 0U;
-
/* Clear the Error flags in the ICR register */
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
@@ -1854,9 +1866,6 @@ HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart)
}
}
- /* Reset Tx transfer counter */
- huart->TxXferCount = 0U;
-
/* Flush the whole TX FIFO (if needed) */
if (huart->FifoMode == UART_FIFOMODE_ENABLE)
{
@@ -1919,9 +1928,6 @@ HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart)
}
}
- /* Reset Rx transfer counter */
- huart->RxXferCount = 0U;
-
/* Clear the Error flags in the ICR register */
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
@@ -2047,10 +2053,6 @@ HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart)
/* if no DMA abort complete callback execution is required => call user Abort Complete callback */
if (abortcplt == 1U)
{
- /* Reset Tx and Rx transfer counters */
- huart->TxXferCount = 0U;
- huart->RxXferCount = 0U;
-
/* Clear ISR function pointers */
huart->RxISR = NULL;
huart->TxISR = NULL;
@@ -2130,8 +2132,6 @@ HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart)
}
else
{
- /* Reset Tx transfer counter */
- huart->TxXferCount = 0U;
/* Clear TxISR function pointers */
huart->TxISR = NULL;
@@ -2151,9 +2151,6 @@ HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart)
}
else
{
- /* Reset Tx transfer counter */
- huart->TxXferCount = 0U;
-
/* Clear TxISR function pointers */
huart->TxISR = NULL;
@@ -2227,9 +2224,6 @@ HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart)
}
else
{
- /* Reset Rx transfer counter */
- huart->RxXferCount = 0U;
-
/* Clear RxISR function pointer */
huart->pRxBuffPtr = NULL;
@@ -2255,9 +2249,6 @@ HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart)
}
else
{
- /* Reset Rx transfer counter */
- huart->RxXferCount = 0U;
-
/* Clear RxISR function pointer */
huart->pRxBuffPtr = NULL;
@@ -3771,8 +3762,6 @@ static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma)
/* DMA Normal mode */
if (HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC))
{
- huart->TxXferCount = 0U;
-
/* Disable the DMA transfer for transmit request by resetting the DMAT bit
in the UART CR3 register */
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
@@ -3823,8 +3812,6 @@ static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
/* DMA Normal mode */
if (HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC))
{
- huart->RxXferCount = 0U;
-
/* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
@@ -3851,8 +3838,6 @@ static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
If Reception till IDLE event has been selected : use Rx Event callback */
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
{
- huart->RxXferCount = 0;
-
/* Check current nb of data still to be received on DMA side.
DMA Normal mode, remaining nb of data will be 0
DMA Circular mode, remaining nb of data is reset to RxXferSize */
@@ -3948,7 +3933,6 @@ static void UART_DMAError(DMA_HandleTypeDef *hdma)
if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) &&
(gstate == HAL_UART_STATE_BUSY_TX))
{
- huart->TxXferCount = 0U;
UART_EndTxTransfer(huart);
}
@@ -3956,7 +3940,6 @@ static void UART_DMAError(DMA_HandleTypeDef *hdma)
if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) &&
(rxstate == HAL_UART_STATE_BUSY_RX))
{
- huart->RxXferCount = 0U;
UART_EndRxTransfer(huart);
}
@@ -3980,7 +3963,6 @@ static void UART_DMAError(DMA_HandleTypeDef *hdma)
static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma)
{
UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
- huart->RxXferCount = 0U;
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/*Call registered error callback*/
@@ -4014,10 +3996,6 @@ static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma)
}
}
- /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
- huart->TxXferCount = 0U;
- huart->RxXferCount = 0U;
-
/* Reset errorCode */
huart->ErrorCode = HAL_UART_ERROR_NONE;
@@ -4069,10 +4047,6 @@ static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma)
}
}
- /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
- huart->TxXferCount = 0U;
- huart->RxXferCount = 0U;
-
/* Reset errorCode */
huart->ErrorCode = HAL_UART_ERROR_NONE;
@@ -4110,8 +4084,6 @@ static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
{
UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
- huart->TxXferCount = 0U;
-
/* Flush the whole TX FIFO (if needed) */
if (huart->FifoMode == UART_FIFOMODE_ENABLE)
{
@@ -4143,8 +4115,6 @@ static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
{
UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
- huart->RxXferCount = 0U;
-
/* Clear the Error flags in the ICR register */
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_usart.c b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_usart.c
index 9cc27bf55b..3b235d1e69 100644
--- a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_usart.c
+++ b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_usart.c
@@ -2182,7 +2182,7 @@ void HAL_USART_IRQHandler(USART_HandleTypeDef *husart)
/* USART Receiver Timeout interrupt occurred ---------------------------------*/
if (((isrflags & USART_ISR_RTOF) != 0U) && ((cr1its & USART_CR1_RTOIE) != 0U))
{
- __HAL_UART_CLEAR_FLAG(husart, UART_CLEAR_RTOF);
+ __HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_RTOF);
husart->ErrorCode |= HAL_USART_ERROR_RTO;
}
diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_crs.c b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_crs.c
index 9247887300..5cfcba918d 100644
--- a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_crs.c
+++ b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_crs.c
@@ -1,6 +1,6 @@
/**
******************************************************************************
- * @file stm32wbxx_ll_crs.h
+ * @file stm32wbxx_ll_crs.c
* @author MCD Application Team
* @brief CRS LL module driver.
******************************************************************************
@@ -15,6 +15,7 @@
*
******************************************************************************
*/
+
#if defined(USE_FULL_LL_DRIVER)
/* Includes ------------------------------------------------------------------*/
@@ -61,7 +62,6 @@ ErrorStatus LL_CRS_DeInit(void)
}
-
/**
* @}
*/
@@ -79,5 +79,5 @@ ErrorStatus LL_CRS_DeInit(void)
/**
* @}
*/
-
+
#endif /* USE_FULL_LL_DRIVER */
diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_gpio.c b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_gpio.c
index fb672a54dd..afebeb971f 100644
--- a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_gpio.c
+++ b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_gpio.c
@@ -105,7 +105,7 @@
* - SUCCESS: GPIO registers are de-initialized
* - ERROR: Wrong GPIO Port
*/
-ErrorStatus LL_GPIO_DeInit(GPIO_TypeDef *GPIOx)
+ErrorStatus LL_GPIO_DeInit(const GPIO_TypeDef *GPIOx)
{
ErrorStatus status = SUCCESS;
diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_pka.c b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_pka.c
index 3e7bcadc3b..39fd4e6e95 100644
--- a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_pka.c
+++ b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_pka.c
@@ -84,7 +84,7 @@
* - SUCCESS: PKA registers are de-initialized
* - ERROR: PKA registers are not de-initialized
*/
-ErrorStatus LL_PKA_DeInit(PKA_TypeDef *PKAx)
+ErrorStatus LL_PKA_DeInit(const PKA_TypeDef *PKAx)
{
ErrorStatus status = SUCCESS;
diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_tim.c b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_tim.c
index dbfeea3943..49d4a931fa 100644
--- a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_tim.c
+++ b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_tim.c
@@ -563,8 +563,6 @@ void LL_TIM_HALLSENSOR_StructInit(LL_TIM_HALLSENSOR_InitTypeDef *TIM_HallSensorI
* @note Channel 2 is configured in output PWM 2 mode.
* @note Compare value stored in TIMx_CCR2 corresponds to the commutation delay.
* @note OC2REF is selected as trigger output on TRGO.
- * @note LL_TIM_IC_POLARITY_BOTHEDGE must not be used for TI1 when it is used
- * when TIMx operates in Hall sensor interface mode.
* @param TIMx Timer Instance
* @param TIM_HallSensorInitStruct pointer to a @ref LL_TIM_HALLSENSOR_InitTypeDef structure (TIMx HALL sensor
* interface configuration data structure)
diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_usb.c b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_usb.c
index ee652db260..f936fe6998 100644
--- a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_usb.c
+++ b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_usb.c
@@ -64,7 +64,7 @@
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
-HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
+HAL_StatusTypeDef USB_CoreInit(USB_TypeDef const *USBx, USB_CfgTypeDef cfg)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(USBx);
@@ -133,7 +133,7 @@ HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx)
* @arg USB_DEVICE_MODE Peripheral mode
* @retval HAL status
*/
-HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode)
+HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef const *USBx, USB_ModeTypeDef mode)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(USBx);
diff --git a/system/Drivers/STM32YYxx_HAL_Driver_version.md b/system/Drivers/STM32YYxx_HAL_Driver_version.md
index 53c59791e4..497c70145e 100644
--- a/system/Drivers/STM32YYxx_HAL_Driver_version.md
+++ b/system/Drivers/STM32YYxx_HAL_Driver_version.md
@@ -19,7 +19,7 @@
* STM32U0: 1.3.0
* STM32U3: 1.1.0
* STM32U5: 1.6.2
- * STM32WB: 1.14.6
+ * STM32WB: 1.14.7
* STM32WB0: 1.4.0
* STM32WBA: 1.8.0
* STM32WL: 1.4.0