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Releases: sy2002/QNICE-FPGA

Version 1.6 September 7, 2020

07 Sep 12:04
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  • ISA: QNICE Instruction Set Architecture updated to version 1.6. The changes
    are:

    • Interrupt system added.
    • HALT instruction changed. The semantics opened the way for CONTROL
      instructions such has HALT, RTI, INCRB and DECRB. The latter two mean that
      instead of adding/subtracting something to the upper byte of the SR, one
      can use these new commands.
    • SHL and SHR now modify Z and N condition flags.
      The new ISA is documented in doc/intro/qnice_intro.pdf.
  • PERFORMANCE: The new ISA leads to a speed increase of about 7% as documented
    in q-tris_perf_test.asm compared to the old ISA. The main reason is that
    the new INCRB/DECRB only need two cycles compared to 4 cycles when switching
    banks the old way. This leads to faster sub-routine calls.

  • MMIO: Cleaned up the MMIO address space and by doing so, changed all the
    locations of MMIO devices in sysdef.asm. This breaks binary compatibility
    with all software from version 1.5 and older, and therefore all this
    software needs to be reassembled and recompiled to run on version 1.6.

  • CPU: Updates to reflect the new ISA. Added interrupt system. And a
    comprehensive CPU test was added (test_programs/cpu_test.asm) and multiple
    CPU bugs were fixed both in the emulator and in the hardware.

  • MEGA65: Ported QNICE-FPGA to the MEGA65 (https://mega65.org/). This includes
    adding HDMI and HyperRAM support for the MEGA65.

  • TIMER INTERRUPT GENERATOR: Added. Is internally running on 100 kHz and
    contains two independent counters (see sysdef.asm for details).

  • INSTRUCTION COUNTER: Added. Counts all instructions executed by the CPU.
    Can be used for performance testing as shown in
    test_programs/q-tris_perf_test.asm and test_programs/mandel_perf_test.asm.

  • UART: Added a 32 Byte FIFO to the UART. This was necessary because the
    MEGA65 serial over JTAG does not support RTS/CTS and therefore we needed
    more stability. Now RTS/CTS should be unnecessary in most cases.

  • VHDL REFACTORINGS: The following system-wide refactorings have taken place
    with the goal to improve the code quality and the FPGA performance:

    • register_file optimized to use LUTRAM instead of registers.
    • replaced Tristate based inout DATA bus by separate DATA_IN and DATA_OUT.
    • got rid of the large if/elsif/then section in mmio_mux and replaced by
      more elegant direct logic assignments.
    • line endings in source files are now consistent with the unix scheme.
  • MONITOR: Disassembler can now handle the new ISA.

  • EMULATOR: Updated to reflect the new ISA.

  • EMULATOR: Usability improved: At the "Q>" prompt the emulator now displays
    the address from which the last instruction was read from. When an emulator
    run is interrupted by CRTL/C (SIGINT) the statistics page now also lists
    the last 16 addresses from which instructions were executed.

  • EMULATOR: Made the WebAssembly target compatible with Emscripten 1.39.14
    (and newer and it still works with 1.39.10 and some of the older versions,
    but not with the versions in between). The background of this phenomenon is
    explained here: emscripten-core/emscripten#10746

  • EMULATOR: Adjusted the standard emulation speed to 13.0 MIPS because this
    is the average Q-TRIS performance. Peak performance observed so far is in
    test_programs/mandel_perf_test.asm: 13.62 MIPS

  • Q-TRIS: Adjusted (slowed down) to match the CPU's speed increase by 7%.

  • TOOLCHAIN: Native assembler updated to reflect the ISA changes.

  • TOOLCHAIN: C code emitter and standard C library and Monitor library
    updated to reflect the MMIO changes. Standard C library recompiled to
    use register bank switching instead of the stack in all function calls.

  • TOOLCHAIN: qtransfer: Convenient mechanism for transferring software
    (.out files) from the host computer to QNICE-FPGA. Details: doc/README.md

  • TOOLCHAIN: Added support for Xilinx Vivado and made Vivado the main
    toolchain for our project. ISE is still supported though. Structured all
    hardware dependencies in the new folder 'hw' and added documentation
    in 'hw/README.md'.

  • TOOLCHAIN: Added Ubuntu Linux support, which means it should also run on
    any other Debian based distribution. You might want to install xclip for
    more convenience (.out copied to clipboard after assembler ran).

  • QBIN: All sample applications have been rebuilt due to changes in the ISA
    and the MMIO. A new download-link for the sample disk image is available:
    http://sy2002x.de/hwdp/qnice_disk_v16.img

  • DOCUMENTATION: Added:

    • CONTRIBUTING.md
    • doc/README.md
    • doc/best-practices.md
    • doc/how-to-release.md
    • doc/int-device.md
    • doc/mips.md
    • hw/README.md
    • vhdl/hw/MEGA65/README.md

Version 1.5 March 22, 2020

22 Mar 14:56
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This version greatly enhances the capabilities and the stability of the
emulator. Detailed description: emulator/README.md

  • qnice-vga: VGA screen and PS/2 keyboard emulation
  • qnice-wasm: WebAssembly/WebGL version that runs in the web browser

Version 1.41 December 30, 2016

30 Dec 16:53
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  • CPU: Fixed a bug which prevented things like ADD @--R4, R4 from working
    correctly, i.e. when a register was pre-decremented, then used for
    indirect reading and then the same register was the target register.
    See test_programs/predec.asm for a thorough description of this bug.
  • EMULATOR: Can emulate the SD Cards introduced in Version 1.4 by being able
    to mount raw binary images of FAT32 devices. Have a look at doc/emumount.txt
    to see how it works.
  • EMULATOR: 'dump' now shows ASCII values additionally to the hex values.
  • Fixed a bunch of typos in various places and improved the documentation.

Version 1.4 December 26, 2016

26 Dec 20:12
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  1. Hardware read-only support for SD Cards. Make sure to read the hints and
    constraints in doc/contraints.txt. To directly test the hardware without
    using the new Monitor libraries, use test_programs/sdcard.asm

  2. Software read-only support for FAT32 (new Monitor Libraries sd_library.asm
    and fat32_library.asm).

  3. Monitor: It is now possible to browse directories and to load/run files
    directly from the monitor. Partition #1 of the SD Card is automatically
    mounted when using directory or file related functions.
    New top level folder "qbin" contains demo programs that can be executed.

  4. C Compiler, Standard C Library: VBCC toolchain including VBCC compiler,
    VASM assembler and VLINK linker: Stable basic C environment including
    file system access (via fopen, fread, ...) and including convenient
    editing functions due to the fact, that the Monitor's new versatile
    gets_slf() function is used when reading from stdin. Everything is
    located in the "c" subfolder.

    Partition 1 of the SD Card is automatically mounted on-demand (upon first
    call of fopen). To test it, try c/test_programs/fread_basic.c

    Monitor library is available, that wraps monitor functions. To test it, try
    c/test_programs/shell.c

  5. EAE: Extended Arithmetic Element added: This is a 16-bit signed/unsigned
    integer multiplication (with 32bit results), division and modulo
    co-processor. An example of the impressive speedup can be seen in the
    source code comments of mandel_perf_test.asm, which shows a speedup of
    factor 4.5 compared with release version 1.3.

    For testing it, use the following programs:
    test_programs/eae.asm
    test_programs/32bit-mul.asm

  6. Further Library enhancements:

    • IO Library (Monitor): New gets function that supports CR or LF or CR/LF
      for ending the editing and that supports backspace (BS). New get_s that
      only function that reads until the buffer is full. get_slf that adds a LF
      in case the string input is ended by CR, LF or CR/LF.
    • Math Library (Monitor): mulu, muls, divu, divs, mulu32, divu32
    • String Library (Monitor): chr2lower, split, h2dstr

Version 1.3 May 6, 2016

06 May 13:18
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  • CPU: Significant speed improvement by removing old tristate driver:
    Evolution can be seen in mandel_perf_test.asm, which is now ~32% faster.
    Q-TRIS was even ~56% faster (now adjusted back to normal speed).
  • CPU: Fixed a bug that prevented things like CMP 0x00AA, 0x00FF or things
    like OR @r0++, @r0, i.e. situations, where both operands perform an
    indirect access, where the source and destination operands are identical
    and where the source operand is post-incremented.
  • ALU: Fixed CMP opcode behaviour: using the N flag it now treats the
    operands as unsigned and using the V flag it treats them as signed.
  • ALU: Fixed V flag CPU bug (AND, OR, XOR)
  • CYCLE COUNTER: Added. Counts clock cycles. Can be used for performance
    testing, as shown in test_programs/mandel_perf_test.asm.
  • DEBUG MODE: If switch #2 is ON, then the LEDs are showing the current
    address bus value in real-time and on HALT the TIL shows the address
    of the executed HALT command.
  • ASSEMBLER: Is able to handle labels on separate lines, improved error
    handling, CMP allows a constant as second operand.
  • EMULATOR: Fixed CMP opcode behaviour (see above), fixed similar CPU bug
    as described above. Outputs address of HALT instruction. Also emulates
    the new cycle counter (register compatible), but instead of counting
    clock cycles, it is counting instructions.
  • DOCUMENTATION: Added a programming card.

Version 1.21 February 13, 2016

13 Feb 23:09
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  • Fixed predecrement CPU bug
  • Q-TRIS V1.0: Tetris clone and first game ever programmed for Q-NICE.
    Needs VGA and keyboard. Located in demos/q-tris.asm, starts at 0x8000 when
    being run via the monitor. Additionally, there is a special stand-alone
    autostart bitstream for the Digilent Nexys 4 DDR in dist_kit/q-tris.bit

Version 1.2 January 10, 2016

10 Jan 21:34
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  • UART: 115.200 baud, 8-N-1, CTS from now on
  • VGA: now supports hardware scrolling and the lat9w-12 font, which supports
    besides the U.S. english charset also the German charset.
  • MONITOR: system call table, supports scrolling on VGA using CTRL+F(orward)
    and CTRL+B(backward) and PgUp/PgDn as well as the cursor keys
  • KEYBOARD: support for US and German keyboard locales and support
    for special keys like cursor keys, page-up/down, etc.
  • HALT LED implemented as LED #15
  • PORE system implemented. Most notably, this leads to not needing to
    press the reset-button after startup. Additionally, a reset message is
    displayed.
  • ASSEMBLER: bugfixes and .DW now supports .EQUs and labels as arguments

Version 1.1 December 30, 2015

30 Dec 16:30
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By default, version 1.1 behaves like version 1.0, i.e. input/output is done via UART, 8-N-1, 9.600 baud, RTS/CTS. But from version 1.1 on, you can now route the input via a PS/2 keyboard and the output via a 640x480 VGA monitor (80x40 characters):

  • PS/2 keyboard support: enable via SW0
  • VGA support: enable via SW1

Version 1.0 August 30, 2015

28 Dec 15:51
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Classic "Environment 1" (aka env1), inspired by the classic QNICE/A evaluation board environment. Features:

  • the original address layout: lower 32kB are ROM, upper 32kB are RAM
  • 16bit words stored at each address word
  • 256 registers
  • memory mapped IO beginning at 0xFF00
  • 4 TIL-311 displays at 0xFF10:
    0xFF10 is the value to be displayed
    0xFF11 lower 4 bit are a display bit mask
  • Serial interface 8-N-1, 9600 baud, RTS/CTS beginning at FF20:
    0xFF21 status register
    0xFF22 read register
    0xFF23 write register

The package contains a working monitor application (version 0.2) including the mandelbrot demo application. Furtheron, the assembler and the emulator are included.

V0.9: ISA V1.2 on env1

22 Aug 13:30
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Feature complete QNICE CPU, original instruction set architecture (ISA V1.2) as of December 2007, is running on a simulated version of the QNICE/A evaluation board. Slighly enhanced TIL display (4 digits instead of two plus a mask register). Lower 32kB are ROM, upper 32kB are RAM. No UART, yet. For convenient simulation in ISIM, the amount of register bank is restricted to 16 and RAM to 256 bytes; just change env1_globals.vhd to get the full amount of RAM of the real QNICE/A and the full register file size of the QNICE CPU.