diff --git a/common/include/RevCommon.h b/common/include/RevCommon.h index f8a2d4dc9..deeea7c8c 100644 --- a/common/include/RevCommon.h +++ b/common/include/RevCommon.h @@ -16,6 +16,7 @@ #include #include #include +#include #ifndef _REV_NUM_REGS_ #define _REV_NUM_REGS_ 32 @@ -90,20 +91,22 @@ inline uint64_t make_lsq_hash(uint16_t destReg, RevRegClass regType, unsigned Ha struct MemReq{ MemReq() = default; + MemReq(const MemReq&) = default; + MemReq& operator=(const MemReq&) = default; + ~MemReq() = default; MemReq(uint64_t addr, uint16_t dest, RevRegClass regclass, unsigned hart, MemOp req, bool outstanding, std::function func) : Addr(addr), DestReg(dest), RegType(regclass), Hart(hart), - ReqType(req), isOutstanding(outstanding), MarkLoadComplete(func) + ReqType(req), isOutstanding(outstanding), MarkLoadComplete(std::move(func)) { } - void Set(uint64_t addr, uint16_t dest, RevRegClass regclass, unsigned hart, MemOp req, bool outstanding, - std::function func) + void Set(uint64_t addr, uint16_t dest, RevRegClass regclass, unsigned hart, + MemOp req, bool outstanding, std::function func) { Addr = addr; DestReg = dest; RegType = regclass; Hart = hart; - ReqType = req; isOutstanding = outstanding; - MarkLoadComplete = func; + ReqType = req; isOutstanding = outstanding; MarkLoadComplete = std::move(func); } uint64_t Addr = _INVALID_ADDR_; diff --git a/include/RevHart.h b/include/RevHart.h index 92d06b423..9b12af46e 100644 --- a/include/RevHart.h +++ b/include/RevHart.h @@ -42,8 +42,7 @@ class RevHart{ ///< RevHart: Constructor RevHart(unsigned ID, const std::shared_ptr>& LSQueue, std::function MarkLoadCompleteFunc) - : ID(ID), LSQueue(LSQueue), MarkLoadCompleteFunc(MarkLoadCompleteFunc) {} - + : ID(ID), LSQueue(LSQueue), MarkLoadCompleteFunc(std::move(MarkLoadCompleteFunc)) {} ///< RevHart: Destructor ~RevHart() = default; diff --git a/include/RevInstHelpers.h b/include/RevInstHelpers.h index f236ba6d0..fd34c85a1 100644 --- a/include/RevInstHelpers.h +++ b/include/RevInstHelpers.h @@ -77,7 +77,7 @@ bool load(RevFeature *F, RevRegFile *R, RevMem *M, RevInst Inst) { MemOp::MemOpREAD, true, R->GetMarkLoadComplete()); - R->LSQueueInsert({make_lsq_hash(Inst.rd, RevRegClass::RegGPR, F->GetHartToExecID()), req}); + R->LSQueue->insert({make_lsq_hash(Inst.rd, RevRegClass::RegGPR, F->GetHartToExecID()), req}); M->ReadVal(F->GetHartToExecID(), rs1 + Inst.ImmSignExt(12), reinterpret_cast*>(&R->RV32[Inst.rd]), @@ -95,14 +95,14 @@ bool load(RevFeature *F, RevRegFile *R, RevMem *M, RevInst Inst) { MemOp::MemOpREAD, true, R->GetMarkLoadComplete()); - R->LSQueueInsert({make_lsq_hash(Inst.rd, RevRegClass::RegGPR, F->GetHartToExecID()), req}); + R->LSQueue->insert({make_lsq_hash(Inst.rd, RevRegClass::RegGPR, F->GetHartToExecID()), req}); M->ReadVal(F->GetHartToExecID(), rs1 + Inst.ImmSignExt(12), reinterpret_cast*>(&R->RV64[Inst.rd]), req, flags); R->SetX(Inst.rd, static_cast(R->RV64[Inst.rd])); - //std::cout << "RMT: Load Issued for address: " << std::hex << req.Addr << " Data: " << static_cast(R->RV64[Inst.rd]) << std::dec << " Dest Reg: " << req.DestReg << std::endl; + //std::cout << "RMT: Load Issued for address: " << std::hex << req.Addr << " Data: " << static_cast(R->RV64[Inst.rd]) << std::dec << " Dest Reg: " << req.DestReg << std::endl; } // update the cost @@ -118,7 +118,7 @@ bool store(RevFeature *F, RevRegFile *R, RevMem *M, RevInst Inst) { R->GetX(Inst.rs1) + Inst.ImmSignExt(12), R->GetX(Inst.rs2)); R->AdvancePC(Inst); - // std::cout << "RMT: Store Issued for address: " << std::hex << R->GetX(Inst.rs1) + Inst.ImmSignExt(12) << " Data: " << R->GetX(Inst.rs2) << std::dec << std::endl; + // std::cout << "RMT: Store Issued for address: " << std::hex << R->GetX(Inst.rs1) + Inst.ImmSignExt(12) << " Data: " << R->GetX(Inst.rs2) << std::dec << std::endl; return true; } diff --git a/include/RevRegFile.h b/include/RevRegFile.h index 961e69515..793347844 100644 --- a/include/RevRegFile.h +++ b/include/RevRegFile.h @@ -176,11 +176,6 @@ class RevRegFile { /// Set the current tracer void SetTracer(RevTracer *t) { Tracer = t; } - /// Insert an item in the Load/Store Queue - void LSQueueInsert(std::pair item){ - LSQueue->insert(std::move(item)); - } - /// Get the MarkLoadComplete function const std::function& GetMarkLoadComplete() const { return MarkLoadCompleteFunc; diff --git a/src/RevProc.cc b/src/RevProc.cc index 96ccfa15d..2e2993b52 100644 --- a/src/RevProc.cc +++ b/src/RevProc.cc @@ -455,7 +455,7 @@ RevInst RevProc::DecodeCIInst(uint16_t Inst, unsigned Entry) const { CompInst.imm = ((Inst & 0b1100000) >> 2); // [4:3] CompInst.imm |= ((Inst & 0b1000000000000) >> 7); // [5] CompInst.imm |= ((Inst & 0b11100) << 4); // [8:6] - CompInst.rs1 = 2; // Force rs1 to be x2 (stack pointer) + CompInst.rs1 = 2; // Force rs1 to be x2 (stack pointer) }else if( (CompInst.opcode == 0b10) && (CompInst.funct3 == 0b010) ){ // c.lwsp @@ -463,7 +463,7 @@ RevInst RevProc::DecodeCIInst(uint16_t Inst, unsigned Entry) const { CompInst.imm = ((Inst & 0b1110000) >> 2); // [4:2] CompInst.imm |= ((Inst & 0b1000000000000) >> 7); // [5] CompInst.imm |= ((Inst & 1100) << 4); // [7:6] - CompInst.rs1 = 2; // Force rs1 to be x2 (stack pointer) + CompInst.rs1 = 2; // Force rs1 to be x2 (stack pointer) }else if( (CompInst.opcode == 0b10) && (CompInst.funct3 == 0b011) ){ CompInst.imm = 0; @@ -472,13 +472,13 @@ RevInst RevProc::DecodeCIInst(uint16_t Inst, unsigned Entry) const { CompInst.imm = ((Inst & 0b1100000) >> 2); // [4:3] CompInst.imm |= ((Inst & 0b1000000000000) >> 7); // [5] CompInst.imm |= ((Inst & 0b11100) << 4); // [8:6] - CompInst.rs1 = 2; // Force rs1 to be x2 (stack pointer) + CompInst.rs1 = 2; // Force rs1 to be x2 (stack pointer) }else{ // c.flwsp CompInst.imm = ((Inst & 0b1110000) >> 2); // [4:2] CompInst.imm |= ((Inst & 0b1000000000000) >> 7); // [5] CompInst.imm |= ((Inst & 1100) << 4); // [7:6] - CompInst.rs1 = 2; // Force rs1 to be x2 (stack pointer) + CompInst.rs1 = 2; // Force rs1 to be x2 (stack pointer) } }else if( (CompInst.opcode == 0b01) && (CompInst.funct3 == 0b011) && @@ -491,7 +491,7 @@ RevInst RevProc::DecodeCIInst(uint16_t Inst, unsigned Entry) const { CompInst.imm |= ((Inst & 0b100000) << 1); // bit 6 CompInst.imm |= ((Inst & 0b11000) << 4); // bit 8:7 CompInst.imm |= ((Inst & 0b1000000000000) >> 3); // bit 9 - CompInst.rs1 = 2; // Force rs1 to be x2 (stack pointer) + CompInst.rs1 = 2; // Force rs1 to be x2 (stack pointer) if( (CompInst.imm & 0b1000000000) > 0 ){ // sign extend CompInst.imm |= 0b11111111111111111111111000000000; @@ -557,7 +557,7 @@ RevInst RevProc::DecodeCSSInst(uint16_t Inst, unsigned Entry) const { // c.fsdsp CompInst.imm = 0; CompInst.imm = ((Inst & 0b1110000000000) >> 7); // [5:3] - CompInst.imm |= ((Inst & 0b1110000000) >> 1); // [8:6] + CompInst.imm |= ((Inst & 0b1110000000) >> 1); // [8:6] CompInst.rs1 = 2; // Force rs1 to x2 (stack pointer) }else if( CompInst.funct3 == 0b110 ){ // c.swsp @@ -642,7 +642,7 @@ RevInst RevProc::DecodeCLInst(uint16_t Inst, unsigned Entry) const { // registers CompInst.rd = ((Inst & 0b11100) >> 2); CompInst.rs1 = ((Inst & 0b1110000000) >> 7); - + //Apply compressed offset CompInst.rd = CRegIdx(CompInst.rd); CompInst.rs1 = CRegIdx(CompInst.rs1); @@ -757,11 +757,8 @@ RevInst RevProc::DecodeCAInst(uint16_t Inst, unsigned Entry) const { //Adjust registers for compressed offset CompInst.rs2 = CRegIdx(CompInst.rs2); - CompInst.rs1 = CRegIdx(CompInst.rs1); - CompInst.rd = CRegIdx(CompInst.rd); - //All instructions of this format expand to rd rd rs2, so set rs1 to rd - CompInst.rs1 = CompInst.rd; + CompInst.rs1 = CompInst.rd = CRegIdx(CompInst.rd); CompInst.instSize = 2; CompInst.compressed = true; @@ -812,7 +809,7 @@ RevInst RevProc::DecodeCBInst(uint16_t Inst, unsigned Entry) const { tmp[7] = o[7]; } else if( (CompInst.opcode == 0b01) && (CompInst.funct3 == 0b100)) { //We have a shift or a andi - CompInst.rd = CompInst.rs1; //Already has compressed offset applied + CompInst.rd = CompInst.rs1; //Already has compressed offset applied } CompInst.offset = ((uint16_t)tmp.to_ulong()) << 1; // scale to corrrect position to be consistent with other compressed ops @@ -1938,7 +1935,6 @@ bool RevProc::ClockTick( SST::Cycle_t currentCycle ){ AddThreadsThatChangedState(std::move(ActiveThread)); } } - return rtn; }