diff --git a/common/include/RevCommon.h b/common/include/RevCommon.h index deeea7c8c..b566409cc 100644 --- a/common/include/RevCommon.h +++ b/common/include/RevCommon.h @@ -85,30 +85,48 @@ enum class MemOp : uint8_t { std::ostream& operator<<(std::ostream& os, MemOp op); -inline uint64_t make_lsq_hash(uint16_t destReg, RevRegClass regType, unsigned HartID){ - return static_cast(regType) << (16 + 8) | static_cast(destReg) << 16 | HartID; -}; +template +constexpr uint64_t LSQHash(T DestReg, RevRegClass RegType, unsigned Hart){ + return static_cast(RegType) << (16 + 8) | static_cast(DestReg) << 16 | Hart; +} struct MemReq{ MemReq() = default; MemReq(const MemReq&) = default; + MemReq(MemReq&&) = default; MemReq& operator=(const MemReq&) = default; + MemReq& operator=(MemReq&&) = default; ~MemReq() = default; - MemReq(uint64_t addr, uint16_t dest, RevRegClass regclass, - unsigned hart, MemOp req, bool outstanding, std::function func) : - Addr(addr), DestReg(dest), RegType(regclass), Hart(hart), - ReqType(req), isOutstanding(outstanding), MarkLoadComplete(std::move(func)) - { + template + MemReq(uint64_t Addr, + T DestReg, + RevRegClass RegType, + unsigned Hart, + MemOp ReqType, + bool isOutstanding, + std::function MarkLoadCompleteFunc) : + Addr(Addr), + DestReg(uint16_t(DestReg)), + RegType(RegType), + Hart(Hart), + ReqType(ReqType), + isOutstanding(isOutstanding), + MarkLoadCompleteFunc(std::move(MarkLoadCompleteFunc)){} + + void MarkLoadComplete() const { + MarkLoadCompleteFunc(*this); + } + + auto LSQHash() const { + return SST::RevCPU::LSQHash(DestReg, RegType, Hart); } - void Set(uint64_t addr, uint16_t dest, RevRegClass regclass, unsigned hart, - MemOp req, bool outstanding, std::function func) - { - Addr = addr; DestReg = dest; RegType = regclass; Hart = hart; - ReqType = req; isOutstanding = outstanding; MarkLoadComplete = std::move(func); + auto LSQHashPair() const { + return std::make_pair( LSQHash(), *this ); } +private: uint64_t Addr = _INVALID_ADDR_; uint16_t DestReg = 0; RevRegClass RegType = RevRegClass::RegUNKNOWN; @@ -116,11 +134,11 @@ struct MemReq{ MemOp ReqType = MemOp::MemOpCUSTOM; bool isOutstanding = false; - std::function MarkLoadComplete = nullptr; + std::function MarkLoadCompleteFunc = nullptr; - //std::shared_ptr> LSQueue; - // std::function) SetComplete; - // add lambda that clears the dependency bit directly so we don't need to search the hash + friend class RevTracer; + friend class RevMem; + friend class RevProc; };//struct MemReq // Enum for tracking the state of a RevThread. diff --git a/include/RevInstHelpers.h b/include/RevInstHelpers.h index ae8fadd16..b856ea963 100644 --- a/include/RevInstHelpers.h +++ b/include/RevInstHelpers.h @@ -66,22 +66,21 @@ unsigned fclass(T val, bool quietNaN = true) { /// Load template template bool load(RevFeature *F, RevRegFile *R, RevMem *M, RevInst Inst) { - MemReq req{}; if( sizeof(T) < sizeof(int64_t) && R->IsRV32 ){ static constexpr RevFlag flags = sizeof(T) < sizeof(int32_t) ? std::is_signed_v ? RevFlag::F_SEXT32 : RevFlag::F_ZEXT32 : RevFlag::F_NONE; uint64_t rs1 = R->GetX(Inst.rs1); // read once for tracer - req.Set(rs1 + Inst.ImmSignExt(12), - Inst.rd, RevRegClass::RegGPR, - F->GetHartToExecID(), - MemOp::MemOpREAD, - true, - R->GetMarkLoadComplete()); - R->LSQueue->insert({make_lsq_hash(Inst.rd, RevRegClass::RegGPR, F->GetHartToExecID()), req}); + MemReq req(rs1 + Inst.ImmSignExt(12), + Inst.rd, RevRegClass::RegGPR, + F->GetHartToExecID(), + MemOp::MemOpREAD, + true, + R->GetMarkLoadComplete()); + R->LSQueue->insert(req.LSQHashPair()); M->ReadVal(F->GetHartToExecID(), rs1 + Inst.ImmSignExt(12), reinterpret_cast*>(&R->RV32[Inst.rd]), - req, + std::move(req), flags); R->SetX(Inst.rd, static_cast(R->RV32[Inst.rd])); @@ -89,17 +88,17 @@ bool load(RevFeature *F, RevRegFile *R, RevMem *M, RevInst Inst) { static constexpr RevFlag flags = sizeof(T) < sizeof(int64_t) ? std::is_signed_v ? RevFlag::F_SEXT64 : RevFlag::F_ZEXT64 : RevFlag::F_NONE; uint64_t rs1 = R->GetX(Inst.rs1); - req.Set(rs1 + Inst.ImmSignExt(12), - Inst.rd, RevRegClass::RegGPR, - F->GetHartToExecID(), - MemOp::MemOpREAD, - true, - R->GetMarkLoadComplete()); - R->LSQueue->insert({make_lsq_hash(Inst.rd, RevRegClass::RegGPR, F->GetHartToExecID()), req}); + MemReq req(rs1 + Inst.ImmSignExt(12), + Inst.rd, RevRegClass::RegGPR, + F->GetHartToExecID(), + MemOp::MemOpREAD, + true, + R->GetMarkLoadComplete()); + R->LSQueue->insert(req.LSQHashPair()); M->ReadVal(F->GetHartToExecID(), rs1 + Inst.ImmSignExt(12), reinterpret_cast*>(&R->RV64[Inst.rd]), - req, + std::move(req), flags); R->SetX(Inst.rd, static_cast(R->RV64[Inst.rd])); } @@ -123,24 +122,23 @@ bool store(RevFeature *F, RevRegFile *R, RevMem *M, RevInst Inst) { /// Floating-point load template template bool fload(RevFeature *F, RevRegFile *R, RevMem *M, RevInst Inst) { - MemReq req{}; if(std::is_same_v || F->HasD()){ static constexpr RevFlag flags = sizeof(T) < sizeof(double) ? RevFlag::F_BOXNAN : RevFlag::F_NONE; uint64_t rs1 = R->GetX(Inst.rs1); - req.Set(rs1 + Inst.ImmSignExt(12), - Inst.rd, - RevRegClass::RegFLOAT, - F->GetHartToExecID(), - MemOp::MemOpREAD, - true, - R->GetMarkLoadComplete()); - R->LSQueue->insert({make_lsq_hash(Inst.rd, RevRegClass::RegFLOAT, F->GetHartToExecID()), req}); + MemReq req(rs1 + Inst.ImmSignExt(12), + Inst.rd, + RevRegClass::RegFLOAT, + F->GetHartToExecID(), + MemOp::MemOpREAD, + true, + R->GetMarkLoadComplete()); + R->LSQueue->insert(req.LSQHashPair()); M->ReadVal(F->GetHartToExecID(), rs1 + Inst.ImmSignExt(12), reinterpret_cast(&R->DPF[Inst.rd]), - req, + std::move(req), flags); // Box float value into 64-bit FP register @@ -151,18 +149,18 @@ bool fload(RevFeature *F, RevRegFile *R, RevMem *M, RevInst Inst) { } }else{ uint64_t rs1 = R->GetX(Inst.rs1); - req.Set(rs1 + Inst.ImmSignExt(12), - Inst.rd, - RevRegClass::RegFLOAT, - F->GetHartToExecID(), - MemOp::MemOpREAD, - true, - R->GetMarkLoadComplete()); - R->LSQueue->insert({make_lsq_hash(Inst.rd, RevRegClass::RegFLOAT, F->GetHartToExecID()), req}); + MemReq req(rs1 + Inst.ImmSignExt(12), + Inst.rd, + RevRegClass::RegFLOAT, + F->GetHartToExecID(), + MemOp::MemOpREAD, + true, + R->GetMarkLoadComplete()); + R->LSQueue->insert(req.LSQHashPair()); M->ReadVal(F->GetHartToExecID(), rs1 + Inst.ImmSignExt(12), &R->SPF[Inst.rd], - req, + std::move(req), RevFlag::F_NONE); } // update the cost diff --git a/include/RevPrefetcher.h b/include/RevPrefetcher.h index 668e1ebab..96ee16bef 100644 --- a/include/RevPrefetcher.h +++ b/include/RevPrefetcher.h @@ -19,6 +19,7 @@ #include "RevMem.h" #include "RevFeature.h" +#include "RevRegFile.h" namespace SST::RevCPU{ diff --git a/include/RevProc.h b/include/RevProc.h index 9e43220cc..9414ff51e 100644 --- a/include/RevProc.h +++ b/include/RevProc.h @@ -746,7 +746,7 @@ class RevProc{ bool LSQCheck(unsigned HartID, const RevRegFile* regFile, uint16_t reg, RevRegClass regClass) const { return (reg != 0 || regClass != RevRegClass::RegGPR) && - regFile->GetLSQueue()->count(make_lsq_hash(reg, regClass, HartID)) > 0; + regFile->GetLSQueue()->count(LSQHash(reg, regClass, HartID)) > 0; } /// RevProc: Check scoreboard for a source register dependency @@ -780,20 +780,22 @@ class RevProc{ } /// RevProc: Set or clear scoreboard based on register number and floating point. - void DependencySet(unsigned HartID, uint16_t RegNum, + template + void DependencySet(unsigned HartID, T RegNum, bool isFloat, bool value = true){ - if( RegNum < _REV_NUM_REGS_ ){ + if( size_t(RegNum) < _REV_NUM_REGS_ ){ RevRegFile* regFile = GetRegFile(HartID); if(isFloat){ - regFile->FP_Scoreboard[RegNum] = value; - }else if( RegNum != 0 ){ - regFile->RV_Scoreboard[RegNum] = value; + regFile->FP_Scoreboard[size_t(RegNum)] = value; + }else if( size_t(RegNum) != 0 ){ + regFile->RV_Scoreboard[size_t(RegNum)] = value; } } } /// RevProc: Clear scoreboard on instruction retirement - void DependencyClear(unsigned HartID, uint16_t RegNum, bool isFloat){ + template + void DependencyClear(unsigned HartID, T RegNum, bool isFloat){ DependencySet(HartID, RegNum, isFloat, false); } diff --git a/include/RevRegFile.h b/include/RevRegFile.h index 793347844..8a257af21 100644 --- a/include/RevRegFile.h +++ b/include/RevRegFile.h @@ -40,7 +40,7 @@ inline void BoxNaN(double* dest, const void* value){ } /// RISC-V Register Mneumonics -enum class RevReg { +enum class RevReg : uint16_t { zero = 0, ra = 1, sp = 2, gp = 3, tp = 4, t0 = 5, t1 = 6, t2 = 7, s0 = 8, s1 = 9, a0 = 10, a1 = 11, a2 = 12, a3 = 13, a4 = 14, a5 = 15, a6 = 16, a7 = 17, s2 = 18, s3 = 19, s4 = 20, s5 = 21, s6 = 22, s7 = 23, diff --git a/include/insns/RV32A.h b/include/insns/RV32A.h index 88fd94cd7..b144748d1 100644 --- a/include/insns/RV32A.h +++ b/include/insns/RV32A.h @@ -21,17 +21,16 @@ namespace SST::RevCPU{ class RV32A : public RevExt { static bool lrw(RevFeature *F, RevRegFile *R, RevMem *M, RevInst Inst) { - MemReq req; if( R->IsRV32 ){ - req.Set(uint64_t(R->RV32[Inst.rs1]), Inst.rd, RevRegClass::RegGPR, F->GetHartToExecID(), MemOp::MemOpAMO, true, R->GetMarkLoadComplete()); - R->LSQueue->insert({make_lsq_hash(req.DestReg, req.RegType, req.Hart), req}); + MemReq req(uint64_t(R->RV32[Inst.rs1]), Inst.rd, RevRegClass::RegGPR, F->GetHartToExecID(), MemOp::MemOpAMO, true, R->GetMarkLoadComplete()); + R->LSQueue->insert( req.LSQHashPair() ); M->LR(F->GetHartToExecID(), uint64_t(R->RV32[Inst.rs1]), &R->RV32[Inst.rd], Inst.aq, Inst.rl, req, RevFlag::F_SEXT32); }else{ - req.Set(R->RV64[Inst.rs1], Inst.rd, RevRegClass::RegGPR, F->GetHartToExecID(), MemOp::MemOpAMO, true, R->GetMarkLoadComplete()); - R->LSQueue->insert({make_lsq_hash(req.DestReg, req.RegType, req.Hart), req}); + MemReq req(R->RV64[Inst.rs1], Inst.rd, RevRegClass::RegGPR, F->GetHartToExecID(), MemOp::MemOpAMO, true, R->GetMarkLoadComplete()); + R->LSQueue->insert( req.LSQHashPair() ); M->LR(F->GetHartToExecID(), R->RV64[Inst.rs1], reinterpret_cast(&R->RV64[Inst.rd]), Inst.aq, Inst.rl, req, @@ -72,18 +71,15 @@ class RV32A : public RevExt { flags |= uint32_t(RevFlag::F_RL); } - MemReq req; if( R->IsRV32 ){ - req.Set(R->RV32[Inst.rs1], - Inst.rd, - RevRegClass::RegGPR, - F->GetHartToExecID(), - MemOp::MemOpAMO, - true, - R->GetMarkLoadComplete()); - R->LSQueue->insert({make_lsq_hash(Inst.rd, - RevRegClass::RegGPR, - F->GetHartToExecID()), req}); + MemReq req(R->RV32[Inst.rs1], + Inst.rd, + RevRegClass::RegGPR, + F->GetHartToExecID(), + MemOp::MemOpAMO, + true, + R->GetMarkLoadComplete()); + R->LSQueue->insert( req.LSQHashPair() ); M->AMOVal(F->GetHartToExecID(), R->RV32[Inst.rs1], &R->RV32[Inst.rs2], @@ -92,16 +88,14 @@ class RV32A : public RevExt { RevFlag{flags}); }else{ flags |= uint32_t(RevFlag::F_SEXT64); - req.Set(R->RV64[Inst.rs1], - Inst.rd, - RevRegClass::RegGPR, - F->GetHartToExecID(), - MemOp::MemOpAMO, - true, - R->GetMarkLoadComplete()); - R->LSQueue->insert({make_lsq_hash(Inst.rd, - RevRegClass::RegGPR, - F->GetHartToExecID()), req}); + MemReq req(R->RV64[Inst.rs1], + Inst.rd, + RevRegClass::RegGPR, + F->GetHartToExecID(), + MemOp::MemOpAMO, + true, + R->GetMarkLoadComplete()); + R->LSQueue->insert( req.LSQHashPair() ); M->AMOVal(F->GetHartToExecID(), R->RV64[Inst.rs1], reinterpret_cast(&R->RV64[Inst.rs2]), diff --git a/include/insns/RV64A.h b/include/insns/RV64A.h index 9b6be9a35..b5b69aac0 100644 --- a/include/insns/RV64A.h +++ b/include/insns/RV64A.h @@ -22,7 +22,7 @@ class RV64A : public RevExt { static bool lrd(RevFeature *F, RevRegFile *R, RevMem *M, RevInst Inst) { MemReq req(R->RV64[Inst.rs1], Inst.rd, RevRegClass::RegGPR, F->GetHartToExecID(), MemOp::MemOpAMO, true, R->GetMarkLoadComplete() ); - R->LSQueue->insert({make_lsq_hash(req.DestReg, req.RegType, req.Hart), req}); + R->LSQueue->insert( req.LSQHashPair() ); M->LR(F->GetHartToExecID(), R->RV64[Inst.rs1], &R->RV64[Inst.rd], @@ -63,9 +63,7 @@ class RV64A : public RevExt { MemOp::MemOpAMO, true, R->GetMarkLoadComplete()); - R->LSQueue->insert({make_lsq_hash(Inst.rd, - RevRegClass::RegGPR, - F->GetHartToExecID()), req}); + R->LSQueue->insert( req.LSQHashPair() ); M->AMOVal(F->GetHartToExecID(), R->RV64[Inst.rs1], &R->RV64[Inst.rs2], diff --git a/src/RevCPU.cc b/src/RevCPU.cc index bca931151..47b73f027 100644 --- a/src/RevCPU.cc +++ b/src/RevCPU.cc @@ -14,7 +14,8 @@ #include #include -using namespace SST::RevCPU; +namespace SST::RevCPU{ + using MemSegment = RevMem::MemSegment; const char splash_msg[] = "\ @@ -851,4 +852,5 @@ void RevCPU::InitMainThread(uint32_t MainThreadID, const uint64_t StartAddr){ ReadyThreads.emplace_back(std::move(MainThread)); } +} // namespace SST::RevCPU // EOF diff --git a/src/RevExt.cc b/src/RevExt.cc index a153525ea..59730361b 100644 --- a/src/RevExt.cc +++ b/src/RevExt.cc @@ -9,7 +9,7 @@ // #include "RevExt.h" -using namespace SST::RevCPU; +namespace SST::RevCPU{ /// Change the FP environment auto RevExt::SetFPEnv(unsigned Inst, const RevInst& payload, uint16_t HartID, RevRegFile* regFile){ @@ -82,4 +82,5 @@ bool RevExt::Execute(unsigned Inst, const RevInst& payload, uint16_t HartID, Rev return ret; } +} // namespace SST::RevCPU // EOF diff --git a/src/RevFeature.cc b/src/RevFeature.cc index 04aa37a4d..3b28c93a0 100644 --- a/src/RevFeature.cc +++ b/src/RevFeature.cc @@ -13,7 +13,7 @@ #include #include -using namespace SST::RevCPU; +namespace SST::RevCPU{ RevFeature::RevFeature( std::string Machine, SST::Output *Output, @@ -101,4 +101,5 @@ bool RevFeature::ParseMachineModel(){ return false; } +} // namespace SST::RevCPU // EOF diff --git a/src/RevLoader.cc b/src/RevLoader.cc index bd34dcd93..9b791032a 100644 --- a/src/RevLoader.cc +++ b/src/RevLoader.cc @@ -11,7 +11,8 @@ #include "RevLoader.h" #include "RevMem.h" -using namespace SST::RevCPU; +namespace SST::RevCPU{ + using MemSegment = RevMem::MemSegment; RevLoader::RevLoader( std::string Exe, std::string Args, @@ -648,4 +649,5 @@ std::map *SST::RevCPU::RevLoader::GetTraceSymbols() return &tracer_symbols; } +} // namespace SST::RevCPU // EOF diff --git a/src/RevMem.cc b/src/RevMem.cc index d9b021a8a..1cfaa54f4 100644 --- a/src/RevMem.cc +++ b/src/RevMem.cc @@ -17,7 +17,8 @@ #include #include -using namespace SST::RevCPU; +namespace SST::RevCPU{ + using MemSegment = RevMem::MemSegment; RevMem::RevMem( uint64_t MemSize, RevOpts *Opts, RevMemCtrl *Ctrl, SST::Output *Output ) @@ -147,7 +148,7 @@ bool RevMem::LRBase(unsigned Hart, uint64_t Addr, size_t Len, }else{ memcpy(DataMem, BaseMem, Len); // clear the hazard - req.MarkLoadComplete(req); + req.MarkLoadComplete(); } return true; @@ -582,7 +583,7 @@ bool RevMem::AMOMem(unsigned Hart, uint64_t Addr, size_t Len, } // clear the hazard - req.MarkLoadComplete(req); + req.MarkLoadComplete(); delete[] TmpD; delete[] TmpT; } @@ -833,7 +834,7 @@ bool RevMem::ReadMem(unsigned Hart, uint64_t Addr, size_t Len, void *Target, } // clear the hazard - if this was an AMO operation then we will clear outside of this function in AMOMem() if(MemOp::MemOpAMO != req.ReqType){ - req.MarkLoadComplete(req); + req.MarkLoadComplete(); } } #ifdef _REV_DEBUG_ @@ -850,7 +851,7 @@ bool RevMem::ReadMem(unsigned Hart, uint64_t Addr, size_t Len, void *Target, // clear the hazard- if this was an AMO operation then we will clear outside of this function in AMOMem() if(MemOp::MemOpAMO != req.ReqType){ TRACE_MEM_READ(Addr, Len, DataMem); - req.MarkLoadComplete(req); + req.MarkLoadComplete(); } } } @@ -1004,4 +1005,5 @@ uint64_t RevMem::ExpandHeap(uint64_t Size){ return heapend; } +} // namespace SST::RevCPU // EOF diff --git a/src/RevMemCtrl.cc b/src/RevMemCtrl.cc index c3ef03a80..530f2fbe9 100644 --- a/src/RevMemCtrl.cc +++ b/src/RevMemCtrl.cc @@ -1315,7 +1315,7 @@ void RevBasicMemCtrl::handleReadResp(StandardMem::ReadResp* ev){ } const MemReq& r = op->getMemReq(); if( !isAMO ){ - r.MarkLoadComplete(r); + r.MarkLoadComplete(); } delete op; } @@ -1340,7 +1340,7 @@ void RevBasicMemCtrl::handleReadResp(StandardMem::ReadResp* ev){ const MemReq& r = op->getMemReq(); if( !isAMO ){ TRACE_MEM_READ_RESPONSE(op->getSize(), op->getTarget(), &r); - r.MarkLoadComplete(r); + r.MarkLoadComplete(); } delete op; outstanding.erase(ev->getID()); @@ -1470,7 +1470,7 @@ void RevBasicMemCtrl::handleWriteResp(StandardMem::WriteResp* ev){ // this was the last request to service, delete the op const MemReq& r = op->getMemReq(); if( isAMO ){ - r.MarkLoadComplete(r); + r.MarkLoadComplete(); } delete op; } @@ -1486,7 +1486,7 @@ void RevBasicMemCtrl::handleWriteResp(StandardMem::WriteResp* ev){ if( isAMO ){ // write the target std::vector tempT = op->getTempT(); - r.MarkLoadComplete(r); + r.MarkLoadComplete(); } delete op; outstanding.erase(ev->getID()); diff --git a/src/RevOpts.cc b/src/RevOpts.cc index 9d9af536c..77cf5deea 100644 --- a/src/RevOpts.cc +++ b/src/RevOpts.cc @@ -9,7 +9,7 @@ // #include "RevOpts.h" -using namespace SST::RevCPU; +namespace SST::RevCPU{ RevOpts::RevOpts( unsigned NumCores, unsigned NumHarts, const int Verbosity ) : numCores(NumCores), numHarts(NumHarts), verbosity(Verbosity) { @@ -273,4 +273,5 @@ bool RevOpts::GetMemCost( unsigned Core, unsigned &Min, unsigned &Max ){ return true; } +} // namespace SST::RevCPU // EOF diff --git a/src/RevPrefetcher.cc b/src/RevPrefetcher.cc index a197851f4..21d34e238 100644 --- a/src/RevPrefetcher.cc +++ b/src/RevPrefetcher.cc @@ -9,7 +9,8 @@ // #include "RevPrefetcher.h" -using namespace SST::RevCPU; + +namespace SST::RevCPU{ /*RevPrefetcher::~RevPrefetcher(){ // delete all the existing streams @@ -169,12 +170,14 @@ void RevPrefetcher::Fill(uint64_t Addr){ // now fill it for( size_t y=0; yGetHartToExecID(), MemOp::MemOpREAD, true, MarkLoadAsComplete); - LSQueue->insert({make_lsq_hash(0, RevRegClass::RegGPR, feature->GetHartToExecID()), req}); + MemReq req( Addr+(y*4), RevReg::zero, RevRegClass::RegGPR, + feature->GetHartToExecID(), MemOp::MemOpREAD, true, + MarkLoadAsComplete ); + LSQueue->insert( req.LSQHashPair() ); mem->ReadVal( feature->GetHartToExecID(), Addr+(y*4), - &iStack[x][y], - req, - RevFlag::F_NONE ); + &iStack[x][y], + req, + RevFlag::F_NONE ); } } @@ -186,4 +189,5 @@ void RevPrefetcher::DeleteStream(size_t i){ } } +} // namespace SST::RevCPU // EOF diff --git a/src/RevProc.cc b/src/RevProc.cc index 317de064e..9186d2f27 100644 --- a/src/RevProc.cc +++ b/src/RevProc.cc @@ -416,8 +416,7 @@ RevInst RevProc::DecodeCRInst(uint16_t Inst, unsigned Entry) const { CompInst.funct4 = InstTable[Entry].funct4; // registers - CompInst.rd = DECODE_RD(Inst); - CompInst.rs1 = DECODE_RD(Inst); + CompInst.rd = CompInst.rs1 = DECODE_RD(Inst); CompInst.rs2 = DECODE_LOWER_CRS2(Inst); CompInst.imm = 0x00; @@ -443,8 +442,7 @@ RevInst RevProc::DecodeCIInst(uint16_t Inst, unsigned Entry) const { CompInst.funct3 = InstTable[Entry].funct3; // registers - CompInst.rd = DECODE_RD(Inst); - CompInst.rs1 = DECODE_RD(Inst); + CompInst.rd = CompInst.rs1 = DECODE_RD(Inst); CompInst.imm = DECODE_LOWER_CRS2(Inst); CompInst.imm |= ((Inst & 0b1000000000000)>>7); @@ -455,7 +453,7 @@ RevInst RevProc::DecodeCIInst(uint16_t Inst, unsigned Entry) const { CompInst.imm = ((Inst & 0b1100000) >> 2); // [4:3] CompInst.imm |= ((Inst & 0b1000000000000) >> 7); // [5] CompInst.imm |= ((Inst & 0b11100) << 4); // [8:6] - CompInst.rs1 = 2; // Force rs1 to be x2 (stack pointer) + CompInst.rs1 = 2; // Force rs1 to be x2 (stack pointer) }else if( (CompInst.opcode == 0b10) && (CompInst.funct3 == 0b010) ){ // c.lwsp @@ -463,7 +461,7 @@ RevInst RevProc::DecodeCIInst(uint16_t Inst, unsigned Entry) const { CompInst.imm = ((Inst & 0b1110000) >> 2); // [4:2] CompInst.imm |= ((Inst & 0b1000000000000) >> 7); // [5] CompInst.imm |= ((Inst & 1100) << 4); // [7:6] - CompInst.rs1 = 2; // Force rs1 to be x2 (stack pointer) + CompInst.rs1 = 2; // Force rs1 to be x2 (stack pointer) }else if( (CompInst.opcode == 0b10) && (CompInst.funct3 == 0b011) ){ CompInst.imm = 0; @@ -472,13 +470,13 @@ RevInst RevProc::DecodeCIInst(uint16_t Inst, unsigned Entry) const { CompInst.imm = ((Inst & 0b1100000) >> 2); // [4:3] CompInst.imm |= ((Inst & 0b1000000000000) >> 7); // [5] CompInst.imm |= ((Inst & 0b11100) << 4); // [8:6] - CompInst.rs1 = 2; // Force rs1 to be x2 (stack pointer) + CompInst.rs1 = 2; // Force rs1 to be x2 (stack pointer) }else{ // c.flwsp CompInst.imm = ((Inst & 0b1110000) >> 2); // [4:2] CompInst.imm |= ((Inst & 0b1000000000000) >> 7); // [5] CompInst.imm |= ((Inst & 1100) << 4); // [7:6] - CompInst.rs1 = 2; // Force rs1 to be x2 (stack pointer) + CompInst.rs1 = 2; // Force rs1 to be x2 (stack pointer) } }else if( (CompInst.opcode == 0b01) && (CompInst.funct3 == 0b011) && @@ -491,7 +489,7 @@ RevInst RevProc::DecodeCIInst(uint16_t Inst, unsigned Entry) const { CompInst.imm |= ((Inst & 0b100000) << 1); // bit 6 CompInst.imm |= ((Inst & 0b11000) << 4); // bit 8:7 CompInst.imm |= ((Inst & 0b1000000000000) >> 3); // bit 9 - CompInst.rs1 = 2; // Force rs1 to be x2 (stack pointer) + CompInst.rs1 = 2; // Force rs1 to be x2 (stack pointer) if( (CompInst.imm & 0b1000000000) > 0 ){ // sign extend CompInst.imm |= 0b11111111111111111111111000000000; @@ -557,7 +555,7 @@ RevInst RevProc::DecodeCSSInst(uint16_t Inst, unsigned Entry) const { // c.fsdsp CompInst.imm = 0; CompInst.imm = ((Inst & 0b1110000000000) >> 7); // [5:3] - CompInst.imm |= ((Inst & 0b1110000000) >> 1); // [8:6] + CompInst.imm |= ((Inst & 0b1110000000) >> 1); // [8:6] CompInst.rs1 = 2; // Force rs1 to x2 (stack pointer) }else if( CompInst.funct3 == 0b110 ){ // c.swsp @@ -642,7 +640,7 @@ RevInst RevProc::DecodeCLInst(uint16_t Inst, unsigned Entry) const { // registers CompInst.rd = ((Inst & 0b11100) >> 2); CompInst.rs1 = ((Inst & 0b1110000000) >> 7); - + //Apply compressed offset CompInst.rd = CRegIdx(CompInst.rd); CompInst.rs1 = CRegIdx(CompInst.rs1); @@ -752,8 +750,7 @@ RevInst RevProc::DecodeCAInst(uint16_t Inst, unsigned Entry) const { // registers CompInst.rs2 = ((Inst & 0b11100) >> 2); - CompInst.rs1 = ((Inst & 0b1110000000) >> 7); - CompInst.rd = ((Inst & 0b1110000000) >> 7); + CompInst.rd = CompInst.rs1 = ((Inst & 0b1110000000) >> 7); //Adjust registers for compressed offset CompInst.rs2 = CRegIdx(CompInst.rs2); @@ -780,7 +777,7 @@ RevInst RevProc::DecodeCBInst(uint16_t Inst, unsigned Entry) const { CompInst.funct3 = InstTable[Entry].funct3; // registers - CompInst.rs1 = ((Inst & 0b1110000000) >> 7); + CompInst.rd = CompInst.rs1 = ((Inst & 0b1110000000) >> 7); CompInst.offset = ((Inst & 0b1111100) >> 2); CompInst.offset |= ((Inst & 0b1110000000000) >> 5); @@ -812,7 +809,7 @@ RevInst RevProc::DecodeCBInst(uint16_t Inst, unsigned Entry) const { tmp[7] = o[7]; } else if( (CompInst.opcode == 0b01) && (CompInst.funct3 == 0b100)) { //We have a shift or a andi - CompInst.rd = CompInst.rs1; //Already has compressed offset applied + CompInst.rd = CompInst.rs1; //Already has compressed offset applied } CompInst.offset = ((uint16_t)tmp.to_ulong()) << 1; // scale to corrrect position to be consistent with other compressed ops @@ -1641,7 +1638,7 @@ unsigned RevProc::GetNextHartToDecodeID() const { void RevProc::MarkLoadComplete(const MemReq& req){ - auto it = LSQueue->find(make_lsq_hash(req.DestReg, req.RegType, req.Hart)); + auto it = LSQueue->find(req.LSQHash()); if( it != LSQueue->end()){ DependencyClear(it->second.Hart, it->second.DestReg, (it->second.RegType == RevRegClass::RegFLOAT)); LSQueue->erase(it); @@ -1874,9 +1871,9 @@ bool RevProc::ClockTick( SST::Cycle_t currentCycle ){ Retired++; // Only clear the dependency if there is no outstanding load - if((RegFile->GetLSQueue()->count(make_lsq_hash(Pipeline.front().second.rd, - InstTable[Pipeline.front().second.entry].rdClass, - HartID))) == 0){ + if((RegFile->GetLSQueue()->count(LSQHash(Pipeline.front().second.rd, + InstTable[Pipeline.front().second.entry].rdClass, + HartID))) == 0){ DependencyClear(HartID, &(Pipeline.front().second)); } Pipeline.pop_front(); @@ -1911,10 +1908,12 @@ bool RevProc::ClockTick( SST::Cycle_t currentCycle ){ AddThreadsThatChangedState(std::move(ActiveThread)); } } - #ifndef REV_TRACER - // Dump trace state + + #ifndef NO_REV_TRACER + // Dump trace state if (Tracer) Tracer->Render(currentCycle); #endif + return rtn; } diff --git a/src/RevSysCalls.cc b/src/RevSysCalls.cc index 13e40d6c7..de2751dae 100644 --- a/src/RevSysCalls.cc +++ b/src/RevSysCalls.cc @@ -6,7 +6,7 @@ #include #include -using namespace SST::RevCPU; +namespace SST::RevCPU{ /// Parse a string for an ECALL starting at address straddr, updating the state /// as characters are read, and call action() when the end of string is reached. @@ -16,7 +16,7 @@ EcallStatus RevProc::EcallLoadAndParseString(RevInst& inst, auto rtval = EcallStatus::ERROR; auto& EcallState = Harts.at(HartToExecID)->GetEcallState(); - if( RegFile->GetLSQueue()->count(make_lsq_hash(10, RevRegClass::RegGPR, HartToExecID)) > 0 ){ + if( RegFile->GetLSQueue()->count(LSQHash(RevReg::a0, RevRegClass::RegGPR, HartToExecID)) > 0 ){ rtval = EcallStatus::CONTINUE; } else { // we don't know how long the path string is so read a byte (char) @@ -39,21 +39,21 @@ EcallStatus RevProc::EcallLoadAndParseString(RevInst& inst, EcallState.string.clear(); //reset the ECALL buffers EcallState.bytesRead = 0; - DependencyClear(HartToExecID, 10, false); + DependencyClear(HartToExecID, RevReg::a0, false); rtval = EcallStatus::SUCCESS; }else{ //We are in the middle of the string - read one byte - MemReq req{straddr + EcallState.string.size(), 10, + MemReq req{straddr + EcallState.string.size(), RevReg::a0, RevRegClass::RegGPR, HartToExecID, MemOp::MemOpREAD, true, [=](const MemReq& req){this->MarkLoadComplete(req);}}; - LSQueue->insert({make_lsq_hash(req.DestReg, req.RegType, req.Hart), req}); + LSQueue->insert(req.LSQHashPair()); mem->ReadVal(HartToExecID, straddr + EcallState.string.size(), EcallState.buf.data(), req, RevFlag::F_NONE); EcallState.bytesRead = 1; - DependencySet(HartToExecID, 10, false); + DependencySet(HartToExecID, RevReg::a0, false); rtval = EcallStatus::CONTINUE; } } @@ -739,7 +739,7 @@ EcallStatus RevProc::ECALL_write(RevInst& inst){ auto addr = RegFile->GetX(RevReg::a1); auto nbytes = RegFile->GetX(RevReg::a2); - auto lsq_hash = make_lsq_hash(10, RevRegClass::RegGPR, HartToExecID); // Cached hash value + auto lsq_hash = LSQHash(RevReg::a0, RevRegClass::RegGPR, HartToExecID); // Cached hash value if(EcallState.bytesRead && LSQueue->count(lsq_hash) == 0){ EcallState.string += std::string_view(EcallState.buf.data(), EcallState.bytesRead); @@ -751,14 +751,14 @@ EcallStatus RevProc::ECALL_write(RevInst& inst){ int rc = write(fd, EcallState.string.data(), EcallState.string.size()); RegFile->SetX(RevReg::a0, rc); EcallState.clear(); - DependencyClear(HartToExecID, 10, false); + DependencyClear(HartToExecID, RevReg::a0, false); return EcallStatus::SUCCESS; } if (LSQueue->count(lsq_hash) == 0) { - MemReq req (addr + EcallState.string.size(), 10, RevRegClass::RegGPR, + MemReq req (addr + EcallState.string.size(), RevReg::a0, RevRegClass::RegGPR, HartToExecID, MemOp::MemOpREAD, true, RegFile->GetMarkLoadComplete()); - LSQueue->insert({lsq_hash, req}); + LSQueue->insert(req.LSQHashPair()); if(nleft >= 8){ mem->ReadVal(HartToExecID, addr+EcallState.string.size(), @@ -782,7 +782,7 @@ EcallStatus RevProc::ECALL_write(RevInst& inst){ EcallState.bytesRead = 1; } - DependencySet(HartToExecID, 10, false); + DependencySet(HartToExecID, RevReg::a0, false); return EcallStatus::CONTINUE; } @@ -3201,3 +3201,5 @@ EcallStatus RevProc::ECALL_pthread_join(RevInst& inst){ } return rtval; } + +} // namespace SST::RevCPU diff --git a/src/RevTracer.cc b/src/RevTracer.cc index 4e6241f94..119e107d6 100644 --- a/src/RevTracer.cc +++ b/src/RevTracer.cc @@ -15,7 +15,7 @@ #include "RevTracer.h" -using namespace SST::RevCPU; +namespace SST::RevCPU{ RevTracer::RevTracer(std::string Name, SST::Output *o): name(Name), pOutput(o) { @@ -395,3 +395,5 @@ std::string RevTracer::fmt_data(unsigned len, uint64_t d) } return s.str(); } + +} // namespace SST::RevCPU