diff --git a/tensorflow/compiler/mlir/BUILD b/tensorflow/compiler/mlir/BUILD
index d0286e5acff9ce..40aa584e12f3ab 100644
--- a/tensorflow/compiler/mlir/BUILD
+++ b/tensorflow/compiler/mlir/BUILD
@@ -37,6 +37,7 @@ cc_library(
         "@com_google_absl//absl/strings",
         "@llvm-project//llvm:Support",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
     ],
 )
 
diff --git a/tensorflow/compiler/mlir/lite/BUILD b/tensorflow/compiler/mlir/lite/BUILD
index 8675a411788344..4a8833a865bdd3 100644
--- a/tensorflow/compiler/mlir/lite/BUILD
+++ b/tensorflow/compiler/mlir/lite/BUILD
@@ -310,6 +310,7 @@ cc_library(
         "@llvm-project//mlir:Dialect",
         "@llvm-project//mlir:FuncDialect",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
     ],
 )
 
@@ -911,6 +912,7 @@ cc_library(
         "@llvm-project//mlir:FuncDialect",
         "@llvm-project//mlir:IR",
         "@llvm-project//mlir:Pass",
+        "@llvm-project//mlir:Support",
     ],
 )
 
@@ -1037,6 +1039,7 @@ cc_library(
         "@llvm-project//llvm:Analysis",
         "@llvm-project//llvm:Support",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
         "@llvm-project//mlir:TransformUtils",
         "@local_tsl//tsl/platform:status",
         "@local_xla//xla:statusor",
@@ -1210,6 +1213,7 @@ cc_library(
         "//tensorflow/core/platform:errors",
         "//tensorflow/lite/schema:schema_fbs",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
         "@local_xla//xla:statusor",
     ],
 )
diff --git a/tensorflow/compiler/mlir/lite/experimental/common/outline_operations.cc b/tensorflow/compiler/mlir/lite/experimental/common/outline_operations.cc
index 5f77797b9aa8a7..59cc28f9fa0608 100644
--- a/tensorflow/compiler/mlir/lite/experimental/common/outline_operations.cc
+++ b/tensorflow/compiler/mlir/lite/experimental/common/outline_operations.cc
@@ -44,7 +44,7 @@ namespace common {
 
 bool IsConstantOrNone(Operation* op) {
   return (op->getNumResults() == 1 &&
-          op->getResult(0).getType().isa<NoneType>()) ||
+          mlir::isa<NoneType>(op->getResult(0).getType())) ||
          matchPattern(op, m_Constant()) || isa<QConstOp>(op);
 }
 
diff --git a/tensorflow/compiler/mlir/lite/experimental/tac/BUILD b/tensorflow/compiler/mlir/lite/experimental/tac/BUILD
index 248a55c7fe17e1..8f70532a06977a 100644
--- a/tensorflow/compiler/mlir/lite/experimental/tac/BUILD
+++ b/tensorflow/compiler/mlir/lite/experimental/tac/BUILD
@@ -42,6 +42,7 @@ cc_library(
         "@llvm-project//mlir:ArithDialect",
         "@llvm-project//mlir:FuncDialect",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
     ],
 )
 
@@ -88,6 +89,7 @@ cc_library(
         "@llvm-project//mlir:IR",
         "@llvm-project//mlir:QuantOps",
         "@llvm-project//mlir:SideEffectInterfaces",
+        "@llvm-project//mlir:Support",
     ],
 )
 
diff --git a/tensorflow/compiler/mlir/lite/experimental/tac/common/utils.h b/tensorflow/compiler/mlir/lite/experimental/tac/common/utils.h
index 40f4902e655bcd..88382e8cf6f27b 100644
--- a/tensorflow/compiler/mlir/lite/experimental/tac/common/utils.h
+++ b/tensorflow/compiler/mlir/lite/experimental/tac/common/utils.h
@@ -25,6 +25,7 @@ limitations under the License.
 #include "mlir/IR/OpDefinition.h"  // from @llvm-project
 #include "mlir/IR/Types.h"  // from @llvm-project
 #include "mlir/Interfaces/CallInterfaces.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/lite/experimental/tac/common/targets.h"
 #include "tensorflow/compiler/mlir/lite/ir/tfl_ops.h"
 #include "tensorflow/compiler/mlir/lite/utils/utils.h"
@@ -52,7 +53,7 @@ bool NotTFLQuantDequantizeOp(Operation* op);
 
 // Returns true if it is a shaped type of f32 elements.
 inline bool IsF32ShapedType(Type t) {
-  if (auto shaped_type = t.dyn_cast_or_null<ShapedType>()) {
+  if (auto shaped_type = mlir::dyn_cast_or_null<ShapedType>(t)) {
     return shaped_type.getElementType().isF32();
   }
   return false;
diff --git a/tensorflow/compiler/mlir/lite/experimental/tac/execution_metadata_exporter.cc b/tensorflow/compiler/mlir/lite/experimental/tac/execution_metadata_exporter.cc
index 9b2458571f0c34..11a1b31e5102de 100644
--- a/tensorflow/compiler/mlir/lite/experimental/tac/execution_metadata_exporter.cc
+++ b/tensorflow/compiler/mlir/lite/experimental/tac/execution_metadata_exporter.cc
@@ -29,6 +29,7 @@
 #include "mlir/IR/BuiltinOps.h"  // from @llvm-project
 #include "mlir/IR/Operation.h"  // from @llvm-project
 #include "mlir/IR/Region.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/lite/experimental/tac/common/targets.h"
 #include "tensorflow/compiler/mlir/lite/experimental/tac/hardwares/target_hardware.h"
 #include "tensorflow/compiler/mlir/lite/experimental/tac/runtime_metadata_generated.h"
@@ -82,8 +83,7 @@ std::optional<std::vector<float>> GetPerDeviceCosts(
   for (const auto& kv : hardware_map) {
     auto cost_attr = device_costs_attr.getNamed(kv.first);
     if (!cost_attr.has_value()) return std::nullopt;
-    float cost = cost_attr->getValue()
-                     .dyn_cast_or_null<mlir::FloatAttr>()
+    float cost = mlir::dyn_cast_or_null<mlir::FloatAttr>(cost_attr->getValue())
                      .getValueAsDouble();
     device_costs[kv.second] = cost;
   }
diff --git a/tensorflow/compiler/mlir/lite/experimental/tac/transforms/cost_model.cc b/tensorflow/compiler/mlir/lite/experimental/tac/transforms/cost_model.cc
index 4efdd053eec5c2..701d9cad1c34c1 100644
--- a/tensorflow/compiler/mlir/lite/experimental/tac/transforms/cost_model.cc
+++ b/tensorflow/compiler/mlir/lite/experimental/tac/transforms/cost_model.cc
@@ -59,13 +59,14 @@ int64_t GetTransferredTensorBytes(func::CallOp from_graph,
   for (auto input : to_graph.getOperands()) {
     Operation* input_op = input.getDefiningOp();
     if (input_op && input_op == from_graph.getOperation()) {
-      auto input_type = input.getType().dyn_cast_or_null<RankedTensorType>();
+      auto input_type =
+          mlir::dyn_cast_or_null<RankedTensorType>(input.getType());
       if (input_type == nullptr || !input_type.hasStaticShape()) continue;
       // Quantized type does not support getSizeInBits.
       if (IsQUI8Type(input_type) || IsQI8Type(input_type)) {
         total_size_transferred += input_type.getNumElements() * 8;
       } else {
-        auto s_type = input_type.cast<ShapedType>();
+        auto s_type = mlir::cast<ShapedType>(input_type);
         total_size_transferred +=
             s_type.getNumElements() * s_type.getElementTypeBitWidth();
       }
@@ -81,7 +82,8 @@ int64_t GetTransferredElementCount(func::CallOp from_graph,
   for (auto input : to_graph.getOperands()) {
     Operation* input_op = input.getDefiningOp();
     if (input_op && input_op == from_graph.getOperation()) {
-      auto input_type = input.getType().dyn_cast_or_null<RankedTensorType>();
+      auto input_type =
+          mlir::dyn_cast_or_null<RankedTensorType>(input.getType());
       if (input_type == nullptr || !input_type.hasStaticShape()) continue;
       total_element_count += input_type.getNumElements();
     }
diff --git a/tensorflow/compiler/mlir/lite/experimental/tac/transforms/device_transform.cc b/tensorflow/compiler/mlir/lite/experimental/tac/transforms/device_transform.cc
index ea1c299fd546c1..0c37a8da20575f 100644
--- a/tensorflow/compiler/mlir/lite/experimental/tac/transforms/device_transform.cc
+++ b/tensorflow/compiler/mlir/lite/experimental/tac/transforms/device_transform.cc
@@ -156,13 +156,13 @@ struct FoldQuantizedI32ToFloat : public OpRewritePattern<TFL::DequantizeOp> {
     if (!IsQI32Type(input_dequant.getType())) return failure();
 
     auto output_type =
-        dequant_op.getOutput().getType().dyn_cast_or_null<ShapedType>();
+        mlir::dyn_cast_or_null<ShapedType>(dequant_op.getOutput().getType());
     if (!output_type || !output_type.getElementType().isF32()) return failure();
 
-    auto input_type = input_dequant.getType().dyn_cast<ShapedType>();
+    auto input_type = mlir::dyn_cast<ShapedType>(input_dequant.getType());
     // TODO(renjieliu): support UniformQuantizedPerAxisType.
-    auto q_type = input_type.getElementType()
-                      .dyn_cast_or_null<quant::UniformQuantizedType>();
+    auto q_type = mlir::dyn_cast_or_null<quant::UniformQuantizedType>(
+        input_type.getElementType());
     if (!q_type) return failure();
 
     const float scale = q_type.getScale();
@@ -183,9 +183,9 @@ struct FoldQuantizedI32ToFloat : public OpRewritePattern<TFL::DequantizeOp> {
     };
 
     auto dequant_values =
-        input_values.cast<DenseIntOrFPElementsAttr>().mapValues(
-            FloatType::getF32(rewriter.getContext()),
-            llvm::function_ref<DequantizeFuncType>(dequantize_func));
+        mlir::cast<DenseIntOrFPElementsAttr>(input_values)
+            .mapValues(FloatType::getF32(rewriter.getContext()),
+                       llvm::function_ref<DequantizeFuncType>(dequantize_func));
     rewriter.replaceOpWithNewOp<TFL::ConstOp>(dequant_op, dequant_op.getType(),
                                               dequant_values);
 
diff --git a/tensorflow/compiler/mlir/lite/experimental/tac/transforms/device_transform_patterns.cc b/tensorflow/compiler/mlir/lite/experimental/tac/transforms/device_transform_patterns.cc
index baf25aa54c109b..278c54e8805f3d 100644
--- a/tensorflow/compiler/mlir/lite/experimental/tac/transforms/device_transform_patterns.cc
+++ b/tensorflow/compiler/mlir/lite/experimental/tac/transforms/device_transform_patterns.cc
@@ -96,11 +96,11 @@ LogicalResult EnsureBias(Operation* op, int bias_idx,
                          PatternRewriter& rewriter) {
   auto bias = op->getOperand(bias_idx);
 
-  if (!bias.getType().isa<NoneType>()) return failure();
+  if (!mlir::isa<NoneType>(bias.getType())) return failure();
 
   // Proceed to create a zero bias.
   auto output = op->getResult(0);
-  auto output_type = output.getType().dyn_cast_or_null<RankedTensorType>();
+  auto output_type = mlir::dyn_cast_or_null<RankedTensorType>(output.getType());
   if (!output_type) return failure();
 
   // bias should be a vector sized of the last output dim.
@@ -163,7 +163,7 @@ SmallVector<Value, 4> SliceOutputs(Operation* split_op, Value input,
     SmallVector<int32_t, 4> slice_size;
     auto current_output = split_op->getResult(i);
     auto current_output_type =
-        current_output.getType().cast<RankedTensorType>();
+        mlir::cast<RankedTensorType>(current_output.getType());
     for (int d = 0; d < input_type.getRank(); ++d) {
       if (d == split_dim) {
         // Split dimension.
@@ -208,7 +208,7 @@ LogicalResult LowerPackIntoConcatReshape::matchAndRewrite(
     TFL::PackOp pack_op, PatternRewriter& rewriter) const {
   // Pack op should have same shape type.
   SmallVector<Value, 5> pack_inputs(pack_op.getValues());
-  auto input_type = pack_inputs[0].getType().dyn_cast<RankedTensorType>();
+  auto input_type = mlir::dyn_cast<RankedTensorType>(pack_inputs[0].getType());
   if (!input_type) return failure();
 
   // Figure out output shapes.
@@ -266,8 +266,8 @@ LogicalResult SquaredDifference::matchAndRewrite(
     TFL::SquaredDifferenceOp squared_diff_op, PatternRewriter& rewriter) const {
   auto x = squared_diff_op.getLhs();
   auto y = squared_diff_op.getRhs();
-  auto x_type = x.getType().dyn_cast<RankedTensorType>();
-  auto y_type = y.getType().dyn_cast<RankedTensorType>();
+  auto x_type = mlir::dyn_cast<RankedTensorType>(x.getType());
+  auto y_type = mlir::dyn_cast<RankedTensorType>(y.getType());
   if (!x_type || !y_type) return failure();
   if (x_type.getShape() != y_type.getShape()) return failure();
 
@@ -290,16 +290,16 @@ LogicalResult UnrollSplit::matchAndRewrite(TFL::SplitOp split_op,
                                            PatternRewriter& rewriter) const {
   auto num_splits = split_op.getNumSplits();
   auto input = split_op.getValue();
-  auto input_type = input.getType().dyn_cast<RankedTensorType>();
+  auto input_type = mlir::dyn_cast<RankedTensorType>(input.getType());
   if (input_type == nullptr || !input_type.hasStaticShape()) return failure();
 
   for (auto result : split_op.getResults()) {
-    auto result_type = result.getType().dyn_cast<RankedTensorType>();
+    auto result_type = mlir::dyn_cast<RankedTensorType>(result.getType());
     if (result_type == nullptr) return failure();
   }
 
   auto output = split_op.getResult(0);
-  auto output_type = output.getType().cast<RankedTensorType>();
+  auto output_type = mlir::cast<RankedTensorType>(output.getType());
 
   // TODO(renjieliu): change to use split_dim when we raise the constants
   // as well.
@@ -330,11 +330,11 @@ LogicalResult UnrollSplitV::matchAndRewrite(TFL::SplitVOp splitv_op,
     return failure();
 
   auto input = splitv_op.getValue();
-  auto input_type = input.getType().dyn_cast_or_null<RankedTensorType>();
+  auto input_type = mlir::dyn_cast_or_null<RankedTensorType>(input.getType());
   if (!input_type || !input_type.hasRank()) return failure();
 
   for (auto result : splitv_op.getResults()) {
-    auto result_type = result.getType().dyn_cast<RankedTensorType>();
+    auto result_type = mlir::dyn_cast<RankedTensorType>(result.getType());
     if (result_type == nullptr) return failure();
   }
 
@@ -371,20 +371,21 @@ LogicalResult PadSlice::matchAndRewrite(TFL::SliceOp slice_op,
   // We have to know the shape of the input, as well as the begin/size.
   // also, begin and size have to be constants.
   auto input = slice_op.getInput();
-  auto input_type = input.getType().dyn_cast_or_null<RankedTensorType>();
+  auto input_type = mlir::dyn_cast_or_null<RankedTensorType>(input.getType());
   if (!input_type || !input_type.hasStaticShape()) return failure();
 
   if (input_type.getRank() >= 4) return failure();
 
   auto begin = slice_op.getBegin();
-  auto begin_type = begin.getType().dyn_cast_or_null<RankedTensorType>();
+  auto begin_type = mlir::dyn_cast_or_null<RankedTensorType>(begin.getType());
   if (!begin_type || !begin_type.hasStaticShape()) return failure();
 
   auto size = slice_op.getSize();
-  auto size_type = size.getType().dyn_cast_or_null<RankedTensorType>();
+  auto size_type = mlir::dyn_cast_or_null<RankedTensorType>(size.getType());
   if (!size_type || !size_type.hasStaticShape()) return failure();
 
-  auto output_type = slice_op.getType().dyn_cast_or_null<RankedTensorType>();
+  auto output_type =
+      mlir::dyn_cast_or_null<RankedTensorType>(slice_op.getType());
   if (!output_type || !output_type.hasStaticShape()) return failure();
 
   // Pad 0s in front of the begin.
@@ -472,17 +473,17 @@ LogicalResult FullyConnectedToConv::matchAndRewrite(
     TFL::FullyConnectedOp fc_op, PatternRewriter& rewriter) const {
   // We have to know the shape of the input.
   auto input = fc_op.getInput();
-  auto input_type = input.getType().dyn_cast_or_null<RankedTensorType>();
+  auto input_type = mlir::dyn_cast_or_null<RankedTensorType>(input.getType());
   if (!input_type || !input_type.hasStaticShape()) return failure();
 
   // We have to know the shape of the weight.
   auto weight = fc_op.getFilter();
-  auto weight_type = weight.getType().dyn_cast_or_null<RankedTensorType>();
+  auto weight_type = mlir::dyn_cast_or_null<RankedTensorType>(weight.getType());
   if (!weight_type || !weight_type.hasStaticShape()) return failure();
 
   // We have to know the shape of the output as well.
   auto output = fc_op.getResult(0);
-  auto output_type = output.getType().dyn_cast_or_null<RankedTensorType>();
+  auto output_type = mlir::dyn_cast_or_null<RankedTensorType>(output.getType());
   if (!output_type || !output_type.hasStaticShape()) return failure();
 
   // Insert a reshape after the input.
@@ -532,13 +533,14 @@ LogicalResult PadConcat::matchAndRewrite(TFL::ConcatenationOp concat_op,
                                          PatternRewriter& rewriter) const {
   int rank = -1;
   for (auto input : concat_op.getValues()) {
-    auto input_type = input.getType().dyn_cast_or_null<RankedTensorType>();
+    auto input_type = mlir::dyn_cast_or_null<RankedTensorType>(input.getType());
     if (!input_type || !input_type.hasStaticShape()) return failure();
 
     rank = input_type.getRank();
   }
 
-  auto output_type = concat_op.getType().dyn_cast_or_null<RankedTensorType>();
+  auto output_type =
+      mlir::dyn_cast_or_null<RankedTensorType>(concat_op.getType());
   if (!output_type || !output_type.hasStaticShape()) return failure();
 
   if (rank >= 4) return failure();
@@ -547,7 +549,7 @@ LogicalResult PadConcat::matchAndRewrite(TFL::ConcatenationOp concat_op,
   // We will insert a reshape op after every input.
   SmallVector<Value, 4> reshape_ops;
   for (auto input : concat_op.getValues()) {
-    auto input_type = input.getType().cast<RankedTensorType>();
+    auto input_type = mlir::cast<RankedTensorType>(input.getType());
     // Get the new shape.
     SmallVector<int64_t, 4> new_shape;
     for (int i = 0; i < 4 - rank; ++i) {
@@ -603,7 +605,7 @@ LogicalResult PadConcat::matchAndRewrite(TFL::ConcatenationOp concat_op,
 LogicalResult ReduceMeanToAvgPool::matchAndRewrite(
     TFL::MeanOp mean_op, PatternRewriter& rewriter) const {
   auto input = mean_op.getInput();
-  auto input_type = input.getType().dyn_cast_or_null<RankedTensorType>();
+  auto input_type = mlir::dyn_cast_or_null<RankedTensorType>(input.getType());
   // Only 4d is supported here.
   if (!input_type || input_type.getRank() != 4) return failure();
 
@@ -619,7 +621,7 @@ LogicalResult ReduceMeanToAvgPool::matchAndRewrite(
   }
 
   auto output = mean_op.getOutput();
-  auto output_type = output.getType().dyn_cast_or_null<RankedTensorType>();
+  auto output_type = mlir::dyn_cast_or_null<RankedTensorType>(output.getType());
   if (!output_type) return failure();
 
   auto input_quantized_type =
@@ -669,7 +671,7 @@ LogicalResult ReduceMeanToAvgPool::matchAndRewrite(
 LogicalResult InsertRequantForReduceMean::matchAndRewrite(
     TFL::MeanOp mean_op, PatternRewriter& rewriter) const {
   auto input = mean_op.getInput();
-  auto input_type = input.getType().dyn_cast_or_null<ShapedType>();
+  auto input_type = mlir::dyn_cast_or_null<ShapedType>(input.getType());
   if (!input_type) return failure();
 
   // Only need to do this for quantized input.
@@ -678,7 +680,7 @@ LogicalResult InsertRequantForReduceMean::matchAndRewrite(
   if (!input_quantized_type) return failure();
 
   auto output = mean_op.getOutput();
-  auto output_type = output.getType().dyn_cast_or_null<ShapedType>();
+  auto output_type = mlir::dyn_cast_or_null<ShapedType>(output.getType());
   if (!output_type) return failure();
   auto output_quantized_type =
       quant::QuantizedType::getQuantizedElementType(output_type);
diff --git a/tensorflow/compiler/mlir/lite/experimental/tac/transforms/fold_constants_to_subgraph.cc b/tensorflow/compiler/mlir/lite/experimental/tac/transforms/fold_constants_to_subgraph.cc
index b6c544a8f69c9b..e4985f2b5700d5 100644
--- a/tensorflow/compiler/mlir/lite/experimental/tac/transforms/fold_constants_to_subgraph.cc
+++ b/tensorflow/compiler/mlir/lite/experimental/tac/transforms/fold_constants_to_subgraph.cc
@@ -107,11 +107,12 @@ bool IsConstOrQConstInt(Operation* op) {
 
   if (auto arith_const_op = dyn_cast_or_null<arith::ConstantOp>(op)) {
     // arith ConstOp path.
-    auto type = arith_const_op.getType().cast<ShapedType>().getElementType();
+    auto type =
+        mlir::cast<ShapedType>(arith_const_op.getType()).getElementType();
     if (!type.isInteger(32) && !type.isInteger(64)) return false;
   } else if (auto const_op = dyn_cast_or_null<TFL::ConstOp>(op)) {
     // ConstOp path.
-    auto type = const_op.getType().cast<ShapedType>().getElementType();
+    auto type = mlir::cast<ShapedType>(const_op.getType()).getElementType();
     if (!type.isInteger(32) && !type.isInteger(64)) return false;
   } else {
     // QConstOp path.
diff --git a/tensorflow/compiler/mlir/lite/experimental/tac/transforms/raise_target_subgraphs.cc b/tensorflow/compiler/mlir/lite/experimental/tac/transforms/raise_target_subgraphs.cc
index 4fd9f945764b3a..1ff585f6c71cb6 100644
--- a/tensorflow/compiler/mlir/lite/experimental/tac/transforms/raise_target_subgraphs.cc
+++ b/tensorflow/compiler/mlir/lite/experimental/tac/transforms/raise_target_subgraphs.cc
@@ -113,18 +113,11 @@ void AddAttrs(OpsAdded& ops_added, OpBuilder& builder, int func_count) {
   added_func_op->setAttr(kInterfaceNameAttr, interface_name);
   added_call_op->setAttr(kInterfaceNameAttr, interface_name);
 
-  StringAttr device = added_func_op->getRegion(0)
-                          .getBlocks()
-                          .front()
-                          .front()
-                          .getAttr(kDevice)
-                          .cast<StringAttr>();
-  StringAttr inference_type = added_func_op->getRegion(0)
-                                  .getBlocks()
-                                  .front()
-                                  .front()
-                                  .getAttr(kInferenceType)
-                                  .cast<StringAttr>();
+  StringAttr device = mlir::cast<StringAttr>(
+      added_func_op->getRegion(0).getBlocks().front().front().getAttr(kDevice));
+  StringAttr inference_type = mlir::cast<StringAttr>(
+      added_func_op->getRegion(0).getBlocks().front().front().getAttr(
+          kInferenceType));
   added_call_op->setAttr(kDevice, device);
   added_call_op->setAttr(kInferenceType, inference_type);
   added_func_op->setAttr(kDevice, device);
diff --git a/tensorflow/compiler/mlir/lite/experimental/tac/transforms/tac_filter.cc b/tensorflow/compiler/mlir/lite/experimental/tac/transforms/tac_filter.cc
index a2f7441cc170b1..05cadcbb26b1e7 100644
--- a/tensorflow/compiler/mlir/lite/experimental/tac/transforms/tac_filter.cc
+++ b/tensorflow/compiler/mlir/lite/experimental/tac/transforms/tac_filter.cc
@@ -110,7 +110,7 @@ void ApplyTacFilter(ModuleOp module, const TacFilter& tac_filter,
 
   llvm::Regex op_regex(tac_filter.op_filter().op_name_pattern());
   module.walk([&](Operation* op) {
-    auto named_loc = op->getLoc().dyn_cast<NameLoc>();
+    auto named_loc = mlir::dyn_cast<NameLoc>(op->getLoc());
     if (!named_loc) {
       return;
     }
diff --git a/tensorflow/compiler/mlir/lite/flatbuffer_export.cc b/tensorflow/compiler/mlir/lite/flatbuffer_export.cc
index acdbb79201a3d7..84bc7ab2daae19 100644
--- a/tensorflow/compiler/mlir/lite/flatbuffer_export.cc
+++ b/tensorflow/compiler/mlir/lite/flatbuffer_export.cc
@@ -190,11 +190,11 @@ static StatusOr<tflite::TensorType> GetTFLiteType(Type type,
     return tflite::TensorType_BFLOAT16;
   } else if (type.isF64()) {
     return tflite::TensorType_FLOAT64;
-  } else if (type.isa<mlir::TF::StringType>()) {
+  } else if (mlir::isa<mlir::TF::StringType>(type)) {
     return tflite::TensorType_STRING;
-  } else if (type.isa<mlir::TF::Quint8Type>()) {
+  } else if (mlir::isa<mlir::TF::Quint8Type>(type)) {
     return tflite::TensorType_UINT8;
-  } else if (auto complex_type = type.dyn_cast<mlir::ComplexType>()) {
+  } else if (auto complex_type = mlir::dyn_cast<mlir::ComplexType>(type)) {
     auto ftype = complex_type.getElementType();
     if (ftype.isF32()) {
       return tflite::TensorType_COMPLEX64;
@@ -203,7 +203,7 @@ static StatusOr<tflite::TensorType> GetTFLiteType(Type type,
       return tflite::TensorType_COMPLEX128;
     }
     return Status(absl::StatusCode::kInvalidArgument, "Unsupported type");
-  } else if (auto itype = type.dyn_cast<mlir::IntegerType>()) {
+  } else if (auto itype = mlir::dyn_cast<mlir::IntegerType>(type)) {
     switch (itype.getWidth()) {
       case 1:
         return tflite::TensorType_BOOL;
@@ -228,19 +228,20 @@ static StatusOr<tflite::TensorType> GetTFLiteType(Type type,
                                   : tflite::TensorType_INT64;
     }
   } else if (auto q_uniform_type =
-                 type.dyn_cast<mlir::quant::UniformQuantizedType>()) {
+                 mlir::dyn_cast<mlir::quant::UniformQuantizedType>(type)) {
     return GetTFLiteType(q_uniform_type.getStorageType(),
                          q_uniform_type.isSigned());
   } else if (auto q_peraxis_type =
-                 type.dyn_cast<mlir::quant::UniformQuantizedPerAxisType>()) {
+                 mlir::dyn_cast<mlir::quant::UniformQuantizedPerAxisType>(
+                     type)) {
     return GetTFLiteType(q_peraxis_type.getStorageType(),
                          q_peraxis_type.isSigned());
   } else if (auto q_calibrated_type =
-                 type.dyn_cast<mlir::quant::CalibratedQuantizedType>()) {
+                 mlir::dyn_cast<mlir::quant::CalibratedQuantizedType>(type)) {
     return GetTFLiteType(q_calibrated_type.getExpressedType());
-  } else if (type.isa<mlir::TF::ResourceType>()) {
+  } else if (mlir::isa<mlir::TF::ResourceType>(type)) {
     return tflite::TensorType_RESOURCE;
-  } else if (type.isa<mlir::TF::VariantType>()) {
+  } else if (mlir::isa<mlir::TF::VariantType>(type)) {
     return tflite::TensorType_VARIANT;
   }
   // TFLite export fills FLOAT32 for unknown data types. Returning an error
@@ -258,13 +259,13 @@ static bool IsConst(Operation* op) {
 static bool IsTFResourceOp(Operation* op) {
   for (const auto& operand : op->getOperands()) {
     auto elementType = getElementTypeOrSelf(operand.getType());
-    if (elementType.isa<mlir::TF::ResourceType>()) {
+    if (mlir::isa<mlir::TF::ResourceType>(elementType)) {
       return true;
     }
   }
   for (const auto& result : op->getResults()) {
     auto elementType = getElementTypeOrSelf(result.getType());
-    if (elementType.isa<mlir::TF::ResourceType>()) {
+    if (mlir::isa<mlir::TF::ResourceType>(elementType)) {
       return true;
     }
   }
@@ -310,7 +311,8 @@ static std::string GetOpDescriptionForDebug(Operation* inst) {
       os << (!first ? ", " : "");
       first = false;
       os << named_attr.getName().getValue() << " = ";
-      if (auto element_attr = named_attr.getValue().dyn_cast<ElementsAttr>()) {
+      if (auto element_attr =
+              mlir::dyn_cast<ElementsAttr>(named_attr.getValue())) {
         if (element_attr.getNumElements() <= kLargeElementsAttr) {
           element_attr.print(os);
         } else {
@@ -355,9 +357,9 @@ static std::string GetOpsSummary(
 template <typename T>
 static bool HasValidTFLiteType(Value value, T& error_handler) {
   // None type is allowed to represent unspecified operands.
-  if (value.getType().isa<NoneType>()) return true;
+  if (mlir::isa<NoneType>(value.getType())) return true;
 
-  auto type = value.getType().dyn_cast<TensorType>();
+  auto type = mlir::dyn_cast<TensorType>(value.getType());
   if (!type) {
     if (auto op = value.getDefiningOp()) {
       error_handler.emitError()
@@ -416,7 +418,7 @@ static bool IsValidTFLiteMlirModule(ModuleOp module) {
     for (auto arg : bb.getArguments()) {
       if (!HasValidTFLiteType(arg, fn)) {
         auto elementType = getElementTypeOrSelf(arg.getType());
-        if (elementType.isa<mlir::TF::VariantType>()) {
+        if (mlir::isa<mlir::TF::VariantType>(elementType)) {
           return fn.emitError(
                      "function argument uses variant type. Currently, the "
                      "variant type is not natively supported in TFLite. Please "
@@ -435,10 +437,10 @@ static bool IsValidTFLiteMlirModule(ModuleOp module) {
       if (inst.hasTrait<mlir::OpTrait::IsTerminator>()) break;
 
       for (auto result : inst.getResults()) {
-        if (result.getType().isa<mlir::TFL::ControlType>()) continue;
+        if (mlir::isa<mlir::TFL::ControlType>(result.getType())) continue;
         if (!HasValidTFLiteType(result, inst)) {
           auto elementType = getElementTypeOrSelf(result.getType());
-          if (elementType.isa<mlir::TF::VariantType>()) {
+          if (mlir::isa<mlir::TF::VariantType>(elementType)) {
             return inst.emitError(
                        "operand result uses variant type. Currently, the "
                        "variant type is not natively supported in TFLite. "
@@ -919,7 +921,7 @@ std::optional<BufferOffset<tflite::Buffer>> Translator::BuildBuffer(
   if (auto cst = dyn_cast<mlir::arith::ConstantOp>(inst)) {
     // arith::ConstantOp have ElementAttr at this point due to validation of the
     // TFLite module.
-    attr = cst.getValue().cast<ElementsAttr>();
+    attr = mlir::cast<ElementsAttr>(cst.getValue());
   } else if (auto cst = dyn_cast<mlir::TF::ConstOp>(inst)) {
     attr = cst.getValue();
   } else if (auto cst = dyn_cast<tfl::ConstOp>(inst)) {
@@ -930,10 +932,10 @@ std::optional<BufferOffset<tflite::Buffer>> Translator::BuildBuffer(
     attr = cst.getValue();
   } else if (auto cst = dyn_cast<mlir::vhlo::ConstantOpV1>(inst)) {
     mlir::VhloToStablehloTypeConverter vhlo_type_converter;
-    auto tensor_v1_attr = cst.getValue().cast<mlir::vhlo::TensorV1Attr>();
+    auto tensor_v1_attr = mlir::cast<mlir::vhlo::TensorV1Attr>(cst.getValue());
     attr = mlir::DenseIntOrFPElementsAttr::getFromRawBuffer(
-        vhlo_type_converter.convertType(tensor_v1_attr.getType())
-            .cast<mlir::ShapedType>(),
+        mlir::cast<mlir::ShapedType>(
+            vhlo_type_converter.convertType(tensor_v1_attr.getType())),
         tensor_v1_attr.getData());
   } else if (auto cst = dyn_cast<tfl::SparseConstOp>(inst)) {
     attr = cst.getCompressedData();
@@ -956,7 +958,7 @@ std::optional<BufferOffset<tflite::Buffer>> Translator::BuildBuffer(
   // trouble calling ConvertToTensor(). For now, extract the tensor data from
   // ElementsAttr directly in this and read type from tflite::TensorType instead
   // of tensorflow::DataType.
-  auto type = value.getType().cast<TensorType>();
+  auto type = mlir::cast<TensorType>(value.getType());
   tflite::TensorType tflite_element_type =
       GetTFLiteType(type.getElementType()).value();
   if (tflite_element_type == tflite::TensorType_INT4) {
@@ -1052,7 +1054,7 @@ int32_t Translator::UnnamedRegionToSubgraph(
 std::optional<std::vector<BufferOffset<tflite::VariantSubType>>>
 Translator::BuildTFVariantType(mlir::Type element_type) {
   std::vector<BufferOffset<tflite::VariantSubType>> variant_params;
-  auto variant_type = element_type.dyn_cast<mlir::TF::VariantType>();
+  auto variant_type = mlir::dyn_cast<mlir::TF::VariantType>(element_type);
   if (!variant_type) {
     return variant_params;
   }
@@ -1081,7 +1083,7 @@ Translator::BuildTFVariantType(mlir::Type element_type) {
 
 std::optional<BufferOffset<tflite::Tensor>> Translator::BuildTensorFromType(
     mlir::Type type, const std::string& name) {
-  auto tensor_type = type.cast<TensorType>();
+  auto tensor_type = mlir::cast<TensorType>(type);
 
   llvm::ArrayRef<int64_t> shape_ref;
   std::vector<int32_t> shape;
@@ -1104,15 +1106,15 @@ std::optional<BufferOffset<tflite::Tensor>> Translator::BuildTensorFromType(
     return std::nullopt;
   }
   BufferOffset<tflite::QuantizationParameters> q_params = 0;
-  if (auto qtype = element_type.dyn_cast<mlir::quant::UniformQuantizedType>()) {
+  if (auto qtype =
+          mlir::dyn_cast<mlir::quant::UniformQuantizedType>(element_type)) {
     std::vector<float> scales = {static_cast<float>(qtype.getScale())};
     std::vector<int64_t> zero_points = {qtype.getZeroPoint()};
     q_params = tflite::CreateQuantizationParameters(
         builder_, /*min=*/0, /*max=*/0, builder_.CreateVector<float>(scales),
         builder_.CreateVector<int64_t>(zero_points));
-  } else if (auto qtype =
-                 element_type
-                     .dyn_cast<mlir::quant::CalibratedQuantizedType>()) {
+  } else if (auto qtype = mlir::dyn_cast<mlir::quant::CalibratedQuantizedType>(
+                 element_type)) {
     std::vector<float> mins = {static_cast<float>(qtype.getMin())};
     std::vector<float> maxs = {static_cast<float>(qtype.getMax())};
     q_params = tflite::CreateQuantizationParameters(
@@ -1131,7 +1133,7 @@ std::optional<BufferOffset<tflite::Tensor>> Translator::BuildTensor(
     Value value, const std::string& name, unsigned buffer_idx,
     const std::optional<BufferOffset<tflite::QuantizationParameters>>&
         quant_parameters) {
-  auto type = value.getType().cast<TensorType>();
+  auto type = mlir::cast<TensorType>(value.getType());
 
   // TFLite requires tensor shape only for the inputs and constants.
   // However, we output all known shapes for better round-tripping
@@ -1161,9 +1163,9 @@ std::optional<BufferOffset<tflite::Tensor>> Translator::BuildTensor(
     // Const op can have a result of dynamic shaped type (e.g. due to constant
     // folding), but we can still derive the shape of a constant tensor for
     // its attribute type.
-    auto tensor_attr = inst->getAttr("value").cast<mlir::TypedAttr>();
+    auto tensor_attr = mlir::cast<mlir::TypedAttr>(inst->getAttr("value"));
     llvm::ArrayRef<int64_t> shape_ref =
-        tensor_attr.getType().cast<TensorType>().getShape();
+        mlir::cast<TensorType>(tensor_attr.getType()).getShape();
     if (mlir::failed(check_shape(shape_ref))) return std::nullopt;
 
     shape = std::vector<int32_t>(shape_ref.begin(), shape_ref.end());
@@ -1202,7 +1204,8 @@ std::optional<BufferOffset<tflite::Tensor>> Translator::BuildTensor(
   }
 
   BufferOffset<tflite::QuantizationParameters> q_params;
-  if (auto qtype = element_type.dyn_cast<mlir::quant::UniformQuantizedType>()) {
+  if (auto qtype =
+          mlir::dyn_cast<mlir::quant::UniformQuantizedType>(element_type)) {
     std::vector<float> scales = {static_cast<float>(qtype.getScale())};
     std::vector<int64_t> zero_points = {qtype.getZeroPoint()};
     q_params = tflite::CreateQuantizationParameters(
@@ -1211,8 +1214,8 @@ std::optional<BufferOffset<tflite::Tensor>> Translator::BuildTensor(
         builder_, /*min=*/0, /*max=*/0, builder_.CreateVector<float>(scales),
         builder_.CreateVector<int64_t>(zero_points));
   } else if (auto qtype =
-                 element_type
-                     .dyn_cast<mlir::quant::UniformQuantizedPerAxisType>()) {
+                 mlir::dyn_cast<mlir::quant::UniformQuantizedPerAxisType>(
+                     element_type)) {
     std::vector<float> scales(qtype.getScales().begin(),
                               qtype.getScales().end());
     std::vector<int64_t> zero_points(qtype.getZeroPoints().begin(),
@@ -1350,7 +1353,9 @@ BufferOffset<tflite::Operator> Translator::BuildCustomOperator(
     Operation* inst, mlir::TFL::CustomOp op,
     const std::vector<int32_t>& operands, const std::vector<int32_t>& results) {
   const std::string attrs =
-      op.getCustomOption().cast<mlir::TFL::ConstBytesAttr>().getValue().str();
+      mlir::cast<mlir::TFL::ConstBytesAttr>(op.getCustomOption())
+          .getValue()
+          .str();
   std::vector<uint8_t> custom_option_vector(attrs.size(), 0);
   memcpy(custom_option_vector.data(), attrs.data(), attrs.size());
   auto opcode_index =
@@ -1559,7 +1564,7 @@ Translator::BuildStablehloPrecisionConfig(::mlir::ArrayAttr precisionConfig) {
 
   for (auto it = precisionConfig.begin(); it != precisionConfig.end(); it++) {
     precision_config_vec.push_back(static_cast<uint32_t>(
-        (it->cast<mlir::stablehlo::PrecisionAttr>()).getValue()));
+        (mlir::cast<mlir::stablehlo::PrecisionAttr>(*it)).getValue()));
   }
   return builder_.CreateVector(precision_config_vec);
 }
@@ -1571,7 +1576,7 @@ Translator::BuildVhloPrecisionConfigV1(
   auto values = precisionConfig.getValue();
   for (auto it = values.begin(); it != values.end(); it++) {
     precision_config_vec.push_back(static_cast<uint32_t>(
-        (it->cast<mlir::vhlo::PrecisionV1Attr>()).getValue()));
+        (mlir::cast<mlir::vhlo::PrecisionV1Attr>(*it)).getValue()));
   }
   return builder_.CreateVector(precision_config_vec);
 }
@@ -1852,27 +1857,25 @@ std::optional<BufferOffset<tflite::Operator>> Translator::BuildVhloGatherV1Op(
       GetOpcodeIndex(op_name, tflite::BuiltinOperator_STABLEHLO_GATHER);
 
   auto offset_dims = builder_.CreateVector(mlir::GetVector<int64_t>(
-      gather_op.getOffsetDims().cast<mlir::vhlo::TensorV1Attr>(),
+      mlir::cast<mlir::vhlo::TensorV1Attr>(gather_op.getOffsetDims()),
       vhlo_type_converter));
   auto collapsed_slice_dims = builder_.CreateVector(mlir::GetVector<int64_t>(
-      gather_op.getCollapsedSliceDims().cast<mlir::vhlo::TensorV1Attr>(),
+      mlir::cast<mlir::vhlo::TensorV1Attr>(gather_op.getCollapsedSliceDims()),
       vhlo_type_converter));
   auto start_index_map = builder_.CreateVector(mlir::GetVector<int64_t>(
-      gather_op.getStartIndexMap().cast<mlir::vhlo::TensorV1Attr>(),
+      mlir::cast<mlir::vhlo::TensorV1Attr>(gather_op.getStartIndexMap()),
       vhlo_type_converter));
   auto slice_sizes = builder_.CreateVector(mlir::GetVector<int64_t>(
-      gather_op.getSliceSizes().cast<mlir::vhlo::TensorV1Attr>(),
+      mlir::cast<mlir::vhlo::TensorV1Attr>(gather_op.getSliceSizes()),
       vhlo_type_converter));
 
   auto gather_option = tflite::CreateStablehloGatherOptions(
       builder_, offset_dims, collapsed_slice_dims, start_index_map,
-      gather_op.getIndexVectorDim()
-          .cast<mlir::vhlo::IntegerV1Attr>()
+      mlir::cast<mlir::vhlo::IntegerV1Attr>(gather_op.getIndexVectorDim())
           .getValue()
           .getSExtValue(),
       slice_sizes,
-      gather_op.getIndicesAreSorted()
-          .cast<mlir::vhlo::BooleanV1Attr>()
+      mlir::cast<mlir::vhlo::BooleanV1Attr>(gather_op.getIndicesAreSorted())
           .getValue());
 
   return tflite::CreateOperator(
@@ -1899,26 +1902,26 @@ std::optional<BufferOffset<tflite::Operator>> Translator::BuildVhloScatterV1Op(
       UnnamedRegionToSubgraph(&body, tflite::BuiltinOperator_STABLEHLO_SCATTER);
   if (subgraph_index < 0) return std::nullopt;
 
-  int64_t index_vector_dim = scatter_op.getIndexVectorDim()
-                                 .cast<mlir::vhlo::IntegerV1Attr>()
-                                 .getValue()
-                                 .getSExtValue();
-  bool unique_indices = scatter_op.getUniqueIndices()
-                            .cast<mlir::vhlo::BooleanV1Attr>()
-                            .getValue();
-  bool indices_are_sorted = scatter_op.getIndicesAreSorted()
-                                .cast<mlir::vhlo::BooleanV1Attr>()
-                                .getValue();
+  int64_t index_vector_dim =
+      mlir::cast<mlir::vhlo::IntegerV1Attr>(scatter_op.getIndexVectorDim())
+          .getValue()
+          .getSExtValue();
+  bool unique_indices =
+      mlir::cast<mlir::vhlo::BooleanV1Attr>(scatter_op.getUniqueIndices())
+          .getValue();
+  bool indices_are_sorted =
+      mlir::cast<mlir::vhlo::BooleanV1Attr>(scatter_op.getIndicesAreSorted())
+          .getValue();
 
   auto update_window_dims = builder_.CreateVector(mlir::GetVector<int64_t>(
-      scatter_op.getUpdateWindowDims().cast<mlir::vhlo::TensorV1Attr>(),
+      mlir::cast<mlir::vhlo::TensorV1Attr>(scatter_op.getUpdateWindowDims()),
       vhlo_type_converter));
   auto inserted_window_dims = builder_.CreateVector(mlir::GetVector<int64_t>(
-      scatter_op.getInsertedWindowDims().cast<mlir::vhlo::TensorV1Attr>(),
+      mlir::cast<mlir::vhlo::TensorV1Attr>(scatter_op.getInsertedWindowDims()),
       vhlo_type_converter));
   auto scatter_dims_to_operand_dims = builder_.CreateVector(
-      mlir::GetVector<int64_t>(scatter_op.getScatterDimsToOperandDims()
-                                   .cast<mlir::vhlo::TensorV1Attr>(),
+      mlir::GetVector<int64_t>(mlir::cast<mlir::vhlo::TensorV1Attr>(
+                                   scatter_op.getScatterDimsToOperandDims()),
                                vhlo_type_converter));
 
   auto options = tflite::CreateStablehloScatterOptions(
@@ -1946,20 +1949,22 @@ Translator::BuildVhloReduceWindowV1Op(
   uint32_t opcode_index =
       GetOpcodeIndex(op_name, tflite::BuiltinOperator_STABLEHLO_REDUCE_WINDOW);
 
-  auto window_dimensions = builder_.CreateVector(mlir::GetVector<int64_t>(
-      reduce_window_op.getWindowDimensions().cast<mlir::vhlo::TensorV1Attr>(),
-      vhlo_type_converter));
+  auto window_dimensions = builder_.CreateVector(
+      mlir::GetVector<int64_t>(mlir::cast<mlir::vhlo::TensorV1Attr>(
+                                   reduce_window_op.getWindowDimensions()),
+                               vhlo_type_converter));
   auto window_strides = builder_.CreateVector(mlir::GetVector<int64_t>(
-      reduce_window_op.getWindowStrides().cast<mlir::vhlo::TensorV1Attr>(),
+      mlir::cast<mlir::vhlo::TensorV1Attr>(reduce_window_op.getWindowStrides()),
       vhlo_type_converter));
   auto base_dilations = builder_.CreateVector(mlir::GetVector<int64_t>(
-      reduce_window_op.getBaseDilations().cast<mlir::vhlo::TensorV1Attr>(),
-      vhlo_type_converter));
-  auto window_dilations = builder_.CreateVector(mlir::GetVector<int64_t>(
-      reduce_window_op.getWindowDilations().cast<mlir::vhlo::TensorV1Attr>(),
+      mlir::cast<mlir::vhlo::TensorV1Attr>(reduce_window_op.getBaseDilations()),
       vhlo_type_converter));
+  auto window_dilations = builder_.CreateVector(
+      mlir::GetVector<int64_t>(mlir::cast<mlir::vhlo::TensorV1Attr>(
+                                   reduce_window_op.getWindowDilations()),
+                               vhlo_type_converter));
   auto padding = builder_.CreateVector(mlir::GetVector<int64_t>(
-      reduce_window_op.getPadding().cast<mlir::vhlo::TensorV1Attr>(),
+      mlir::cast<mlir::vhlo::TensorV1Attr>(reduce_window_op.getPadding()),
       vhlo_type_converter));
   auto& body = reduce_window_op.getBody();
   int32_t subgraph_index = UnnamedRegionToSubgraph(
@@ -1990,8 +1995,7 @@ Translator::BuildVhloRngBitGeneratorV1Op(
   uint32_t opcode_index = GetOpcodeIndex(
       op_name, tflite::BuiltinOperator_STABLEHLO_RNG_BIT_GENERATOR);
   tflite::RngAlgorithm algorithm = tflite::RngAlgorithm_DEFAULT;
-  switch (rng_op.getRngAlgorithm()
-              .cast<mlir::vhlo::RngAlgorithmV1Attr>()
+  switch (mlir::cast<mlir::vhlo::RngAlgorithmV1Attr>(rng_op.getRngAlgorithm())
               .getValue()) {
     case mlir::vhlo::RngAlgorithmV1::THREE_FRY:
       algorithm = tflite::RngAlgorithm_THREEFRY;
@@ -2024,13 +2028,13 @@ std::optional<BufferOffset<tflite::Operator>> Translator::BuildVhloPadV1Op(
       GetOpcodeIndex(op_name, tflite::BuiltinOperator_STABLEHLO_PAD);
 
   auto edge_padding_low = builder_.CreateVector(mlir::GetVector<int64_t>(
-      pad_op.getEdgePaddingLow().cast<mlir::vhlo::TensorV1Attr>(),
+      mlir::cast<mlir::vhlo::TensorV1Attr>(pad_op.getEdgePaddingLow()),
       vhlo_type_converter));
   auto edge_padding_high = builder_.CreateVector(mlir::GetVector<int64_t>(
-      pad_op.getEdgePaddingHigh().cast<mlir::vhlo::TensorV1Attr>(),
+      mlir::cast<mlir::vhlo::TensorV1Attr>(pad_op.getEdgePaddingHigh()),
       vhlo_type_converter));
   auto interior_padding = builder_.CreateVector(mlir::GetVector<int64_t>(
-      pad_op.getInteriorPadding().cast<mlir::vhlo::TensorV1Attr>(),
+      mlir::cast<mlir::vhlo::TensorV1Attr>(pad_op.getInteriorPadding()),
       vhlo_type_converter));
 
   auto pad_option = tflite::CreateStablehloPadOptions(
@@ -2263,10 +2267,10 @@ std::optional<BufferOffset<tflite::Operator>> Translator::BuildOperator(
             GetOpcodeIndex(op_name, tflite::BuiltinOperator_STABLEHLO_IOTA);
 
         auto iota_option = tflite::CreateStablehloIotaOptions(
-            builder_, vhlo_op.getIotaDimension()
-                          .cast<mlir::vhlo::IntegerV1Attr>()
-                          .getValue()
-                          .getSExtValue());
+            builder_,
+            mlir::cast<mlir::vhlo::IntegerV1Attr>(vhlo_op.getIotaDimension())
+                .getValue()
+                .getSExtValue());
 
         return tflite::CreateOperator(
             builder_, opcode_index, builder_.CreateVector(operands),
@@ -2280,7 +2284,7 @@ std::optional<BufferOffset<tflite::Operator>> Translator::BuildOperator(
             op_name, tflite::BuiltinOperator_STABLEHLO_DYNAMIC_SLICE);
 
         auto slice_sizes = builder_.CreateVector(mlir::GetVector<int64_t>(
-            vhlo_op.getSliceSizes().cast<mlir::vhlo::TensorV1Attr>(),
+            mlir::cast<mlir::vhlo::TensorV1Attr>(vhlo_op.getSliceSizes()),
             vhlo_type_converter));
 
         auto dynamic_slice_option =
@@ -2303,13 +2307,13 @@ std::optional<BufferOffset<tflite::Operator>> Translator::BuildOperator(
             tflite::StablehloComparisonType_STABLEHLO_COMPARISON_TYPE_NOTYPE;
         if (compare_type_attr)
           compare_type = static_cast<tflite::StablehloComparisonType>(
-              compare_type_attr.cast<mlir::vhlo::ComparisonTypeV1Attr>()
+              mlir::cast<mlir::vhlo::ComparisonTypeV1Attr>(compare_type_attr)
                   .getValue());
         auto compare_option = tflite::CreateStablehloCompareOptions(
             builder_,
             static_cast<tflite::StablehloComparisonDirection>(
-                vhlo_op.getComparisonDirection()
-                    .cast<mlir::vhlo::ComparisonDirectionV1Attr>()
+                mlir::cast<mlir::vhlo::ComparisonDirectionV1Attr>(
+                    vhlo_op.getComparisonDirection())
                     .getValue()),
             compare_type);
 
@@ -2326,10 +2330,10 @@ std::optional<BufferOffset<tflite::Operator>> Translator::BuildOperator(
             op_name, tflite::BuiltinOperator_STABLEHLO_CONCATENATE);
 
         auto concat_option = tflite::CreateStablehloConcatenateOptions(
-            builder_, vhlo_op.getDimension()
-                          .cast<mlir::vhlo::IntegerV1Attr>()
-                          .getValue()
-                          .getSExtValue());
+            builder_,
+            mlir::cast<mlir::vhlo::IntegerV1Attr>(vhlo_op.getDimension())
+                .getValue()
+                .getSExtValue());
 
         return tflite::CreateOperator(
             builder_, opcode_index, builder_.CreateVector(operands),
@@ -2344,13 +2348,13 @@ std::optional<BufferOffset<tflite::Operator>> Translator::BuildOperator(
             GetOpcodeIndex(op_name, tflite::BuiltinOperator_STABLEHLO_SLICE);
 
         auto start_indices = builder_.CreateVector((mlir::GetVector<int64_t>(
-            vhlo_op.getStartIndicesAttr().cast<mlir::vhlo::TensorV1Attr>(),
+            mlir::cast<mlir::vhlo::TensorV1Attr>(vhlo_op.getStartIndicesAttr()),
             vhlo_type_converter)));
         auto limit_indices = builder_.CreateVector(mlir::GetVector<int64_t>(
-            vhlo_op.getLimitIndicesAttr().cast<mlir::vhlo::TensorV1Attr>(),
+            mlir::cast<mlir::vhlo::TensorV1Attr>(vhlo_op.getLimitIndicesAttr()),
             vhlo_type_converter));
         auto strides = builder_.CreateVector(mlir::GetVector<int64_t>(
-            vhlo_op.getStridesAttr().cast<mlir::vhlo::TensorV1Attr>(),
+            mlir::cast<mlir::vhlo::TensorV1Attr>(vhlo_op.getStridesAttr()),
             vhlo_type_converter));
 
         auto slice_option = tflite::CreateStablehloSliceOptions(
@@ -2369,63 +2373,64 @@ std::optional<BufferOffset<tflite::Operator>> Translator::BuildOperator(
             op_name, tflite::BuiltinOperator_STABLEHLO_CONVOLUTION);
 
         auto window_strides = builder_.CreateVector(mlir::GetVector<int64_t>(
-            vhlo_op.getWindowStrides().cast<mlir::vhlo::TensorV1Attr>(),
+            mlir::cast<mlir::vhlo::TensorV1Attr>(vhlo_op.getWindowStrides()),
             vhlo_type_converter));
         auto padding = builder_.CreateVector(mlir::GetVector<int64_t>(
-            vhlo_op.getPadding().cast<mlir::vhlo::TensorV1Attr>(),
+            mlir::cast<mlir::vhlo::TensorV1Attr>(vhlo_op.getPadding()),
             vhlo_type_converter));
         auto lhs_dialation = builder_.CreateVector(mlir::GetVector<int64_t>(
-            vhlo_op.getLhsDilation().cast<mlir::vhlo::TensorV1Attr>(),
+            mlir::cast<mlir::vhlo::TensorV1Attr>(vhlo_op.getLhsDilation()),
             vhlo_type_converter));
         auto rhs_dialation = builder_.CreateVector(mlir::GetVector<int64_t>(
-            vhlo_op.getRhsDilation().cast<mlir::vhlo::TensorV1Attr>(),
+            mlir::cast<mlir::vhlo::TensorV1Attr>(vhlo_op.getRhsDilation()),
             vhlo_type_converter));
         auto window_reversal = builder_.CreateVector(mlir::GetVector<bool>(
-            vhlo_op.getWindowReversal().cast<mlir::vhlo::TensorV1Attr>(),
+            mlir::cast<mlir::vhlo::TensorV1Attr>(vhlo_op.getWindowReversal()),
             vhlo_type_converter));
-        auto input_batch_dimension = vhlo_op.getInputBatchDimension()
-                                         .cast<mlir::vhlo::IntegerV1Attr>()
+        auto input_batch_dimension = mlir::cast<mlir::vhlo::IntegerV1Attr>(
+                                         vhlo_op.getInputBatchDimension())
                                          .getValue()
                                          .getSExtValue();
-        auto input_feature_dimension = vhlo_op.getInputFeatureDimension()
-                                           .cast<mlir::vhlo::IntegerV1Attr>()
+        auto input_feature_dimension = mlir::cast<mlir::vhlo::IntegerV1Attr>(
+                                           vhlo_op.getInputFeatureDimension())
                                            .getValue()
                                            .getSExtValue();
         auto kernel_input_feature_dimension =
-            vhlo_op.getKernelInputFeatureDimension()
-                .cast<mlir::vhlo::IntegerV1Attr>()
+            mlir::cast<mlir::vhlo::IntegerV1Attr>(
+                vhlo_op.getKernelInputFeatureDimension())
                 .getValue()
                 .getSExtValue();
         auto kernel_output_feature_dimension =
-            vhlo_op.getKernelOutputFeatureDimension()
-                .cast<mlir::vhlo::IntegerV1Attr>()
+            mlir::cast<mlir::vhlo::IntegerV1Attr>(
+                vhlo_op.getKernelOutputFeatureDimension())
                 .getValue()
                 .getSExtValue();
-        auto output_batch_dimension = vhlo_op.getOutputBatchDimension()
-                                          .cast<mlir::vhlo::IntegerV1Attr>()
+        auto output_batch_dimension = mlir::cast<mlir::vhlo::IntegerV1Attr>(
+                                          vhlo_op.getOutputBatchDimension())
                                           .getValue()
                                           .getSExtValue();
-        auto output_feature_dimension = vhlo_op.getOutputFeatureDimension()
-                                            .cast<mlir::vhlo::IntegerV1Attr>()
+        auto output_feature_dimension = mlir::cast<mlir::vhlo::IntegerV1Attr>(
+                                            vhlo_op.getOutputFeatureDimension())
                                             .getValue()
                                             .getSExtValue();
 
         auto kernel_spatial_dimensions = builder_.CreateVector(
-            mlir::GetVector<int64_t>(vhlo_op.getKernelSpatialDimensions()
-                                         .cast<mlir::vhlo::TensorV1Attr>(),
+            mlir::GetVector<int64_t>(mlir::cast<mlir::vhlo::TensorV1Attr>(
+                                         vhlo_op.getKernelSpatialDimensions()),
                                      vhlo_type_converter));
         auto output_spatial_dimension = builder_.CreateVector(
-            mlir::GetVector<int64_t>(vhlo_op.getOutputSpatialDimensions()
-                                         .cast<mlir::vhlo::TensorV1Attr>(),
+            mlir::GetVector<int64_t>(mlir::cast<mlir::vhlo::TensorV1Attr>(
+                                         vhlo_op.getOutputSpatialDimensions()),
                                      vhlo_type_converter));
         auto input_spatial_dimension = builder_.CreateVector(
-            mlir::GetVector<int64_t>(vhlo_op.getInputSpatialDimensions()
-                                         .cast<mlir::vhlo::TensorV1Attr>(),
+            mlir::GetVector<int64_t>(mlir::cast<mlir::vhlo::TensorV1Attr>(
+                                         vhlo_op.getInputSpatialDimensions()),
                                      vhlo_type_converter));
         BufferOffset<flatbuffers::Vector<unsigned int>> precision_config = 0;
         if (vhlo_op.getPrecisionConfig()) {
           precision_config = BuildVhloPrecisionConfigV1(
-              vhlo_op.getPrecisionConfig().dyn_cast<mlir::vhlo::ArrayV1Attr>());
+              mlir::dyn_cast<mlir::vhlo::ArrayV1Attr>(
+                  vhlo_op.getPrecisionConfig()));
         }
 
         auto convolution_option = tflite::CreateStablehloConvolutionOptions(
@@ -2435,12 +2440,11 @@ std::optional<BufferOffset<tflite::Operator>> Translator::BuildOperator(
             kernel_output_feature_dimension, kernel_spatial_dimensions,
             output_batch_dimension, output_feature_dimension,
             output_spatial_dimension,
-            vhlo_op.getFeatureGroupCount()
-                .cast<mlir::vhlo::IntegerV1Attr>()
+            mlir::cast<mlir::vhlo::IntegerV1Attr>(
+                vhlo_op.getFeatureGroupCount())
                 .getValue()
                 .getSExtValue(),
-            vhlo_op.getBatchGroupCount()
-                .cast<mlir::vhlo::IntegerV1Attr>()
+            mlir::cast<mlir::vhlo::IntegerV1Attr>(vhlo_op.getBatchGroupCount())
                 .getValue()
                 .getSExtValue(),
             precision_config);
@@ -2458,8 +2462,8 @@ std::optional<BufferOffset<tflite::Operator>> Translator::BuildOperator(
             op_name, tflite::BuiltinOperator_STABLEHLO_BROADCAST_IN_DIM);
 
         auto broadcast_dimensions = builder_.CreateVector(
-            mlir::GetVector<int64_t>(vhlo_op.getBroadcastDimensions()
-                                         .cast<mlir::vhlo::TensorV1Attr>(),
+            mlir::GetVector<int64_t>(mlir::cast<mlir::vhlo::TensorV1Attr>(
+                                         vhlo_op.getBroadcastDimensions()),
                                      vhlo_type_converter));
 
         auto broadcast_option = tflite::CreateStablehloBroadcastInDimOptions(
@@ -2478,8 +2482,8 @@ std::optional<BufferOffset<tflite::Operator>> Translator::BuildOperator(
         uint32_t opcode_index = GetOpcodeIndex(
             op_name, tflite::BuiltinOperator_STABLEHLO_CUSTOM_CALL);
         auto op_api_version =
-            vhlo_op.getApiVersion()
-                .cast<mlir::vhlo::CustomCallApiVersionV1Attr>()
+            mlir::cast<mlir::vhlo::CustomCallApiVersionV1Attr>(
+                vhlo_op.getApiVersion())
                 .getValue();
         int32_t api_version = 0;
         if (op_api_version ==
@@ -2495,16 +2499,14 @@ std::optional<BufferOffset<tflite::Operator>> Translator::BuildOperator(
                                   API_VERSION_STATUS_RETURNING_UNIFIED)
           api_version = 3;
 
-        auto call_target_name =
-            builder_.CreateString(vhlo_op.getCallTargetName()
-                                      .cast<mlir::vhlo::StringV1Attr>()
-                                      .getValue()
-                                      .str());
-        auto backend_config =
-            builder_.CreateString(vhlo_op.getBackendConfig()
-                                      .cast<mlir::vhlo::StringV1Attr>()
-                                      .getValue()
-                                      .str());
+        auto call_target_name = builder_.CreateString(
+            mlir::cast<mlir::vhlo::StringV1Attr>(vhlo_op.getCallTargetName())
+                .getValue()
+                .str());
+        auto backend_config = builder_.CreateString(
+            mlir::cast<mlir::vhlo::StringV1Attr>(vhlo_op.getBackendConfig())
+                .getValue()
+                .str());
         // building the computation info
         auto flex_builder = std::make_unique<flexbuffers::Builder>();
         size_t map_start = flex_builder->StartMap();
@@ -2517,25 +2519,25 @@ std::optional<BufferOffset<tflite::Operator>> Translator::BuildOperator(
           if (name == "call_target_name" || name == "backend_config") continue;
           if (llvm::isa<mlir::BoolAttr>(attr))
             flex_builder->Bool(name.c_str(),
-                               attr.cast<mlir::BoolAttr>().getValue());
+                               mlir::cast<mlir::BoolAttr>(attr).getValue());
           if (llvm::isa<mlir::StringAttr>(attr))
             flex_builder->String(
-                name.c_str(), attr.cast<mlir::StringAttr>().getValue().str());
+                name.c_str(),
+                mlir::cast<mlir::StringAttr>(attr).getValue().str());
           if (llvm::isa<mlir::vhlo::BooleanV1Attr>(attr))
             flex_builder->Bool(
                 name.c_str(),
-                attr.cast<mlir::vhlo::BooleanV1Attr>().getValue());
+                mlir::cast<mlir::vhlo::BooleanV1Attr>(attr).getValue());
           if (llvm::isa<mlir::vhlo::StringV1Attr>(attr))
             flex_builder->String(
                 name.c_str(),
-                attr.cast<mlir::vhlo::StringV1Attr>().getValue().str());
+                mlir::cast<mlir::vhlo::StringV1Attr>(attr).getValue().str());
         }
         flex_builder->EndMap(map_start);
         flex_builder->Finish();
         auto custom_call_option = tflite::CreateStablehloCustomCallOptions(
             builder_, call_target_name,
-            vhlo_op.getHasSideEffect()
-                .cast<::mlir::vhlo::BooleanV1Attr>()
+            mlir::cast<::mlir::vhlo::BooleanV1Attr>(vhlo_op.getHasSideEffect())
                 .getValue(),
             backend_config, api_version, 0,
             builder_.CreateVector(flex_builder->GetBuffer()));
@@ -2553,7 +2555,7 @@ std::optional<BufferOffset<tflite::Operator>> Translator::BuildOperator(
             GetOpcodeIndex(op_name, tflite::BuiltinOperator_STABLEHLO_REDUCE);
 
         auto dimension = builder_.CreateVector(mlir::GetVector<int64_t>(
-            vhlo_op.getDimensions().cast<mlir::vhlo::TensorV1Attr>(),
+            mlir::cast<mlir::vhlo::TensorV1Attr>(vhlo_op.getDimensions()),
             vhlo_type_converter));
         auto& body = vhlo_op.getBody();
         int32_t subgraph_index = UnnamedRegionToSubgraph(
@@ -2576,26 +2578,27 @@ std::optional<BufferOffset<tflite::Operator>> Translator::BuildOperator(
             op_name, tflite::BuiltinOperator_STABLEHLO_DOT_GENERAL);
 
         auto lhs_batching_dimensions = builder_.CreateVector(
-            mlir::GetVector<int64_t>(vhlo_op.getLhsBatchingDimensions()
-                                         .cast<mlir::vhlo::TensorV1Attr>(),
+            mlir::GetVector<int64_t>(mlir::cast<mlir::vhlo::TensorV1Attr>(
+                                         vhlo_op.getLhsBatchingDimensions()),
                                      vhlo_type_converter));
         auto rhs_batching_dimensions = builder_.CreateVector(
-            mlir::GetVector<int64_t>(vhlo_op.getRhsBatchingDimensions()
-                                         .cast<mlir::vhlo::TensorV1Attr>(),
+            mlir::GetVector<int64_t>(mlir::cast<mlir::vhlo::TensorV1Attr>(
+                                         vhlo_op.getRhsBatchingDimensions()),
                                      vhlo_type_converter));
         auto lhs_contracting_dimensions = builder_.CreateVector(
-            mlir::GetVector<int64_t>(vhlo_op.getLhsContractingDimensions()
-                                         .cast<mlir::vhlo::TensorV1Attr>(),
+            mlir::GetVector<int64_t>(mlir::cast<mlir::vhlo::TensorV1Attr>(
+                                         vhlo_op.getLhsContractingDimensions()),
                                      vhlo_type_converter));
         auto rhs_contracting_dimensions = builder_.CreateVector(
-            mlir::GetVector<int64_t>(vhlo_op.getRhsContractingDimensions()
-                                         .cast<mlir::vhlo::TensorV1Attr>(),
+            mlir::GetVector<int64_t>(mlir::cast<mlir::vhlo::TensorV1Attr>(
+                                         vhlo_op.getRhsContractingDimensions()),
                                      vhlo_type_converter));
 
         BufferOffset<flatbuffers::Vector<unsigned int>> precision_config = 0;
         if (vhlo_op.getPrecisionConfig()) {
-          precision_config = BuildVhloPrecisionConfigV1(
-              vhlo_op.getPrecisionConfig().cast<mlir::vhlo::ArrayV1Attr>());
+          precision_config =
+              BuildVhloPrecisionConfigV1(mlir::cast<mlir::vhlo::ArrayV1Attr>(
+                  vhlo_op.getPrecisionConfig()));
         }
 
         auto dot_geneoral_option = tflite::CreateStablehloDotGeneralOptions(
@@ -2621,11 +2624,11 @@ std::optional<BufferOffset<tflite::Operator>> Translator::BuildOperator(
 
         auto sort_option = tflite::CreateStablehloSortOptions(
             builder_,
-            vhlo_op.getDimension()
-                .cast<mlir::vhlo::IntegerV1Attr>()
+            mlir::cast<mlir::vhlo::IntegerV1Attr>(vhlo_op.getDimension())
                 .getValue()
                 .getSExtValue(),
-            vhlo_op.getIsStable().cast<mlir::vhlo::BooleanV1Attr>().getValue(),
+            mlir::cast<mlir::vhlo::BooleanV1Attr>(vhlo_op.getIsStable())
+                .getValue(),
             comparator_subgraph_index);
 
         return tflite::CreateOperator(
@@ -2667,7 +2670,7 @@ std::optional<BufferOffset<tflite::Operator>> Translator::BuildOperator(
         auto transpose_option = tflite::CreateStablehloTransposeOptions(
             builder_,
             builder_.CreateVector(mlir::GetVector<int64_t>(
-                vhlo_op.getPermutation().cast<mlir::vhlo::TensorV1Attr>(),
+                mlir::cast<mlir::vhlo::TensorV1Attr>(vhlo_op.getPermutation()),
                 vhlo_type_converter)));
 
         return tflite::CreateOperator(
@@ -2793,7 +2796,8 @@ void Translator::InitializeNamesFromAttribute(FuncOp fn, bool* has_input_attr) {
 
   llvm::SmallVector<llvm::StringRef, 2> input_names;
   llvm::SmallVector<llvm::StringRef, 2> output_names;
-  if (auto str = dict_attr.get("inputs").dyn_cast_or_null<mlir::StringAttr>()) {
+  if (auto str =
+          mlir::dyn_cast_or_null<mlir::StringAttr>(dict_attr.get("inputs"))) {
     str.getValue().split(input_names, ',', /*MaxSplit=*/-1,
                          /*KeepEmpty=*/false);
     if (input_names.size() != fn.getNumArguments()) {
@@ -2807,7 +2811,7 @@ void Translator::InitializeNamesFromAttribute(FuncOp fn, bool* has_input_attr) {
   }
 
   if (auto str =
-          dict_attr.get("outputs").dyn_cast_or_null<mlir::StringAttr>()) {
+          mlir::dyn_cast_or_null<mlir::StringAttr>(dict_attr.get("outputs"))) {
     str.getValue().split(output_names, ',', /*MaxSplit=*/-1,
                          /*KeepEmpty=*/false);
     auto term = fn.back().getTerminator();
@@ -2832,13 +2836,14 @@ bool Translator::IsStatefulOperand(mlir::Operation* op, int operand_index) {
 BufferOffset<tflite::QuantizationParameters>
 Translator::GetQuantizationForQuantStatsOpOutput(
     mlir::quantfork::StatisticsOp stats_op) {
-  auto layer_stats = stats_op.getLayerStats().cast<mlir::DenseFPElementsAttr>();
+  auto layer_stats =
+      mlir::cast<mlir::DenseFPElementsAttr>(stats_op.getLayerStats());
   std::optional<mlir::ElementsAttr> axis_stats = stats_op.getAxisStats();
   std::optional<uint64_t> axis = stats_op.getAxis();
   std::vector<float> mins, maxs;
   mlir::DenseFPElementsAttr min_max_attr =
       axis_stats.has_value()
-          ? axis_stats.value().cast<mlir::DenseFPElementsAttr>()
+          ? mlir::cast<mlir::DenseFPElementsAttr>(axis_stats.value())
           : layer_stats;
 
   for (const auto& index_and_value :
@@ -2873,7 +2878,7 @@ std::optional<BufferOffset<tflite::SubGraph>> Translator::BuildSubGraph(
   auto build_tensor_and_buffer = [&](Value value, const int subgraph_index,
                                      const std::string& tensor_name) {
     // NoneType represents optional and may be skipped here.
-    if (value.getType().isa<NoneType>()) {
+    if (mlir::isa<NoneType>(value.getType())) {
       return true;
     }
 
@@ -2957,7 +2962,8 @@ std::optional<BufferOffset<tflite::SubGraph>> Translator::BuildSubGraph(
           "effective_hidden_scale_intermediate"};
       for (const std::string& intermediate : intermediate_names) {
         auto intermediate_attr = inst.getAttr(intermediate);
-        if (auto attr = intermediate_attr.dyn_cast_or_null<mlir::TypeAttr>()) {
+        if (auto attr =
+                mlir::dyn_cast_or_null<mlir::TypeAttr>(intermediate_attr)) {
           Type qtype = attr.getValue();
           auto tensor_or = BuildTensorFromType(
               qtype, name_mapper_.GetUniqueName(intermediate).str());
@@ -3003,7 +3009,7 @@ std::optional<BufferOffset<tflite::SubGraph>> Translator::BuildSubGraph(
     std::vector<int32_t> operands;
     operands.reserve(real_inst->getNumOperands());
     for (auto operand : real_inst->getOperands()) {
-      if (operand.getType().isa<NoneType>())
+      if (mlir::isa<NoneType>(operand.getType()))
         operands.push_back(kTfLiteOptionalTensor);
       else if (auto stats_op =
                    llvm::dyn_cast_or_null<mlir::quantfork::StatisticsOp>(
@@ -3084,7 +3090,7 @@ Translator::CreateMetadataVector() {
     for (const auto& named_attr : dict_attr) {
       StringRef name = named_attr.getName();
       mlir::Attribute attr = named_attr.getValue();
-      if (auto content = attr.dyn_cast<StringAttr>()) {
+      if (auto content = mlir::dyn_cast<StringAttr>(attr)) {
         metadata.push_back(BuildMetadata(name, content.getValue()));
       } else {
         module_.emitError(
@@ -3132,7 +3138,7 @@ Translator::CreateMetadataVector() {
 llvm::SmallVector<llvm::StringRef, 2> GetStringsFromAttrWithSeparator(
     mlir::DictionaryAttr attr, const std::string& attr_key) {
   llvm::SmallVector<llvm::StringRef, 2> result;
-  if (auto str = attr.get(attr_key).dyn_cast_or_null<mlir::StringAttr>()) {
+  if (auto str = mlir::dyn_cast_or_null<mlir::StringAttr>(attr.get(attr_key))) {
     str.getValue().split(result, ',', /*MaxSplit=*/-1,
                          /*KeepEmpty=*/false);
   }
@@ -3151,9 +3157,11 @@ std::vector<std::string> GetStringsFromDictionaryAttr(
     auto attrs = arg_attr.getValue();
     for (const auto attr : attrs) {
       if (attr.getName() == attr_name) {
-        auto array_attr = attr.getValue().dyn_cast_or_null<mlir::ArrayAttr>();
+        auto array_attr =
+            mlir::dyn_cast_or_null<mlir::ArrayAttr>(attr.getValue());
         if (!array_attr || array_attr.empty()) continue;
-        auto string_attr = array_attr[0].dyn_cast_or_null<mlir::StringAttr>();
+        auto string_attr =
+            mlir::dyn_cast_or_null<mlir::StringAttr>(array_attr[0]);
         if (!string_attr) continue;
         result.push_back(string_attr.getValue().str());
       }
@@ -3236,7 +3244,7 @@ std::vector<SignatureDefData> BuildSignaturedef(
     auto unique_name = std::string(name_mapper.GetUniqueName(operand.get()));
     result[0].outputs[sig_def_outputs[i]] = unique_name;
   }
-  if (auto name_attr = exported_name[0].dyn_cast_or_null<StringAttr>())
+  if (auto name_attr = mlir::dyn_cast_or_null<StringAttr>(exported_name[0]))
     result[0].signature_key = name_attr.getValue().str();
   result[0].subgraph_index = subgraph_index;
   return result;
@@ -3722,8 +3730,8 @@ BufferOffset<tflite::SparsityParameters> Translator::BuildSparsityParameters(
   std::vector<flatbuffers::Offset<tflite::DimensionMetadata>> fb_dim_metadata(
       dim_size);
   for (int i = 0; i < dim_size; i++) {
-    const auto dim_metadata =
-        s_attr.getDimMetadata()[i].dyn_cast<mlir::TFL::DimensionMetadataAttr>();
+    const auto dim_metadata = mlir::dyn_cast<mlir::TFL::DimensionMetadataAttr>(
+        s_attr.getDimMetadata()[i]);
     if (dim_metadata.getFormat().getValue() ==
         mlir::TFL::DimensionType::DENSE) {
       fb_dim_metadata[i] = tflite::CreateDimensionMetadata(
diff --git a/tensorflow/compiler/mlir/lite/flatbuffer_operator.cc b/tensorflow/compiler/mlir/lite/flatbuffer_operator.cc
index 6a10262989930f..fb90b631ea1680 100644
--- a/tensorflow/compiler/mlir/lite/flatbuffer_operator.cc
+++ b/tensorflow/compiler/mlir/lite/flatbuffer_operator.cc
@@ -42,6 +42,7 @@ limitations under the License.
 #include "mlir/IR/Builders.h"  // from @llvm-project
 #include "mlir/IR/BuiltinAttributes.h"  // from @llvm-project
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "stablehlo/dialect/StablehloOps.h"  // from @stablehlo
 #include "stablehlo/dialect/VhloOps.h"  // from @stablehlo
 #include "tensorflow/compiler/mlir/lite/ir/tfl_ops.h"
@@ -177,7 +178,7 @@ ConvertI64ArrayAttrForOptionWriter(mlir::ArrayAttr attrArray,
   std::vector<int32_t> intVec;
   intVec.reserve(attrArray.getValue().size());
   for (auto attr : attrArray.getValue()) {
-    intVec.push_back(attr.cast<mlir::IntegerAttr>().getInt());
+    intVec.push_back(mlir::cast<mlir::IntegerAttr>(attr).getInt());
   }
   return builder->CreateVector(intVec);
 }
@@ -189,7 +190,7 @@ ConvertF32ArrayAttrForOptionWriter(mlir::ArrayAttr attrArray,
   floatVec.reserve(attrArray.getValue().size());
   for (auto attr : attrArray.getValue()) {
     floatVec.push_back(
-        attr.cast<mlir::FloatAttr>().getValue().convertToFloat());
+        mlir::cast<mlir::FloatAttr>(attr).getValue().convertToFloat());
   }
   return builder->CreateVector(floatVec);
 }
@@ -341,8 +342,8 @@ static mlir::Attribute BuildVhloTensorV1Attr(std::vector<int64_t> shape,
                                              std::vector<int64_t> value,
                                              mlir::Builder builder) {
   mlir::StablehloVhloTypeConverter type_converter;
-  auto builtin_attr = BuildRankedTensorAttr(shape, value, builder)
-                          .dyn_cast<mlir::DenseIntElementsAttr>();
+  auto builtin_attr = mlir::dyn_cast<mlir::DenseIntElementsAttr>(
+      BuildRankedTensorAttr(shape, value, builder));
   auto vhlo_type = type_converter.convertType(builtin_attr.getType());
   return mlir::vhlo::TensorV1Attr::get(builder.getContext(), vhlo_type,
                                        builtin_attr.getRawData());
@@ -352,8 +353,8 @@ static mlir::Attribute BuildVhloTensorV1Attr(std::vector<int64_t> shape,
                                              std::vector<bool> value,
                                              mlir::Builder builder) {
   mlir::StablehloVhloTypeConverter type_converter;
-  auto builtin_attr = BuildRankedTensorAttr(shape, value, builder)
-                          .dyn_cast<mlir::DenseIntElementsAttr>();
+  auto builtin_attr = mlir::dyn_cast<mlir::DenseIntElementsAttr>(
+      BuildRankedTensorAttr(shape, value, builder));
   auto vhlo_type = type_converter.convertType(builtin_attr.getType());
   return mlir::vhlo::TensorV1Attr::get(builder.getContext(), vhlo_type,
                                        builtin_attr.getRawData());
diff --git a/tensorflow/compiler/mlir/lite/flatbuffer_operator.h b/tensorflow/compiler/mlir/lite/flatbuffer_operator.h
index 381f2a4c024549..4a54264b6244f2 100644
--- a/tensorflow/compiler/mlir/lite/flatbuffer_operator.h
+++ b/tensorflow/compiler/mlir/lite/flatbuffer_operator.h
@@ -30,6 +30,7 @@ limitations under the License.
 #include "mlir/IR/Attributes.h"  // from @llvm-project
 #include "mlir/IR/Builders.h"  // from @llvm-project
 #include "mlir/IR/Operation.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "stablehlo/dialect/StablehloOps.h"  // from @stablehlo
 #include "stablehlo/dialect/VhloOps.h"  // from @stablehlo
 #include "stablehlo/dialect/VhloTypes.h"  // from @stablehlo
@@ -65,7 +66,7 @@ class StablehloVhloTypeConverter : public mlir::vhlo::VhloTypeConverter {
       return attr;
 
     if (auto stablehloAttr =
-            attr.dyn_cast_or_null<mlir::stablehlo::TypeExtensionsAttr>()) {
+            mlir::dyn_cast_or_null<mlir::stablehlo::TypeExtensionsAttr>(attr)) {
       return mlir::vhlo::TypeExtensionsV1Attr::get(stablehloAttr.getContext(),
                                                    stablehloAttr.getBounds());
     }
@@ -88,7 +89,8 @@ class VhloToStablehloTypeConverter : public vhlo::VhloTypeConverter {
   }
 
   Attribute convertEncoding(Attribute attr) const final {
-    if (auto vhloAttr = attr.dyn_cast_or_null<vhlo::TypeExtensionsV1Attr>()) {
+    if (auto vhloAttr =
+            mlir::dyn_cast_or_null<vhlo::TypeExtensionsV1Attr>(attr)) {
       return stablehlo::TypeExtensionsAttr::get(vhloAttr.getContext(),
                                                 vhloAttr.getBounds());
     }
@@ -296,8 +298,8 @@ static inline std::vector<T> GetVector(
     vhlo::TensorV1Attr elements,
     mlir::vhlo::VhloTypeConverter &vhlo_type_converter) {
   return GetOptionalVector<T>(mlir::DenseIntElementsAttr::getFromRawBuffer(
-      vhlo_type_converter.convertType(elements.getType())
-          .cast<mlir::ShapedType>(),
+      mlir::cast<mlir::ShapedType>(
+          vhlo_type_converter.convertType(elements.getType())),
       elements.getData()));
 }
 
diff --git a/tensorflow/compiler/mlir/lite/metrics/BUILD b/tensorflow/compiler/mlir/lite/metrics/BUILD
index 6218a2fb30a829..464cd8f33822b7 100644
--- a/tensorflow/compiler/mlir/lite/metrics/BUILD
+++ b/tensorflow/compiler/mlir/lite/metrics/BUILD
@@ -72,5 +72,6 @@ cc_library(
         "//tensorflow/lite/python/metrics:converter_error_data_proto_cc",
         "@llvm-project//llvm:Support",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
     ],
 )
diff --git a/tensorflow/compiler/mlir/lite/metrics/types_util.cc b/tensorflow/compiler/mlir/lite/metrics/types_util.cc
index b47347ceb03827..7dd658e54dd12e 100644
--- a/tensorflow/compiler/mlir/lite/metrics/types_util.cc
+++ b/tensorflow/compiler/mlir/lite/metrics/types_util.cc
@@ -20,6 +20,7 @@ limitations under the License.
 #include "llvm/ADT/TypeSwitch.h"
 #include "mlir/IR/BuiltinAttributes.h"  // from @llvm-project
 #include "mlir/IR/Location.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/lite/python/metrics/converter_error_data.pb.h"
 
 namespace mlir {
@@ -67,8 +68,8 @@ class LocationExtractor : public Location {
           new_call->set_name(loc.getName().str());
           // Add child as the source location.
           auto child_loc = loc.getChildLoc();
-          if (child_loc.isa<FileLineColLoc>()) {
-            auto typed_child_loc = child_loc.dyn_cast<FileLineColLoc>();
+          if (mlir::isa<FileLineColLoc>(child_loc)) {
+            auto typed_child_loc = mlir::dyn_cast<FileLineColLoc>(child_loc);
             ExtractFileLine(typed_child_loc, new_call->mutable_source());
           }
         })
@@ -83,7 +84,7 @@ class LocationExtractor : public Location {
           // Skip the first location if it stores information for propagating
           // op_type metadata.
           if (num_locs > 0) {
-            if (auto name_loc = locations[0].dyn_cast<mlir::NameLoc>()) {
+            if (auto name_loc = mlir::dyn_cast<mlir::NameLoc>(locations[0])) {
               if (name_loc.getName().strref().ends_with(":")) {
                 if (num_locs == 2) {
                   return LocationExtractor(locations[1]).Extract(error_data);
diff --git a/tensorflow/compiler/mlir/lite/python/saved_model_to_tfl_flatbuffer.cc b/tensorflow/compiler/mlir/lite/python/saved_model_to_tfl_flatbuffer.cc
index 16e12bbb6da04d..1518690c9880f0 100644
--- a/tensorflow/compiler/mlir/lite/python/saved_model_to_tfl_flatbuffer.cc
+++ b/tensorflow/compiler/mlir/lite/python/saved_model_to_tfl_flatbuffer.cc
@@ -29,6 +29,7 @@ limitations under the License.
 #include "mlir/IR/MLIRContext.h"  // from @llvm-project
 #include "mlir/IR/TypeUtilities.h"  // from @llvm-project
 #include "mlir/Support/FileUtilities.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/cc/saved_model/loader.h"
 #include "tensorflow/compiler/mlir/lite/common/tfl_pass_config.h"
 #include "tensorflow/compiler/mlir/lite/python/tf_tfl_flatbuffer_helpers.h"
@@ -80,7 +81,7 @@ Status HandleInputOutputArraysWithModule(
   if (!input_attr) {
     return errors::InvalidArgument("no inputs attribute found");
   }
-  auto input_names = input_attr.cast<mlir::StringAttr>().getValue();
+  auto input_names = mlir::cast<mlir::StringAttr>(input_attr).getValue();
   input_names.split(function_input_names, ",", /*MaxSplit=*/-1,
                     /*KeepEmpty=*/false);
   const int function_input_names_size = function_input_names.size();
@@ -106,7 +107,7 @@ Status HandleInputOutputArraysWithModule(
   if (!output_attr) {
     return errors::InvalidArgument("no outputs attribute found");
   }
-  auto output_names = output_attr.cast<mlir::StringAttr>().getValue();
+  auto output_names = mlir::cast<mlir::StringAttr>(output_attr).getValue();
   output_names.split(function_output_names, ",", /*MaxSplit=*/-1,
                      /*KeepEmpty=*/false);
   const int function_output_names_size = function_output_names.size();
diff --git a/tensorflow/compiler/mlir/lite/quantization/ir/ConvertConst.cc b/tensorflow/compiler/mlir/lite/quantization/ir/ConvertConst.cc
index 3de159a1414429..f6eac3e90ec8bd 100644
--- a/tensorflow/compiler/mlir/lite/quantization/ir/ConvertConst.cc
+++ b/tensorflow/compiler/mlir/lite/quantization/ir/ConvertConst.cc
@@ -19,6 +19,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinAttributeInterfaces.h"  // from @llvm-project
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/IR/Matchers.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/lite/quantization/ir/Passes.h"
 #include "tensorflow/compiler/mlir/lite/quantization/ir/QuantOps.h"
@@ -80,7 +81,7 @@ LogicalResult QuantizedConstRewrite::matchAndRewrite(
   }
 
   // Is the constant value a type expressed in a way that we support?
-  if (!value.isa<FloatAttr, DenseElementsAttr, SparseElementsAttr>()) {
+  if (!mlir::isa<FloatAttr, DenseElementsAttr, SparseElementsAttr>(value)) {
     return failure();
   }
 
diff --git a/tensorflow/compiler/mlir/lite/quantization/ir/ConvertSimQuant.cc b/tensorflow/compiler/mlir/lite/quantization/ir/ConvertSimQuant.cc
index e99addc5b5f8a5..f0aa7caec0be8d 100644
--- a/tensorflow/compiler/mlir/lite/quantization/ir/ConvertSimQuant.cc
+++ b/tensorflow/compiler/mlir/lite/quantization/ir/ConvertSimQuant.cc
@@ -15,6 +15,7 @@ limitations under the License.
 
 #include "mlir/Dialect/Func/IR/FuncOps.h"  // from @llvm-project
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/lite/quantization/ir/Passes.h"
 #include "tensorflow/compiler/mlir/lite/quantization/ir/QuantOps.h"
@@ -121,9 +122,9 @@ class ConstFakeQuantPerAxisRewrite
     min.reserve(fqOp.getMin().size());
     max.reserve(fqOp.getMax().size());
     for (auto m : fqOp.getMin())
-      min.push_back(m.cast<FloatAttr>().getValueAsDouble());
+      min.push_back(mlir::cast<FloatAttr>(m).getValueAsDouble());
     for (auto m : fqOp.getMax())
-      max.push_back(m.cast<FloatAttr>().getValueAsDouble());
+      max.push_back(mlir::cast<FloatAttr>(m).getValueAsDouble());
 
     return fakeQuantAttrsToType(fqOp.getLoc(), fqOp.getNumBits(),
                                 fqOp.getAxis(), min, max, fqOp.getNarrowRange(),
diff --git a/tensorflow/compiler/mlir/lite/quantization/ir/QuantOps.cc b/tensorflow/compiler/mlir/lite/quantization/ir/QuantOps.cc
index d111141958c403..8aa6475b888702 100644
--- a/tensorflow/compiler/mlir/lite/quantization/ir/QuantOps.cc
+++ b/tensorflow/compiler/mlir/lite/quantization/ir/QuantOps.cc
@@ -25,6 +25,7 @@ limitations under the License.
 #include "mlir/IR/MLIRContext.h"  // from @llvm-project
 #include "mlir/IR/Matchers.h"  // from @llvm-project
 #include "mlir/IR/PatternMatch.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 
 using namespace mlir;
 using namespace mlir::quantfork;
@@ -51,20 +52,20 @@ OpFoldResult StorageCastOp::fold(FoldAdaptor) {
 
 /// The quantization specification should match the expressed type.
 static bool isValidQuantizationSpec(Attribute quantSpec, Type expressed) {
-  if (auto typeAttr = quantSpec.dyn_cast<TypeAttr>()) {
+  if (auto typeAttr = mlir::dyn_cast<TypeAttr>(quantSpec)) {
     Type spec = typeAttr.getValue();
-    if (spec.isa<TensorType, VectorType>()) return false;
+    if (mlir::isa<TensorType, VectorType>(spec)) return false;
 
     // The spec should be either a quantized type which is compatible to the
     // expressed type, or a primitive type which is as same as the
     // (element type of) the expressed type.
-    if (auto quantizedType = spec.dyn_cast<QuantizedType>())
+    if (auto quantizedType = mlir::dyn_cast<QuantizedType>(spec))
       return quantizedType.isCompatibleExpressedType(expressed);
 
-    if (auto tensorType = expressed.dyn_cast<TensorType>())
+    if (auto tensorType = mlir::dyn_cast<TensorType>(expressed))
       return spec == tensorType.getElementType();
 
-    if (auto vectorType = expressed.dyn_cast<VectorType>())
+    if (auto vectorType = mlir::dyn_cast<VectorType>(expressed))
       return spec == vectorType.getElementType();
   }
   return false;
@@ -99,13 +100,13 @@ LogicalResult QuantizeRegionOp::verify() {
 }
 
 LogicalResult StatisticsOp::verify() {
-  auto tensorArg = getArg().getType().dyn_cast<TensorType>();
+  auto tensorArg = mlir::dyn_cast<TensorType>(getArg().getType());
   if (!tensorArg) return emitOpError("arg needs to be tensor type.");
 
   // Verify layerStats attribute.
   {
     auto layerStatsType = getLayerStats().getShapedType();
-    if (!layerStatsType.getElementType().isa<FloatType>()) {
+    if (!mlir::isa<FloatType>(layerStatsType.getElementType())) {
       return emitOpError("layerStats must have a floating point element type");
     }
     if (layerStatsType.getRank() != 1 || layerStatsType.getDimSize(0) != 2) {
@@ -122,7 +123,7 @@ LogicalResult StatisticsOp::verify() {
                         std::multiplies<int64_t>());
 
     auto axisStatsType = getAxisStats()->getShapedType();
-    if (!axisStatsType.getElementType().isa<FloatType>()) {
+    if (!mlir::isa<FloatType>(axisStatsType.getElementType())) {
       return emitOpError("axisStats must have a floating point element type");
     }
     if (axisStatsType.getRank() != 2 || axisStatsType.getDimSize(1) != 2 ||
diff --git a/tensorflow/compiler/mlir/lite/quantization/ir/QuantizeUtils.cc b/tensorflow/compiler/mlir/lite/quantization/ir/QuantizeUtils.cc
index 919c711272b2c1..2ad06f77de8866 100644
--- a/tensorflow/compiler/mlir/lite/quantization/ir/QuantizeUtils.cc
+++ b/tensorflow/compiler/mlir/lite/quantization/ir/QuantizeUtils.cc
@@ -32,8 +32,8 @@ using namespace mlir::quantfork;
 static Attribute convertPrimitiveValueAttr(
     Attribute origRealValue, quant::QuantizedType quantizedElementType,
     const UniformQuantizedValueConverter &converter, Type &outConvertedType) {
-  if (origRealValue.isa<FloatAttr>()) {
-    FloatAttr floatAttr = origRealValue.cast<FloatAttr>();
+  if (mlir::isa<FloatAttr>(origRealValue)) {
+    FloatAttr floatAttr = mlir::cast<FloatAttr>(origRealValue);
     outConvertedType = quantizedElementType.getStorageType();
     return IntegerAttr::get(quantizedElementType.getStorageType(),
                             converter.quantizeFloatToInt(floatAttr.getValue()));
@@ -64,11 +64,11 @@ static SparseElementsAttr convertSparseElementsAttr(
     quant::QuantizedType quantizedElementType,
     const UniformQuantizedValueConverter &converter) {
   DenseElementsAttr realDenseAttr = realSparseAttr.getValues();
-  if (!realDenseAttr.isa<DenseFPElementsAttr>()) {
+  if (!mlir::isa<DenseFPElementsAttr>(realDenseAttr)) {
     return nullptr;
   }
   DenseElementsAttr quantDenseAttr =
-      convertDenseFPElementsAttr(realDenseAttr.cast<DenseFPElementsAttr>(),
+      convertDenseFPElementsAttr(mlir::cast<DenseFPElementsAttr>(realDenseAttr),
                                  quantizedElementType, converter);
   if (!quantDenseAttr) {
     return nullptr;
@@ -76,9 +76,9 @@ static SparseElementsAttr convertSparseElementsAttr(
 
   // Cast from an expressed-type-based type to storage-type-based type,
   // preserving the sparse shape (i.e. tensor<4xf32> -> tensor<4xi8>).
-  ShapedType newSparseType =
-      quantizedElementType.castExpressedToStorageType(realSparseAttr.getType())
-          .dyn_cast_or_null<ShapedType>();
+  ShapedType newSparseType = mlir::dyn_cast_or_null<ShapedType>(
+      quantizedElementType.castExpressedToStorageType(
+          realSparseAttr.getType()));
   if (!newSparseType) {
     return nullptr;
   }
@@ -93,17 +93,19 @@ Attribute mlir::quantfork::quantizeAttrUniform(
     Attribute realValue, quant::UniformQuantizedType quantizedElementType,
     const UniformQuantizedValueConverter &converter, Type &outConvertedType) {
   // Fork to handle different variants of constants supported.
-  if (realValue.isa<DenseFPElementsAttr>()) {
+  if (mlir::isa<DenseFPElementsAttr>(realValue)) {
     // Dense tensor or vector constant.
-    auto converted = convertDenseFPElementsAttr(
-        realValue.cast<DenseFPElementsAttr>(), quantizedElementType, converter);
+    auto converted =
+        convertDenseFPElementsAttr(mlir::cast<DenseFPElementsAttr>(realValue),
+                                   quantizedElementType, converter);
     outConvertedType = converted.getType();
     return converted;
   }
-  if (realValue.isa<SparseElementsAttr>()) {
+  if (mlir::isa<SparseElementsAttr>(realValue)) {
     // Sparse tensor or vector constant.
-    auto converted = convertSparseElementsAttr(
-        realValue.cast<SparseElementsAttr>(), quantizedElementType, converter);
+    auto converted =
+        convertSparseElementsAttr(mlir::cast<SparseElementsAttr>(realValue),
+                                  quantizedElementType, converter);
     outConvertedType = converted.getType();
     return converted;
   }
@@ -121,13 +123,14 @@ Attribute mlir::quantfork::quantizeAttr(
     Attribute realValue, quant::QuantizedType quantizedElementType,
     Type &outConvertedType) {
   if (auto uniformQuantized =
-          quantizedElementType.dyn_cast<quant::UniformQuantizedType>()) {
+          mlir::dyn_cast<quant::UniformQuantizedType>(quantizedElementType)) {
     UniformQuantizedValueConverter converter(uniformQuantized);
     return quantizeAttrUniform(realValue, uniformQuantized, converter,
                                outConvertedType);
   }
   if (auto uniformQuantizedPerAxis =
-          quantizedElementType.dyn_cast<quant::UniformQuantizedPerAxisType>()) {
+          mlir::dyn_cast<quant::UniformQuantizedPerAxisType>(
+              quantizedElementType)) {
     UniformQuantizedPerAxisValueConverter converter(uniformQuantizedPerAxis);
     auto converted = converter.convert(realValue);
     // TODO: why we need this outConvertedType? remove it?
diff --git a/tensorflow/compiler/mlir/lite/quantization/tensorflow/fallback_to_flex_ops.cc b/tensorflow/compiler/mlir/lite/quantization/tensorflow/fallback_to_flex_ops.cc
index 9a25d849ea7c8a..e6284d273e50d0 100644
--- a/tensorflow/compiler/mlir/lite/quantization/tensorflow/fallback_to_flex_ops.cc
+++ b/tensorflow/compiler/mlir/lite/quantization/tensorflow/fallback_to_flex_ops.cc
@@ -268,7 +268,7 @@ Value SetNoFallbackAttr(PatternRewriter &rewriter, Value val) {
 
 // Returns true if the attr is a float attribute and be equal to value.
 static bool FloatValueEquals(const Attribute &attr, double value) {
-  auto fp_attr = attr.dyn_cast_or_null<DenseFPElementsAttr>();
+  auto fp_attr = mlir::dyn_cast_or_null<DenseFPElementsAttr>(attr);
   if (fp_attr == nullptr) return false;
 
   if (fp_attr.isSplat()) {
@@ -281,7 +281,7 @@ static bool FloatValueEquals(const Attribute &attr, double value) {
 
 // Returns true if the rank of the value equals to the given rank.
 bool RankEquals(Value value, int rank) {
-  auto rank_type = value.getType().template dyn_cast<RankedTensorType>();
+  auto rank_type = mlir::dyn_cast<RankedTensorType>(value.getType());
   return (rank_type && rank_type.getRank() == rank);
 }
 
diff --git a/tensorflow/compiler/mlir/lite/quantization/tensorflow/tf_to_quant.cc b/tensorflow/compiler/mlir/lite/quantization/tensorflow/tf_to_quant.cc
index 55790c40509946..b4015181886788 100644
--- a/tensorflow/compiler/mlir/lite/quantization/tensorflow/tf_to_quant.cc
+++ b/tensorflow/compiler/mlir/lite/quantization/tensorflow/tf_to_quant.cc
@@ -133,7 +133,7 @@ struct InsertQuantOpsAfterTFFakeQuantOp
     if (PerAxis) {
       // This is a special case that the quant_dim is the last dimensions
       // according to the tf.FakeQuantWithMinMaxPerChannel.
-      quant_dim = res.getType().template cast<ShapedType>().getRank() - 1;
+      quant_dim = mlir::cast<ShapedType>(res.getType()).getRank() - 1;
     }
     // Use the min/max from the operands and the num_bits and narrow_range
     // attribute to create the quantization parameter for the new quantize op.
diff --git a/tensorflow/compiler/mlir/lite/stablehlo/BUILD b/tensorflow/compiler/mlir/lite/stablehlo/BUILD
index 179b20d27d462f..5f26983232a618 100644
--- a/tensorflow/compiler/mlir/lite/stablehlo/BUILD
+++ b/tensorflow/compiler/mlir/lite/stablehlo/BUILD
@@ -68,6 +68,7 @@ cc_library(
         "@llvm-project//mlir:FuncDialect",
         "@llvm-project//mlir:IR",
         "@llvm-project//mlir:Pass",
+        "@llvm-project//mlir:Support",
     ],
     alwayslink = 1,
 )
@@ -546,6 +547,7 @@ cc_library(
         "@llvm-project//mlir:FuncDialect",
         "@llvm-project//mlir:IR",
         "@llvm-project//mlir:Pass",
+        "@llvm-project//mlir:Support",
         "@llvm-project//mlir:TransformUtils",
         "@llvm-project//mlir:Transforms",
         "@local_xla//xla/mlir_hlo",
diff --git a/tensorflow/compiler/mlir/lite/stablehlo/transforms/compose_uniform_quantized_type_pass.cc b/tensorflow/compiler/mlir/lite/stablehlo/transforms/compose_uniform_quantized_type_pass.cc
index 15481b9a0a1ad2..52f2c4be02a3aa 100644
--- a/tensorflow/compiler/mlir/lite/stablehlo/transforms/compose_uniform_quantized_type_pass.cc
+++ b/tensorflow/compiler/mlir/lite/stablehlo/transforms/compose_uniform_quantized_type_pass.cc
@@ -73,7 +73,7 @@ bool IsI8ToF32Cast(stablehlo::ConvertOp convert_op) {
   const bool is_i8_operand =
       convert_op.getOperand().getType().getElementType().isInteger(/*width=*/8);
   const bool is_f32_result =
-      convert_op.getResult().getType().getElementType().isa<Float32Type>();
+      mlir::isa<Float32Type>(convert_op.getResult().getType().getElementType());
   return is_i8_operand && is_f32_result;
 }
 
@@ -92,7 +92,7 @@ bool IsI32ToF32Cast(stablehlo::ConvertOp convert_op) {
       convert_op.getOperand().getType().getElementType().isInteger(
           /*width=*/32);
   const bool is_f32_result =
-      convert_op.getResult().getType().getElementType().isa<Float32Type>();
+      mlir::isa<Float32Type>(convert_op.getResult().getType().getElementType());
   return is_i32_operand && is_f32_result;
 }
 
@@ -104,7 +104,8 @@ LogicalResult MatchZeroPointsOperand(Value zero_points) {
     return failure();
   }
 
-  auto zero_points_type = zero_points.getType().dyn_cast_or_null<TensorType>();
+  auto zero_points_type =
+      mlir::dyn_cast_or_null<TensorType>(zero_points.getType());
   if (!zero_points_type) {
     LLVM_DEBUG(llvm::dbgs() << "Zero point value should be a tensor type. Got: "
                             << zero_points_type << ".\n");
@@ -112,7 +113,7 @@ LogicalResult MatchZeroPointsOperand(Value zero_points) {
   }
 
   if (Type zero_points_element_type = zero_points_type.getElementType();
-      !zero_points_element_type.isa<IntegerType>()) {
+      !mlir::isa<IntegerType>(zero_points_element_type)) {
     LLVM_DEBUG(llvm::dbgs() << "Zero point should be an integer type. Got: "
                             << zero_points_element_type << ".\n");
     return failure();
@@ -146,7 +147,7 @@ LogicalResult MatchInverseScalesOperand(Value inverse_scales) {
   }
 
   auto inverse_scales_type =
-      inverse_scales.getType().dyn_cast_or_null<TensorType>();
+      mlir::dyn_cast_or_null<TensorType>(inverse_scales.getType());
   if (!inverse_scales_type) {
     LLVM_DEBUG(llvm::dbgs() << "Inverse scales should be a tensor type. Got: "
                             << inverse_scales_type << ".\n");
@@ -154,7 +155,7 @@ LogicalResult MatchInverseScalesOperand(Value inverse_scales) {
   }
 
   if (Type inverse_scales_element_type = inverse_scales_type.getElementType();
-      !inverse_scales_element_type.isa<FloatType>()) {
+      !mlir::isa<FloatType>(inverse_scales_element_type)) {
     LLVM_DEBUG(llvm::dbgs()
                << "Inverse scales element should be a float type. Got: "
                << inverse_scales_element_type << ".\n");
@@ -207,7 +208,7 @@ class UniformQuantizeFunctionCallPattern {
     }
 
     auto input_value_type =
-        input_value.getType().dyn_cast_or_null<TensorType>();
+        mlir::dyn_cast_or_null<TensorType>(input_value.getType());
     if (!input_value_type) {
       LLVM_DEBUG(llvm::dbgs()
                  << "Failed to match @uniform_quantize function call pattern. "
@@ -216,7 +217,7 @@ class UniformQuantizeFunctionCallPattern {
     }
 
     if (Type input_element_type = input_value_type.getElementType();
-        !input_element_type.isa<FloatType>()) {
+        !mlir::isa<FloatType>(input_element_type)) {
       LLVM_DEBUG(llvm::dbgs()
                  << "Failed to match @uniform_quantize function call pattern. "
                     "Input value's element type must be a float. Got: "
@@ -299,7 +300,7 @@ class UniformDequantizeFunctionCallPattern {
     }
 
     auto input_value_type =
-        input_value.getType().dyn_cast_or_null<TensorType>();
+        mlir::dyn_cast_or_null<TensorType>(input_value.getType());
     if (!input_value_type) {
       LLVM_DEBUG(llvm::dbgs()
                  << "Failed to match @uniform_dequantize call pattern. Input "
@@ -309,7 +310,7 @@ class UniformDequantizeFunctionCallPattern {
     }
 
     if (Type input_element_type = input_value_type.getElementType();
-        !input_element_type.isa<IntegerType>()) {
+        !mlir::isa<IntegerType>(input_element_type)) {
       LLVM_DEBUG(llvm::dbgs()
                  << "Failed to match @uniform_dequantize call pattern. Input "
                     "value's element type must be integer. Got: "
@@ -433,8 +434,9 @@ class ComposeUniformQuantizedConvolutionOp
   LogicalResult match(stablehlo::ConvolutionOp op) const final {
     // Verify operands' types.
     for (Type operand_type : op.getOperandTypes()) {
-      if (Type element_type = operand_type.cast<TensorType>().getElementType();
-          !element_type.isa<Float32Type>()) {
+      if (Type element_type =
+              mlir::cast<TensorType>(operand_type).getElementType();
+          !mlir::isa<Float32Type>(element_type)) {
         LLVM_DEBUG(llvm::dbgs()
                    << "Failed to match. The operand type must be a float. Got: "
                    << element_type << ".\n");
@@ -477,8 +479,9 @@ class ComposeUniformQuantizedConvolutionOp
     // Match the subgraph that receives the convolution output.
     Value conv_output_value = op.getResult();
     if (auto output_element_type =
-            conv_output_value.getType().cast<TensorType>().getElementType();
-        !output_element_type.isa<FloatType>()) {
+            mlir::cast<TensorType>(conv_output_value.getType())
+                .getElementType();
+        !mlir::isa<FloatType>(output_element_type)) {
       LLVM_DEBUG(
           llvm::dbgs()
           << "Failed to match. Output type is expected to be a float. Got: "
@@ -530,14 +533,12 @@ class ComposeUniformQuantizedConvolutionOp
       return failure();
     }
 
-    if (!(other_zp_i8_to_f32_convert_op.getResult()
-              .getType()
-              .getElementType()
-              .isa<Float32Type>() &&
-          other_zp_i8_to_f32_convert_op.getOperand()
-              .getType()
-              .getElementType()
-              .isa<IntegerType>())) {
+    if (!(mlir::isa<Float32Type>(other_zp_i8_to_f32_convert_op.getResult()
+                                     .getType()
+                                     .getElementType()) &&
+          mlir::isa<IntegerType>(other_zp_i8_to_f32_convert_op.getOperand()
+                                     .getType()
+                                     .getElementType()))) {
       LLVM_DEBUG(
           llvm::dbgs()
           << "Failed to match. The ConvertOp is not an i8->f32 type cast.\n");
@@ -671,8 +672,8 @@ class ComposeUniformQuantizedConvolutionOp
         rewriter.create<stablehlo::UniformQuantizeOp>(
             uniform_quantize_call_op.getLoc(),
             /*result=*/
-            input_value.getType().cast<TensorType>().clone(
-                input_quantized_element_type),
+            mlir::cast<TensorType>(input_value.getType())
+                .clone(input_quantized_element_type),
             /*operand=*/input_value);
 
     rewriter.replaceAllUsesWith(input_i8_to_f32_convert_op.getResult(),
@@ -689,20 +690,21 @@ class ComposeUniformQuantizedConvolutionOp
       // This is i8 values disguised as f32 (due to the upcast trick). Simply
       // cast them to i8.
       ElementsAttr filter_value = filter_constant_op.getValue();
-      filter_i8_value_attr = filter_value.cast<DenseFPElementsAttr>().mapValues(
-          rewriter.getI8Type(), [](const APFloat& val) -> APInt {
-            APSInt convertedInt(/*BitWidth=*/8, /*isUnsigned=*/false);
-            bool ignored;
-            val.convertToInteger(convertedInt, APFloat::rmTowardZero, &ignored);
-            return convertedInt;
-          });
+      filter_i8_value_attr =
+          mlir::cast<DenseFPElementsAttr>(filter_value)
+              .mapValues(rewriter.getI8Type(), [](const APFloat& val) -> APInt {
+                APSInt convertedInt(/*BitWidth=*/8, /*isUnsigned=*/false);
+                bool ignored;
+                val.convertToInteger(convertedInt, APFloat::rmTowardZero,
+                                     &ignored);
+                return convertedInt;
+              });
     } else if (isa<stablehlo::ConvertOp>(filter_op) &&
                isa<stablehlo::ConstantOp>(
                    filter_op->getOperand(0).getDefiningOp())) {
-      filter_i8_value_attr =
+      filter_i8_value_attr = mlir::cast<DenseIntElementsAttr>(
           cast<stablehlo::ConstantOp>(filter_op->getOperand(0).getDefiningOp())
-              .getValue()
-              .cast<DenseIntElementsAttr>();
+              .getValue());
     }
 
     // Create Uniform Quantized constant for the filter.
@@ -719,9 +721,9 @@ class ComposeUniformQuantizedConvolutionOp
         scale_combined_broadcast_in_dim_op.getOperand().getDefiningOp());
 
     SmallVector<double> filter_scale_values;
-    for (const auto combined_scale_value : combined_scale_constant_op.getValue()
-                                               .cast<DenseFPElementsAttr>()
-                                               .getValues<float>()) {
+    for (const auto combined_scale_value :
+         mlir::cast<DenseFPElementsAttr>(combined_scale_constant_op.getValue())
+             .getValues<float>()) {
       // UniformQuantizedPerAxisType requires scales to have double dtype.
       const double filter_scale_value = static_cast<double>(
           combined_scale_value * input_inverse_scales_value);
@@ -780,7 +782,8 @@ class ComposeUniformQuantizedConvolutionOp
     Value conv_output_value = op.getResult();
     auto output_uniform_quantized_tensor_type = RankedTensorType::getChecked(
         rewriter.getUnknownLoc(),
-        /*shape=*/conv_output_value.getType().cast<TensorType>().getShape(),
+        /*shape=*/
+        mlir::cast<TensorType>(conv_output_value.getType()).getShape(),
         output_uniform_quantized_type);
 
     SmallVector<Type> new_conv_output_types = {
@@ -1017,8 +1020,8 @@ class ComposeUniformQuantizedDotGeneralOp
         rewriter.create<stablehlo::UniformQuantizeOp>(
             input_i8_to_f32_convert_op.getLoc(),
             /*result=*/
-            input_value.getType().cast<TensorType>().clone(
-                input_uniform_quantized_type),
+            mlir::cast<TensorType>(input_value.getType())
+                .clone(input_uniform_quantized_type),
             /*operand=*/input_value);
 
     rewriter.replaceAllUsesWith(input_i8_to_f32_convert_op.getResult(),
@@ -1029,13 +1032,13 @@ class ComposeUniformQuantizedDotGeneralOp
     stablehlo::ConstantOp filter_constant_op =
         GetFilterConstantOp(filter_value);
     auto filter_value_attr =
-        filter_constant_op.getValue().cast<DenseElementsAttr>();
+        mlir::cast<DenseElementsAttr>(filter_constant_op.getValue());
     if (filter_value_attr.getElementType().isF32()) {
       // This is i8 values disguised as f32 (due to the upcast trick). Simply
       // cast them to i8.
       filter_value_attr =
-          filter_value_attr.cast<DenseFPElementsAttr>().mapValues(
-              rewriter.getI8Type(), [](const APFloat& val) -> APInt {
+          mlir::cast<DenseFPElementsAttr>(filter_value_attr)
+              .mapValues(rewriter.getI8Type(), [](const APFloat& val) -> APInt {
                 APSInt converted_int(/*BitWidth=*/8, /*isUnsigned=*/false);
                 bool ignored;
                 val.convertToInteger(converted_int, APFloat::rmTowardZero,
@@ -1072,9 +1075,9 @@ class ComposeUniformQuantizedDotGeneralOp
     auto merged_scale_constant_op =
         cast<stablehlo::ConstantOp>(multiply_op_second_operand.getDefiningOp());
     SmallVector<double> filter_scale_values;
-    for (const auto merged_scale : merged_scale_constant_op.getValue()
-                                       .cast<DenseFPElementsAttr>()
-                                       .getValues<float>()) {
+    for (const auto merged_scale :
+         mlir::cast<DenseFPElementsAttr>(merged_scale_constant_op.getValue())
+             .getValues<float>()) {
       // (s1 * s2) * (1 / s1) = s2
       // UniformQuantizedPerAxisType requires scales to have double dtype.
       filter_scale_values.push_back(
@@ -1086,7 +1089,7 @@ class ComposeUniformQuantizedDotGeneralOp
 
     const int quantization_dimension = GetFilterQuantizationDimension(
         op.getDotDimensionNumbers(),
-        filter_value_attr.getType().cast<TensorType>().getRank());
+        mlir::cast<TensorType>(filter_value_attr.getType()).getRank());
     const UniformQuantizedPerAxisType filter_uniform_quantized_type =
         CreateI8F32UniformQuantizedPerAxisType(
             filter_constant_op.getLoc(), *rewriter.getContext(),
@@ -1097,8 +1100,8 @@ class ComposeUniformQuantizedDotGeneralOp
     auto quantized_filter_constant_op = rewriter.create<stablehlo::ConstantOp>(
         filter_constant_op.getLoc(),
         /*output=*/
-        filter_constant_op.getResult().getType().cast<TensorType>().clone(
-            filter_uniform_quantized_type),
+        mlir::cast<TensorType>(filter_constant_op.getResult().getType())
+            .clone(filter_uniform_quantized_type),
         /*value=*/filter_value_attr);
 
     rewriter.replaceAllUsesWith(filter_value,
@@ -1137,8 +1140,8 @@ class ComposeUniformQuantizedDotGeneralOp
 
     auto new_dot_general_op = rewriter.create<stablehlo::DotGeneralOp>(
         op.getLoc(), /*resultType0=*/
-        op.getResult().getType().cast<TensorType>().clone(
-            output_uniform_quantized_type),
+        mlir::cast<TensorType>(op.getResult().getType())
+            .clone(output_uniform_quantized_type),
         /*lhs=*/op.getLhs(), /*rhs=*/op.getRhs(),
         /*dot_dimension_numbers=*/op.getDotDimensionNumbers(),
         /*precision_config=*/op.getPrecisionConfigAttr());
@@ -1395,8 +1398,8 @@ class ComposeUniformQuantizedDotGeneralOpWithTwoQuantizedActivations
         rewriter.create<stablehlo::UniformQuantizeOp>(
             input1_uniform_quantize_call_op.getLoc(),
             /*result=*/
-            input1_value.getType().cast<TensorType>().clone(
-                input1_uniform_quantized_type),
+            mlir::cast<TensorType>(input1_value.getType())
+                .clone(input1_uniform_quantized_type),
             /*operand=*/input1_value);
 
     rewriter.replaceAllUsesWith(input1_zero_point_subtract_op.getResult(),
@@ -1434,8 +1437,8 @@ class ComposeUniformQuantizedDotGeneralOpWithTwoQuantizedActivations
         rewriter.create<stablehlo::UniformQuantizeOp>(
             input2_uniform_quantize_call_op.getLoc(),
             /*result=*/
-            input2_value.getType().cast<TensorType>().clone(
-                input2_uniform_quantized_type),
+            mlir::cast<TensorType>(input2_value.getType())
+                .clone(input2_uniform_quantized_type),
             /*operand=*/input2_value);
 
     rewriter.replaceAllUsesWith(input2_zero_point_subtract_op.getResult(),
@@ -1482,8 +1485,8 @@ class ComposeUniformQuantizedDotGeneralOpWithTwoQuantizedActivations
 
     auto new_dot_general_op = rewriter.create<stablehlo::DotGeneralOp>(
         op.getLoc(), /*resultType0=*/
-        op.getResult().getType().cast<TensorType>().clone(
-            output_uniform_quantized_type),
+        mlir::cast<TensorType>(op.getResult().getType())
+            .clone(output_uniform_quantized_type),
         /*lhs=*/op.getLhs(), /*rhs=*/op.getRhs(),
         /*dot_dimension_numbers=*/op.getDotDimensionNumbers(),
         /*precision_config=*/op.getPrecisionConfigAttr());
diff --git a/tensorflow/compiler/mlir/lite/stablehlo/transforms/composite_avg_pool.cc b/tensorflow/compiler/mlir/lite/stablehlo/transforms/composite_avg_pool.cc
index 801c8775682cbd..8c28f2e5e5df4b 100644
--- a/tensorflow/compiler/mlir/lite/stablehlo/transforms/composite_avg_pool.cc
+++ b/tensorflow/compiler/mlir/lite/stablehlo/transforms/composite_avg_pool.cc
@@ -55,7 +55,7 @@ DenseIntElementsAttr GetPaddingArrayAttr(Builder& builder, Operation* old_op) {
 }
 
 ShapedType GetPaddedType(Operation* old_op) {
-  auto input_type = old_op->getOperand(0).getType().cast<ShapedType>();
+  auto input_type = mlir::cast<ShapedType>(old_op->getOperand(0).getType());
   auto input_shape = input_type.getShape();  // NCHW
   int64_t batch_size = input_shape[0];
   int64_t channel_size = input_shape[1];
@@ -124,7 +124,7 @@ StringAttr GetPaddingStringAttr(Builder& builder, Operation* old_op) {
   auto composite_attrs = composite_op.getCompositeAttributes();
 
   auto operand_shape =
-      composite_op.getOperand(0).getType().cast<ShapedType>().getShape();
+      mlir::cast<ShapedType>(composite_op.getOperand(0).getType()).getShape();
   // NC(H)(W)
   std::vector<int32_t> spatial_dim_sizes = {
       static_cast<int32_t>(operand_shape[2]),
diff --git a/tensorflow/compiler/mlir/lite/stablehlo/transforms/composite_utils.cc b/tensorflow/compiler/mlir/lite/stablehlo/transforms/composite_utils.cc
index 403bf9968a9acd..2809c81458918c 100644
--- a/tensorflow/compiler/mlir/lite/stablehlo/transforms/composite_utils.cc
+++ b/tensorflow/compiler/mlir/lite/stablehlo/transforms/composite_utils.cc
@@ -27,6 +27,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinTypeInterfaces.h"  // from @llvm-project
 #include "mlir/IR/PatternMatch.h"  // from @llvm-project
 #include "mlir/IR/Value.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 
 namespace mlir {
 namespace odml {
@@ -65,8 +66,8 @@ bool GetI32VectorFromDenseI64CompositeAttr(
 
 bool IsSupportedNchwUpsampleBlinear(
     Value input, Value output, const DenseIntElementsAttr& output_size_attr) {
-  auto input_shape = input.getType().cast<ShapedType>().getShape();
-  auto output_shape = output.getType().cast<ShapedType>().getShape();
+  auto input_shape = mlir::cast<ShapedType>(input.getType()).getShape();
+  auto output_shape = mlir::cast<ShapedType>(output.getType()).getShape();
 
   // Only support 4D tensor.
   if (input_shape.size() != 4 || output_shape.size() != 4) {
@@ -89,7 +90,7 @@ bool IsSupportedNchwUpsampleBlinear(
 
 ShapedType GetNhwcReturnTypeFromNchw(Operation* old_op) {
   auto composite_result_shape =
-      old_op->getResults().front().getType().cast<ShapedType>().getShape();
+      mlir::cast<ShapedType>(old_op->getResults().front().getType()).getShape();
   std::array<int64_t, 4> output_shape;
   // NHWC <- NCHW
   output_shape[0] = composite_result_shape[0];
@@ -97,7 +98,7 @@ ShapedType GetNhwcReturnTypeFromNchw(Operation* old_op) {
   output_shape[2] = composite_result_shape[3];
   output_shape[3] = composite_result_shape[1];
 
-  auto input_type = old_op->getOperand(0).getType().cast<ShapedType>();
+  auto input_type = mlir::cast<ShapedType>(old_op->getOperand(0).getType());
 
   return RankedTensorType::get(output_shape, input_type.getElementType());
 }
diff --git a/tensorflow/compiler/mlir/lite/stablehlo/transforms/composite_utils.h b/tensorflow/compiler/mlir/lite/stablehlo/transforms/composite_utils.h
index 0691dc74997212..79d0910bce18a4 100644
--- a/tensorflow/compiler/mlir/lite/stablehlo/transforms/composite_utils.h
+++ b/tensorflow/compiler/mlir/lite/stablehlo/transforms/composite_utils.h
@@ -38,10 +38,10 @@ template <typename AttrType>
 bool EnsureAttribute(const DictionaryAttr& composite_attributes,
                      const std::string& attr_name, AttrType* out_attr) {
   Attribute attr = composite_attributes.get(attr_name);
-  if (!attr.isa_and_nonnull<AttrType>()) {
+  if (!mlir::isa_and_nonnull<AttrType>(attr)) {
     return false;
   }
-  if (AttrType content = attr.dyn_cast<AttrType>()) {
+  if (AttrType content = mlir::dyn_cast<AttrType>(attr)) {
     *out_attr = content;
     return true;
   } else {
diff --git a/tensorflow/compiler/mlir/lite/stablehlo/transforms/fold_broadcast_pass.cc b/tensorflow/compiler/mlir/lite/stablehlo/transforms/fold_broadcast_pass.cc
index 847738e5cc7cbe..c2b31aeb540720 100644
--- a/tensorflow/compiler/mlir/lite/stablehlo/transforms/fold_broadcast_pass.cc
+++ b/tensorflow/compiler/mlir/lite/stablehlo/transforms/fold_broadcast_pass.cc
@@ -32,6 +32,7 @@ limitations under the License.
 #include "mlir/IR/Types.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
 #include "mlir/Pass/PassRegistry.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/lite/stablehlo/transforms/passes.h"
@@ -117,7 +118,7 @@ static Attribute BinaryFolder(Op *op) {
   auto rhs = dyn_cast_or_null<DenseElementsAttr>(rhs_op.getValue());
   if (!lhs || !rhs) return {};
 
-  ShapedType type = op->getType().template cast<ShapedType>();
+  ShapedType type = mlir::cast<ShapedType>(op->getType());
   if (!type.hasStaticShape()) {
     return {};
   }
@@ -125,15 +126,15 @@ static Attribute BinaryFolder(Op *op) {
   Type etype = type.getElementType();
 
   // Evaluate for element types.
-  if (!etype.isa<ElementType>()) {
+  if (!mlir::isa<ElementType>(etype)) {
     return {};
   }
 
   // Special case for folding splats no matter how large.
   // Only covers the case of both attrs being splats; operation-specific cases
   // like adding a zero or multiplying by one are handled elsewhere.
-  SplatElementsAttr splatLhs = lhs.template dyn_cast<SplatElementsAttr>();
-  SplatElementsAttr splatRhs = rhs.template dyn_cast<SplatElementsAttr>();
+  SplatElementsAttr splatLhs = mlir::dyn_cast<SplatElementsAttr>(lhs);
+  SplatElementsAttr splatRhs = mlir::dyn_cast<SplatElementsAttr>(rhs);
   if (splatLhs && splatRhs) {
     auto signedLhs = addSign(splatLhs.getSplatValue<ValType>(), etype);
     auto signedRhs = addSign(splatRhs.getSplatValue<ValType>(), etype);
@@ -195,10 +196,10 @@ class FoldBroadcastInDimBeforeBinaryElementwiseOp
     auto bcast_dims = bcast_op.getBroadcastDimensions();
     auto elem_type = const_val.getElementType();
     Attribute result;
-    if (elem_type.template isa<FloatType>()) {
+    if (mlir::isa<FloatType>(elem_type)) {
       result = ConstFoldBroadcastInDim<FloatAttr>(result_type, const_val,
                                                   bcast_dims);
-    } else if (elem_type.template isa<IntegerType>()) {
+    } else if (mlir::isa<IntegerType>(elem_type)) {
       result = ConstFoldBroadcastInDim<IntegerAttr>(result_type, const_val,
                                                     bcast_dims);
     } else {
@@ -217,14 +218,14 @@ using FoldBroadcastInDimBeforeMulOp =
 // Constant folds mhlo.mul, this folder doesn't have an upper limit on how many
 // elements can be folded.
 LogicalResult ConstantFoldMul(mhlo::MulOp op, PatternRewriter &rewriter) {
-  ShapedType type = op.getType().dyn_cast<ShapedType>();
+  ShapedType type = mlir::dyn_cast<ShapedType>(op.getType());
   Type etype = type.getElementType();
   Attribute result = {};
-  if (etype.isa<FloatType>()) {
+  if (mlir::isa<FloatType>(etype)) {
     result =
         BinaryFolder<mhlo::MulOp, FloatType, APFloat, std::multiplies<APFloat>>(
             &op);
-  } else if (etype.isa<IntegerType>()) {
+  } else if (mlir::isa<IntegerType>(etype)) {
     result =
         BinaryFolder<mhlo::MulOp, IntegerType, APInt, std::multiplies<APSInt>>(
             &op);
diff --git a/tensorflow/compiler/mlir/lite/stablehlo/transforms/hlo_matchers.cc b/tensorflow/compiler/mlir/lite/stablehlo/transforms/hlo_matchers.cc
index 2d9308b05cb47b..9e7a5d424a2ecc 100644
--- a/tensorflow/compiler/mlir/lite/stablehlo/transforms/hlo_matchers.cc
+++ b/tensorflow/compiler/mlir/lite/stablehlo/transforms/hlo_matchers.cc
@@ -237,9 +237,9 @@ bool MatchReshapedIota(DenseIntElementsAttr dimensions, Value iota) {
   auto reshape_op = dyn_cast_or_null<mhlo::ReshapeOp>(iota.getDefiningOp());
   if (!reshape_op) return false;
   auto operand_type =
-      reshape_op.getOperand().getType().dyn_cast<RankedTensorType>();
+      mlir::dyn_cast<RankedTensorType>(reshape_op.getOperand().getType());
   if (!operand_type || !operand_type.hasStaticShape()) return false;
-  auto reshape_type = reshape_op.getType().cast<RankedTensorType>();
+  auto reshape_type = mlir::cast<RankedTensorType>(reshape_op.getType());
 
   // Reshape can take a 1-D iota input and add extra dims of size one.
   if (operand_type.getRank() != 1) return false;
diff --git a/tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_hlo.cc b/tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_hlo.cc
index 3a483f44568ce2..96081a2b2b1bd8 100644
--- a/tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_hlo.cc
+++ b/tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_hlo.cc
@@ -162,10 +162,8 @@ class ConvertNdConvOp : public OpConversionPattern<mhlo::ConvolutionOp> {
     }
 
     // tf Convolution doesn't support quantized type.
-    if (conv_op.getRhs()
-            .getType()
-            .getElementType()
-            .isa<quant::QuantizedType>()) {
+    if (mlir::isa<quant::QuantizedType>(
+            conv_op.getRhs().getType().getElementType())) {
       return failure();
     }
 
@@ -193,11 +191,11 @@ class ConvertNdConvOp : public OpConversionPattern<mhlo::ConvolutionOp> {
     const int kernel_input_feature_dimension =
         dnums.getKernelInputFeatureDimension();
     const int input_channels =
-        conv_op.getLhs().getType().cast<ShapedType>().getDimSize(
-            input_feature_dimension);
+        mlir::cast<ShapedType>(conv_op.getLhs().getType())
+            .getDimSize(input_feature_dimension);
     const int kernel_input_channels =
-        conv_op.getRhs().getType().cast<ShapedType>().getDimSize(
-            kernel_input_feature_dimension);
+        mlir::cast<ShapedType>(conv_op.getRhs().getType())
+            .getDimSize(kernel_input_feature_dimension);
     int feature_group_count = conv_op.getFeatureGroupCount();
 
     // check if group count is valid
@@ -238,14 +236,14 @@ class ConvertNdConvOp : public OpConversionPattern<mhlo::ConvolutionOp> {
   };
 
   static bool IsSupportedConvOp(mhlo::ConvolutionOp conv_op) {
-    if (!conv_op.getRhs().getType().cast<ShapedType>().hasStaticShape()) {
+    if (!mlir::cast<ShapedType>(conv_op.getRhs().getType()).hasStaticShape()) {
       return false;
     }
-    if (!conv_op.getLhs().getType().cast<ShapedType>().hasStaticShape() &&
-        !conv_op.getType().cast<ShapedType>().hasStaticShape()) {
+    if (!mlir::cast<ShapedType>(conv_op.getLhs().getType()).hasStaticShape() &&
+        !mlir::cast<ShapedType>(conv_op.getType()).hasStaticShape()) {
       auto dnums = conv_op.getDimensionNumbers();
-      auto lhs_type = conv_op.getLhs().getType().cast<ShapedType>();
-      auto out_type = conv_op.getType().cast<ShapedType>();
+      auto lhs_type = mlir::cast<ShapedType>(conv_op.getLhs().getType());
+      auto out_type = mlir::cast<ShapedType>(conv_op.getType());
       int64_t input_batch_dim = dnums.getInputBatchDimension();
       int64_t out_batch_dim = dnums.getOutputBatchDimension();
       for (size_t i = 0; i < lhs_type.getRank(); ++i) {
@@ -263,10 +261,7 @@ class ConvertNdConvOp : public OpConversionPattern<mhlo::ConvolutionOp> {
     if (!lhs_dilation.isSplat() || lhs_dilation.getSplatValue<int64_t>() != 1)
       return false;
 
-    if (conv_op.getWindowStrides()
-            .value()
-            .getType()
-            .cast<ShapedType>()
+    if (mlir::cast<ShapedType>(conv_op.getWindowStrides().value().getType())
             .getRank() != 1)
       return false;
 
@@ -290,10 +285,10 @@ class ConvertNdConvOp : public OpConversionPattern<mhlo::ConvolutionOp> {
       int64_t pad_low_int64;
       int64_t pad_high_int64;
       tensorflow::Status status = tensorflow::GetWindowedOutputSizeVerbose(
-          conv_op.getLhs().getType().cast<ShapedType>().getDimSize(
-              input_spatial_dim[i]),
-          conv_op.getRhs().getType().cast<ShapedType>().getDimSize(
-              kernel_spatial_dim[i]),
+          mlir::cast<ShapedType>(conv_op.getLhs().getType())
+              .getDimSize(input_spatial_dim[i]),
+          mlir::cast<ShapedType>(conv_op.getRhs().getType())
+              .getDimSize(kernel_spatial_dim[i]),
           dilation[dim], strides[dim], tensorflow::Padding::SAME, &output_size,
           &pad_low_int64, &pad_high_int64);
       if (!status.ok()) return false;
@@ -314,7 +309,7 @@ class ConvertNdConvOp : public OpConversionPattern<mhlo::ConvolutionOp> {
       return value;
     }
 
-    auto input_type = value.getType().cast<RankedTensorType>();
+    auto input_type = mlir::cast<RankedTensorType>(value.getType());
     auto input_shape = input_type.getShape();
 
     llvm::SmallVector<int64_t, 4> start;
@@ -380,7 +375,7 @@ class ConvertNdConvOp : public OpConversionPattern<mhlo::ConvolutionOp> {
     // Convolution. This is needed because TF.Conv3DOp doesn't support EXPLICIT.
     if (padding == "EXPLICIT" && num_spatial_dims == 3) {
       auto lhs_type =
-          conv_op.getLhs().getType().template dyn_cast<RankedTensorType>();
+          mlir::dyn_cast<RankedTensorType>(conv_op.getLhs().getType());
       RankedTensorType padding_attr_type = mlir::RankedTensorType::get(
           {lhs_type.getRank(), 2}, rewriter.getIntegerType(64));
       auto padding_const = rewriter.create<TF::ConstOp>(
@@ -394,7 +389,7 @@ class ConvertNdConvOp : public OpConversionPattern<mhlo::ConvolutionOp> {
       padding = "VALID";
     }
 
-    auto conv_output_type = conv_op.getType().cast<RankedTensorType>();
+    auto conv_output_type = mlir::cast<RankedTensorType>(conv_op.getType());
     DenseIntElementsAttr permutation;
     const bool need_transpose_output = NeedsReformatTypeAndPermutation(
         dnums.getOutputBatchDimension(), dnums.getOutputFeatureDimension(),
@@ -418,7 +413,7 @@ class ConvertNdConvOp : public OpConversionPattern<mhlo::ConvolutionOp> {
       // Reshapes filter format to [filter_height, filter_width, in_channels,
       // channel_multiplier] from HLO's [filter_height, filter_width, 1,
       // in_channels * channel_multiplier] format.
-      auto filter_type = rhs.getType().cast<ShapedType>();
+      auto filter_type = mlir::cast<ShapedType>(rhs.getType());
       llvm::ArrayRef<int64_t> hlo_filter_shape = filter_type.getShape();
       llvm::SmallVector<int64_t, 4> tf_filter_shape(hlo_filter_shape.begin(),
                                                     hlo_filter_shape.end());
@@ -491,13 +486,13 @@ class Convert1DConvOp : public OpConversionPattern<mhlo::ConvolutionOp> {
     // Group convolution is not supported yet.
     const int64_t input_feature_dimension = dnums.getInputFeatureDimension();
     const int64_t input_channels =
-        conv_op.getLhs().getType().cast<ShapedType>().getDimSize(
-            input_feature_dimension);
+        mlir::cast<ShapedType>(conv_op.getLhs().getType())
+            .getDimSize(input_feature_dimension);
     const int kernel_input_feature_dimension =
         dnums.getKernelInputFeatureDimension();
     const int kernel_input_channels =
-        conv_op.getRhs().getType().cast<ShapedType>().getDimSize(
-            kernel_input_feature_dimension);
+        mlir::cast<ShapedType>(conv_op.getRhs().getType())
+            .getDimSize(kernel_input_feature_dimension);
     const int64_t feature_group_count = conv_op.getFeatureGroupCount();
     if (feature_group_count != input_channels / kernel_input_channels ||
         input_channels % kernel_input_channels != 0)
@@ -508,7 +503,7 @@ class Convert1DConvOp : public OpConversionPattern<mhlo::ConvolutionOp> {
     //
 
     // Reshape input image to add a new spatial dimension.
-    auto image_type = conv_op.getLhs().getType().cast<ShapedType>();
+    auto image_type = mlir::cast<ShapedType>(conv_op.getLhs().getType());
     SmallVector<int64_t, 4> image_2d_shape(image_type.getShape().begin(),
                                            image_type.getShape().end());
     image_2d_shape.push_back(1);
@@ -530,7 +525,7 @@ class Convert1DConvOp : public OpConversionPattern<mhlo::ConvolutionOp> {
         image_permutation_and_shape.permutation);
 
     // Reshape kernel to add a new spatial dimension.
-    auto kernel_type = conv_op.getRhs().getType().cast<ShapedType>();
+    auto kernel_type = mlir::cast<ShapedType>(conv_op.getRhs().getType());
     SmallVector<int64_t, 4> kernel_2d_shape;
     for (int64_t dim : kernel_type.getShape()) {
       kernel_2d_shape.push_back(dim);
@@ -623,7 +618,7 @@ class Convert1DConvOp : public OpConversionPattern<mhlo::ConvolutionOp> {
     //
 
     // Determine the 2-D convolution output shape.
-    auto output_type = conv_op->getResult(0).getType().cast<ShapedType>();
+    auto output_type = mlir::cast<ShapedType>(conv_op->getResult(0).getType());
     SmallVector<int64_t, 4> output_2d_shape;
     for (int64_t dim : output_type.getShape()) {
       output_2d_shape.push_back(dim);
@@ -648,7 +643,7 @@ class Convert1DConvOp : public OpConversionPattern<mhlo::ConvolutionOp> {
         conv_op.getPrecisionConfigAttr());
 
     OpResult conv2d_output = conv2d_op->getResult(0);
-    auto conv2d_output_type = conv2d_output.getType().cast<ShapedType>();
+    auto conv2d_output_type = mlir::cast<ShapedType>(conv2d_output.getType());
 
     //
     // Transpose and reshape the output
@@ -676,9 +671,9 @@ using Convert3DConvOp = ConvertNdConvOp<3>;
 // lhs_dilation>1 and window_strides=1.
 LogicalResult IsSupportedNonTrivialConvOp(mhlo::ConvolutionOp conv_op,
                                           ConversionPatternRewriter& rewriter) {
-  if (!conv_op.getLhs().getType().cast<ShapedType>().hasStaticShape() ||
-      !conv_op.getRhs().getType().cast<ShapedType>().hasStaticShape() ||
-      !conv_op.getType().cast<ShapedType>().hasStaticShape())
+  if (!mlir::cast<ShapedType>(conv_op.getLhs().getType()).hasStaticShape() ||
+      !mlir::cast<ShapedType>(conv_op.getRhs().getType()).hasStaticShape() ||
+      !mlir::cast<ShapedType>(conv_op.getType()).hasStaticShape())
     return rewriter.notifyMatchFailure(conv_op, "requires static shape");
   mhlo::ConvDimensionNumbersAttr dnums = conv_op.getDimensionNumbers();
 
@@ -687,10 +682,7 @@ LogicalResult IsSupportedNonTrivialConvOp(mhlo::ConvolutionOp conv_op,
     return rewriter.notifyMatchFailure(conv_op,
                                        "requires non-trivial lhs_dilation");
 
-  if (conv_op.getWindowStrides()
-          .value()
-          .getType()
-          .cast<ShapedType>()
+  if (mlir::cast<ShapedType>(conv_op.getWindowStrides().value().getType())
           .getRank() != 1)
     return rewriter.notifyMatchFailure(
         conv_op, "requires window_strides to equal to one");
@@ -746,19 +738,19 @@ class ConvertToResizeBilinearOpOrDepthwiseTransposedConvOp
     mhlo::ConvDimensionNumbersAttr dnums = conv_op.getDimensionNumbers();
     const int input_feature_dimension = dnums.getInputFeatureDimension();
     const int input_channels =
-        conv_op.getLhs().getType().cast<ShapedType>().getDimSize(
-            input_feature_dimension);
+        mlir::cast<ShapedType>(conv_op.getLhs().getType())
+            .getDimSize(input_feature_dimension);
     int feature_group_count = conv_op.getFeatureGroupCount();
     const int kernel_input_feature_dimension =
         dnums.getKernelInputFeatureDimension();
     const int kernel_input_channels =
-        conv_op.getRhs().getType().cast<ShapedType>().getDimSize(
-            kernel_input_feature_dimension);
+        mlir::cast<ShapedType>(conv_op.getRhs().getType())
+            .getDimSize(kernel_input_feature_dimension);
     const int kernel_output_feature_dimension =
         dnums.getKernelOutputFeatureDimension();
     const int kernel_output_channels =
-        conv_op.getRhs().getType().cast<ShapedType>().getDimSize(
-            kernel_output_feature_dimension);
+        mlir::cast<ShapedType>(conv_op.getRhs().getType())
+            .getDimSize(kernel_output_feature_dimension);
 
     // To support a depthwise convolution, we need-
     // 1. feature_group_count != 1 (except when input_channels==1)
@@ -795,7 +787,7 @@ class ConvertToResizeBilinearOpOrDepthwiseTransposedConvOp
     auto create_slice = [&](mlir::Value tensor, int depth_idx, int channel_idx,
                             bool is_kernel = false) -> mlir::Value {
       std::vector<int64_t> tensor_shape =
-          tensor.getType().cast<ShapedType>().getShape().vec();
+          mlir::cast<ShapedType>(tensor.getType()).getShape().vec();
 
       // Calculate offsets based on depth_idx, channel_idx and tensor_shape
       std::vector<int64_t> start_indices(tensor_shape.size(), 0);
@@ -828,7 +820,8 @@ class ConvertToResizeBilinearOpOrDepthwiseTransposedConvOp
 
       // Calculate convolution output_type based on sliced_input and
       // sliced_kernel
-      auto output_type = conv_op->getResult(0).getType().cast<ShapedType>();
+      auto output_type =
+          mlir::cast<ShapedType>(conv_op->getResult(0).getType());
       std::vector<int64_t> new_output_shape = output_type.getShape().vec();
       new_output_shape[dnums.getOutputFeatureDimension()] /=
           feature_group_count;
@@ -884,8 +877,8 @@ class ConvertToResizeBilinearOpOrDepthwiseTransposedConvOp
     int feature_group_count = conv_op.getFeatureGroupCount();
     const int input_feature_dimension = dnums.getInputFeatureDimension();
     const int input_channels =
-        conv_op.getLhs().getType().cast<ShapedType>().getDimSize(
-            input_feature_dimension);
+        mlir::cast<ShapedType>(conv_op.getLhs().getType())
+            .getDimSize(input_feature_dimension);
 
     // Check for Group Convolution parameters
     if (feature_group_count != 1 && feature_group_count != input_channels) {
@@ -919,7 +912,7 @@ class ConvertToResizeBilinearOpOrDepthwiseTransposedConvOp
     auto padding_values = padding.getValues<int64_t>();
 
     // Cast the dimension sizes to int.
-    auto lhs_type = conv_op.getLhs().getType().cast<ShapedType>();
+    auto lhs_type = mlir::cast<ShapedType>(conv_op.getLhs().getType());
     llvm::SmallVector<int> input_sizes = {
         static_cast<int>(lhs_type.getDimSize(input_spatial_dimensions[0])),
         static_cast<int>(lhs_type.getDimSize(input_spatial_dimensions[1]))};
@@ -1101,7 +1094,8 @@ class ConvertNonTrivialConvOp
         transpose_order[dnums.getOutputSpatialDimensions().data()[i]] = i + 1;
       }
       auto output_shape =
-          conv_op.getResult().getType().cast<RankedTensorType>().getShape();
+          mlir::cast<RankedTensorType>(conv_op.getResult().getType())
+              .getShape();
       SmallVector<int64_t, 4> transposed_output_shape = {
           output_shape[dnums.getOutputBatchDimension()],
           output_shape[dnums.getOutputSpatialDimensions().data()[0]],
@@ -1114,7 +1108,7 @@ class ConvertNonTrivialConvOp
       }
       auto output_type = RankedTensorType::get(
           transposed_output_shape,
-          conv_op.getRhs().getType().cast<ShapedType>().getElementType());
+          mlir::cast<ShapedType>(conv_op.getRhs().getType()).getElementType());
       auto output_sizes = rewriter.create<TF::ConstOp>(
           conv_op.getLoc(),
           DenseIntElementsAttr::get(
@@ -1138,7 +1132,8 @@ class ConvertNonTrivialConvOp
     } else {
       SmallVector<int32_t, 4> output_shape_i32;
       for (int64_t dim :
-           conv_op.getResult().getType().cast<RankedTensorType>().getShape()) {
+           mlir::cast<RankedTensorType>(conv_op.getResult().getType())
+               .getShape()) {
         output_shape_i32.push_back(dim);
       }
       auto output_sizes = rewriter.create<TF::ConstOp>(
@@ -1176,14 +1171,12 @@ class ConvertNonTrivialConvOp
 
     for (size_t i = 1; i <= num_spatial_dims; ++i) {
       int64_t stride = strides[i];
-      int64_t input_size =
-          conv_op.getLhs().getType().cast<ShapedType>().getDimSize(
-              input_spatial_dims[i - 1]);
-      int64_t kernel_size =
-          conv_op.getRhs().getType().cast<ShapedType>().getDimSize(
-              kernel_spatial_dims[i - 1]);
-      int64_t output_size = conv_op.getType().cast<ShapedType>().getDimSize(
-          output_spatial_dims[i - 1]);
+      int64_t input_size = mlir::cast<ShapedType>(conv_op.getLhs().getType())
+                               .getDimSize(input_spatial_dims[i - 1]);
+      int64_t kernel_size = mlir::cast<ShapedType>(conv_op.getRhs().getType())
+                                .getDimSize(kernel_spatial_dims[i - 1]);
+      int64_t output_size = mlir::cast<ShapedType>(conv_op.getType())
+                                .getDimSize(output_spatial_dims[i - 1]);
 
       // stablehlo.convolution op needs explicit padding to be set to model any
       // Transposed-Convolution in JAX/PT. Checking to see if-
@@ -1225,11 +1218,10 @@ class ConvertNonTrivialConvOp
         return false;
       }
       int64_t stride = strides[i + 1];
-      int64_t input_size =
-          conv_op.getLhs().getType().cast<ShapedType>().getDimSize(
-              input_spatial_dims[i]);
-      int64_t output_size = conv_op.getType().cast<ShapedType>().getDimSize(
-          output_spatial_dims[i]);
+      int64_t input_size = mlir::cast<ShapedType>(conv_op.getLhs().getType())
+                               .getDimSize(input_spatial_dims[i]);
+      int64_t output_size = mlir::cast<ShapedType>(conv_op.getType())
+                                .getDimSize(output_spatial_dims[i]);
       // The reason for the below check is as follows:
       // When computing the output, we have the following relation between
       // o - output dim size, i - input dim size, s - stride, P - total pads
@@ -1280,13 +1272,11 @@ class ConvertDynamicSliceOp : public OpConversionPattern<mhlo::DynamicSliceOp> {
   LogicalResult matchAndRewrite(
       mhlo::DynamicSliceOp op, OpAdaptor adaptor,
       ConversionPatternRewriter& rewriter) const final {
-    ShapedType input_type = op.getOperand().getType().cast<ShapedType>();
+    ShapedType input_type = mlir::cast<ShapedType>(op.getOperand().getType());
     if (!input_type.hasStaticShape()) return failure();
-    Type start_indices_element_type = op.getStartIndices()
-                                          .front()
-                                          .getType()
-                                          .cast<ShapedType>()
-                                          .getElementType();
+    Type start_indices_element_type =
+        mlir::cast<ShapedType>(op.getStartIndices().front().getType())
+            .getElementType();
 
     // The mhlo dynamic_slice's start_indices can be either signed/unsigned
     // int32/int64. However, TF only takes in either i32 or i64 types for begin,
@@ -1307,8 +1297,8 @@ class ConvertDynamicSliceOp : public OpConversionPattern<mhlo::DynamicSliceOp> {
     for (uint64_t i = 0, e = op.getStartIndices().size(); i < e; ++i) {
       // Always put a cast there.
       auto start = op.getStartIndices()[i];
-      auto cast_type = start.getType().cast<ShapedType>().clone(
-          signed_start_indices_element_type);
+      auto cast_type = mlir::cast<ShapedType>(start.getType())
+                           .clone(signed_start_indices_element_type);
       auto cast_op = rewriter.create<TF::CastOp>(op.getLoc(), cast_type, start);
       Value clamp_max = rewriter.create<TF::ConstOp>(
           op.getLoc(), rewriter.getIntegerAttr(
@@ -1409,11 +1399,11 @@ class ConvertDynamicUpdateSliceOp
   LogicalResult matchAndRewrite(
       mhlo::DynamicUpdateSliceOp op, OpAdaptor adaptor,
       ConversionPatternRewriter& rewriter) const final {
-    ShapedType operand_type = op.getOperand().getType().cast<ShapedType>();
+    ShapedType operand_type = mlir::cast<ShapedType>(op.getOperand().getType());
     ShapedType update_type =
-        op.getUpdate().getType().dyn_cast_or_null<ShapedType>();
-    ShapedType start_indices_type =
-        op.getStartIndices().front().getType().dyn_cast_or_null<ShapedType>();
+        mlir::dyn_cast_or_null<ShapedType>(op.getUpdate().getType());
+    ShapedType start_indices_type = mlir::dyn_cast_or_null<ShapedType>(
+        op.getStartIndices().front().getType());
     if (update_type == nullptr || start_indices_type == nullptr)
       return rewriter.notifyMatchFailure(
           op, "update and start_indices should have ShapedType");
@@ -1474,8 +1464,8 @@ class ConvertSortToTfTopk : public OpConversionPattern<mhlo::SortOp> {
           op, "only match for the case where operands is of size 2");
     auto keys = op.getInputs()[0];
     auto indices = op.getInputs()[1];
-    auto keys_ty = keys.getType().dyn_cast_or_null<ShapedType>();
-    auto indices_ty = indices.getType().dyn_cast_or_null<ShapedType>();
+    auto keys_ty = mlir::dyn_cast_or_null<ShapedType>(keys.getType());
+    auto indices_ty = mlir::dyn_cast_or_null<ShapedType>(indices.getType());
     if (!keys_ty || !keys_ty.hasStaticShape() ||
         !keys_ty.getElementType().isIntOrFloat())
       return rewriter.notifyMatchFailure(
@@ -1589,7 +1579,7 @@ Value BuildDotOperandFlattenedShapeOp(Value operand,
                                       DotDimensionsInfo dot_dimensions_info,
                                       ImplicitLocOpBuilder& builder,
                                       bool is_lhs) {
-  auto operand_type = operand.getType().cast<ShapedType>();
+  auto operand_type = mlir::cast<ShapedType>(operand.getType());
   BoolAttr true_attr = builder.getBoolAttr(true);
   auto operand_shape = builder.create<TF::ShapeOp>(operand, true_attr);
   const int64_t operand_rank = operand_type.getRank();
@@ -1665,8 +1655,8 @@ Value BuildDotOperandFlattenedShapeOp(Value operand,
 Value ConvertDot(PatternRewriter& rewriter, Value lhs, Value rhs,
                  DotDimensionNumbersAttr dot_dimension_numbers,
                  ShapedType result_type, mlir::Location loc) {
-  auto lhs_type = lhs.getType().cast<ShapedType>();
-  auto rhs_type = rhs.getType().cast<ShapedType>();
+  auto lhs_type = mlir::cast<ShapedType>(lhs.getType());
+  auto rhs_type = mlir::cast<ShapedType>(rhs.getType());
   const int lhs_rank = lhs_type.getRank();
   const int rhs_rank = rhs_type.getRank();
   ImplicitLocOpBuilder builder(loc, rewriter);
@@ -1821,7 +1811,7 @@ Value ConvertDot(PatternRewriter& rewriter, Value lhs, Value rhs,
 // necessary.
 Value ConvertDotOp(PatternRewriter& rewriter, Operation* old_op) {
   auto dot_op = cast<mhlo::DotOp>(old_op);
-  auto lhs_rank = dot_op.getLhs().getType().cast<ShapedType>().getRank();
+  auto lhs_rank = mlir::cast<ShapedType>(dot_op.getLhs().getType()).getRank();
   auto dot_dimension_numbers =
       DotDimensionNumbersAttr::get(rewriter.getContext(),
                                    /*lhs_batching_dimensions=*/{},
@@ -1831,17 +1821,18 @@ Value ConvertDotOp(PatternRewriter& rewriter, Operation* old_op) {
                                    /*rhs_contracting_dimensions=*/{0});
   return ConvertDot(
       rewriter, dot_op.getLhs(), dot_op.getRhs(), dot_dimension_numbers,
-      dot_op.getResult().getType().cast<ShapedType>(), dot_op.getLoc());
+      mlir::cast<ShapedType>(dot_op.getResult().getType()), dot_op.getLoc());
 }
 
 // Converts mhlo.dot to tf.BatchMatMul. Reshape or Transpose ops will also be
 // inserted to convert to well-formed matrix multiply.
 Value ConvertDotGeneralOp(PatternRewriter& rewriter, Operation* old_op) {
   auto dot_general_op = cast<mhlo::DotGeneralOp>(old_op);
-  return ConvertDot(rewriter, dot_general_op.getLhs(), dot_general_op.getRhs(),
-                    dot_general_op.getDotDimensionNumbers(),
-                    dot_general_op.getResult().getType().cast<ShapedType>(),
-                    dot_general_op.getLoc());
+  return ConvertDot(
+      rewriter, dot_general_op.getLhs(), dot_general_op.getRhs(),
+      dot_general_op.getDotDimensionNumbers(),
+      mlir::cast<ShapedType>(dot_general_op.getResult().getType()),
+      dot_general_op.getLoc());
 }
 
 // Replace BinaryOp with a combination of TfBinaryOp and TfReduceOp if the
@@ -1940,9 +1931,9 @@ class ConvertReduceOpToTfOp : public OpConversionPattern<mhlo::ReduceOp> {
         reduce_op.getResults().size() != 1)
       return failure();
 
-    if (!reduce_op.getInputs()[0].getType().isa<RankedTensorType>())
+    if (!mlir::isa<RankedTensorType>(reduce_op.getInputs()[0].getType()))
       return failure();
-    if (!reduce_op.getType(0).isa<RankedTensorType>()) return failure();
+    if (!mlir::isa<RankedTensorType>(reduce_op.getType(0))) return failure();
     return success();
   }
 };
@@ -1953,13 +1944,13 @@ class ConvertReduceOpToTfProd
   using ConvertReduceOpToTfOp::ConvertReduceOpToTfOp;
 
   LogicalResult MatchInitValue(Value init_value) const override {
-    auto type = init_value.getType().cast<ShapedType>().getElementType();
-    if (type.isa<FloatType>()) {
+    auto type = mlir::cast<ShapedType>(init_value.getType()).getElementType();
+    if (mlir::isa<FloatType>(type)) {
       float const_value;
       if (failed(GetConstantSplatValue<float>(init_value, const_value)) ||
           const_value != 1.0)
         return failure();
-    } else if (type.isa<IntegerType>() && type.isSignlessInteger()) {
+    } else if (mlir::isa<IntegerType>(type) && type.isSignlessInteger()) {
       int32_t const_value;
       if (failed(GetConstantSplatValue<int32_t>(init_value, const_value)) ||
           const_value != 1)
@@ -1978,13 +1969,13 @@ class ConvertReduceOpToTfSum
   using ConvertReduceOpToTfOp::ConvertReduceOpToTfOp;
 
   LogicalResult MatchInitValue(Value init_value) const override {
-    auto type = init_value.getType().cast<ShapedType>().getElementType();
-    if (type.isa<FloatType>()) {
+    auto type = mlir::cast<ShapedType>(init_value.getType()).getElementType();
+    if (mlir::isa<FloatType>(type)) {
       APFloat const_value(.0);
       if (failed(GetConstantSplatValue(init_value, const_value)) ||
           !const_value.isZero())
         return failure();
-    } else if (type.isa<IntegerType>() && type.isSignlessInteger()) {
+    } else if (mlir::isa<IntegerType>(type) && type.isSignlessInteger()) {
       APInt const_value;
       if (failed(GetConstantSplatValue(init_value, const_value)) ||
           !const_value.isZero())
@@ -2003,13 +1994,13 @@ class ConvertReduceOpToTfMax
   using ConvertReduceOpToTfOp::ConvertReduceOpToTfOp;
 
   LogicalResult MatchInitValue(Value init_value) const override {
-    auto type = init_value.getType().cast<ShapedType>().getElementType();
-    if (type.isa<FloatType>()) {
+    auto type = mlir::cast<ShapedType>(init_value.getType()).getElementType();
+    if (mlir::isa<FloatType>(type)) {
       APFloat const_value(.0);
       if (failed(GetConstantSplatValue(init_value, const_value)) ||
           !const_value.isInfinity() || !const_value.isNegative())
         return failure();
-    } else if (type.isa<IntegerType>() && type.isSignlessInteger()) {
+    } else if (mlir::isa<IntegerType>(type) && type.isSignlessInteger()) {
       APInt const_value;
       if (failed(GetConstantSplatValue(init_value, const_value)) ||
           !const_value.isMinSignedValue())
@@ -2027,14 +2018,14 @@ class ConvertReduceOpToTfMin
   using ConvertReduceOpToTfOp::ConvertReduceOpToTfOp;
 
   LogicalResult MatchInitValue(Value init_value) const override {
-    auto type = init_value.getType().cast<ShapedType>().getElementType();
+    auto type = mlir::cast<ShapedType>(init_value.getType()).getElementType();
 
-    if (type.isa<FloatType>()) {
+    if (mlir::isa<FloatType>(type)) {
       APFloat const_value(.0);
       if (failed(GetConstantSplatValue(init_value, const_value)) ||
           !const_value.isInfinity() || const_value.isNegative())
         return failure();
-    } else if (type.isa<IntegerType>() && type.isSignlessInteger()) {
+    } else if (mlir::isa<IntegerType>(type) && type.isSignlessInteger()) {
       APInt const_value;
       if (failed(GetConstantSplatValue(init_value, const_value)) ||
           !const_value.isMaxSignedValue())
@@ -2088,7 +2079,7 @@ class ConvertReduceOpToTfArgmax
     auto element_type = attr.getType().getElementType();
     if (attr.getNumElements() != 1 || !element_type.isIntOrFloat())
       return false;
-    if (element_type.isa<FloatType>()) {
+    if (mlir::isa<FloatType>(element_type)) {
       auto value = *attr.value_begin<APFloat>();
       return value.isNegative() && value.isInfinity();
     } else if (element_type.isInteger(1)) {
@@ -2112,7 +2103,7 @@ class ConvertReduceOpToTfArgmin
     auto element_type = attr.getType().getElementType();
     if (attr.getNumElements() != 1 || !element_type.isIntOrFloat())
       return false;
-    if (element_type.isa<FloatType>()) {
+    if (mlir::isa<FloatType>(element_type)) {
       auto value = *attr.value_begin<APFloat>();
       return !value.isNegative() && value.isInfinity();
     } else if (element_type.isInteger(1)) {
@@ -2134,18 +2125,18 @@ class ConvertIotaOpToTfRange : public OpConversionPattern<mhlo::IotaOp> {
       mhlo::IotaOp iota_op, OpAdaptor adaptor,
       ConversionPatternRewriter& rewriter) const final {
     RankedTensorType type =
-        iota_op.getType().dyn_cast_or_null<RankedTensorType>();
+        mlir::dyn_cast_or_null<RankedTensorType>(iota_op.getType());
     // TF::RangeOp doesn't support UI16.
     if (!type || type.getElementType().isUnsignedInteger(16)) return failure();
 
     const uint64_t dimension = iota_op.getIotaDimension();
     Type element_type = type.getElementType();
     Attribute start, limit, delta;
-    if (element_type.isa<FloatType>()) {
+    if (mlir::isa<FloatType>(element_type)) {
       start = rewriter.getFloatAttr(element_type, 0.0);
       limit = rewriter.getFloatAttr(element_type, type.getShape()[dimension]);
       delta = rewriter.getFloatAttr(element_type, 1.0);
-    } else if (element_type.isa<IntegerType>()) {
+    } else if (mlir::isa<IntegerType>(element_type)) {
       start = rewriter.getIntegerAttr(element_type, 0);
       limit = rewriter.getIntegerAttr(element_type, type.getShape()[dimension]);
       delta = rewriter.getIntegerAttr(element_type, 1);
@@ -2249,9 +2240,10 @@ bool IsSpatialPoolingWithoutDilation(
 
   // Check that the individual padding values are corresponding to SAME
   // padding from TensorFlow.
-  auto operand_type = rw.getInputs()[0].getType().dyn_cast<RankedTensorType>();
+  auto operand_type =
+      mlir::dyn_cast<RankedTensorType>(rw.getInputs()[0].getType());
   RankedTensorType output_type =
-      rw.getResult(0).getType().dyn_cast<RankedTensorType>();
+      mlir::dyn_cast<RankedTensorType>(rw.getResult(0).getType());
   if (!operand_type || !output_type) return false;
 
   for (uint64_t i = 1; i < rank - 1; ++i) {
@@ -2293,12 +2285,13 @@ class ConvertLoweredCumOp : public OpConversionPattern<mhlo::ReduceWindowOp> {
     auto const_op = llvm::dyn_cast_or_null<mhlo::ConstantOp>(
         rw.getInitValues()[0].getDefiningOp());
     if (!const_op) return failure();
-    auto const_op_dense_value = const_op.getValue().cast<DenseElementsAttr>();
+    auto const_op_dense_value =
+        mlir::cast<DenseElementsAttr>(const_op.getValue());
     if (!const_op_dense_value || !IsInitValue(const_op_dense_value)) {
       return failure();
     }
 
-    auto operand_type = rw.getInputs()[0].getType().cast<ShapedType>();
+    auto operand_type = mlir::cast<ShapedType>(rw.getInputs()[0].getType());
 
     // For a cumulative op, require a tensor of 1s for each dimension in
     // operand.
@@ -2383,7 +2376,7 @@ class ConvertLoweredCumSumOp
     auto element_type = attr.getType().getElementType();
     if (attr.getNumElements() != 1 || !element_type.isIntOrFloat())
       return false;
-    if (element_type.isa<FloatType>()) {
+    if (mlir::isa<FloatType>(element_type)) {
       auto value = *attr.value_begin<APFloat>();
       return value.isZero();
     }
@@ -2399,7 +2392,7 @@ class ConvertLoweredCumProdOp
     auto element_type = attr.getType().getElementType();
     if (attr.getNumElements() != 1 || !element_type.isIntOrFloat())
       return false;
-    if (element_type.isa<FloatType>()) {
+    if (mlir::isa<FloatType>(element_type)) {
       auto value = *attr.value_begin<APFloat>();
       return value.isExactlyValue(1.0);
     }
@@ -2431,8 +2424,8 @@ class ConvertAvgPoolOp : public OpConversionPattern<mhlo::DivOp> {
 
     // Check that this is a floating point reduce window with a rank of 4 or 5.
     const RankedTensorType rw_type =
-        rw.getResult(0).getType().dyn_cast<RankedTensorType>();
-    if (!rw_type || !rw_type.getElementType().isa<FloatType>() ||
+        mlir::dyn_cast<RankedTensorType>(rw.getResult(0).getType());
+    if (!rw_type || !mlir::isa<FloatType>(rw_type.getElementType()) ||
         rw_type.getRank() <= 3 || rw_type.getRank() > 5)
       return failure();
 
@@ -2568,8 +2561,8 @@ class ConvertMaxPoolOp : public OpConversionPattern<mhlo::ReduceWindowOp> {
 
     // Check that this is a floating point reduce window with a rank of 4 or 5.
     const RankedTensorType rw_type =
-        rw.getResult(0).getType().dyn_cast<RankedTensorType>();
-    if (!rw_type || !rw_type.getElementType().isa<FloatType>() ||
+        mlir::dyn_cast<RankedTensorType>(rw.getResult(0).getType());
+    if (!rw_type || !mlir::isa<FloatType>(rw_type.getElementType()) ||
         rw_type.getRank() <= 3 || rw_type.getRank() > 5)
       return failure();
 
@@ -2639,7 +2632,7 @@ class ConvertMaxPoolOp : public OpConversionPattern<mhlo::ReduceWindowOp> {
 
 // Returns the shape of the given value in a Constant Op.
 arith::ConstantOp ShapeToConst(PatternRewriter& rewriter, Value value) {
-  ArrayRef<int64_t> shape = value.getType().cast<ShapedType>().getShape();
+  ArrayRef<int64_t> shape = mlir::cast<ShapedType>(value.getType()).getShape();
   auto attr_type = RankedTensorType::get({static_cast<int64_t>(shape.size())},
                                          rewriter.getIntegerType(64));
   auto attr = DenseElementsAttr::get(attr_type, shape);
@@ -2659,36 +2652,37 @@ bool IsSign(APFloat a, APFloat sign) {
 }
 
 bool IsDenseSplatIntAttr(ElementsAttr float_or_int) {
-  return float_or_int.isa<SplatElementsAttr>() &&
-         float_or_int.isa<DenseIntElementsAttr>();
+  return mlir::isa<SplatElementsAttr>(float_or_int) &&
+         mlir::isa<DenseIntElementsAttr>(float_or_int);
 }
 
 bool IsDenseSplatFloatAttr(ElementsAttr float_or_int) {
-  return float_or_int.isa<SplatElementsAttr>() &&
-         float_or_int.isa<DenseFPElementsAttr>();
+  return mlir::isa<SplatElementsAttr>(float_or_int) &&
+         mlir::isa<DenseFPElementsAttr>(float_or_int);
 }
 
 bool ValueIsReciprocal(ElementsAttr float_or_int, ElementsAttr rhs) {
   if (IsDenseSplatFloatAttr(float_or_int) &&
       IsDenseSplatFloatAttr(float_or_int)) {
-    return (float_or_int.cast<SplatElementsAttr>().getSplatValue<APFloat>() *
-            rhs.cast<SplatElementsAttr>().getSplatValue<APFloat>())
+    return (mlir::cast<SplatElementsAttr>(float_or_int)
+                .getSplatValue<APFloat>() *
+            mlir::cast<SplatElementsAttr>(rhs).getSplatValue<APFloat>())
         .isExactlyValue(1.0);
   } else if (IsDenseSplatIntAttr(float_or_int) &&
              IsDenseSplatIntAttr(float_or_int)) {
-    return (float_or_int.cast<SplatElementsAttr>().getSplatValue<APInt>() *
-            rhs.cast<SplatElementsAttr>().getSplatValue<APInt>()) == 1;
+    return (mlir::cast<SplatElementsAttr>(float_or_int).getSplatValue<APInt>() *
+            mlir::cast<SplatElementsAttr>(rhs).getSplatValue<APInt>()) == 1;
   }
   return false;
 }
 
 bool ValueEquals(ElementsAttr float_or_int, double rhs) {
   if (IsDenseSplatFloatAttr(float_or_int)) {
-    return float_or_int.cast<SplatElementsAttr>()
+    return mlir::cast<SplatElementsAttr>(float_or_int)
         .getSplatValue<APFloat>()
         .isExactlyValue(rhs);
   } else if (IsDenseSplatIntAttr(float_or_int)) {
-    return float_or_int.cast<SplatElementsAttr>().getSplatValue<APInt>() ==
+    return mlir::cast<SplatElementsAttr>(float_or_int).getSplatValue<APInt>() ==
            static_cast<int>(rhs);
   }
   return false;
@@ -2696,11 +2690,12 @@ bool ValueEquals(ElementsAttr float_or_int, double rhs) {
 
 bool ValueGreaterThanZero(ElementsAttr float_or_int) {
   if (IsDenseSplatIntAttr(float_or_int)) {
-    auto value = float_or_int.cast<SplatElementsAttr>().getSplatValue<APInt>();
+    auto value =
+        mlir::cast<SplatElementsAttr>(float_or_int).getSplatValue<APInt>();
     return !value.isNegative() && !value.isZero();
   } else if (IsDenseSplatFloatAttr(float_or_int)) {
     auto value =
-        float_or_int.cast<SplatElementsAttr>().getSplatValue<APFloat>();
+        mlir::cast<SplatElementsAttr>(float_or_int).getSplatValue<APFloat>();
     return !value.isNaN() && !value.isNegative() && !value.isZero();
   }
   return false;
@@ -2723,13 +2718,13 @@ bool TensorIsSign(PatternRewriter& rewriter, ElementsAttr float_or_int,
       int_spl && sgn_cst_spl) {
     return IsSign(int_spl.getValue(), sgn_cst_spl.getValue());
   }
-  if (float_or_int.isa<DenseFPElementsAttr>()) {
+  if (mlir::isa<DenseFPElementsAttr>(float_or_int)) {
     auto sgn_splat_value = sgn_splat.getSplatValue<APFloat>();
     return llvm::all_of(float_or_int.getValues<APFloat>(), [&](APFloat value) {
       return IsSign(value, sgn_splat_value);
     });
   }
-  if (float_or_int.isa<DenseIntElementsAttr>()) {
+  if (mlir::isa<DenseIntElementsAttr>(float_or_int)) {
     auto sgn_splat_value = sgn_splat.getSplatValue<APInt>();
     return llvm::all_of(float_or_int.getValues<APInt>(), [&](APInt value) {
       return IsSign(value, sgn_splat_value);
@@ -2778,9 +2773,11 @@ class ConvertGatherOp : public OpConversionPattern<mhlo::GatherOp> {
     Value start_indices = gather_op.getStartIndices();
 
     // Can only convert with static shaped gather.
-    ShapedType operand_type = operand.getType().cast<ShapedType>();
-    ShapedType start_indices_type = start_indices.getType().cast<ShapedType>();
-    ShapedType result_type = gather_op.getResult().getType().cast<ShapedType>();
+    ShapedType operand_type = mlir::cast<ShapedType>(operand.getType());
+    ShapedType start_indices_type =
+        mlir::cast<ShapedType>(start_indices.getType());
+    ShapedType result_type =
+        mlir::cast<ShapedType>(gather_op.getResult().getType());
     if (!operand_type.hasStaticShape()) {
       gather_op.emitOpError() << "Dynamic shaped operand is not supported.";
       return failure();
@@ -2917,9 +2914,11 @@ class ConvertGatherOp : public OpConversionPattern<mhlo::GatherOp> {
     static const int max_batch_size = 50;
 
     // Can only convert with static shaped gather.
-    ShapedType operand_type = operand.getType().cast<ShapedType>();
-    ShapedType start_indices_type = start_indices.getType().cast<ShapedType>();
-    ShapedType result_type = gather_op.getResult().getType().cast<ShapedType>();
+    ShapedType operand_type = mlir::cast<ShapedType>(operand.getType());
+    ShapedType start_indices_type =
+        mlir::cast<ShapedType>(start_indices.getType());
+    ShapedType result_type =
+        mlir::cast<ShapedType>(gather_op.getResult().getType());
     if (!operand_type.hasStaticShape() ||
         !start_indices_type.hasStaticShape() || !result_type.hasStaticShape()) {
       return rewriter.notifyMatchFailure(
@@ -3140,7 +3139,7 @@ class ConvertWhileOp : public OpConversionPattern<mhlo::WhileOp> {
 
     // This rule doesn't support mhlo::WhileOp with tuple inputs.
     for (auto type : while_op->getOperandTypes()) {
-      if (type.isa<TupleType>()) return failure();
+      if (mlir::isa<TupleType>(type)) return failure();
     }
 
     // Creates a TF::WhileRegionOp to replace the mhlo::WhileOp. HLO WhileOp
@@ -3296,7 +3295,7 @@ class ConvertCustomCallWithApproxTopK
       }
     }
     auto backend_config =
-        op.getBackendConfigAttr().dyn_cast_or_null<mlir::DictionaryAttr>();
+        mlir::dyn_cast_or_null<mlir::DictionaryAttr>(op.getBackendConfigAttr());
     if (!backend_config) {
       return op.emitOpError() << "Missing backend_config attribute";
     }
@@ -3385,12 +3384,13 @@ class ConvertCustomCallWithApproxTopK
              << "ApproxTopK takes exactly 1 called_computation.";
     }
     mlir::func::FuncOp callee = module_op_->lookupSymbol<mlir::func::FuncOp>(
-        op.getCalledComputations()[0].cast<FlatSymbolRefAttr>());
+        mlir::cast<FlatSymbolRefAttr>(op.getCalledComputations()[0]));
     mlir::FunctionType callee_type = callee.getFunctionType();
     SmallVector<Type, 4> expected_callee_input_types;
     auto num_inputs = op.getInputs().size() / 2;
     for (unsigned i = 0; i < num_inputs; ++i) {
-      auto input_type = op.getOperand(i).getType().dyn_cast<RankedTensorType>();
+      auto input_type =
+          mlir::dyn_cast<RankedTensorType>(op.getOperand(i).getType());
       auto scalar = RankedTensorType::get({}, input_type.getElementType());
       expected_callee_input_types.push_back(scalar);
       expected_callee_input_types.push_back(scalar);
@@ -3491,12 +3491,10 @@ class ConvertRealDynamicSliceOp
   LogicalResult matchAndRewrite(
       mhlo::RealDynamicSliceOp real_dynamic_slice_op, OpAdaptor adaptor,
       ConversionPatternRewriter& rewriter) const final {
-    auto start_indices_type = real_dynamic_slice_op.getStartIndices()
-                                  .getType()
-                                  .cast<RankedTensorType>();
-    auto end_indices_type = real_dynamic_slice_op.getLimitIndices()
-                                .getType()
-                                .cast<RankedTensorType>();
+    auto start_indices_type = mlir::cast<RankedTensorType>(
+        real_dynamic_slice_op.getStartIndices().getType());
+    auto end_indices_type = mlir::cast<RankedTensorType>(
+        real_dynamic_slice_op.getLimitIndices().getType());
 
     if (start_indices_type.getNumDynamicDims() != 0 ||
         end_indices_type.getNumDynamicDims() != 0) {
@@ -3522,7 +3520,7 @@ class ConvertDynamicIotaOp : public OpConversionPattern<mhlo::DynamicIotaOp> {
       mhlo::DynamicIotaOp dynamic_iota_op, OpAdaptor adaptor,
       ConversionPatternRewriter& rewriter) const final {
     RankedTensorType type =
-        dynamic_iota_op.getType().dyn_cast_or_null<RankedTensorType>();
+        mlir::dyn_cast_or_null<RankedTensorType>(dynamic_iota_op.getType());
     if (!type || type.getElementType().isUnsignedInteger(64)) {
       return rewriter.notifyMatchFailure(dynamic_iota_op,
                                          "TF::RangeOp doesn't support UI64");
@@ -3538,19 +3536,19 @@ class ConvertDynamicIotaOp : public OpConversionPattern<mhlo::DynamicIotaOp> {
     const uint64_t dimension = dynamic_iota_op.getIotaDimension();
     Type element_type = type.getElementType();
     Attribute start, delta;
-    if (element_type.isa<FloatType>()) {
+    if (mlir::isa<FloatType>(element_type)) {
       start = rewriter.getFloatAttr(element_type, 0.0);
       delta = rewriter.getFloatAttr(element_type, 1.0);
-    } else if (element_type.isa<IntegerType>()) {
+    } else if (mlir::isa<IntegerType>(element_type)) {
       start = rewriter.getIntegerAttr(element_type, 0);
       delta = rewriter.getIntegerAttr(element_type, 1);
     } else {
       return failure();
     }
     auto output_shape = dynamic_iota_op.getOperand();
-    if (element_type.isa<FloatType>()) {
+    if (mlir::isa<FloatType>(element_type)) {
       auto cast_type =
-          output_shape.getType().cast<ShapedType>().clone(element_type);
+          mlir::cast<ShapedType>(output_shape.getType()).clone(element_type);
       output_shape = rewriter.create<TF::CastOp>(dynamic_iota_op.getLoc(),
                                                  cast_type, output_shape);
     }
@@ -3581,7 +3579,7 @@ bool IsTFStyleBroadcast(DenseIntElementsAttr broadcast_dimensions,
   // broadcast_dimensions is an increasing list by definition, thus it suffices
   // to check the first element.
   int64_t input_rank = broadcast_dimensions.getNumElements();
-  int64_t output_rank = output.getType().cast<ShapedType>().getRank();
+  int64_t output_rank = mlir::cast<ShapedType>(output.getType()).getRank();
   return input_rank == 0 ||
          (broadcast_dimensions.getValues<APInt>()[0].getSExtValue() ==
           output_rank - input_rank);
@@ -3606,11 +3604,12 @@ arith::ConstantOp ExpandedShape(PatternRewriter& rewriter, Value input,
                                 Value output) {
   // Initialize expanded shape with output rank and dimensions of 1.
   SmallVector<Attribute, 4> expanded_shape(
-      output.getType().cast<ShapedType>().getRank(),
+      mlir::cast<ShapedType>(output.getType()).getRank(),
       /*Value=*/rewriter.getI64IntegerAttr(1));
 
   // Set dimension sizes specified by broadcast_dimensions.
-  ArrayRef<int64_t> input_shape = input.getType().cast<ShapedType>().getShape();
+  ArrayRef<int64_t> input_shape =
+      mlir::cast<ShapedType>(input.getType()).getShape();
   for (auto x : llvm::enumerate(broadcast_dimensions)) {
     expanded_shape[x.value().getSExtValue()] =
         rewriter.getI64IntegerAttr(input_shape[x.index()]);
@@ -3627,9 +3626,9 @@ arith::ConstantOp ExpandedShape(PatternRewriter& rewriter, Value input,
 Value ExpandedDynamicShape(PatternRewriter& rewriter, Value input,
                            DenseIntElementsAttr broadcast_dimensions,
                            Value output) {
-  assert(output.getType().cast<ShapedType>() &&
+  assert(mlir::cast<ShapedType>(output.getType()) &&
          "output type must be of ShapedType");
-  int64_t output_rank = output.getType().cast<ShapedType>().getRank();
+  int64_t output_rank = mlir::cast<ShapedType>(output.getType()).getRank();
   llvm::SmallVector<int64_t, 4> expanded_dimensions;
   llvm::SmallSet<int64_t, 4> broadcast_dimensions_values;
   for (auto x : llvm::enumerate(broadcast_dimensions)) {
diff --git a/tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_hlo_conversions/custom_call.cc b/tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_hlo_conversions/custom_call.cc
index 9d52ee30dd3ce7..520cff8681156a 100644
--- a/tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_hlo_conversions/custom_call.cc
+++ b/tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_hlo_conversions/custom_call.cc
@@ -37,7 +37,7 @@ LogicalResult ConvertCustomCallOp::matchAndRewrite(
       rewriter.getStringAttr(mhlo_custom_call.getCallTargetName()));
 
   if (auto bc = mhlo_custom_call.getBackendConfig()) {
-    if (auto stringattr = bc->dyn_cast_or_null<mlir::StringAttr>()) {
+    if (auto stringattr = mlir::dyn_cast_or_null<mlir::StringAttr>(*bc)) {
       tfl_custom.setCustomOptionAttr(
           TFL::ConstBytesAttr::get(rewriter.getContext(), stringattr));
     }
@@ -53,7 +53,7 @@ LogicalResult ConvertCustomCallOp::matchAndRewrite(
 std::optional<bool> IsCustomCallLegal(mhlo::CustomCallOp op) {
   if (op.getCallTargetName().starts_with("custom_call.")) {
     auto bc = op.getBackendConfig();
-    if (!bc || bc->isa<mlir::StringAttr>()) {
+    if (!bc || mlir::isa<mlir::StringAttr>(*bc)) {
       return false;
     }
   }
diff --git a/tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_hlo_conversions/dot_general.cc b/tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_hlo_conversions/dot_general.cc
index ef3337cbca27cd..ccd726d2737f84 100644
--- a/tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_hlo_conversions/dot_general.cc
+++ b/tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_hlo_conversions/dot_general.cc
@@ -169,7 +169,7 @@ Value BuildDotOperandFlattenedShapeOp(Value operand,
                                       DotDimensionsInfo dot_dimensions_info,
                                       ImplicitLocOpBuilder& builder,
                                       bool is_lhs) {
-  auto operand_type = operand.getType().cast<ShapedType>();
+  auto operand_type = mlir::cast<ShapedType>(operand.getType());
   auto operand_shape = builder.create<TFL::ShapeOp>(
       RankedTensorType::get(static_cast<int32_t>(operand_type.getRank()),
                             builder.getIntegerType(32)),
@@ -248,8 +248,8 @@ Value BuildDotOperandFlattenedShapeOp(Value operand,
 Value ConvertDot(PatternRewriter& rewriter, Value lhs, Value rhs,
                  mhlo::DotDimensionNumbersAttr dot_dimension_numbers,
                  ShapedType result_type, mlir::Location loc) {
-  auto lhs_type = lhs.getType().cast<ShapedType>();
-  auto rhs_type = rhs.getType().cast<ShapedType>();
+  auto lhs_type = mlir::cast<ShapedType>(lhs.getType());
+  auto rhs_type = mlir::cast<ShapedType>(rhs.getType());
   const int lhs_rank = lhs_type.getRank();
   const int rhs_rank = rhs_type.getRank();
   ImplicitLocOpBuilder builder(loc, rewriter);
@@ -412,7 +412,7 @@ Value ConvertDot(PatternRewriter& rewriter, Value lhs, Value rhs,
 // be inserted when necessary. See ConvertDotGeneralOp for additional notes.
 Value ConvertDotOp(PatternRewriter& rewriter, Operation* old_op) {
   auto dot_op = cast<mhlo::DotOp>(old_op);
-  auto lhs_rank = dot_op.getLhs().getType().cast<ShapedType>().getRank();
+  auto lhs_rank = mlir::cast<ShapedType>(dot_op.getLhs().getType()).getRank();
   auto dot_dimension_numbers =
       mhlo::DotDimensionNumbersAttr::get(rewriter.getContext(),
                                          /*lhsBatchingDimensions=*/{},
@@ -422,15 +422,16 @@ Value ConvertDotOp(PatternRewriter& rewriter, Operation* old_op) {
                                          /*rhsContractingDimensions=*/{0});
   return ConvertDot(
       rewriter, dot_op.getLhs(), dot_op.getRhs(), dot_dimension_numbers,
-      dot_op.getResult().getType().cast<ShapedType>(), dot_op.getLoc());
+      mlir::cast<ShapedType>(dot_op.getResult().getType()), dot_op.getLoc());
 }
 
 Value ConvertDotGeneralOp(PatternRewriter& rewriter, Operation* old_op) {
   auto dot_general_op = cast<mhlo::DotGeneralOp>(old_op);
-  return ConvertDot(rewriter, dot_general_op.getLhs(), dot_general_op.getRhs(),
-                    dot_general_op.getDotDimensionNumbers(),
-                    dot_general_op.getResult().getType().cast<ShapedType>(),
-                    dot_general_op.getLoc());
+  return ConvertDot(
+      rewriter, dot_general_op.getLhs(), dot_general_op.getRhs(),
+      dot_general_op.getDotDimensionNumbers(),
+      mlir::cast<ShapedType>(dot_general_op.getResult().getType()),
+      dot_general_op.getLoc());
 }
 }  // namespace odml
 }  // namespace mlir
diff --git a/tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_hlo_conversions/reduce.h b/tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_hlo_conversions/reduce.h
index bfb705d00813d5..157cb82ce8e94e 100644
--- a/tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_hlo_conversions/reduce.h
+++ b/tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_hlo_conversions/reduce.h
@@ -74,7 +74,7 @@ class ConvertReduceOpToArgMinMax : public OpConversionPattern<mhlo::ReduceOp> {
     if (!MatchIota(reduce_op.getDimensions(), iota)) return failure();
 
     // Match the reduction computation.
-    const bool is_float = operand_init.getElementType().isa<FloatType>();
+    const bool is_float = mlir::isa<FloatType>(operand_init.getElementType());
     if (failed(MatchReduceToArgMinMaxType1(reduce_op, is_float, is_argmax)) &&
         failed(MatchReduceToArgMinMaxType2(reduce_op, is_argmax)))
       return rewriter.notifyMatchFailure(
@@ -91,8 +91,8 @@ class ConvertReduceOpToArgMinMax : public OpConversionPattern<mhlo::ReduceOp> {
     // Generate a Max and an ArgMax of as the mhlo op returns both while in TF
     // we have separate ops for them. If only one of them is used then the other
     // one will be garbage collected later.
-    if (!operand.getType().isa<ShapedType>()) return failure();
-    auto operand_type = operand.getType().cast<ShapedType>();
+    if (!mlir::isa<ShapedType>(operand.getType())) return failure();
+    auto operand_type = mlir::cast<ShapedType>(operand.getType());
     if (operand_type.getElementType().isInteger(1)) {
       // TF does not support min or max on boolean (int1) arguments.
       // Use AnyOp for MaxOp and AllOp for MinOp.
diff --git a/tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_hlo_conversions/scatter.h b/tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_hlo_conversions/scatter.h
index fb0e0d80a4eb9b..f8ea8227137617 100644
--- a/tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_hlo_conversions/scatter.h
+++ b/tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_hlo_conversions/scatter.h
@@ -95,9 +95,9 @@ class ConvertScatterOp : public OpConversionPattern<mhlo::ScatterOp> {
       OperandRange updates = scatter_op.getUpdates();
       if (operands.size() != 1 || updates.size() != 1) return failure();
 
-      ShapedType operand_type = operands[0].getType().cast<ShapedType>();
-      ShapedType indices_type = indices.getType().cast<ShapedType>();
-      ShapedType updates_type = updates[0].getType().cast<ShapedType>();
+      ShapedType operand_type = mlir::cast<ShapedType>(operands[0].getType());
+      ShapedType indices_type = mlir::cast<ShapedType>(indices.getType());
+      ShapedType updates_type = mlir::cast<ShapedType>(updates[0].getType());
 
       Value new_updates = updates[0];
 
diff --git a/tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_hlo_conversions/util.cc b/tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_hlo_conversions/util.cc
index c2f533776d0408..783f0431e9b964 100644
--- a/tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_hlo_conversions/util.cc
+++ b/tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_hlo_conversions/util.cc
@@ -203,7 +203,7 @@ Value InsertTranspose(Value value, int batch_dim, int feature_dim,
                       int default_batch_dim, int default_feature_dim,
                       int default_spatial_dim_start, int num_spatial_dims,
                       ConversionPatternRewriter& rewriter) {
-  auto type = value.getType().cast<RankedTensorType>();
+  auto type = mlir::cast<RankedTensorType>(value.getType());
   DenseIntElementsAttr permutation;
   const int spatial_dim_start = spatial_dimensions.front();
   if (!NeedsReformatTypeAndPermutation(
@@ -224,7 +224,7 @@ Value InsertTranspose(Value value, int batch_dim, int feature_dim,
 
 Value CreateCastToInt32(Value val, Location loc, PatternRewriter& rewriter) {
   IntegerType new_ele_type = rewriter.getIntegerType(32);
-  if (auto shaped_type = val.getType().dyn_cast<RankedTensorType>()) {
+  if (auto shaped_type = mlir::dyn_cast<RankedTensorType>(val.getType())) {
     ShapedType new_type =
         RankedTensorType::get(shaped_type.getShape(), new_ele_type);
     return rewriter.create<TFL::CastOp>(loc, new_type, val);
diff --git a/tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_stablehlo_composite_to_tfl_custom.cc b/tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_stablehlo_composite_to_tfl_custom.cc
index 6e0a3325460b7a..50521a02c7b907 100644
--- a/tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_stablehlo_composite_to_tfl_custom.cc
+++ b/tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_stablehlo_composite_to_tfl_custom.cc
@@ -63,13 +63,13 @@ LogicalResult BuildOption(flexbuffers::Builder* fbb, Operation* op,
   const char* key = pair.getName().data();
   const auto attr = pair.getValue();
 
-  if (attr.isa<::mlir::IntegerAttr>()) {
-    fbb->Int(key, attr.dyn_cast<mlir::IntegerAttr>().getInt());
+  if (mlir::isa<::mlir::IntegerAttr>(attr)) {
+    fbb->Int(key, mlir::dyn_cast<mlir::IntegerAttr>(attr).getInt());
     return success();
   }
 
-  if (attr.isa<::mlir::FloatAttr>()) {
-    fbb->Double(key, attr.dyn_cast<mlir::FloatAttr>().getValueAsDouble());
+  if (mlir::isa<::mlir::FloatAttr>(attr)) {
+    fbb->Double(key, mlir::dyn_cast<mlir::FloatAttr>(attr).getValueAsDouble());
     return success();
   }
 
diff --git a/tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_stablehlo_custom_call_to_composite.cc b/tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_stablehlo_custom_call_to_composite.cc
index 4cfb0e04e96af4..e699c303bbaac2 100644
--- a/tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_stablehlo_custom_call_to_composite.cc
+++ b/tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_stablehlo_custom_call_to_composite.cc
@@ -45,18 +45,19 @@ struct ReplaceCustomCallWithComposite final
   LogicalResult matchAndRewrite(mlir::stablehlo::CustomCallOp op,
                                 PatternRewriter &rewriter) const override {
     auto backendConfig =
-        op->getAttr("composite.backend_config").dyn_cast<DictionaryAttr>();
+        mlir::dyn_cast<DictionaryAttr>(op->getAttr("composite.backend_config"));
     if (!backendConfig)
       return op->emitError(
           "custom_call has no 'composite.backend_config' attribute or the "
           "attribute is not a dictionary");
 
-    auto name = backendConfig.get("name").dyn_cast<StringAttr>();
+    auto name = mlir::dyn_cast<StringAttr>(backendConfig.get("name"));
     if (!name)
       return op->emitError(
           "backend_config has no 'name' key or the name value is not a string");
 
-    auto attrs = backendConfig.get("attributes").dyn_cast<DictionaryAttr>();
+    auto attrs =
+        mlir::dyn_cast<DictionaryAttr>(backendConfig.get("attributes"));
     if (!attrs)
       return op->emitError(
           "backend_config has no 'attributes' key or the attributes value is "
@@ -66,7 +67,7 @@ struct ReplaceCustomCallWithComposite final
     if (!calledComputations || calledComputations.size() != 1)
       return op->emitError("expected exactly one called_computation");
 
-    auto decomposition = calledComputations[0].cast<FlatSymbolRefAttr>();
+    auto decomposition = mlir::cast<FlatSymbolRefAttr>(calledComputations[0]);
 
     auto composite = rewriter.create<mlir::stablehlo::CompositeOp>(
         op.getLoc(), op.getResultTypes(), op.getOperands(), name.str(), attrs,
diff --git a/tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_stablehlo_to_vhlo.cc b/tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_stablehlo_to_vhlo.cc
index 141983965ff7ce..e091e8cb3201c1 100644
--- a/tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_stablehlo_to_vhlo.cc
+++ b/tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_stablehlo_to_vhlo.cc
@@ -93,7 +93,7 @@ class StablehloToOdmlTypeConverter : public vhlo::VhloTypeConverter {
       return attr;
 
     if (auto stablehlo_attr =
-            attr.dyn_cast_or_null<stablehlo::TypeExtensionsAttr>()) {
+            mlir::dyn_cast_or_null<stablehlo::TypeExtensionsAttr>(attr)) {
       return vhlo::TypeExtensionsV1Attr::get(stablehlo_attr.getContext(),
                                              stablehlo_attr.getBounds());
     }
@@ -119,7 +119,8 @@ class VhloToStablehloTypeConverter : public vhlo::VhloTypeConverter {
   }
 
   Attribute convertEncoding(Attribute attr) const final {
-    if (auto vhlo_attr = attr.dyn_cast_or_null<vhlo::TypeExtensionsV1Attr>()) {
+    if (auto vhlo_attr =
+            mlir::dyn_cast_or_null<vhlo::TypeExtensionsV1Attr>(attr)) {
       return stablehlo::TypeExtensionsAttr::get(vhlo_attr.getContext(),
                                                 vhlo_attr.getBounds());
     }
diff --git a/tensorflow/compiler/mlir/lite/stablehlo/transforms/op_stat_pass.cc b/tensorflow/compiler/mlir/lite/stablehlo/transforms/op_stat_pass.cc
index f7a136f2259ad2..82c7a4b4687055 100644
--- a/tensorflow/compiler/mlir/lite/stablehlo/transforms/op_stat_pass.cc
+++ b/tensorflow/compiler/mlir/lite/stablehlo/transforms/op_stat_pass.cc
@@ -105,8 +105,8 @@ void PrintOpStatsPass::runOnOperation() {
           (dyn_cast_or_null<DynamicRangeQuantizedOpInterface>(op))
               ? op->getOperand(1)
               : op->getResult(0);
-      ShapedType value_shaped_type =
-          value_for_deducing_op_type.getType().dyn_cast_or_null<ShapedType>();
+      ShapedType value_shaped_type = mlir::dyn_cast_or_null<ShapedType>(
+          value_for_deducing_op_type.getType());
       if (value_shaped_type != nullptr) {
         auto operand_or_result = value_shaped_type.getElementType();
         std::string dtype;
@@ -122,15 +122,16 @@ void PrintOpStatsPass::runOnOperation() {
             })
             .Case<UniformQuantizedType>([&](Type) {
               auto uniform_quantized_dtype =
-                  operand_or_result.dyn_cast_or_null<UniformQuantizedType>()
+                  mlir::dyn_cast_or_null<UniformQuantizedType>(
+                      operand_or_result)
                       .getStorageType();
               dtype = absl::StrCat(
                   "uq_", uniform_quantized_dtype.getIntOrFloatBitWidth());
             })
             .Case<quant::UniformQuantizedPerAxisType>([&](Type) {
               auto uniform_quantized_dtype =
-                  operand_or_result
-                      .dyn_cast_or_null<quant::UniformQuantizedPerAxisType>()
+                  mlir::dyn_cast_or_null<quant::UniformQuantizedPerAxisType>(
+                      operand_or_result)
                       .getStorageType();
               dtype = absl::StrCat(
                   "uq_", uniform_quantized_dtype.getIntOrFloatBitWidth());
diff --git a/tensorflow/compiler/mlir/lite/stablehlo/transforms/optimize.cc b/tensorflow/compiler/mlir/lite/stablehlo/transforms/optimize.cc
index b0797521798994..d9c23dfa12b8ae 100644
--- a/tensorflow/compiler/mlir/lite/stablehlo/transforms/optimize.cc
+++ b/tensorflow/compiler/mlir/lite/stablehlo/transforms/optimize.cc
@@ -27,6 +27,7 @@ limitations under the License.
 #include "mlir/IR/Types.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
 #include "mlir/Pass/PassRegistry.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/lite/stablehlo/transforms/passes.h"
 #include "xla/mlir_hlo/mhlo/IR/hlo_ops.h"
@@ -37,8 +38,8 @@ namespace odml {
 // Convert mhlo.dot to mhlo.dot_general.
 LogicalResult ConvertDotToDotGeneral(mhlo::DotOp op,
                                      PatternRewriter &rewriter) {
-  auto lhs_type = op.getLhs().getType().cast<ShapedType>();
-  auto rhs_type = op.getRhs().getType().cast<ShapedType>();
+  auto lhs_type = mlir::cast<ShapedType>(op.getLhs().getType());
+  auto rhs_type = mlir::cast<ShapedType>(op.getRhs().getType());
   if (!lhs_type.hasRank() || !rhs_type.hasRank()) {
     return rewriter.notifyMatchFailure(op, "unsupported unranked input type");
   }
@@ -264,7 +265,7 @@ LogicalResult LiftDotConcatLHS(mhlo::ConcatenateOp concat,
   new_concat_shape[new_concat_dim] = 0;
   for (auto v : all_dot_lhs) {
     new_concat_shape[new_concat_dim] +=
-        v.getType().dyn_cast<ShapedType>().getShape()[new_concat_dim];
+        mlir::dyn_cast<ShapedType>(v.getType()).getShape()[new_concat_dim];
   }
 
   auto new_concat = rewriter.create<mhlo::ConcatenateOp>(
@@ -353,7 +354,7 @@ LogicalResult LiftDotConcatLHSAndRHS(mhlo::ConcatenateOp concat,
   lhs_new_concat_shape[lhs_batch_dim] = 0;
   for (auto v : all_dot_lhs) {
     lhs_new_concat_shape[lhs_batch_dim] +=
-        v.getType().dyn_cast<ShapedType>().getShape()[lhs_batch_dim];
+        mlir::dyn_cast<ShapedType>(v.getType()).getShape()[lhs_batch_dim];
   }
   const int64_t rhs_batch_dim =
       first_dot.getDotDimensionNumbers().getRhsBatchingDimensions()[0];
@@ -362,7 +363,7 @@ LogicalResult LiftDotConcatLHSAndRHS(mhlo::ConcatenateOp concat,
   rhs_new_concat_shape[rhs_batch_dim] = 0;
   for (auto v : all_dot_rhs) {
     rhs_new_concat_shape[rhs_batch_dim] +=
-        v.getType().dyn_cast<ShapedType>().getShape()[rhs_batch_dim];
+        mlir::dyn_cast<ShapedType>(v.getType()).getShape()[rhs_batch_dim];
   }
 
   auto lhs_new_concat = rewriter.create<mhlo::ConcatenateOp>(
diff --git a/tensorflow/compiler/mlir/lite/stablehlo/transforms/rename_entrypoint_to_main.cc b/tensorflow/compiler/mlir/lite/stablehlo/transforms/rename_entrypoint_to_main.cc
index 8234380f0f4182..81c6fc47473d43 100644
--- a/tensorflow/compiler/mlir/lite/stablehlo/transforms/rename_entrypoint_to_main.cc
+++ b/tensorflow/compiler/mlir/lite/stablehlo/transforms/rename_entrypoint_to_main.cc
@@ -23,6 +23,7 @@ limitations under the License.
 #include "mlir/IR/Builders.h"  // from @llvm-project
 #include "mlir/IR/BuiltinOps.h"  // from @llvm-project
 #include "mlir/IR/SymbolTable.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_saved_model.h"
 
 namespace mlir {
@@ -62,7 +63,7 @@ class RenameEntrypointToMainPass
       //   }
       // clang-format on
       for (auto attr : session_initializer.getInitializers()) {
-        auto sym_attr = attr.dyn_cast<FlatSymbolRefAttr>();
+        auto sym_attr = mlir::dyn_cast<FlatSymbolRefAttr>(attr);
         if (!sym_attr) break;
         entrypoints.erase(sym_attr.getValue());
       }
diff --git a/tensorflow/compiler/mlir/lite/stablehlo/transforms/tflite_legalize_hlo.cc b/tensorflow/compiler/mlir/lite/stablehlo/transforms/tflite_legalize_hlo.cc
index 4304d34f4743ec..f86b78275fb951 100644
--- a/tensorflow/compiler/mlir/lite/stablehlo/transforms/tflite_legalize_hlo.cc
+++ b/tensorflow/compiler/mlir/lite/stablehlo/transforms/tflite_legalize_hlo.cc
@@ -66,7 +66,7 @@ class ConvertReduceOpToTFLiteArgmax
     auto element_type = attr.getType().getElementType();
     if (attr.getNumElements() != 1 || !element_type.isIntOrFloat())
       return false;
-    if (element_type.isa<FloatType>()) {
+    if (mlir::isa<FloatType>(element_type)) {
       auto value = *attr.value_begin<APFloat>();
       return value.isNegative() && value.isInfinity();
     } else if (element_type.isInteger(1)) {
@@ -90,7 +90,7 @@ class ConvertReduceOpToTFLiteArgmin
     auto element_type = attr.getType().getElementType();
     if (attr.getNumElements() != 1 || !element_type.isIntOrFloat())
       return false;
-    if (element_type.isa<FloatType>()) {
+    if (mlir::isa<FloatType>(element_type)) {
       auto value = *attr.value_begin<APFloat>();
       return !value.isNegative() && value.isInfinity();
     } else if (element_type.isInteger(1)) {
diff --git a/tensorflow/compiler/mlir/lite/stablehlo/transforms/unfold_splat_constant_pass.cc b/tensorflow/compiler/mlir/lite/stablehlo/transforms/unfold_splat_constant_pass.cc
index e7f86a022d2274..7a3abd35d0d376 100644
--- a/tensorflow/compiler/mlir/lite/stablehlo/transforms/unfold_splat_constant_pass.cc
+++ b/tensorflow/compiler/mlir/lite/stablehlo/transforms/unfold_splat_constant_pass.cc
@@ -28,6 +28,7 @@ limitations under the License.
 #include "mlir/IR/Visitors.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
 #include "mlir/Pass/PassRegistry.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "xla/mlir_hlo/mhlo/IR/hlo_ops.h"
 
 namespace mlir {
@@ -60,7 +61,7 @@ class UnfoldSplatConstantPass
   void UnfoldSplatConstant(mlir::OpBuilder* op_builder,
                            mhlo::ConstantOp const_op) const {
     auto splat_elements_attr =
-        const_op.getValue().dyn_cast<SplatElementsAttr>();
+        mlir::dyn_cast<SplatElementsAttr>(const_op.getValue());
     if (!splat_elements_attr) {
       return;
     }
@@ -68,8 +69,8 @@ class UnfoldSplatConstantPass
       return;
     }
     auto element_type = splat_elements_attr.getType().getElementType();
-    if (element_type.isa<ComplexType>() ||
-        element_type.isa<quant::QuantizedType>()) {
+    if (mlir::isa<ComplexType>(element_type) ||
+        mlir::isa<quant::QuantizedType>(element_type)) {
       return;
     }
     op_builder->setInsertionPoint(const_op);
diff --git a/tensorflow/compiler/mlir/lite/stablehlo/transforms/unfuse_batch_norm_pass.cc b/tensorflow/compiler/mlir/lite/stablehlo/transforms/unfuse_batch_norm_pass.cc
index f4cdad00b79774..dadcabc55a5e57 100644
--- a/tensorflow/compiler/mlir/lite/stablehlo/transforms/unfuse_batch_norm_pass.cc
+++ b/tensorflow/compiler/mlir/lite/stablehlo/transforms/unfuse_batch_norm_pass.cc
@@ -29,6 +29,7 @@ limitations under the License.
 #include "mlir/IR/Types.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
 #include "mlir/Pass/PassRegistry.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/lite/stablehlo/transforms/passes.h"
@@ -60,7 +61,8 @@ Value broadcastToFeatureDim(Location loc, RankedTensorType result_type,
 
 // Gets the shape of operand, assuming it is a dynamic shape with static rank.
 Value getShapeValue(Location loc, Value operand, PatternRewriter &rewriter) {
-  RankedTensorType resultType = operand.getType().dyn_cast<RankedTensorType>();
+  RankedTensorType resultType =
+      mlir::dyn_cast<RankedTensorType>(operand.getType());
   return rewriter.create<shape::ShapeOfOp>(
       loc,
       RankedTensorType::get(/*shape=*/{resultType.getRank()},
@@ -92,8 +94,8 @@ Value materializeEpsilon(Operation *op, FloatAttr epsilon_attr,
   }
 
   auto scalar_type = RankedTensorType::get(/*shape=*/{}, fp_type);
-  auto epsilon_tensor_attr =
-      DenseElementsAttr::get(scalar_type, {epsilon_attr.cast<Attribute>()});
+  auto epsilon_tensor_attr = DenseElementsAttr::get(
+      scalar_type, {mlir::cast<Attribute>(epsilon_attr)});
   Value epsilon = b.create<mhlo::ConstantOp>(epsilon_tensor_attr);
   auto dims_type = RankedTensorType::get(/*shape=*/{0}, b.getIntegerType(64));
   auto dims = DenseIntElementsAttr::get(dims_type, SmallVector<int64_t, 1>{});
@@ -113,7 +115,7 @@ class UnfuseBatchNormTrainingPattern
   LogicalResult matchAndRewrite(mhlo::BatchNormTrainingOp bn_op,
                                 PatternRewriter &rewriter) const override {
     auto inputs = bn_op.getOperand();
-    auto input_type = inputs.getType().dyn_cast<RankedTensorType>();
+    auto input_type = mlir::dyn_cast<RankedTensorType>(inputs.getType());
     if (!input_type) {
       return failure();
     }
@@ -172,13 +174,14 @@ class UnfuseBatchNormInferencePattern
     // Enforce type invariants.
     // Note that we deduce the actual element type from the variance,
     // which should not be subject to quantization at a higher level.
-    auto input_type = bn_op.getOperand().getType().dyn_cast<RankedTensorType>();
+    auto input_type =
+        mlir::dyn_cast<RankedTensorType>(bn_op.getOperand().getType());
     auto variance_type =
-        bn_op.getVariance().getType().dyn_cast<RankedTensorType>();
+        mlir::dyn_cast<RankedTensorType>(bn_op.getVariance().getType());
     if (!input_type || !variance_type) {
       return failure();
     }
-    auto fp_type = variance_type.getElementType().dyn_cast<FloatType>();
+    auto fp_type = mlir::dyn_cast<FloatType>(variance_type.getElementType());
     if (!fp_type) {
       return failure();
     }
diff --git a/tensorflow/compiler/mlir/lite/transforms/analyze_variables.cc b/tensorflow/compiler/mlir/lite/transforms/analyze_variables.cc
index 6fd0278bf909e4..39afd416ab1aa2 100644
--- a/tensorflow/compiler/mlir/lite/transforms/analyze_variables.cc
+++ b/tensorflow/compiler/mlir/lite/transforms/analyze_variables.cc
@@ -16,6 +16,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/IR/Operation.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/lite/ir/tfl_ops.h"
 #include "tensorflow/compiler/mlir/lite/transforms/passes.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
@@ -92,7 +93,8 @@ void AnalyzeVariablesPass::runOnOperation() {
     // Note: this might disable native variables in more than needed cases.
     // TODO(b/189370197): Enhance variable analysis.
     for (auto operand : op->getOperands()) {
-      if (getElementTypeOrSelf(operand.getType()).isa<TF::ResourceType>()) {
+      if (mlir::isa<TF::ResourceType>(
+              getElementTypeOrSelf(operand.getType()))) {
         legalize_to_tfl = false;
         return WalkResult::interrupt();
       }
diff --git a/tensorflow/compiler/mlir/lite/transforms/decompose_hybrid_quantization.cc b/tensorflow/compiler/mlir/lite/transforms/decompose_hybrid_quantization.cc
index 5329274271c55c..3fcd82ef033938 100644
--- a/tensorflow/compiler/mlir/lite/transforms/decompose_hybrid_quantization.cc
+++ b/tensorflow/compiler/mlir/lite/transforms/decompose_hybrid_quantization.cc
@@ -31,6 +31,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinOps.h"  // from @llvm-project
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/lite/ir/tfl_ops.h"
 #include "tensorflow/compiler/mlir/lite/transforms/passes.h"
@@ -62,20 +63,20 @@ class DequantizeConverter : public OpRewritePattern<SrcOp> {
     bool allTypesFp = true;
     bool allTypesQuantizedOrInt = true;
     for (auto operand : op->getOperands()) {
-      ShapedType type = operand.getType().template dyn_cast<ShapedType>();
+      ShapedType type = mlir::dyn_cast<ShapedType>(operand.getType());
       if (!type) continue;
-      allTypesFp &= !type.getElementType().isa<quant::QuantizedType>();
+      allTypesFp &= !mlir::isa<quant::QuantizedType>(type.getElementType());
       allTypesQuantizedOrInt &=
-          (type.getElementType().isa<quant::QuantizedType>() ||
-           type.getElementType().isa<IntegerType>());
+          (mlir::isa<quant::QuantizedType>(type.getElementType()) ||
+           mlir::isa<IntegerType>(type.getElementType()));
     }
 
     for (auto result : op->getResults()) {
-      ShapedType type = result.getType().template cast<ShapedType>();
-      allTypesFp &= !type.getElementType().isa<quant::QuantizedType>();
+      ShapedType type = mlir::cast<ShapedType>(result.getType());
+      allTypesFp &= !mlir::isa<quant::QuantizedType>(type.getElementType());
       allTypesQuantizedOrInt &=
-          (type.getElementType().isa<quant::QuantizedType>() ||
-           type.getElementType().isa<IntegerType>());
+          (mlir::isa<quant::QuantizedType>(type.getElementType()) ||
+           mlir::isa<IntegerType>(type.getElementType()));
     }
 
     // If all quantized or floating point then types are consistent.
diff --git a/tensorflow/compiler/mlir/lite/transforms/default_quant_params.cc b/tensorflow/compiler/mlir/lite/transforms/default_quant_params.cc
index 2f015e61d58fe6..94ed4b1e0340a5 100644
--- a/tensorflow/compiler/mlir/lite/transforms/default_quant_params.cc
+++ b/tensorflow/compiler/mlir/lite/transforms/default_quant_params.cc
@@ -25,6 +25,7 @@ limitations under the License.
 #include "mlir/Dialect/Quant/QuantTypes.h"  // from @llvm-project
 #include "mlir/IR/Builders.h"  // from @llvm-project
 #include "mlir/IR/BuiltinAttributes.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/TypeID.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/lite/ir/tfl_ops.h"
 #include "tensorflow/compiler/mlir/lite/transforms/passes.h"
@@ -152,7 +153,7 @@ void DefaultQuantParamsPass::AddToWorkListIfUnquantized(
     Value value, std::vector<Value> *values) {
   // If the result isn't with float type, this result is an integer tensor and
   // doesn't require quantization.
-  auto tensor_type = value.getType().dyn_cast<TensorType>();
+  auto tensor_type = mlir::dyn_cast<TensorType>(value.getType());
   if (!tensor_type) {
     // There are none type values.
     return;
@@ -202,9 +203,9 @@ quant::QuantParams DefaultQuantParamsPass::GetQuantParamsForBias(
   for (int non_bias : non_biases) {
     Operation *non_bias_define = op->getOperand(non_bias).getDefiningOp();
     if (auto dequant = llvm::dyn_cast<TFL::DequantizeOp>(non_bias_define)) {
-      auto non_bias_type = dequant.getInput().getType().cast<TensorType>();
+      auto non_bias_type = mlir::cast<TensorType>(dequant.getInput().getType());
       auto non_bias_ele_type =
-          non_bias_type.getElementType().cast<quant::QuantizedType>();
+          mlir::cast<quant::QuantizedType>(non_bias_type.getElementType());
       non_bias_types.push_back(non_bias_ele_type);
     } else {
       // The non-bias hasn't been quantized, let's skip this bias.
diff --git a/tensorflow/compiler/mlir/lite/transforms/dense_to_sparse.cc b/tensorflow/compiler/mlir/lite/transforms/dense_to_sparse.cc
index 8a3abc94e2af57..5cac14867482bb 100644
--- a/tensorflow/compiler/mlir/lite/transforms/dense_to_sparse.cc
+++ b/tensorflow/compiler/mlir/lite/transforms/dense_to_sparse.cc
@@ -22,6 +22,7 @@ limitations under the License.
 #include "mlir/IR/Builders.h"  // from @llvm-project
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/lite/ir/tfl_ops.h"
 #include "tensorflow/compiler/mlir/lite/transforms/passes.h"
 #include "tensorflow/lite/kernels/internal/utils/sparsity_format_converter.h"
@@ -92,13 +93,13 @@ float CalculateRandomSparsity(const ElementsAttr& attr,
   int num_elements = type.getNumElements();
   int num_zeros = 0;
 
-  if (type.getElementType().isa<FloatType>()) {
+  if (mlir::isa<FloatType>(type.getElementType())) {
     for (const auto val : attr.getValues<APFloat>()) {
       if (val.isZero()) {
         num_zeros++;
       }
     }
-  } else if (type.getElementType().isa<quant::QuantizedType>()) {
+  } else if (mlir::isa<quant::QuantizedType>(type.getElementType())) {
     for (const auto val : attr.getValues<int8_t>()) {
       if (val == 0) {
         num_zeros++;
@@ -144,7 +145,7 @@ float CalculateBlockSparsity(const ElementsAttr& attr, const ShapedType& type,
     sparsity =
         GetSparsity(type.getNumElements() - format_converter.GetData().size(),
                     type.getNumElements());
-  } else if (type.getElementType().isa<quant::QuantizedType>()) {
+  } else if (mlir::isa<quant::QuantizedType>(type.getElementType())) {
     tflite::internal::sparsity::FormatConverter<int8_t> format_converter(
         shape, traversal_order, format, b_size, b_map);
     std::vector<int8_t> data;
@@ -179,10 +180,10 @@ InspectResult InspectWeight(
   InspectResult result = {};
   if (auto cst = dyn_cast<ConstOp>(inst)) {
     attr = cst.getValue();
-    type = cst.getType().cast<ShapedType>();
+    type = mlir::cast<ShapedType>(cst.getType());
   } else if (auto cst = dyn_cast<QConstOp>(inst)) {
     attr = cst.getValue();
-    type = cst.getType().cast<ShapedType>();
+    type = mlir::cast<ShapedType>(cst.getType());
   } else {
     result.can_compress = false;
     return result;
@@ -229,10 +230,10 @@ std::vector<T> BuildSparsityParameterAttribute(
   ShapedType type;
   if (auto cst = dyn_cast<ConstOp>(inst)) {
     attr = cst.getValue();
-    type = cst.getType().cast<ShapedType>();
+    type = mlir::cast<ShapedType>(cst.getType());
   } else if (auto cst = dyn_cast<QConstOp>(inst)) {
     attr = cst.getValue();
-    type = cst.getType().cast<ShapedType>();
+    type = mlir::cast<ShapedType>(cst.getType());
   } else {
     assert(false && "Expected a constant-like op");
   }
@@ -317,10 +318,10 @@ void DenseToSparsePass::runOnOperation() {
       float ratio_threshold = kBlockOverRandomSparsityRatio;
       if (isa<ConstOp>(inst)) {
         supported_block_size = sparse_op.GetFloatBlockSize();
-        type = dyn_cast<ConstOp>(inst).getType().cast<ShapedType>();
+        type = mlir::cast<ShapedType>(dyn_cast<ConstOp>(inst).getType());
       } else if (isa<QConstOp>(inst)) {
         supported_block_size = sparse_op.GetQuantizedBlockSize();
-        type = dyn_cast<QConstOp>(inst).getType().cast<ShapedType>();
+        type = mlir::cast<ShapedType>(dyn_cast<QConstOp>(inst).getType());
         ratio_threshold = kBlockOverRandomSparsityRatioQuant;
       } else {
         continue;
@@ -341,7 +342,7 @@ void DenseToSparsePass::runOnOperation() {
       SparsityParameterAttr s_param;
       if (auto cst = dyn_cast<ConstOp>(inst)) {
         auto attr = cst.getValue();
-        auto type = cst.getType().cast<ShapedType>();
+        auto type = mlir::cast<ShapedType>(cst.getType());
         if (type.getElementType().isF32()) {
           std::vector<float> dense_data;
           dense_data.reserve(type.getNumElements());
@@ -385,7 +386,7 @@ void DenseToSparsePass::runOnOperation() {
         }
       } else if (auto cst = dyn_cast<QConstOp>(inst)) {
         auto attr = cst.getValue();
-        auto type = cst.getType().cast<ShapedType>();
+        auto type = mlir::cast<ShapedType>(cst.getType());
         std::vector<int8_t> dense_data;
         dense_data.reserve(type.getNumElements());
         for (const auto& val : attr.getValues<int8_t>())
diff --git a/tensorflow/compiler/mlir/lite/transforms/dilated_conv.h b/tensorflow/compiler/mlir/lite/transforms/dilated_conv.h
index 51068fcf4ac67c..fe8bb7d2ca177f 100644
--- a/tensorflow/compiler/mlir/lite/transforms/dilated_conv.h
+++ b/tensorflow/compiler/mlir/lite/transforms/dilated_conv.h
@@ -29,6 +29,7 @@ limitations under the License.
 #include "mlir/IR/PatternMatch.h"  // from @llvm-project
 #include "mlir/IR/TypeUtilities.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/lite/utils/validators.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
@@ -110,7 +111,7 @@ LogicalResult ConvertTFDilatedConvOp<Conv2dOpTy>::matchAndRewrite(
   }
 
   // Allow dynamic width and height dimensions only.
-  auto result_ty = op.getResult().getType().template cast<TensorType>();
+  auto result_ty = mlir::cast<TensorType>(op.getResult().getType());
   if (!result_ty.hasRank() || result_ty.getRank() != 4 ||
       result_ty.isDynamicDim(0) || result_ty.isDynamicDim(3)) {
     return rewriter.notifyMatchFailure(
@@ -187,8 +188,7 @@ LogicalResult ConvertTFDilatedConvOp<Conv2dOpTy>::matchAndRewrite(
     // Make sure that the axis in `expand_op` is constant.
     if (auto const_op =
             llvm::dyn_cast<TF::ConstOp>(expand_op.getDim().getDefiningOp())) {
-      expand_axis = (*const_op.getValue()
-                          .cast<DenseElementsAttr>()
+      expand_axis = (*mlir::cast<DenseElementsAttr>(const_op.getValue())
                           .getValues<APInt>()
                           .begin())
                         .getSExtValue();
@@ -208,7 +208,7 @@ LogicalResult ConvertTFDilatedConvOp<Conv2dOpTy>::matchAndRewrite(
       return rewriter.notifyMatchFailure(
           squeeze_op, "squeeze dims should have exactly 1 dimension specified");
     }
-    int64_t squeeze_axis = squeeze_dims[0].cast<IntegerAttr>().getInt();
+    int64_t squeeze_axis = mlir::cast<IntegerAttr>(squeeze_dims[0]).getInt();
     if (squeeze_axis < 0) {
       // Always squeeze 4D input to 3D input.
       squeeze_axis += 4;
@@ -318,7 +318,8 @@ LogicalResult ConvertTFDilatedConvOp<Conv2dOpTy>::matchAndRewrite(
   }
 
   if (expand_op) {
-    if (stb_op.getInput().getType().dyn_cast<RankedTensorType>() == nullptr) {
+    if (mlir::dyn_cast<RankedTensorType>(stb_op.getInput().getType()) ==
+        nullptr) {
       return rewriter.notifyMatchFailure(
           stb_op, "SpaceToBatchND op's input should have RankedTensorType");
     }
@@ -401,7 +402,7 @@ LogicalResult ConvertTFDilatedConvOp<Conv2dOpTy>::matchAndRewrite(
     expand_op.setOperand(0, stb_op.getInput());
     // Calculate the shape for expand.
     auto input_shape =
-        stb_op.getInput().getType().cast<ShapedType>().getShape();
+        mlir::cast<ShapedType>(stb_op.getInput().getType()).getShape();
     SmallVector<int64_t, 4> expand_shape(input_shape.begin(),
                                          input_shape.end());
     expand_shape.insert(expand_shape.begin() + expand_axis, 1);
@@ -412,7 +413,7 @@ LogicalResult ConvertTFDilatedConvOp<Conv2dOpTy>::matchAndRewrite(
 
     // Update the conv op's output shape.
     auto bts_output_shape =
-        bts_op.getOutput().getType().cast<ShapedType>().getShape();
+        mlir::cast<ShapedType>(bts_op.getOutput().getType()).getShape();
     SmallVector<int64_t, 4> conv_result_shape(bts_output_shape.begin(),
                                               bts_output_shape.end());
     conv_result_shape.insert(conv_result_shape.begin() + expand_axis, 1);
diff --git a/tensorflow/compiler/mlir/lite/transforms/legalize_hashtables.cc b/tensorflow/compiler/mlir/lite/transforms/legalize_hashtables.cc
index 252e18e191aea4..5e88048d775532 100644
--- a/tensorflow/compiler/mlir/lite/transforms/legalize_hashtables.cc
+++ b/tensorflow/compiler/mlir/lite/transforms/legalize_hashtables.cc
@@ -26,6 +26,7 @@ limitations under the License.
 #include "mlir/IR/Operation.h"  // from @llvm-project
 #include "mlir/IR/PatternMatch.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/lite/ir/tfl_ops.h"
 #include "tensorflow/compiler/mlir/lite/transforms/passes.h"
@@ -142,10 +143,12 @@ bool checkWhetherGraphHasValidStaticLookupTables(ModuleOp module) {
 
     // Only allow string -> int64 and int64 -> string mappings due to kernel
     // capability.
-    if (!((key_dtype.isa<TF::StringType>() && value_dtype.isa<IntegerType>() &&
-           value_dtype.cast<IntegerType>().getWidth() == 64) ||
-          (value_dtype.isa<TF::StringType>() && key_dtype.isa<IntegerType>() &&
-           key_dtype.cast<IntegerType>().getWidth() == 64))) {
+    if (!((mlir::isa<TF::StringType>(key_dtype) &&
+           mlir::isa<IntegerType>(value_dtype) &&
+           mlir::cast<IntegerType>(value_dtype).getWidth() == 64) ||
+          (mlir::isa<TF::StringType>(value_dtype) &&
+           mlir::isa<IntegerType>(key_dtype) &&
+           mlir::cast<IntegerType>(key_dtype).getWidth() == 64))) {
       return false;
     }
 
diff --git a/tensorflow/compiler/mlir/lite/transforms/legalize_jax_random.cc b/tensorflow/compiler/mlir/lite/transforms/legalize_jax_random.cc
index e8bae6eb64280f..9b0a80a4f92a71 100644
--- a/tensorflow/compiler/mlir/lite/transforms/legalize_jax_random.cc
+++ b/tensorflow/compiler/mlir/lite/transforms/legalize_jax_random.cc
@@ -84,10 +84,10 @@ void LegalizeJaxRandomPass::runOnOperation() {
   auto func = getOperation();
   if (!IsJaxRandomUniform(func) && !IsJaxRandomNormal(func)) return;
   auto result_tuple_ty =
-      func.getFunctionType().getResult(0).dyn_cast_or_null<TupleType>();
+      mlir::dyn_cast_or_null<TupleType>(func.getFunctionType().getResult(0));
   if (!result_tuple_ty) return;
   if (result_tuple_ty.size() != 1) return;
-  auto result_ty = result_tuple_ty.getType(0).dyn_cast<ShapedType>();
+  auto result_ty = mlir::dyn_cast<ShapedType>(result_tuple_ty.getType(0));
 
   func.eraseBody();
   func.addEntryBlock();
diff --git a/tensorflow/compiler/mlir/lite/transforms/legalize_tf.cc b/tensorflow/compiler/mlir/lite/transforms/legalize_tf.cc
index 38a8bffd87bb03..b18227bdddc1ee 100644
--- a/tensorflow/compiler/mlir/lite/transforms/legalize_tf.cc
+++ b/tensorflow/compiler/mlir/lite/transforms/legalize_tf.cc
@@ -96,7 +96,7 @@ class LegalizeTFPass : public impl::LegalizeTFPassBase<LegalizeTFPass> {
 // Util that casts 'val' to Int32 by adding a cast Op.
 Value CreateCastToInt32(Value val, Location loc, PatternRewriter& rewriter) {
   IntegerType new_ele_type = rewriter.getIntegerType(32);
-  if (auto shaped_type = val.getType().dyn_cast<RankedTensorType>()) {
+  if (auto shaped_type = mlir::dyn_cast<RankedTensorType>(val.getType())) {
     ShapedType new_type =
         RankedTensorType::get(shaped_type.getShape(), new_ele_type);
     return rewriter.createOrFold<TF::CastOp>(loc, new_type, val,
@@ -114,7 +114,7 @@ Value CreateCastToInt32(Value val, Location loc, PatternRewriter& rewriter) {
 // 2. In the default case, cast the `Value` to an int32_t.
 Value CreateInt32ConstOrCast(Value val, Location loc,
                              PatternRewriter& rewriter) {
-  if (val.getType().cast<ShapedType>().hasStaticShape()) {
+  if (mlir::cast<ShapedType>(val.getType()).hasStaticShape()) {
     DenseElementsAttr shape_value_attr;
     if (matchPattern(val, m_Constant(&shape_value_attr))) {
       SmallVector<int32_t, 4> new_shape_array_i32;
@@ -137,7 +137,7 @@ Value CreateInt32ConstOrCast(Value val, Location loc,
 
 // Get shape of an operand or result, support both dynamic and static shape.
 Value GetShape(Value input, Location loc, PatternRewriter& rewriter) {
-  auto shaped_type = input.getType().cast<ShapedType>();
+  auto shaped_type = mlir::cast<ShapedType>(input.getType());
   if (shaped_type.hasStaticShape()) {
     auto static_shape = shaped_type.getShape();
     auto static_shape_type =
@@ -271,7 +271,7 @@ bool ConvertTFBatchMatMulOp2TFLFullyConnectedOp(Operation* bmm_op,
 
   // Create a tfl.transpose op that performs ZX transpose on `input`.
   auto create_z_x_transpose_op = [&](Value input) -> Value {
-    RankedTensorType input_type = input.getType().cast<RankedTensorType>();
+    RankedTensorType input_type = mlir::cast<RankedTensorType>(input.getType());
     const int input_rank = input_type.getRank();
 
     // Create a 1D I32 tensor for representing the dimension permutation.
@@ -364,7 +364,7 @@ LogicalResult ConvertTFMatMulOp::matchAndRewrite(
   auto rhs = op->getOperand(1);
   auto transpose = [&](Value input) -> std::pair<LogicalResult, Value> {
     RankedTensorType type =
-        input.getType().dyn_cast_or_null<RankedTensorType>();
+        mlir::dyn_cast_or_null<RankedTensorType>(input.getType());
     if (!type || type.getRank() != 2) return {failure(), nullptr};
 
     auto permute_attr = DenseIntElementsAttr::get(
@@ -583,15 +583,15 @@ bool ConvertTFMatrixDiagV2orV3(Operation* op, PatternRewriter* rewriter) {
   // Verify padding_value is a tensor with all 0s.
   mlir::Value padding_value = tf_matrix_diag_v2_or_v3_op.getPaddingValue();
   mlir::Type element_type =
-      padding_value.getType().cast<ShapedType>().getElementType();
-  if (element_type.isa<FloatType>()) {
+      mlir::cast<ShapedType>(padding_value.getType()).getElementType();
+  if (mlir::isa<FloatType>(element_type)) {
     DenseFPElementsAttr padding_attr;
     if (!matchPattern(padding_value, m_Constant(&padding_attr)) ||
         !padding_attr.isSplat() ||
         !padding_attr.getSplatValue<APFloat>().isZero()) {
       return false;
     }
-  } else if (element_type.isa<IntegerType>()) {
+  } else if (mlir::isa<IntegerType>(element_type)) {
     DenseIntElementsAttr padding_attr;
     if (!matchPattern(padding_value, m_Constant(&padding_attr)) ||
         !padding_attr.isSplat() ||
@@ -642,7 +642,7 @@ struct LegalizeUnidirectionalSequenceLstm : public RewritePattern {
 
     SmallVector<int64_t, 20> tflite_indices;
     for (auto index_attr : tflite_indices_attr.getValue()) {
-      IntegerAttr index = index_attr.cast<IntegerAttr>();
+      IntegerAttr index = mlir::cast<IntegerAttr>(index_attr);
       tflite_indices.push_back(index.getInt());
     }
 
@@ -773,13 +773,13 @@ class ApplyExplicitBroadcasting : public OpRewritePattern<SourceOp> {
     SmallVector<int64_t, 4> symbolic_broadcast_shape;
     // Matches fail when lhs or rhs is unranked tensor.
     // TODO(b/176202543): Support unranked tensor.
-    if (!lhs.getType().cast<ShapedType>().hasRank() ||
-        !rhs.getType().cast<ShapedType>().hasRank()) {
+    if (!mlir::cast<ShapedType>(lhs.getType()).hasRank() ||
+        !mlir::cast<ShapedType>(rhs.getType()).hasRank()) {
       return failure();
     }
     if (!OpTrait::util::getBroadcastedShape(
-            lhs.getType().cast<ShapedType>().getShape(),
-            rhs.getType().cast<ShapedType>().getShape(),
+            mlir::cast<ShapedType>(lhs.getType()).getShape(),
+            mlir::cast<ShapedType>(rhs.getType()).getShape(),
             symbolic_broadcast_shape)) {
       return failure();
     }
@@ -824,13 +824,13 @@ class ApplyExplicitBroadcasting : public OpRewritePattern<SourceOp> {
     auto lhs = op->getOperand(0);
     auto rhs = op->getOperand(1);
 
-    if (!lhs.getType().cast<ShapedType>().hasStaticShape() ||
-        !rhs.getType().cast<ShapedType>().hasStaticShape()) {
+    if (!mlir::cast<ShapedType>(lhs.getType()).hasStaticShape() ||
+        !mlir::cast<ShapedType>(rhs.getType()).hasStaticShape()) {
       return rewriteOpWithDynamicInput(op, rewriter);
     }
 
-    auto lhs_shape = lhs.getType().cast<ShapedType>().getShape();
-    auto rhs_shape = rhs.getType().cast<ShapedType>().getShape();
+    auto lhs_shape = mlir::cast<ShapedType>(lhs.getType()).getShape();
+    auto rhs_shape = mlir::cast<ShapedType>(rhs.getType()).getShape();
 
     if (lhs_shape == rhs_shape) {
       return failure();
@@ -892,23 +892,23 @@ class ApplyExplicitBroadcasting<TF::SelectV2Op>
 
     // Matches fail when lhs|rhs|cond is unranked tensor.
     // TODO(b/176202543): Support unranked tensor.
-    if (!lhs.getType().cast<ShapedType>().hasRank() ||
-        !rhs.getType().cast<ShapedType>().hasRank() ||
-        !cond.getType().cast<ShapedType>().hasRank()) {
+    if (!mlir::cast<ShapedType>(lhs.getType()).hasRank() ||
+        !mlir::cast<ShapedType>(rhs.getType()).hasRank() ||
+        !mlir::cast<ShapedType>(cond.getType()).hasRank()) {
       return failure();
     }
 
     // Calculates symbolic broadcast shape that is only used in types.
     SmallVector<int64_t, 4> symbolic_broadcast_lhs_rhs_shape;
     if (!OpTrait::util::getBroadcastedShape(
-            lhs.getType().cast<ShapedType>().getShape(),
-            rhs.getType().cast<ShapedType>().getShape(),
+            mlir::cast<ShapedType>(lhs.getType()).getShape(),
+            mlir::cast<ShapedType>(rhs.getType()).getShape(),
             symbolic_broadcast_lhs_rhs_shape)) {
       return failure();
     }
     SmallVector<int64_t, 4> symbolic_broadcast_shape;
     if (!OpTrait::util::getBroadcastedShape(
-            cond.getType().cast<ShapedType>().getShape(),
+            mlir::cast<ShapedType>(cond.getType()).getShape(),
             symbolic_broadcast_lhs_rhs_shape, symbolic_broadcast_shape)) {
       return failure();
     }
@@ -964,15 +964,15 @@ class ApplyExplicitBroadcasting<TF::SelectV2Op>
     auto rhs = op->getOperand(2);
 
     // Should have static shapes to calculate the broadcasted shape.
-    if (!lhs.getType().cast<ShapedType>().hasStaticShape() ||
-        !rhs.getType().cast<ShapedType>().hasStaticShape() ||
-        !cond.getType().cast<ShapedType>().hasStaticShape()) {
+    if (!mlir::cast<ShapedType>(lhs.getType()).hasStaticShape() ||
+        !mlir::cast<ShapedType>(rhs.getType()).hasStaticShape() ||
+        !mlir::cast<ShapedType>(cond.getType()).hasStaticShape()) {
       return rewriteOpWithDynamicInput(op, rewriter);
     }
 
-    auto lhs_shape = lhs.getType().cast<ShapedType>().getShape();
-    auto rhs_shape = rhs.getType().cast<ShapedType>().getShape();
-    auto cond_shape = cond.getType().cast<ShapedType>().getShape();
+    auto lhs_shape = mlir::cast<ShapedType>(lhs.getType()).getShape();
+    auto rhs_shape = mlir::cast<ShapedType>(rhs.getType()).getShape();
+    auto cond_shape = mlir::cast<ShapedType>(cond.getType()).getShape();
 
     if (lhs_shape == rhs_shape && cond_shape == lhs_shape) {
       return failure();
diff --git a/tensorflow/compiler/mlir/lite/transforms/legalize_variables.cc b/tensorflow/compiler/mlir/lite/transforms/legalize_variables.cc
index 7098b2f75157da..7742ea06976c00 100644
--- a/tensorflow/compiler/mlir/lite/transforms/legalize_variables.cc
+++ b/tensorflow/compiler/mlir/lite/transforms/legalize_variables.cc
@@ -26,6 +26,7 @@ limitations under the License.
 #include "mlir/IR/Operation.h"  // from @llvm-project
 #include "mlir/IR/PatternMatch.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Transforms/DialectConversion.h"  // from @llvm-project
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/lite/ir/tfl_ops.h"
@@ -67,7 +68,7 @@ class LegalizeVariablesPass
     // If TFLite variable legalization is not allowed, then we skip this pass.
     if (auto legalize_tfl_variables_attr =
             module->getAttr(kLegalizeTflVariables)) {
-      if (!legalize_tfl_variables_attr.cast<BoolAttr>().getValue()) return;
+      if (!mlir::cast<BoolAttr>(legalize_tfl_variables_attr).getValue()) return;
     }
 
     RewritePatternSet patterns(&getContext());
diff --git a/tensorflow/compiler/mlir/lite/transforms/lift_tflite_flex_ops.cc b/tensorflow/compiler/mlir/lite/transforms/lift_tflite_flex_ops.cc
index e212ce16ee6ccd..747e96d40b6850 100644
--- a/tensorflow/compiler/mlir/lite/transforms/lift_tflite_flex_ops.cc
+++ b/tensorflow/compiler/mlir/lite/transforms/lift_tflite_flex_ops.cc
@@ -117,7 +117,7 @@ class LiftFlexCustomOp : public OpRewritePattern<TFL::CustomOp> {
     // TODO(b/146131919): correct handling of resource type
     if (auto tensor_array_v3_op = dyn_cast<TF::TensorArrayV3Op>(tf_op)) {
       Value handle = tensor_array_v3_op.getHandle();
-      auto handle_type = handle.getType().cast<TensorType>();
+      auto handle_type = mlir::cast<TensorType>(handle.getType());
       if (handle_type.getElementType().isInteger(/*width=*/32)) {
         Type resource_tensor_type =
             handle_type.clone(TF::ResourceType::get(rewriter.getContext()));
@@ -225,8 +225,8 @@ class LiftFlexCustomOp : public OpRewritePattern<TFL::CustomOp> {
         return emitError(loc, mlir_attr.status().message());
       }
       if (absl::StrContains(op_name, "Dataset") &&
-          mlir_attr->isa<TF::FuncAttr>()) {
-        mlir_attr = mlir_attr->cast<TF::FuncAttr>().getName();
+          mlir::isa<TF::FuncAttr>(*mlir_attr)) {
+        mlir_attr = mlir::cast<TF::FuncAttr>(*mlir_attr).getName();
       }
       attributes.push_back(builder.getNamedAttr(attr_name, *mlir_attr));
     }
diff --git a/tensorflow/compiler/mlir/lite/transforms/modify_io_nodes.cc b/tensorflow/compiler/mlir/lite/transforms/modify_io_nodes.cc
index a8adac41229277..7fea1e395ea209 100644
--- a/tensorflow/compiler/mlir/lite/transforms/modify_io_nodes.cc
+++ b/tensorflow/compiler/mlir/lite/transforms/modify_io_nodes.cc
@@ -94,7 +94,7 @@ LogicalResult ModifyIONodesPass::SetupInputOutputTypesIfNull(
 LogicalResult ModifyIONodesPass::ModifyInputNodes(
     func::FuncOp func, llvm::SmallVectorImpl<Type>& new_input_types,
     OpBuilder builder) {
-  if (input_type.isa<FloatType>()) {
+  if (mlir::isa<FloatType>(input_type)) {
     return success();
   }
 
@@ -151,7 +151,7 @@ LogicalResult ModifyIONodesPass::ModifyOutputNodes(
   auto* terminator = block.getTerminator();
   builder.setInsertionPoint(terminator);
 
-  if (output_type.isa<FloatType>()) {
+  if (mlir::isa<FloatType>(output_type)) {
     return success();
   }
 
diff --git a/tensorflow/compiler/mlir/lite/transforms/optimize.cc b/tensorflow/compiler/mlir/lite/transforms/optimize.cc
index 1fc84007a64cce..0ecb04f82b5952 100644
--- a/tensorflow/compiler/mlir/lite/transforms/optimize.cc
+++ b/tensorflow/compiler/mlir/lite/transforms/optimize.cc
@@ -81,7 +81,7 @@ constexpr char kRelu6[] = "RELU6";
 constexpr char kRelu1[] = "RELU_N1_TO_1";
 
 ElementsAttr FlattenTo1D(Attribute a) {
-  auto elements = a.cast<DenseElementsAttr>();
+  auto elements = mlir::cast<DenseElementsAttr>(a);
   const std::array<int64_t, 1> flattened_shape = {elements.getNumElements()};
   auto new_type = RankedTensorType::get(flattened_shape,
                                         elements.getType().getElementType());
@@ -91,8 +91,8 @@ ElementsAttr FlattenTo1D(Attribute a) {
 // This assumes that the bias is of shape NxCx1x1 and doesn't require transpose
 // Its corresponding constraint is optimize_patterns.td:IsBiasShape()
 ElementsAttr ReshapeNCHWBiasToNHWC(Value v, Attribute a) {
-  auto elements = a.cast<DenseElementsAttr>();
-  auto shape = v.getType().cast<ShapedType>().getShape();
+  auto elements = mlir::cast<DenseElementsAttr>(a);
+  auto shape = mlir::cast<ShapedType>(v.getType()).getShape();
   if (shape.size() != 4 || shape[2] != 1 || shape[3] != 1) return elements;
   const std::array<int64_t, 4> new_shape = {shape[0], shape[2], shape[3],
                                             shape[1]};
@@ -105,15 +105,16 @@ bool L2NormalizeReduceAxis(Value sq_op, DenseElementsAttr axis) {
   if (axis.getNumElements() == 0) {
     return false;
   }
-  if (sq_op.getType().cast<ShapedType>().getRank() - 1 ==
+  if (mlir::cast<ShapedType>(sq_op.getType()).getRank() - 1 ==
           *axis.getValues<int>().begin() ||
       *axis.getValues<int>().begin() == -1) {
     return true;
   }
-  if (sq_op.getType().cast<ShapedType>().getRank() != axis.getNumElements()) {
+  if (mlir::cast<ShapedType>(sq_op.getType()).getRank() !=
+      axis.getNumElements()) {
     return false;
   }
-  auto shape = sq_op.getType().cast<ShapedType>();
+  auto shape = mlir::cast<ShapedType>(sq_op.getType());
   SmallVector<int, 4> elems{axis.getValues<int>().begin(),
                             axis.getValues<int>().end()};
   for (int i = 0; i < shape.getRank(); ++i) {
@@ -144,9 +145,10 @@ class OptimizePass : public impl::OptimizePassBase<OptimizePass> {
 // is equal to the non-contracting dimension after a reshape
 bool BroadcastDimsProductEqual(Value input, Value output,
                                size_t agg_start_idx) {
-  ArrayRef<int64_t> input_shape = input.getType().cast<ShapedType>().getShape();
+  ArrayRef<int64_t> input_shape =
+      mlir::cast<ShapedType>(input.getType()).getShape();
   ArrayRef<int64_t> output_shape =
-      output.getType().cast<ShapedType>().getShape();
+      mlir::cast<ShapedType>(output.getType()).getShape();
 
   int64_t agg_value = 1;
   for (size_t i = agg_start_idx; i < input_shape.size() - 1; ++i) {
@@ -166,7 +168,7 @@ bool IsBroadcastableElementsAttrAndType(Type a, Type b) {
 // broadcast-compatible with `b`.
 bool OperandsBroadcastToOutputType(Type a, Type b, Type expected_output) {
   Type output_element_type =
-      expected_output.cast<ShapedType>().getElementType();
+      mlir::cast<ShapedType>(expected_output).getElementType();
   Type broadcasted_type =
       OpTrait::util::getBroadcastedType(a, b, output_element_type);
   return broadcasted_type != Type() && broadcasted_type == expected_output;
@@ -175,8 +177,8 @@ bool OperandsBroadcastToOutputType(Type a, Type b, Type expected_output) {
 // Returns whether if `type1` dimensions are the same as the ending dimensions
 // of `type2`. This is more restricted than broadcastable.
 bool IsTailOfShape(Type type1, Type type2) {
-  auto tail_type = type1.dyn_cast<ShapedType>();
-  auto full_type = type2.dyn_cast<ShapedType>();
+  auto tail_type = mlir::dyn_cast<ShapedType>(type1);
+  auto full_type = mlir::dyn_cast<ShapedType>(type2);
   if (!tail_type || !full_type || !tail_type.hasRank() ||
       !full_type.hasRank() || tail_type.getRank() > full_type.getRank())
     return false;
@@ -189,8 +191,8 @@ bool IsTailOfShape(Type type1, Type type2) {
 // the reduced `type1` dimensions are the same as the ending dimensions
 // of `type2`.
 bool IsReducedTailOfShape(Type type1, Type type2) {
-  auto tail_type = type1.dyn_cast<ShapedType>();
-  auto full_type = type2.dyn_cast<ShapedType>();
+  auto tail_type = mlir::dyn_cast<ShapedType>(type1);
+  auto full_type = mlir::dyn_cast<ShapedType>(type2);
   if (!tail_type || !full_type || !tail_type.hasRank() || !full_type.hasRank())
     return false;
 
@@ -211,10 +213,10 @@ bool IsReducedTailOfShape(Type type1, Type type2) {
 // elements in type2. This is a required condition to flatten type2 to form a
 // 1D array and allow the binaryOp handle the broadcasting implicitly.
 bool IsLastDimEqualToNumElements(Type type1, Type type2) {
-  return (type1.cast<ShapedType>().getRank() >= 1 &&
-          type1.cast<ShapedType>().getDimSize(
-              type1.cast<ShapedType>().getRank() - 1) ==
-              type2.cast<ShapedType>().getNumElements());
+  return (mlir::cast<ShapedType>(type1).getRank() >= 1 &&
+          mlir::cast<ShapedType>(type1).getDimSize(
+              mlir::cast<ShapedType>(type1).getRank() - 1) ==
+              mlir::cast<ShapedType>(type2).getNumElements());
 }
 
 bool CanFuseConvOrDepthwiseConvShapes(const ArrayRef<int64_t> filter_shape,
@@ -249,20 +251,21 @@ bool CanFuseConvOrDepthwiseConvShapes(const ArrayRef<int64_t> filter_shape,
 
 bool CanFuseConvOrDepthwiseConv(Value filter, Attribute val,
                                 bool is_depthwise) {
-  const auto elements = val.dyn_cast<DenseElementsAttr>();
+  const auto elements = mlir::dyn_cast<DenseElementsAttr>(val);
   if (!elements) {
     return false;
   }
   const auto elements_shape = elements.getType().getShape();
-  const auto filter_shape = filter.getType().cast<ShapedType>().getShape();
+  const auto filter_shape = mlir::cast<ShapedType>(filter.getType()).getShape();
   return CanFuseConvOrDepthwiseConvShapes(filter_shape, elements_shape,
                                           is_depthwise);
 }
 
 bool CanFuseConvOrDepthwiseConv(Attribute filter, Attribute val,
                                 bool is_depthwise) {
-  if (const auto elements = val.dyn_cast<DenseElementsAttr>()) {
-    if (const auto filter_elements = filter.dyn_cast<DenseElementsAttr>()) {
+  if (const auto elements = mlir::dyn_cast<DenseElementsAttr>(val)) {
+    if (const auto filter_elements =
+            mlir::dyn_cast<DenseElementsAttr>(filter)) {
       return CanFuseConvOrDepthwiseConvShapes(
           filter_elements.getType().getShape(), elements.getType().getShape(),
           is_depthwise);
@@ -277,8 +280,8 @@ bool CanFuseConvOrDepthwiseConv(Attribute filter, Attribute val,
 bool CanOptimizeIdentityGatherNdOrScatterNdOp(Value params,
                                               DenseIntElementsAttr indices,
                                               Type output_type) {
-  auto params_type = params.getType().dyn_cast<RankedTensorType>();
-  auto indices_type = indices.getType().dyn_cast<RankedTensorType>();
+  auto params_type = mlir::dyn_cast<RankedTensorType>(params.getType());
+  auto indices_type = mlir::dyn_cast<RankedTensorType>(indices.getType());
   // Checks the shape of `params` is [n, ...], shape of `indices` is [n, 1]. 2D
   // `indices` means it gets the first row of `params`. As long as indices
   // iterate the first row of `params`, the output is identical to input.
@@ -306,8 +309,8 @@ bool CanOptimizeIdentityGatherNdOrScatterNdOp(Value params,
 // for each dim i, the output tensor is identical to `input`.
 bool CanOptimizeIdentitySliceOp(Value input, Attribute begin, Attribute size) {
   // Checks if `begin` and `size` are i32 or i64.
-  auto begin_attr = begin.dyn_cast<DenseIntElementsAttr>();
-  auto size_attr = size.dyn_cast<DenseIntElementsAttr>();
+  auto begin_attr = mlir::dyn_cast<DenseIntElementsAttr>(begin);
+  auto size_attr = mlir::dyn_cast<DenseIntElementsAttr>(size);
   if (!begin_attr || !size_attr) {
     return false;
   }
@@ -323,7 +326,7 @@ bool CanOptimizeIdentitySliceOp(Value input, Attribute begin, Attribute size) {
 
   // Checks if `input` is ranked and its rank is equal to number of elements in
   // `begin` and `size`.
-  auto input_ty = input.getType().cast<ShapedType>();
+  auto input_ty = mlir::cast<ShapedType>(input.getType());
   if (!input_ty.hasRank()) {
     return false;
   }
@@ -348,7 +351,7 @@ bool CanOptimizeIdentitySliceOp(Value input, Attribute begin, Attribute size) {
 // Expand Attribute 'a' to 4D with all 1s except 1 dimension.
 // Which dimension depends on 'is_depthwise' is true or false.
 ElementsAttr ExpandTo4DForConvImpl(Attribute a, bool is_depthwise) {
-  auto elements = a.dyn_cast<DenseElementsAttr>();
+  auto elements = mlir::dyn_cast<DenseElementsAttr>(a);
   auto shape = elements.getType().getShape();
   if (!shape.empty()) {
     // Checks that elements are essentially 1d.
@@ -410,13 +413,14 @@ DenseElementsAttr RemapPermutation(Value permutation1, Value permutation2) {
 static bool ShapeMatchesReduceWithKeepAxes(Value input,
                                            const mlir::Attribute &axes,
                                            const mlir::Attribute &shape) {
-  RankedTensorType type = input.getType().dyn_cast_or_null<RankedTensorType>();
+  RankedTensorType type =
+      mlir::dyn_cast_or_null<RankedTensorType>(input.getType());
   if (!type) return false;
 
   DenseIntElementsAttr axes_attr =
-      axes.dyn_cast_or_null<DenseIntElementsAttr>();
+      mlir::dyn_cast_or_null<DenseIntElementsAttr>(axes);
   DenseIntElementsAttr shape_attr =
-      shape.dyn_cast_or_null<DenseIntElementsAttr>();
+      mlir::dyn_cast_or_null<DenseIntElementsAttr>(shape);
   if (!axes_attr || !shape_attr) return false;
 
   if (shape_attr.getNumElements() != type.getRank()) return false;
@@ -441,12 +445,12 @@ static bool ShapeMatchesReduceWithKeepAxes(Value input,
 static bool AreInputDimensionsOneInAxes(Value input,
                                         const mlir::Attribute &axes) {
   RankedTensorType input_type =
-      input.getType().dyn_cast_or_null<RankedTensorType>();
+      mlir::dyn_cast_or_null<RankedTensorType>(input.getType());
   if (!input_type) return false;
   auto type_shape = input_type.getShape();
 
   DenseIntElementsAttr axes_attr =
-      axes.dyn_cast_or_null<DenseIntElementsAttr>();
+      mlir::dyn_cast_or_null<DenseIntElementsAttr>(axes);
   if (!axes_attr) return false;
 
   for (auto a : axes_attr.getValues<APInt>()) {
@@ -467,7 +471,7 @@ static bool AreInputDimensionsOneInAxes(Value input,
 }
 
 static bool FloatValueEquals(const Attribute &attr, double value) {
-  auto fp_attr = attr.dyn_cast_or_null<DenseFPElementsAttr>();
+  auto fp_attr = mlir::dyn_cast_or_null<DenseFPElementsAttr>(attr);
   if (!fp_attr) return false;
 
   if (fp_attr.isSplat()) {
@@ -482,12 +486,12 @@ static bool FloatValueEquals(const Attribute &attr, double value) {
 // to `raw_value`.
 template <typename T>
 bool IsConstantValueOf(mlir::TypedAttr value, T raw_value) {
-  auto element_type = value.getType().cast<ShapedType>().getElementType();
+  auto element_type = mlir::cast<ShapedType>(value.getType()).getElementType();
 
-  if (element_type.isa<FloatType>()) {
+  if (mlir::isa<FloatType>(element_type)) {
     return FloatValueEquals(value, raw_value);
-  } else if (element_type.isa<IntegerType>()) {
-    auto int_attr = value.dyn_cast_or_null<DenseIntElementsAttr>();
+  } else if (mlir::isa<IntegerType>(element_type)) {
+    auto int_attr = mlir::dyn_cast_or_null<DenseIntElementsAttr>(value);
     if (!int_attr) return false;
 
     if (int_attr.isSplat()) {
@@ -502,13 +506,13 @@ bool IsConstantValueOf(mlir::TypedAttr value, T raw_value) {
 
 // Returns true if the value's element type is F32.
 bool IsF32Value(Value value) {
-  return value.getType().cast<ShapedType>().getElementType().isF32();
+  return mlir::cast<ShapedType>(value.getType()).getElementType().isF32();
 }
 
 // Returns the number of elements in attr if it is a static shape, 1 otherwise,
 // as an unranked int32 Attribute.
 TypedAttr GetNumElementsOrOne(Type type) {
-  auto shaped_type = type.cast<ShapedType>();
+  auto shaped_type = mlir::cast<ShapedType>(type);
   int32_t num_elements =
       shaped_type.hasStaticShape() ? shaped_type.getNumElements() : 1;
 
@@ -523,7 +527,7 @@ TypedAttr GetNumElementsOrOne(Type type) {
 Value ReshapeValueDroppingLastDim(OpBuilder &builder, Value value) {
   // This function is always guarded with HasTrivialShapeExceptSecondLastDim(),
   // so we could cast safely here.
-  auto type = value.getType().cast<ShapedType>();
+  auto type = mlir::cast<ShapedType>(value.getType());
   SmallVector<int> new_shape;
   if (type.hasStaticShape()) {
     for (int64_t dim : type.getShape().drop_back()) {
@@ -543,7 +547,7 @@ Value ReshapeValueDroppingLastDim(OpBuilder &builder, Value value) {
 
 // Returns true if val has a static shape and the last dimension equals 1.
 bool IsLastDimensionEqualOne(Value val) {
-  const auto val_type = val.getType().cast<ShapedType>();
+  const auto val_type = mlir::cast<ShapedType>(val.getType());
   if (!val_type.hasStaticShape()) return false;
   const auto val_shape = val_type.getShape();
   if (val_shape.empty()) return false;
@@ -577,7 +581,7 @@ bool HasOneUseOrUsedByOnlyBinaryOps(Value out_value) {
 //
 // If such a value is used in an Equal operator, it can be replaced with OneHot.
 bool IsOneHotIndexAttribute(Attribute attr) {
-  const auto dense_attr = attr.dyn_cast_or_null<DenseIntElementsAttr>();
+  const auto dense_attr = mlir::dyn_cast_or_null<DenseIntElementsAttr>(attr);
   if (!dense_attr) {
     return false;
   }
@@ -602,7 +606,7 @@ bool IsOneHotIndexAttribute(Attribute attr) {
 }
 
 Value Get1DShapeValue(OpBuilder &builder, Value value) {
-  auto type = value.getType().cast<ShapedType>();
+  auto type = mlir::cast<ShapedType>(value.getType());
   if (!type.hasStaticShape()) {
     return nullptr;
   }
@@ -614,11 +618,11 @@ Value Get1DShapeValue(OpBuilder &builder, Value value) {
 }
 
 Type GetEmbeddingLookupShape(Value lookup, Value value) {
-  auto lookup_type = lookup.getType().cast<ShapedType>();
+  auto lookup_type = mlir::cast<ShapedType>(lookup.getType());
   if (!lookup_type.hasStaticShape()) {
     return nullptr;
   }
-  auto value_type = value.getType().cast<ShapedType>();
+  auto value_type = mlir::cast<ShapedType>(value.getType());
   if (!value_type.hasStaticShape() || value_type.getRank() != 2) {
     return nullptr;
   }
@@ -665,7 +669,7 @@ bool IsF32Splat(Attribute input_splat) {
 // Attribute holding a single value of float type. If attr has no elements, the
 // result is 0.0f.
 TypedAttr ConvertSingleElementAttrToFloatAttr(Attribute attr) {
-  const auto dense_fp_attr = attr.dyn_cast_or_null<DenseFPElementsAttr>();
+  const auto dense_fp_attr = mlir::dyn_cast_or_null<DenseFPElementsAttr>(attr);
   if (dense_fp_attr) {
     // Already float => return
     return dense_fp_attr;
@@ -673,7 +677,7 @@ TypedAttr ConvertSingleElementAttrToFloatAttr(Attribute attr) {
 
   OpBuilder builder(attr.getContext());
 
-  const auto dense_int_attr = attr.dyn_cast<DenseIntElementsAttr>();
+  const auto dense_int_attr = mlir::dyn_cast<DenseIntElementsAttr>(attr);
   const auto int_values = dense_int_attr.getValues<APInt>();
   float float_val = 0.0f;
   if (!int_values.empty()) {
@@ -793,9 +797,7 @@ struct SqueezeReshapesAroundBroadcastOp
 
     // Pattern is applied only if the broadcast_to shape has more than 5
     // dimensions.
-    if (tfl_broadcast_to_op.getShape()
-            .getType()
-            .cast<ShapedType>()
+    if (mlir::cast<ShapedType>(tfl_broadcast_to_op.getShape().getType())
             .getNumElements() < 6) {
       return rewriter.notifyMatchFailure(loc,
                                          "Not supported broadcast_to shape");
@@ -831,7 +833,7 @@ struct SqueezeReshapesAroundBroadcastOp
     // Calculate the number of extra leading and trailing 1s in the
     // broadcast_op output.
     auto broadcast_output_shapetype =
-        tfl_broadcast_to_op.getOutput().getType().cast<ShapedType>();
+        mlir::cast<ShapedType>(tfl_broadcast_to_op.getOutput().getType());
     int num_leading_broadcast_dims =
         GetNumLeadingOnes(broadcast_output_shapetype);
     int num_trailing_broadcast_dims =
@@ -839,9 +841,7 @@ struct SqueezeReshapesAroundBroadcastOp
 
     // Get the new shape for the inner reshape_op after removing the extra 1s.
     llvm::SmallVector<int32_t, 6> new_reshape_shape_i32{
-        inner_reshape_op.getOutput()
-            .getType()
-            .cast<RankedTensorType>()
+        mlir::cast<RankedTensorType>(inner_reshape_op.getOutput().getType())
             .getShape()
             .drop_back(num_trailing_broadcast_dims)
             .drop_front(num_leading_broadcast_dims)};
@@ -886,11 +886,11 @@ struct ConvertTFLBroadcastToMulOp
   LogicalResult matchAndRewrite(TFL::BroadcastToOp tfl_broadcast_to_op,
                                 PatternRewriter &rewriter) const override {
     auto input_type =
-        tfl_broadcast_to_op.getInput().getType().cast<ShapedType>();
+        mlir::cast<ShapedType>(tfl_broadcast_to_op.getInput().getType());
     auto output_type =
-        tfl_broadcast_to_op.getOutput().getType().cast<ShapedType>();
+        mlir::cast<ShapedType>(tfl_broadcast_to_op.getOutput().getType());
     auto shape_type =
-        tfl_broadcast_to_op.getShape().getType().cast<ShapedType>();
+        mlir::cast<ShapedType>(tfl_broadcast_to_op.getShape().getType());
     Type element_type = input_type.getElementType();
 
     auto loc = tfl_broadcast_to_op->getLoc();
@@ -909,7 +909,7 @@ struct ConvertTFLBroadcastToMulOp
 
     // Allow lowering when the input's elements type is F32, BFloat16, I32 or
     // I16.
-    if (!(element_type.isa<BFloat16Type, Float32Type>() ||
+    if (!(mlir::isa<BFloat16Type, Float32Type>(element_type) ||
           element_type.isInteger(32) || element_type.isInteger(16)))
       return rewriter.notifyMatchFailure(loc, "element_type_not_supported");
 
@@ -986,7 +986,7 @@ struct FuseAddAndStridedSlice : public OpRewritePattern<TFL::StridedSliceOp> {
       return failure();
 
     mlir::TensorType constant_val_type =
-        constant_val.getType().cast<TensorType>();
+        mlir::cast<TensorType>(constant_val.getType());
     // If it's not 1D or 0D (which can be broadcasted to 1D), reject the
     // matching.
     if (constant_val_type.getRank() > 1) {
@@ -994,14 +994,14 @@ struct FuseAddAndStridedSlice : public OpRewritePattern<TFL::StridedSliceOp> {
     }
 
     mlir::RankedTensorType end_type =
-        strided_slice_op.getEnd().getType().dyn_cast<RankedTensorType>();
+        mlir::dyn_cast<RankedTensorType>(strided_slice_op.getEnd().getType());
     // begin, end and strides are Rank 1 tensors with one element per dimension
     // of input.
     int64_t num_dims = end_type.getShape()[0];
     DenseElementsAttr new_added_value =
         added_value.reshape(RankedTensorType::get(
             {num_dims},
-            added_value.getType().cast<ShapedType>().getElementType()));
+            mlir::cast<ShapedType>(added_value.getType()).getElementType()));
     ::mlir::arith::ConstantOp new_end = rewriter.create<arith::ConstantOp>(
         strided_slice_op.getEnd().getLoc(), new_added_value);
 
@@ -1183,7 +1183,7 @@ struct FuseFullyConnectedAndAdd : public OpRewritePattern<TFL::AddOp> {
         add_op.getLhs().getDefiningOp());
     if (!fc_op) return failure();
 
-    auto constant_val_type = constant_val.getType().cast<TensorType>();
+    auto constant_val_type = mlir::cast<TensorType>(constant_val.getType());
 
     // In TFLite FullyConnect definition, bias must be a 1D tensor where
     // the number of elements is equal to the number of channels.
@@ -1199,7 +1199,7 @@ struct FuseFullyConnectedAndAdd : public OpRewritePattern<TFL::AddOp> {
     Value filter = fc_op.getFilter();
     Value bias = fc_op.getBias();
     ElementsAttr bias_value;
-    const bool is_none_bias = bias.getType().isa<NoneType>();
+    const bool is_none_bias = mlir::isa<NoneType>(bias.getType());
     if (fc_op.getFusedActivationFunction() != "NONE") return failure();
 
     if (!is_none_bias && !matchPattern(bias, m_Constant(&bias_value)))
@@ -1212,7 +1212,7 @@ struct FuseFullyConnectedAndAdd : public OpRewritePattern<TFL::AddOp> {
         // to properly broadcast the scalar to `{num_channels}` shape.
 
         // Get the number of channels if possible.
-        auto filter_type = filter.getType().dyn_cast<RankedTensorType>();
+        auto filter_type = mlir::dyn_cast<RankedTensorType>(filter.getType());
         // Filter must be a `2D` tensor with `{num_channels, num_features}`
         // shape. The following check is rejecting unknown rank (-1).
         if (filter_type == nullptr || filter_type.getRank() != 2) {
@@ -1287,14 +1287,14 @@ struct FuseAddAndFullyConnected
 
     // Don't match adds where the added constant is not 1D.
     {
-      auto addend_shape = add_op.getRhs().getType().cast<ShapedType>();
+      auto addend_shape = mlir::cast<ShapedType>(add_op.getRhs().getType());
       if (!addend_shape.hasStaticShape()) return failure();
       if (addend_shape.getShape().size() != 1) return failure();
     }
 
     // Calculate new bias.  Generate a new FC; it will be constant folded.
     auto old_bias = fc_op.getBias();
-    if (!old_bias || old_bias.getType().isa<NoneType>()) {
+    if (!old_bias || mlir::isa<NoneType>(old_bias.getType())) {
       // TODO(b/180752069): Figure out new bias' type when old bias is empty.
       return failure();
     }
@@ -1358,7 +1358,7 @@ struct FuseMulAndFullyConnected
 
     // Don't match muls where the multiplier constant is not 1D.
     {
-      auto multiplier_shape = mul_op.getRhs().getType().cast<ShapedType>();
+      auto multiplier_shape = mlir::cast<ShapedType>(mul_op.getRhs().getType());
       if (!multiplier_shape.hasStaticShape()) return failure();
       if (multiplier_shape.getShape().size() != 1) return failure();
     }
@@ -1464,7 +1464,7 @@ struct FuseFullyConnectedAndMul : public OpRewritePattern<TFL::MulOp> {
     Value bias = fc_op.getBias();
     ElementsAttr cst_tmp;
     if (!matchPattern(filter, m_Constant(&cst_tmp))) return failure();
-    if (!bias.getType().isa<NoneType>() &&
+    if (!mlir::isa<NoneType>(bias.getType()) &&
         !matchPattern(bias, m_Constant(&cst_tmp)))
       return failure();
     if (fc_op.getFusedActivationFunction() != "NONE") return failure();
@@ -1494,7 +1494,7 @@ struct FuseFullyConnectedAndMul : public OpRewritePattern<TFL::MulOp> {
     // Rewrite. Since the folder of TFL::MulOp couldn't broadcast the operands,
     // TF::MulOp is used to fold the constant.
     // TODO(b/139192933): switch to the TFL constant folding
-    auto filter_type = filter.getType().cast<ShapedType>();
+    auto filter_type = mlir::cast<ShapedType>(filter.getType());
     if (filter_type.hasStaticShape()) {
       auto size =
           filter_type.getNumElements() * filter_type.getElementTypeBitWidth();
@@ -1506,7 +1506,7 @@ struct FuseFullyConnectedAndMul : public OpRewritePattern<TFL::MulOp> {
         rewriter.create<TF::MulOp>(mul_op.getLoc(), filter, new_const_val)
             .getZ();
     // If bias isn't None, it needs to be multiplied as well.
-    if (!bias.getType().isa<NoneType>()) {
+    if (!mlir::isa<NoneType>(bias.getType())) {
       bias = rewriter.create<TF::MulOp>(mul_op.getLoc(), bias, constant_val)
                  .getZ();
     }
@@ -1585,7 +1585,7 @@ struct FuseAffinOpAndMulWithQDQs : public OpRewritePattern<TFL::MulOp> {
     // weight constant
     ElementsAttr cst_tmp;
     if (!matchPattern(filter, m_Constant(&cst_tmp))) return failure();
-    if (!bias.getType().isa<NoneType>() &&
+    if (!mlir::isa<NoneType>(bias.getType()) &&
         !matchPattern(bias, m_Constant(&cst_tmp)))
       return failure();
     if (fc_op.getFusedActivationFunction() != "NONE") return failure();
@@ -1607,7 +1607,7 @@ struct FuseAffinOpAndMulWithQDQs : public OpRewritePattern<TFL::MulOp> {
     }
 
     // Make sure that the fused bias will be a 1D tensor.
-    auto gamma_shape = gamma.getType().cast<ShapedType>();
+    auto gamma_shape = mlir::cast<ShapedType>(gamma.getType());
     if (!gamma_shape.hasRank() || gamma_shape.getRank() != 1) {
       return failure();
     }
@@ -1623,7 +1623,7 @@ struct FuseAffinOpAndMulWithQDQs : public OpRewritePattern<TFL::MulOp> {
                                                  new_filter, new_qtype);
 
     // If bias isn't None, it needs to be multiplied as well.
-    if (!bias.getType().isa<NoneType>()) {
+    if (!mlir::isa<NoneType>(bias.getType())) {
       rewriter.setInsertionPoint(fc_op);
       auto new_bias = rewriter.create<TF::MulOp>(loc, bias, gamma);
       fc_op.getOperation()->replaceUsesOfWith(bias, new_bias);
@@ -1674,7 +1674,7 @@ struct FuseBinaryOpToFollowingAffineOp : public OpRewritePattern<AffineOpType> {
       }
       filter = q.getInput();
     }
-    if (!bias.getType().isa<NoneType>() &&
+    if (!mlir::isa<NoneType>(bias.getType()) &&
         !matchPattern(bias, m_Constant(&bias_cst)))
       return failure();
     auto binary_op_activation_func =
@@ -1705,7 +1705,7 @@ struct FuseBinaryOpToFollowingAffineOp : public OpRewritePattern<AffineOpType> {
       // The new bias should be a 1-D tensor with length equals to the bias
       // dimension of the weight.
       SmallVector<APFloat, 4> new_bias_values;
-      if (bias.getType().isa<NoneType>()) {  // none bias, a list of zeros
+      if (mlir::isa<NoneType>(bias.getType())) {  // none bias, a list of zeros
         new_bias_values.resize(bias_size,
                                APFloat::getZero(cst_value.getSemantics()));
       } else if (bias_cst.getNumElements() == 1) {  // scalar bias, broadcast it
@@ -1806,12 +1806,11 @@ struct ScalarizeSplatConstantForBroadcastableOps
     }
 
     constexpr int kSplatOperandIndex = 1;
-    auto result_type =
-        binary_op.getResult().getType().template cast<ShapedType>();
+    auto result_type = mlir::cast<ShapedType>(binary_op.getResult().getType());
     mlir::Value non_splat_operand =
         binary_op.getOperand(1 - kSplatOperandIndex);
     auto non_splat_operand_type =
-        non_splat_operand.getType().cast<ShapedType>();
+        mlir::cast<ShapedType>(non_splat_operand.getType());
     // If the other operand's shape does not equal to the result shape, then we
     // cannot scalarize the splat constant because the result shape relies on
     // the splat constant op's shape for broadcasting.
@@ -1850,10 +1849,11 @@ struct ScalarizeSplatConstantForBroadcastableOps
     if (!matchPattern(value, m_Constant(elements_attr))) {
       return false;
     }
-    auto element_type = value.getType().cast<ShapedType>().getElementType();
+    auto element_type =
+        mlir::cast<ShapedType>(value.getType()).getElementType();
     // Ignore per-axis quantized constants because after converting to scalar,
     // we will lose per-axis qantization parameter.
-    if (element_type.isa<quant::UniformQuantizedPerAxisType>()) {
+    if (mlir::isa<quant::UniformQuantizedPerAxisType>(element_type)) {
       return false;
     }
     if (IsScalar(value)) {
@@ -1864,7 +1864,7 @@ struct ScalarizeSplatConstantForBroadcastableOps
 
   // If this type is a scalar shaped type.
   bool IsScalar(mlir::Value value) const {
-    auto type = value.getType().dyn_cast<ShapedType>();
+    auto type = mlir::dyn_cast<ShapedType>(value.getType());
     if (!type) {
       return false;
     }
@@ -1883,7 +1883,7 @@ struct ScalarizeSplatConstantForBroadcastableOps
     DenseElementsAttr value;
     // Check that bias are constants if not none.
     Value bias = affine_op->getOperand(2);
-    if (!bias.getType().isa<NoneType>() &&
+    if (!mlir::isa<NoneType>(bias.getType()) &&
         !matchPattern(bias, m_Constant(&value))) {
       return false;
     }
@@ -1896,7 +1896,7 @@ struct ScalarizeSplatConstantForBroadcastableOps
     // We can only fuse F32/BF16.
     auto is_fusable_type = [](Type t) {
       Type element_type = t;
-      if (auto shaped_type = t.dyn_cast<ShapedType>()) {
+      if (auto shaped_type = mlir::dyn_cast<ShapedType>(t)) {
         element_type = shaped_type.getElementType();
       }
       return element_type.isBF16() || element_type.isF32();
@@ -1926,8 +1926,9 @@ struct ConvertTrivialTransposeOpToReshapeOp
 
   LogicalResult matchAndRewrite(TFL::TransposeOp transpose_op,
                                 PatternRewriter &rewriter) const override {
-    auto input_type = transpose_op.getInput().getType().cast<ShapedType>();
-    auto output_type = transpose_op.getOutput().getType().cast<ShapedType>();
+    auto input_type = mlir::cast<ShapedType>(transpose_op.getInput().getType());
+    auto output_type =
+        mlir::cast<ShapedType>(transpose_op.getOutput().getType());
     // It's possible to know if the transformation is safe only if the input
     // & output shapes are fully known and permutation is a constant.
     if (!input_type.hasStaticShape() || !output_type.hasStaticShape())
@@ -2002,10 +2003,9 @@ struct RemoveReshapeBeforeFullyConnected
   LogicalResult matchAndRewrite(TFL::FullyConnectedOp fully_connected_op,
                                 PatternRewriter &) const override {
     auto input = fully_connected_op.getInput();
-    auto input_ty = input.getType().dyn_cast<ShapedType>();
-    auto output_ty = fully_connected_op.getOutput()[0]
-                         .getType()
-                         .template dyn_cast<ShapedType>();
+    auto input_ty = mlir::dyn_cast<ShapedType>(input.getType());
+    auto output_ty =
+        mlir::dyn_cast<ShapedType>(fully_connected_op.getOutput()[0].getType());
     if (!input_ty.hasStaticShape() ||
         fully_connected_op.getWeightsFormat() != "DEFAULT" ||
         fully_connected_op.getKeepNumDims() || !output_ty.hasStaticShape() ||
@@ -2018,7 +2018,7 @@ struct RemoveReshapeBeforeFullyConnected
 
     // Check if the last dimension does not change after reshape.
     auto reshape_input = reshape_op.getInput();
-    auto reshape_input_ty = reshape_input.getType().dyn_cast<ShapedType>();
+    auto reshape_input_ty = mlir::dyn_cast<ShapedType>(reshape_input.getType());
     if (!reshape_input_ty.hasStaticShape() || input_ty.getRank() == 0 ||
         reshape_input_ty.getRank() == 0 ||
         input_ty.getDimSize(input_ty.getRank() - 1) !=
@@ -2061,9 +2061,9 @@ struct RemoveReshapeAfterFullyConnected
     if (!reshape_op.getInput().hasOneUse()) return failure();
 
     auto input_shape =
-        fully_connected_op.getInput().getType().cast<ShapedType>();
-    auto output_shape = fully_connected_op.getType(0).cast<ShapedType>();
-    auto reshape_shape = reshape_op.getType().cast<ShapedType>();
+        mlir::cast<ShapedType>(fully_connected_op.getInput().getType());
+    auto output_shape = mlir::cast<ShapedType>(fully_connected_op.getType(0));
+    auto reshape_shape = mlir::cast<ShapedType>(reshape_op.getType());
     if (!input_shape.hasStaticShape() || !output_shape.hasStaticShape() ||
         !reshape_shape.hasStaticShape())
       return failure();
@@ -2128,7 +2128,7 @@ struct FuseUnpackAndConcatToReshape
       }
     }
 
-    auto output_type = concat_op.getType().cast<ShapedType>();
+    auto output_type = mlir::cast<ShapedType>(concat_op.getType());
     if (!output_type.hasStaticShape()) {
       return failure();
     }
@@ -2188,8 +2188,8 @@ struct OptimizeTopK : public OpRewritePattern<TFL::TopKV2Op> {
     // for last dimension.
     // It can be done  by verifying the number of elements:
     // i.e., num_input/input_last_dim = num_result/k
-    auto input_ty = value.getType().dyn_cast_or_null<ShapedType>();
-    auto result_ty = slice_op.getType().dyn_cast<ShapedType>();
+    auto input_ty = mlir::dyn_cast_or_null<ShapedType>(value.getType());
+    auto result_ty = mlir::dyn_cast<ShapedType>(slice_op.getType());
     if (!input_ty || !result_ty) return std::nullopt;
     if (!input_ty.hasStaticShape() || !result_ty.hasStaticShape())
       return std::nullopt;
@@ -2230,8 +2230,8 @@ struct OptimizeTopK : public OpRewritePattern<TFL::TopKV2Op> {
     Value k_cst = rewriter.create<TFL::ConstOp>(
         op.getLoc(), DenseElementsAttr::get(k_ty, k));
     // Compute new result types.
-    auto values_ty = values.getType().dyn_cast<ShapedType>();
-    auto indices_ty = indices.getType().dyn_cast<ShapedType>();
+    auto values_ty = mlir::dyn_cast<ShapedType>(values.getType());
+    auto indices_ty = mlir::dyn_cast<ShapedType>(indices.getType());
     auto shape = std::vector<int64_t>();
     for (auto d : values_ty.getShape().drop_back()) {
       shape.push_back(d);
@@ -2439,7 +2439,7 @@ struct FuseLogSoftmax : public OpRewritePattern<TFL::SubOp> {
     if (!sum_op || !sum_op.getKeepDims() ||
         !isSupportedAxis(
             sum_op.getAxes(),
-            sum_op.getOperand(0).getType().cast<ShapedType>().getRank())) {
+            mlir::cast<ShapedType>(sum_op.getOperand(0).getType()).getRank())) {
       return failure();
     }
     if (!sum_op->hasOneUse()) {
@@ -2466,10 +2466,10 @@ struct FuseLogSoftmax : public OpRewritePattern<TFL::SubOp> {
         parent_sub_op.getRhs().getDefiningOp());
     if (!reduce_max_op || !reduce_max_op->hasOneUse() ||
         !reduce_max_op.getKeepDims() ||
-        !isSupportedAxis(reduce_max_op.getAxes(), reduce_max_op.getOperand(0)
-                                                      .getType()
-                                                      .cast<ShapedType>()
-                                                      .getRank())) {
+        !isSupportedAxis(
+            reduce_max_op.getAxes(),
+            mlir::cast<ShapedType>(reduce_max_op.getOperand(0).getType())
+                .getRank())) {
       return failure();
     }
 
@@ -2562,7 +2562,7 @@ struct UndoBroadcastFullyConnectedBiasAddWithQDQs
     }
 
     auto bias_type = bias_op.getType();
-    auto bias_rank = bias_type.cast<ShapedType>().getRank();
+    auto bias_rank = mlir::cast<ShapedType>(bias_type).getRank();
     if (bias_rank > 4 || bias_rank < 2) {
       return failure();
     }
@@ -2587,8 +2587,8 @@ struct UndoBroadcastFullyConnectedBiasAddWithQDQs
     q_op.setOperand(new_bias_op);
     auto new_q_op_type =
         RankedTensorType::Builder(
-            q_op.getResult().getType().cast<RankedTensorType>())
-            .setShape(new_bias_type.cast<ShapedType>().getShape());
+            mlir::cast<RankedTensorType>(q_op.getResult().getType()))
+            .setShape(mlir::cast<ShapedType>(new_bias_type).getShape());
     q_op.getResult().setType(new_q_op_type);
     auto attr = TypeAttr::get(q_op.getResult().getType());
     q_op.setQtypeAttr(attr);
@@ -2596,8 +2596,8 @@ struct UndoBroadcastFullyConnectedBiasAddWithQDQs
     // Update DequantizeOp's output shape
     auto new_dq_op_type =
         RankedTensorType::Builder(
-            dq_op.getResult().getType().cast<RankedTensorType>())
-            .setShape(new_bias_type.cast<ShapedType>().getShape());
+            mlir::cast<RankedTensorType>(dq_op.getResult().getType()))
+            .setShape(mlir::cast<ShapedType>(new_bias_type).getShape());
     dq_op.getResult().setType(new_dq_op_type);
 
     // Remove old bias
diff --git a/tensorflow/compiler/mlir/lite/transforms/optimize_batch_matmul.cc b/tensorflow/compiler/mlir/lite/transforms/optimize_batch_matmul.cc
index 5b696b52db4b2e..0eacfcb8ef09f0 100644
--- a/tensorflow/compiler/mlir/lite/transforms/optimize_batch_matmul.cc
+++ b/tensorflow/compiler/mlir/lite/transforms/optimize_batch_matmul.cc
@@ -94,7 +94,8 @@ struct ConvertBatchMatMulOp2FullyConnectedOp
 
     // Create a tfl.transpose op that performs ZX transpose on `input`.
     auto create_z_x_transpose_op = [&](Value input) -> Value {
-      RankedTensorType input_type = input.getType().cast<RankedTensorType>();
+      RankedTensorType input_type =
+          mlir::cast<RankedTensorType>(input.getType());
       const int input_rank = input_type.getRank();
 
       // Create a 1D I32 tensor for representing the dimension permutation.
@@ -176,7 +177,7 @@ struct ConvertBatchMatMulOpToReduceSum
     // the adj(X|Y) attribute, respectively.
     // So adjX == True indicates [..., c_x, r_x == 1].
     llvm::ArrayRef<int64_t> lhs_shape =
-        bmm_op.getX().getType().cast<RankedTensorType>().getShape();
+        mlir::cast<RankedTensorType>(bmm_op.getX().getType()).getShape();
     int rX = lhs_shape.size() - 2;
     int cX = lhs_shape.size() - 1;
     if (bmm_op.getAdjX()) {
@@ -189,7 +190,7 @@ struct ConvertBatchMatMulOpToReduceSum
     }
 
     llvm::ArrayRef<int64_t> rhs_shape =
-        bmm_op.getY().getType().cast<RankedTensorType>().getShape();
+        mlir::cast<RankedTensorType>(bmm_op.getY().getType()).getShape();
     int rY = rhs_shape.size() - 1;
     int cY = rhs_shape.size() - 2;
     if (bmm_op.getAdjX()) {
@@ -210,11 +211,11 @@ struct ConvertBatchMatMulOpToReduceSum
 
  private:
   bool SplatValueEquals(SplatElementsAttr float_or_int, double rhs) const {
-    if (float_or_int.isa<DenseFPElementsAttr>()) {
-      return float_or_int.cast<DenseFPElementsAttr>()
+    if (mlir::isa<DenseFPElementsAttr>(float_or_int)) {
+      return mlir::cast<DenseFPElementsAttr>(float_or_int)
           .getSplatValue<APFloat>()
           .isExactlyValue(rhs);
-    } else if (float_or_int.cast<DenseIntElementsAttr>()) {
+    } else if (mlir::cast<DenseIntElementsAttr>(float_or_int)) {
       return float_or_int.getSplatValue<APInt>() == static_cast<int>(rhs);
     }
     return false;
diff --git a/tensorflow/compiler/mlir/lite/transforms/optimize_functional_ops.cc b/tensorflow/compiler/mlir/lite/transforms/optimize_functional_ops.cc
index 7d7ab4b5acd33d..69137210b48ffc 100644
--- a/tensorflow/compiler/mlir/lite/transforms/optimize_functional_ops.cc
+++ b/tensorflow/compiler/mlir/lite/transforms/optimize_functional_ops.cc
@@ -21,12 +21,13 @@ limitations under the License.
 #include "llvm/Support/Casting.h"
 #include "mlir/Dialect/Func/IR/FuncOps.h"  // from @llvm-project
 #include "mlir/IR/Attributes.h"  // from @llvm-project
-#include "mlir/IR/IRMapping.h"  // from @llvm-project
 #include "mlir/IR/BuiltinOps.h"  // from @llvm-project
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
+#include "mlir/IR/IRMapping.h"  // from @llvm-project
 #include "mlir/IR/MLIRContext.h"  // from @llvm-project
 #include "mlir/IR/TypeUtilities.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/lite/ir/tfl_ops.h"
@@ -110,7 +111,7 @@ class FoldIfOp : public OpRewritePattern<TF::IfOp> {
     if (!matchPattern(op.getCond(), m_Constant(&cond))) return failure();
 
     // TODO(hinsu): Handle constants that are not scalar booleans.
-    auto cond_type = cond.getType().dyn_cast<RankedTensorType>();
+    auto cond_type = mlir::dyn_cast<RankedTensorType>(cond.getType());
     if (!cond_type || !cond_type.getShape().equals({}) ||
         !cond_type.getElementType().isInteger(/*width=*/1))
       return failure();
diff --git a/tensorflow/compiler/mlir/lite/transforms/optimize_op_order.cc b/tensorflow/compiler/mlir/lite/transforms/optimize_op_order.cc
index 4ce0a3b8c43225..62c2c43778e254 100644
--- a/tensorflow/compiler/mlir/lite/transforms/optimize_op_order.cc
+++ b/tensorflow/compiler/mlir/lite/transforms/optimize_op_order.cc
@@ -19,6 +19,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/IR/TypeUtilities.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/lite/ir/tfl_ops.h"
@@ -66,9 +67,9 @@ struct PushDownDequantize : public OpRewritePattern<DequantizeOp> {
     // Only push down the dequantize op when the output is smaller, so that it
     // can have smaller memory usage.
     auto input_type =
-        dequantize_op.getOutput().getType().dyn_cast<RankedTensorType>();
-    auto output_type =
-        passthrough_op->getResult(0).getType().dyn_cast<RankedTensorType>();
+        mlir::dyn_cast<RankedTensorType>(dequantize_op.getOutput().getType());
+    auto output_type = mlir::dyn_cast<RankedTensorType>(
+        passthrough_op->getResult(0).getType());
     if (!input_type || !output_type ||
         get_num_elements(input_type) <= get_num_elements(output_type)) {
       return failure();
@@ -85,7 +86,7 @@ struct PushDownDequantize : public OpRewritePattern<DequantizeOp> {
 
     // Set the input type of the passthrough op and pull it up.
     Type new_output_type;
-    if (input_element_type.isa<quant::QuantizedType>()) {
+    if (mlir::isa<quant::QuantizedType>(input_element_type)) {
       new_output_type = QuantizedType::getQuantizedElementType(
                             dequantize_op.getInput().getType())
                             .castFromExpressedType(output_type);
diff --git a/tensorflow/compiler/mlir/lite/transforms/pin_ops_with_side_effects.cc b/tensorflow/compiler/mlir/lite/transforms/pin_ops_with_side_effects.cc
index 1d0cd497b052f3..7baa0136f1c33c 100644
--- a/tensorflow/compiler/mlir/lite/transforms/pin_ops_with_side_effects.cc
+++ b/tensorflow/compiler/mlir/lite/transforms/pin_ops_with_side_effects.cc
@@ -37,9 +37,9 @@ namespace {
 #include "tensorflow/compiler/mlir/lite/transforms/passes.h.inc"
 
 bool IsResourceTensor(Value value) {
-  const auto tensor_type = value.getType().dyn_cast<TensorType>();
+  const auto tensor_type = mlir::dyn_cast<TensorType>(value.getType());
   return tensor_type &&
-         tensor_type.getElementType().isa<mlir::TF::ResourceType>();
+         mlir::isa<mlir::TF::ResourceType>(tensor_type.getElementType());
 }
 
 // The default criterion for operations being considered as causing or being
diff --git a/tensorflow/compiler/mlir/lite/transforms/post_quantize.cc b/tensorflow/compiler/mlir/lite/transforms/post_quantize.cc
index 80d7ab24c23316..867eecff15818f 100644
--- a/tensorflow/compiler/mlir/lite/transforms/post_quantize.cc
+++ b/tensorflow/compiler/mlir/lite/transforms/post_quantize.cc
@@ -22,6 +22,7 @@ limitations under the License.
 #include "mlir/IR/MLIRContext.h"  // from @llvm-project
 #include "mlir/IR/TypeUtilities.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/lite/ir/tfl_ops.h"
@@ -233,8 +234,8 @@ struct FoldTransposeOp : public OpRewritePattern<TransposeOp> {
     DenseIntElementsAttr perm_tensor;
     if (!matchPattern(op.getPerm(), m_Constant(&perm_tensor))) return failure();
 
-    if (!(getElementTypeOrSelf(op.getOutput().getType()))
-             .isa<quant::UniformQuantizedType>())
+    if (!mlir::isa<quant::UniformQuantizedType>(
+            (getElementTypeOrSelf(op.getOutput().getType()))))
       return failure();
 
     ElementsAttr input_tensor = qconst_op.getValue();
@@ -244,7 +245,7 @@ struct FoldTransposeOp : public OpRewritePattern<TransposeOp> {
     assert(perm_tensor.getType().getNumElements() == num_dimensions);
 
     ArrayRef<int64_t> input_shape = input_tensor.getShapedType().getShape();
-    auto output_type = op.getOutput().getType().cast<ShapedType>();
+    auto output_type = mlir::cast<ShapedType>(op.getOutput().getType());
 
     SmallVector<int32_t, 4> perm;
     SmallVector<int64_t, 4> output_shape;
@@ -265,9 +266,9 @@ struct FoldTransposeOp : public OpRewritePattern<TransposeOp> {
     auto result_type =
         RankedTensorType::get(output_shape, output_type.getElementType());
     auto values_type = RankedTensorType::get(
-        output_shape, output_type.getElementType()
-                          .cast<quant::UniformQuantizedType>()
-                          .getStorageType());
+        output_shape,
+        mlir::cast<quant::UniformQuantizedType>(output_type.getElementType())
+            .getStorageType());
     rewriter.replaceOpWithNewOp<QConstOp>(
         op, TypeAttr::get(result_type),
         DenseIntElementsAttr::get(values_type, new_values));
@@ -289,18 +290,18 @@ struct FoldReshapeOp : public OpRewritePattern<ReshapeOp> {
     if (qconst_op == nullptr) return failure();
 
     auto dense_elements =
-        qconst_op.getValue().dyn_cast_or_null<DenseElementsAttr>();
+        mlir::dyn_cast_or_null<DenseElementsAttr>(qconst_op.getValue());
     if (dense_elements == nullptr) return failure();
 
     // Handle per tensor cases only.
-    if (!(getElementTypeOrSelf(op.getType()))
-             .isa<quant::UniformQuantizedType>()) {
+    if (!mlir::isa<quant::UniformQuantizedType>(
+            (getElementTypeOrSelf(op.getType())))) {
       return failure();
     }
 
     // Remove identity reshape with both static result and input shape.
-    auto result_type = op.getType().cast<ShapedType>();
-    auto input_type = op.getInput().getType().cast<ShapedType>();
+    auto result_type = mlir::cast<ShapedType>(op.getType());
+    auto input_type = mlir::cast<ShapedType>(op.getInput().getType());
 
     // Constant folding
     // If the result type isn't static, tries to derive the result type from
@@ -318,9 +319,9 @@ struct FoldReshapeOp : public OpRewritePattern<ReshapeOp> {
           RankedTensorType::get(shape_data, input_type.getElementType());
     }
     auto values_type = RankedTensorType::get(
-        result_type.getShape(), result_type.getElementType()
-                                    .cast<quant::UniformQuantizedType>()
-                                    .getStorageType());
+        result_type.getShape(),
+        mlir::cast<quant::UniformQuantizedType>(result_type.getElementType())
+            .getStorageType());
 
     DenseElementsAttr reshaped_elements = dense_elements.reshape(values_type);
     rewriter.replaceOpWithNewOp<QConstOp>(op, TypeAttr::get(result_type),
diff --git a/tensorflow/compiler/mlir/lite/transforms/prepare_composite_functions_tf.cc b/tensorflow/compiler/mlir/lite/transforms/prepare_composite_functions_tf.cc
index 873efde6a290d6..9ed32a1b9a674e 100644
--- a/tensorflow/compiler/mlir/lite/transforms/prepare_composite_functions_tf.cc
+++ b/tensorflow/compiler/mlir/lite/transforms/prepare_composite_functions_tf.cc
@@ -80,13 +80,15 @@ LogicalResult CreateTflFusableOpCustomOptions(
   size_t start_map = fbb.StartMap();
 
   for (auto attr : attrs) {
-    if (auto float_attr = attr.second.dyn_cast_or_null<FloatAttr>()) {
+    if (auto float_attr = mlir::dyn_cast_or_null<FloatAttr>(attr.second)) {
       fbb.Float(attr.first.data(), float_attr.getValue().convertToFloat());
-    } else if (auto int_attr = attr.second.dyn_cast_or_null<IntegerAttr>()) {
+    } else if (auto int_attr =
+                   mlir::dyn_cast_or_null<IntegerAttr>(attr.second)) {
       fbb.Int(attr.first.data(), int_attr.getInt());
-    } else if (auto bool_attr = attr.second.dyn_cast_or_null<BoolAttr>()) {
+    } else if (auto bool_attr = mlir::dyn_cast_or_null<BoolAttr>(attr.second)) {
       fbb.Bool(attr.first.data(), bool_attr.getValue());
-    } else if (auto string_attr = attr.second.dyn_cast_or_null<StringAttr>()) {
+    } else if (auto string_attr =
+                   mlir::dyn_cast_or_null<StringAttr>(attr.second)) {
       fbb.String(attr.first.data(), string_attr.getValue().str());
     } else {
       // TODO(b/201482289): support other data types.
@@ -182,7 +184,7 @@ LogicalResult CheckFusableLayerNormalizedLstmCellSimple(
     func::FuncOp lstm_func) {
   for (int i = 0; i < 5; ++i) {
     auto input = lstm_func.getArgument(i);
-    auto input_type = input.getType().dyn_cast_or_null<RankedTensorType>();
+    auto input_type = mlir::dyn_cast_or_null<RankedTensorType>(input.getType());
     if (!input_type) {
       lstm_func.emitWarning(
           "we cannot fuse this lstm func because all the inputs have not "
@@ -197,7 +199,7 @@ LogicalResult CheckFusableLayerNormalizedLstmCellSimple(
 LogicalResult CheckFusableLstmCellSimple(func::FuncOp lstm_func) {
   for (int i = 0; i < 4; ++i) {
     auto input = lstm_func.getArgument(i);
-    auto input_type = input.getType().dyn_cast_or_null<RankedTensorType>();
+    auto input_type = mlir::dyn_cast_or_null<RankedTensorType>(input.getType());
     if (!input_type) {
       lstm_func.emitWarning(
           "we cannot fuse this lstm func because all the inputs have not "
@@ -250,7 +252,7 @@ LogicalResult CheckFusableKerasLstm(func::FuncOp lstm_func, ModuleOp module) {
   // types.
   for (int i = 0; i < 6; ++i) {
     auto input = lstm_func.getArgument(i);
-    auto input_type = input.getType().dyn_cast_or_null<RankedTensorType>();
+    auto input_type = mlir::dyn_cast_or_null<RankedTensorType>(input.getType());
     if (!input_type) {
       lstm_func.emitWarning(
           "we cannot fuse this lstm func because all the inputs have not "
@@ -368,7 +370,7 @@ void PrepareCompositeFunctionsPass::ConvertTFImplementsWithAttributes(
     for (auto attr_item : dict_attr) {
       // Push other attributes except the TFLFusableOp.
       if (attr_item.getName() == kTFLFusableOp &&
-          attr_item.getValue().dyn_cast<BoolAttr>().getValue()) {
+          mlir::dyn_cast<BoolAttr>(attr_item.getValue()).getValue()) {
         tfl_fusable_op = true;
       } else {
         attributes.push_back({attr_item.getName(), attr_item.getValue()});
diff --git a/tensorflow/compiler/mlir/lite/transforms/prepare_quantize.cc b/tensorflow/compiler/mlir/lite/transforms/prepare_quantize.cc
index ce11ca73970136..9f76ad1f6e9098 100644
--- a/tensorflow/compiler/mlir/lite/transforms/prepare_quantize.cc
+++ b/tensorflow/compiler/mlir/lite/transforms/prepare_quantize.cc
@@ -153,8 +153,8 @@ bool PrepareQuantizePass::SetInputNodesQuantizationParams(func::FuncOp func) {
 
   bool need_to_set_input_nodes_quantization_params = false;
   for (const BlockArgument arg : func.getArguments()) {
-    auto shaped = arg.getType().dyn_cast<ShapedType>();
-    if (shaped && shaped.getElementType().isa<FloatType>() &&
+    auto shaped = mlir::dyn_cast<ShapedType>(arg.getType());
+    if (shaped && mlir::isa<FloatType>(shaped.getElementType()) &&
         !has_quantize_op(arg)) {
       need_to_set_input_nodes_quantization_params = true;
       break;
@@ -179,8 +179,8 @@ bool PrepareQuantizePass::SetInputNodesQuantizationParams(func::FuncOp func) {
   auto add_quantize_op = [&](Location loc, Type input_type, Block* block,
                              Block::iterator insertion_point, Value arg,
                              int i) {
-    if (auto shaped = input_type.dyn_cast<ShapedType>()) {
-      if (shaped.getElementType().isa<FloatType>()) {
+    if (auto shaped = mlir::dyn_cast<ShapedType>(input_type)) {
+      if (mlir::isa<FloatType>(shaped.getElementType())) {
         // If there are existing quantize ops, they are from training and we
         // should respect them.
         if (has_quantize_op(arg)) {
diff --git a/tensorflow/compiler/mlir/lite/transforms/prepare_quantize_dynamic_range.cc b/tensorflow/compiler/mlir/lite/transforms/prepare_quantize_dynamic_range.cc
index f0fd79ff207f39..0b823844aa4a58 100644
--- a/tensorflow/compiler/mlir/lite/transforms/prepare_quantize_dynamic_range.cc
+++ b/tensorflow/compiler/mlir/lite/transforms/prepare_quantize_dynamic_range.cc
@@ -24,6 +24,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/IR/Dialect.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/lite/ir/tfl_ops.h"
 #include "tensorflow/compiler/mlir/lite/quantization/lite/tfl_to_std.h"
@@ -193,7 +194,7 @@ class PrepareDynamicRangeQuantizableOp
           continue;
         }
 
-        if (attr.dyn_cast<DenseFPElementsAttr>().size() >=
+        if (mlir::dyn_cast<DenseFPElementsAttr>(attr).size() >=
             quant_specs_.minimum_elements_for_weights) {
           continue;
         }
@@ -205,7 +206,7 @@ class PrepareDynamicRangeQuantizableOp
             "supported. The operand ")
             << const_op->getName().getStringRef().str() << " at index " << qi
             << " was not quantized because it has "
-            << attr.dyn_cast<DenseFPElementsAttr>().size()
+            << mlir::dyn_cast<DenseFPElementsAttr>(attr).size()
             << " elements which is fewer than the "
                "`minimum_elements_for_weights` threshold of "
             << quant_specs_.minimum_elements_for_weights;
@@ -233,7 +234,7 @@ class PrepareDynamicRangeQuantizableOp
 
     // Get types
     TensorType old_result_type =
-        op.getResult().getType().template dyn_cast<TensorType>();
+        mlir::dyn_cast<TensorType>(op.getResult().getType());
     FloatType quantized_type = FloatType::getF16(op.getContext());
     ShapedType new_result_type = old_result_type.clone(quantized_type);
 
@@ -287,27 +288,27 @@ class PrepareDynamicRangeQuantizableOp
     DenseFPElementsAttr attr;
     if (!matchPattern(op->getResult(0), m_Constant(&attr))) return false;
 
-    if (attr.dyn_cast<DenseFPElementsAttr>().size() <
+    if (mlir::dyn_cast<DenseFPElementsAttr>(attr).size() <
         quant_specs_.minimum_elements_for_weights) {
       op->emitRemark("Quantization is skipped for ")
           << quantize_op->getName().getStringRef().str() << " because it has "
-          << attr.dyn_cast<DenseFPElementsAttr>().size()
+          << mlir::dyn_cast<DenseFPElementsAttr>(attr).size()
           << " elements which is fewer than the threshold("
           << quant_specs_.minimum_elements_for_weights << " elements).";
       return false;
     }
 
     if (op_with_per_axis_support) {
-      quant_type = quant::GetUniformQuantizedPerAxisTypeForWeight(
-                       attr, affine_user.GetQuantizationDimIndex(),
-                       /*symmetric=*/true, bit_width, is_signed,
-                       is_narrow_range, is_legacy_float)
-                       .template dyn_cast<quant::QuantizedType>();
+      quant_type = mlir::dyn_cast<quant::QuantizedType>(
+          quant::GetUniformQuantizedPerAxisTypeForWeight(
+              attr, affine_user.GetQuantizationDimIndex(),
+              /*symmetric=*/true, bit_width, is_signed, is_narrow_range,
+              is_legacy_float));
     } else {
-      quant_type = quant::GetUniformQuantizedTypeForWeight(
-                       attr, is_narrow_range && is_signed, bit_width, is_signed,
-                       is_narrow_range, is_legacy_float)
-                       .template dyn_cast<quant::QuantizedType>();
+      quant_type = mlir::dyn_cast<quant::QuantizedType>(
+          quant::GetUniformQuantizedTypeForWeight(
+              attr, is_narrow_range && is_signed, bit_width, is_signed,
+              is_narrow_range, is_legacy_float));
     }
     return insertQDQ(rewriter, op, quant_type, quant_op);
   }
@@ -346,7 +347,7 @@ class PrepareDynamicRangeQuantizableOp
   bool getQuantizableOps(arith::ConstantOp op,
                          QuantizationUnits& quantizable_ops) const {
     // Non-float tensors do not need quantization.
-    auto type = op.getType().dyn_cast<ShapedType>();
+    auto type = mlir::dyn_cast<ShapedType>(op.getType());
     if (!type || !type.getElementType().isF32()) return false;
 
     Value value = op.getResult();
@@ -420,7 +421,7 @@ class PrepareDynamicRangeQuantizableOp
       // Get types
       Type old_result_type = op.getResult().getType();
       ShapedType new_result_type =
-          cast_op.getType().template dyn_cast<ShapedType>();
+          mlir::dyn_cast<ShapedType>(cast_op.getType());
 
       // Proceeds only if the casting is to float16
       if (!new_result_type.getElementType().isF16()) continue;
@@ -428,7 +429,7 @@ class PrepareDynamicRangeQuantizableOp
       // Cast values
       std::vector<Eigen::half> new_values;
       DenseFPElementsAttr value_attr =
-          op.getValue().cast<DenseFPElementsAttr>();
+          mlir::cast<DenseFPElementsAttr>(op.getValue());
       new_values.reserve(value_attr.getNumElements());
 
       constexpr float kMaxFloat16Value = 65504.f;
diff --git a/tensorflow/compiler/mlir/lite/transforms/prepare_quantize_helper.h b/tensorflow/compiler/mlir/lite/transforms/prepare_quantize_helper.h
index e102c6bedd4328..68404404926775 100644
--- a/tensorflow/compiler/mlir/lite/transforms/prepare_quantize_helper.h
+++ b/tensorflow/compiler/mlir/lite/transforms/prepare_quantize_helper.h
@@ -36,6 +36,7 @@ limitations under the License.
 #include "mlir/IR/PatternMatch.h"  // from @llvm-project
 #include "mlir/IR/TypeUtilities.h"  // from @llvm-project
 #include "mlir/IR/Value.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/lite/ir/tfl_ops.h"
 #include "tensorflow/compiler/mlir/lite/quantization/ir/QuantOps.h"
@@ -100,19 +101,18 @@ LogicalResult GetLstmProperty(LstmOp op,
     return failure();
   }
   lstm_variant->use_projection =
-      !op.getProjectionWeights().getType().template isa<NoneType>();
+      !mlir::isa<NoneType>(op.getProjectionWeights().getType());
   lstm_variant->use_peephole =
-      !op.getCellToOutputWeights().getType().template isa<NoneType>();
+      !mlir::isa<NoneType>(op.getCellToOutputWeights().getType());
   lstm_variant->use_layer_norm =
-      !op.getForgetLayerNormCoefficients().getType().template isa<NoneType>();
+      !mlir::isa<NoneType>(op.getForgetLayerNormCoefficients().getType());
 
   *op_property = operator_property::GetOperatorProperty(
       *lstm_variant, activation_number_of_bits);
 
   // TODO(b/176258587) move this to operator_property.cc if this is needed in
   // other components, too.
-  bool use_cifg =
-      op.getInputToInputWeights().getType().template isa<NoneType>();
+  bool use_cifg = mlir::isa<NoneType>(op.getInputToInputWeights().getType());
   if (use_cifg) {
     const absl::flat_hash_set<int> cifg_non_inputs = {1, 5, 9, 12, 20};
     const int cifg_non_intermediate = 0;
@@ -197,9 +197,9 @@ class PrepareLstmOutputScale : public OpRewritePattern<SourceOp> {
     llvm::SmallVector<llvm::APFloat, 4> min_max_values;
 
     for (auto& stats_op : stats_ops) {
-      auto values = stats_op.getLayerStats()
-                        .dyn_cast<DenseFPElementsAttr>()
-                        .getValues<llvm::APFloat>();
+      auto values =
+          mlir::dyn_cast<DenseFPElementsAttr>(stats_op.getLayerStats())
+              .getValues<llvm::APFloat>();
       min_max_values.insert(min_max_values.end(), values.begin(), values.end());
     }
 
@@ -285,8 +285,8 @@ class ConvertOpStatsToQDQs : public OpRewritePattern<SourceOp> {
       const operator_property::TensorProperty& tensor_property,
       PatternRewriter& rewriter) const {
     // Non-float tensors are neither weights nor require quantization.
-    auto type = const_op->getResult(0).getType().dyn_cast<ShapedType>();
-    if (!type || !type.getElementType().isa<FloatType>()) return success();
+    auto type = mlir::dyn_cast<ShapedType>(const_op->getResult(0).getType());
+    if (!type || !mlir::isa<FloatType>(type.getElementType())) return success();
 
     DenseFPElementsAttr attr;
     if (!matchPattern(const_op->getResult(0), m_Constant(&attr))) {
@@ -312,12 +312,12 @@ class ConvertOpStatsToQDQs : public OpRewritePattern<SourceOp> {
           rewriter.getIntegerType(16), attr.getType().getElementType(), scale,
           /*zeroPoint=*/0, llvm::minIntN(10), -llvm::minIntN(10));
     } else {
-      quant_type = quant::GetUniformQuantizedTypeForWeight(
-                       attr, /*symmetric=*/true,
-                       /*num_bits=*/tensor_property.number_of_bits,
-                       /*is_signed=*/true,
-                       /*narrow_range=*/true, quant_specs_.legacy_float_scale)
-                       .template dyn_cast<quant::UniformQuantizedType>();
+      quant_type = mlir::dyn_cast<quant::UniformQuantizedType>(
+          quant::GetUniformQuantizedTypeForWeight(
+              attr, /*symmetric=*/true,
+              /*num_bits=*/tensor_property.number_of_bits,
+              /*is_signed=*/true,
+              /*narrow_range=*/true, quant_specs_.legacy_float_scale));
     }
     if (!quant_type) {
       const_op->emitError("Failed to get quantized type");
@@ -346,7 +346,7 @@ class ConvertOpStatsToQDQs : public OpRewritePattern<SourceOp> {
                      << "] is a state tensor, but has more than one use.";
       return failure();
     }
-    auto stats = stats_op.getLayerStats().dyn_cast<DenseFPElementsAttr>();
+    auto stats = mlir::dyn_cast<DenseFPElementsAttr>(stats_op.getLayerStats());
     if (!stats || stats.getNumElements() != 2) {
       stats_op.emitError("Stats should have 2 values.");
       return failure();
@@ -454,7 +454,7 @@ class ConvertLstmStatsToQDQs : public ConvertOpStatsToQDQs<SourceOp> {
         return failure();
       }
       auto calibrated_type =
-          quant_type.template dyn_cast<quant::CalibratedQuantizedType>();
+          mlir::dyn_cast<quant::CalibratedQuantizedType>(quant_type);
       if (!calibrated_type) {
         int num_storage_bits = quant_type.getStorageTypeIntegralWidth();
         if (tensor_property.number_of_bits != num_storage_bits) {
@@ -474,9 +474,9 @@ class ConvertLstmStatsToQDQs : public ConvertOpStatsToQDQs<SourceOp> {
             /*narrowRange=*/false, calibrated_type.getExpressedType(),
             /*isSigned=*/this->quant_specs_.IsSignedInferenceType());
         if (this->quant_specs_.legacy_float_scale) {
-          qtype = quant::DownCastScale(qtype, calibrated_type.getMin(),
-                                       calibrated_type.getMax(), op.getLoc())
-                      .template cast<UniformQuantizedType>();
+          qtype = mlir::cast<UniformQuantizedType>(
+              quant::DownCastScale(qtype, calibrated_type.getMin(),
+                                   calibrated_type.getMax(), op.getLoc()));
         }
       } else if (tensor_property.number_of_bits == 16) {
         double max = std::max(std::abs(calibrated_type.getMin()),
@@ -508,9 +508,9 @@ inline quant::AccumulatorScaleFunc GetUniformQuantizedTypeForBiasWithScale(
   return [=](const std::vector<quant::QuantParams>& quant_params,
              const int adjusted_quant_dim,
              const bool legacy_float_scale) -> quant::QuantParams {
-    if (auto qtype = quant::GetUniformQuantizedTypeForBias(
-                         quant_params, legacy_float_scale, adjusted_quant_dim)
-                         .dyn_cast_or_null<UniformQuantizedType>()) {
+    if (auto qtype = mlir::dyn_cast_or_null<UniformQuantizedType>(
+            quant::GetUniformQuantizedTypeForBias(
+                quant_params, legacy_float_scale, adjusted_quant_dim))) {
       return quant::UniformQuantizedType::get(
           qtype.getFlags(), qtype.getStorageType(), qtype.getExpressedType(),
           qtype.getScale() * scale, qtype.getZeroPoint(),
@@ -540,14 +540,14 @@ std::unique_ptr<quant::OpQuantSpec> GetLstmOpQuantSpec(LstmOp op) {
            tensor_property.derived_scale.intermediate_tensors) {
         auto quant_type = GetIntermediateElementType<LstmOp>(op, tensor_index);
         if (!quant_type ||
-            !quant_type.template isa<quant::UniformQuantizedType>()) {
+            !mlir::isa<quant::UniformQuantizedType>(quant_type)) {
           op->emitError() << "While processing derived scale, intermediate "
                           << intermediate_attributes[tensor_index]
                           << " is not quantized.";
           return nullptr;
         }
-        scale *= quant_type.template dyn_cast<quant::UniformQuantizedType>()
-                     .getScale();
+        scale *=
+            mlir::dyn_cast<quant::UniformQuantizedType>(quant_type).getScale();
       }
       for (float factor : tensor_property.derived_scale.factors) {
         scale *= factor;
@@ -590,7 +590,8 @@ class PropagateTransposedPerAxisQuantDim
     auto q_op = dyn_cast_or_null<quantfork::QuantizeCastOp>(
         dq_op.getOperand().getDefiningOp());
     if (!q_op) return failure();
-    auto qtype = dq_op.getArg().getType().cast<TensorType>().getElementType();
+    auto qtype =
+        mlir::cast<TensorType>(dq_op.getArg().getType()).getElementType();
     auto aqtype = dyn_cast_or_null<quant::UniformQuantizedPerAxisType>(qtype);
     if (!aqtype) return failure();
 
@@ -599,8 +600,8 @@ class PropagateTransposedPerAxisQuantDim
     auto next_op = *transpose_op.getResult().getUsers().begin();
     if (dyn_cast_or_null<quantfork::QuantizeCastOp>(next_op)) return failure();
 
-    auto input_type = transpose_op.getInput().getType().cast<ShapedType>();
-    auto perm_type = transpose_op.getPerm().getType().cast<ShapedType>();
+    auto input_type = mlir::cast<ShapedType>(transpose_op.getInput().getType());
+    auto perm_type = mlir::cast<ShapedType>(transpose_op.getPerm().getType());
     if (input_type.hasStaticShape() && perm_type.hasStaticShape()) {
       if (perm_type.getNumElements() != input_type.getRank()) {
         return transpose_op.emitOpError(
diff --git a/tensorflow/compiler/mlir/lite/transforms/prepare_tf.cc b/tensorflow/compiler/mlir/lite/transforms/prepare_tf.cc
index 9f0a7fbafff450..09e7f080fa83fb 100644
--- a/tensorflow/compiler/mlir/lite/transforms/prepare_tf.cc
+++ b/tensorflow/compiler/mlir/lite/transforms/prepare_tf.cc
@@ -89,7 +89,7 @@ namespace {
 // Preconditions: The given value must have a ShapedType.
 static Value CreateTFCastOpI32(OpBuilder *builder, Location loc, Value x,
                                BoolAttr truncate) {
-  auto x_type = x.getType().dyn_cast_or_null<ShapedType>();
+  auto x_type = mlir::dyn_cast_or_null<ShapedType>(x.getType());
   if (!x_type) llvm_unreachable("unsupported type");
   Type type = x_type.clone(builder->getI32Type());
   return builder->create<TF::CastOp>(loc, type, x, truncate);
@@ -200,14 +200,14 @@ class ConvertTFConvOp : public RewritePattern {
     // that we can extract info from the shape (e.g., for constructing bias
     // tensor, for setting depth_multiplier attribute, etc.).
     auto filter = tf_op.getFilter();
-    auto filter_type = filter.getType().template dyn_cast<RankedTensorType>();
+    auto filter_type = mlir::dyn_cast<RankedTensorType>(filter.getType());
     if (!filter_type || filter_type.getRank() != 4 ||
         !filter_type.hasStaticShape())
       return failure();
 
     Value input = tf_op.getInput();
     RankedTensorType input_type =
-        input.getType().template dyn_cast<RankedTensorType>();
+        mlir::dyn_cast<RankedTensorType>(input.getType());
     // Only rank size four input will be only available by the tf.Conv2D
     // operator verification.
     if (!input_type || input_type.isDynamicDim(3)) {
@@ -244,7 +244,7 @@ class ConvertTFConvOp : public RewritePattern {
           op->getAttrOfType<ArrayAttr>("explicit_paddings").getValue();
 
       auto get_int = [](Attribute attr) {
-        return attr.template cast<IntegerAttr>().getInt();
+        return mlir::cast<IntegerAttr>(attr).getInt();
       };
 
       SmallVector<int32_t> padding_values(padding_attr_array.size());
@@ -324,7 +324,7 @@ class ConvertTFConv2D : public ConvertTFConvOp<ConvertTFConv2D, TF::Conv2DOp> {
     auto perm_op = rewriter.create<TF::ConstOp>(loc, perm_type, perm_attr);
 
     // Create tensor type for the transpose result.
-    auto filter_type = filter.getType().cast<RankedTensorType>();
+    auto filter_type = mlir::cast<RankedTensorType>(filter.getType());
     auto result_shape =
         llvm::to_vector<4>(llvm::map_range(perm, [filter_type](int64_t dim) {
           return filter_type.getDimSize(dim);
@@ -361,7 +361,8 @@ class ConvertTFDepthwiseConv2dNative
     // have a corresponding 'depth_multiplier' attribute; the multiplier is the
     // fourth dimension in the 4-D filter tensor. We query the multiplier from
     // tf.DepthwiseConv2dNative and set it as the attribute value accordingly.
-    auto multiplier = filter.getType().cast<RankedTensorType>().getDimSize(3);
+    auto multiplier =
+        mlir::cast<RankedTensorType>(filter.getType()).getDimSize(3);
 
     filter = legalizeFilter(rewriter, loc, filter);
     return rewriter.create<TFL::DepthwiseConv2DOp>(
@@ -385,7 +386,7 @@ class ConvertTFDepthwiseConv2dNative
   /// RankedTensorType.
   Value legalizeFilter(PatternRewriter &rewriter, Location loc,
                        Value filter) const {
-    auto filter_type = filter.getType().cast<RankedTensorType>();
+    auto filter_type = mlir::cast<RankedTensorType>(filter.getType());
     auto filterShape = filter_type.getShape();
     SmallVector<int64_t, 4> result_shape = {1, filterShape[0], filterShape[1],
                                             filterShape[2] * filterShape[3]};
@@ -443,7 +444,7 @@ struct ConvertTFStridedSlice : public RewritePattern {
     // Insert a new reshape op.
     Value original_input = strided_slice_op.getInput();
     RankedTensorType original_input_type =
-        original_input.getType().dyn_cast<RankedTensorType>();
+        mlir::dyn_cast<RankedTensorType>(original_input.getType());
     if (!original_input_type) {
       return failure();
     }
@@ -522,7 +523,8 @@ struct ConvertTFStridedSlice : public RewritePattern {
 
     DenseIntElementsAttr begin_dense_elem_attr;
     Value begin = strided_slice_op.getBegin();
-    auto begin_ranked_attr_type = begin.getType().dyn_cast<RankedTensorType>();
+    auto begin_ranked_attr_type =
+        mlir::dyn_cast<RankedTensorType>(begin.getType());
     if (!begin_ranked_attr_type ||
         !matchPattern(begin, m_Constant(&begin_dense_elem_attr))) {
       return failure();
@@ -530,7 +532,7 @@ struct ConvertTFStridedSlice : public RewritePattern {
 
     DenseIntElementsAttr end_dense_elem_attr;
     Value end = strided_slice_op.getEnd();
-    auto end_ranked_attr_type = end.getType().dyn_cast<RankedTensorType>();
+    auto end_ranked_attr_type = mlir::dyn_cast<RankedTensorType>(end.getType());
     if (!end_ranked_attr_type ||
         !matchPattern(end, m_Constant(&end_dense_elem_attr))) {
       return failure();
@@ -539,14 +541,15 @@ struct ConvertTFStridedSlice : public RewritePattern {
     DenseIntElementsAttr stride_dense_elem_attr;
     Value stride = strided_slice_op.getStrides();
     auto stride_ranked_attr_type =
-        stride.getType().dyn_cast<RankedTensorType>();
+        mlir::dyn_cast<RankedTensorType>(stride.getType());
     if (!stride_ranked_attr_type ||
         !matchPattern(stride, m_Constant(&stride_dense_elem_attr))) {
       return failure();
     }
 
     Value input = strided_slice_op.getInput();
-    RankedTensorType input_type = input.getType().dyn_cast<RankedTensorType>();
+    RankedTensorType input_type =
+        mlir::dyn_cast<RankedTensorType>(input.getType());
     if (!input_type) {
       return failure();
     }
@@ -554,7 +557,7 @@ struct ConvertTFStridedSlice : public RewritePattern {
 
     const int input_size = input_shape.size();
 
-    RankedTensorType begin_type = begin.getType().cast<RankedTensorType>();
+    RankedTensorType begin_type = mlir::cast<RankedTensorType>(begin.getType());
     const ArrayRef<int64_t> begin_shape = begin_type.getShape();
     const int begin_dim = begin_shape.size();
 
@@ -688,7 +691,7 @@ struct ConvertTFStridedSlice : public RewritePattern {
     }
 
     auto ranked_input_type =
-        strided_slice_op.getInput().getType().dyn_cast<RankedTensorType>();
+        mlir::dyn_cast<RankedTensorType>(strided_slice_op.getInput().getType());
     if (!ranked_input_type) {
       return failure();
     }
@@ -697,10 +700,11 @@ struct ConvertTFStridedSlice : public RewritePattern {
     auto end_attr = strided_slice_op.getEnd();
     auto strides_attr = strided_slice_op.getStrides();
 
-    auto begin_attr_type = begin_attr.getType().dyn_cast<RankedTensorType>();
-    auto end_attr_type = end_attr.getType().dyn_cast<RankedTensorType>();
+    auto begin_attr_type =
+        mlir::dyn_cast<RankedTensorType>(begin_attr.getType());
+    auto end_attr_type = mlir::dyn_cast<RankedTensorType>(end_attr.getType());
     auto strides_attr_type =
-        strides_attr.getType().dyn_cast<RankedTensorType>();
+        mlir::dyn_cast<RankedTensorType>(strides_attr.getType());
 
     DenseIntElementsAttr begin_elem_attr;
     DenseIntElementsAttr end_elem_attr;
@@ -899,8 +903,8 @@ struct FusedBatchNormV3Pat : public ::mlir::RewritePattern {
       if (!epsilon)
         epsilon = rewriter.getFloatAttr(rewriter.getF32Type(), 0.0001f);
 
-      if (!(((epsilon.isa<::mlir::FloatAttr>())) &&
-            ((epsilon.cast<::mlir::FloatAttr>().getType().isF32())))) {
+      if (!(((mlir::isa<::mlir::FloatAttr>(epsilon))) &&
+            ((mlir::cast<::mlir::FloatAttr>(epsilon).getType().isF32())))) {
         return rewriter.notifyMatchFailure(
             fused_batch_norm_op, [&](::mlir::Diagnostic &diag) {
               diag << "op 'tf.FusedBatchNormV3' attribute 'epsilon' failed to "
@@ -963,7 +967,7 @@ struct FusedBatchNormV3Pat : public ::mlir::RewritePattern {
     int64_t last_dim = ShapedType::kDynamic;
     {
       auto is_last_dim_compatible = [](const Value &v, int64_t &last_dim) {
-        auto v_type = v.getType().dyn_cast_or_null<RankedTensorType>();
+        auto v_type = mlir::dyn_cast_or_null<RankedTensorType>(v.getType());
         if (!v_type) return true;
         int64_t v_last_dim = v_type.getDimSize(v_type.getRank() - 1);
         if (v_last_dim == ShapedType::kDynamic) return true;
@@ -1007,9 +1011,8 @@ struct FusedBatchNormV3Pat : public ::mlir::RewritePattern {
 
     // For training, mean and variance is calculated from input values.
     if (is_training.getValue()) {
-      auto input_type = fused_batch_norm_op.getX()
-                            .getType()
-                            .dyn_cast_or_null<RankedTensorType>();
+      auto input_type = mlir::dyn_cast_or_null<RankedTensorType>(
+          fused_batch_norm_op.getX().getType());
       if (!input_type || input_type.getRank() != 4) {
         return rewriter.notifyMatchFailure(
             fused_batch_norm_op, [&](::mlir::Diagnostic &diag) {
@@ -1383,14 +1386,14 @@ struct ConvertRfftToRfft2d : public RewritePattern {
     auto rfft_op = dyn_cast<TF::RFFTOp>(op);
 
     auto input = rfft_op.getInput();
-    auto input_type = input.getType().dyn_cast_or_null<RankedTensorType>();
+    auto input_type = mlir::dyn_cast_or_null<RankedTensorType>(input.getType());
     if (!input_type) return failure();
     auto fft_len = rfft_op.getFftLength();
-    auto fft_len_type = fft_len.getType().dyn_cast_or_null<ShapedType>();
+    auto fft_len_type = mlir::dyn_cast_or_null<ShapedType>(fft_len.getType());
     if (!fft_len_type) return failure();
 
     auto output_type =
-        rfft_op.getResult().getType().dyn_cast_or_null<RankedTensorType>();
+        mlir::dyn_cast_or_null<RankedTensorType>(rfft_op.getResult().getType());
     if (!output_type) return failure();
 
     // Expanded inputs.
diff --git a/tensorflow/compiler/mlir/lite/transforms/push_transpose_through_ewise.cc b/tensorflow/compiler/mlir/lite/transforms/push_transpose_through_ewise.cc
index 363c30ab0b818c..7a8b35e4be7cde 100644
--- a/tensorflow/compiler/mlir/lite/transforms/push_transpose_through_ewise.cc
+++ b/tensorflow/compiler/mlir/lite/transforms/push_transpose_through_ewise.cc
@@ -30,6 +30,7 @@ limitations under the License.
 #include "mlir/IR/OperationSupport.h"  // from @llvm-project
 #include "mlir/IR/Value.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Support/TypeID.h"  // from @llvm-project
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"  // from @llvm-project
@@ -280,7 +281,7 @@ class CommuteTransposeWithEwiseOps : public RewritePattern {
     }
 
     auto other_input_type =
-        cst_arg->getResult(0).getType().cast<RankedTensorType>();
+        mlir::cast<RankedTensorType>(cst_arg->getResult(0).getType());
 
     Operation *tposed_const;
     if (other_input_type.getNumElements() == 1) {
diff --git a/tensorflow/compiler/mlir/lite/transforms/quantize_variables.cc b/tensorflow/compiler/mlir/lite/transforms/quantize_variables.cc
index 0d9db051ef27ff..96412f20633f6a 100644
--- a/tensorflow/compiler/mlir/lite/transforms/quantize_variables.cc
+++ b/tensorflow/compiler/mlir/lite/transforms/quantize_variables.cc
@@ -33,6 +33,7 @@ limitations under the License.
 #include "mlir/IR/Matchers.h"  // from @llvm-project
 #include "mlir/IR/SymbolTable.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Transforms/RegionUtils.h"  // from @llvm-project
 #include "stablehlo/dialect/StablehloOps.h"  // from @stablehlo
 #include "tensorflow/compiler/mlir/lite/ir/tfl_ops.h"
@@ -169,7 +170,7 @@ void QuantizeVariablesPass::QuantizeVariable(
   for (VarHandleOp var_handle_op : var_handle_ops) {
     builder.setInsertionPoint(var_handle_op);
     auto output_type = UnrankedTensorType::get(TF::ResourceType::get(
-        {ref_qtype.cast<TensorType>()}, builder.getContext()));
+        {mlir::cast<TensorType>(ref_qtype)}, builder.getContext()));
     auto new_var_handle_op = builder.create<VarHandleOp>(
         var_handle_op.getLoc(), output_type, var_handle_op.getContainer(),
         var_handle_op.getSharedName());
diff --git a/tensorflow/compiler/mlir/lite/transforms/reduce_type_precision.cc b/tensorflow/compiler/mlir/lite/transforms/reduce_type_precision.cc
index bee14272020446..659c5aceb39c04 100644
--- a/tensorflow/compiler/mlir/lite/transforms/reduce_type_precision.cc
+++ b/tensorflow/compiler/mlir/lite/transforms/reduce_type_precision.cc
@@ -62,12 +62,12 @@ class CheckRangeAndConvertI8ToI4 : public OpRewritePattern<arith::ConstantOp> {
 
   LogicalResult matchAndRewrite(arith::ConstantOp op,
                                 PatternRewriter &rewriter) const override {
-    auto const_type = op.getType().dyn_cast<ShapedType>();
+    auto const_type = mlir::dyn_cast<ShapedType>(op.getType());
     if (!const_type || !const_type.getElementType().isSignlessInteger(8)) {
       return failure();
     }
 
-    auto attr = op.getValue().cast<ElementsAttr>();
+    auto attr = mlir::cast<ElementsAttr>(op.getValue());
     for (mlir::APInt v : attr.getValues<mlir::APInt>()) {
       auto v_int = static_cast<int8_t>(*(v.getRawData()));
       if (v_int > 7 || v_int < -8) {
@@ -79,7 +79,7 @@ class CheckRangeAndConvertI8ToI4 : public OpRewritePattern<arith::ConstantOp> {
     auto shaped_type =
         mlir::RankedTensorType::get(const_type.getShape(), builder.getI4Type());
     auto newAttr = DenseElementsAttr::getFromRawBuffer(
-        shaped_type, op.getValue().cast<DenseElementsAttr>().getRawData());
+        shaped_type, mlir::cast<DenseElementsAttr>(op.getValue()).getRawData());
     rewriter.replaceOpWithNewOp<arith::ConstantOp>(op, newAttr);
 
     return success();
@@ -92,8 +92,8 @@ class SanitizeGatherOpOutputToI4 : public OpRewritePattern<TFL::GatherOp> {
 
   LogicalResult matchAndRewrite(TFL::GatherOp op,
                                 PatternRewriter &rewriter) const override {
-    auto const_type = op.getOperand(0).getType().dyn_cast<ShapedType>();
-    auto result_type = op.getResult().getType().dyn_cast<ShapedType>();
+    auto const_type = mlir::dyn_cast<ShapedType>(op.getOperand(0).getType());
+    auto result_type = mlir::dyn_cast<ShapedType>(op.getResult().getType());
     if (!const_type || !const_type.getElementType().isSignlessInteger(4) ||
         !result_type || !result_type.getElementType().isSignlessInteger(8)) {
       return failure();
@@ -109,7 +109,8 @@ class SanitizeGatherOpOutputToI4 : public OpRewritePattern<TFL::GatherOp> {
     auto new_gather_op = rewriter.create<TFL::GatherOp>(
         op.getLoc(),
         /*result=*/
-        op.getResult().getType().cast<TensorType>().clone(builder.getI4Type()),
+        mlir::cast<TensorType>(op.getResult().getType())
+            .clone(builder.getI4Type()),
         /*operand=*/op.getOperands(), op->getAttrs());
     rewriter.replaceAllUsesWith(op.getResult(), new_gather_op.getResult());
 
diff --git a/tensorflow/compiler/mlir/lite/transforms/reduce_while_operands.cc b/tensorflow/compiler/mlir/lite/transforms/reduce_while_operands.cc
index c8999216c8054b..ab03af3a4c062a 100644
--- a/tensorflow/compiler/mlir/lite/transforms/reduce_while_operands.cc
+++ b/tensorflow/compiler/mlir/lite/transforms/reduce_while_operands.cc
@@ -104,7 +104,7 @@ void FindProducers(Value start_node, std::vector<uint64_t> &neighbors) {
   while (!queue.empty()) {
     auto node = queue.back();
     queue.pop_back();
-    if (auto arg = node.dyn_cast_or_null<BlockArgument>()) {
+    if (auto arg = mlir::dyn_cast_or_null<BlockArgument>(node)) {
       neighbors.push_back(arg.getArgNumber());
       continue;
     }
@@ -149,7 +149,7 @@ bool AllOperationSafe(Block &block) {
     // Fact: if every op's operands are defined in the same block as op,
     //       then no operation has implicit arugments (constant doesn't count).
     for (auto operand : op->getOperands()) {
-      if (operand.dyn_cast_or_null<BlockArgument>()) continue;
+      if (mlir::dyn_cast_or_null<BlockArgument>(operand)) continue;
       auto operand_op = operand.getDefiningOp();
       if (IsConstant(operand_op)) continue;
       if (operand_op->getBlock() != op->getBlock()) {
diff --git a/tensorflow/compiler/mlir/lite/transforms/unfold_large_splat_constant.cc b/tensorflow/compiler/mlir/lite/transforms/unfold_large_splat_constant.cc
index 1def97523cd668..2669159b0206bb 100644
--- a/tensorflow/compiler/mlir/lite/transforms/unfold_large_splat_constant.cc
+++ b/tensorflow/compiler/mlir/lite/transforms/unfold_large_splat_constant.cc
@@ -24,6 +24,7 @@ limitations under the License.
 #include "mlir/IR/Operation.h"  // from @llvm-project
 #include "mlir/IR/Visitors.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Transforms/DialectConversion.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/lite/ir/tfl_ops.h"
 #include "tensorflow/compiler/mlir/lite/transforms/passes.h"
@@ -62,7 +63,7 @@ class UnfoldLargeSplatConstantPass
   void MaybeUnfoldLargeSplatConstant(mlir::OpBuilder* op_builder,
                                      mlir::arith::ConstantOp const_op) const {
     auto splat_elements_attr =
-        const_op.getValue().dyn_cast<SplatElementsAttr>();
+        mlir::dyn_cast<SplatElementsAttr>(const_op.getValue());
     if (!splat_elements_attr) {
       return;
     }
diff --git a/tensorflow/compiler/mlir/lite/transforms/while_loop_outline.cc b/tensorflow/compiler/mlir/lite/transforms/while_loop_outline.cc
index a3c3ece3dc94a1..013abb6ec0ea80 100644
--- a/tensorflow/compiler/mlir/lite/transforms/while_loop_outline.cc
+++ b/tensorflow/compiler/mlir/lite/transforms/while_loop_outline.cc
@@ -29,6 +29,7 @@ limitations under the License.
 #include "mlir/IR/Matchers.h"  // from @llvm-project
 #include "mlir/IR/SymbolTable.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Transforms/RegionUtils.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/lite/ir/tfl_ops.h"
 #include "tensorflow/compiler/mlir/lite/transforms/passes.h"
@@ -92,13 +93,13 @@ bool IsCompatibleTypeWithTFLCastOp(Type type) {
     return true;
 
   // Complex<F<32>> is allowed.
-  if (elemType.isa<ComplexType>() &&
-      elemType.cast<ComplexType>().getElementType().isF32())
+  if (mlir::isa<ComplexType>(elemType) &&
+      mlir::cast<ComplexType>(elemType).getElementType().isF32())
     return true;
 
   // QUINT8 and UI8 are allowed.
-  if (elemType.isa<TF::Quint8Type>() ||
-      (elemType.isInteger(8) && elemType.cast<IntegerType>().isUnsigned()))
+  if (mlir::isa<TF::Quint8Type>(elemType) ||
+      (elemType.isInteger(8) && mlir::cast<IntegerType>(elemType).isUnsigned()))
     return true;
 
   return false;
diff --git a/tensorflow/compiler/mlir/lite/utils/arithmetic_count_util.h b/tensorflow/compiler/mlir/lite/utils/arithmetic_count_util.h
index ac170f33d9ba85..c851d73b03290d 100644
--- a/tensorflow/compiler/mlir/lite/utils/arithmetic_count_util.h
+++ b/tensorflow/compiler/mlir/lite/utils/arithmetic_count_util.h
@@ -17,6 +17,7 @@ limitations under the License.
 
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/IR/Operation.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 
 namespace mlir {
 namespace TFL {
@@ -27,7 +28,7 @@ class ArithmeticCountUtilHelper {
   static bool GetFirstOutputCount(mlir::Operation* op, int64_t* count) {
     auto output = op->getResult(0);
     auto output_type =
-        output.getType().dyn_cast_or_null<mlir::RankedTensorType>();
+        mlir::dyn_cast_or_null<mlir::RankedTensorType>(output.getType());
     if (!output_type || !output_type.hasStaticShape()) return false;
 
     *count = output_type.getNumElements();
@@ -38,7 +39,7 @@ class ArithmeticCountUtilHelper {
     int64_t total_count = 0;
     for (auto input : op->getOperands()) {
       auto input_type =
-          input.getType().dyn_cast_or_null<mlir::RankedTensorType>();
+          mlir::dyn_cast_or_null<mlir::RankedTensorType>(input.getType());
       if (!input_type || !input_type.hasStaticShape()) {
         return false;
       }
@@ -54,12 +55,12 @@ class ArithmeticCountUtilHelper {
                                                            int64_t* count) {
     auto weight = op->getOperand(1);
     auto weight_type =
-        weight.getType().dyn_cast_or_null<mlir::RankedTensorType>();
+        mlir::dyn_cast_or_null<mlir::RankedTensorType>(weight.getType());
     if (weight_type == nullptr || !weight_type.hasStaticShape()) return false;
 
     auto output = op->getResult(0);
     auto output_type =
-        output.getType().dyn_cast_or_null<mlir::RankedTensorType>();
+        mlir::dyn_cast_or_null<mlir::RankedTensorType>(output.getType());
     if (output_type == nullptr || !output_type.hasStaticShape()) return false;
 
     int64_t cols = 1;
@@ -73,7 +74,7 @@ class ArithmeticCountUtilHelper {
     auto bias = op->getOperand(2);
     if (bias) {
       auto bias_type =
-          bias.getType().dyn_cast_or_null<mlir::RankedTensorType>();
+          mlir::dyn_cast_or_null<mlir::RankedTensorType>(bias.getType());
       if (bias_type && bias_type.hasStaticShape()) {
         *count += output_type.getNumElements();
       }
diff --git a/tensorflow/compiler/mlir/lite/utils/attribute_utils.cc b/tensorflow/compiler/mlir/lite/utils/attribute_utils.cc
index 20336080cc20d6..1629000ff181df 100644
--- a/tensorflow/compiler/mlir/lite/utils/attribute_utils.cc
+++ b/tensorflow/compiler/mlir/lite/utils/attribute_utils.cc
@@ -15,23 +15,24 @@ limitations under the License.
 
 #include "mlir/IR/BuiltinAttributes.h"  // from @llvm-project
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 
 namespace mlir {
 namespace TFL {
 
 FloatAttr ExtractSingleElementAsFloat(ElementsAttr attr) {
   if (attr.getShapedType().getNumElements() != 1 ||
-      !attr.getShapedType().getElementType().isa<FloatType>()) {
+      !mlir::isa<FloatType>(attr.getShapedType().getElementType())) {
     return {};
   }
   return attr.getSplatValue<FloatAttr>();
 }
 
 FloatAttr GetSingleElementAsFloatOrSelf(Attribute attr) {
-  if (auto m = attr.dyn_cast_or_null<ElementsAttr>()) {
+  if (auto m = mlir::dyn_cast_or_null<ElementsAttr>(attr)) {
     return ExtractSingleElementAsFloat(m);
   } else {
-    return attr.dyn_cast_or_null<FloatAttr>();
+    return mlir::dyn_cast_or_null<FloatAttr>(attr);
   }
 }
 
diff --git a/tensorflow/compiler/mlir/lite/utils/const_tensor_utils.cc b/tensorflow/compiler/mlir/lite/utils/const_tensor_utils.cc
index 96d75cca30a48d..d00fec3182525c 100644
--- a/tensorflow/compiler/mlir/lite/utils/const_tensor_utils.cc
+++ b/tensorflow/compiler/mlir/lite/utils/const_tensor_utils.cc
@@ -131,11 +131,11 @@ StatusOr<QuantizedType> GetQuantizedType(const TensorT& tensor, Builder builder,
 
   if (!storage_type) {
     const mlir::Type raw_elem_type = ConvertElementType(tensor.type, builder);
-    if (!raw_elem_type.isa<mlir::IntegerType>()) {
+    if (!mlir::isa<mlir::IntegerType>(raw_elem_type)) {
       return absl::InvalidArgumentError(
           "Quantized tensors must be stored as integers");
     }
-    storage_type = raw_elem_type.cast<mlir::IntegerType>();
+    storage_type = mlir::cast<mlir::IntegerType>(raw_elem_type);
   }
 
   // TFlite uses narrow-range [u]int8 for constant buffers of quantized weights.
@@ -254,11 +254,11 @@ mlir::ElementsAttr GetSplat(RankedTensorType type, int unique_index,
     return DenseElementsAttr::get(
         type, builder.getIntegerAttr(element_ty, unique_index));
 
-  if (element_ty.isa<mlir::FloatType>())
+  if (mlir::isa<mlir::FloatType>(element_ty))
     return DenseElementsAttr::get(
         type, builder.getFloatAttr(element_ty, unique_index));
 
-  if (auto qtype = element_ty.dyn_cast<QuantizedType>()) {
+  if (auto qtype = mlir::dyn_cast<QuantizedType>(element_ty)) {
     mlir::RankedTensorType new_type = tensorflow::GetTypeFromTFTensorShape(
         type.getShape(), qtype.getStorageType());
     return DenseElementsAttr::get(
@@ -272,9 +272,10 @@ StatusOr<mlir::ElementsAttr> ConvertIntBuffer(
     bool truncate) {
   mlir::Type elem_type = shaped_type.getElementType();
   unsigned bit_width;
-  if (auto itype = elem_type.dyn_cast<mlir::IntegerType>()) {
+  if (auto itype = mlir::dyn_cast<mlir::IntegerType>(elem_type)) {
     bit_width = itype.getWidth();
-  } else if (auto qtype = elem_type.dyn_cast<mlir::quant::QuantizedType>()) {
+  } else if (auto qtype =
+                 mlir::dyn_cast<mlir::quant::QuantizedType>(elem_type)) {
     bit_width = qtype.getStorageTypeIntegralWidth();
     shaped_type = tensorflow::GetTypeFromTFTensorShape(shaped_type.getShape(),
                                                        qtype.getStorageType());
diff --git a/tensorflow/compiler/mlir/lite/utils/constant_utils.cc b/tensorflow/compiler/mlir/lite/utils/constant_utils.cc
index 8bf3b4f0106604..6a4dbf3e505ba6 100644
--- a/tensorflow/compiler/mlir/lite/utils/constant_utils.cc
+++ b/tensorflow/compiler/mlir/lite/utils/constant_utils.cc
@@ -56,7 +56,8 @@ absl::StatusOr<TypedAttr> CreateTypedAttr(ShapedType shaped_type, int value) {
   } else if (element_type.isF32()) {
     return DenseElementsAttr::get<float>(shaped_type,
                                          static_cast<float>(value));
-  } else if (auto complex_type = element_type.dyn_cast<mlir::ComplexType>()) {
+  } else if (auto complex_type =
+                 mlir::dyn_cast<mlir::ComplexType>(element_type)) {
     auto etype = complex_type.getElementType();
     if (etype.isF32()) {
       tensorflow::TensorProto repr;
@@ -77,7 +78,7 @@ absl::StatusOr<TypedAttr> CreateTypedAttr(ShapedType shaped_type, int value) {
       return tensorflow::Status(absl::StatusCode::kInvalidArgument,
                                 "Unsupported type");
     }
-  } else if (auto itype = element_type.dyn_cast<mlir::IntegerType>()) {
+  } else if (auto itype = mlir::dyn_cast<mlir::IntegerType>(element_type)) {
     if (element_type.isSignedInteger()) {
       switch (itype.getWidth()) {
         case 8:
diff --git a/tensorflow/compiler/mlir/lite/utils/convert_type.cc b/tensorflow/compiler/mlir/lite/utils/convert_type.cc
index f2e659b9aea9ce..7091e5ad155431 100644
--- a/tensorflow/compiler/mlir/lite/utils/convert_type.cc
+++ b/tensorflow/compiler/mlir/lite/utils/convert_type.cc
@@ -18,6 +18,7 @@ limitations under the License.
 #include "mlir/IR/Builders.h"  // from @llvm-project
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/IR/Types.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/lite/ir/tfl_ops.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_types.h"
 #include "xla/statusor.h"
@@ -40,16 +41,16 @@ tflite::TensorType ConvertTypeToTensorType(mlir::Type type) {
     return tflite::TensorType_FLOAT32;
   } else if (type.isF64()) {
     return tflite::TensorType_FLOAT64;
-  } else if (type.isa<mlir::TF::StringType>()) {
+  } else if (mlir::isa<mlir::TF::StringType>(type)) {
     return tflite::TensorType_STRING;
-  } else if (auto complex_type = type.dyn_cast<mlir::ComplexType>()) {
+  } else if (auto complex_type = mlir::dyn_cast<mlir::ComplexType>(type)) {
     if (complex_type.getElementType().isF32()) {
       return tflite::TensorType_COMPLEX64;
     } else if (complex_type.getElementType().isF64()) {
       return tflite::TensorType_COMPLEX128;
     }
     llvm_unreachable("invalid complex Type in conversion");
-  } else if (auto itype = type.dyn_cast<mlir::IntegerType>()) {
+  } else if (auto itype = mlir::dyn_cast<mlir::IntegerType>(type)) {
     switch (itype.getWidth()) {
       case 1:
         return tflite::TensorType_BOOL;
@@ -209,7 +210,7 @@ absl::StatusOr<tflite::TensorType> TfTypeToTflType(tensorflow::DataType type) {
 
 mlir::Type GetShapeStrippedType(mlir::TypeAttr type_attr) {
   auto type = type_attr.getValue();
-  auto shaped_type = type.dyn_cast<mlir::ShapedType>();
+  auto shaped_type = mlir::dyn_cast<mlir::ShapedType>(type);
   if (shaped_type) {
     return shaped_type.getElementType();
   } else {
diff --git a/tensorflow/compiler/mlir/lite/utils/fake_quant_utils.h b/tensorflow/compiler/mlir/lite/utils/fake_quant_utils.h
index 77b047f68c6bf2..d1dcf8c304b0a9 100644
--- a/tensorflow/compiler/mlir/lite/utils/fake_quant_utils.h
+++ b/tensorflow/compiler/mlir/lite/utils/fake_quant_utils.h
@@ -123,7 +123,7 @@ class InsertTFLQuantOpsAfterTFFakeQuantOp {
     int quant_dim = -1;
     if (PerAxis) {
       // This is a special case that the quant_dim is the last dimensions.
-      quant_dim = res.getType().template cast<ShapedType>().getRank() - 1;
+      quant_dim = mlir::cast<ShapedType>(res.getType()).getRank() - 1;
     }
     // Use the min/max from the operands and the num_bits and narrow_range
     // attribute to create the quantization parameter for the new quantize op.
diff --git a/tensorflow/compiler/mlir/lite/utils/lstm_utils.cc b/tensorflow/compiler/mlir/lite/utils/lstm_utils.cc
index 0a563238635d20..bada49a68a9e55 100644
--- a/tensorflow/compiler/mlir/lite/utils/lstm_utils.cc
+++ b/tensorflow/compiler/mlir/lite/utils/lstm_utils.cc
@@ -127,7 +127,7 @@ Value Reverse(OpBuilder* builder, Value value_to_reverse, int axis,
 }
 
 ArrayRef<int64_t> GetRankedTensorShape(Value value) {
-  return value.getType().cast<RankedTensorType>().getShape();
+  return mlir::cast<RankedTensorType>(value.getType()).getShape();
 }
 
 Value SliceRankedTensor(OpBuilder* builder, Value input,
@@ -159,7 +159,7 @@ Value SliceRankedTensor(OpBuilder* builder, Value input,
       location,
       RankedTensorType::get(
           size_values,
-          input.getType().cast<RankedTensorType>().getElementType()),
+          mlir::cast<RankedTensorType>(input.getType()).getElementType()),
       input, slice_i2c_begin, slice_i2c_size);
 }
 
@@ -170,7 +170,8 @@ Value CreateStridedSliceOp(mlir::Location loc, ArrayRef<int64_t> output_shape,
                            int64_t ellipsis_mask, int64_t new_axis_mask,
                            int64_t shrink_axis_mask, OpBuilder* builder) {
   auto output_type = RankedTensorType::get(
-      output_shape, input.getType().cast<RankedTensorType>().getElementType());
+      output_shape,
+      mlir::cast<RankedTensorType>(input.getType()).getElementType());
   auto begin_tensor = CreateI32DenseConst(builder, begin, loc);
   auto end_tensor = CreateI32DenseConst(builder, end, loc);
   auto strides_tensor = CreateI32DenseConst(builder, strides, loc);
@@ -387,7 +388,8 @@ void ConvertLSTMCellSimpleToFusedLSTM::UpdateFuncSignature() {
   SmallVector<int64_t, 2> output_shape{1, tensorflow::kTFDynamicSize};
   auto input_types = fused_func_op_.getFunctionType().getInputs();
   auto output_type = tensorflow::GetTypeFromTFTensorShape(
-      output_shape, input_.getType().cast<RankedTensorType>().getElementType());
+      output_shape,
+      mlir::cast<RankedTensorType>(input_.getType()).getElementType());
   fused_func_op_.setType(mlir::FunctionType::get(fused_func_op_.getContext(),
                                                  input_types, output_type));
 }
@@ -410,7 +412,8 @@ LogicalResult ConvertLSTMCellSimpleToFusedLSTM::RewriteFunc() {
   // Create the fused LSTM op.
   SmallVector<int64_t, 2> output_shape = {1, n_output_};
   auto result_type = mlir::RankedTensorType::get(
-      output_shape, input_.getType().cast<RankedTensorType>().getElementType());
+      output_shape,
+      mlir::cast<RankedTensorType>(input_.getType()).getElementType());
   lstm_ = builder_.create<mlir::TFL::LSTMOp>(
       fused_func_op_.getLoc(), result_type, input_, input2input_, input2forget_,
       input2cell_, input2output_, rec2input_, rec2forget_, rec2cell_,
@@ -436,7 +439,7 @@ LogicalResult ConvertLSTMCellSimpleToFusedLSTM::RewriteFunc() {
   SmallVector<int64_t, 2> func_output_shape = {1, tensorflow::kTFDynamicSize};
   auto func_result_type = tensorflow::GetTypeFromTFTensorShape(
       func_output_shape,
-      input_.getType().cast<RankedTensorType>().getElementType());
+      mlir::cast<RankedTensorType>(input_.getType()).getElementType());
 
   auto tensor_cast = builder_.create<mlir::tensor::CastOp>(
       fused_func_op_.getLoc(), func_result_type, lstm_.getResult());
@@ -491,7 +494,7 @@ LogicalResult ConvertLSTMCellSimpleToFusedLSTM::Initialize() {
   bias_ = fused_func_op_.getArgument(2);
 
   weight_ = fused_func_op_.getArgument(1);
-  weight_type_ = weight_.getType().cast<RankedTensorType>();
+  weight_type_ = mlir::cast<RankedTensorType>(weight_.getType());
 
   if (weight_type_.getRank() != 2) {
     return fused_func_op_.emitError() << "The weight tensor was not of rank 2";
@@ -505,7 +508,7 @@ LogicalResult ConvertLSTMCellSimpleToFusedLSTM::Initialize() {
   n_cell_ = weight_type_.getDimSize(1) / num_gates_;
 
   projection_ = fused_func_op_.getArgument(3);
-  projection_type_ = projection_.getType().cast<RankedTensorType>();
+  projection_type_ = mlir::cast<RankedTensorType>(projection_.getType());
   if (projection_type_.getRank() != 2) {
     n_output_ = n_cell_;
   } else {
@@ -532,7 +535,8 @@ LogicalResult ConvertLayerNormalizedLSTMCellSimpleToFusedLSTM::Initialize() {
   }
 
   layer_norm_scale_ = fused_func_op_.getArgument(4);
-  layer_norm_scale_type_ = layer_norm_scale_.getType().cast<RankedTensorType>();
+  layer_norm_scale_type_ =
+      mlir::cast<RankedTensorType>(layer_norm_scale_.getType());
   if (layer_norm_scale_type_.getRank() != 1) {
     return fused_func_op_.emitError()
            << "The layer_norm_scale tensor was not of rank 1";
@@ -607,7 +611,7 @@ TF::ReshapeOp CreateFlattenOP(const Value& input, Location loc,
 LogicalResult CreateEqualSizeSplitVOp(Value input, int axis, int splits,
                                       Location loc, OpBuilder* builder,
                                       Operation** result) {
-  auto input_type = input.getType().cast<RankedTensorType>();
+  auto input_type = mlir::cast<RankedTensorType>(input.getType());
   SmallVector<int64_t, 4> output_shape;
   int size_of_splits;
   if (input_type.getRank() < axis || axis < 0) return failure();
@@ -666,7 +670,7 @@ LogicalResult ConvertKerasLSTMLayer(mlir::func::FuncOp func_op,
   if (time_major_attr == nullptr) return failure();
 
   bool time_majored = time_major_attr.getValue();
-  auto input_type = input.getType().dyn_cast_or_null<RankedTensorType>();
+  auto input_type = mlir::dyn_cast_or_null<RankedTensorType>(input.getType());
   if (!input_type) {
     func_op.emitError() << "Input type is not a ranked tensor type";
     return failure();
@@ -692,7 +696,7 @@ LogicalResult ConvertKerasLSTMLayer(mlir::func::FuncOp func_op,
 
   // Setup correct weights.
   RankedTensorType weight_type =
-      weight_kernel.getType().cast<RankedTensorType>();
+      mlir::cast<RankedTensorType>(weight_kernel.getType());
   if (weight_type.getRank() != 2)
     return func_op.emitError() << "The weight should be rank of 2";
 
@@ -700,7 +704,7 @@ LogicalResult ConvertKerasLSTMLayer(mlir::func::FuncOp func_op,
       Transpose2D(builder, weight_kernel, weight_type, func_op.getLoc());
 
   RankedTensorType recurrent_kernel_type =
-      recurrent_kernel.getType().cast<RankedTensorType>();
+      mlir::cast<RankedTensorType>(recurrent_kernel.getType());
   const int64_t n_output = recurrent_kernel_type.getDimSize(0);
 
   Value transpose_recurrent_kernel = Transpose2D(
@@ -726,28 +730,28 @@ LogicalResult ConvertKerasLSTMLayer(mlir::func::FuncOp func_op,
   // IndyLSTMs are a LSTM variant with diagonal recurrent weight
   // matrices. For optimization purposes these are provided as vectors.
   Value recurrent_to_input_weights =
-      indy ? CreateFlattenOP(recurrent_weights_array->getResult(0),
-                             func_op.getLoc(), builder)
-                 .getResult()
-                 .cast<Value>()
+      indy ? mlir::cast<Value>(
+                 CreateFlattenOP(recurrent_weights_array->getResult(0),
+                                 func_op.getLoc(), builder)
+                     .getResult())
            : recurrent_weights_array->getResult(0);
   Value recurrent_to_forget_weights =
-      indy ? CreateFlattenOP(recurrent_weights_array->getResult(1),
-                             func_op.getLoc(), builder)
-                 .getResult()
-                 .cast<Value>()
+      indy ? mlir::cast<Value>(
+                 CreateFlattenOP(recurrent_weights_array->getResult(1),
+                                 func_op.getLoc(), builder)
+                     .getResult())
            : recurrent_weights_array->getResult(1);
   Value recurrent_to_cell_weights =
-      indy ? CreateFlattenOP(recurrent_weights_array->getResult(2),
-                             func_op.getLoc(), builder)
-                 .getResult()
-                 .cast<Value>()
+      indy ? mlir::cast<Value>(
+                 CreateFlattenOP(recurrent_weights_array->getResult(2),
+                                 func_op.getLoc(), builder)
+                     .getResult())
            : recurrent_weights_array->getResult(2);
   Value recurrent_to_output_weights =
-      indy ? CreateFlattenOP(recurrent_weights_array->getResult(3),
-                             func_op.getLoc(), builder)
-                 .getResult()
-                 .cast<Value>()
+      indy ? mlir::cast<Value>(
+                 CreateFlattenOP(recurrent_weights_array->getResult(3),
+                                 func_op.getLoc(), builder)
+                     .getResult())
            : recurrent_weights_array->getResult(3);
 
   // Splits the bias into 4:
@@ -765,7 +769,7 @@ LogicalResult ConvertKerasLSTMLayer(mlir::func::FuncOp func_op,
   }
   auto result_type = mlir::RankedTensorType::get(
       output_shape,
-      final_inputs.getType().cast<RankedTensorType>().getElementType());
+      mlir::cast<RankedTensorType>(final_inputs.getType()).getElementType());
 
   Value none = CreateNoneValue(builder, func_op.getLoc());
   auto lstm = builder->create<mlir::TFL::UnidirectionalSequenceLSTMOp>(
@@ -866,7 +870,8 @@ LogicalResult ConvertKerasLSTMLayer(mlir::func::FuncOp func_op,
 
   // All the rest: states, device.
   for (int i = 2; i < 5; ++i) {
-    auto result_type = func_op.getResultTypes()[i].dyn_cast<RankedTensorType>();
+    auto result_type =
+        mlir::dyn_cast<RankedTensorType>(func_op.getResultTypes()[i]);
     outputs.push_back(CreatTfF32ConstOp(builder, result_type.getShape(), 0.0f,
                                         func_op.getLoc()));
     output_types.push_back(result_type);
diff --git a/tensorflow/compiler/mlir/lite/utils/lstm_utils_test.cc b/tensorflow/compiler/mlir/lite/utils/lstm_utils_test.cc
index 342bbb5c7fe382..7fe7ae8404137c 100644
--- a/tensorflow/compiler/mlir/lite/utils/lstm_utils_test.cc
+++ b/tensorflow/compiler/mlir/lite/utils/lstm_utils_test.cc
@@ -134,22 +134,18 @@ TEST_F(LstmUtilsTest, ConvertLSTMCellSimple) {
 
   auto transpose_op = fused_lstm_func_.getBody().front().begin();
   transpose_op++;
-  EXPECT_EQ(
-      transpose_op->getOperand(0).getType().cast<RankedTensorType>().getDimSize(
-          0),
-      3);
-  EXPECT_EQ(
-      transpose_op->getOperand(0).getType().cast<RankedTensorType>().getDimSize(
-          1),
-      12);
-  EXPECT_EQ(
-      transpose_op->getResult(0).getType().cast<RankedTensorType>().getDimSize(
-          0),
-      12);
-  EXPECT_EQ(
-      transpose_op->getResult(0).getType().cast<RankedTensorType>().getDimSize(
-          1),
-      3);
+  EXPECT_EQ(mlir::cast<RankedTensorType>(transpose_op->getOperand(0).getType())
+                .getDimSize(0),
+            3);
+  EXPECT_EQ(mlir::cast<RankedTensorType>(transpose_op->getOperand(0).getType())
+                .getDimSize(1),
+            12);
+  EXPECT_EQ(mlir::cast<RankedTensorType>(transpose_op->getResult(0).getType())
+                .getDimSize(0),
+            12);
+  EXPECT_EQ(mlir::cast<RankedTensorType>(transpose_op->getResult(0).getType())
+                .getDimSize(1),
+            3);
 
   auto it = fused_lstm_func_.getBody().back().rbegin();
   EXPECT_EQ(it->getName().getStringRef(),
@@ -161,33 +157,31 @@ TEST_F(LstmUtilsTest, ConvertLSTMCellSimple) {
   EXPECT_EQ(it->getNumOperands(), 24);
   EXPECT_EQ(it->getNumResults(), 1);
   // cifg = false, so input2input is not None.
-  EXPECT_FALSE(it->getOperand(1).getType().isa<NoneType>());
+  EXPECT_FALSE(mlir::isa<NoneType>(it->getOperand(1).getType()));
   // input layer norm is None
-  EXPECT_TRUE(it->getOperand(20).getType().isa<NoneType>());
+  EXPECT_TRUE(mlir::isa<NoneType>(it->getOperand(20).getType()));
   // proj_bias is F32
-  EXPECT_TRUE(it->getOperand(17)
-                  .getType()
-                  .cast<RankedTensorType>()
+  EXPECT_TRUE(mlir::cast<RankedTensorType>(it->getOperand(17).getType())
                   .getElementType()
                   .isF32());
 
   // output gate bias is 0 since it is out of bounds of the bias tensor, so
   // we set its value as a const tensor of specified size and value 0.
-  EXPECT_TRUE(mlir::cast<mlir::arith::ConstantOp>(
-                  it->getOpOperand(15).get().getDefiningOp())
-                  .getValue()
-                  .cast<ElementsAttr>()
-                  .getValues<FloatAttr>()[0]
-                  .getValue()
-                  .isExactlyValue(0.0f));
+  EXPECT_TRUE(
+      mlir::cast<ElementsAttr>(mlir::cast<mlir::arith::ConstantOp>(
+                                   it->getOpOperand(15).get().getDefiningOp())
+                                   .getValue())
+          .getValues<FloatAttr>()[0]
+          .getValue()
+          .isExactlyValue(0.0f));
 
   EXPECT_EQ(fused_lstm_func_.getFunctionType().getNumResults(), 1);
   auto output_types = fused_lstm_func_.getFunctionType().getResults();
   SmallVector<int64_t, 2> output_shape{1, mlir::ShapedType::kDynamic};
-  EXPECT_EQ(output_types[0].cast<RankedTensorType>().getShape().size(),
+  EXPECT_EQ(mlir::cast<RankedTensorType>(output_types[0]).getShape().size(),
             output_shape.size());
   for (int i = 0; i < output_shape.size(); i++) {
-    EXPECT_EQ(output_types[0].cast<RankedTensorType>().getDimSize(i),
+    EXPECT_EQ(mlir::cast<RankedTensorType>(output_types[0]).getDimSize(i),
               output_shape[i]);
   }
 }
@@ -215,7 +209,7 @@ TEST_F(LstmUtilsTest, ConvertLSTMCellSimpleToFusedLSTMCoupleInputForget) {
   EXPECT_EQ(it->getNumOperands(), 24);
   EXPECT_EQ(it->getNumResults(), 1);
   // cifg = true, so input2input is None.
-  EXPECT_TRUE(it->getOperand(1).getType().isa<NoneType>());
+  EXPECT_TRUE(mlir::isa<NoneType>(it->getOperand(1).getType()));
 }
 
 TEST_F(LstmUtilsTest, ConvertLayerNormLSTMCellSimpleToFusedLSTM) {
@@ -242,23 +236,25 @@ TEST_F(LstmUtilsTest, ConvertLayerNormLSTMCellSimpleToFusedLSTM) {
   EXPECT_EQ(it->getNumOperands(), 24);
   EXPECT_EQ(it->getNumResults(), 1);
   // cifg = false, so input2input is not None.
-  EXPECT_FALSE(it->getOperand(1).getType().isa<NoneType>());
+  EXPECT_FALSE(mlir::isa<NoneType>(it->getOperand(1).getType()));
 
   // input layer norm
-  EXPECT_FALSE(it->getOperand(20).getType().isa<NoneType>());
+  EXPECT_FALSE(mlir::isa<NoneType>(it->getOperand(20).getType()));
+  EXPECT_EQ(mlir::cast<RankedTensorType>(it->getOperand(20).getType())
+                .getShape()
+                .size(),
+            1);
   EXPECT_EQ(
-      it->getOperand(20).getType().cast<RankedTensorType>().getShape().size(),
-      1);
-  EXPECT_EQ(it->getOperand(20).getType().cast<RankedTensorType>().getDimSize(0),
-            3);
+      mlir::cast<RankedTensorType>(it->getOperand(20).getType()).getDimSize(0),
+      3);
 
   EXPECT_EQ(fused_ln_lstm_func_.getFunctionType().getNumResults(), 1);
   auto output_types = fused_ln_lstm_func_.getFunctionType().getResults();
   SmallVector<int64_t, 2> output_shape{1, mlir::ShapedType::kDynamic};
-  EXPECT_EQ(output_types[0].cast<RankedTensorType>().getShape().size(),
+  EXPECT_EQ(mlir::cast<RankedTensorType>(output_types[0]).getShape().size(),
             output_shape.size());
   for (int i = 0; i < output_shape.size(); i++) {
-    EXPECT_EQ(output_types[0].cast<RankedTensorType>().getDimSize(i),
+    EXPECT_EQ(mlir::cast<RankedTensorType>(output_types[0]).getDimSize(i),
               output_shape[i]);
   }
 }
diff --git a/tensorflow/compiler/mlir/lite/utils/nms_utils.cc b/tensorflow/compiler/mlir/lite/utils/nms_utils.cc
index 5633068509faf4..cab3df456c0e00 100644
--- a/tensorflow/compiler/mlir/lite/utils/nms_utils.cc
+++ b/tensorflow/compiler/mlir/lite/utils/nms_utils.cc
@@ -18,6 +18,7 @@ limitations under the License.
 #include <string>
 
 #include "mlir/Dialect/Func/IR/FuncOps.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/lite/ir/tfl_ops.h"
 
 namespace mlir {
@@ -74,7 +75,7 @@ LogicalResult ConvertNMSPaddedFunc::VerifySignature() {
   // The TFLite fused op does not support batching yet.
   // TODO(b/158709815): Add support for batches with padded NMS.
   auto boxes_type =
-      func_.getFunctionType().getInput(0).dyn_cast<RankedTensorType>();
+      mlir::dyn_cast<RankedTensorType>(func_.getFunctionType().getInput(0));
   if (boxes_type == nullptr || !boxes_type.hasRank() ||
       boxes_type.getRank() != 2) {
     return func_.emitWarning() << "TFLite does not support batched input for "
@@ -121,7 +122,7 @@ LogicalResult ConvertSSDPostProcessFunc::CreateNMSCustomOptions(
       failed(AddFloatAttr(func, attrs, "w_scale", &fbb)))
     return failure();
   auto use_regular_nms =
-      attrs.get("use_regular_nms").dyn_cast_or_null<BoolAttr>();
+      mlir::dyn_cast_or_null<BoolAttr>(attrs.get("use_regular_nms"));
   if (!use_regular_nms) {
     return func.emitError()
            << "use_regular_nms attribute is not set or not a bool";
@@ -137,7 +138,7 @@ LogicalResult ConvertSSDPostProcessFunc::CreateNMSCustomOptions(
 LogicalResult ConvertSSDPostProcessFunc::AddIntAttr(
     func::FuncOp func, DictionaryAttr attrs, const std::string& attribute,
     flexbuffers::Builder* builder) {
-  auto int_attr = attrs.get(attribute).dyn_cast_or_null<IntegerAttr>();
+  auto int_attr = mlir::dyn_cast_or_null<IntegerAttr>(attrs.get(attribute));
   if (!int_attr) {
     return func.emitError()
            << attribute.c_str() << " attribute is not set or not an integer";
@@ -149,7 +150,7 @@ LogicalResult ConvertSSDPostProcessFunc::AddIntAttr(
 LogicalResult ConvertSSDPostProcessFunc::AddFloatAttr(
     func::FuncOp func, DictionaryAttr attrs, const std::string& attribute,
     flexbuffers::Builder* builder) {
-  auto float_attr = attrs.get(attribute).dyn_cast_or_null<FloatAttr>();
+  auto float_attr = mlir::dyn_cast_or_null<FloatAttr>(attrs.get(attribute));
   if (!float_attr) {
     return func.emitError()
            << attribute.c_str() << " attribute is not set or not a float";
@@ -160,7 +161,7 @@ LogicalResult ConvertSSDPostProcessFunc::AddFloatAttr(
 
 LogicalResult ConvertSSDPostProcessFunc::HasIntAttr(
     func::FuncOp func, DictionaryAttr attrs, const std::string& attribute) {
-  auto int_attr = attrs.get(attribute).dyn_cast_or_null<IntegerAttr>();
+  auto int_attr = mlir::dyn_cast_or_null<IntegerAttr>(attrs.get(attribute));
   if (!int_attr) {
     return func.emitWarning()
            << attribute.c_str() << " attribute is not set or not an integer";
@@ -170,7 +171,7 @@ LogicalResult ConvertSSDPostProcessFunc::HasIntAttr(
 
 LogicalResult ConvertSSDPostProcessFunc::HasFloatAttr(
     func::FuncOp func, DictionaryAttr attrs, const std::string& attribute) {
-  auto float_attr = attrs.get(attribute).dyn_cast_or_null<FloatAttr>();
+  auto float_attr = mlir::dyn_cast_or_null<FloatAttr>(attrs.get(attribute));
   if (!float_attr) {
     return func.emitWarning()
            << attribute.c_str() << " attribute is not set or not a float";
diff --git a/tensorflow/compiler/mlir/lite/utils/perception_ops_utils.cc b/tensorflow/compiler/mlir/lite/utils/perception_ops_utils.cc
index c7944b67406907..98cc1048bced90 100644
--- a/tensorflow/compiler/mlir/lite/utils/perception_ops_utils.cc
+++ b/tensorflow/compiler/mlir/lite/utils/perception_ops_utils.cc
@@ -21,6 +21,7 @@ limitations under the License.
 #include "mlir/IR/OpDefinition.h"  // from @llvm-project
 #include "mlir/IR/Types.h"  // from @llvm-project
 #include "mlir/IR/Value.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/lite/ir/tfl_ops.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
@@ -45,14 +46,15 @@ inline LogicalResult HasIntegerArrayWithSize(func::FuncOp* func,
                                              const DictionaryAttr& attrs,
                                              const std::string& attr_name,
                                              int N) {
-  ArrayAttr array_attr = attrs.get(attr_name).dyn_cast_or_null<ArrayAttr>();
+  ArrayAttr array_attr =
+      mlir::dyn_cast_or_null<ArrayAttr>(attrs.get(attr_name));
   if (array_attr == nullptr || array_attr.size() != N) {
     return func->emitWarning()
            << "'" << attr_name << "' attribute for " << kMaxUnpooling
            << " must be set and has size of " << N;
   }
   for (Attribute integer_attr : array_attr.getValue()) {
-    IntegerAttr value = integer_attr.dyn_cast<IntegerAttr>();
+    IntegerAttr value = mlir::dyn_cast<IntegerAttr>(integer_attr);
     if (!value) {
       return func->emitWarning()
              << "'" << attr_name << "' attribute for " << kMaxUnpooling
@@ -66,7 +68,8 @@ inline LogicalResult GetIntegerArraySafe(
     func::FuncOp* func, const DictionaryAttr& attrs,
     const std::string& attr_name, llvm::SmallVectorImpl<int32_t>* results,
     int N) {
-  ArrayAttr array_attr = attrs.get(attr_name).dyn_cast_or_null<ArrayAttr>();
+  ArrayAttr array_attr =
+      mlir::dyn_cast_or_null<ArrayAttr>(attrs.get(attr_name));
   if (array_attr == nullptr || array_attr.size() != N) {
     return func->emitError()
            << "'" << attr_name << "' attribute for " << kMaxUnpooling
@@ -75,7 +78,7 @@ inline LogicalResult GetIntegerArraySafe(
   results->reserve(N);
 
   for (Attribute integer_attr : array_attr.getValue()) {
-    IntegerAttr value = integer_attr.dyn_cast<IntegerAttr>();
+    IntegerAttr value = mlir::dyn_cast<IntegerAttr>(integer_attr);
     if (!value) {
       return func->emitError()
              << "'" << attr_name << "' attribute for " << kMaxUnpooling
@@ -132,7 +135,7 @@ LogicalResult ConvertMaxUnpoolingFunc::VerifySignature() {
   }
 
   // Retrieves padding.
-  auto padding = attrs.get("padding").dyn_cast_or_null<StringAttr>();
+  auto padding = mlir::dyn_cast_or_null<StringAttr>(attrs.get("padding"));
   if (!padding) {
     return func_.emitWarning() << "'padding' attribute for " << kMaxUnpooling
                                << " is not set or not a string";
@@ -166,7 +169,7 @@ LogicalResult ConvertMaxUnpoolingFunc::CreateCustomOptions(
   pool_params.stride_width = strides[1];
 
   // Retrieves padding.
-  auto padding = attrs.get("padding").dyn_cast_or_null<StringAttr>();
+  auto padding = mlir::dyn_cast_or_null<StringAttr>(attrs.get("padding"));
   if (!padding) {
     return func_.emitError() << "'padding' attribute for " << kMaxUnpooling
                              << " is not set or not a string";
@@ -224,22 +227,22 @@ LogicalResult ConvertDenseImageWarpFunc::VerifySignature() {
   }
 
   // Check types and shapes.
-  auto image_type =
-      func_.getFunctionType().getInput(0).dyn_cast_or_null<RankedTensorType>();
+  auto image_type = mlir::dyn_cast_or_null<RankedTensorType>(
+      func_.getFunctionType().getInput(0));
   if (!image_type || !image_type.getElementType().isF32() ||
       image_type.getRank() != 4) {
     return func_.emitWarning() << "Image should be a 4D float tensor";
   }
 
-  auto flow_type =
-      func_.getFunctionType().getInput(1).dyn_cast_or_null<RankedTensorType>();
+  auto flow_type = mlir::dyn_cast_or_null<RankedTensorType>(
+      func_.getFunctionType().getInput(1));
   if (!flow_type || !flow_type.getElementType().isF32() ||
       flow_type.getRank() != 4) {
     return func_.emitWarning() << "Flow should be a 4D float tensor";
   }
 
-  auto output_type =
-      func_.getFunctionType().getResult(0).dyn_cast_or_null<RankedTensorType>();
+  auto output_type = mlir::dyn_cast_or_null<RankedTensorType>(
+      func_.getFunctionType().getResult(0));
   if (!output_type || !output_type.getElementType().isF32() ||
       output_type.getRank() != 4) {
     return func_.emitWarning() << "Output should be a 4D float tensor";
diff --git a/tensorflow/compiler/mlir/lite/utils/tftext_utils.cc b/tensorflow/compiler/mlir/lite/utils/tftext_utils.cc
index 7ce9c56086e691..5e9bcc16d27537 100644
--- a/tensorflow/compiler/mlir/lite/utils/tftext_utils.cc
+++ b/tensorflow/compiler/mlir/lite/utils/tftext_utils.cc
@@ -62,11 +62,13 @@ inline ConstBytesAttr CustomOption(OpBuilder* builder,
 }
 
 inline TensorType GetInputType(func::FuncOp func, int idx) {
-  return func.getFunctionType().getInput(idx).dyn_cast_or_null<TensorType>();
+  return mlir::dyn_cast_or_null<TensorType>(
+      func.getFunctionType().getInput(idx));
 }
 
 inline TensorType GetResultType(func::FuncOp func, int idx) {
-  return func.getFunctionType().getResult(idx).dyn_cast_or_null<TensorType>();
+  return mlir::dyn_cast_or_null<TensorType>(
+      func.getFunctionType().getResult(idx));
 }
 
 inline bool RankEquals(const TensorType& type, int rank) {
@@ -89,7 +91,7 @@ LogicalResult VerifyWhitespaceTokenizer(func::FuncOp func) {
   // * 2nd output is the inner offset;
   // * 3rd output is the outer offset.
   auto input_type = GetInputType(func, 0);
-  if (!input_type || !input_type.getElementType().isa<StringType>() ||
+  if (!input_type || !mlir::isa<StringType>(input_type.getElementType()) ||
       !input_type.hasRank()) {
     return func.emitError() << "Input should be a string tensor";
   }
@@ -107,7 +109,7 @@ LogicalResult VerifyWhitespaceTokenizer(func::FuncOp func) {
 
   auto value_type = GetResultType(func, 0);
   if (!RankEquals(value_type, 1) ||
-      !value_type.getElementType().isa<StringType>()) {
+      !mlir::isa<StringType>(value_type.getElementType())) {
     return func.emitError() << "1st output should be string tensor";
   }
   if (func.getNumResults() > 1) {
@@ -157,12 +159,14 @@ LogicalResult VerifyNgrams(func::FuncOp func) {
   int row_splits = func.getFunctionType().getInputs().size() - kRowSplits;
   if (row_splits == 0) {
     auto input_values = GetInputType(func, kValues);
-    if (!input_values || !input_values.getElementType().isa<StringType>()) {
+    if (!input_values ||
+        !mlir::isa<StringType>(input_values.getElementType())) {
       return func.emitError()
              << "Input " << kValues << " should be a string tensor";
     }
     auto output_values = GetResultType(func, kValues);
-    if (!output_values || !output_values.getElementType().isa<StringType>()) {
+    if (!output_values ||
+        !mlir::isa<StringType>(output_values.getElementType())) {
       return func.emitError()
              << "Output " << kValues << " should be a string tensor";
     }
@@ -175,13 +179,13 @@ LogicalResult VerifyNgrams(func::FuncOp func) {
   } else {
     auto input_values = GetInputType(func, kValues);
     if (!RankEquals(input_values, 1) ||
-        !input_values.getElementType().isa<StringType>()) {
+        !mlir::isa<StringType>(input_values.getElementType())) {
       return func.emitError()
              << "Input " << kValues << " should be a 1D string tensor";
     }
     auto output_values = GetResultType(func, kValues);
     if (!RankEquals(output_values, 1) ||
-        !output_values.getElementType().isa<StringType>()) {
+        !mlir::isa<StringType>(output_values.getElementType())) {
       return func.emitError()
              << "Output " << kValues << " should be a 1D string tensor";
     }
@@ -211,14 +215,14 @@ LogicalResult CreateNgramsCustomOption(func::FuncOp func, DictionaryAttr attrs,
   flexbuffers::Builder fbb;
   size_t start_map = fbb.StartMap();
 
-  auto width = attrs.get("width").dyn_cast_or_null<IntegerAttr>();
+  auto width = mlir::dyn_cast_or_null<IntegerAttr>(attrs.get("width"));
   if (!width) {
     return func.emitError() << "'width' attribute is not set or not an integer";
   }
   fbb.Int("width", width.getInt());
 
   auto string_separator =
-      attrs.get("string_separator").dyn_cast_or_null<StringAttr>();
+      mlir::dyn_cast_or_null<StringAttr>(attrs.get("string_separator"));
   if (!string_separator) {
     return func.emitError()
            << "'string_separator' attribute is not set or not a string";
@@ -229,14 +233,14 @@ LogicalResult CreateNgramsCustomOption(func::FuncOp func, DictionaryAttr attrs,
                                    string_separator.getValue().size());
   fbb.String("string_separator", string_separator_str);
 
-  auto axis = attrs.get("axis").dyn_cast_or_null<IntegerAttr>();
+  auto axis = mlir::dyn_cast_or_null<IntegerAttr>(attrs.get("axis"));
   if (!axis) {
     return func.emitError() << "'axis' attribute is not set or not an integer";
   }
   fbb.Int("axis", axis.getInt());
 
   auto reduction_type =
-      attrs.get("reduction_type").dyn_cast_or_null<StringAttr>();
+      mlir::dyn_cast_or_null<StringAttr>(attrs.get("reduction_type"));
   if (!reduction_type) {
     return func.emitError()
            << "'reduction_type' attribute is not set or not a string";
@@ -277,23 +281,23 @@ LogicalResult VerifySgnnProjection(func::FuncOp func, FuncAttr attr) {
     return func.emitError() << "Mismatched number of inputs and outputs.";
   }
   auto values_type = GetInputType(func, 0);
-  if (!values_type || !values_type.getElementType().isa<StringType>()) {
+  if (!values_type || !mlir::isa<StringType>(values_type.getElementType())) {
     return func.emitError() << "First input should be a string tensor";
   }
   auto row_splits_type = GetInputType(func, 1);
   if (!row_splits_type ||
-      !row_splits_type.getElementType().isa<IntegerType>()) {
+      !mlir::isa<IntegerType>(row_splits_type.getElementType())) {
     return func.emitError() << "Second input should be an integer tensor";
   }
 
   auto hash_seed =
-      attr.getAttrs().get("hash_seed").dyn_cast_or_null<ArrayAttr>();
+      mlir::dyn_cast_or_null<ArrayAttr>(attr.getAttrs().get("hash_seed"));
   if (!hash_seed) {
     return func.emitError()
            << "'hash_seed' attribute is not set or not an array";
   }
   auto output_type = GetResultType(func, 0);
-  if (!output_type || !output_type.getElementType().isa<FloatType>() ||
+  if (!output_type || !mlir::isa<FloatType>(output_type.getElementType()) ||
       !RankEquals(output_type, 2)) {
     return func.emitError() << "Output should be a 2D float tensor.";
   }
@@ -302,7 +306,8 @@ LogicalResult VerifySgnnProjection(func::FuncOp func, FuncAttr attr) {
            << "Output 2nd dimension should be the num of hash seeds.";
   }
 
-  auto buckets = attr.getAttrs().get("buckets").dyn_cast_or_null<IntegerAttr>();
+  auto buckets =
+      mlir::dyn_cast_or_null<IntegerAttr>(attr.getAttrs().get("buckets"));
   if (!buckets) {
     return func.emitError() << "'buckets' attribute is not set or not int";
   }
@@ -316,15 +321,16 @@ LogicalResult CreateSgnnProjectionCustomOption(
   flexbuffers::Builder fbb;
   size_t start_map = fbb.StartMap();
 
-  auto hash_seed = attrs.get("hash_seed").dyn_cast_or_null<ArrayAttr>();
+  auto hash_seed = mlir::dyn_cast_or_null<ArrayAttr>(attrs.get("hash_seed"));
   auto vector_start = fbb.StartVector("hash_seed");
   for (int i = 0; i < hash_seed.size(); i++) {
     fbb.Add(static_cast<int32_t>(
-        (hash_seed.getValue().data() + i)->dyn_cast<IntegerAttr>().getInt()));
+        mlir::dyn_cast<IntegerAttr>(*(hash_seed.getValue().data() + i))
+            .getInt()));
   }
   fbb.EndVector(vector_start, /*typed=*/true, /*fixed=*/false);
 
-  auto buckets = attrs.get("buckets").dyn_cast_or_null<IntegerAttr>();
+  auto buckets = mlir::dyn_cast_or_null<IntegerAttr>(attrs.get("buckets"));
   fbb.Int("buckets", buckets.getInt());
 
   fbb.EndMap(start_map);
diff --git a/tensorflow/compiler/mlir/lite/utils/utils.h b/tensorflow/compiler/mlir/lite/utils/utils.h
index 9fce1bc44387c3..524cff0556ea76 100644
--- a/tensorflow/compiler/mlir/lite/utils/utils.h
+++ b/tensorflow/compiler/mlir/lite/utils/utils.h
@@ -46,7 +46,7 @@ inline bool OpHasSameStaticShapes(Operation* op) {
   int operand_num = 0;
   ArrayRef<int64_t> shape;
   for (Value value : values) {
-    auto shaped_type = value.getType().dyn_cast<ShapedType>();
+    auto shaped_type = mlir::dyn_cast<ShapedType>(value.getType());
     if (!shaped_type || !shaped_type.hasStaticShape()) {
       return false;
     }
@@ -64,14 +64,14 @@ inline bool OpHasSameStaticShapes(Operation* op) {
 
 // Checks if all elements in the constant attribute value are 1.
 inline bool IsAllOnesConstant(Attribute value) {
-  auto values = value.cast<DenseElementsAttr>().getValues<int32_t>();
+  auto values = mlir::cast<DenseElementsAttr>(value).getValues<int32_t>();
   return !std::any_of(values.begin(), values.end(),
                       [](int32_t element_value) { return element_value != 1; });
 }
 
 // Checks if all elements in the constant attribute value are non-negative.
 inline bool HasNonNegativeValues(Attribute value) {
-  auto values = value.cast<DenseElementsAttr>().getValues<APInt>();
+  auto values = mlir::cast<DenseElementsAttr>(value).getValues<APInt>();
   return !std::any_of(
       values.begin(), values.end(),
       [](const APInt& element_value) { return element_value.isNegative(); });
@@ -79,8 +79,8 @@ inline bool HasNonNegativeValues(Attribute value) {
 
 // Utility function to get the offset between two dense attribute values.
 inline TypedAttr GetOffSet(Attribute begin, Attribute end) {
-  auto begin_values = begin.cast<DenseElementsAttr>().getValues<int32_t>();
-  auto end_values = end.cast<DenseElementsAttr>().getValues<int32_t>();
+  auto begin_values = mlir::cast<DenseElementsAttr>(begin).getValues<int32_t>();
+  auto end_values = mlir::cast<DenseElementsAttr>(end).getValues<int32_t>();
 
   SmallVector<int32_t> offsets;
   if (begin_values.size() == end_values.size()) {
@@ -118,7 +118,7 @@ inline bool AreLastTwoDimsTransposed(Value permutation) {
 
 // Gets the new type after transposing the last 2 dimensions.
 inline Type TransposeLastTwoDims(Type type) {
-  auto shaped_type = type.dyn_cast<ShapedType>();
+  auto shaped_type = mlir::dyn_cast<ShapedType>(type);
   if (!shaped_type.hasStaticShape() || shaped_type.getRank() < 2) {
     return nullptr;
   }
@@ -136,7 +136,7 @@ inline Type TransposeLastTwoDims(Type type) {
 // applying the permutation to the given shape through a transpose.
 inline ShapedType GetTransposedType(Value input,
                                     llvm::ArrayRef<int64_t> permutation_array) {
-  auto input_type = input.getType().cast<ShapedType>();
+  auto input_type = mlir::cast<ShapedType>(input.getType());
   if (permutation_array.size() != input_type.getRank()) {
     return nullptr;
   }
@@ -153,7 +153,8 @@ inline ShapedType GetTransposedType(Value input,
 // Precondition: output_val's is ranked tensor.
 // Returns a truncated shape when `truncate` is set to true.
 inline DenseElementsAttr GetShape(Value output_val, bool truncate = false) {
-  auto output_shape = output_val.getType().dyn_cast<ShapedType>().getShape();
+  auto output_shape =
+      mlir::dyn_cast<ShapedType>(output_val.getType()).getShape();
 
   SmallVector<int32_t> shape;
   shape.reserve(output_shape.size());
diff --git a/tensorflow/compiler/mlir/lite/utils/validators.cc b/tensorflow/compiler/mlir/lite/utils/validators.cc
index f4714e00e5f2a4..902d7b144ba69d 100644
--- a/tensorflow/compiler/mlir/lite/utils/validators.cc
+++ b/tensorflow/compiler/mlir/lite/utils/validators.cc
@@ -20,6 +20,7 @@ limitations under the License.
 #include "mlir/Dialect/Traits.h"  // from @llvm-project
 #include "mlir/IR/Builders.h"  // from @llvm-project
 #include "mlir/IR/BuiltinAttributeInterfaces.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 
 namespace mlir {
 namespace TFL {
@@ -36,45 +37,45 @@ bool TFIntListIs1XY1(Operation *op, StringRef name, IntegerAttr *x,
   auto elements = attr.getValue();
   if (elements.size() != 4 ||
       std::any_of(elements.begin(), elements.end(),
-                  [](Attribute e) { return !e.isa<IntegerAttr>(); }))
+                  [](Attribute e) { return !mlir::isa<IntegerAttr>(e); }))
     return false;
 
-  if (elements.front().cast<IntegerAttr>().getInt() != 1 ||
-      elements.back().cast<IntegerAttr>().getInt() != 1)
+  if (mlir::cast<IntegerAttr>(elements.front()).getInt() != 1 ||
+      mlir::cast<IntegerAttr>(elements.back()).getInt() != 1)
     return false;
 
   Builder b(op->getContext());
-  *x = b.getI32IntegerAttr(elements[1].cast<IntegerAttr>().getInt());
-  *y = b.getI32IntegerAttr(elements[2].cast<IntegerAttr>().getInt());
+  *x = b.getI32IntegerAttr(mlir::cast<IntegerAttr>(elements[1]).getInt());
+  *y = b.getI32IntegerAttr(mlir::cast<IntegerAttr>(elements[2]).getInt());
 
   return true;
 }
 
 // Returns true if the attribute is an integer list of the form [1, X, Y, 1].
 bool TFIntListIs1XY1(const Attribute attr) {
-  const auto &elements = attr.cast<ArrayAttr>().getValue();
+  const auto &elements = mlir::cast<ArrayAttr>(attr).getValue();
   if (elements.size() != 4 ||
       std::any_of(elements.begin(), elements.end(),
-                  [](Attribute e) { return !e.isa<IntegerAttr>(); }))
+                  [](Attribute e) { return !mlir::isa<IntegerAttr>(e); }))
     return false;
 
-  if (elements.front().cast<IntegerAttr>().getValue() != 1 ||
-      elements.back().cast<IntegerAttr>().getValue() != 1)
+  if (mlir::cast<IntegerAttr>(elements.front()).getValue() != 1 ||
+      mlir::cast<IntegerAttr>(elements.back()).getValue() != 1)
     return false;
   return true;
 }
 
 // Returns true if the attribute is an integer list of the form [1, 1, X, Y].
 bool TFIntListIs11XY(const Attribute attr) {
-  const auto &elements = attr.cast<ArrayAttr>().getValue();
+  const auto &elements = mlir::cast<ArrayAttr>(attr).getValue();
   if (elements.size() != 4 ||
       std::any_of(elements.begin(), elements.end(),
-                  [](Attribute e) { return !e.isa<IntegerAttr>(); }))
+                  [](Attribute e) { return !mlir::isa<IntegerAttr>(e); }))
     return false;
 
   const Attribute *data = elements.data();
-  if (data[0].cast<IntegerAttr>().getValue() != 1 ||
-      data[1].cast<IntegerAttr>().getValue() != 1)
+  if (mlir::cast<IntegerAttr>(data[0]).getValue() != 1 ||
+      mlir::cast<IntegerAttr>(data[1]).getValue() != 1)
     return false;
   return true;
 }
@@ -91,17 +92,17 @@ bool TFIntListIs1XYZ1(Operation *op, StringRef name, IntegerAttr *x,
   auto elements = attr.getValue();
   if (elements.size() != 5 ||
       std::any_of(elements.begin(), elements.end(),
-                  [](Attribute e) { return !e.isa<IntegerAttr>(); }))
+                  [](Attribute e) { return !mlir::isa<IntegerAttr>(e); }))
     return false;
 
-  if (elements.front().cast<IntegerAttr>().getInt() != 1 ||
-      elements.back().cast<IntegerAttr>().getInt() != 1)
+  if (mlir::cast<IntegerAttr>(elements.front()).getInt() != 1 ||
+      mlir::cast<IntegerAttr>(elements.back()).getInt() != 1)
     return false;
 
   Builder b(op->getContext());
-  *x = b.getI32IntegerAttr(elements[1].cast<IntegerAttr>().getInt());
-  *y = b.getI32IntegerAttr(elements[2].cast<IntegerAttr>().getInt());
-  *z = b.getI32IntegerAttr(elements[3].cast<IntegerAttr>().getInt());
+  *x = b.getI32IntegerAttr(mlir::cast<IntegerAttr>(elements[1]).getInt());
+  *y = b.getI32IntegerAttr(mlir::cast<IntegerAttr>(elements[2]).getInt());
+  *z = b.getI32IntegerAttr(mlir::cast<IntegerAttr>(elements[3]).getInt());
 
   return true;
 }
@@ -109,10 +110,10 @@ bool TFIntListIs1XYZ1(Operation *op, StringRef name, IntegerAttr *x,
 // Returns true if every element of the attribute is 1. All elements of `attr`
 // must be `IntegerAttr`.
 bool TFIntListIsAllOnes(const Attribute attr) {
-  const auto &elements = attr.cast<ArrayAttr>().getValue();
+  const auto &elements = mlir::cast<ArrayAttr>(attr).getValue();
 
   return !std::any_of(elements.begin(), elements.end(), [](Attribute e) {
-    return e.cast<IntegerAttr>().getValue() != 1;
+    return mlir::cast<IntegerAttr>(e).getValue() != 1;
   });
 }
 
@@ -133,7 +134,7 @@ bool IsDimensionsDegenerateExceptLastOne(ArrayRef<int64_t> elements_shape) {
 }
 
 bool IsDimensionsDegenerateExceptLastOne(TypedAttr val) {
-  if (auto ranked_type = val.getType().dyn_cast<RankedTensorType>()) {
+  if (auto ranked_type = mlir::dyn_cast<RankedTensorType>(val.getType())) {
     return IsDimensionsDegenerateExceptLastOne(ranked_type.getShape());
   }
   return false;
diff --git a/tensorflow/compiler/mlir/lite/utils/validators.h b/tensorflow/compiler/mlir/lite/utils/validators.h
index 08d2e7b068b4be..0e7370c5fa499b 100644
--- a/tensorflow/compiler/mlir/lite/utils/validators.h
+++ b/tensorflow/compiler/mlir/lite/utils/validators.h
@@ -21,6 +21,7 @@ limitations under the License.
 
 #include "mlir/Dialect/Func/IR/FuncOps.h"  // from @llvm-project
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 
 namespace mlir {
 namespace TFL {
@@ -70,21 +71,21 @@ bool TFIntListIsAllOnes(Attribute attr);
 // Returns true iff the given value is a float32 tensor.
 // is "DT_FLOAT".
 inline bool TFTypeIsFloat32Tensor(Value value) {
-  auto tensorType = value.getType().dyn_cast<TensorType>();
+  auto tensorType = mlir::dyn_cast<TensorType>(value.getType());
   if (!tensorType) return false;
   return tensorType.getElementType().isF32();
 }
 
 // Returns true iff the given value is a bf16 tensor.
 inline bool TFTypeIsBFloat16Tensor(Value value) {
-  auto tensorType = value.getType().dyn_cast<TensorType>();
+  auto tensorType = mlir::dyn_cast<TensorType>(value.getType());
   if (!tensorType) return false;
   return tensorType.getElementType().isBF16();
 }
 
 // Returns true iff the given value is a f16 tensor.
 inline bool TFTypeIsHalfTensor(Value value) {
-  auto tensorType = value.getType().dyn_cast<TensorType>();
+  auto tensorType = mlir::dyn_cast<TensorType>(value.getType());
   if (!tensorType) return false;
   return tensorType.getElementType().isF16();
 }
diff --git a/tensorflow/compiler/mlir/op_or_arg_name_mapper.cc b/tensorflow/compiler/mlir/op_or_arg_name_mapper.cc
index f5912553f10dbe..8f3261f6574ff7 100644
--- a/tensorflow/compiler/mlir/op_or_arg_name_mapper.cc
+++ b/tensorflow/compiler/mlir/op_or_arg_name_mapper.cc
@@ -28,6 +28,7 @@ limitations under the License.
 #include "mlir/IR/Location.h"  // from @llvm-project
 #include "mlir/IR/Operation.h"  // from @llvm-project
 #include "mlir/IR/Value.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/utils/name_utils.h"
 
 static inline absl::string_view StringRefToView(llvm::StringRef ref) {
@@ -123,7 +124,7 @@ std::string OpOrArgLocNameMapper::GetName(OpOrVal op_or_val) {
   // If the location is none of the expected types, then simply use name
   // generated using the op type. Follow TF convention and append the result
   // index unless 0.
-  if (auto result = val.dyn_cast<mlir::OpResult>()) {
+  if (auto result = mlir::dyn_cast<mlir::OpResult>(val)) {
     if (result.getResultNumber() > 0)
       return llvm::formatv("{0}:{1}",
                            result.getOwner()->getName().getStringRef(),
@@ -131,7 +132,7 @@ std::string OpOrArgLocNameMapper::GetName(OpOrVal op_or_val) {
     return std::string(result.getOwner()->getName().getStringRef());
   }
   // Use the ASM syntax for BlockArgument
-  if (auto arg = val.dyn_cast<mlir::BlockArgument>()) {
+  if (auto arg = mlir::dyn_cast<mlir::BlockArgument>(val)) {
     return "arg" + std::to_string(arg.getArgNumber());
   }
   return "";
diff --git a/tensorflow/compiler/mlir/quantization/common/attrs_and_constraints.cc b/tensorflow/compiler/mlir/quantization/common/attrs_and_constraints.cc
index a5b8cb487e6359..1367e7e5eaa175 100644
--- a/tensorflow/compiler/mlir/quantization/common/attrs_and_constraints.cc
+++ b/tensorflow/compiler/mlir/quantization/common/attrs_and_constraints.cc
@@ -42,14 +42,14 @@ namespace mlir::quant {
 using ::mlir::stablehlo::DotGeneralOp;
 
 bool HasStaticShape(Value value) {
-  auto shaped_type = value.getType().dyn_cast<ShapedType>();
+  auto shaped_type = mlir::dyn_cast<ShapedType>(value.getType());
   if (!shaped_type) return false;
 
   return shaped_type.hasStaticShape();
 }
 
 bool HasStaticShapeAtDims(Value value, const ArrayRef<int> dims) {
-  auto shaped_type = value.getType().dyn_cast<ShapedType>();
+  auto shaped_type = mlir::dyn_cast<ShapedType>(value.getType());
   if (!shaped_type || !shaped_type.hasRank()) return false;
 
   for (auto dim : dims) {
@@ -59,9 +59,9 @@ bool HasStaticShapeAtDims(Value value, const ArrayRef<int> dims) {
 }
 
 Type CloneTypeWithNewElementType(Type old_type, Type element_type) {
-  if (!old_type.isa<ShapedType>()) return {};
+  if (!mlir::isa<ShapedType>(old_type)) return {};
 
-  return old_type.cast<ShapedType>().clone(element_type);
+  return mlir::cast<ShapedType>(old_type).clone(element_type);
 }
 
 SmallVector<Value> CloneOpWithReplacedOperands(
@@ -133,9 +133,11 @@ absl::StatusOr<bool> IsDotGeneralFullyConnected(DotGeneralOp dot_general_op) {
   const ArrayRef<int64_t> rhs_contracting_dims =
       dot_dimension_numbers.getRhsContractingDimensions();
   const int64_t input_rank =
-      dot_general_op.getOperand(0).getType().dyn_cast<ShapedType>().getRank();
+      mlir::dyn_cast<ShapedType>(dot_general_op.getOperand(0).getType())
+          .getRank();
   const int64_t filter_rank =
-      dot_general_op.getOperand(1).getType().dyn_cast<ShapedType>().getRank();
+      mlir::dyn_cast<ShapedType>(dot_general_op.getOperand(1).getType())
+          .getRank();
   // The following conditions are such requirements:
   //   - rank(lhs) is 1 or 2
   //   - rank(rhs) = 2
@@ -164,7 +166,8 @@ std::optional<int64_t> GetDotGeneralQuantizationDim(
     DotGeneralOp dot_general_op) {
   if (dot_general_op == nullptr) return std::nullopt;
   const int64_t filter_rank =
-      dot_general_op.getOperand(1).getType().dyn_cast<ShapedType>().getRank();
+      mlir::dyn_cast<ShapedType>(dot_general_op.getOperand(1).getType())
+          .getRank();
 
   // To quantize rhs per-channel, we currently only consider the case where
   // `stablehlo.dot_general` is legalizable to `tfl.fully_connected`.
diff --git a/tensorflow/compiler/mlir/quantization/common/attrs_and_constraints.h b/tensorflow/compiler/mlir/quantization/common/attrs_and_constraints.h
index c80b43dd6baaaf..e94f9359d6fad2 100644
--- a/tensorflow/compiler/mlir/quantization/common/attrs_and_constraints.h
+++ b/tensorflow/compiler/mlir/quantization/common/attrs_and_constraints.h
@@ -69,7 +69,7 @@ bool HasStaticShapeAtDims(Value value, ArrayRef<int> dims);
 // Whether `value` has known rank of `rank`. Returns false when it is not a
 // `ShapedType` or its rank is unknown.
 inline bool HasRankOf(Value value, const int64_t rank) {
-  auto shaped_type = value.getType().dyn_cast_or_null<ShapedType>();
+  auto shaped_type = mlir::dyn_cast_or_null<ShapedType>(value.getType());
   return shaped_type && shaped_type.hasRank() && shaped_type.getRank() == rank;
 }
 
@@ -219,7 +219,7 @@ Operation* FindOperandOfType(Operation* op) {
 // Returns the function attribute for the given call op which is lifted for
 // quantization.
 inline FlatSymbolRefAttr GetFuncAttr(TF::PartitionedCallOp call_op) {
-  return call_op.getFAttr().template dyn_cast<FlatSymbolRefAttr>();
+  return mlir::dyn_cast<FlatSymbolRefAttr>(call_op.getFAttr());
 }
 
 inline FlatSymbolRefAttr GetFuncAttr(TF::XlaCallModuleOp call_op) {
diff --git a/tensorflow/compiler/mlir/quantization/common/ir/QuantOps.cc b/tensorflow/compiler/mlir/quantization/common/ir/QuantOps.cc
index 7bd7424e4d1c6a..6ddebac1ff00f9 100644
--- a/tensorflow/compiler/mlir/quantization/common/ir/QuantOps.cc
+++ b/tensorflow/compiler/mlir/quantization/common/ir/QuantOps.cc
@@ -25,6 +25,7 @@ limitations under the License.
 #include "mlir/IR/MLIRContext.h"  // from @llvm-project
 #include "mlir/IR/Matchers.h"  // from @llvm-project
 #include "mlir/IR/PatternMatch.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/quantization/common/ir/QuantOpsDialect.cc.inc"
 
 namespace mlir::quant::ir {
@@ -49,20 +50,20 @@ OpFoldResult StorageCastOp::fold(FoldAdaptor) {
 
 /// The quantization specification should match the expressed type.
 static bool isValidQuantizationSpec(Attribute quantSpec, Type expressed) {
-  if (auto typeAttr = quantSpec.dyn_cast<TypeAttr>()) {
+  if (auto typeAttr = mlir::dyn_cast<TypeAttr>(quantSpec)) {
     Type spec = typeAttr.getValue();
-    if (spec.isa<TensorType, VectorType>()) return false;
+    if (mlir::isa<TensorType, VectorType>(spec)) return false;
 
     // The spec should be either a quantized type which is compatible to the
     // expressed type, or a primitive type which is as same as the
     // (element type of) the expressed type.
-    if (auto quantizedType = spec.dyn_cast<QuantizedType>())
+    if (auto quantizedType = mlir::dyn_cast<QuantizedType>(spec))
       return quantizedType.isCompatibleExpressedType(expressed);
 
-    if (auto tensorType = expressed.dyn_cast<TensorType>())
+    if (auto tensorType = mlir::dyn_cast<TensorType>(expressed))
       return spec == tensorType.getElementType();
 
-    if (auto vectorType = expressed.dyn_cast<VectorType>())
+    if (auto vectorType = mlir::dyn_cast<VectorType>(expressed))
       return spec == vectorType.getElementType();
   }
   return false;
@@ -97,13 +98,13 @@ LogicalResult QuantizeRegionOp::verify() {
 }
 
 LogicalResult StatisticsOp::verify() {
-  auto tensorArg = getArg().getType().dyn_cast<TensorType>();
+  auto tensorArg = mlir::dyn_cast<TensorType>(getArg().getType());
   if (!tensorArg) return emitOpError("arg needs to be tensor type.");
 
   // Verify layerStats attribute.
   {
     auto layerStatsType = getLayerStats().getShapedType();
-    if (!layerStatsType.getElementType().isa<FloatType>()) {
+    if (!mlir::isa<FloatType>(layerStatsType.getElementType())) {
       return emitOpError("layerStats must have a floating point element type");
     }
     if (layerStatsType.getRank() != 1 || layerStatsType.getDimSize(0) != 2) {
@@ -120,7 +121,7 @@ LogicalResult StatisticsOp::verify() {
                         std::multiplies<int64_t>());
 
     auto axisStatsType = getAxisStats()->getShapedType();
-    if (!axisStatsType.getElementType().isa<FloatType>()) {
+    if (!mlir::isa<FloatType>(axisStatsType.getElementType())) {
       return emitOpError("axisStats must have a floating point element type");
     }
     if (axisStatsType.getRank() != 2 || axisStatsType.getDimSize(1) != 2 ||
diff --git a/tensorflow/compiler/mlir/quantization/common/ir/UniformSupport.cc b/tensorflow/compiler/mlir/quantization/common/ir/UniformSupport.cc
index 5a200241af00dd..4677054dc6c765 100644
--- a/tensorflow/compiler/mlir/quantization/common/ir/UniformSupport.cc
+++ b/tensorflow/compiler/mlir/quantization/common/ir/UniformSupport.cc
@@ -18,18 +18,19 @@ limitations under the License.
 #include <numeric>
 
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 
 using namespace mlir;
 using namespace mlir::quantfork;
 
 static bool isQuantizablePrimitiveType(Type inputType) {
-  return inputType.isa<FloatType>();
+  return mlir::isa<FloatType>(inputType);
 }
 
 ExpressedToQuantizedConverter ExpressedToQuantizedConverter::forInputType(
     Type inputType) {
-  if (inputType.isa<TensorType, VectorType>()) {
-    Type elementType = inputType.cast<ShapedType>().getElementType();
+  if (mlir::isa<TensorType, VectorType>(inputType)) {
+    Type elementType = mlir::cast<ShapedType>(inputType).getElementType();
     if (!isQuantizablePrimitiveType(elementType))
       return ExpressedToQuantizedConverter{inputType, nullptr};
     return ExpressedToQuantizedConverter{inputType, elementType};
@@ -44,11 +45,11 @@ ExpressedToQuantizedConverter ExpressedToQuantizedConverter::forInputType(
 Type ExpressedToQuantizedConverter::convert(
     quant::QuantizedType elementalType) const {
   assert(expressedType && "convert() on unsupported conversion");
-  if (auto tensorType = inputType.dyn_cast<RankedTensorType>())
+  if (auto tensorType = mlir::dyn_cast<RankedTensorType>(inputType))
     return RankedTensorType::get(tensorType.getShape(), elementalType);
-  if (auto tensorType = inputType.dyn_cast<UnrankedTensorType>())
+  if (auto tensorType = mlir::dyn_cast<UnrankedTensorType>(inputType))
     return UnrankedTensorType::get(elementalType);
-  if (auto vectorType = inputType.dyn_cast<VectorType>())
+  if (auto vectorType = mlir::dyn_cast<VectorType>(inputType))
     return VectorType::get(vectorType.getShape(), elementalType);
 
   // If the expressed types match, just use the new elemental type.
@@ -59,7 +60,7 @@ Type ExpressedToQuantizedConverter::convert(
 
 ElementsAttr UniformQuantizedPerAxisValueConverter::convert(
     Attribute realValue) {
-  if (auto attr = realValue.dyn_cast<DenseFPElementsAttr>()) {
+  if (auto attr = mlir::dyn_cast<DenseFPElementsAttr>(realValue)) {
     return convert(attr);
   }
   // TODO: handles sparse elements attribute
diff --git a/tensorflow/compiler/mlir/quantization/common/ir/UniformSupport.h b/tensorflow/compiler/mlir/quantization/common/ir/UniformSupport.h
index b6f65e455d0c09..0bd2814017be20 100644
--- a/tensorflow/compiler/mlir/quantization/common/ir/UniformSupport.h
+++ b/tensorflow/compiler/mlir/quantization/common/ir/UniformSupport.h
@@ -24,6 +24,7 @@ limitations under the License.
 #include "mlir/Dialect/Quant/QuantTypes.h"  // from @llvm-project
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/IR/Types.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 
 namespace mlir {
 namespace quantfork {
@@ -75,7 +76,7 @@ class UniformQuantizedValueConverter {
             static_cast<double>(uniformType.getStorageTypeMin()),
             static_cast<double>(uniformType.getStorageTypeMax()),
             uniformType.getStorageTypeIntegralWidth(), uniformType.isSigned()) {
-    assert(uniformType.getExpressedType().isa<FloatType>());
+    assert(mlir::isa<FloatType>(uniformType.getExpressedType()));
     assert(uniformType.getStorageType().isSignlessInteger());
   }
 
@@ -203,7 +204,7 @@ class UniformQuantizedPerAxisValueConverter {
         storageBitWidth(uniformType.getStorageTypeIntegralWidth()),
         isSigned(uniformType.isSigned()),
         quantizationDim(uniformType.getQuantizedDimension()) {
-    assert(uniformType.getExpressedType().isa<FloatType>());
+    assert(mlir::isa<FloatType>(uniformType.getExpressedType()));
     assert(uniformType.getStorageType().isSignlessInteger());
     assert(scales.size() == zeroPoints.size());
   }
diff --git a/tensorflow/compiler/mlir/quantization/common/lift_as_function_call.cc b/tensorflow/compiler/mlir/quantization/common/lift_as_function_call.cc
index 5492219f938228..cc4f3deb7da015 100644
--- a/tensorflow/compiler/mlir/quantization/common/lift_as_function_call.cc
+++ b/tensorflow/compiler/mlir/quantization/common/lift_as_function_call.cc
@@ -137,7 +137,7 @@ ValueRange CreateTFXlaCallModuleOp(OpBuilder& builder, const Location location,
   SmallVector<Attribute> shape_attrs;
   for (const Type result_type : output_types) {
     shape_attrs.push_back(
-        tf_type::ShapeAttr::get(ctx, result_type.cast<ShapedType>()));
+        tf_type::ShapeAttr::get(ctx, mlir::cast<ShapedType>(result_type)));
   }
   auto empty_array_attr = ArrayAttr::get(ctx, {});
   auto platforms = ArrayAttr::get(ctx, {StringAttr::get(ctx, kPlatformCpu)});
@@ -267,7 +267,7 @@ LogicalResult SetAttributeMap(MLIRContext& context,
     const NamedAttribute& attribute = attributes[idx];
     // Skip the following steps if the attribute value is `NullAttribute`.
     if (const auto string_attr =
-            attribute.getValue().dyn_cast_or_null<StringAttr>();
+            mlir::dyn_cast_or_null<StringAttr>(attribute.getValue());
         string_attr != nullptr &&
         string_attr.getValue().equals(kNullAttributeValue)) {
       continue;
diff --git a/tensorflow/compiler/mlir/quantization/common/lift_as_function_call_test.cc b/tensorflow/compiler/mlir/quantization/common/lift_as_function_call_test.cc
index c6f858815e140f..2911521d174300 100644
--- a/tensorflow/compiler/mlir/quantization/common/lift_as_function_call_test.cc
+++ b/tensorflow/compiler/mlir/quantization/common/lift_as_function_call_test.cc
@@ -118,10 +118,11 @@ TEST_F(LiftAsFunctionCallTest, FunctionLiftedAsXlaCallModuleOp) {
       FindOperationOfType<mlir::stablehlo::DotGeneralOp>(entry_func);
 
   EXPECT_TRUE(isa<TF::XlaCallModuleOp>(lifted_op));
-  EXPECT_EQ(lifted_op->getAttr("_original_entry_function").cast<StringAttr>(),
-            "composite_dot_general_fn_1");
   EXPECT_EQ(
-      lifted_dot_general_op->getAttr("precision_config").cast<ArrayAttr>(),
+      mlir::cast<StringAttr>(lifted_op->getAttr("_original_entry_function")),
+      "composite_dot_general_fn_1");
+  EXPECT_EQ(
+      mlir::cast<ArrayAttr>(lifted_dot_general_op->getAttr("precision_config")),
       builder_.getArrayAttr(SmallVector<Attribute>(
           1, mlir::stablehlo::PrecisionAttr::get(
                  ctx_.get(), mlir::stablehlo::Precision::DEFAULT))));
@@ -144,8 +145,9 @@ TEST_F(LiftAsFunctionCallTest, FunctionNoAttrLiftedAsXlaCallModuleOp) {
                          "composite_dot_general_fn", operands, results)[0]
           .getDefiningOp();
   EXPECT_TRUE(isa<TF::XlaCallModuleOp>(lifted_op));
-  EXPECT_EQ(lifted_op->getAttr("_original_entry_function").cast<StringAttr>(),
-            "composite_dot_general_fn_1");
+  EXPECT_EQ(
+      mlir::cast<StringAttr>(lifted_op->getAttr("_original_entry_function")),
+      "composite_dot_general_fn_1");
 }
 
 TEST_F(LiftAsFunctionCallTest, EinsumSupportedForXlaDotV2Succeeds) {
diff --git a/tensorflow/compiler/mlir/quantization/common/quantization_lib/quantization_driver.cc b/tensorflow/compiler/mlir/quantization/common/quantization_lib/quantization_driver.cc
index 216a4a2b3d58e9..7645177160fc62 100644
--- a/tensorflow/compiler/mlir/quantization/common/quantization_lib/quantization_driver.cc
+++ b/tensorflow/compiler/mlir/quantization/common/quantization_lib/quantization_driver.cc
@@ -91,10 +91,11 @@ bool HasPerAxisQuantizedOperand(Operation* op) {
   for (int i = 0; i < op->getNumOperands(); ++i) {
     if (auto dq_op = dyn_cast_or_null<quantfork::DequantizeCastOp>(
             op->getOperand(i).getDefiningOp())) {
-      auto type = dq_op.getArg().getType().cast<TensorType>().getElementType();
+      auto type =
+          mlir::cast<TensorType>(dq_op.getArg().getType()).getElementType();
       if (auto per_axis_qtype =
-              QuantizedType::getQuantizedElementType(type)
-                  .dyn_cast_or_null<quant::UniformQuantizedPerAxisType>()) {
+              mlir::dyn_cast_or_null<quant::UniformQuantizedPerAxisType>(
+                  QuantizedType::getQuantizedElementType(type))) {
         return true;
       }
     }
@@ -179,7 +180,7 @@ bool QuantizationDriver::SetConstantResultParams(Operation* op) {
         /*num_bits=*/8, is_signed_,
         /*narrow_range=*/is_weight, legacy_float_scale_);
   }
-  if (const auto quant_type = final_type.dyn_cast_or_null<QuantizedType>();
+  if (const auto quant_type = mlir::dyn_cast_or_null<QuantizedType>(final_type);
       quant_type != nullptr) {
     return SetResultParams(op, /*result_index=*/0, quant_type);
   }
@@ -225,7 +226,7 @@ QuantizedType QuantizationDriver::GetBiasParams(
     if (bias_op != nullptr) {
       Type bias_type = bias_op->getResult(0).getType();
       if (bias_type != builder_.getNoneType()) {
-        const int bias_rank = bias_type.dyn_cast<ShapedType>().getRank();
+        const int bias_rank = mlir::dyn_cast<ShapedType>(bias_type).getRank();
         adjusted_quant_dim = bias_rank > 1 ? bias_rank - 1 : 0;
       }
     }
@@ -489,12 +490,12 @@ QuantizedType QuantizationDriver::GetQuantParamsForSameScaleConstraint(
 void QuantizationDriver::PreprocessConstantOps() {
   fn_.walk([&](arith::ConstantOp cst) {
     // Non-float tensors are neither weights nor require quantization.
-    const auto type = cst.getType().dyn_cast<ShapedType>();
-    if (!type || !type.getElementType().isa<FloatType>()) return;
+    const auto type = mlir::dyn_cast<ShapedType>(cst.getType());
+    if (!type || !mlir::isa<FloatType>(type.getElementType())) return;
 
     // Skip if the value is NaN or INF.
     // Otherwise the illegal scale/zp will be calculated.
-    auto float_attr = cst.getValueAttr().dyn_cast<DenseFPElementsAttr>();
+    auto float_attr = mlir::dyn_cast<DenseFPElementsAttr>(cst.getValueAttr());
     if (float_attr && (float_attr.getValues<APFloat>().empty() ||
                        !float_attr.getValues<APFloat>()[0].isFinite())) {
       return;
@@ -620,7 +621,7 @@ bool QuantizationDriver::ShouldCheckBiasScale(
   auto affine_op = dyn_cast<AffineQuantizedOpInterface>(op);
   auto bias_op = op->getOperand(bias_index).getDefiningOp<arith::ConstantOp>();
   if (!affine_op || !bias_op || input_indices.size() != 2) return false;
-  if (!bias_op.getValue().isa<DenseFPElementsAttr>()) return false;
+  if (!mlir::isa<DenseFPElementsAttr>(bias_op.getValue())) return false;
   filter_index = affine_op.GetAffineOperandIndex();
   if (!op->getOperand(filter_index).getDefiningOp<arith::ConstantOp>()) {
     return false;
@@ -658,12 +659,12 @@ bool QuantizationDriver::SetBiasParamsWithAdjustments(
   QuantState filter_state = GetOperandQuantState(op, filter_index);
   auto bias_op = op->getOperand(bias_index).getDefiningOp<arith::ConstantOp>();
   const double input_scale =
-      input_state.params.cast<UniformQuantizedType>().getScale();
+      mlir::cast<UniformQuantizedType>(input_state.params).getScale();
 
-  auto bias_values = bias_op.getValue().cast<DenseFPElementsAttr>();
+  auto bias_values = mlir::cast<DenseFPElementsAttr>(bias_op.getValue());
   // Restrict maximum absolute value of bias within INT_MAX / 2, to make some
   // room for accumulator.
-  if (auto bias_quantized_type = params.dyn_cast<UniformQuantizedType>();
+  if (auto bias_quantized_type = mlir::dyn_cast<UniformQuantizedType>(params);
       bias_quantized_type != nullptr) {
     double bias_half_range = 0.0f;
     for (auto bias : bias_values.getValues<APFloat>()) {
@@ -691,7 +692,7 @@ bool QuantizationDriver::SetBiasParamsWithAdjustments(
     }
 
     const auto filter_quantized_type =
-        filter_state.params.cast<UniformQuantizedType>();
+        mlir::cast<UniformQuantizedType>(filter_state.params);
     changed |= SetOperandParams(
         op, filter_index,
         UniformQuantizedType::getChecked(
@@ -703,10 +704,10 @@ bool QuantizationDriver::SetBiasParamsWithAdjustments(
             filter_quantized_type.getStorageTypeMax()),
         /*override=*/true);
   } else if (auto bias_quantized_type =
-                 params.dyn_cast<quant::UniformQuantizedPerAxisType>();
+                 mlir::dyn_cast<quant::UniformQuantizedPerAxisType>(params);
              bias_quantized_type != nullptr) {
     const auto filter_quantized_type =
-        filter_state.params.cast<quant::UniformQuantizedPerAxisType>();
+        mlir::cast<quant::UniformQuantizedPerAxisType>(filter_state.params);
     std::vector<double> new_bias_scales = bias_quantized_type.getScales().vec();
     std::vector<double> new_filter_scales =
         filter_quantized_type.getScales().vec();
@@ -822,21 +823,22 @@ bool QuantizationDriver::PropagateParamsAndReturnIfChanged() {
 
       // Use the final state to set all the operands' parameters.
       for (int i = 0; i < op->getNumOperands(); ++i) {
-        if (auto type = op->getOperand(i).getType().dyn_cast<ShapedType>()) {
+        if (auto type =
+                mlir::dyn_cast<ShapedType>(op->getOperand(i).getType())) {
           // Without this check, it will accidentally propagate the quantization
           // information by the shared non-float tensors.
-          if (type.getElementType().isa<FloatType>())
+          if (mlir::isa<FloatType>(type.getElementType()))
             changed |= SetOperandParams(op, i, params);
         }
       }
 
       // Use the final state to set all the results' parameters.
       for (int i = 0; i < op->getNumResults(); ++i)
-        if (auto type = op->getResult(i).getType().dyn_cast<ShapedType>();
+        if (auto type = mlir::dyn_cast<ShapedType>(op->getResult(i).getType());
             type != nullptr) {
           // Without this check, it will accidentally propagate the quantization
           // information by the shared non-float-tensors.
-          if (type.getElementType().isa<FloatType>())
+          if (mlir::isa<FloatType>(type.getElementType()))
             changed |= SetResultParams(op, i, params);
         }
     }
diff --git a/tensorflow/compiler/mlir/quantization/common/quantization_lib/quantization_driver_test.cc b/tensorflow/compiler/mlir/quantization/common/quantization_lib/quantization_driver_test.cc
index cc82c09894b46b..f017054cbe7044 100644
--- a/tensorflow/compiler/mlir/quantization/common/quantization_lib/quantization_driver_test.cc
+++ b/tensorflow/compiler/mlir/quantization/common/quantization_lib/quantization_driver_test.cc
@@ -159,10 +159,9 @@ TEST_F(ApplyQuantizationParamsPropagationTest, FinalizeInsertsQDQOps) {
   ASSERT_NE(filter_qcast_op, nullptr);
   EXPECT_TRUE(isa<quantfork::QuantizeCastOp>(filter_qcast_op));
   EXPECT_TRUE(isa<quantfork::DequantizeCastOp>(filter_dcast_op));
-  EXPECT_TRUE(isa<UniformQuantizedPerAxisType>(filter_qcast_op->getResult(0)
-                                                   .getType()
-                                                   .cast<TensorType>()
-                                                   .getElementType()));
+  EXPECT_TRUE(isa<UniformQuantizedPerAxisType>(
+      mlir::cast<TensorType>(filter_qcast_op->getResult(0).getType())
+          .getElementType()));
 }
 
 }  // namespace
diff --git a/tensorflow/compiler/mlir/quantization/common/quantization_lib/quantization_utils.cc b/tensorflow/compiler/mlir/quantization/common/quantization_lib/quantization_utils.cc
index 13822637f6887d..7bfda7c392ea42 100644
--- a/tensorflow/compiler/mlir/quantization/common/quantization_lib/quantization_utils.cc
+++ b/tensorflow/compiler/mlir/quantization/common/quantization_lib/quantization_utils.cc
@@ -125,14 +125,14 @@ QuantizedType ResetMinMaxFromNumBits(const QuantizedType type,
   const auto& recalculate_zero_point = [&](int64_t zero_point) -> int64_t {
     return qmax - std::round((storage_type_max - zero_point) / rate);
   };
-  if (auto q_type = type.dyn_cast<UniformQuantizedType>()) {
+  if (auto q_type = mlir::dyn_cast<UniformQuantizedType>(type)) {
     const double scale = recalculate_scale(q_type.getScale());
     const double zero_point = recalculate_zero_point(q_type.getZeroPoint());
     return UniformQuantizedType::get(q_type.getFlags(), q_type.getStorageType(),
                                      q_type.getExpressedType(), scale,
                                      zero_point, qmin, qmax);
   } else if (auto q_type =
-                 type.dyn_cast<quant::UniformQuantizedPerAxisType>()) {
+                 mlir::dyn_cast<quant::UniformQuantizedPerAxisType>(type)) {
     const int size = q_type.getScales().size();
     SmallVector<double, 4> scales(size);
     SmallVector<int64_t, 4> zero_points(size);
@@ -155,7 +155,7 @@ quant::UniformQuantizedPerAxisType ResetAxisAndBroadcast(
     const ArrayRef<int64_t> shape,
     const quant::UniformQuantizedPerAxisType qtype, const Type target,
     const int quant_dim) {
-  const auto shaped = target.dyn_cast<RankedTensorType>();
+  const auto shaped = mlir::dyn_cast<RankedTensorType>(target);
   if (!shaped) return {};
   const ArrayRef<int64_t> new_shape = shaped.getShape();
 
@@ -247,7 +247,7 @@ Type GetQuantizedType(Builder builder, const Type input_type,
                         builder.getUnknownLoc());
     }
   } else if (min.size() == max.size()) {
-    auto shape = input_type.dyn_cast<ShapedType>();
+    auto shape = mlir::dyn_cast<ShapedType>(input_type);
     if (!shape || shape.getRank() <= quant_dim ||
         static_cast<int64_t>(min.size()) != shape.getDimSize(quant_dim)) {
       return {};
@@ -277,11 +277,13 @@ Type GetQuantizedType(Builder builder, const Type input_type,
 
 // TODO(fengliuai): promote this utility method to mlir QuantOps.
 TypeAttr RescaleQuantizedType(const Type input, const Attribute factor) {
-  const auto factor_values = factor.dyn_cast_or_null<DenseFPElementsAttr>();
+  const auto factor_values =
+      mlir::dyn_cast_or_null<DenseFPElementsAttr>(factor);
   if (!factor_values) return {};
   const auto ele_type = quant::QuantizedType::getQuantizedElementType(input);
   if (!ele_type) return {};
-  if (auto qtype = ele_type.dyn_cast<quant::UniformQuantizedPerAxisType>()) {
+  if (auto qtype =
+          mlir::dyn_cast<quant::UniformQuantizedPerAxisType>(ele_type)) {
     const ArrayRef<double> scales = qtype.getScales();
     // Broadcasting hasn't been implemented yet.
     if (static_cast<int64_t>(scales.size()) != factor_values.getNumElements())
@@ -315,8 +317,8 @@ TypeAttr GetQuantizedTypeAttr(const Builder builder, const Type input_type,
                               const bool legacy_float_scale,
                               const bool use_fake_quant_num_bits) {
   SmallVector<double, 4> min_value, max_value;
-  const auto mins = min.dyn_cast<DenseFPElementsAttr>();
-  const auto maxs = max.dyn_cast<DenseFPElementsAttr>();
+  const auto mins = mlir::dyn_cast<DenseFPElementsAttr>(min);
+  const auto maxs = mlir::dyn_cast<DenseFPElementsAttr>(max);
   if (mins && maxs) {
     min_value.reserve(mins.getNumElements());
     max_value.reserve(maxs.getNumElements());
@@ -327,8 +329,8 @@ TypeAttr GetQuantizedTypeAttr(const Builder builder, const Type input_type,
       max_value.push_back(FloatAttr::getValueAsDouble(*it));
     }
   } else {
-    const auto fmin = min.dyn_cast<FloatAttr>();
-    const auto fmax = max.dyn_cast<FloatAttr>();
+    const auto fmin = mlir::dyn_cast<FloatAttr>(min);
+    const auto fmax = mlir::dyn_cast<FloatAttr>(max);
     if (fmin && fmax) {
       min_value.push_back(fmin.getValueAsDouble());
       max_value.push_back(fmax.getValueAsDouble());
@@ -348,14 +350,15 @@ TypeAttr CastQuantizedTypeAttrFromExpressedType(const Builder builder,
                                                 const TypeAttr source,
                                                 const Type target,
                                                 const int axis) {
-  const auto source_type = source.getValue().dyn_cast_or_null<ShapedType>();
+  const auto source_type =
+      mlir::dyn_cast_or_null<ShapedType>(source.getValue());
   if (!source_type) return {};
   const auto src_ele_type = source_type.getElementType();
-  auto qtype = src_ele_type.dyn_cast<quant::QuantizedType>();
+  auto qtype = mlir::dyn_cast<quant::QuantizedType>(src_ele_type);
 
   // Reset the quantization dimensions if it is per-axis.
   if (const auto per_axis =
-          qtype.dyn_cast_or_null<quant::UniformQuantizedPerAxisType>()) {
+          mlir::dyn_cast_or_null<quant::UniformQuantizedPerAxisType>(qtype)) {
     // For the pass-through ops, we don't know which the dimension will be the
     // new quantization dimension. Only if the new quantization dimension can
     // be inferred, it is safe to reset the per-axis quantized type.
@@ -429,7 +432,7 @@ Type GetUniformQuantizedTypeForWeight(
 
   SmallVector<double, 4> mins(1, std::numeric_limits<double>::max());
   SmallVector<double, 4> maxs(1, std::numeric_limits<double>::min());
-  const auto fp = attr.dyn_cast<DenseFPElementsAttr>();
+  const auto fp = mlir::dyn_cast<DenseFPElementsAttr>(attr);
   if (!fp) return {};
 
   // Computes the effective min/max values of the attribute values.
@@ -440,7 +443,7 @@ Type GetUniformQuantizedTypeForWeight(
       GetQuantizedType(builder, attr.getType(), mins[0], maxs[0],
                        /*quant_dim=*/-1, num_bits, narrow_range, is_signed,
                        legacy_float_scale, use_fake_quant_num_bits);
-  if (const auto ele_type = type.dyn_cast_or_null<TensorType>())
+  if (const auto ele_type = mlir::dyn_cast_or_null<TensorType>(type))
     return ele_type.getElementType();
 
   return {};
@@ -451,7 +454,7 @@ Type GetUniformQuantizedPerAxisTypeForWeight(
     const unsigned num_bits, const bool is_signed, const bool narrow_range,
     const bool legacy_float_scale, const bool use_fake_quant_num_bits) {
   const Builder builder(attr.getContext());
-  const auto shape = attr.getType().cast<ShapedType>().getShape();
+  const auto shape = mlir::cast<ShapedType>(attr.getType()).getShape();
   if (static_cast<int>(shape.size()) <= quant_dim) return {};
   // `symmetric` can only be used when it is `signed` and `narrow_range`.
   if (symmetric && (!is_signed || !narrow_range)) return {};
@@ -462,7 +465,7 @@ Type GetUniformQuantizedPerAxisTypeForWeight(
                       std::multiplies<int64_t>());
   SmallVector<double, 4> mins(dim_size, std::numeric_limits<double>::max());
   SmallVector<double, 4> maxs(dim_size, std::numeric_limits<double>::min());
-  const auto fp = attr.dyn_cast<DenseFPElementsAttr>();
+  const auto fp = mlir::dyn_cast<DenseFPElementsAttr>(attr);
   if (!fp) return {};
 
   // Computes the effective min/max values of the attribute values.
@@ -471,7 +474,7 @@ Type GetUniformQuantizedPerAxisTypeForWeight(
   const auto type = GetQuantizedType(
       builder, attr.getType(), mins, maxs, quant_dim, num_bits, narrow_range,
       is_signed, legacy_float_scale, use_fake_quant_num_bits);
-  if (auto ele_type = type.dyn_cast_or_null<TensorType>())
+  if (auto ele_type = mlir::dyn_cast_or_null<TensorType>(type))
     return ele_type.getElementType();
 
   return {};
@@ -497,13 +500,13 @@ quant::QuantizedType GetUniformQuantizedTypeForBias(
     expressed_type = op_type.getExpressedType();
 
     if (const auto type =
-            op_type.dyn_cast<quant::UniformQuantizedPerAxisType>()) {
+            mlir::dyn_cast<quant::UniformQuantizedPerAxisType>(op_type)) {
       if (axis_size != 1 && axis_size != type.getScales().size()) return {};
       if (quant_dim != -1 && quant_dim != type.getQuantizedDimension())
         return {};
       axis_size = type.getScales().size();
       quant_dim = type.getQuantizedDimension();
-    } else if (!op_type.isa<quant::UniformQuantizedType>()) {
+    } else if (!mlir::isa<quant::UniformQuantizedType>(op_type)) {
       return {};
     }
   }
@@ -513,12 +516,12 @@ quant::QuantizedType GetUniformQuantizedTypeForBias(
   llvm::SmallVector<double, 4> scales(axis_size, 1.0);
   for (const auto op_type : op_types) {
     if (const auto type =
-            op_type.dyn_cast<quant::UniformQuantizedPerAxisType>()) {
+            mlir::dyn_cast<quant::UniformQuantizedPerAxisType>(op_type)) {
       for (const auto& index_scale : llvm::enumerate(type.getScales())) {
         scales[index_scale.index()] *= index_scale.value();
       }
     } else if (const auto type =
-                   op_type.dyn_cast<quant::UniformQuantizedType>()) {
+                   mlir::dyn_cast<quant::UniformQuantizedType>(op_type)) {
       for (int index = 0; index < axis_size; ++index) {
         scales[index] *= type.getScale();
       }
@@ -557,11 +560,11 @@ quant::QuantizedType GetUniformQuantizedTypeForBias(
 
 ElementsAttr QuantizeLegacy(const Attribute real_value,
                             const Type tensor_type) {
-  if (!real_value.isa<DenseFPElementsAttr>() ||
+  if (!mlir::isa<DenseFPElementsAttr>(real_value) ||
       !quant::QuantizedType::getQuantizedElementType(tensor_type)) {
     return {};
   }
-  const auto real_values_attr = real_value.cast<DenseFPElementsAttr>();
+  const auto real_values_attr = mlir::cast<DenseFPElementsAttr>(real_value);
   auto q_type = quant::QuantizedType::getQuantizedElementType(tensor_type);
   std::vector<float> real_values;
   llvm::SmallVector<APInt, 8> quantized_attr;
@@ -571,16 +574,15 @@ ElementsAttr QuantizeLegacy(const Attribute real_value,
                  std::back_inserter(real_values), [&](APFloat value) -> float {
                    return value.convertToFloat();
                  });
-  const ShapedType new_dense_type =
-      q_type.castExpressedToStorageType(real_values_attr.getType())
-          .dyn_cast_or_null<ShapedType>();
+  const ShapedType new_dense_type = mlir::dyn_cast_or_null<ShapedType>(
+      q_type.castExpressedToStorageType(real_values_attr.getType()));
   const int width =
-      q_type.getStorageType().dyn_cast<mlir::IntegerType>().getWidth();
+      mlir::dyn_cast<mlir::IntegerType>(q_type.getStorageType()).getWidth();
 
   if (width == 8 && q_type.getStorageTypeMax() == 127 &&
       q_type.getStorageTypeMin() == -127) {
     std::vector<int8_t> quantized_values(real_values_attr.getNumElements());
-    if (auto uniform_type = q_type.dyn_cast<UniformQuantizedType>()) {
+    if (auto uniform_type = mlir::dyn_cast<UniformQuantizedType>(q_type)) {
       float min, max, scale;
       tflite::tensor_utils::SymmetricQuantizeFloats(
           real_values.data(), real_values.size(), quantized_values.data(), &min,
@@ -590,7 +592,7 @@ ElementsAttr QuantizeLegacy(const Attribute real_value,
         return Quantize(real_value, tensor_type);
       }
     } else if (auto uniform_type =
-                   q_type.dyn_cast<quant::UniformQuantizedPerAxisType>()) {
+                   mlir::dyn_cast<quant::UniformQuantizedPerAxisType>(q_type)) {
       std::vector<float> scales_inv;
       std::vector<int32_t> dimension;
       dimension.insert(dimension.end(), new_dense_type.getShape().begin(),
@@ -619,7 +621,8 @@ ElementsAttr QuantizeLegacy(const Attribute real_value,
     // not correctly quantized by legacy quantizer so call the new Quantize.
     return Quantize(real_value, tensor_type);
   } else if (width == 16) {
-    if (const auto uniform_type = q_type.dyn_cast<UniformQuantizedType>()) {
+    if (const auto uniform_type =
+            mlir::dyn_cast<UniformQuantizedType>(q_type)) {
       const auto quantized_values =
           tflite::optimize::utils::SymmetricQuantizeFloatsToInt16(
               real_values.data(), real_values.size(), uniform_type.getScale());
@@ -632,10 +635,11 @@ ElementsAttr QuantizeLegacy(const Attribute real_value,
     }
   } else if (width == 32) {
     std::vector<float> scales;
-    if (const auto uniform_type = q_type.dyn_cast<UniformQuantizedType>()) {
+    if (const auto uniform_type =
+            mlir::dyn_cast<UniformQuantizedType>(q_type)) {
       scales.push_back(uniform_type.getScale());
     } else if (const auto uniform_type =
-                   q_type.dyn_cast<quant::UniformQuantizedPerAxisType>()) {
+                   mlir::dyn_cast<quant::UniformQuantizedPerAxisType>(q_type)) {
       scales.insert(scales.end(), uniform_type.getScales().begin(),
                     uniform_type.getScales().end());
     } else {
@@ -658,8 +662,8 @@ ElementsAttr Quantize(const Attribute real_value, const Type tensor_type) {
   if (const auto q_type =
           quant::QuantizedType::getQuantizedElementType(tensor_type)) {
     Type converted_type;
-    return quantfork::quantizeAttr(real_value, q_type, converted_type)
-        .dyn_cast_or_null<ElementsAttr>();
+    return mlir::dyn_cast_or_null<ElementsAttr>(
+        quantfork::quantizeAttr(real_value, q_type, converted_type));
   }
   return {};
 }
@@ -680,10 +684,10 @@ quant::QuantizedType DownCastScale(QuantizedType type,
   if (!type) return type;
   SmallVector<double, 4> scales(mins.size());
   SmallVector<int64_t, 4> zero_points(mins.size());
-  if (auto q_type = type.dyn_cast<UniformQuantizedType>()) {
+  if (auto q_type = mlir::dyn_cast<UniformQuantizedType>(type)) {
     zero_points.push_back(q_type.getZeroPoint());
   } else if (auto q_type =
-                 type.dyn_cast<quant::UniformQuantizedPerAxisType>()) {
+                 mlir::dyn_cast<quant::UniformQuantizedPerAxisType>(type)) {
     zero_points = {q_type.getZeroPoints().begin(),
                    q_type.getZeroPoints().end()};
   }
@@ -703,13 +707,13 @@ quant::QuantizedType DownCastScale(QuantizedType type,
       }
     }
   }
-  if (auto q_type = type.dyn_cast<UniformQuantizedType>()) {
+  if (auto q_type = mlir::dyn_cast<UniformQuantizedType>(type)) {
     return UniformQuantizedType::get(q_type.getFlags(), q_type.getStorageType(),
                                      q_type.getExpressedType(), scales[0],
                                      zero_points[0], q_type.getStorageTypeMin(),
                                      q_type.getStorageTypeMax());
   } else if (auto q_type =
-                 type.dyn_cast<quant::UniformQuantizedPerAxisType>()) {
+                 mlir::dyn_cast<quant::UniformQuantizedPerAxisType>(type)) {
     return quant::UniformQuantizedPerAxisType::get(
         q_type.getFlags(), q_type.getStorageType(), q_type.getExpressedType(),
         scales, zero_points, q_type.getQuantizedDimension(),
@@ -724,8 +728,8 @@ quant::QuantizedType DownCastScale(QuantizedType type,
 static bool PreferResultScale(Operation* op) {
   int float_operands = 0;
   for (auto operand : op->getOperands()) {
-    if (auto operand_type = operand.getType().dyn_cast<ShapedType>()) {
-      if (operand_type.getElementType().isa<FloatType>()) {
+    if (auto operand_type = mlir::dyn_cast<ShapedType>(operand.getType())) {
+      if (mlir::isa<FloatType>(operand_type.getElementType())) {
         if (++float_operands > 1) return true;
       }
     }
@@ -903,9 +907,9 @@ LogicalResult VerifySameScales(Operation* op) {
     // method.
     if (!same_scale_op.RequiredSameQuantizedAxes()) {
       const auto expected_per_axis_qtype =
-          expected_params.dyn_cast<quant::UniformQuantizedPerAxisType>();
+          mlir::dyn_cast<quant::UniformQuantizedPerAxisType>(expected_params);
       const auto compared_per_axis_qtype =
-          compared_params.dyn_cast<quant::UniformQuantizedPerAxisType>();
+          mlir::dyn_cast<quant::UniformQuantizedPerAxisType>(compared_params);
       if (expected_per_axis_qtype && compared_per_axis_qtype &&
           llvm::equal(expected_per_axis_qtype.getScales(),
                       compared_per_axis_qtype.getScales()) &&
@@ -947,8 +951,8 @@ quant::UniformQuantizedType GetFixedOutputRange(
     const bool is_signed, const int bit_width, const Type tensor_type,
     const double scale, int64_t zero_point, int64_t storage_min,
     int64_t storage_max) {
-  const auto result_type = tensor_type.cast<ShapedType>();
-  if (!result_type.getElementType().isa<FloatType>()) return {};
+  const auto result_type = mlir::cast<ShapedType>(tensor_type);
+  if (!mlir::isa<FloatType>(result_type.getElementType())) return {};
   Builder builder(result_type.getContext());
 
   // Only support 8-bits and 16-bits
@@ -990,14 +994,14 @@ Type ConvertSignedQuantizedToUnsigned(const Type signed_tensor_type,
 
   const auto flags = !quant::QuantizationFlags::Signed;
   QType new_qtype;
-  if (auto uqtype = qtype.dyn_cast<quant::UniformQuantizedType>()) {
+  if (auto uqtype = mlir::dyn_cast<quant::UniformQuantizedType>(qtype)) {
     new_qtype = quant::UniformQuantizedType::getChecked(
         loc, flags, qtype.getStorageType(), qtype.getExpressedType(),
         uqtype.getScale(), uqtype.getZeroPoint() - offset,
         uqtype.getStorageTypeMin() - offset,
         uqtype.getStorageTypeMax() - offset);
   } else if (auto aqtype =
-                 qtype.dyn_cast<quant::UniformQuantizedPerAxisType>()) {
+                 mlir::dyn_cast<quant::UniformQuantizedPerAxisType>(qtype)) {
     const auto zero_points = aqtype.getZeroPoints();
     llvm::SmallVector<int64_t, 4> new_zero_points(zero_points.begin(),
                                                   zero_points.end());
diff --git a/tensorflow/compiler/mlir/quantization/common/uniform_quantized_types.cc b/tensorflow/compiler/mlir/quantization/common/uniform_quantized_types.cc
index a64ba201250727..7f66d76798acfa 100644
--- a/tensorflow/compiler/mlir/quantization/common/uniform_quantized_types.cc
+++ b/tensorflow/compiler/mlir/quantization/common/uniform_quantized_types.cc
@@ -94,12 +94,12 @@ bool IsStorageTypeI32(const QuantizedType quantized_type) {
 
 bool IsExpressedTypeF32(const QuantizedType quantized_type) {
   const Type expressed_type = quantized_type.getExpressedType();
-  return expressed_type.isa<Float32Type>();
+  return mlir::isa<Float32Type>(expressed_type);
 }
 
 bool IsI8F32UniformQuantizedType(const Type type) {
   const UniformQuantizedType quantized_type =
-      type.dyn_cast_or_null<UniformQuantizedType>();
+      mlir::dyn_cast_or_null<UniformQuantizedType>(type);
   if (!quantized_type) {
     LLVM_DEBUG(llvm::dbgs()
                << "Expected a uniform quantized type. Got: " << type << ".\n");
@@ -123,7 +123,7 @@ bool IsI8F32UniformQuantizedType(const Type type) {
 
 bool IsI8F32UniformQuantizedPerAxisType(const Type type) {
   const UniformQuantizedPerAxisType quantized_per_axis_type =
-      type.dyn_cast_or_null<UniformQuantizedPerAxisType>();
+      mlir::dyn_cast_or_null<UniformQuantizedPerAxisType>(type);
   if (!quantized_per_axis_type) {
     LLVM_DEBUG(llvm::dbgs()
                << "Expected a uniform quantized type. Got: " << type << ".\n");
@@ -147,7 +147,7 @@ bool IsI8F32UniformQuantizedPerAxisType(const Type type) {
 
 bool IsI32F32UniformQuantizedType(const Type type) {
   const UniformQuantizedType quantized_type =
-      type.dyn_cast_or_null<UniformQuantizedType>();
+      mlir::dyn_cast_or_null<UniformQuantizedType>(type);
   if (!quantized_type) {
     LLVM_DEBUG(llvm::dbgs()
                << "Expected a uniform quantized type. Got: " << type << ".\n");
@@ -171,7 +171,7 @@ bool IsI32F32UniformQuantizedType(const Type type) {
 
 bool IsI32F32UniformQuantizedPerAxisType(const Type type) {
   const UniformQuantizedPerAxisType quantized_per_axis_type =
-      type.dyn_cast_or_null<UniformQuantizedPerAxisType>();
+      mlir::dyn_cast_or_null<UniformQuantizedPerAxisType>(type);
   if (!quantized_per_axis_type) {
     LLVM_DEBUG(llvm::dbgs()
                << "Expected a uniform quantized type. Got: " << type << ".\n");
@@ -208,11 +208,11 @@ bool IsSupportedByTfliteQuantizeOrDequantizeOps(IntegerType storage_type) {
 }
 
 bool IsQuantizedTensorType(Type type) {
-  if (!type.isa<TensorType>()) {
+  if (!mlir::isa<TensorType>(type)) {
     return false;
   }
-  Type element_type = type.cast<TensorType>().getElementType();
-  return element_type.isa<QuantizedType>();
+  Type element_type = mlir::cast<TensorType>(type).getElementType();
+  return mlir::isa<QuantizedType>(element_type);
 }
 
 bool IsOpFullyQuantized(Operation* op) {
diff --git a/tensorflow/compiler/mlir/quantization/common/uniform_quantized_types.h b/tensorflow/compiler/mlir/quantization/common/uniform_quantized_types.h
index ab850c878ff0dd..e30db98a9616de 100644
--- a/tensorflow/compiler/mlir/quantization/common/uniform_quantized_types.h
+++ b/tensorflow/compiler/mlir/quantization/common/uniform_quantized_types.h
@@ -82,7 +82,7 @@ bool IsExpressedTypeF32(QuantizedType quantized_type);
 // Given a value, extract the `ElementType`.
 // `value` should be a non-null `TensorType`.
 inline Type GetElementType(const Value value) {
-  return value.getType().cast<TensorType>().getElementType();
+  return mlir::cast<TensorType>(value.getType()).getElementType();
 }
 
 // Returns true iff `type` is a uniform quantized type whose storage type is
diff --git a/tensorflow/compiler/mlir/quantization/common/uniform_quantized_types_test.cc b/tensorflow/compiler/mlir/quantization/common/uniform_quantized_types_test.cc
index e9443a667fcef3..d4055b1732b1d8 100644
--- a/tensorflow/compiler/mlir/quantization/common/uniform_quantized_types_test.cc
+++ b/tensorflow/compiler/mlir/quantization/common/uniform_quantized_types_test.cc
@@ -348,7 +348,8 @@ TEST_F(IsI8F32UniformQuantizedTypeTest, UniformQuantizedTypeSucceeds) {
       /*flags=*/QuantizationFlags::Signed, builder_.getI8Type(),
       builder_.getF32Type(), /*scale=*/1.0,
       /*zeroPoint=*/0, /*storageTypeMin=*/-128, /*storageTypeMax=*/127);
-  EXPECT_THAT(qi8_type.dyn_cast_or_null<UniformQuantizedType>(), NotNull());
+  EXPECT_THAT(mlir::dyn_cast_or_null<UniformQuantizedType>(qi8_type),
+              NotNull());
 }
 
 TEST_F(IsI8F32UniformQuantizedTypeTest, StorageTypeI8Succeeds) {
@@ -398,8 +399,9 @@ TEST_F(IsI8F32UniformQuantizedTypeTest, UniformQuantizedPerAxisTypeSucceeds) {
           /*scales=*/{1.0},
           /*zeroPoints=*/{0}, /*quantizedDimension=*/0, /*storageTypeMin=*/-128,
           /*storageTypeMax=*/127);
-  EXPECT_THAT(qi8_per_axis_type.dyn_cast_or_null<UniformQuantizedPerAxisType>(),
-              NotNull());
+  EXPECT_THAT(
+      mlir::dyn_cast_or_null<UniformQuantizedPerAxisType>(qi8_per_axis_type),
+      NotNull());
 }
 
 TEST_F(IsI8F32UniformQuantizedPerAxisTypeTest, StorageTypeI8Succeeds) {
@@ -452,7 +454,8 @@ TEST_F(IsI32F32UniformQuantizedTypeTest, UniformQuantizedTypeSucceeds) {
       /*zeroPoint=*/0, /*storageTypeMin=*/-2147483647,
       /*storageTypeMax=*/2147483646);
   EXPECT_TRUE(IsI32F32UniformQuantizedType(qi32_type));
-  EXPECT_THAT(qi32_type.dyn_cast_or_null<UniformQuantizedType>(), NotNull());
+  EXPECT_THAT(mlir::dyn_cast_or_null<UniformQuantizedType>(qi32_type),
+              NotNull());
 }
 
 TEST_F(IsI32F32UniformQuantizedTypeTest, StorageTypeI32Succeeds) {
@@ -509,7 +512,7 @@ TEST_F(IsI32F32UniformQuantizedPerAxisTypeTest,
       /*storageTypeMax=*/127);
   EXPECT_FALSE(IsI32F32UniformQuantizedPerAxisType(qi8_type));
   EXPECT_FALSE(IsStorageTypeI32(qi8_type));
-  EXPECT_THAT(qi8_type.dyn_cast_or_null<UniformQuantizedPerAxisType>(),
+  EXPECT_THAT(mlir::dyn_cast_or_null<UniformQuantizedPerAxisType>(qi8_type),
               IsNull());
 }
 
@@ -523,7 +526,7 @@ TEST_F(IsI32F32UniformQuantizedTypeTest, UniformQuantizedPerAxisTypeSucceeds) {
           /*storageTypeMin=*/-2147483647, /*storageTypeMax=*/2147483646);
 
   EXPECT_THAT(
-      qi32_per_axis_type.dyn_cast_or_null<UniformQuantizedPerAxisType>(),
+      mlir::dyn_cast_or_null<UniformQuantizedPerAxisType>(qi32_per_axis_type),
       NotNull());
 }
 
diff --git a/tensorflow/compiler/mlir/quantization/stablehlo/cc/report.cc b/tensorflow/compiler/mlir/quantization/stablehlo/cc/report.cc
index a619197c27e135..f8181deca51a0e 100644
--- a/tensorflow/compiler/mlir/quantization/stablehlo/cc/report.cc
+++ b/tensorflow/compiler/mlir/quantization/stablehlo/cc/report.cc
@@ -85,9 +85,8 @@ std::optional<QuantizationResult> GetQuantizationResult(func::CallOp call_op) {
 std::optional<QuantizationResult> GetQuantizationResult(
     TF::XlaCallModuleOp xla_call_module_op) {
   const StringAttr callee_name_attr =
-      xla_call_module_op
-          ->getDiscardableAttr(kOriginalStablehloEntryFunctionAttrName)
-          .dyn_cast_or_null<StringAttr>();
+      mlir::dyn_cast_or_null<StringAttr>(xla_call_module_op->getDiscardableAttr(
+          kOriginalStablehloEntryFunctionAttrName));
 
   // `TF::XlaCallModuleOp` without the `_original_entry_function` means it is
   // not a quantizable unit.
diff --git a/tensorflow/compiler/mlir/quantization/stablehlo/passes/bridge/convert_tf_quant_ops_to_mhlo.cc b/tensorflow/compiler/mlir/quantization/stablehlo/passes/bridge/convert_tf_quant_ops_to_mhlo.cc
index cd861d934e75f8..965da4ff998635 100644
--- a/tensorflow/compiler/mlir/quantization/stablehlo/passes/bridge/convert_tf_quant_ops_to_mhlo.cc
+++ b/tensorflow/compiler/mlir/quantization/stablehlo/passes/bridge/convert_tf_quant_ops_to_mhlo.cc
@@ -88,7 +88,7 @@ FailureOr<TensorType> GetUniformQuantizedType(
   }
 
   auto original_element_type = getElementTypeOrSelf(original_type);
-  if (!original_element_type.isa<TF::Qint8Type, TF::Qint32Type>()) {
+  if (!mlir::isa<TF::Qint8Type, TF::Qint32Type>(original_element_type)) {
     return rewriter.notifyMatchFailure(
         op, "Quantized type must be qint8 or qint32.");
   }
@@ -112,7 +112,7 @@ FailureOr<TensorType> GetUniformQuantizedType(
         quantized_dimension, storage_type_min, storage_type_max);
   }
 
-  return original_type.cast<TensorType>().clone(elem_ty);
+  return mlir::cast<TensorType>(original_type).clone(elem_ty);
 }
 
 // If operand is TF const op, create MHLO constant op from the contents.
@@ -178,8 +178,8 @@ FailureOr<ElementsAttr> ConvertPaddingAttr(
     const xla::ConvolutionDimensionNumbers &dnums, PatternRewriter &rewriter) {
   StringAttr conv_padding = op.getPaddingAttr();
   SmallVector<int64_t> padding_nums;
-  ShapedType lhs_shape = op.getLhs().getType().template cast<ShapedType>();
-  ShapedType rhs_shape = op.getRhs().getType().template cast<ShapedType>();
+  ShapedType lhs_shape = mlir::cast<ShapedType>(op.getLhs().getType());
+  ShapedType rhs_shape = mlir::cast<ShapedType>(op.getRhs().getType());
 
   // Handle only static shape cases.
   // TODO(b/260284866): Handle dynamic shape cases.
@@ -203,15 +203,15 @@ FailureOr<ElementsAttr> ConvertPaddingAttr(
     padding_nums.resize(padding_nums_size);
     for (int i = 0; i < dnums.input_spatial_dimensions_size(); ++i) {
       const int64_t stride =
-          op.getWindowStridesAttr()[i].template cast<IntegerAttr>().getInt();
+          mlir::cast<IntegerAttr>(op.getWindowStridesAttr()[i]).getInt();
       const int64_t lhs_size_dilated =
           ::tensorflow::UniformQuantizedConvolutionParams::DilatedSize(
               lhs_shape.getDimSize(dnums.input_spatial_dimensions(i)),
-              op.getLhsDilationAttr()[i].template cast<IntegerAttr>().getInt());
+              mlir::cast<IntegerAttr>(op.getLhsDilationAttr()[i]).getInt());
       const int64_t rhs_size_dilated =
           ::tensorflow::UniformQuantizedConvolutionParams::DilatedSize(
               rhs_shape.getDimSize(dnums.kernel_spatial_dimensions(i)),
-              op.getRhsDilationAttr()[i].template cast<IntegerAttr>().getInt());
+              mlir::cast<IntegerAttr>(op.getRhsDilationAttr()[i]).getInt());
 
       const int64_t output_size = (lhs_size_dilated + stride - 1) / stride;
       const int64_t total_padding = std::max(
@@ -262,7 +262,7 @@ FailureOr<SmallVector<NamedAttribute>> ConvertToMhloConvolutionOpAttrs(
                attr.getName() == op.getLhsDilationAttrName() ||
                attr.getName() == op.getRhsDilationAttrName()) {
       attr.setValue(ConvertToDenseElementsAttr(
-          attr.getValue().template cast<ArrayAttr>(), rewriter));
+          mlir::cast<ArrayAttr>(attr.getValue()), rewriter));
       converted_attrs.push_back(attr);
     }
   }
@@ -362,9 +362,9 @@ class ConvertUniformQuantizeOp
         op->getLoc(), *output_type, op.getInput());
     rewriter.replaceOpWithNewOp<mhlo::BitcastConvertOp>(
         op,
-        output_type->clone(output_type->getElementType()
-                               .dyn_cast<quant::QuantizedType>()
-                               .getStorageType()),
+        output_type->clone(
+            mlir::dyn_cast<quant::QuantizedType>(output_type->getElementType())
+                .getStorageType()),
         result);
 
     return success();
@@ -438,9 +438,9 @@ class ConvertUniformRequantizeOp
         op->getLoc(), *output_type, input_quant);
     rewriter.replaceOpWithNewOp<mhlo::BitcastConvertOp>(
         op,
-        output_type->clone(output_type->getElementType()
-                               .dyn_cast<quant::QuantizedType>()
-                               .getStorageType()),
+        output_type->clone(
+            mlir::dyn_cast<quant::QuantizedType>(output_type->getElementType())
+                .getStorageType()),
         result);
     return success();
   }
@@ -502,9 +502,9 @@ class ConvertUniformQuantizedDotOp
                                      /*precision_config=*/nullptr);
     rewriter.replaceOpWithNewOp<mhlo::BitcastConvertOp>(
         op,
-        output_type->clone(output_type->getElementType()
-                               .dyn_cast<quant::QuantizedType>()
-                               .getStorageType()),
+        output_type->clone(
+            mlir::dyn_cast<quant::QuantizedType>(output_type->getElementType())
+                .getStorageType()),
         result);
     return success();
   }
@@ -564,9 +564,9 @@ class ConvertUniformQuantizedConvolutionOp
         op->getLoc(), *output_type, operands, *converted_attrs_or);
     rewriter.replaceOpWithNewOp<mhlo::BitcastConvertOp>(
         op,
-        output_type->clone(output_type->getElementType()
-                               .dyn_cast<quant::QuantizedType>()
-                               .getStorageType()),
+        output_type->clone(
+            mlir::dyn_cast<quant::QuantizedType>(output_type->getElementType())
+                .getStorageType()),
         result);
     return success();
   }
@@ -582,7 +582,7 @@ class ConvertUniformQuantizedAddOp
       ConversionPatternRewriter &rewriter) const override {
     Value lhs = adaptor.getLhs();
 
-    auto lhs_type = lhs.getType().cast<ShapedType>();
+    auto lhs_type = mlir::cast<ShapedType>(lhs.getType());
     if (!lhs_type.hasRank()) {
       return rewriter.notifyMatchFailure(
           op, "Legalization supports cases where only lhs rank known.");
@@ -632,9 +632,9 @@ class ConvertUniformQuantizedAddOp
         op->getLoc(), *output_type, lhs, *rhs_or, broadcast_dims);
     rewriter.replaceOpWithNewOp<mhlo::BitcastConvertOp>(
         op,
-        output_type->clone(output_type->getElementType()
-                               .dyn_cast<quant::QuantizedType>()
-                               .getStorageType()),
+        output_type->clone(
+            mlir::dyn_cast<quant::QuantizedType>(output_type->getElementType())
+                .getStorageType()),
         result);
     return success();
   }
@@ -692,9 +692,9 @@ class ConvertUniformQuantizedClipByValueOp
         op->getLoc(), *output_type, res_min_clipped, *max_or, broadcast_dims);
     rewriter.replaceOpWithNewOp<mhlo::BitcastConvertOp>(
         op,
-        output_type->clone(output_type->getElementType()
-                               .dyn_cast<quant::QuantizedType>()
-                               .getStorageType()),
+        output_type->clone(
+            mlir::dyn_cast<quant::QuantizedType>(output_type->getElementType())
+                .getStorageType()),
         res_max_clipped);
     return success();
   }
diff --git a/tensorflow/compiler/mlir/quantization/stablehlo/passes/bridge/convert_tf_quant_types.cc b/tensorflow/compiler/mlir/quantization/stablehlo/passes/bridge/convert_tf_quant_types.cc
index 65192fc1117673..f07097a109a0af 100644
--- a/tensorflow/compiler/mlir/quantization/stablehlo/passes/bridge/convert_tf_quant_types.cc
+++ b/tensorflow/compiler/mlir/quantization/stablehlo/passes/bridge/convert_tf_quant_types.cc
@@ -71,7 +71,7 @@ bool IsIllegalType(Type type) {
 // If input is not TF qint types, returns the original type.
 Type ToLegalType(Type type) {
   if (IsTFQintType(type)) return GetIntTypeFromTFQint(type);
-  if (auto shaped = type.dyn_cast<ShapedType>()) {
+  if (auto shaped = mlir::dyn_cast<ShapedType>(type)) {
     Type elem = shaped.getElementType();
     if (IsTFQintType(elem)) return shaped.clone(ToLegalType(elem));
   }
@@ -289,7 +289,7 @@ class TFConstOpQuantToIntPattern : public OpConversionPattern<TF::ConstOp> {
     }
     auto dense_attr_or = GetDenseAttrFromTensorProtoAttr(
         tensor_proto_attr.getValue(),
-        ToLegalType(op.getOutput().getType()).dyn_cast<TensorType>());
+        mlir::dyn_cast<TensorType>(ToLegalType(op.getOutput().getType())));
     if (failed(dense_attr_or)) {
       op->emitError("failed to get DenseElementAttr.");
       return failure();
diff --git a/tensorflow/compiler/mlir/quantization/stablehlo/passes/bridge/verify_quant_legalization.cc b/tensorflow/compiler/mlir/quantization/stablehlo/passes/bridge/verify_quant_legalization.cc
index 2825195addea12..7484ed89aa51b1 100644
--- a/tensorflow/compiler/mlir/quantization/stablehlo/passes/bridge/verify_quant_legalization.cc
+++ b/tensorflow/compiler/mlir/quantization/stablehlo/passes/bridge/verify_quant_legalization.cc
@@ -31,6 +31,7 @@ limitations under the License.
 #include "mlir/IR/TypeUtilities.h"  // from @llvm-project
 #include "mlir/IR/Visitors.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Transforms/DialectConversion.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/quantization/stablehlo/utils/tf_type_utils.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
@@ -53,7 +54,7 @@ class VerifyQuantLegalization
 
 bool IsQuantType(Type type) {
   auto element_type = getElementTypeOrSelf(type);
-  return element_type.isa<quant::UniformQuantizedType>() ||
+  return mlir::isa<quant::UniformQuantizedType>(element_type) ||
          IsTFQintType(element_type);
 }
 
diff --git a/tensorflow/compiler/mlir/quantization/stablehlo/passes/convert_func_to_bfloat16.cc b/tensorflow/compiler/mlir/quantization/stablehlo/passes/convert_func_to_bfloat16.cc
index 0204a19452bb0d..4a85786dc94937 100644
--- a/tensorflow/compiler/mlir/quantization/stablehlo/passes/convert_func_to_bfloat16.cc
+++ b/tensorflow/compiler/mlir/quantization/stablehlo/passes/convert_func_to_bfloat16.cc
@@ -143,8 +143,8 @@ class BFloat16TypePattern : public ConversionPattern {
       state.attributes.set(
           const_op.getValueAttrName(),
           DenseFPElementsAttr::get(
-              const_op.getValue().getType().dyn_cast<ShapedType>().clone(
-                  rewriter.getBF16Type()),
+              mlir::dyn_cast<ShapedType>(const_op.getValue().getType())
+                  .clone(rewriter.getBF16Type()),
               bfloat16_values));
     }
 
diff --git a/tensorflow/compiler/mlir/quantization/stablehlo/passes/defer_activation_transpose.cc b/tensorflow/compiler/mlir/quantization/stablehlo/passes/defer_activation_transpose.cc
index 2716672ba8bceb..686204030c1fdc 100644
--- a/tensorflow/compiler/mlir/quantization/stablehlo/passes/defer_activation_transpose.cc
+++ b/tensorflow/compiler/mlir/quantization/stablehlo/passes/defer_activation_transpose.cc
@@ -155,7 +155,7 @@ class DeferActivationTransposeForMaxPoolReduceWindowOp
                PatternRewriter& rewriter) const override {
     auto transpose_op = cast<TransposeOp>(op.getOperand(0).getDefiningOp());
 
-    const auto result_type = op.getResult(0).getType().cast<TensorType>();
+    const auto result_type = mlir::cast<TensorType>(op.getResult(0).getType());
     const SmallVector<int64_t> new_result_shape =
         Permute<int64_t>(result_type.getShape(), kNchwToNhwcPermutation);
 
diff --git a/tensorflow/compiler/mlir/quantization/stablehlo/passes/fold_constant_transpose.cc b/tensorflow/compiler/mlir/quantization/stablehlo/passes/fold_constant_transpose.cc
index 051745c0d6792b..06e38c3935c417 100644
--- a/tensorflow/compiler/mlir/quantization/stablehlo/passes/fold_constant_transpose.cc
+++ b/tensorflow/compiler/mlir/quantization/stablehlo/passes/fold_constant_transpose.cc
@@ -127,12 +127,13 @@ class FoldTransposedConstantOp
     if (!const_op) return failure();
 
     // Only support float tensors.
-    auto tensor_type = const_op.getType().dyn_cast_or_null<TensorType>();
+    auto tensor_type = mlir::dyn_cast_or_null<TensorType>(const_op.getType());
     if (!tensor_type || !tensor_type.getElementType().isF32()) {
       return failure();
     }
 
-    return success(const_op.getValue().isa_and_nonnull<DenseFPElementsAttr>());
+    return success(
+        mlir::isa_and_nonnull<DenseFPElementsAttr>(const_op.getValue()));
   }
 
   void rewrite(mlir::stablehlo::TransposeOp op,
@@ -140,7 +141,8 @@ class FoldTransposedConstantOp
     auto const_op =
         cast<mlir::stablehlo::ConstantOp>(op.getOperand().getDefiningOp());
 
-    const auto value_attr = const_op.getValue().cast<DenseFPElementsAttr>();
+    const auto value_attr =
+        mlir::cast<DenseFPElementsAttr>(const_op.getValue());
     const ArrayRef<int64_t> original_shape =
         value_attr.getShapedType().getShape();
 
diff --git a/tensorflow/compiler/mlir/quantization/stablehlo/passes/insert_weight_param.cc b/tensorflow/compiler/mlir/quantization/stablehlo/passes/insert_weight_param.cc
index 9c6ad5fcc6e5ae..85e6f0f655de37 100644
--- a/tensorflow/compiler/mlir/quantization/stablehlo/passes/insert_weight_param.cc
+++ b/tensorflow/compiler/mlir/quantization/stablehlo/passes/insert_weight_param.cc
@@ -90,7 +90,7 @@ class InsertWeightParamPattern
     if (op->getNumResults() != 1) {
       return failure();
     }
-    auto type = op->getResult(0).getType().cast<TensorType>();
+    auto type = mlir::cast<TensorType>(op->getResult(0).getType());
     if (!type || !type.getElementType().isF32()) {
       return failure();
     }
@@ -124,11 +124,10 @@ class InsertWeightParamPattern
 
     Type weight_type;
     if (IsPerTensor(weight_only_ptq)) {
-      weight_type =
+      weight_type = dyn_cast<quant::QuantizedType>(
           quant::GetUniformQuantizedTypeForWeight(
               attr, /*symmetric=*/false, /*num_bits=*/8, /*is_signed=*/true,
-              /*narrow_range=*/false, /*legacy_float_scale=*/false)
-              .template dyn_cast<quant::QuantizedType>();
+              /*narrow_range=*/false, /*legacy_float_scale=*/false));
     } else {
       int quantization_dimension = GetQuantizationDimension(
           weight_only_ptq, cast<TF::XlaCallModuleOp>(quantizable_op));
@@ -138,7 +137,7 @@ class InsertWeightParamPattern
           /*narrow_range=*/false, /*legacy_float_scale=*/false);
     }
 
-    auto quant_type = weight_type.template dyn_cast<quant::QuantizedType>();
+    auto quant_type = dyn_cast<quant::QuantizedType>(weight_type);
     if (!quant_type) {
       op->emitError(
           "Failed to get weight quantization parameters for weight-only "
diff --git a/tensorflow/compiler/mlir/quantization/stablehlo/passes/lift_quantizable_spots_as_functions.cc b/tensorflow/compiler/mlir/quantization/stablehlo/passes/lift_quantizable_spots_as_functions.cc
index 6577666ab90f10..8ec0ff211e75c2 100644
--- a/tensorflow/compiler/mlir/quantization/stablehlo/passes/lift_quantizable_spots_as_functions.cc
+++ b/tensorflow/compiler/mlir/quantization/stablehlo/passes/lift_quantizable_spots_as_functions.cc
@@ -66,7 +66,7 @@ Attribute DefaultOrNullAttr(OpBuilder& builder, const Attribute& attr) {
 // Checks whether the value of a constant equals the given float, regardless
 // of the tensor dimension.
 bool FloatValueEquals(const Attribute& attr, const double value) {
-  const auto fp_attr = attr.dyn_cast_or_null<DenseFPElementsAttr>();
+  const auto fp_attr = mlir::dyn_cast_or_null<DenseFPElementsAttr>(attr);
   if (!fp_attr) return false;
 
   if (fp_attr.isSplat()) {
diff --git a/tensorflow/compiler/mlir/quantization/stablehlo/passes/merge_fusion_with_dequantize.cc b/tensorflow/compiler/mlir/quantization/stablehlo/passes/merge_fusion_with_dequantize.cc
index acfe3cfd6fc6b2..9a0d8fb2a25b2b 100644
--- a/tensorflow/compiler/mlir/quantization/stablehlo/passes/merge_fusion_with_dequantize.cc
+++ b/tensorflow/compiler/mlir/quantization/stablehlo/passes/merge_fusion_with_dequantize.cc
@@ -69,8 +69,8 @@ class MergeFusionWithUniformDequantizePattern
     auto func_name = call_op.getCallee();
     if (!func_name.starts_with("quantized_")) return failure();
     if (call_op->getNumResults() != 1) return failure();
-    if (!getElementTypeOrSelf(call_op->getResult(0).getType())
-             .isa<UniformQuantizedType>())
+    if (!mlir::isa<UniformQuantizedType>(
+            getElementTypeOrSelf(call_op->getResult(0).getType())))
       return failure();
 
     // Fetch the callee function.
@@ -89,8 +89,8 @@ class MergeFusionWithUniformDequantizePattern
     // Create a new func.call op with f32 output.
     auto new_call_op = call_op.clone();
     new_call_op->getResult(0).setType(
-        call_op.getResult(0).getType().cast<ShapedType>().clone(
-            rewriter.getF32Type()));
+        mlir::cast<ShapedType>(call_op.getResult(0).getType())
+            .clone(rewriter.getF32Type()));
     rewriter.setInsertionPoint(call_op);
     rewriter.insert(new_call_op);
 
diff --git a/tensorflow/compiler/mlir/quantization/stablehlo/passes/nchw_convolution_to_nhwc.cc b/tensorflow/compiler/mlir/quantization/stablehlo/passes/nchw_convolution_to_nhwc.cc
index 521f701598fb0a..ed2da6ed103273 100644
--- a/tensorflow/compiler/mlir/quantization/stablehlo/passes/nchw_convolution_to_nhwc.cc
+++ b/tensorflow/compiler/mlir/quantization/stablehlo/passes/nchw_convolution_to_nhwc.cc
@@ -73,7 +73,7 @@ class RewriteNchwConvolutionToNhwc
     // Transpose the input tensor: [b, f, 0, 1] => [b, 0, 1, f]
     Value input = op->getOperand(0);
     const TensorType new_input_tensor_type = GetTransposedTensorType(
-        input.getType().cast<TensorType>(), kNchwToNhwcPermutation);
+        mlir::cast<TensorType>(input.getType()), kNchwToNhwcPermutation);
 
     auto input_transpose_op = rewriter.create<mlir::stablehlo::TransposeOp>(
         op.getLoc(), /*resultType0=*/new_input_tensor_type, /*operand=*/input,
@@ -82,7 +82,7 @@ class RewriteNchwConvolutionToNhwc
     // Transpose the filter tensor: [o, i, 0, 1] => [0, 1, i, o]
     Value filter = op->getOperand(1);
     const TensorType new_filter_tensor_type = GetTransposedTensorType(
-        filter.getType().cast<TensorType>(), kOihwToHwioPermutation);
+        mlir::cast<TensorType>(filter.getType()), kOihwToHwioPermutation);
 
     auto filter_transpose_op = rewriter.create<mlir::stablehlo::TransposeOp>(
         op.getLoc(), /*resultType0=*/new_filter_tensor_type, /*operand=*/filter,
@@ -98,7 +98,8 @@ class RewriteNchwConvolutionToNhwc
         /*outputSpatialDimensions=*/SmallVector<int64_t>{1, 2});
 
     // Determine the shape of the output tensor: [b, f, 0, 1] => [b, 0, 1, f]
-    auto output_tensor_type = op->getResult(0).getType().cast<TensorType>();
+    auto output_tensor_type =
+        mlir::cast<TensorType>(op->getResult(0).getType());
     const TensorType new_conv_output_tensor_type =
         GetTransposedTensorType(output_tensor_type, kNchwToNhwcPermutation);
 
diff --git a/tensorflow/compiler/mlir/quantization/stablehlo/passes/quantization_patterns.cc b/tensorflow/compiler/mlir/quantization/stablehlo/passes/quantization_patterns.cc
index b4e12ddc9e0607..8d3ee0717e469e 100644
--- a/tensorflow/compiler/mlir/quantization/stablehlo/passes/quantization_patterns.cc
+++ b/tensorflow/compiler/mlir/quantization/stablehlo/passes/quantization_patterns.cc
@@ -238,7 +238,7 @@ void CreateAndReturnQuantizedBiasPattern(
   if (succeeded(bcast_op)) {
     Value bcast_op_result = (*bcast_op)->getResult(0);
     auto bcast_op_result_type =
-        bcast_op_result.getType().cast<RankedTensorType>();
+        mlir::cast<RankedTensorType>(bcast_op_result.getType());
     const ArrayRef<int64_t> bcast_shape = bcast_op_result_type.getShape();
     const TensorType new_bcast_op_result_type = bcast_op_result_type.cloneWith(
         bcast_shape, accumulation_quantized_element_type);
@@ -246,7 +246,7 @@ void CreateAndReturnQuantizedBiasPattern(
   }
 
   const auto add_op_result_type =
-      add_op_result.getType().cast<RankedTensorType>();
+      mlir::cast<RankedTensorType>(add_op_result.getType());
   const ArrayRef<int64_t> add_op_shape = add_op_result_type.getShape();
   // For quantized bias add case, lhs, rhs, and result have the same types.
   const TensorType new_add_op_result_type = add_op_result_type.cloneWith(
@@ -320,7 +320,7 @@ void RewriteGemmStyleOp(func::FuncOp entry_func_op, PatternRewriter& rewriter,
 
   Value gemm_style_op_result = gemm_style_op->getResult(0);
   const auto gemm_style_op_result_type =
-      gemm_style_op_result.getType().cast<RankedTensorType>();
+      mlir::cast<RankedTensorType>(gemm_style_op_result.getType());
   const ArrayRef<int64_t> gemm_style_shape =
       gemm_style_op_result_type.getShape();
 
@@ -328,11 +328,12 @@ void RewriteGemmStyleOp(func::FuncOp entry_func_op, PatternRewriter& rewriter,
   TensorType new_gemm_style_op_result_type;
 
   const double input_scale =
-      getElementTypeOrSelf(input_type).cast<UniformQuantizedType>().getScale();
+      mlir::cast<UniformQuantizedType>(getElementTypeOrSelf(input_type))
+          .getScale();
 
   if (enable_per_channel_quantized_weight) {
-    ArrayRef<double> filter_scales = getElementTypeOrSelf(filter_type)
-                                         .cast<UniformQuantizedPerAxisType>()
+    ArrayRef<double> filter_scales = mlir::cast<UniformQuantizedPerAxisType>(
+                                         getElementTypeOrSelf(filter_type))
                                          .getScales();
     std::vector<double> result_scales;
     result_scales.reserve(filter_scales.size());
@@ -342,8 +343,8 @@ void RewriteGemmStyleOp(func::FuncOp entry_func_op, PatternRewriter& rewriter,
     }
 
     const ArrayRef<int64_t> zero_points =
-        getElementTypeOrSelf(filter_type)
-            .cast<UniformQuantizedPerAxisType>()
+        mlir::cast<UniformQuantizedPerAxisType>(
+            getElementTypeOrSelf(filter_type))
             .getZeroPoints();
 
     // `stablehlo.convolution` assumes the following format:
@@ -353,7 +354,7 @@ void RewriteGemmStyleOp(func::FuncOp entry_func_op, PatternRewriter& rewriter,
     // `stablehlo.dot_general` legalizable to `tfl.fully_connected` has a
     // filter rank of 2 with the last dimension as the channel dimension.
     const int64_t quantization_dimension =
-        filter_type.cast<ShapedType>().getShape().size() - 1;
+        mlir::cast<ShapedType>(filter_type).getShape().size() - 1;
     accumulation_quantized_element_type =
         CreateI32F32UniformQuantizedPerAxisType(
             gemm_style_op->getLoc(), *rewriter.getContext(), result_scales,
@@ -362,9 +363,9 @@ void RewriteGemmStyleOp(func::FuncOp entry_func_op, PatternRewriter& rewriter,
     new_gemm_style_op_result_type = gemm_style_op_result_type.cloneWith(
         gemm_style_shape, accumulation_quantized_element_type);
   } else {
-    const double filter_scale = getElementTypeOrSelf(filter_type)
-                                    .cast<UniformQuantizedType>()
-                                    .getScale();
+    const double filter_scale =
+        mlir::cast<UniformQuantizedType>(getElementTypeOrSelf(filter_type))
+            .getScale();
     const double result_scale = input_scale * filter_scale;
 
     accumulation_quantized_element_type = CreateI32F32UniformQuantizedType(
@@ -557,13 +558,13 @@ class QuantizeSingularOpPattern : public EntryFuncBodyQuantizationPattern {
 
       // Get the quantized tensor manipulation op's output type and update.
       const auto singular_op_result_type =
-          singular_op_result.getType().cast<RankedTensorType>();
+          mlir::cast<RankedTensorType>(singular_op_result.getType());
       const ArrayRef<int64_t> singular_op_shape =
           singular_op_result_type.getShape();
       const TensorType new_singular_op_result_type =
           singular_op_result_type.cloneWith(
-              singular_op_shape,
-              getElementTypeOrSelf(operand_type).cast<UniformQuantizedType>());
+              singular_op_shape, mlir::cast<UniformQuantizedType>(
+                                     getElementTypeOrSelf(operand_type)));
       singular_op_result.setType(new_singular_op_result_type);
 
       // Create requantization op and return.
@@ -757,13 +758,13 @@ class QuantizeOpWithRegionPattern
       inputs.reserve(op_with_region->getNumOperands());
       for (Value operand : op_with_region->getOperands()) {
         const Type operand_type = operand.getType();
-        if (operand_type.isa<NoneType>()) {
+        if (mlir::isa<NoneType>(operand_type)) {
           inputs.push_back(operand);
           continue;
         }
 
         const Type element_type =
-            operand.getType().cast<TensorType>().getElementType();
+            mlir::cast<TensorType>(operand.getType()).getElementType();
         if (auto dq_op = dyn_cast_or_null<quantfork::DequantizeCastOp>(
                 operand.getDefiningOp())) {
           inputs.push_back(dq_op.getOperand());
@@ -783,13 +784,13 @@ class QuantizeOpWithRegionPattern
       output_types.reserve(op_with_region->getNumResults());
       for (const Value result : op_with_region->getResults()) {
         const Type result_type = result.getType();
-        if (result_type.isa<NoneType>()) {
+        if (mlir::isa<NoneType>(result_type)) {
           outputs_replaced.push_back(result);
           output_types.push_back(result_type);
           continue;
         }
         const Type result_element_type =
-            result.getType().cast<TensorType>().getElementType();
+            mlir::cast<TensorType>(result.getType()).getElementType();
         // If the user is the QuantizeOp, it must be the only user.
         if (result.hasOneUse() &&
             isa<quantfork::QuantizeCastOp>(*result.user_begin())) {
@@ -823,7 +824,7 @@ class QuantizeOpWithRegionPattern
 
       const Type operand_type = quantized_op->getOperandTypes()[0];
       const Type element_type =
-          operand_type.cast<TensorType>().getElementType();
+          mlir::cast<TensorType>(operand_type).getElementType();
       for (Region& region : quantized_op->getRegions()) {
         ReplaceTypesInNestedRegion(region, element_type);
       }
@@ -880,7 +881,7 @@ class QuantizeOpWithRegionPattern
   // Replaces element type of the given tensor type while preserving shape of
   // the given type. If the given type is not tensor type, just return itself.
   Type ReplaceElementType(const Type type, const Type element_type) const {
-    if (TensorType tensor_type = type.dyn_cast<TensorType>()) {
+    if (TensorType tensor_type = mlir::dyn_cast<TensorType>(type)) {
       return tensor_type.clone(element_type);
     }
     return type;
@@ -898,23 +899,23 @@ bool IsQuantizedCompositeFunction(func::CallOp call_op) {
 
   bool has_quantized_types = false;
   for (Value operand : call_op.getOperands()) {
-    if (const TensorType type = operand.getType().dyn_cast<TensorType>()) {
-      if (type.getElementType().isa<FloatType>()) {
+    if (const TensorType type = mlir::dyn_cast<TensorType>(operand.getType())) {
+      if (mlir::isa<FloatType>(type.getElementType())) {
         return false;
       }
-      if (type.getElementType()
-              .isa<UniformQuantizedType, UniformQuantizedPerAxisType>()) {
+      if (mlir::isa<UniformQuantizedType, UniformQuantizedPerAxisType>(
+              type.getElementType())) {
         has_quantized_types = true;
       }
     }
   }
   for (const Value result : call_op.getResults()) {
-    if (const auto type = result.getType().dyn_cast<TensorType>()) {
-      if (type.getElementType().isa<FloatType>()) {
+    if (const auto type = mlir::dyn_cast<TensorType>(result.getType())) {
+      if (mlir::isa<FloatType>(type.getElementType())) {
         return false;
       }
-      if (type.getElementType()
-              .isa<UniformQuantizedType, UniformQuantizedPerAxisType>()) {
+      if (mlir::isa<UniformQuantizedType, UniformQuantizedPerAxisType>(
+              type.getElementType())) {
         has_quantized_types = true;
       }
     }
@@ -943,7 +944,7 @@ bool IsConnectedWithQuantizedCompsiteFunction(Operation* same_scale_op) {
             ->has_same_scale_requirement) {
       for (const OpResult result : preceding_op->getResults()) {
         const Type element_type = getElementTypeOrSelf(result.getType());
-        if (element_type.isa<UniformQuantizedType>()) {
+        if (mlir::isa<UniformQuantizedType>(element_type)) {
           return true;
         }
       }
@@ -971,7 +972,7 @@ bool IsConnectedWithQuantizedCompsiteFunction(Operation* same_scale_op) {
               ->has_same_scale_requirement) {
         for (Value operand : following_op->getOperands()) {
           const Type element_type = getElementTypeOrSelf(operand.getType());
-          if (element_type.isa<UniformQuantizedType>()) {
+          if (mlir::isa<UniformQuantizedType>(element_type)) {
             return true;
           }
         }
diff --git a/tensorflow/compiler/mlir/quantization/stablehlo/passes/quantization_patterns.h b/tensorflow/compiler/mlir/quantization/stablehlo/passes/quantization_patterns.h
index 3a735f15da9723..c07314d6cff6cf 100644
--- a/tensorflow/compiler/mlir/quantization/stablehlo/passes/quantization_patterns.h
+++ b/tensorflow/compiler/mlir/quantization/stablehlo/passes/quantization_patterns.h
@@ -159,12 +159,13 @@ class StableHloQuantizationPattern : public OpRewritePattern<RootOpT> {
       inputs.reserve(candidate_op->getNumOperands());
       for (auto operand : candidate_op->getOperands()) {
         Type operand_type = operand.getType();
-        if (operand_type.isa<NoneType>()) {
+        if (mlir::isa<NoneType>(operand_type)) {
           inputs.push_back(operand);
           continue;
         }
 
-        auto ele_type = operand.getType().cast<TensorType>().getElementType();
+        auto ele_type =
+            mlir::cast<TensorType>(operand.getType()).getElementType();
         if (auto dq_op =
                 dyn_cast_or_null<DequantizeOpT>(operand.getDefiningOp())) {
           inputs.push_back(dq_op.getOperand());
@@ -190,13 +191,13 @@ class StableHloQuantizationPattern : public OpRewritePattern<RootOpT> {
         Type result_type = result.getType();
         // Add this to the test coverage once we create test ops with none type
         // results.
-        if (result_type.isa<NoneType>()) {
+        if (mlir::isa<NoneType>(result_type)) {
           outputs_replaced.insert({result, enumerated_result.index()});
           output_types.push_back(result_type);
           continue;
         }
         Type result_ele_type =
-            result.getType().cast<TensorType>().getElementType();
+            mlir::cast<TensorType>(result.getType()).getElementType();
         // If the user is the QuantizeOp, it must be the only user.
         if (result.hasOneUse() && isa<QuantizeOpT>(*result.user_begin())) {
           auto user = cast<QuantizeOpT>(*result.user_begin());
diff --git a/tensorflow/compiler/mlir/quantization/stablehlo/passes/quantize_weight.cc b/tensorflow/compiler/mlir/quantization/stablehlo/passes/quantize_weight.cc
index 95f150d683c57b..e0469cc8d14032 100644
--- a/tensorflow/compiler/mlir/quantization/stablehlo/passes/quantize_weight.cc
+++ b/tensorflow/compiler/mlir/quantization/stablehlo/passes/quantize_weight.cc
@@ -111,7 +111,7 @@ class QuantizeWeight : public OpRewritePattern<ConstantOp> {
   QuantizationUnits GetQuantizableOps(ConstantOp op) const {
     // Non-float tensors do not need quantization.
     QuantizationUnits quantizable_ops;
-    const ShapedType type = op.getType().dyn_cast<ShapedType>();
+    const ShapedType type = mlir::dyn_cast<ShapedType>(op.getType());
     if (!type || !type.getElementType().isF32()) return quantizable_ops;
 
     const Value value = op.getResult();
@@ -150,7 +150,7 @@ class QuantizeWeight : public OpRewritePattern<ConstantOp> {
     }
 
     TensorType old_result_type =
-        op.getResult().getType().dyn_cast<TensorType>();
+        mlir::dyn_cast<TensorType>(op.getResult().getType());
     const FloatType quantized_type = FloatType::getF16(op.getContext());
     const ShapedType new_result_type = old_result_type.clone(quantized_type);
 
@@ -184,7 +184,7 @@ class QuantizeWeight : public OpRewritePattern<ConstantOp> {
       // Get types.
       const Type old_result_type = op.getResult().getType();
       const ShapedType new_result_type =
-          convert_op.getType().dyn_cast<ShapedType>();
+          mlir::dyn_cast<ShapedType>(convert_op.getType());
 
       // Proceeds only if the converting is to float16.
       if (!new_result_type.getElementType().isF16()) continue;
@@ -192,7 +192,7 @@ class QuantizeWeight : public OpRewritePattern<ConstantOp> {
       // Convert values.
       std::vector<Eigen::half> new_values;
       const DenseFPElementsAttr value_attr =
-          op.getValue().cast<DenseFPElementsAttr>();
+          mlir::cast<DenseFPElementsAttr>(op.getValue());
       new_values.reserve(value_attr.getNumElements());
 
       for (const float value : value_attr.getValues<float>()) {
diff --git a/tensorflow/compiler/mlir/quantization/stablehlo/passes/replace_stablehlo_ops_in_main_function_with_xla_call_module_ops.cc b/tensorflow/compiler/mlir/quantization/stablehlo/passes/replace_stablehlo_ops_in_main_function_with_xla_call_module_ops.cc
index 6ed82c125b0be9..e1b4adb013684c 100644
--- a/tensorflow/compiler/mlir/quantization/stablehlo/passes/replace_stablehlo_ops_in_main_function_with_xla_call_module_ops.cc
+++ b/tensorflow/compiler/mlir/quantization/stablehlo/passes/replace_stablehlo_ops_in_main_function_with_xla_call_module_ops.cc
@@ -163,7 +163,7 @@ void CreateXlaCallModuleOp(ValueRange inputs, ValueRange outputs,
   SmallVector<Attribute> shape_attrs;
   for (const Type result_type : result_types) {
     shape_attrs.push_back(
-        tf_type::ShapeAttr::get(ctx, result_type.cast<ShapedType>()));
+        tf_type::ShapeAttr::get(ctx, mlir::cast<ShapedType>(result_type)));
   }
   const auto empty_array_attr = ArrayAttr::get(ctx, {});
   // TODO: b/310291615 - find a better way for platform support.
@@ -502,7 +502,7 @@ void ReplaceStablehloOpsInMainFunctionWithXlaCallModuleOpsPass::
     SymbolTable symbol_table(module_op);
     for (auto call_op : main_func.getOps<TF::PartitionedCallOp>()) {
       func_ops.push_back(dyn_cast_or_null<func::FuncOp>(symbol_table.lookup(
-          call_op.getFAttr().cast<FlatSymbolRefAttr>().getValue())));
+          mlir::cast<FlatSymbolRefAttr>(call_op.getFAttr()).getValue())));
     }
     for (auto call_op : main_func.getOps<TF::StatefulPartitionedCallOp>()) {
       func_ops.push_back(
diff --git a/tensorflow/compiler/mlir/quantization/stablehlo/utils/bfloat16_type.cc b/tensorflow/compiler/mlir/quantization/stablehlo/utils/bfloat16_type.cc
index efda4282b2cbec..640f0ebc5c5061 100644
--- a/tensorflow/compiler/mlir/quantization/stablehlo/utils/bfloat16_type.cc
+++ b/tensorflow/compiler/mlir/quantization/stablehlo/utils/bfloat16_type.cc
@@ -29,7 +29,7 @@ bool IsLargeFloatType(Type type) {
 }
 
 Type ToBfloat16Type(Type type) {
-  if (auto shaped = type.dyn_cast<ShapedType>()) {
+  if (auto shaped = mlir::dyn_cast<ShapedType>(type)) {
     const Type elem = shaped.getElementType();
     if (IsLargeFloatType(elem)) {
       return shaped.clone(BFloat16Type::get(type.getContext()));
diff --git a/tensorflow/compiler/mlir/quantization/stablehlo/utils/tf_type_utils.cc b/tensorflow/compiler/mlir/quantization/stablehlo/utils/tf_type_utils.cc
index 2f801565b93a1f..555e8af25b374f 100644
--- a/tensorflow/compiler/mlir/quantization/stablehlo/utils/tf_type_utils.cc
+++ b/tensorflow/compiler/mlir/quantization/stablehlo/utils/tf_type_utils.cc
@@ -37,8 +37,8 @@ limitations under the License.
 namespace mlir::quant::tensorflow {
 
 bool IsTFQintType(const Type type) {
-  return type.isa<TF::Qint8Type, TF::Qint16Type, TF::Qint32Type, TF::Quint8Type,
-                  TF::Quint16Type>();
+  return mlir::isa<TF::Qint8Type, TF::Qint16Type, TF::Qint32Type,
+                   TF::Quint8Type, TF::Quint16Type>(type);
 }
 
 Type GetIntTypeFromTFQint(const Type type) {
diff --git a/tensorflow/compiler/mlir/quantization/stablehlo/utils/tf_type_utils_test.cc b/tensorflow/compiler/mlir/quantization/stablehlo/utils/tf_type_utils_test.cc
index 87d71438cf4e7c..e1fbe1917d9780 100644
--- a/tensorflow/compiler/mlir/quantization/stablehlo/utils/tf_type_utils_test.cc
+++ b/tensorflow/compiler/mlir/quantization/stablehlo/utils/tf_type_utils_test.cc
@@ -28,6 +28,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/IR/MLIRContext.h"  // from @llvm-project
 #include "mlir/Pass/PassManager.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/register_common_dialects.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_types.h"
@@ -188,31 +189,31 @@ TEST(GetIntTypeFromTFQintTest, ChecksIntTypesFromTFQint) {
 
   auto type = GetIntTypeFromTFQint(TF::Qint8Type::get(context.get()));
   EXPECT_TRUE(llvm::isa<IntegerType>(type));
-  EXPECT_EQ(type.dyn_cast<IntegerType>().getWidth(), 8);
-  EXPECT_FALSE(type.dyn_cast<IntegerType>().isSigned());
-  EXPECT_FALSE(type.dyn_cast<IntegerType>().isUnsigned());
+  EXPECT_EQ(mlir::dyn_cast<IntegerType>(type).getWidth(), 8);
+  EXPECT_FALSE(mlir::dyn_cast<IntegerType>(type).isSigned());
+  EXPECT_FALSE(mlir::dyn_cast<IntegerType>(type).isUnsigned());
 
   type = GetIntTypeFromTFQint(TF::Qint16Type::get(context.get()));
   EXPECT_TRUE(llvm::isa<IntegerType>(type));
-  EXPECT_EQ(type.dyn_cast<IntegerType>().getWidth(), 16);
-  EXPECT_FALSE(type.dyn_cast<IntegerType>().isSigned());
-  EXPECT_FALSE(type.dyn_cast<IntegerType>().isUnsigned());
+  EXPECT_EQ(mlir::dyn_cast<IntegerType>(type).getWidth(), 16);
+  EXPECT_FALSE(mlir::dyn_cast<IntegerType>(type).isSigned());
+  EXPECT_FALSE(mlir::dyn_cast<IntegerType>(type).isUnsigned());
 
   type = GetIntTypeFromTFQint(TF::Qint32Type::get(context.get()));
   EXPECT_TRUE(llvm::isa<IntegerType>(type));
-  EXPECT_EQ(type.dyn_cast<IntegerType>().getWidth(), 32);
-  EXPECT_FALSE(type.dyn_cast<IntegerType>().isSigned());
-  EXPECT_FALSE(type.dyn_cast<IntegerType>().isUnsigned());
+  EXPECT_EQ(mlir::dyn_cast<IntegerType>(type).getWidth(), 32);
+  EXPECT_FALSE(mlir::dyn_cast<IntegerType>(type).isSigned());
+  EXPECT_FALSE(mlir::dyn_cast<IntegerType>(type).isUnsigned());
 
   type = GetIntTypeFromTFQint(TF::Quint8Type::get(context.get()));
   EXPECT_TRUE(llvm::isa<IntegerType>(type));
-  EXPECT_EQ(type.dyn_cast<IntegerType>().getWidth(), 8);
-  EXPECT_TRUE(type.dyn_cast<IntegerType>().isUnsigned());
+  EXPECT_EQ(mlir::dyn_cast<IntegerType>(type).getWidth(), 8);
+  EXPECT_TRUE(mlir::dyn_cast<IntegerType>(type).isUnsigned());
 
   type = GetIntTypeFromTFQint(TF::Quint16Type::get(context.get()));
   EXPECT_TRUE(llvm::isa<IntegerType>(type));
-  EXPECT_EQ(type.dyn_cast<IntegerType>().getWidth(), 16);
-  EXPECT_TRUE(type.dyn_cast<IntegerType>().isUnsigned());
+  EXPECT_EQ(mlir::dyn_cast<IntegerType>(type).getWidth(), 16);
+  EXPECT_TRUE(mlir::dyn_cast<IntegerType>(type).isUnsigned());
 
   // Non qint types are returned as is.
   EXPECT_EQ(GetIntTypeFromTFQint(IntegerType::get(type.getContext(), 32)),
diff --git a/tensorflow/compiler/mlir/quantization/tensorflow/cc/convert_asset_args.cc b/tensorflow/compiler/mlir/quantization/tensorflow/cc/convert_asset_args.cc
index c2445456339fb9..60d2c07bdab8ea 100644
--- a/tensorflow/compiler/mlir/quantization/tensorflow/cc/convert_asset_args.cc
+++ b/tensorflow/compiler/mlir/quantization/tensorflow/cc/convert_asset_args.cc
@@ -93,8 +93,7 @@ SmallVector<StringRef> GetEntryFunctionInputs(func::FuncOp func_op) {
       func_op->getAttrOfType<DictionaryAttr>("tf.entry_function");
 
   SmallVector<StringRef> inputs;
-  entry_function_attr.get("inputs")
-      .dyn_cast_or_null<StringAttr>()
+  mlir::dyn_cast_or_null<StringAttr>(entry_function_attr.get("inputs"))
       .strref()
       .split(inputs, /*Separator=*/",");
 
diff --git a/tensorflow/compiler/mlir/quantization/tensorflow/cc/convert_asset_args_test.cc b/tensorflow/compiler/mlir/quantization/tensorflow/cc/convert_asset_args_test.cc
index 238b1bb8ef8955..d77859a67c9dca 100644
--- a/tensorflow/compiler/mlir/quantization/tensorflow/cc/convert_asset_args_test.cc
+++ b/tensorflow/compiler/mlir/quantization/tensorflow/cc/convert_asset_args_test.cc
@@ -94,9 +94,11 @@ TEST_F(ConvertAssetArgsTest, ConvertsSingleAssetArg) {
   EXPECT_THAT(arg_attrs.get("tf_saved_model.bound_input"), IsNull());
 
   const ArrayRef<Attribute> index_path_attrs =
-      arg_attrs.get("tf_saved_model.index_path").cast<ArrayAttr>().getValue();
+      mlir::cast<ArrayAttr>(arg_attrs.get("tf_saved_model.index_path"))
+          .getValue();
   EXPECT_THAT(index_path_attrs, SizeIs(1));
-  StringAttr index_path = index_path_attrs[0].dyn_cast_or_null<StringAttr>();
+  StringAttr index_path =
+      mlir::dyn_cast_or_null<StringAttr>(index_path_attrs[0]);
   EXPECT_THAT(index_path, NotNull());
   EXPECT_THAT(index_path, Eq("arg_0:0"));
 }
@@ -122,9 +124,11 @@ TEST_F(ConvertAssetArgsTest, NonBoundedArgsNotModified) {
   EXPECT_THAT(arg_attrs.get("tf_saved_model.bound_input"), IsNull());
 
   const ArrayRef<Attribute> index_path_attrs =
-      arg_attrs.get("tf_saved_model.index_path").cast<ArrayAttr>().getValue();
+      mlir::cast<ArrayAttr>(arg_attrs.get("tf_saved_model.index_path"))
+          .getValue();
   EXPECT_THAT(index_path_attrs, SizeIs(1));
-  StringAttr index_path = index_path_attrs[0].dyn_cast_or_null<StringAttr>();
+  StringAttr index_path =
+      mlir::dyn_cast_or_null<StringAttr>(index_path_attrs[0]);
   EXPECT_THAT(index_path, NotNull());
   EXPECT_THAT(index_path, Eq("arg_0:0"));
 }
diff --git a/tensorflow/compiler/mlir/quantization/tensorflow/cc/quantization_unit_loc.cc b/tensorflow/compiler/mlir/quantization/tensorflow/cc/quantization_unit_loc.cc
index 7be369e7947ced..8ba632b66ae0f3 100644
--- a/tensorflow/compiler/mlir/quantization/tensorflow/cc/quantization_unit_loc.cc
+++ b/tensorflow/compiler/mlir/quantization/tensorflow/cc/quantization_unit_loc.cc
@@ -65,9 +65,9 @@ bool QuantizationUnitLoc::classof(Attribute attr) {
   if (!llvm::isa<CallSiteLoc>(attr)) return false;
   auto callsite_loc = llvm::dyn_cast<CallSiteLoc>(attr);
 
-  if (!callsite_loc.getCaller().isa<NameLoc>()) return false;
+  if (!mlir::isa<NameLoc>(callsite_loc.getCaller())) return false;
   StringRef caller_name =
-      callsite_loc.getCaller().cast<NameLoc>().getName().strref();
+      mlir::cast<NameLoc>(callsite_loc.getCaller()).getName().strref();
   return caller_name.starts_with(kQuantizationUnitPrefix) &&
          caller_name.ends_with(kQuantizationUnitSuffix);
 }
@@ -75,8 +75,8 @@ bool QuantizationUnitLoc::classof(Attribute attr) {
 std::optional<QuantizationUnitLoc::QuantizationUnit>
 FindQuantizationUnitFromLoc(Location loc) {
   if (isa<QuantizationUnitLoc>(loc)) {
-    Location caller = loc.cast<CallSiteLoc>().getCaller();
-    StringRef caller_name = caller.cast<NameLoc>().getName().strref();
+    Location caller = mlir::cast<CallSiteLoc>(loc).getCaller();
+    StringRef caller_name = mlir::cast<NameLoc>(caller).getName().strref();
     const size_t start_index = kQuantizationUnitPrefix.size();
     const size_t end_index = caller_name.rfind(kQuantizationUnitSuffix);
     std::string serialized_proto =
@@ -87,14 +87,15 @@ FindQuantizationUnitFromLoc(Location loc) {
     }
   } else if (isa<FusedLoc>(loc)) {
     // If the op is rewritten, FusedLoc can be created.
-    for (Location child_loc : loc.cast<FusedLoc>().getLocations()) {
+    for (Location child_loc : mlir::cast<FusedLoc>(loc).getLocations()) {
       std::optional<QuantizationUnitLoc::QuantizationUnit> found_unit =
           FindQuantizationUnitFromLoc(child_loc);
       if (found_unit.has_value()) return found_unit;
     }
   } else if (isa<CallSiteLoc>(loc)) {
     // If the graph is inlined, CallSiteLoc can be created.
-    return FindQuantizationUnitFromLoc(loc.cast<CallSiteLoc>().getCallee());
+    return FindQuantizationUnitFromLoc(
+        mlir::cast<CallSiteLoc>(loc).getCallee());
   }
 
   return std::nullopt;
diff --git a/tensorflow/compiler/mlir/quantization/tensorflow/ops/tf_op_quant_spec.cc b/tensorflow/compiler/mlir/quantization/tensorflow/ops/tf_op_quant_spec.cc
index 52ca3722a12bd5..9630b20b32d571 100644
--- a/tensorflow/compiler/mlir/quantization/tensorflow/ops/tf_op_quant_spec.cc
+++ b/tensorflow/compiler/mlir/quantization/tensorflow/ops/tf_op_quant_spec.cc
@@ -56,7 +56,7 @@ bool IsOpWithInt8TypeOperand(Operation* op) {
 }
 
 bool IsValueWithQuantizablePrecision(Value val) {
-  auto type = val.getType().dyn_cast<ShapedType>();
+  auto type = mlir::dyn_cast<ShapedType>(val.getType());
   if (!type) return false;
   // Supported original tensor data types.
   if (type.getElementType().isF32() || type.getElementType().isBF16())
@@ -82,7 +82,7 @@ std::unique_ptr<OpQuantSpec> GetTFOpQuantSpec(Operation* op) {
   auto spec = std::make_unique<OpQuantSpec>();
   if (auto call_op = dyn_cast<TF::PartitionedCallOp>(op)) {
     StringRef function_name =
-        call_op.getFAttr().cast<FlatSymbolRefAttr>().getValue();
+        mlir::cast<FlatSymbolRefAttr>(call_op.getFAttr()).getValue();
     if (!function_name.starts_with("composite_")) {
       return spec;
     }
diff --git a/tensorflow/compiler/mlir/quantization/tensorflow/ops/tf_quantize_op.cc b/tensorflow/compiler/mlir/quantization/tensorflow/ops/tf_quantize_op.cc
index 723adde447e546..47beb9e0c2636f 100644
--- a/tensorflow/compiler/mlir/quantization/tensorflow/ops/tf_quantize_op.cc
+++ b/tensorflow/compiler/mlir/quantization/tensorflow/ops/tf_quantize_op.cc
@@ -153,11 +153,10 @@ QuantizedType CalculateUniformQuantParams(
   DenseFPElementsAttr attr;
   if (!matchPattern(op->getResult(0), m_Constant(&attr))) return nullptr;
 
-  QuantizedType quant_type =
+  QuantizedType quant_type = mlir::dyn_cast<quant::QuantizedType>(
       quant::GetUniformQuantizedTypeForWeight(
           attr, /*symmetric=*/kIsNarrowRange && kIsSigned, kBitWidth, kIsSigned,
-          kIsNarrowRange, /*is_legacy_float*/ false)
-          .template dyn_cast<quant::QuantizedType>();
+          kIsNarrowRange, /*is_legacy_float*/ false));
 
   return quant_type;
 }
@@ -172,16 +171,16 @@ std::optional<Value> AddUniformQuantizeOps(PatternRewriter& rewriter,
   }
   Type expressed_type = op.getResult().getType();
   Type quantized_type = quant_type.castFromExpressedType(expressed_type);
-  ShapedType shaped_quantized_type = quantized_type.cast<ShapedType>();
+  ShapedType shaped_quantized_type = mlir::cast<ShapedType>(quantized_type);
   DenseElementsAttr tensor_proto_attr =
-      Quantize(attr, shaped_quantized_type).dyn_cast<DenseElementsAttr>();
+      mlir::dyn_cast<DenseElementsAttr>(Quantize(attr, shaped_quantized_type));
   if (!tensor_proto_attr) {
     return nullptr;
   }
 
-  Type storage_type = shaped_quantized_type.getElementType()
-                          .cast<QuantizedType>()
-                          .getStorageType();
+  Type storage_type =
+      mlir::cast<QuantizedType>(shaped_quantized_type.getElementType())
+          .getStorageType();
   ShapedType new_type = shaped_quantized_type.clone(storage_type);
 
   rewriter.setInsertionPointAfter(op);
@@ -205,7 +204,7 @@ Operation* LogicsForUniformDequanization(PatternRewriter& rewriter,
   auto new_cast_op =
       rewriter.create<TF::CastOp>(loc, create_unknown_input_shape, input_val);
   // TODO - b/278949920: Enable Per-Channel Quantization for XLA Opset
-  auto qtype = quant_type.dyn_cast<UniformQuantizedType>();
+  auto qtype = mlir::dyn_cast<UniformQuantizedType>(quant_type);
   TensorType scale_type = RankedTensorType::get({}, rewriter.getF32Type());
   Value scale_op = rewriter.create<TF::ConstOp>(
       loc, scale_type,
@@ -253,7 +252,7 @@ std::optional<TF::PartitionedCallOp> ApplyUniformQuantization(
 
   std::optional<TF::PartitionedCallOp> dequantized_val =
       AddUniformDequantizeOps(rewriter, quant_type, quantized_val.value(),
-                              op.getType().cast<ShapedType>());
+                              mlir::cast<ShapedType>(op.getType()));
 
   return dequantized_val;
 }
diff --git a/tensorflow/compiler/mlir/quantization/tensorflow/passes/add_quantization_unit_loc.cc b/tensorflow/compiler/mlir/quantization/tensorflow/passes/add_quantization_unit_loc.cc
index d390ac6d548e78..109fa943f9334b 100644
--- a/tensorflow/compiler/mlir/quantization/tensorflow/passes/add_quantization_unit_loc.cc
+++ b/tensorflow/compiler/mlir/quantization/tensorflow/passes/add_quantization_unit_loc.cc
@@ -69,17 +69,17 @@ class AddQuantizationUnitLocPass
 // tensorflow/compiler/mlir/tensorflow/translate/import_model.cc for more
 // details.
 bool IsImportLocPattern(FusedLoc loc) {
-  ArrayRef<Location> locations = loc.cast<FusedLoc>().getLocations();
+  ArrayRef<Location> locations = mlir::cast<FusedLoc>(loc).getLocations();
   if (locations.size() < 2 || !isa<NameLoc>(locations.front())) return false;
 
   StringRef op_type_with_suffix =
-      locations.front().cast<NameLoc>().getName().strref();
+      mlir::cast<NameLoc>(locations.front()).getName().strref();
   if (!op_type_with_suffix.ends_with(":")) return false;
 
   return absl::c_all_of(locations, [](Location loc) {
     return isa<NameLoc>(loc) ||
            (isa<CallSiteLoc>(loc) &&
-            isa<NameLoc>(loc.cast<CallSiteLoc>().getCallee()));
+            isa<NameLoc>(mlir::cast<CallSiteLoc>(loc).getCallee()));
   });
 }
 
@@ -99,23 +99,23 @@ void FindQuantizationUnitsRecursively(Location loc,
     }
   };
 
-  ArrayRef<Location> locations = loc.cast<FusedLoc>().getLocations();
-  if (IsImportLocPattern(loc.cast<FusedLoc>())) {
+  ArrayRef<Location> locations = mlir::cast<FusedLoc>(loc).getLocations();
+  if (IsImportLocPattern(mlir::cast<FusedLoc>(loc))) {
     QuantizationUnit new_unit;
     // Op type is a NameLoc with the ":" suffix.
     StringRef op_type_with_suffix =
-        locations.front().cast<NameLoc>().getName().strref();
+        mlir::cast<NameLoc>(locations.front()).getName().strref();
     StringRef op_type =
         op_type_with_suffix.substr(0, op_type_with_suffix.size() - 1);
     new_unit.set_op_type(op_type.str());
 
     if (isa<NameLoc>(locations.back())) {
       StringRef name_loc_id =
-          locations.back().cast<NameLoc>().getName().strref();
+          mlir::cast<NameLoc>(locations.back()).getName().strref();
       set_node_and_func_name(new_unit, name_loc_id);
     } else {
-      Location callee = locations.back().cast<CallSiteLoc>().getCallee();
-      StringRef name_loc_id = callee.cast<NameLoc>().getName().strref();
+      Location callee = mlir::cast<CallSiteLoc>(locations.back()).getCallee();
+      StringRef name_loc_id = mlir::cast<NameLoc>(callee).getName().strref();
       set_node_and_func_name(new_unit, name_loc_id);
     }
     units.push_back(new_unit);
diff --git a/tensorflow/compiler/mlir/quantization/tensorflow/passes/convert_custom_aggregation_op_to_quant_stats.cc b/tensorflow/compiler/mlir/quantization/tensorflow/passes/convert_custom_aggregation_op_to_quant_stats.cc
index e4229cb97bf45a..8c02ace87d8001 100644
--- a/tensorflow/compiler/mlir/quantization/tensorflow/passes/convert_custom_aggregation_op_to_quant_stats.cc
+++ b/tensorflow/compiler/mlir/quantization/tensorflow/passes/convert_custom_aggregation_op_to_quant_stats.cc
@@ -26,6 +26,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/IR/PatternMatch.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/lite/quantization/ir/QuantOps.h"
@@ -75,8 +76,8 @@ class ConvertCustomAggregationOpToQuantStats
 
   LogicalResult matchAndRewrite(TF::CustomAggregatorOp op,
                                 PatternRewriter &rewriter) const override {
-    FloatAttr min = op->getAttr("min").dyn_cast_or_null<FloatAttr>();
-    FloatAttr max = op->getAttr("max").dyn_cast_or_null<FloatAttr>();
+    FloatAttr min = mlir::dyn_cast_or_null<FloatAttr>(op->getAttr("min"));
+    FloatAttr max = mlir::dyn_cast_or_null<FloatAttr>(op->getAttr("max"));
 
     // When there are no min and max attributes, remove op.
     if (min == nullptr || max == nullptr) {
diff --git a/tensorflow/compiler/mlir/quantization/tensorflow/passes/convert_tf_xla_op_to_tf_op.cc b/tensorflow/compiler/mlir/quantization/tensorflow/passes/convert_tf_xla_op_to_tf_op.cc
index d23a0f8d3a7af2..c39492f0efe709 100644
--- a/tensorflow/compiler/mlir/quantization/tensorflow/passes/convert_tf_xla_op_to_tf_op.cc
+++ b/tensorflow/compiler/mlir/quantization/tensorflow/passes/convert_tf_xla_op_to_tf_op.cc
@@ -158,10 +158,8 @@ Value CreateEinsumOpFromXlaDotV2Op(OpBuilder& builder, const Location loc,
   xla::DotDimensionNumbers dot_dimension_numbers;
   dot_dimension_numbers.ParseFromString(dot_dimension_numbers_str.str());
   SmallVector<Value> input_arguments = {lhs, rhs};
-  const int lhs_rank =
-      lhs.getType().template cast<ShapedType>().getShape().size();
-  const int rhs_rank =
-      rhs.getType().template cast<ShapedType>().getShape().size();
+  const int lhs_rank = mlir::cast<ShapedType>(lhs.getType()).getShape().size();
+  const int rhs_rank = mlir::cast<ShapedType>(rhs.getType()).getShape().size();
 
   const std::string einsum_equation =
       CreateEinsumEquation(dot_dimension_numbers, lhs_rank, rhs_rank);
@@ -218,7 +216,7 @@ RankedTensorType RestoreCollapsedDimensions(
 Type GetSliceOpOutputType(Type xla_gather_op_output_type,
                           const absl::flat_hash_set<int64_t>& collapsed_dims) {
   if (auto ranked_output_type =
-          xla_gather_op_output_type.dyn_cast<RankedTensorType>();
+          mlir::dyn_cast<RankedTensorType>(xla_gather_op_output_type);
       ranked_output_type) {
     return RestoreCollapsedDimensions(ranked_output_type, collapsed_dims);
   }
@@ -228,9 +226,9 @@ Type GetSliceOpOutputType(Type xla_gather_op_output_type,
 
 // TODO (b/275225582): Supports Xla Gather op in general case.
 bool IsXlaGatherWithoutBatch(Value operand, Value start_indices) {
-  auto operand_type = operand.getType().dyn_cast_or_null<ShapedType>();
+  auto operand_type = mlir::dyn_cast_or_null<ShapedType>(operand.getType());
   auto start_indices_type =
-      start_indices.getType().dyn_cast_or_null<ShapedType>();
+      mlir::dyn_cast_or_null<ShapedType>(start_indices.getType());
   if (start_indices_type == nullptr || operand_type == nullptr) return false;
   return start_indices_type.getShape().size() == 1;
 }
@@ -245,7 +243,7 @@ Value CreateSliceAndReshapeOpFromXlaGatherOpWithoutBatch(
   // Construct full start_indices with given start_indices and
   // start_index_map.
   const ArrayRef<int64_t> operand_shape =
-      operand.getType().cast<ShapedType>().getShape();
+      mlir::cast<ShapedType>(operand.getType()).getShape();
   const int64_t operand_rank = operand_shape.size();
 
   // Fills zeros if start_index is not given in start_indices.
@@ -273,7 +271,7 @@ Value CreateSliceAndReshapeOpFromXlaGatherOpWithoutBatch(
       builder.create<TF::CastOp>(
           loc,
           RankedTensorType::get(
-              start_indices.getType().template cast<ShapedType>().getShape(),
+              mlir::cast<ShapedType>(start_indices.getType()).getShape(),
               builder.getI64Type()),
           start_indices));
 
@@ -289,7 +287,7 @@ Value CreateSliceAndReshapeOpFromXlaGatherOpWithoutBatch(
       builder.create<TF::CastOp>(
           loc,
           RankedTensorType::get(
-              slice_sizes.getType().template cast<ShapedType>().getShape(),
+              mlir::cast<ShapedType>(slice_sizes.getType()).getShape(),
               builder.getI64Type()),
           slice_sizes));
 
diff --git a/tensorflow/compiler/mlir/quantization/tensorflow/passes/convert_tpu_model_to_cpu.cc b/tensorflow/compiler/mlir/quantization/tensorflow/passes/convert_tpu_model_to_cpu.cc
index b4cdcd8f771a21..b3fc6207842469 100644
--- a/tensorflow/compiler/mlir/quantization/tensorflow/passes/convert_tpu_model_to_cpu.cc
+++ b/tensorflow/compiler/mlir/quantization/tensorflow/passes/convert_tpu_model_to_cpu.cc
@@ -17,6 +17,7 @@ limitations under the License.
 
 #include "mlir/IR/MLIRContext.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"  // from @llvm-project
 #include "mlir/Transforms/Passes.h"  // from @llvm-project
@@ -92,7 +93,7 @@ class ReplaceTpuPartitionedCallOpWithPartitionedCallOp
  private:
   LogicalResult matchAndRewrite(TF::TPUPartitionedCallOp call_op,
                                 PatternRewriter& rewriter) const override {
-    auto f_attr = call_op.getFAttr().dyn_cast<FlatSymbolRefAttr>();
+    auto f_attr = mlir::dyn_cast<FlatSymbolRefAttr>(call_op.getFAttr());
     auto module_op = call_op->getParentOfType<ModuleOp>();
     SymbolTable symbol_table(module_op);
 
diff --git a/tensorflow/compiler/mlir/quantization/tensorflow/passes/insert_custom_aggregation_ops.cc b/tensorflow/compiler/mlir/quantization/tensorflow/passes/insert_custom_aggregation_ops.cc
index 8790c908ba88a6..5450ae8442ca43 100644
--- a/tensorflow/compiler/mlir/quantization/tensorflow/passes/insert_custom_aggregation_ops.cc
+++ b/tensorflow/compiler/mlir/quantization/tensorflow/passes/insert_custom_aggregation_ops.cc
@@ -240,7 +240,7 @@ class AddCustomAggregationOp : public RewritePattern {
         if (auto call_op =
                 dyn_cast_or_null<TF::PartitionedCallOp>(defining_op)) {
           StringRef function_name =
-              call_op.getFAttr().cast<FlatSymbolRefAttr>().getValue();
+              mlir::cast<FlatSymbolRefAttr>(call_op.getFAttr()).getValue();
           if (function_name.contains("gather")) continue;
         }
 
diff --git a/tensorflow/compiler/mlir/quantization/tensorflow/passes/insert_main_function.cc b/tensorflow/compiler/mlir/quantization/tensorflow/passes/insert_main_function.cc
index 682889917c112e..0f855088d17943 100644
--- a/tensorflow/compiler/mlir/quantization/tensorflow/passes/insert_main_function.cc
+++ b/tensorflow/compiler/mlir/quantization/tensorflow/passes/insert_main_function.cc
@@ -154,7 +154,7 @@ void GetUniqueInputOutputNodeNames(ModuleOp module_op,
 
       if (auto inputs_attr = tf_attrs.get("inputs")) {
         const std::string inputs_attr_str =
-            inputs_attr.cast<StringAttr>().getValue().str();
+            mlir::cast<StringAttr>(inputs_attr).getValue().str();
         std::vector<std::string> fn_input_names =
             absl::StrSplit(inputs_attr_str, ',', absl::SkipEmpty());
 
@@ -174,7 +174,7 @@ void GetUniqueInputOutputNodeNames(ModuleOp module_op,
 
       if (auto outputs_attr = tf_attrs.get("outputs")) {
         const std::string outputs_attr_str =
-            outputs_attr.cast<StringAttr>().getValue().str();
+            mlir::cast<StringAttr>(outputs_attr).getValue().str();
         std::vector<std::string> fn_output_names =
             absl::StrSplit(outputs_attr_str, ',', absl::SkipEmpty());
 
diff --git a/tensorflow/compiler/mlir/quantization/tensorflow/passes/lift_quantizable_spots_as_functions.cc b/tensorflow/compiler/mlir/quantization/tensorflow/passes/lift_quantizable_spots_as_functions.cc
index 63fb3bd94005ee..80691bb57e789c 100644
--- a/tensorflow/compiler/mlir/quantization/tensorflow/passes/lift_quantizable_spots_as_functions.cc
+++ b/tensorflow/compiler/mlir/quantization/tensorflow/passes/lift_quantizable_spots_as_functions.cc
@@ -174,7 +174,7 @@ class CheckQuantizableOps
   LogicalResult matchAndRewrite(TF::PartitionedCallOp call_op,
                                 PatternRewriter& rewriter) const override {
     StringRef function_name =
-        call_op.getFAttr().cast<FlatSymbolRefAttr>().getValue();
+        mlir::cast<FlatSymbolRefAttr>(call_op.getFAttr()).getValue();
     if (!function_name.starts_with("composite_") ||
         !call_op->hasAttr(kQuantTraitAttrName)) {
       return failure();
@@ -193,11 +193,10 @@ class CheckQuantizableOps
     }
 
     // Only the composite functions with f32 inputs are quantizable.
-    if (call_op.getResults().size() == 1 && !call_op->getResult(0)
-                                                 .getType()
-                                                 .cast<ShapedType>()
-                                                 .getElementType()
-                                                 .isF32()) {
+    if (call_op.getResults().size() == 1 &&
+        !mlir::cast<ShapedType>(call_op->getResult(0).getType())
+             .getElementType()
+             .isF32()) {
       check_status.Update(absl::InternalError(
           "Composite functions for quantization should be f32 type."));
     }
@@ -274,7 +273,7 @@ class CheckQuantizableOps
       // For BatchMatMul, the input must be ranked to determine the batch
       // dimensions.
       ShapedType shaped_type =
-          call_op->getOperand(0).getType().dyn_cast<ShapedType>();
+          mlir::dyn_cast<ShapedType>(call_op->getOperand(0).getType());
       if (!shaped_type || !shaped_type.hasRank()) {
         return absl::InternalError("The input of BatchMatMul must have rank.");
       }
@@ -282,7 +281,8 @@ class CheckQuantizableOps
       // This op is guaranteed to be a constant as ODS checks IsConstTensor.
       // Check if the number of elements meets the requirement.
       int64_t num_elements =
-          call_op.getOperand(0).getType().cast<ShapedType>().getNumElements();
+          mlir::cast<ShapedType>(call_op.getOperand(0).getType())
+              .getNumElements();
       if (num_elements < quant_options_.min_num_elements_for_weights()) {
         return absl::InternalError(
             "The params of Gather have fewer number of elements than "
diff --git a/tensorflow/compiler/mlir/quantization/tensorflow/passes/lift_quantizable_spots_as_functions_drq.cc b/tensorflow/compiler/mlir/quantization/tensorflow/passes/lift_quantizable_spots_as_functions_drq.cc
index 0acb2e56ea617e..a75bef5f842746 100644
--- a/tensorflow/compiler/mlir/quantization/tensorflow/passes/lift_quantizable_spots_as_functions_drq.cc
+++ b/tensorflow/compiler/mlir/quantization/tensorflow/passes/lift_quantizable_spots_as_functions_drq.cc
@@ -137,7 +137,8 @@ class CheckQuantizableOps
       // This op is guaranteed to be a constant as ODS checks IsConstTensor.
       // Check if the number of elements meets the requirement.
       int current_num_elements =
-          call_op.getOperand(idx).getType().cast<ShapedType>().getNumElements();
+          mlir::cast<ShapedType>(call_op.getOperand(idx).getType())
+              .getNumElements();
       if (current_num_elements < min_num_elements_for_weights_) {
         call_op.emitRemark("Quantization is skipped for ")
             << call_op->getName().getStringRef().str() << " because it has "
@@ -149,7 +150,7 @@ class CheckQuantizableOps
     }
 
     StringRef function_name =
-        call_op.getFAttr().cast<FlatSymbolRefAttr>().getValue();
+        mlir::cast<FlatSymbolRefAttr>(call_op.getFAttr()).getValue();
     if ((quantization_method_ == tensorflow::quantization::QuantizationMethod::
                                      METHOD_DYNAMIC_RANGE_INT8) &&
         (function_name.contains("batch_matmul") ||
diff --git a/tensorflow/compiler/mlir/quantization/tensorflow/passes/merge_initializer_function_ops_to_main.cc b/tensorflow/compiler/mlir/quantization/tensorflow/passes/merge_initializer_function_ops_to_main.cc
index f1f65a1a183371..85acaeb9603f2e 100644
--- a/tensorflow/compiler/mlir/quantization/tensorflow/passes/merge_initializer_function_ops_to_main.cc
+++ b/tensorflow/compiler/mlir/quantization/tensorflow/passes/merge_initializer_function_ops_to_main.cc
@@ -34,6 +34,7 @@ limitations under the License.
 #include "mlir/IR/TypeRange.h"  // from @llvm-project
 #include "mlir/IR/Value.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/quantization/common/func.h"
 #include "tensorflow/compiler/mlir/quantization/tensorflow/passes/manipulate_model_attr.h"
@@ -153,7 +154,7 @@ LogicalResult ValidateInitFunc(func::FuncOp init_func_op) {
 
   FetchOp fetch_op = graph_op.GetFetch();
   for (const Value fetch : fetch_op.getFetches()) {
-    if (!fetch.getType().isa<tf_executor::ControlType>()) {
+    if (!mlir::isa<tf_executor::ControlType>(fetch.getType())) {
       fetch_op.emitError(absl::StrFormat(
           "Validation failed for the initializer function: %s. "
           "All initializer function's fetches should be "
diff --git a/tensorflow/compiler/mlir/quantization/tensorflow/passes/merge_save_function_ops_to_main.cc b/tensorflow/compiler/mlir/quantization/tensorflow/passes/merge_save_function_ops_to_main.cc
index e092352dc52c29..6f42c9fcaba7c5 100644
--- a/tensorflow/compiler/mlir/quantization/tensorflow/passes/merge_save_function_ops_to_main.cc
+++ b/tensorflow/compiler/mlir/quantization/tensorflow/passes/merge_save_function_ops_to_main.cc
@@ -143,7 +143,7 @@ BlockArgument GetFilePrefixArg(func::FuncOp main_func_op) {
     auto index_path_attr =
         main_func_op.getArgAttrOfType<ArrayAttr>(i, kTfSavedModelIndexPathAttr);
     if (index_path_attr && !index_path_attr.empty() &&
-        index_path_attr[0].cast<StringAttr>() == kTfFilePrefix) {
+        mlir::cast<StringAttr>(index_path_attr[0]) == kTfFilePrefix) {
       return main_func_op.getArgument(i);
     }
   }
diff --git a/tensorflow/compiler/mlir/quantization/tensorflow/passes/prepare_lifting.cc b/tensorflow/compiler/mlir/quantization/tensorflow/passes/prepare_lifting.cc
index 38075bb67b7010..b0a84d71c84182 100644
--- a/tensorflow/compiler/mlir/quantization/tensorflow/passes/prepare_lifting.cc
+++ b/tensorflow/compiler/mlir/quantization/tensorflow/passes/prepare_lifting.cc
@@ -98,8 +98,8 @@ class PrepareLiftingPass
 // indices in `val2`.
 bool HasEqualElementSize(Value val1, Value val2, ArrayRef<int> val1_indices,
                          ArrayRef<int> val2_indices) {
-  ShapedType val1_shape = val1.getType().cast<ShapedType>();
-  ShapedType val2_shape = val2.getType().cast<ShapedType>();
+  ShapedType val1_shape = mlir::cast<ShapedType>(val1.getType());
+  ShapedType val2_shape = mlir::cast<ShapedType>(val2.getType());
   if (!val1_shape.hasRank() || !val2_shape.hasRank()) return false;
 
   int val1_result = 1;
@@ -134,7 +134,7 @@ bool ReshapableTo1DTensor(ShapedType rhs_shape) {
 }
 
 Value ReshapeTo1DTensor(OpBuilder& builder, Location loc, Value value) {
-  auto shape = value.getType().cast<ShapedType>();
+  auto shape = mlir::cast<ShapedType>(value.getType());
   if (shape.getRank() != 1) {
     SmallVector<int64_t> new_shape;
     new_shape.push_back(shape.getNumElements());
@@ -182,7 +182,7 @@ LogicalResult MatchSupportedAffineOp(Operation* op, Value& binding_output,
 // Makes the 1D value broadcastable with the `rhs_shape`.
 Value MakeOneDimValueBroadcastable(OpBuilder& builder, Location loc,
                                    Value value, ShapedType rhs_shape) {
-  ShapedType value_shape = value.getType().dyn_cast_or_null<ShapedType>();
+  ShapedType value_shape = mlir::dyn_cast_or_null<ShapedType>(value.getType());
   if (!value_shape || value_shape.getRank() != 1 ||
       !value_shape.hasStaticShape() || !rhs_shape.hasStaticShape()) {
     return {};
@@ -211,7 +211,8 @@ bool CanBeSymmetricallyQuantized(Value weight) {
   auto dq_op = weight.getDefiningOp<quantfork::DequantizeCastOp>();
   if (!dq_op) return true;
 
-  auto qtype = dq_op.getArg().getType().cast<TensorType>().getElementType();
+  auto qtype =
+      mlir::cast<TensorType>(dq_op.getArg().getType()).getElementType();
   if (auto uniform_type = llvm::dyn_cast_or_null<UniformQuantizedType>(qtype)) {
     return uniform_type.getZeroPoint() == 0;
   } else if (auto per_axis_type =
@@ -252,12 +253,12 @@ Value MultiplyFakeQuantValue(OpBuilder& builder, Location loc, Value value,
 
   Value float_value = q_op.getArg();
   Value new_value = builder.create<TF::MulOp>(loc, float_value, multiplier);
-  auto new_value_type = new_value.getType().cast<TensorType>();
+  auto new_value_type = mlir::cast<TensorType>(new_value.getType());
 
   // Get multiplier value in double.
   DenseFPElementsAttr multiplier_attr;
   if (!matchPattern(multiplier, m_Constant(&multiplier_attr)) ||
-      multiplier_attr.getType().cast<ShapedType>().getRank() > 1) {
+      mlir::cast<ShapedType>(multiplier_attr.getType()).getRank() > 1) {
     return {};
   }
   std::vector<double> multiplier_values;
@@ -268,7 +269,7 @@ Value MultiplyFakeQuantValue(OpBuilder& builder, Location loc, Value value,
 
   // Multiply the quantization parameters by the multiplier.
   QuantizedType new_qtype;
-  auto element_type = q_op.getType().cast<TensorType>().getElementType();
+  auto element_type = mlir::cast<TensorType>(q_op.getType()).getElementType();
   if (auto uniform_type = llvm::dyn_cast<UniformQuantizedType>(element_type)) {
     if (multiplier_attr.isSplat()) {
       double new_scale = multiplier_array.front() * uniform_type.getScale();
diff --git a/tensorflow/compiler/mlir/quantization/tensorflow/passes/prepare_quantize.cc b/tensorflow/compiler/mlir/quantization/tensorflow/passes/prepare_quantize.cc
index fe38ed8dc0f634..cad8c1686eb67b 100644
--- a/tensorflow/compiler/mlir/quantization/tensorflow/passes/prepare_quantize.cc
+++ b/tensorflow/compiler/mlir/quantization/tensorflow/passes/prepare_quantize.cc
@@ -33,6 +33,7 @@ limitations under the License.
 #include "mlir/IR/PatternMatch.h"  // from @llvm-project
 #include "mlir/IR/Value.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/lite/quantization/ir/QuantOps.h"
 #include "tensorflow/compiler/mlir/lite/transforms/passes.h"
@@ -171,8 +172,8 @@ bool PrepareQuantizePass::SetInputNodesQuantizationParams(func::FuncOp func) {
 
   bool need_to_set_input_nodes_quantization_params = false;
   for (const BlockArgument arg : func.getArguments()) {
-    auto shaped = arg.getType().dyn_cast<ShapedType>();
-    if (shaped && shaped.getElementType().isa<FloatType>() &&
+    auto shaped = mlir::dyn_cast<ShapedType>(arg.getType());
+    if (shaped && mlir::isa<FloatType>(shaped.getElementType()) &&
         !has_quantize_op(arg)) {
       need_to_set_input_nodes_quantization_params = true;
       break;
@@ -197,8 +198,8 @@ bool PrepareQuantizePass::SetInputNodesQuantizationParams(func::FuncOp func) {
   auto add_quantize_op = [&](Location loc, Type input_type, Block* block,
                              Block::iterator insertion_point, Value arg,
                              int i) {
-    if (auto shaped = input_type.dyn_cast<ShapedType>()) {
-      if (shaped.getElementType().isa<FloatType>()) {
+    if (auto shaped = mlir::dyn_cast<ShapedType>(input_type)) {
+      if (mlir::isa<FloatType>(shaped.getElementType())) {
         // If there are existing quantize ops, they are from training and we
         // should respect them.
         if (has_quantize_op(arg)) {
diff --git a/tensorflow/compiler/mlir/quantization/tensorflow/passes/prepare_quantize_drq.cc b/tensorflow/compiler/mlir/quantization/tensorflow/passes/prepare_quantize_drq.cc
index 71587390580406..b2c0ceb205ca99 100644
--- a/tensorflow/compiler/mlir/quantization/tensorflow/passes/prepare_quantize_drq.cc
+++ b/tensorflow/compiler/mlir/quantization/tensorflow/passes/prepare_quantize_drq.cc
@@ -28,6 +28,7 @@ limitations under the License.
 #include "mlir/Dialect/Quant/QuantTypes.h"  // from @llvm-project
 #include "mlir/IR/Operation.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/lite/quantization/ir/QuantOps.h"
 #include "tensorflow/compiler/mlir/quantization/common/attrs_and_constraints.h"
@@ -142,7 +143,7 @@ class PrepareDRQQuantizableOp : public OpRewritePattern<arith::ConstantOp> {
   bool getQuantizableOps(arith::ConstantOp op,
                          QuantizationUnits& quantizable_ops) const {
     // Non-float tensors do not need quantization.
-    auto type = op.getType().dyn_cast<ShapedType>();
+    auto type = mlir::dyn_cast<ShapedType>(op.getType());
     if (!type || !type.getElementType().isF32()) return false;
 
     Value value = op.getResult();
@@ -183,23 +184,23 @@ class PrepareDRQQuantizableOp : public OpRewritePattern<arith::ConstantOp> {
     if (attr.size() < quant_specs_.minimum_elements_for_weights) {
       op->emitRemark("Quantization is skipped for ")
           << quantized_op->getName().getStringRef().str() << " because it has "
-          << attr.dyn_cast<DenseFPElementsAttr>().size()
+          << mlir::dyn_cast<DenseFPElementsAttr>(attr).size()
           << " elements which is fewer than the threshold("
           << quant_specs_.minimum_elements_for_weights << " elements).";
       return false;
     }
 
     if (is_per_channel_quantization) {
-      quant_type = quant::GetUniformQuantizedPerAxisTypeForWeight(
-                       attr, quant_dim,
-                       /*symmetric=*/true, bit_width, is_signed,
-                       is_narrow_range, is_legacy_float)
-                       .template dyn_cast<quant::QuantizedType>();
+      quant_type = mlir::dyn_cast<quant::QuantizedType>(
+          quant::GetUniformQuantizedPerAxisTypeForWeight(
+              attr, quant_dim,
+              /*symmetric=*/true, bit_width, is_signed, is_narrow_range,
+              is_legacy_float));
     } else {
-      quant_type = quant::GetUniformQuantizedTypeForWeight(
-                       attr, is_narrow_range && is_signed, bit_width, is_signed,
-                       is_narrow_range, is_legacy_float)
-                       .template dyn_cast<quant::QuantizedType>();
+      quant_type = mlir::dyn_cast<quant::QuantizedType>(
+          quant::GetUniformQuantizedTypeForWeight(
+              attr, is_narrow_range && is_signed, bit_width, is_signed,
+              is_narrow_range, is_legacy_float));
     }
     return insertQDQ(rewriter, op, quant_type, quant_op);
   }
diff --git a/tensorflow/compiler/mlir/quantization/tensorflow/passes/preprocess_op.cc b/tensorflow/compiler/mlir/quantization/tensorflow/passes/preprocess_op.cc
index 3f54fe580fe1c4..08b2faadacd3d5 100644
--- a/tensorflow/compiler/mlir/quantization/tensorflow/passes/preprocess_op.cc
+++ b/tensorflow/compiler/mlir/quantization/tensorflow/passes/preprocess_op.cc
@@ -202,7 +202,7 @@ class PreprocessConstantOp : public OpRewritePattern<TF::PartitionedCallOp> {
 
   LogicalResult matchAndRewrite(TF::PartitionedCallOp op,
                                 PatternRewriter& rewriter) const override {
-    const auto f_attr = op.getFAttr().dyn_cast<FlatSymbolRefAttr>();
+    const auto f_attr = mlir::dyn_cast<FlatSymbolRefAttr>(op.getFAttr());
     // Non-quantizable op
     if (!op->hasAttr(kQuantTraitAttrName)) return failure();
     StringRef function_name = f_attr.getValue();
diff --git a/tensorflow/compiler/mlir/quantization/tensorflow/passes/propagate_quantize_type.cc b/tensorflow/compiler/mlir/quantization/tensorflow/passes/propagate_quantize_type.cc
index 8570652b4019e7..0d2edd5bacd6c1 100644
--- a/tensorflow/compiler/mlir/quantization/tensorflow/passes/propagate_quantize_type.cc
+++ b/tensorflow/compiler/mlir/quantization/tensorflow/passes/propagate_quantize_type.cc
@@ -100,7 +100,7 @@ class PropagateDequantizeOpIfAllowed
 
   LogicalResult matchAndRewrite(TF::PartitionedCallOp op,
                                 PatternRewriter& rewriter) const override {
-    const auto f_attr = op.getFAttr().dyn_cast<FlatSymbolRefAttr>();
+    const auto f_attr = mlir::dyn_cast<FlatSymbolRefAttr>(op.getFAttr());
     StringRef function_name = f_attr.getValue();
     if (!function_name.starts_with(kDequantizeFunctionName)) return failure();
 
@@ -127,7 +127,8 @@ class PropagateDequantizeOpIfAllowed
         auto original_result_type = user_op->getResult(0).getType();
         auto new_user_op_type = CloneTypeWithNewElementType(
             original_result_type,
-            op_before_dequantize.getType().cast<ShapedType>().getElementType());
+            mlir::cast<ShapedType>(op_before_dequantize.getType())
+                .getElementType());
         createNewDequantizeOp(rewriter, op, user_op, user_idx,
                               new_user_op_type);
       } else {
diff --git a/tensorflow/compiler/mlir/quantization/tensorflow/passes/quantize_composite_functions.cc b/tensorflow/compiler/mlir/quantization/tensorflow/passes/quantize_composite_functions.cc
index 0b3c89c56f60bb..50409709d44854 100644
--- a/tensorflow/compiler/mlir/quantization/tensorflow/passes/quantize_composite_functions.cc
+++ b/tensorflow/compiler/mlir/quantization/tensorflow/passes/quantize_composite_functions.cc
@@ -213,11 +213,11 @@ LogicalResult CreateQuantizationParams(QuantizedType elem_type, Location loc,
   if (!elem_type) {
     return failure();
   }
-  if (auto qtype = elem_type.dyn_cast<UniformQuantizedType>()) {
+  if (auto qtype = mlir::dyn_cast<UniformQuantizedType>(elem_type)) {
     return CreateUniformQuantizedTypeParams(qtype, loc, rewriter, scale,
                                             zero_point);
-  } else if (auto qtype =
-                 elem_type.dyn_cast<quant::UniformQuantizedPerAxisType>()) {
+  } else if (auto qtype = mlir::dyn_cast<quant::UniformQuantizedPerAxisType>(
+                 elem_type)) {
     return CreateUniformQuantizedPerAxisTypeParams(qtype, loc, rewriter, scale,
                                                    zero_point);
   }
@@ -235,7 +235,7 @@ ShapedType ConvertIntToQint(ShapedType input_type, MLIRContext* ctx) {
   if (ele_type.isIntOrFloat()) {
     bit_width = ele_type.getIntOrFloatBitWidth();
     is_signed = ele_type.isSignlessIntOrFloat() || ele_type.isSignedInteger();
-  } else if (QuantizedType qtype = ele_type.dyn_cast<QuantizedType>()) {
+  } else if (QuantizedType qtype = mlir::dyn_cast<QuantizedType>(ele_type)) {
     bit_width = qtype.getStorageTypeIntegralWidth();
     is_signed = qtype.isSigned();
   } else {
@@ -275,8 +275,9 @@ class ReplaceQuantizePattern
 
   LogicalResult matchAndRewrite(quantfork::QuantizeCastOp q_op,
                                 PatternRewriter& rewriter) const override {
-    auto output_type = q_op.getType().cast<TensorType>();
-    auto elem_type = output_type.getElementType().dyn_cast<QuantizedType>();
+    auto output_type = mlir::cast<TensorType>(q_op.getType());
+    auto elem_type =
+        mlir::dyn_cast<QuantizedType>(output_type.getElementType());
     const Location loc = q_op->getLoc();
     Value scale, zero_point;
 
@@ -289,7 +290,7 @@ class ReplaceQuantizePattern
 
     if (target_opset_ == OpSet::UNIFORM_QUANTIZED) {
       ShapedType new_output_type = ConvertIntToQint(
-          output_type.cast<ShapedType>(), rewriter.getContext());
+          mlir::cast<ShapedType>(output_type), rewriter.getContext());
       if (!new_output_type) {
         q_op->emitError(
             "Failed to convert the type to the corresponding qtype.");
@@ -327,8 +328,8 @@ class ReplaceDequantizePattern
 
   LogicalResult matchAndRewrite(quantfork::DequantizeCastOp dq_op,
                                 PatternRewriter& rewriter) const override {
-    auto input_type = dq_op.getArg().getType().cast<TensorType>();
-    auto elem_type = input_type.getElementType().dyn_cast<QuantizedType>();
+    auto input_type = mlir::cast<TensorType>(dq_op.getArg().getType());
+    auto elem_type = mlir::dyn_cast<QuantizedType>(input_type.getElementType());
     const Location loc = dq_op->getLoc();
 
     Value scale, zero_point;
@@ -340,13 +341,13 @@ class ReplaceDequantizePattern
     TensorType output_type = input_type.clone(elem_type.getStorageType());
     if (target_opset_ == OpSet::UNIFORM_QUANTIZED) {
       ShapedType new_output_type = ConvertIntToQint(
-          output_type.cast<ShapedType>(), rewriter.getContext());
+          mlir::cast<ShapedType>(output_type), rewriter.getContext());
       if (!new_output_type) {
         dq_op->emitError(
             "Failed to convert the type to the corresponding qtype.");
         return failure();
       }
-      output_type = new_output_type.cast<TensorType>();
+      output_type = mlir::cast<TensorType>(new_output_type);
     }
 
     auto scast_op = rewriter.create<quantfork::StorageCastOp>(loc, output_type,
@@ -376,8 +377,8 @@ bool IsQuantizedCallforDynamicRange(TF::PartitionedCallOp call_op) {
       return false;
     } else if (cur_op) {
       // Check if the QuantizeCastOp has element type of quantized type.
-      if (!getElementTypeOrSelf(cur_op.getResult().getType())
-               .isa<QuantizedType>()) {
+      if (!mlir::isa<QuantizedType>(
+              getElementTypeOrSelf(cur_op.getResult().getType()))) {
         return false;
       }
       // Satisfies the input condition.
@@ -385,8 +386,8 @@ bool IsQuantizedCallforDynamicRange(TF::PartitionedCallOp call_op) {
     }
   }
   for (Value output : call_op.getOutput()) {
-    if (auto type = output.getType().dyn_cast<TensorType>()) {
-      if (type.getElementType().isa<QuantizedType>()) {
+    if (auto type = mlir::dyn_cast<TensorType>(output.getType())) {
+      if (mlir::isa<QuantizedType>(type.getElementType())) {
         return false;
       }
     }
@@ -398,15 +399,15 @@ bool IsQuantizedCallforDynamicRange(TF::PartitionedCallOp call_op) {
 bool IsQuantizedCallforStaticRange(TF::PartitionedCallOp call_op) {
   bool has_quantized_types = false;
   for (Value input : call_op.getArgs()) {
-    if (auto type = input.getType().dyn_cast<TensorType>()) {
-      if (type.getElementType().isa<QuantizedType>()) {
+    if (auto type = mlir::dyn_cast<TensorType>(input.getType())) {
+      if (mlir::isa<QuantizedType>(type.getElementType())) {
         has_quantized_types = true;
       }
     }
   }
   for (Value output : call_op.getOutput()) {
-    if (auto type = output.getType().dyn_cast<TensorType>()) {
-      if (type.getElementType().isa<QuantizedType>()) {
+    if (auto type = mlir::dyn_cast<TensorType>(output.getType())) {
+      if (mlir::isa<QuantizedType>(type.getElementType())) {
         has_quantized_types = true;
       }
     }
@@ -616,7 +617,7 @@ std::string GetQuantizedFunctionName(StringRef func_name,
 
 bool ContainsFloatResultType(ArrayRef<Type> result_types) {
   for (auto current_type : result_types) {
-    if (current_type.dyn_cast<TensorType>().getElementType().isF32())
+    if (mlir::dyn_cast<TensorType>(current_type).getElementType().isF32())
       return true;
   }
   return false;
@@ -644,7 +645,7 @@ class QuantizeFunctionPattern
 
   LogicalResult matchAndRewrite(TF::PartitionedCallOp call_op,
                                 PatternRewriter& rewriter) const override {
-    const auto f_attr = call_op.getFAttr().dyn_cast<FlatSymbolRefAttr>();
+    const auto f_attr = mlir::dyn_cast<FlatSymbolRefAttr>(call_op.getFAttr());
     // removeAttr will return nullptr if no attribute was removed.
     if (!call_op->removeAttr(kQuantTraitAttrName) || !f_attr) {
       return failure();
@@ -671,12 +672,12 @@ class QuantizeFunctionPattern
     SmallVector<Value, 4> args;
     SmallVector<Value, 4> qparam_args;
     for (Value arg : call_op.getArgs()) {
-      if (const auto arg_type = arg.getType().dyn_cast<TensorType>()) {
+      if (const auto arg_type = mlir::dyn_cast<TensorType>(arg.getType())) {
         QuantizedType qtype =
-            arg_type.getElementType().dyn_cast<QuantizedType>();
+            mlir::dyn_cast<QuantizedType>(arg_type.getElementType());
         if (!qtype) continue;
-        if (!qtype.isa<UniformQuantizedType,
-                       quant::UniformQuantizedPerAxisType>()) {
+        if (!mlir::isa<UniformQuantizedType,
+                       quant::UniformQuantizedPerAxisType>(qtype)) {
           return failure();
         }
         Value scale, zero_point;
@@ -693,12 +694,12 @@ class QuantizeFunctionPattern
     }
 
     for (Value result : call_op->getResults()) {
-      if (auto result_type = result.getType().dyn_cast<TensorType>()) {
+      if (auto result_type = mlir::dyn_cast<TensorType>(result.getType())) {
         QuantizedType qtype =
-            result_type.getElementType().dyn_cast<QuantizedType>();
+            mlir::dyn_cast<QuantizedType>(result_type.getElementType());
         if (!qtype) continue;
-        if (!qtype.isa<UniformQuantizedType,
-                       quant::UniformQuantizedPerAxisType>()) {
+        if (!mlir::isa<UniformQuantizedType,
+                       quant::UniformQuantizedPerAxisType>(qtype)) {
           return failure();
         }
         Value scale, zero_point;
@@ -717,12 +718,13 @@ class QuantizeFunctionPattern
     rewriter.setInsertionPoint(call_op);
 
     for (Value arg : call_op.getArgs()) {
-      TensorType arg_type = arg.getType().dyn_cast<TensorType>();
+      TensorType arg_type = mlir::dyn_cast<TensorType>(arg.getType());
       if (!arg_type) {
         args.push_back(arg);
         continue;
       }
-      QuantizedType qtype = arg_type.getElementType().dyn_cast<QuantizedType>();
+      QuantizedType qtype =
+          mlir::dyn_cast<QuantizedType>(arg_type.getElementType());
       if (!qtype) {
         args.push_back(arg);
         continue;
@@ -730,15 +732,15 @@ class QuantizeFunctionPattern
 
       quantfork::StorageCastOp scast_op;
       if (target_opset_ == OpSet::UNIFORM_QUANTIZED) {
-        ShapedType new_arg_type = ConvertIntToQint(arg_type.cast<ShapedType>(),
-                                                   rewriter.getContext());
+        ShapedType new_arg_type = ConvertIntToQint(
+            mlir::cast<ShapedType>(arg_type), rewriter.getContext());
         if (!new_arg_type) {
           call_op->emitError(
               "Failed to convert the type to the corresponding qtype.");
           return failure();
         }
         scast_op = rewriter.create<quantfork::StorageCastOp>(
-            arg.getLoc(), new_arg_type.cast<TensorType>(), arg);
+            arg.getLoc(), mlir::cast<TensorType>(new_arg_type), arg);
       } else {
         scast_op = rewriter.create<quantfork::StorageCastOp>(
             arg.getLoc(), arg_type.clone(qtype.getStorageType()), arg);
@@ -761,20 +763,20 @@ class QuantizeFunctionPattern
 
     SmallVector<Type, 4> result_types;
     for (Value result : call_op->getResults()) {
-      TensorType result_type = result.getType().dyn_cast<TensorType>();
+      TensorType result_type = mlir::dyn_cast<TensorType>(result.getType());
       if (!result_type) {
         result_types.push_back(result.getType());
         continue;
       }
       QuantizedType qtype =
-          result_type.getElementType().dyn_cast<QuantizedType>();
+          mlir::dyn_cast<QuantizedType>(result_type.getElementType());
       if (!qtype) {
         result_types.push_back(result_type);
         continue;
       }
       if (target_opset_ == OpSet::UNIFORM_QUANTIZED) {
         ShapedType new_result_type = ConvertIntToQint(
-            result_type.cast<ShapedType>(), rewriter.getContext());
+            mlir::cast<ShapedType>(result_type), rewriter.getContext());
         result_types.push_back(new_result_type);
       } else {
         result_types.push_back(result_type.clone(qtype.getStorageType()));
@@ -871,13 +873,13 @@ class QuantizeFunctionPattern
     rewriter.setInsertionPointAfter(call_op);
     SmallVector<Type, 4> result_types;
     for (Value result : call_op->getResults()) {
-      TensorType result_type = result.getType().dyn_cast<TensorType>();
+      TensorType result_type = mlir::dyn_cast<TensorType>(result.getType());
       if (!result_type) {
         result_types.push_back(result.getType());
         continue;
       }
       QuantizedType qtype =
-          result_type.getElementType().dyn_cast<QuantizedType>();
+          mlir::dyn_cast<QuantizedType>(result_type.getElementType());
       if (!qtype) {
         result_types.push_back(result_type);
         continue;
@@ -890,7 +892,7 @@ class QuantizeFunctionPattern
     auto module = call_op->getParentOfType<ModuleOp>();
     SymbolTable symbol_table(module);
 
-    const auto f_attr = call_op.getFAttr().dyn_cast<FlatSymbolRefAttr>();
+    const auto f_attr = mlir::dyn_cast<FlatSymbolRefAttr>(call_op.getFAttr());
     const auto float_func =
         dyn_cast<func::FuncOp>(symbol_table.lookup(f_attr.getValue()));
     rewriter.setInsertionPointAfter(float_func);
@@ -973,14 +975,15 @@ class QuantizeConstPattern
       return failure();
     }
 
-    ShapedType tensor_qtype = q_op.getResult().getType().cast<ShapedType>();
+    ShapedType tensor_qtype =
+        mlir::cast<ShapedType>(q_op.getResult().getType());
     Attribute tensor_proto_attr = Quantize(attr, tensor_qtype);
     if (!tensor_proto_attr) {
       return failure();
     }
 
-    Type storage_type =
-        tensor_qtype.getElementType().cast<QuantizedType>().getStorageType();
+    Type storage_type = mlir::cast<QuantizedType>(tensor_qtype.getElementType())
+                            .getStorageType();
     ShapedType new_type = tensor_qtype.clone(storage_type);
     Location loc = q_op.getArg().getLoc();
 
@@ -991,14 +994,14 @@ class QuantizeConstPattern
       // workaround.
       tensorflow::TensorProto tensor_proto;
       if (!mlir::tfg::ConvertToTensorProto(
-               tensor_proto_attr.cast<ElementsAttr>(), &tensor_proto)
+               mlir::cast<ElementsAttr>(tensor_proto_attr), &tensor_proto)
                .ok()) {
         return failure();
       }
 
-      const int bit_width = tensor_qtype.getElementType()
-                                .dyn_cast<QuantizedType>()
-                                .getStorageTypeIntegralWidth();
+      const int bit_width =
+          mlir::dyn_cast<QuantizedType>(tensor_qtype.getElementType())
+              .getStorageTypeIntegralWidth();
 
       tensor_proto.set_dtype((bit_width == 8) ? tensorflow::DT_QINT8
                                               : tensorflow::DT_QINT32);
@@ -1033,8 +1036,9 @@ class RestoreWeightShapePattern
     int weight_operand_idx = 1;
     Operation* weight_op = op.getOperand(weight_operand_idx).getDefiningOp();
 
-    auto weight_type = weight_op->getResult(0).getType().dyn_cast<ShapedType>();
-    auto input_type = op.getOperand(0).getType().dyn_cast<ShapedType>();
+    auto weight_type =
+        mlir::dyn_cast<ShapedType>(weight_op->getResult(0).getType());
+    auto input_type = mlir::dyn_cast<ShapedType>(op.getOperand(0).getType());
 
     llvm::ArrayRef<int64_t> weight_shape = weight_type.getShape();
     llvm::ArrayRef<int64_t> input_shape = input_type.getShape();
@@ -1073,7 +1077,7 @@ class RestoreWeightShapePattern
 
   LogicalResult matchAndRewrite(TF::PartitionedCallOp call_op,
                                 PatternRewriter& rewriter) const override {
-    const auto f_attr = call_op.getFAttr().dyn_cast<FlatSymbolRefAttr>();
+    const auto f_attr = mlir::dyn_cast<FlatSymbolRefAttr>(call_op.getFAttr());
     StringRef function_name = f_attr.getValue();
     // TODO(b/228928859): Improve the getter function to match attributes rather
     // than function name.
@@ -1106,7 +1110,8 @@ class QuantizationSummary {
 
     module_.walk([&](Operation* op) {
       if (auto call_op = llvm::dyn_cast_or_null<TF::PartitionedCallOp>(op)) {
-        const auto f_attr = call_op.getFAttr().dyn_cast<FlatSymbolRefAttr>();
+        const auto f_attr =
+            mlir::dyn_cast<FlatSymbolRefAttr>(call_op.getFAttr());
         if (!f_attr) return;
         StringRef func_name = f_attr.getValue();
         if (func_name.starts_with(kQuantizedFuncPrefix)) {
@@ -1227,7 +1232,7 @@ class QuantizationSummary {
     }
 
     // Use the first op as the representative name.
-    return quantized_ops.front().cast<StringAttr>().getValue();
+    return mlir::cast<StringAttr>(quantized_ops.front()).getValue();
   }
 
   bool IsInCompsiteFunction(Operation* op) {
diff --git a/tensorflow/compiler/mlir/quantization/tensorflow/passes/replace_cast_hacks_with_tf_xla_ops.cc b/tensorflow/compiler/mlir/quantization/tensorflow/passes/replace_cast_hacks_with_tf_xla_ops.cc
index 374d687428ee3e..b202798dffe9d0 100644
--- a/tensorflow/compiler/mlir/quantization/tensorflow/passes/replace_cast_hacks_with_tf_xla_ops.cc
+++ b/tensorflow/compiler/mlir/quantization/tensorflow/passes/replace_cast_hacks_with_tf_xla_ops.cc
@@ -33,6 +33,7 @@ limitations under the License.
 #include "mlir/IR/Value.h"  // from @llvm-project
 #include "mlir/IR/ValueRange.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/lite/transforms/passes.h"
@@ -77,8 +78,9 @@ void PrepareXlaConvParams(OpBuilder &builder, Location loc, ArrayAttr strides,
   SmallVector<int32_t> lhs_dilation_values(num_dims - 2, 1);
   SmallVector<int32_t> stride_values, rhs_dilation_values;
   for (int64_t i : llvm::seq<int64_t>(1, num_dims - 1)) {
-    stride_values.push_back(strides[i].cast<IntegerAttr>().getInt());
-    rhs_dilation_values.push_back(dilations[i].cast<IntegerAttr>().getInt());
+    stride_values.push_back(mlir::cast<IntegerAttr>(strides[i]).getInt());
+    rhs_dilation_values.push_back(
+        mlir::cast<IntegerAttr>(dilations[i]).getInt());
   }
   window_strides = Create1DConstValue<int32_t>(builder, loc, stride_values);
   lhs_dilation = Create1DConstValue<int32_t>(builder, loc, lhs_dilation_values);
@@ -96,7 +98,7 @@ Value CreateZeroPointPartialOffset(OpBuilder &builder, Location loc,
     return CreateScalarConstValue<int32_t>(builder, loc, 0);
   }
 
-  auto shape = tensor.getType().template cast<ShapedType>();
+  auto shape = mlir::cast<ShapedType>(tensor.getType());
   SmallVector<int64_t> non_output_indices;
   for (int64_t i : llvm::seq<int64_t>(0, shape.getRank())) {
     if (absl::c_count(output_dims, i) == 0) {
@@ -108,7 +110,7 @@ Value CreateZeroPointPartialOffset(OpBuilder &builder, Location loc,
       Create1DConstValue<int64_t>(builder, loc, non_output_indices);
   auto zp = CreateScalarConstValue<int32_t>(builder, loc, other_tensor_zp);
 
-  TensorType tensor_type = tensor.getType().dyn_cast<TensorType>();
+  TensorType tensor_type = mlir::dyn_cast<TensorType>(tensor.getType());
   Value tensor_i32 = builder.create<TF::CastOp>(
       loc, tensor_type.clone(builder.getIntegerType(32)), tensor);
   auto reduced =
@@ -136,7 +138,7 @@ Value MergeZeroPointOffset(OpBuilder &builder, Location loc, Value weight,
                            int8_t input_zp, int8_t weight_zp,
                            Value zp_input_contribution,
                            Value zp_weight_contribution) {
-  auto weight_shape = weight.getType().template cast<ShapedType>();
+  auto weight_shape = mlir::cast<ShapedType>(weight.getType());
   SmallVector<int64_t> weight_non_output_indices;
   for (auto i : llvm::seq<int64_t>(0, weight_shape.getRank())) {
     if (absl::c_count(weight_output_dims, i) == 0) {
@@ -498,7 +500,7 @@ Value CreateZeroPointPartialOffsetXlaDotV2(
     return CreateScalarConstValue<int32_t>(builder, loc, 0);
   }
 
-  auto shape = tensor.getType().template cast<ShapedType>();
+  auto shape = mlir::cast<ShapedType>(tensor.getType());
   SmallVector<int64_t> tensor_shape;
   for (auto v : shape.getShape()) {
     tensor_shape.push_back(v);
@@ -506,7 +508,7 @@ Value CreateZeroPointPartialOffsetXlaDotV2(
 
   auto zp = CreateScalarConstValue<int32_t>(builder, loc, other_tensor_zp);
 
-  TensorType tensor_type = tensor.getType().dyn_cast<TensorType>();
+  TensorType tensor_type = mlir::dyn_cast<TensorType>(tensor.getType());
   Value tensor_i32 = builder.create<TF::CastOp>(
       loc, tensor_type.clone(builder.getIntegerType(32)), tensor);
 
@@ -596,7 +598,7 @@ Value CalculateZeroPointOffsetXLADotV2(OpBuilder &builder, Location loc,
   Value zp_weight_contribution = CreateZeroPointPartialOffsetXlaDotV2(
       builder, loc, weight, input_zp, dnums, /*is_lhs=*/false, output_rank);
 
-  auto weight_shape = weight.getType().template cast<ShapedType>();
+  auto weight_shape = mlir::cast<ShapedType>(weight.getType());
 
   absl::flat_hash_set<int64_t> rhs_contracting_dims;
   for (auto dim : dnums.rhs_contracting_dimensions()) {
@@ -711,8 +713,8 @@ Value CreateXlaConvOpFromTfConv2dOp(OpBuilder &builder, Location loc,
                                     ArrayAttr dilations,
                                     StringAttr conv_padding,
                                     ArrayAttr explicit_paddings) {
-  auto input_shape = input.getType().template cast<ShapedType>();
-  auto filter_shape = filter.getType().template cast<ShapedType>();
+  auto input_shape = mlir::cast<ShapedType>(input.getType());
+  auto filter_shape = mlir::cast<ShapedType>(filter.getType());
   if (!input_shape.hasRank() || input_shape.getRank() != 4 ||
       !filter_shape.hasRank() || filter_shape.getRank() != 4) {
     emitError(loc, "input and filter are expected to be 4D tensors");
@@ -731,8 +733,8 @@ Value CreateXlaConvOpFromTfDepthwiseConv2dOp(
     OpBuilder &builder, Location loc, Value input, Value filter, Value input_zp,
     Value conv_output, ArrayAttr strides, ArrayAttr dilations,
     StringAttr conv_padding, ArrayAttr explicit_paddings) {
-  auto input_shape = input.getType().template cast<ShapedType>();
-  auto filter_shape = filter.getType().template cast<ShapedType>();
+  auto input_shape = mlir::cast<ShapedType>(input.getType());
+  auto filter_shape = mlir::cast<ShapedType>(filter.getType());
   if (!input_shape.hasRank() || input_shape.getRank() != 4 ||
       !filter_shape.hasRank() || filter_shape.getRank() != 4) {
     emitError(loc, "input and filter are expected to be 4D tensors");
@@ -759,8 +761,8 @@ Value CreateXlaConvOpFromTfConv3dOp(OpBuilder &builder, Location loc,
                                     Value conv_output, ArrayAttr strides,
                                     ArrayAttr dilations,
                                     StringAttr conv_padding) {
-  auto input_shape = input.getType().template cast<ShapedType>();
-  auto filter_shape = filter.getType().template cast<ShapedType>();
+  auto input_shape = mlir::cast<ShapedType>(input.getType());
+  auto filter_shape = mlir::cast<ShapedType>(filter.getType());
   if (!input_shape.hasRank() || input_shape.getRank() != 5 ||
       !filter_shape.hasRank() || filter_shape.getRank() != 5) {
     emitError(loc, "input and filter are expected to be 5D tensors");
@@ -819,7 +821,7 @@ Value CreateXlaDotV2Op(OpBuilder &builder, Location loc, Value input,
 
   Value zp_offset = CalculateZeroPointOffsetXLADotV2(
       builder, loc, input, weight, input_zp_value, weight_zp_value, dnums,
-      output.getType().template cast<ShapedType>().getRank());
+      mlir::cast<ShapedType>(output.getType()).getRank());
 
   return builder.create<TF::SubOp>(loc, dot_result, zp_offset);
 }
@@ -891,8 +893,8 @@ GetBroadcastShapesForBatchMatmul(ShapedType input_type,
 // function, except BroadcastTo, are expected to be folded.
 void BroadcastBatchDimensionsForBatchMatMul(OpBuilder &builder, Location loc,
                                             Value &input, Value &weight) {
-  ShapedType input_type = input.getType().template cast<ShapedType>();
-  ShapedType weight_type = weight.getType().template cast<ShapedType>();
+  ShapedType input_type = mlir::cast<ShapedType>(input.getType());
+  ShapedType weight_type = mlir::cast<ShapedType>(weight.getType());
   const int32_t input_rank = input_type.getRank();
   const int32_t weight_rank = weight_type.getRank();
   const int32_t broadcasted_rank = std::max(input_rank, weight_rank);
@@ -984,7 +986,7 @@ Value CreateXlaDotV2OpFromTfBatchMatMulOp(OpBuilder &builder, Location loc,
   BroadcastBatchDimensionsForBatchMatMul(builder, loc, input, weight);
 
   // Both input and weight have the same rank after broadcasting.
-  ShapedType weight_shape = weight.getType().template cast<ShapedType>();
+  ShapedType weight_shape = mlir::cast<ShapedType>(weight.getType());
   int num_batch_dim = weight_shape.getRank() - 2;
 
   // Transpose and constant-fold the weight if needed.
@@ -1016,7 +1018,7 @@ Value CreateXlaDotV2OpFromTfBatchMatMulOp(OpBuilder &builder, Location loc,
 
 // Check if the given value is a ranked type with specified integer width.
 bool IsRankedInt(Value value, const int integer_width) {
-  ShapedType value_type = value.getType().template cast<ShapedType>();
+  ShapedType value_type = mlir::cast<ShapedType>(value.getType());
   if (!value_type.hasRank()) return false;
   if (!value_type.getElementType().isInteger(integer_width)) return false;
 
diff --git a/tensorflow/compiler/mlir/quantization/tensorflow/utils/BUILD b/tensorflow/compiler/mlir/quantization/tensorflow/utils/BUILD
index 21600fb78083a5..4397b4fc5a3f2d 100644
--- a/tensorflow/compiler/mlir/quantization/tensorflow/utils/BUILD
+++ b/tensorflow/compiler/mlir/quantization/tensorflow/utils/BUILD
@@ -30,6 +30,7 @@ cc_library(
     compatible_with = get_compatible_with_portable(),
     deps = [
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
     ],
 )
 
@@ -85,6 +86,7 @@ cc_library(
         "@com_google_absl//absl/strings:str_format",
         "@llvm-project//llvm:Support",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
         "@local_xla//xla:xla_data_proto_cc",
     ],
 )
@@ -100,5 +102,6 @@ tf_cc_test(
         "@com_google_googletest//:gtest_main",
         "@llvm-project//llvm:Support",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
     ],
 )
diff --git a/tensorflow/compiler/mlir/quantization/tensorflow/utils/fake_quant_utils.h b/tensorflow/compiler/mlir/quantization/tensorflow/utils/fake_quant_utils.h
index 5a1734bf6bf026..702e19506d2fd6 100644
--- a/tensorflow/compiler/mlir/quantization/tensorflow/utils/fake_quant_utils.h
+++ b/tensorflow/compiler/mlir/quantization/tensorflow/utils/fake_quant_utils.h
@@ -112,7 +112,7 @@ class ConvertFakeQuantOpToQuantOps {
 
     Value input = tf_op.getInputs();
     int quant_dim = -1;
-    auto input_type = input.getType().template cast<ShapedType>();
+    auto input_type = mlir::cast<ShapedType>(input.getType());
     if (PerAxis) {
       if (!input_type.hasRank()) {
         tf_op.emitError("The input should have known rank for per-channel op.");
diff --git a/tensorflow/compiler/mlir/quantization/tensorflow/utils/tf_quantize_op_utils.cc b/tensorflow/compiler/mlir/quantization/tensorflow/utils/tf_quantize_op_utils.cc
index 264c6c508a60f7..1392bf4de2a92f 100644
--- a/tensorflow/compiler/mlir/quantization/tensorflow/utils/tf_quantize_op_utils.cc
+++ b/tensorflow/compiler/mlir/quantization/tensorflow/utils/tf_quantize_op_utils.cc
@@ -16,14 +16,15 @@ limitations under the License.
 
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/IR/Types.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 
 namespace mlir {
 namespace quant {
 
 UnrankedTensorType CreateUnknownShapeFromElementType(Type tensor_type) {
-  if (!tensor_type.cast<TensorType>()) return UnrankedTensorType();
+  if (!mlir::cast<TensorType>(tensor_type)) return UnrankedTensorType();
   return UnrankedTensorType::get(
-      tensor_type.cast<TensorType>().getElementType());
+      mlir::cast<TensorType>(tensor_type).getElementType());
 }
 
 }  // namespace quant
diff --git a/tensorflow/compiler/mlir/quantization/tensorflow/utils/tf_to_uniform_attribute_utils.cc b/tensorflow/compiler/mlir/quantization/tensorflow/utils/tf_to_uniform_attribute_utils.cc
index 967af993c0bcf7..430d5ff6ba2047 100644
--- a/tensorflow/compiler/mlir/quantization/tensorflow/utils/tf_to_uniform_attribute_utils.cc
+++ b/tensorflow/compiler/mlir/quantization/tensorflow/utils/tf_to_uniform_attribute_utils.cc
@@ -33,6 +33,7 @@ limitations under the License.
 #include "mlir/IR/OperationSupport.h"  // from @llvm-project
 #include "mlir/IR/PatternMatch.h"  // from @llvm-project
 #include "mlir/IR/TypeUtilities.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/quantization/common/quantization_lib/quantization_utils.h"
 #include "tensorflow/compiler/mlir/quantization/tensorflow/ops/uniform_op_quant_spec.h"
@@ -66,9 +67,9 @@ constexpr std::array<absl::string_view, 2> kSuffixes = {"_min_val", "_max_val"};
 
 Attribute GetWindowStridesValue(
     PatternRewriter& rewriter, llvm::StringMap<Attribute>& identifier_to_attr) {
-  ArrayAttr stride = identifier_to_attr["strides"].dyn_cast<ArrayAttr>();
-  const int stride_h = stride[1].cast<IntegerAttr>().getInt();
-  const int stride_w = stride[2].cast<IntegerAttr>().getInt();
+  ArrayAttr stride = mlir::dyn_cast<ArrayAttr>(identifier_to_attr["strides"]);
+  const int stride_h = mlir::cast<IntegerAttr>(stride[1]).getInt();
+  const int stride_w = mlir::cast<IntegerAttr>(stride[2]).getInt();
   return rewriter.getI64ArrayAttr({stride_h, stride_w});
 }
 
@@ -79,23 +80,24 @@ Attribute GetLhsDilationValue(PatternRewriter& rewriter,
 
 Attribute GetRhsDilationValue(PatternRewriter& rewriter,
                               llvm::StringMap<Attribute>& identifier_to_attr) {
-  ArrayAttr dilations = identifier_to_attr["dilations"].dyn_cast<ArrayAttr>();
-  const int dilation_h = dilations[1].cast<IntegerAttr>().getInt();
-  const int dilation_w = dilations[2].cast<IntegerAttr>().getInt();
+  ArrayAttr dilations =
+      mlir::dyn_cast<ArrayAttr>(identifier_to_attr["dilations"]);
+  const int dilation_h = mlir::cast<IntegerAttr>(dilations[1]).getInt();
+  const int dilation_w = mlir::cast<IntegerAttr>(dilations[2]).getInt();
   return rewriter.getI64ArrayAttr({dilation_h, dilation_w});
 }
 
 Attribute GetPaddingValue(PatternRewriter& rewriter,
                           llvm::StringMap<Attribute>& identifier_to_attr) {
   llvm::StringRef padding =
-      identifier_to_attr["padding"].dyn_cast<StringAttr>().getValue();
+      mlir::dyn_cast<StringAttr>(identifier_to_attr["padding"]).getValue();
   return rewriter.getStringAttr(padding);
 }
 
 Attribute GetExplicitPaddingValue(
     PatternRewriter& rewriter, llvm::StringMap<Attribute>& identifier_to_attr) {
   ArrayAttr explicit_padding =
-      identifier_to_attr["explicit_paddings"].dyn_cast<ArrayAttr>();
+      mlir::dyn_cast<ArrayAttr>(identifier_to_attr["explicit_paddings"]);
   return explicit_padding;
 }
 
@@ -167,7 +169,7 @@ LogicalResult CheckIfAttrIs8Bit(const std::string& attr, Operation* op,
     element_type = getElementTypeOrSelf(op->getOpResult(0).getType());
   }
   if (element_type) {
-    is_8_bit = element_type.isa<TF::Qint8Type>();
+    is_8_bit = mlir::isa<TF::Qint8Type>(element_type);
     return success();
   }
   return failure();
@@ -295,7 +297,8 @@ LogicalResult FillAttributesForUniformQuantizedConvolutionOp(
 
   auto feature_group_cnt_attr = llvm::StringRef("feature_group_count");
   int feature_group_cnt = 1;
-  ShapedType input_shape = op->getOperand(0).getType().dyn_cast<ShapedType>();
+  ShapedType input_shape =
+      mlir::dyn_cast<ShapedType>(op->getOperand(0).getType());
   if (!input_shape) {
     return op->emitError(
         "Only input with known shape is supported for Uniform Quantized "
@@ -425,7 +428,8 @@ LogicalResult FillAttributesForUniformRequantizeOp(
     activation_quantization_axis =
         GetQuantizationAxis(rewriter, op, /*operand_index=*/0);
 
-    auto output_scale_type = op->getOperand(3).getType().dyn_cast<ShapedType>();
+    auto output_scale_type =
+        mlir::dyn_cast<ShapedType>(op->getOperand(3).getType());
     if (!output_scale_type) {
       return failure();
     }
diff --git a/tensorflow/compiler/mlir/quantization/tensorflow/utils/tf_to_xla_attribute_utils.cc b/tensorflow/compiler/mlir/quantization/tensorflow/utils/tf_to_xla_attribute_utils.cc
index f1d7a6ae576c7b..7054f049d1369c 100644
--- a/tensorflow/compiler/mlir/quantization/tensorflow/utils/tf_to_xla_attribute_utils.cc
+++ b/tensorflow/compiler/mlir/quantization/tensorflow/utils/tf_to_xla_attribute_utils.cc
@@ -20,6 +20,7 @@ limitations under the License.
 #include "absl/algorithm/container.h"
 #include "absl/strings/str_format.h"
 #include "llvm/ADT/ArrayRef.h"
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/quantization/common/attrs_and_constraints.h"
 #include "tensorflow/compiler/mlir/quantization/tensorflow/cc/constant_fold.h"
 #include "xla/xla_data.pb.h"
@@ -34,8 +35,7 @@ Value GetDimValue(OpBuilder &builder, Location loc, Value shape_value,
   return builder.create<TF::StridedSliceOp>(
       loc,
       RankedTensorType::get(
-          {},
-          shape_value.getType().template cast<ShapedType>().getElementType()),
+          {}, mlir::cast<ShapedType>(shape_value.getType()).getElementType()),
       /*input=*/shape_value,
       /*begin=*/Create1DConstValue<int32_t>(builder, loc, {dim}),
       /*end=*/Create1DConstValue<int32_t>(builder, loc, {dim + 1}),
@@ -109,14 +109,14 @@ Value PadForDynamicShapedInputSamePadding(
         CreateConstValue<int64_t>(builder, loc, {rank}, shape));
   };
 
-  ShapedType filter_shape = filter.getType().template cast<ShapedType>();
+  ShapedType filter_shape = mlir::cast<ShapedType>(filter.getType());
   Value input_shape_value = builder.create<TF::ShapeOp>(
       loc, RankedTensorType::get({num_dims}, builder.getI32Type()), input);
   auto scalar_to_rank1 = [&](Value value) { return reshape_op(value, {1}); };
   for (int i : llvm::seq<int>(1, num_dims - 1)) {
     Value input_size_i = GetDimValue(builder, loc, input_shape_value, i);
-    const int stride_i = strides[i].cast<IntegerAttr>().getInt();
-    const int dilation_i = dilations[i].cast<IntegerAttr>().getInt();
+    const int stride_i = mlir::cast<IntegerAttr>(strides[i]).getInt();
+    const int dilation_i = mlir::cast<IntegerAttr>(dilations[i]).getInt();
     const int filter_i = filter_shape.getDimSize(i - 1);
     Value pad_i_low, pad_i_high;
     GetSamePaddingValues(builder, loc, input_size_i, filter_i, dilation_i,
@@ -154,7 +154,7 @@ Value CalculatePaddingAndPadIfNeeded(OpBuilder &builder, Location loc,
                                      StringAttr conv_padding,
                                      ArrayAttr explicit_paddings,
                                      Value &padding, int num_dims) {
-  ShapedType input_shape = input.getType().template cast<ShapedType>();
+  ShapedType input_shape = mlir::cast<ShapedType>(input.getType());
   SmallVector<int64_t> spatial_dims(num_dims - 2);
   absl::c_iota(spatial_dims, 1);
   bool has_dynamic_spatial_dim = absl::c_any_of(
@@ -166,7 +166,7 @@ Value CalculatePaddingAndPadIfNeeded(OpBuilder &builder, Location loc,
         conv_padding, padding, num_dims);
   }
 
-  ShapedType filter_shape = filter.getType().template cast<ShapedType>();
+  ShapedType filter_shape = mlir::cast<ShapedType>(filter.getType());
   SmallVector<int32_t> padding_values(2 * num_dims, 0);
   if (conv_padding.strref().equals("EXPLICIT")) {
     if (explicit_paddings.size() != 2 * num_dims) {
@@ -178,16 +178,16 @@ Value CalculatePaddingAndPadIfNeeded(OpBuilder &builder, Location loc,
     }
     for (int i : spatial_dims) {
       padding_values[2 * i] =
-          explicit_paddings[2 * i].cast<IntegerAttr>().getInt();
+          mlir::cast<IntegerAttr>(explicit_paddings[2 * i]).getInt();
       padding_values[2 * i + 1] =
-          explicit_paddings[2 * i + 1].cast<IntegerAttr>().getInt();
+          mlir::cast<IntegerAttr>(explicit_paddings[2 * i + 1]).getInt();
     }
   } else if (conv_padding.strref().equals("SAME")) {
     for (int i : spatial_dims) {
       int input_size = input_shape.getDimSize(i);
       int filter_size = filter_shape.getDimSize(i - 1);
-      int stride_i = strides[i].cast<IntegerAttr>().getInt();
-      int dilation_i = dilations[i].cast<IntegerAttr>().getInt();
+      int stride_i = mlir::cast<IntegerAttr>(strides[i]).getInt();
+      int dilation_i = mlir::cast<IntegerAttr>(dilations[i]).getInt();
       int out_size = tflite::ComputeOutSize(kTfLitePaddingSame, input_size,
                                             filter_size, stride_i, dilation_i);
 
@@ -243,7 +243,7 @@ Value CalculatePaddingAndPadIfNeeded(OpBuilder &builder, Location loc,
 //
 // packed_value = bitwise_or(packed_low, packed_high)
 Value PackOperand(OpBuilder &builder, Location loc, Value value, int pack_dim) {
-  ShapedType value_type = value.getType().cast<ShapedType>();
+  ShapedType value_type = mlir::cast<ShapedType>(value.getType());
   const int rank = value_type.getRank();
 
   SmallVector<int64_t> packed_shape(value_type.getShape().begin(),
diff --git a/tensorflow/compiler/mlir/quantization/tensorflow/utils/tf_to_xla_attribute_utils_test.cc b/tensorflow/compiler/mlir/quantization/tensorflow/utils/tf_to_xla_attribute_utils_test.cc
index cc4bbb344026da..cbcda677b87733 100644
--- a/tensorflow/compiler/mlir/quantization/tensorflow/utils/tf_to_xla_attribute_utils_test.cc
+++ b/tensorflow/compiler/mlir/quantization/tensorflow/utils/tf_to_xla_attribute_utils_test.cc
@@ -29,6 +29,7 @@ limitations under the License.
 #include "mlir/IR/MLIRContext.h"  // from @llvm-project
 #include "mlir/IR/Operation.h"  // from @llvm-project
 #include "mlir/IR/OwningOpRef.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/quantization/common/attrs_and_constraints.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_dialect.h"
 
@@ -51,7 +52,8 @@ void PackOperandTestHelper(
   DenseIntElementsAttr packed_value_attr;
   ASSERT_TRUE(matchPattern(packed_value, m_Constant(&packed_value_attr)));
 
-  ShapedType packed_shape_type = packed_value.getType().dyn_cast<ShapedType>();
+  ShapedType packed_shape_type =
+      mlir::dyn_cast<ShapedType>(packed_value.getType());
   llvm::SmallVector<int64_t> packed_shape(packed_shape_type.getShape().begin(),
                                           packed_shape_type.getShape().end());
   EXPECT_THAT(packed_shape, testing::ElementsAreArray(expected_packed_shape));
diff --git a/tensorflow/compiler/mlir/tensorflow/BUILD b/tensorflow/compiler/mlir/tensorflow/BUILD
index 26d5e4d52b41d7..7fda5b22e08ca2 100644
--- a/tensorflow/compiler/mlir/tensorflow/BUILD
+++ b/tensorflow/compiler/mlir/tensorflow/BUILD
@@ -644,6 +644,7 @@ cc_library(
         "@llvm-project//llvm:Support",
         "@llvm-project//mlir:FuncDialect",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
     ],
 )
 
@@ -778,6 +779,7 @@ cc_library(
     hdrs = ["utils/location_utils.h"],
     deps = [
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
     ],
 )
 
@@ -908,6 +910,7 @@ tf_cc_test(
         "//tensorflow/core:test_main",
         "//tensorflow/core:testlib",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
         "@local_tsl//tsl/platform:ml_dtypes",
         "@local_xla//xla:test",
     ],
@@ -938,6 +941,7 @@ cc_library(
         "//tensorflow/core/util:managed_stack_trace",
         "@com_google_absl//absl/status",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
         "@local_xla//xla/mlir/utils:error_util",
     ],
 )
@@ -1401,6 +1405,7 @@ cc_library(
         "@com_google_absl//absl/strings",
         "@llvm-project//llvm:Support",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
     ],
 )
 
@@ -1473,6 +1478,7 @@ cc_library(
         "@llvm-project//llvm:Support",
         "@llvm-project//mlir:Dialect",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
     ],
 )
 
@@ -1505,6 +1511,7 @@ cc_library(
         "@llvm-project//llvm:Support",
         "@llvm-project//mlir:FuncDialect",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
     ],
 )
 
@@ -1516,6 +1523,7 @@ cc_library(
         "@llvm-project//llvm:Support",
         "@llvm-project//mlir:Dialect",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
     ],
 )
 
diff --git a/tensorflow/compiler/mlir/tensorflow/analysis/resource_alias_analysis.cc b/tensorflow/compiler/mlir/tensorflow/analysis/resource_alias_analysis.cc
index 348316e2648ccb..cab89bb10b5fb9 100644
--- a/tensorflow/compiler/mlir/tensorflow/analysis/resource_alias_analysis.cc
+++ b/tensorflow/compiler/mlir/tensorflow/analysis/resource_alias_analysis.cc
@@ -74,7 +74,7 @@ class BacktrackAnalysisInfo {
   // the result cannot be backtracked to a region argument, returns
   // std::nullopt.
   std::optional<int> GetArg(int result_index) const {
-    if (auto arg = GetValue(result_index).dyn_cast<BlockArgument>())
+    if (auto arg = mlir::dyn_cast<BlockArgument>(GetValue(result_index)))
       if (arg.getParentBlock() == &region_->front()) return arg.getArgNumber();
     return std::nullopt;
   }
@@ -191,7 +191,7 @@ BacktrackAnalysis::BacktrackAnalysis(
 // possible.
 Value BacktrackAnalysis::BacktrackValue(Value value) {
   while (Operation* op = value.getDefiningOp()) {
-    int res_index = value.cast<OpResult>().getResultNumber();
+    int res_index = mlir::cast<OpResult>(value).getResultNumber();
     if (auto graph = dyn_cast<tf_executor::GraphOp>(op)) {
       value = graph.GetFetch().getOperand(res_index);
     } else if (auto island = dyn_cast<tf_executor::IslandOp>(op)) {
diff --git a/tensorflow/compiler/mlir/tensorflow/analysis/resource_dataflow.cc b/tensorflow/compiler/mlir/tensorflow/analysis/resource_dataflow.cc
index 5ceda80490f688..e27d0405d7e8f1 100644
--- a/tensorflow/compiler/mlir/tensorflow/analysis/resource_dataflow.cc
+++ b/tensorflow/compiler/mlir/tensorflow/analysis/resource_dataflow.cc
@@ -46,7 +46,7 @@ ResourceConstructingOps ResourceConstructingOps::EntryState(
   return ResourceConstructingOps();
 }
 ResourceConstructingOps ResourceConstructingOps::EntryState(Value value) {
-  if (auto barg = value.dyn_cast<BlockArgument>()) {
+  if (auto barg = mlir::dyn_cast<BlockArgument>(value)) {
     if (func::FuncOp func =
             dyn_cast<func::FuncOp>(barg.getOwner()->getParentOp())) {
       SymbolTable symbol_table(func->getParentOfType<ModuleOp>());
@@ -87,7 +87,7 @@ IsComposite IsComposite::EntryState(MLIRContext *context) {
 
 IsComposite IsComposite::EntryState(Value value) {
   IsComposite result;
-  if (auto barg = value.dyn_cast<BlockArgument>()) {
+  if (auto barg = mlir::dyn_cast<BlockArgument>(value)) {
     if (func::FuncOp func =
             dyn_cast<func::FuncOp>(barg.getOwner()->getParentOp())) {
       if (func.getArgAttr(barg.getArgNumber(), kCompositeDevice)) {
diff --git a/tensorflow/compiler/mlir/tensorflow/analysis/resource_value_typed_analyzer.cc b/tensorflow/compiler/mlir/tensorflow/analysis/resource_value_typed_analyzer.cc
index e1a984ea69bc67..abace5111184ff 100644
--- a/tensorflow/compiler/mlir/tensorflow/analysis/resource_value_typed_analyzer.cc
+++ b/tensorflow/compiler/mlir/tensorflow/analysis/resource_value_typed_analyzer.cc
@@ -29,8 +29,8 @@ namespace TF {
 namespace {
 
 bool IsResourceType(Type type) {
-  if (auto tensor_type = type.dyn_cast<TensorType>()) {
-    return tensor_type.getElementType().isa<TF::ResourceType>();
+  if (auto tensor_type = mlir::dyn_cast<TensorType>(type)) {
+    return mlir::isa<TF::ResourceType>(tensor_type.getElementType());
   }
   return false;
 }
@@ -44,10 +44,9 @@ func::FuncOp GetSessionInitializerFunc(ModuleOp module) {
   auto session_init_op = tf_saved_model::GetSessionInitializerOp(module);
   if (session_init_op && !session_init_op.getInitializers().empty()) {
     SymbolTable symbol_table(module);
-    func::FuncOp init_func_op =
-        symbol_table.lookup<func::FuncOp>(session_init_op.getInitializers()[0]
-                                              .cast<FlatSymbolRefAttr>()
-                                              .getValue());
+    func::FuncOp init_func_op = symbol_table.lookup<func::FuncOp>(
+        mlir::cast<FlatSymbolRefAttr>(session_init_op.getInitializers()[0])
+            .getValue());
     return init_func_op;
   }
   return nullptr;
diff --git a/tensorflow/compiler/mlir/tensorflow/analysis/side_effect_analysis.cc b/tensorflow/compiler/mlir/tensorflow/analysis/side_effect_analysis.cc
index c95dd020497385..df0138a20a0c74 100644
--- a/tensorflow/compiler/mlir/tensorflow/analysis/side_effect_analysis.cc
+++ b/tensorflow/compiler/mlir/tensorflow/analysis/side_effect_analysis.cc
@@ -73,7 +73,7 @@ const ResourceIdSet& UnknownResourceSet() {
 const ResourceIdSet& GetResourceUniqueIdsOrUnknown(
     Value value,
     const ResourceAliasAnalysis::Info& alias_analysis) {
-  if (!getElementTypeOrSelf(value.getType()).isa<TF::ResourceType>() ||
+  if (!mlir::isa<TF::ResourceType>(getElementTypeOrSelf(value.getType())) ||
       alias_analysis.IsUnknownResource(value)) return UnknownResourceSet();
   return alias_analysis.GetResourceUniqueIds(value);
 }
@@ -145,7 +145,7 @@ bool MayHaveSideEffect(Operation* op) {
 bool ShouldUseResourceAliasAnalysis(
     const MemoryEffects::EffectInstance& effect) {
   Value value = effect.getValue();
-  if (value && getElementTypeOrSelf(value.getType()).isa<ResourceType>()) {
+  if (value && mlir::isa<ResourceType>(getElementTypeOrSelf(value.getType()))) {
     // For value-based effects on resource values we can use resource alias
     // analysis.
     return true;
diff --git a/tensorflow/compiler/mlir/tensorflow/c/c_api_unified_experimental_mlir.cc b/tensorflow/compiler/mlir/tensorflow/c/c_api_unified_experimental_mlir.cc
index e9a35b1221c2a4..7275aee19e49f4 100644
--- a/tensorflow/compiler/mlir/tensorflow/c/c_api_unified_experimental_mlir.cc
+++ b/tensorflow/compiler/mlir/tensorflow/c/c_api_unified_experimental_mlir.cc
@@ -121,7 +121,7 @@ class MlirTensor : public TracingTensorHandle {
 
   Value getValue() { return value_; }
   Type getElementType() {
-    return value_.getType().cast<ShapedType>().getElementType();
+    return mlir::cast<ShapedType>(value_.getType()).getElementType();
   }
 
   // For LLVM style RTTI.
@@ -340,11 +340,11 @@ Status MlirAbstractOp::SetOpName(const char* const op_name) {
 
 Status MlirAbstractOp::AddRef(Type type, Type* output_type) {
   Type elt_type = getElementTypeOrSelf(type);
-  if (elt_type.isa<mlir::TF::TensorFlowRefType>()) {
+  if (mlir::isa<mlir::TF::TensorFlowRefType>(elt_type)) {
     return InvalidArgument("Requested reference to a reference type");
   }
   elt_type = TensorFlowRefType::get(elt_type);
-  if (RankedTensorType tensor_type = type.dyn_cast<RankedTensorType>()) {
+  if (RankedTensorType tensor_type = mlir::dyn_cast<RankedTensorType>(type)) {
     *output_type = RankedTensorType::get(tensor_type.getShape(), elt_type);
   }
   *output_type = UnrankedTensorType::get(elt_type);
@@ -373,11 +373,11 @@ Status MlirAbstractOp::Create(ArrayRef<Value> operands,
         return InvalidArgument("Missing attribute '", output_arg.number_attr(),
                                "' required for output list '",
                                output_arg.name(), "'");
-      if (!repeats_attr.isa<IntegerAttr>())
+      if (!mlir::isa<IntegerAttr>(repeats_attr))
         return InvalidArgument("Attribute '", output_arg.number_attr(),
                                "' required for output list '",
                                output_arg.name(), "' isn't an integer");
-      int64_t repeats = repeats_attr.cast<IntegerAttr>().getInt();
+      int64_t repeats = mlir::cast<IntegerAttr>(repeats_attr).getInt();
 
       if (!output_arg.type_attr().empty()) {
         // Same type repeated "repeats" times.
@@ -386,7 +386,7 @@ Status MlirAbstractOp::Create(ArrayRef<Value> operands,
           return InvalidArgument("Missing attribute '", output_arg.type_attr(),
                                  "' required for output '", output_arg.name(),
                                  "'");
-        TypedAttr type_attr = attr.dyn_cast<TypedAttr>();
+        TypedAttr type_attr = mlir::dyn_cast<TypedAttr>(attr);
         if (!type_attr)
           return InvalidArgument("Attribute '", output_arg.type_attr(),
                                  "' required for output '", output_arg.name(),
@@ -410,7 +410,7 @@ Status MlirAbstractOp::Create(ArrayRef<Value> operands,
         return InvalidArgument("Missing attribute '", output_arg.type_attr(),
                                "' required for output '", output_arg.name(),
                                "'");
-      TypeAttr type_attr = attr.dyn_cast<TypeAttr>();
+      TypeAttr type_attr = mlir::dyn_cast<TypeAttr>(attr);
       if (!type_attr)
         return InvalidArgument("Attribute '", output_arg.type_attr(),
                                "' required for output '", output_arg.name(),
@@ -423,13 +423,13 @@ Status MlirAbstractOp::Create(ArrayRef<Value> operands,
         return InvalidArgument(
             "Missing attribute '", output_arg.type_list_attr(),
             "' required for output '", output_arg.name(), "'");
-      ArrayAttr array_attr = attr.dyn_cast<ArrayAttr>();
+      ArrayAttr array_attr = mlir::dyn_cast<ArrayAttr>(attr);
       if (!array_attr)
         return InvalidArgument("Attribute '", output_arg.type_list_attr(),
                                "' required for output '", output_arg.name(),
                                "' isn't an array attribute");
       for (Attribute attr : array_attr) {
-        TypeAttr type_attr = attr.dyn_cast<TypeAttr>();
+        TypeAttr type_attr = mlir::dyn_cast<TypeAttr>(attr);
         if (!type_attr)
           return InvalidArgument("Array Attribute '",
                                  output_arg.type_list_attr(),
diff --git a/tensorflow/compiler/mlir/tensorflow/ir/host_runtime/tfrt_ops.cc b/tensorflow/compiler/mlir/tensorflow/ir/host_runtime/tfrt_ops.cc
index dba58f17ccb029..9a1db50ff6b732 100644
--- a/tensorflow/compiler/mlir/tensorflow/ir/host_runtime/tfrt_ops.cc
+++ b/tensorflow/compiler/mlir/tensorflow/ir/host_runtime/tfrt_ops.cc
@@ -25,6 +25,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinAttributes.h"  // from @llvm-project
 #include "mlir/IR/TypeUtilities.h"  // from @llvm-project
 #include "mlir/IR/Value.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_op_interfaces.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_types.h"
@@ -45,11 +46,12 @@ _TfrtGetResourceOp::GetResourceHandleValueAndIdList(
 
   for (const auto &iter : llvm::enumerate(getResults())) {
     auto index = iter.index();
-    if (getElementTypeOrSelf(iter.value().getType()).isa<TF::ResourceType>()) {
+    if (mlir::isa<TF::ResourceType>(
+            getElementTypeOrSelf(iter.value().getType()))) {
       resource_vec.push_back(GetResourceHandleValueAndIdBase(
-          getContainer()[index].cast<mlir::StringAttr>().getValue(),
-          getSharedName()[index].cast<mlir::StringAttr>().getValue(), device,
-          getResults()[index], resource_handle_id_map, next_id));
+          mlir::cast<mlir::StringAttr>(getContainer()[index]).getValue(),
+          mlir::cast<mlir::StringAttr>(getSharedName()[index]).getValue(),
+          device, getResults()[index], resource_handle_id_map, next_id));
     }
   }
   return resource_vec;
@@ -100,16 +102,16 @@ mlir::LogicalResult IfrtCallOp::verify() {
   }
 
   for (mlir::Value arg : getArgs()) {
-    if (mlir::getElementTypeOrSelf(arg.getType())
-            .isa<mlir::TF::ResourceType>()) {
+    if (mlir::isa<mlir::TF::ResourceType>(
+            mlir::getElementTypeOrSelf(arg.getType()))) {
       return emitOpError()
              << "does not support passing '!tf.resource' values as arguments";
     }
   }
 
   for (mlir::Value result : getResults()) {
-    if (mlir::getElementTypeOrSelf(result.getType())
-            .isa<mlir::TF::ResourceType>()) {
+    if (mlir::isa<mlir::TF::ResourceType>(
+            mlir::getElementTypeOrSelf(result.getType()))) {
       return emitOpError()
              << "does not support returning '!tf.resource' values as results";
     }
@@ -118,12 +120,13 @@ mlir::LogicalResult IfrtCallOp::verify() {
   // Verify variable_arg_indices is sorted in ascending order.
   int64_t prev_index = -1;
   for (auto arg_index_attr : getVariableArgIndicesAttr()) {
-    if (!arg_index_attr.isa_and_nonnull<mlir::IntegerAttr>()) {
+    if (!mlir::isa_and_nonnull<mlir::IntegerAttr>(arg_index_attr)) {
       return emitOpError() << "variable_arg_indices must be an integer";
     }
 
-    int64_t index =
-        arg_index_attr.dyn_cast<mlir::IntegerAttr>().getValue().getSExtValue();
+    int64_t index = mlir::dyn_cast<mlir::IntegerAttr>(arg_index_attr)
+                        .getValue()
+                        .getSExtValue();
     if (index < 0) {
       return emitOpError() << "variable_arg_indices must be positive";
     }
diff --git a/tensorflow/compiler/mlir/tensorflow/ir/tf_arith_ops_folder.cc b/tensorflow/compiler/mlir/tensorflow/ir/tf_arith_ops_folder.cc
index f5284a0ef3cf96..9a78a1a83ae214 100644
--- a/tensorflow/compiler/mlir/tensorflow/ir/tf_arith_ops_folder.cc
+++ b/tensorflow/compiler/mlir/tensorflow/ir/tf_arith_ops_folder.cc
@@ -19,6 +19,7 @@ limitations under the License.
 #include "mlir/IR/Attributes.h"  // from @llvm-project
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/IR/Matchers.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_types.h"
 
 namespace mlir {
@@ -27,12 +28,12 @@ namespace TF {
 // Verifies an reduction op's `input` and reduction `dims`.
 LogicalResult VerifyReductionInputAndDims(Value input, Value dims,
                                           Location loc) {
-  auto dims_type = dims.getType().dyn_cast<RankedTensorType>();
+  auto dims_type = mlir::dyn_cast<RankedTensorType>(dims.getType());
   if (!dims_type) return success();
   if (dims_type.getRank() > 1)
     return emitError(loc, "dimensions can only be 0D or 1D tensor");
 
-  auto input_type = input.getType().dyn_cast<RankedTensorType>();
+  auto input_type = mlir::dyn_cast<RankedTensorType>(input.getType());
   if (!input_type) return success();
   int64_t rank = input_type.getRank();
 
diff --git a/tensorflow/compiler/mlir/tensorflow/ir/tf_arith_ops_folder.h b/tensorflow/compiler/mlir/tensorflow/ir/tf_arith_ops_folder.h
index aa0f84eb122e2b..64b5d2e141f13d 100644
--- a/tensorflow/compiler/mlir/tensorflow/ir/tf_arith_ops_folder.h
+++ b/tensorflow/compiler/mlir/tensorflow/ir/tf_arith_ops_folder.h
@@ -27,6 +27,7 @@ limitations under the License.
 #include "mlir/IR/OpDefinition.h"  // from @llvm-project
 #include "mlir/IR/TypeRange.h"  // from @llvm-project
 #include "mlir/IR/Value.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 
 namespace mlir {
 
@@ -60,10 +61,10 @@ template <
         OpT, AddV2Op, SubOp, MulOp, DivOp, RealDivOp>::value>::type * = nullptr>
 OpFoldResult IdentityArithmeticOpFolder(OpT arithmetic_op,
                                         ArrayRef<Attribute> operands) {
-  auto lhs_type = arithmetic_op.getX().getType().template cast<ShapedType>();
-  auto rhs_type = arithmetic_op.getY().getType().template cast<ShapedType>();
+  auto lhs_type = mlir::cast<ShapedType>(arithmetic_op.getX().getType());
+  auto rhs_type = mlir::cast<ShapedType>(arithmetic_op.getY().getType());
   auto result_type =
-      arithmetic_op.getResult().getType().template cast<ShapedType>();
+      mlir::cast<ShapedType>(arithmetic_op.getResult().getType());
 
   // We can fold arithmetic operation only of we can prove that we will not
   // accidentally hide a broadcasting error.
@@ -86,8 +87,8 @@ OpFoldResult IdentityArithmeticOpFolder(OpT arithmetic_op,
   // Check that we have a constant operand on one side (candidate for identity).
   const bool is_commutative =
       (std::is_same<OpT, AddV2Op>::value || std::is_same<OpT, MulOp>::value);
-  auto lhs_attr = operands[0].dyn_cast_or_null<DenseElementsAttr>();
-  auto rhs_attr = operands[1].dyn_cast_or_null<DenseElementsAttr>();
+  auto lhs_attr = mlir::dyn_cast_or_null<DenseElementsAttr>(operands[0]);
+  auto rhs_attr = mlir::dyn_cast_or_null<DenseElementsAttr>(operands[1]);
   if (!rhs_attr && !(is_commutative && lhs_attr)) return {};
 
   // Mul and Div ops have identity value one while AddV2 and SubOp have identity
@@ -100,9 +101,9 @@ OpFoldResult IdentityArithmeticOpFolder(OpT arithmetic_op,
 
   Type element_ty = lhs_type.getElementType();
   Attribute identity_attr;
-  if (auto ty = element_ty.template dyn_cast<FloatType>()) {
+  if (auto ty = mlir::dyn_cast<FloatType>(element_ty)) {
     identity_attr = FloatAttr::get(ty, static_cast<double>(identity));
-  } else if (auto ty = element_ty.template dyn_cast<IntegerType>()) {
+  } else if (auto ty = mlir::dyn_cast<IntegerType>(element_ty)) {
     identity_attr = IntegerAttr::get(ty, static_cast<int64_t>(identity));
   } else {
     return {};
diff --git a/tensorflow/compiler/mlir/tensorflow/ir/tf_device.cc b/tensorflow/compiler/mlir/tensorflow/ir/tf_device.cc
index 5d145c85a68a06..df887ce453b8ea 100644
--- a/tensorflow/compiler/mlir/tensorflow/ir/tf_device.cc
+++ b/tensorflow/compiler/mlir/tensorflow/ir/tf_device.cc
@@ -99,7 +99,8 @@ struct TFInlinerInterface : public DialectInlinerInterface {
   Operation* materializeCallConversion(OpBuilder& builder, Value input,
                                        Type result_type,
                                        Location conversion_loc) const final {
-    if (!result_type.isa<TensorType>() || !input.getType().isa<TensorType>())
+    if (!mlir::isa<TensorType>(result_type) ||
+        !mlir::isa<TensorType>(input.getType()))
       return nullptr;
     return builder.create<TF::CastOp>(conversion_loc, result_type, input,
                                       /*truncate=*/builder.getBoolAttr(false));
@@ -307,7 +308,7 @@ ParseResult SetReplicateOpOperands(
     llvm::ArrayRef<Type> region_arg_types, int32_t* n) {
   for (const auto& attr : state->attributes)
     if (attr.getName().strref() == "n")
-      if (auto n_attr = attr.getValue().dyn_cast<IntegerAttr>())
+      if (auto n_attr = mlir::dyn_cast<IntegerAttr>(attr.getValue()))
         *n = n_attr.getInt();
 
   if (*n < 2)
@@ -507,13 +508,14 @@ LogicalResult ReplicateOp::verify() {
   // Check number of devices, if set, matches `n`.
   if (op.getDevices().has_value()) {
     for (auto device_attr : op.getDevices().value().getValue()) {
-      auto device_list = device_attr.getValue().dyn_cast_or_null<ArrayAttr>();
+      auto device_list =
+          mlir::dyn_cast_or_null<ArrayAttr>(device_attr.getValue());
       if (!device_list)
         return op.emitError()
                << "expects 'devices' to be a map alias and device name list.";
 
       bool is_device_string = llvm::all_of(device_list, [](Attribute attr) {
-        return attr.dyn_cast_or_null<StringAttr>();
+        return mlir::dyn_cast_or_null<StringAttr>(attr);
       });
       if (!is_device_string)
         return op.emitOpError() << "expects 'devices' to be a consists of "
@@ -747,8 +749,8 @@ static LogicalResult EliminatePassThroughResults(ClusterOp op,
     // Old bridge only removes unsupported TPU types (only string for now)
     // during outside compilation extraction so this should be enough for
     // the parity.
-    bool is_unsupported_type = getElementTypeOrSelf(operand.get().getType())
-                                   .isa<mlir::TF::StringType>();
+    bool is_unsupported_type = mlir::isa<mlir::TF::StringType>(
+        getElementTypeOrSelf(operand.get().getType()));
     Value result = operand.get();
     if (is_unsupported_type && result.getParentBlock() != &body &&
         !is_used_for_resource_write) {
diff --git a/tensorflow/compiler/mlir/tensorflow/ir/tf_executor.cc b/tensorflow/compiler/mlir/tensorflow/ir/tf_executor.cc
index f7c35420c22b4a..f48e1570933cf9 100644
--- a/tensorflow/compiler/mlir/tensorflow/ir/tf_executor.cc
+++ b/tensorflow/compiler/mlir/tensorflow/ir/tf_executor.cc
@@ -40,6 +40,7 @@ limitations under the License.
 #include "mlir/IR/PatternMatch.h"  // from @llvm-project
 #include "mlir/IR/Types.h"  // from @llvm-project
 #include "mlir/IR/Value.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Transforms/FoldUtils.h"  // from @llvm-project
 #include "mlir/Transforms/InliningUtils.h"  // from @llvm-project
@@ -119,11 +120,11 @@ Type TensorFlowExecutorDialect::parseType(DialectAsmParser &parser) const {
 
 void TensorFlowExecutorDialect::printType(Type type,
                                           DialectAsmPrinter &os) const {
-  if (type.isa<ControlType>()) {
+  if (mlir::isa<ControlType>(type)) {
     os << "control";
     return;
   }
-  if (type.isa<TokenType>()) {
+  if (mlir::isa<TokenType>(type)) {
     os << "token";
     return;
   }
@@ -141,7 +142,7 @@ namespace {
 LogicalResult VerifyControlOperandsAfterAllData(Operation *op) {
   bool found_control = false;
   for (int operand_idx : llvm::seq<int>(0, op->getNumOperands())) {
-    if (op->getOperand(operand_idx).getType().isa<ControlType>()) {
+    if (mlir::isa<ControlType>(op->getOperand(operand_idx).getType())) {
       found_control = true;
       continue;
     }
@@ -192,7 +193,7 @@ LogicalResult GraphOp::verify() {
     Value operand = fetch.getOperand(i);
     // Break out of the loop at the first control operand encountered.
     const int64_t num_results = graph.getNumResults();
-    if (operand.getType().isa<ControlType>()) {
+    if (mlir::isa<ControlType>(operand.getType())) {
       if (i != num_results)
         return fetch.emitOpError()
                << "operand #" << i
@@ -241,7 +242,7 @@ ParseResult GraphOp::parse(OpAsmParser &parser, OperationState &result) {
   // the fetch operation.
   result.types.reserve(fetch.getNumOperands());
   for (Type type : fetch.getOperandTypes()) {
-    if (type.isa<ControlType>()) break;
+    if (mlir::isa<ControlType>(type)) break;
     result.types.push_back(type);
   }
 
@@ -403,8 +404,8 @@ ParseResult SwitchOp::parse(OpAsmParser &parser, OperationState &result) {
   // fully qualified) or a short form with a single type (in which case the data
   // input and the outputs are all using this type and predicate is tensor<i1>
   // type).
-  if (types.front().isa<FunctionType>()) {
-    FunctionType type = types.front().cast<FunctionType>();
+  if (mlir::isa<FunctionType>(types.front())) {
+    FunctionType type = mlir::cast<FunctionType>(types.front());
     if (type.getNumInputs() < 2)
       return parser.emitError(parser.getNameLoc())
              << " expects a single data type and a predicate";
@@ -439,7 +440,7 @@ void SwitchOp::print(OpAsmPrinter &p) {
   p << " : ";
   if (getTrueOutput().getType() != data_operand_ty ||
       getFalseOutput().getType() != data_operand_ty ||
-      getPredicate().getType().isa<UnrankedTensorType>()) {
+      mlir::isa<UnrankedTensorType>(getPredicate().getType())) {
     p.printFunctionalType(getOperation());
   } else {
     p << getType(0);
@@ -465,16 +466,16 @@ LogicalResult SwitchNOp::verify() {
 
   // Check that operand can be broadcasted to each output type.
   auto operand0_type = switchn.getOperand(0).getType();
-  TensorType operand0_tensor_type = operand0_type.dyn_cast<TensorType>();
+  TensorType operand0_tensor_type = mlir::dyn_cast<TensorType>(operand0_type);
   if (!operand0_tensor_type) {
     return switchn.emitOpError()
            << "expects data operand to have tensor type but got "
            << operand0_type;
   }
   for (Type output_type : switchn.getResultTypes()) {
-    if (output_type.isa<ControlType>()) break;
+    if (mlir::isa<ControlType>(output_type)) break;
 
-    TensorType output_tensor_type = output_type.dyn_cast<TensorType>();
+    TensorType output_tensor_type = mlir::dyn_cast<TensorType>(output_type);
     if (!output_tensor_type) {
       return switchn.emitOpError()
              << "expects outputs to have tensor type but got " << output_type;
@@ -483,10 +484,10 @@ LogicalResult SwitchNOp::verify() {
     // If the output type is a ref type, then the operand type should also be of
     // the same ref type. However, if the output type is a non-ref type T, then
     // the operand can be tensor of type T or T_REF.
-    bool is_output_ref =
-        output_tensor_type.getElementType().isa<tf_type::TensorFlowRefType>();
-    if (is_output_ref && !operand0_tensor_type.getElementType()
-                              .isa<tf_type::TensorFlowRefType>()) {
+    bool is_output_ref = mlir::isa<tf_type::TensorFlowRefType>(
+        output_tensor_type.getElementType());
+    if (is_output_ref && !mlir::isa<tf_type::TensorFlowRefType>(
+                             operand0_tensor_type.getElementType())) {
       return switchn.emitOpError()
              << "expects same operand and output element type but got "
              << operand0_tensor_type << " vs " << output_tensor_type;
@@ -573,24 +574,24 @@ LogicalResult MergeOp::verify() {
     return merge.emitOpError() << "expects at least one operand";
 
   Type data_type = merge.getOperand(0).getType();
-  if (data_type.isa<ControlType>())
+  if (mlir::isa<ControlType>(data_type))
     return merge.emitOpError() << "expects a non-control input";
 
   // Check that each operand can be individually broadcasted to the output type.
   Type output_type = merge.getOutput().getType();
-  TensorType output_tensor_ty = output_type.dyn_cast<TensorType>();
+  TensorType output_tensor_ty = mlir::dyn_cast<TensorType>(output_type);
   if (!output_tensor_ty) {
     return merge.emitOpError()
            << "expects output to have tensor type but got " << output_type;
   }
   bool is_output_ref =
-      output_tensor_ty.getElementType().isa<tf_type::TensorFlowRefType>();
+      mlir::isa<tf_type::TensorFlowRefType>(output_tensor_ty.getElementType());
   for (Type operand_type : merge.getOperandTypes()) {
-    if (operand_type.isa<ControlType>()) break;
+    if (mlir::isa<ControlType>(operand_type)) break;
 
     // TODO(hinsu): Update ControlOperandsAfterAllData trait to verify this
     // constraint.
-    TensorType operand_tensor_ty = operand_type.dyn_cast<TensorType>();
+    TensorType operand_tensor_ty = mlir::dyn_cast<TensorType>(operand_type);
     if (!operand_tensor_ty)
       return merge.emitOpError()
              << "expects data operands to have tensor type but got "
@@ -599,8 +600,8 @@ LogicalResult MergeOp::verify() {
     // If output type is a ref type then all operand types should also be of the
     // same ref type. However, if the output type is a non-ref type T, operands
     // can be tensor of type T or T_REF.
-    if (is_output_ref &&
-        !operand_tensor_ty.getElementType().isa<tf_type::TensorFlowRefType>()) {
+    if (is_output_ref && !mlir::isa<tf_type::TensorFlowRefType>(
+                             operand_tensor_ty.getElementType())) {
       return merge.emitOpError()
              << "expects same operand and output element type but got "
              << operand_tensor_ty << " vs " << output_tensor_ty;
@@ -624,7 +625,7 @@ void MergeOp::print(OpAsmPrinter &p) {
 
   Type output_type = getOutput().getType();
   for (Type operand_type : getOperandTypes()) {
-    if (operand_type.isa<ControlType>()) break;
+    if (mlir::isa<ControlType>(operand_type)) break;
     num_data_operands++;
 
     if (operand_type != output_type) {
@@ -660,7 +661,7 @@ ParseResult MergeOp::parse(OpAsmParser &parser, OperationState &result) {
   // Support parsing either a functional type (in which case all the types are
   // fully qualified) or a short form with a single type (in which case the data
   // inputs and the output are all using this type).
-  if (FunctionType type = types.front().dyn_cast<FunctionType>()) {
+  if (FunctionType type = mlir::dyn_cast<FunctionType>(types.front())) {
     result.types.assign(type.getResults().begin(), type.getResults().end());
     types.assign(type.getInputs().begin(), type.getInputs().end());
   } else {
@@ -747,7 +748,7 @@ ParseResult EnterOp::parse(OpAsmParser &parser, OperationState &result) {
   // Support parsing either a functional type (in which case all the types are
   // fully qualified) or a short form with a single type (in which case the data
   // input and the outputs are all using this type).
-  if (FunctionType type = types.front().dyn_cast<FunctionType>()) {
+  if (FunctionType type = mlir::dyn_cast<FunctionType>(types.front())) {
     // One data input, and any number of control inputs.
     if (type.getNumInputs() >= 1) {
       result.types.assign(type.getResults().begin(), type.getResults().end());
@@ -876,7 +877,7 @@ ParseResult LoopCondOp::parse(OpAsmParser &parser, OperationState &result) {
   // fully qualified) or a short form with a single type (in which case the data
   // input and the outputs are all using this type).
   Type control_type = ControlType::get(parser.getBuilder().getContext());
-  if (FunctionType type = types.front().dyn_cast<FunctionType>()) {
+  if (FunctionType type = mlir::dyn_cast<FunctionType>(types.front())) {
     if (llvm::count_if(type.getInputs(),
                        [=](Type type) { return type != control_type; }) != 1)
       return parser.emitError(parser.getNameLoc())
@@ -959,14 +960,14 @@ struct HoistInnerOpsSingleIslandGraph : public OpRewritePattern<GraphOp> {
     llvm::SmallVector<Value, 8> new_rets;
     for (Value operand : fetch_op.getFetches()) {
       // Control results should not be propagated out.
-      if (operand.getType().isa<ControlType>()) break;
+      if (mlir::isa<ControlType>(operand.getType())) break;
 
       if (operand.getDefiningOp() != island_op) {
         // Operand is not from island, simply propagate it out.
         new_rets.push_back(operand);
       } else {
         // Lookup yield operand in island for inner op result.
-        auto result = operand.cast<OpResult>();
+        auto result = mlir::cast<OpResult>(operand);
         new_rets.push_back(yield_op.getOperand(result.getResultNumber()));
       }
     }
diff --git a/tensorflow/compiler/mlir/tensorflow/ir/tf_ops.cc b/tensorflow/compiler/mlir/tensorflow/ir/tf_ops.cc
index d3026b02878741..373586ae837a3f 100644
--- a/tensorflow/compiler/mlir/tensorflow/ir/tf_ops.cc
+++ b/tensorflow/compiler/mlir/tensorflow/ir/tf_ops.cc
@@ -191,7 +191,8 @@ struct TFInlinerInterface : public DialectInlinerInterface {
   Operation *materializeCallConversion(OpBuilder &builder, Value input,
                                        Type result_type,
                                        Location conversion_loc) const final {
-    if (!result_type.isa<TensorType>() || !input.getType().isa<TensorType>())
+    if (!mlir::isa<TensorType>(result_type) ||
+        !mlir::isa<TensorType>(input.getType()))
       return nullptr;
     return builder.create<TF::CastOp>(conversion_loc, result_type, input,
                                       /*truncate=*/builder.getBoolAttr(false));
diff --git a/tensorflow/compiler/mlir/tensorflow/ir/tf_ops_a_m.cc b/tensorflow/compiler/mlir/tensorflow/ir/tf_ops_a_m.cc
index 988c749adb8cc6..36fb36a3d451c6 100644
--- a/tensorflow/compiler/mlir/tensorflow/ir/tf_ops_a_m.cc
+++ b/tensorflow/compiler/mlir/tensorflow/ir/tf_ops_a_m.cc
@@ -160,12 +160,12 @@ OpFoldResult AddNOp::fold(FoldAdaptor adaptor) {
   int non_zero_index = -1;
   auto IsKnownZero = [](Attribute attr) {
     if (!attr) return false;
-    auto splat = attr.dyn_cast<SplatElementsAttr>();
+    auto splat = mlir::dyn_cast<SplatElementsAttr>(attr);
     if (!splat) return false;
     Type element_ty = splat.getType().getElementType();
-    if (element_ty.isa<FloatType>())
+    if (mlir::isa<FloatType>(element_ty))
       return splat.getSplatValue<llvm::APFloat>().isZero();
-    if (element_ty.isa<IntegerType>())
+    if (mlir::isa<IntegerType>(element_ty))
       return splat.getSplatValue<llvm::APInt>().getSExtValue() == 0;
     return false;
   };
@@ -180,13 +180,13 @@ OpFoldResult AddNOp::fold(FoldAdaptor adaptor) {
   }
 
   // Only fold when the result shape is fully static.
-  auto result_ty = getType().dyn_cast<ShapedType>();
+  auto result_ty = mlir::dyn_cast<ShapedType>(getType());
   if (!result_ty || !result_ty.hasStaticShape()) return {};
 
   if (non_zero_index == -1) {
     return SplatElementsAttr::get(
-        result_ty,
-        operands.begin()->cast<DenseElementsAttr>().getSplatValue<Attribute>());
+        result_ty, mlir::cast<DenseElementsAttr>(*operands.begin())
+                       .getSplatValue<Attribute>());
   }
 
   // Check the non-zero operand's shape matches the result shape.
@@ -423,7 +423,7 @@ LogicalResult BatchToSpaceOp::verify() {
   int64_t block_size = op.getBlockSize();
 
   llvm::SmallVector<int64_t, 4> input_shape(4, ShapedType::kDynamic);
-  auto input_type = op.getInput().getType().cast<TensorType>();
+  auto input_type = mlir::cast<TensorType>(op.getInput().getType());
   if (input_type.hasRank()) {
     if (input_type.getRank() != 4)
       return op.emitOpError()
@@ -442,7 +442,7 @@ LogicalResult BatchToSpaceOp::verify() {
                        input_type.getShape().end());
   }
 
-  auto crops_type = op.getCrops().getType().cast<TensorType>();
+  auto crops_type = mlir::cast<TensorType>(op.getCrops().getType());
   if (crops_type.hasRank()) {
     if (crops_type.getRank() != 2)
       return op.emitOpError()
@@ -477,7 +477,7 @@ LogicalResult BatchToSpaceOp::verify() {
     }
   }
 
-  auto output_type = op.getOutput().getType().cast<TensorType>();
+  auto output_type = mlir::cast<TensorType>(op.getOutput().getType());
   if (output_type.hasRank()) {
     if (output_type.getRank() != 4)
       return op.emitOpError()
@@ -567,8 +567,8 @@ void BatchToSpaceOp::getCanonicalizationPatterns(RewritePatternSet& results,
 
 LogicalResult BatchToSpaceNDOp::verify() {
   BatchToSpaceNDOp op = *this;
-  auto block_shape_ty = op.getBlockShape().getType().cast<ShapedType>();
-  auto crops_ty = op.getCrops().getType().cast<ShapedType>();
+  auto block_shape_ty = mlir::cast<ShapedType>(op.getBlockShape().getType());
+  auto crops_ty = mlir::cast<ShapedType>(op.getCrops().getType());
 
   if (block_shape_ty.hasStaticShape() && crops_ty.hasStaticShape()) {
     const int block_rank = block_shape_ty.getShape().front();
@@ -617,9 +617,9 @@ LogicalResult BiasAddOp::verify() {
     return op.emitOpError("requires bias operand to have rank exactly one");
 
   RankedTensorType value_ty =
-      op.getValue().getType().dyn_cast<RankedTensorType>();
+      mlir::dyn_cast<RankedTensorType>(op.getValue().getType());
   RankedTensorType bias_ty =
-      op.getBias().getType().dyn_cast<RankedTensorType>();
+      mlir::dyn_cast<RankedTensorType>(op.getBias().getType());
   if (!bias_ty || !value_ty) return success();
 
   int64_t feature_dim_idx =
@@ -716,7 +716,7 @@ OpFoldResult BroadcastToOp::fold(FoldAdaptor) {
 
   // Fold broadcast if operand and result types are the same and all dimensions
   // are statically known (no-op broadcast).
-  auto result_ty = getType().dyn_cast<ShapedType>();
+  auto result_ty = mlir::dyn_cast<ShapedType>(getType());
   if (!result_ty || !result_ty.hasStaticShape()) return {};
 
   if (result_ty == input.getType()) return input;
@@ -818,8 +818,8 @@ LogicalResult BroadcastGradientArgsOp::verify() {
 
   // Verify that output types are of rank one and matches the computed result
   // shape.
-  auto r0_ty = op.getR0().getType().dyn_cast<RankedTensorType>();
-  auto r1_ty = op.getR1().getType().dyn_cast<RankedTensorType>();
+  auto r0_ty = mlir::dyn_cast<RankedTensorType>(op.getR0().getType());
+  auto r1_ty = mlir::dyn_cast<RankedTensorType>(op.getR1().getType());
   if (r0_ty && r0_ty.hasStaticShape() && r0_ty.getDimSize(0) != r0.size())
     return op.emitOpError() << "requires dimension 0 size of 'r0' to be "
                             << r0.size() << " but got " << r0_ty.getShape()[0];
@@ -852,7 +852,8 @@ LogicalResult BroadcastGradientArgsOp::fold(
 
   auto build_out_dense_element = [](SmallVectorImpl<int64_t>& shape,
                                     Type input_type) {
-    Type element_type = input_type.cast<mlir::TensorType>().getElementType();
+    Type element_type =
+        mlir::cast<mlir::TensorType>(input_type).getElementType();
     RankedTensorType type = tensorflow::GetTypeFromTFTensorShape(
         {static_cast<int64_t>(shape.size())}, element_type);
     // Input could only be i32 or i64. For i32, downcast to int32_t array.
@@ -893,7 +894,7 @@ LogicalResult FoldConstantCaseOp::matchAndRewrite(
   int index = *branch.getValues<int>().begin();
   if (index < 0 || index >= op.num_branches()) index = op.num_branches() - 1;
 
-  auto func = op.getBranches()[index].cast<SymbolRefAttr>();
+  auto func = mlir::cast<SymbolRefAttr>(op.getBranches()[index]);
   auto empty = rewriter.getStringAttr("");
   ReplaceTfOpWithNewOp<PartitionedCallOp>(
       rewriter, op, op.getResultTypes(), op.getOperands().drop_front(), func,
@@ -932,7 +933,7 @@ static LogicalResult VerifyCaseOrIfOpBranchFunctions(
 
   for (const auto& branch : llvm::enumerate(branches)) {
     auto branch_func = symbol_table.lookupNearestSymbolFrom<func::FuncOp>(
-        op, branch.value().cast<SymbolRefAttr>());
+        op, mlir::cast<SymbolRefAttr>(branch.value()));
     if (!branch_func)
       return op->emitOpError()
              << "expects " << branch_name(branch.index()) << " ("
@@ -1347,12 +1348,10 @@ LogicalResult HoistCwiseBinaryOutOfConcat::matchAndRewrite(
     else
       return failure();
     DenseElementsAttr const_attr;
-    auto scalar_tensor_type =
-        first_arg_op->getOperand(hoist_params->scalar_operand_idx)
-            .getType()
-            .dyn_cast<ShapedType>();
+    auto scalar_tensor_type = mlir::dyn_cast<ShapedType>(
+        first_arg_op->getOperand(hoist_params->scalar_operand_idx).getType());
     Type scalar_dtype = scalar_tensor_type.getElementType();
-    if (scalar_dtype.isa<FloatType>())
+    if (mlir::isa<FloatType>(scalar_dtype))
       const_attr = DenseElementsAttr::get(scalar_tensor_type,
                                           static_cast<float>(identity_val));
     else
@@ -1450,7 +1449,7 @@ HoistCwiseBinaryOutOfConcat::GetHoistParams(
       } else {
         operand = arg.getDefiningOp()->getOperand(operand_idx);
       }
-      auto ranked = operand.getType().dyn_cast<RankedTensorType>();
+      auto ranked = mlir::dyn_cast<RankedTensorType>(operand.getType());
       return ranked && ranked.getRank() == (axis + 1) &&
              ranked.getShape()[axis] == 1;
     });
@@ -1461,13 +1460,13 @@ HoistCwiseBinaryOutOfConcat::GetHoistParams(
     return llvm::all_of(op.getValues(), [&](Value arg) -> bool {
       if (exceptions.count(arg)) return true;
       auto operand = arg.getDefiningOp()->getOperand(operand_idx);
-      auto ranked = operand.getType().dyn_cast<RankedTensorType>();
+      auto ranked = mlir::dyn_cast<RankedTensorType>(operand.getType());
       return ranked && ranked.hasRank() && ranked.getRank() == 0;
     });
   };
 
   // Concat result type must be a ranked tensor.
-  auto ranked = op.getType().dyn_cast<RankedTensorType>();
+  auto ranked = mlir::dyn_cast<RankedTensorType>(op.getType());
   if (!ranked) return std::nullopt;
 
   // TODO(ezhulenev): Add support for more valid concat patterns.
@@ -1527,7 +1526,7 @@ static LogicalResult Verify(OpT op) {
 
   DenseIntElementsAttr axis_attr;
   if (matchPattern(op.getAxis(), m_Constant(&axis_attr))) {
-    auto input_ty = op.getX().getType().template dyn_cast<RankedTensorType>();
+    auto input_ty = mlir::dyn_cast<RankedTensorType>(op.getX().getType());
     if (input_ty) {
       int64_t rank = input_ty.getRank();
       assert(axis_attr.getNumElements() == 1 &&
@@ -1561,7 +1560,8 @@ LogicalResult ConcatOffsetOp::verify() {
            << "requires sizes of shapes and offsets to be the same, got sizes "
            << op.getShape().size() << " and " << op.getOffset().size();
 
-  auto ranked_dim = op.getConcatDim().getType().dyn_cast<RankedTensorType>();
+  auto ranked_dim =
+      mlir::dyn_cast<RankedTensorType>(op.getConcatDim().getType());
   if (ranked_dim && ranked_dim.getRank() != 0)
     return op.emitOpError()
            << "requires concat_dim to be a scalar, got tensor of rank "
@@ -1578,7 +1578,7 @@ LogicalResult ConcatOffsetOp::verify() {
       return op.emitOpError() << "requires operand and result " << idx
                               << " to have compatible shapes";
 
-    auto ranked_shape = shape.getType().dyn_cast<RankedTensorType>();
+    auto ranked_shape = mlir::dyn_cast<RankedTensorType>(shape.getType());
     if (!ranked_shape) continue;
 
     if (ranked_shape.getRank() != 1)
@@ -1609,14 +1609,15 @@ LogicalResult ConcatOffsetOp::fold(FoldAdaptor adaptor,
   if (operands.size() < 3) return failure();
 
   // Check concat_dim is a scalar.
-  auto concat_dim_attr = operands[0].dyn_cast_or_null<DenseIntElementsAttr>();
+  auto concat_dim_attr =
+      mlir::dyn_cast_or_null<DenseIntElementsAttr>(operands[0]);
   if (!concat_dim_attr || concat_dim_attr.getType().getRank() != 0)
     return failure();
 
   llvm::SmallVector<DenseIntElementsAttr, 4> shapes;
   shapes.reserve(operands.size() - 1);
   for (Attribute shape : llvm::drop_begin(operands, 1))
-    if (auto shape_attr = shape.dyn_cast_or_null<DenseIntElementsAttr>())
+    if (auto shape_attr = mlir::dyn_cast_or_null<DenseIntElementsAttr>(shape))
       shapes.push_back(shape_attr);
     else
       return failure();
@@ -1685,14 +1686,14 @@ OpFoldResult ConstOp::fold(FoldAdaptor adaptor) {
 void ConstOp::build(OpBuilder& builder, OperationState& result,
                     Attribute value) {
   ShapedType type;
-  if (auto elem_attr = value.dyn_cast<ElementsAttr>()) {
+  if (auto elem_attr = mlir::dyn_cast<ElementsAttr>(value)) {
     return ConstOp::build(builder, result, elem_attr);
-  } else if (value.isa<BoolAttr, FloatAttr, IntegerAttr>()) {
+  } else if (mlir::isa<BoolAttr, FloatAttr, IntegerAttr>(value)) {
     // All TensorFlow types must be tensor types. In the build() method,
     // we want to provide more flexibility by allowing attributes of scalar
     // types. But we need to wrap it up with ElementsAttr to construct
     // valid TensorFlow constants.
-    auto typed_attr = value.cast<TypedAttr>();
+    auto typed_attr = mlir::cast<TypedAttr>(value);
     type = tensorflow::GetTypeFromTFTensorShape(/*shape=*/{},
                                                 typed_attr.getType());
     return ConstOp::build(builder, result, DenseElementsAttr::get(type, value));
@@ -1704,7 +1705,7 @@ void ConstOp::build(OpBuilder& builder, OperationState& result,
 void ConstOp::build(OpBuilder& builder, OperationState& result, Type type,
                     Attribute value) {
   // Handle the case where the type and value are already tensors.
-  if (type.isa<TensorType>() && value.isa<ElementsAttr>()) {
+  if (mlir::isa<TensorType>(type) && mlir::isa<ElementsAttr>(value)) {
     result.addTypes(type);
     result.addAttribute("value", value);
     return;
@@ -1722,7 +1723,7 @@ LogicalResult ConstOp::inferReturnTypes(
   ConstOpAdaptor adaptor(operands, attributes, properties, regions);
   auto value = adaptor.getValue();
   if (!value) return emitOptionalError(location, "missing attribute 'value'");
-  if (auto elem_attr = value.dyn_cast<ElementsAttr>()) {
+  if (auto elem_attr = mlir::dyn_cast<ElementsAttr>(value)) {
     inferredReturnTypes.assign({elem_attr.getType()});
     return success();
   }
@@ -1743,7 +1744,7 @@ static LogicalResult VerifyConvOpAttributes(
     return emitOptionalError(
         location, "requires strides attribute length to be ", num_dims);
   auto is_not_positive = [](Attribute val) {
-    return val.cast<IntegerAttr>().getValue().getSExtValue() <= 0;
+    return mlir::cast<IntegerAttr>(val).getValue().getSExtValue() <= 0;
   };
   if (llvm::any_of(strides, is_not_positive))
     return emitOptionalError(location, "requires positive strides");
@@ -1793,9 +1794,8 @@ static LogicalResult Verify(OpT op) {
 
   if (padding == tensorflow::Padding::EXPLICIT) {
     ArrayRef<Attribute> explicit_padding;
-    ArrayAttr explicit_pad =
-        op->getAttr("explicit_paddings")
-            .template dyn_cast_or_null<::mlir::ArrayAttr>();
+    ArrayAttr explicit_pad = mlir::dyn_cast_or_null<::mlir::ArrayAttr>(
+        op->getAttr("explicit_paddings"));
     if (!explicit_pad) {
       explicit_pad = ::mlir::Builder(op->getContext()).getI64ArrayAttr({});
     }
@@ -1812,7 +1812,7 @@ static LogicalResult Verify(OpT op) {
           num_dims * 2);
     }
     auto is_negative = [](Attribute val) {
-      return val.cast<IntegerAttr>().getValue().getSExtValue() < 0;
+      return mlir::cast<IntegerAttr>(val).getValue().getSExtValue() < 0;
     };
     if (llvm::any_of(explicit_padding, is_negative))
       return emitOptionalError(op.getLoc(),
@@ -1827,7 +1827,7 @@ static LogicalResult Verify(OpT op) {
   }
 
   int64_t input_channels = ShapedType::kDynamic;
-  if (auto ty = op.getInput().getType().template dyn_cast<RankedTensorType>()) {
+  if (auto ty = mlir::dyn_cast<RankedTensorType>(op.getInput().getType())) {
     absl::string_view data_format(op.getDataFormat().data(),
                                   op.getDataFormat().size());
     tensorflow::TensorFormat format;
@@ -1838,8 +1838,7 @@ static LogicalResult Verify(OpT op) {
   }
 
   int64_t filter_channels = ShapedType::kDynamic;
-  if (auto ty =
-          op.getFilter().getType().template dyn_cast<RankedTensorType>()) {
+  if (auto ty = mlir::dyn_cast<RankedTensorType>(op.getFilter().getType())) {
     int idx = tensorflow::GetFilterTensorInputChannelsDimIndex(
         num_dims, tensorflow::FORMAT_HWIO);
     filter_channels = ty.getDimSize(idx);
@@ -1891,8 +1890,8 @@ static LogicalResult inferConvReturnTypeComponents(
   const int64_t num_dims = 2 + num_spatial_dims;
   const Value input = op.getInput();
   const Value filter = op.getFilter();
-  const TensorType input_ty = input.getType().template cast<TensorType>();
-  const TensorType filter_ty = filter.getType().template cast<TensorType>();
+  const TensorType input_ty = mlir::cast<TensorType>(input.getType());
+  const TensorType filter_ty = mlir::cast<TensorType>(filter.getType());
 
   ArrayRef<Attribute> strides = op.getStrides().getValue();
   StringRef data_format = op.getDataFormat();
@@ -1910,7 +1909,7 @@ static LogicalResult inferConvReturnTypeComponents(
   (void)padding_is_valid;
 
   auto get_int = [](Attribute attr) {
-    return attr.template cast<IntegerAttr>().getInt();
+    return mlir::cast<IntegerAttr>(attr).getInt();
   };
 
   // Output always have `num_dims` rank. All dimensions are initialized to
@@ -1967,7 +1966,7 @@ LogicalResult Conv2DOp::inferReturnTypeComponents(
   Conv2DOpAdaptor op(operands.getValues(), attributes, properties, regions);
   ArrayRef<Attribute> explicit_padding;
   ArrayAttr explicit_pad =
-      op.getExplicitPaddings().dyn_cast_or_null<::mlir::ArrayAttr>();
+      mlir::dyn_cast_or_null<::mlir::ArrayAttr>(op.getExplicitPaddings());
   if (!explicit_pad) {
     explicit_pad = ::mlir::Builder(context).getI64ArrayAttr({});
   }
@@ -1984,7 +1983,7 @@ StringRef Conv2DOp::GetOptimalLayout(const RuntimeDevices& devices) {
     return getDataFormat();
 
   // Input must be a tensor.
-  auto input_ty = getInput().getType().dyn_cast<TensorType>();
+  auto input_ty = mlir::dyn_cast<TensorType>(getInput().getType());
   if (!input_ty) return getDataFormat();
 
   // For f16 data type on devices with Tensor Cores support NHWC data format
@@ -1998,7 +1997,7 @@ StringRef Conv2DOp::GetOptimalLayout(const RuntimeDevices& devices) {
     return getDataFormat();
 
   // Keep current data format if filter rank is unknown or not equal to 4.
-  auto filter_ty = getFilter().getType().dyn_cast<RankedTensorType>();
+  auto filter_ty = mlir::dyn_cast<RankedTensorType>(getFilter().getType());
   if (!filter_ty || filter_ty.getRank() != 4) return getDataFormat();
 
   const int64_t d0 = filter_ty.getDimSize(0);
@@ -2006,7 +2005,7 @@ StringRef Conv2DOp::GetOptimalLayout(const RuntimeDevices& devices) {
 
   auto all_ones = [](ArrayAttr arr) -> bool {
     return llvm::all_of(arr, [](Attribute attr) -> bool {
-      return attr.cast<IntegerAttr>().getInt() == 1;
+      return mlir::cast<IntegerAttr>(attr).getInt() == 1;
     });
   };
 
@@ -2068,7 +2067,7 @@ StringRef Conv2DBackpropFilterOp::GetOptimalLayout(
     return getDataFormat();
 
   // Input must be a tensor.
-  auto input_ty = getInput().getType().dyn_cast<TensorType>();
+  auto input_ty = mlir::dyn_cast<TensorType>(getInput().getType());
   if (!input_ty) return getDataFormat();
 
   // For f16 data type on devices with Tensor Cores support NHWC data format
@@ -2142,7 +2141,7 @@ StringRef Conv2DBackpropInputOp::GetOptimalLayout(
     return getDataFormat();
 
   // Filter must be a tensor.
-  auto filter_ty = getFilter().getType().dyn_cast<TensorType>();
+  auto filter_ty = mlir::dyn_cast<TensorType>(getFilter().getType());
   if (!filter_ty) return getDataFormat();
 
   // For f16 data type on devices with Tensor Cores support NHWC data format
@@ -2177,7 +2176,7 @@ LogicalResult Conv3DOp::inferReturnTypeComponents(
 
 LogicalResult DataFormatVecPermuteOp::verify() {
   DataFormatVecPermuteOp op = *this;
-  auto input_ty = op.getX().getType().dyn_cast<RankedTensorType>();
+  auto input_ty = mlir::dyn_cast<RankedTensorType>(op.getX().getType());
   if (!input_ty) return success();
 
   int rank = input_ty.getRank();
@@ -2285,12 +2284,12 @@ class DivNoNanOrMulNoNanConstantY : public OpRewritePattern<OpT> {
     if (auto yDefOp = dyn_cast_or_null<TF::ConstOp>(y.getDefiningOp())) {
       Type typeOfElementsInY = getElementTypeOrSelf(y.getType());
       ElementsAttr attr = yDefOp.getValue();
-      bool yHasComplexElements = typeOfElementsInY.isa<ComplexType>();
+      bool yHasComplexElements = mlir::isa<ComplexType>(typeOfElementsInY);
 
       // If `y` is a splat constant, then the op will definitely get replaced.
       // We check for a splat constant first, in order to optimize the
       // performance of this canonicalization because this check will be O(1).
-      if (auto splatAttr = attr.dyn_cast<SplatElementsAttr>()) {
+      if (auto splatAttr = mlir::dyn_cast<SplatElementsAttr>(attr)) {
         bool splatAttrIsZero = false;
         if (!yHasComplexElements) {
           if (splatAttr.getSplatValue<APFloat>().isZero())
@@ -2356,7 +2355,8 @@ LogicalResult DynamicStitchOp::verify() {
   if (op.getN() < 1)
     return op.emitOpError("requires attribute N with value >= 1");
 
-  if (RankedTensorType out_ty = op.getType().dyn_cast<RankedTensorType>()) {
+  if (RankedTensorType out_ty =
+          mlir::dyn_cast<RankedTensorType>(op.getType())) {
     if (out_ty.getRank() == 0) {
       return op.emitOpError("requires non scalar output");
     }
@@ -2383,8 +2383,9 @@ LogicalResult DynamicStitchOp::verify() {
     }
 
     Value data = std::get<1>(it);
-    RankedTensorType index_ty = index.getType().dyn_cast<RankedTensorType>();
-    RankedTensorType data_ty = data.getType().dyn_cast<RankedTensorType>();
+    RankedTensorType index_ty =
+        mlir::dyn_cast<RankedTensorType>(index.getType());
+    RankedTensorType data_ty = mlir::dyn_cast<RankedTensorType>(data.getType());
     if (!index_ty || !data_ty) continue;
 
     int64_t index_rank = index_ty.getRank();
@@ -2429,7 +2430,7 @@ LogicalResult DynamicStitchOp::verify() {
       expected_shape.append(inferred_item_shape->begin(),
                             inferred_item_shape->end());
 
-      auto out_ty = op.getType().cast<TensorType>();
+      auto out_ty = mlir::cast<TensorType>(op.getType());
       auto expected_out_ty = tensorflow::GetTypeFromTFTensorShape(
           expected_shape, out_ty.getElementType());
 
@@ -2471,25 +2472,25 @@ OpFoldResult EmptyOp::fold(FoldAdaptor adaptor) {
   Attribute attr = operands.front();
   if (!attr) return {};
 
-  auto int_attr = attr.cast<DenseIntElementsAttr>();
+  auto int_attr = mlir::cast<DenseIntElementsAttr>(attr);
   SmallVector<int64_t, 6> out_shape;
   for (const auto val : int_attr.getValues<int32_t>()) {
     out_shape.push_back(val);
   }
 
-  auto type = getResult().getType().cast<ShapedType>();
+  auto type = mlir::cast<ShapedType>(getResult().getType());
   auto etype = type.getElementType();
 
   // We can not fold if the result is not static.
   if (!type.hasStaticShape()) return {};
 
-  if (auto float_type = etype.dyn_cast<FloatType>()) {
+  if (auto float_type = mlir::dyn_cast<FloatType>(etype)) {
     auto out_type = tensorflow::GetTypeFromTFTensorShape(out_shape, float_type);
     return DenseElementsAttr::get(out_type,
                                   {APFloat(float_type.getFloatSemantics())});
   }
 
-  if (auto int_type = etype.dyn_cast<IntegerType>()) {
+  if (auto int_type = mlir::dyn_cast<IntegerType>(etype)) {
     auto out_type = tensorflow::GetTypeFromTFTensorShape(out_shape, etype);
     APInt val(int_type.getWidth(), 0, int_type.getSignedness());
     return DenseElementsAttr::get(out_type, val);
@@ -2580,7 +2581,7 @@ EnqueueTPUEmbeddingSparseTensorBatchOp::GetResourceInstanceStr() {
 //===----------------------------------------------------------------------===//
 
 OpFoldResult EnsureShapeOp::fold(FoldAdaptor) {
-  ShapedType type = getInput().getType().dyn_cast<ShapedType>();
+  ShapedType type = mlir::dyn_cast<ShapedType>(getInput().getType());
   if (!type || !type.hasRank()) return {};
   // If shape attribute equals input operand's type's shape, fold it to input.
   std::optional<llvm::ArrayRef<int64_t>> shape_constraint = getShape();
@@ -2639,15 +2640,15 @@ static LogicalResult flipComatibleShapeError(Ty op, PatternRewriter& rewriter) {
   // we don't know which one it is. TF shape inference turns unranked outputs
   // into ranked ones if it can statically evaluate the broadcast, see the shape
   // function of tf.Equal.
-  auto ty = op.getType().template dyn_cast<RankedTensorType>();
+  auto ty = mlir::dyn_cast<RankedTensorType>(op.getType());
   if (!ty) {
     return rewriter.notifyMatchFailure(op, "requires a ranked output shape");
   }
 
   // Unless this is a scalar compare, a scalar output indicates that this will
   // always fail.
-  auto x_ty = op.getX().getType().template dyn_cast<RankedTensorType>();
-  auto y_ty = op.getY().getType().template dyn_cast<RankedTensorType>();
+  auto x_ty = mlir::dyn_cast<RankedTensorType>(op.getX().getType());
+  auto y_ty = mlir::dyn_cast<RankedTensorType>(op.getY().getType());
   if (ty.getRank() == 0 &&
       (!x_ty || x_ty.getRank() != 0 || !y_ty || y_ty.getRank() != 0)) {
     return rewriter.notifyMatchFailure(op, "output rank must match input rank");
@@ -2675,10 +2676,10 @@ void NotEqualOp::getCanonicalizationPatterns(RewritePatternSet& results,
 //===----------------------------------------------------------------------===//
 
 Type InferExpandDimsOpType(Value input, Value dim) {
-  Type element_ty = input.getType().cast<TensorType>().getElementType();
+  Type element_ty = mlir::cast<TensorType>(input.getType()).getElementType();
   auto unranked_ty = UnrankedTensorType::get(element_ty);
 
-  auto input_ty = input.getType().dyn_cast<RankedTensorType>();
+  auto input_ty = mlir::dyn_cast<RankedTensorType>(input.getType());
   if (!input_ty) return unranked_ty;
 
   DenseIntElementsAttr dim_attr;
@@ -2773,7 +2774,7 @@ LogicalResult FakeQuantWithMinMaxVarsPerChannelOp::verify() {
         "requires num_bits to be between 2 and 16, inclusive");
   }
 
-  auto inputs_type = inputs.getType().dyn_cast<RankedTensorType>();
+  auto inputs_type = mlir::dyn_cast<RankedTensorType>(inputs.getType());
   if (!inputs_type) return success();
   int depth = inputs_type.getDimSize(inputs_type.getRank() - 1);
   if ((min && min.getDimSize(0) != depth) ||
@@ -2800,7 +2801,7 @@ LogicalResult FillOp::verify() {
 }
 
 static ShapedType InferFillOpType(Value dims, Value value) {
-  Type etype = value.getType().cast<ShapedType>().getElementType();
+  Type etype = mlir::cast<ShapedType>(value.getType()).getElementType();
 
   DenseIntElementsAttr dims_attr;
   if (matchPattern(dims, m_Constant(&dims_attr))) {
@@ -2813,7 +2814,7 @@ static ShapedType InferFillOpType(Value dims, Value value) {
   }
 
   if (auto shape_op = dims.getDefiningOp<ShapeOp>()) {
-    if (auto t = shape_op.getInput().getType().dyn_cast<ShapedType>()) {
+    if (auto t = mlir::dyn_cast<ShapedType>(shape_op.getInput().getType())) {
       return t;
     }
   }
@@ -2830,20 +2831,20 @@ OpFoldResult FillOp::fold(FoldAdaptor adaptor) {
   auto operands = adaptor.getOperands();
   assert(operands.size() == 2 && "fill op has two operand");
 
-  auto type = getType().cast<ShapedType>();
+  auto type = mlir::cast<ShapedType>(getType());
   // DenseElementsAttr that is used in this folder only supports int and float
   // types.
   // TODO(hinsu): Handle complex types once there is a attribute kind for
   // complex.
   if (!type.getElementType().isIntOrFloat()) return {};
 
-  auto value = operands[1].dyn_cast_or_null<ElementsAttr>();
+  auto value = mlir::dyn_cast_or_null<ElementsAttr>(operands[1]);
   if (!value) return {};
 
   if (type.hasStaticShape())
     return DenseElementsAttr::get(type, value.getValues<Attribute>()[0]);
 
-  auto dims = operands[0].dyn_cast_or_null<DenseIntElementsAttr>();
+  auto dims = mlir::dyn_cast_or_null<DenseIntElementsAttr>(operands[0]);
   if (!dims) return {};
 
   llvm::SmallVector<int64_t, 4> shape;
@@ -2876,7 +2877,7 @@ StringRef FusedBatchNormGradV3Op::GetOptimalLayout(
 
   // For f16 data type on devices with Tensor Cores support NHWC data format
   // is up to ~2x faster.
-  auto x_ty = getX().getType().cast<TensorType>();
+  auto x_ty = mlir::cast<TensorType>(getX().getType());
   const bool is_f16 = x_ty.getElementType().isF16();
   if (is_f16 && CanUseTensorCores(devices)) return "NHWC";
 
@@ -2940,7 +2941,7 @@ static StringRef GetOptimalLayout(const RuntimeDevices& devices, Op* op) {
 
   // For f16 data type on devices with Tensor Cores support NHWC data format
   // is up to ~2x faster.
-  auto x_ty = op->getX().getType().template cast<TensorType>();
+  auto x_ty = mlir::cast<TensorType>(op->getX().getType());
   const bool is_f16 = x_ty.getElementType().isF16();
   if (is_f16 && CanUseTensorCores(devices)) return "NHWC";
 
@@ -3045,7 +3046,7 @@ void GeneratorDatasetRegionOp::getSuccessorRegions(
 LogicalResult GatherV2Op::verify() {
   GatherV2Op op = *this;
   int64_t batch_dims = op.getBatchDims();
-  if (auto ty = op.getIndices().getType().dyn_cast<RankedTensorType>()) {
+  if (auto ty = mlir::dyn_cast<RankedTensorType>(op.getIndices().getType())) {
     int64_t rank = ty.getRank();
     if (batch_dims > rank || batch_dims < -rank)
       return op.emitOpError()
@@ -3060,7 +3061,7 @@ LogicalResult GatherV2Op::verify() {
   DenseIntElementsAttr axis_attr;
   if (matchPattern(op.getAxis(), m_Constant(&axis_attr))) {
     int64_t axis = (*axis_attr.begin()).getSExtValue();
-    if (auto ty = op.getParams().getType().dyn_cast<RankedTensorType>()) {
+    if (auto ty = mlir::dyn_cast<RankedTensorType>(op.getParams().getType())) {
       int64_t rank = ty.getRank();
       if (axis >= rank || axis < -rank)
         return op.emitOpError() << "axis (" << axis << ") must be in range ["
@@ -3283,7 +3284,7 @@ void IfRegionOp::getSuccessorRegions(
 // Verifies that the input is 1D.
 LogicalResult InvertPermutationOp::verify() {
   InvertPermutationOp op = *this;
-  auto x_type = op.getX().getType().cast<TensorType>();
+  auto x_type = mlir::cast<TensorType>(op.getX().getType());
   if (!x_type.hasRank()) return success();
   if (x_type.getShape().size() != 1)
     return op.emitOpError() << "requires input x to be 1-dimensional";
@@ -3310,10 +3311,12 @@ OpFoldResult LeakyReluOp::fold(FoldAdaptor adaptor) {
     return FloatAttr::get(arg.getType(), val);
   };
 
-  if (auto arg = operands[0].dyn_cast_or_null<FloatAttr>()) {
+  if (auto arg = mlir::dyn_cast_or_null<FloatAttr>(operands[0])) {
     return calculate(arg);
-  } else if (auto arg = operands[0].dyn_cast_or_null<SplatElementsAttr>()) {
-    if (auto elementAttr = arg.getSplatValue<Attribute>().dyn_cast<FloatAttr>())
+  } else if (auto arg =
+                 mlir::dyn_cast_or_null<SplatElementsAttr>(operands[0])) {
+    if (auto elementAttr =
+            mlir::dyn_cast<FloatAttr>(arg.getSplatValue<Attribute>()))
       return DenseElementsAttr::get(arg.getType(), calculate(elementAttr));
   }
   return {};
@@ -3378,7 +3381,7 @@ OpFoldResult LogicalAndOp::fold(FoldAdaptor adaptor) {
   auto result_type = getType();
 
   for (const auto& operand : operands) {
-    auto splat_attr = operand.dyn_cast_or_null<SplatElementsAttr>();
+    auto splat_attr = mlir::dyn_cast_or_null<SplatElementsAttr>(operand);
     if (!splat_attr) continue;
 
     if (splat_attr.getType() != result_type) continue;
@@ -3540,7 +3543,8 @@ LogicalResult MeanOp::FoldOperandsPermutation(ArrayRef<int64_t> permutation) {
       dyn_cast_or_null<TF::ConstOp>(getReductionIndices().getDefiningOp());
   if (!reduction_op) return failure();
 
-  auto reductions_value = reduction_op.getValue().dyn_cast<DenseElementsAttr>();
+  auto reductions_value =
+      mlir::dyn_cast<DenseElementsAttr>(reduction_op.getValue());
   if (!reductions_value) return failure();
 
   // Prepare new reduction indices according to operand permutation.
@@ -3597,8 +3601,8 @@ void HashTableOp::getCanonicalizationPatterns(RewritePatternSet& results,
 
 LogicalResult BitcastOp::verify() {
   BitcastOp op = *this;
-  auto input_type = op.getInput().getType().cast<ShapedType>();
-  auto output_type = op.getOutput().getType().cast<ShapedType>();
+  auto input_type = mlir::cast<ShapedType>(op.getInput().getType());
+  auto output_type = mlir::cast<ShapedType>(op.getOutput().getType());
   auto input_element_type = input_type.getElementType();
   auto output_element_type = output_type.getElementType();
 
diff --git a/tensorflow/compiler/mlir/tensorflow/ir/tf_ops_layout_helper.cc b/tensorflow/compiler/mlir/tensorflow/ir/tf_ops_layout_helper.cc
index d67c1da227d1c6..b3ce501c1c08d1 100644
--- a/tensorflow/compiler/mlir/tensorflow/ir/tf_ops_layout_helper.cc
+++ b/tensorflow/compiler/mlir/tensorflow/ir/tf_ops_layout_helper.cc
@@ -15,6 +15,8 @@ limitations under the License.
 
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops_layout_helper.h"
 
+#include "mlir/Support/LLVM.h"  // from @llvm-project
+
 namespace mlir {
 namespace TF {
 
@@ -60,7 +62,7 @@ ArrayAttr ShuffleArrayAttr(ArrayAttr attr, ArrayRef<int64_t> permutation,
 
 // Shuffle ranked tensor dimensions according to the permutation.
 Type ShuffleRankedTensorType(Type type, ArrayRef<int64_t> permutation) {
-  if (auto ranked_type = type.dyn_cast<RankedTensorType>()) {
+  if (auto ranked_type = mlir::dyn_cast<RankedTensorType>(type)) {
     ArrayRef<int64_t> shape = ranked_type.getShape();
     assert(permutation.size() == shape.size());
 
diff --git a/tensorflow/compiler/mlir/tensorflow/ir/tf_ops_tensor_helper.cc b/tensorflow/compiler/mlir/tensorflow/ir/tf_ops_tensor_helper.cc
index 24036d17b588e6..ca8f27a1489c06 100644
--- a/tensorflow/compiler/mlir/tensorflow/ir/tf_ops_tensor_helper.cc
+++ b/tensorflow/compiler/mlir/tensorflow/ir/tf_ops_tensor_helper.cc
@@ -19,6 +19,7 @@ limitations under the License.
 #include "mlir/IR/Builders.h"  // from @llvm-project
 #include "mlir/IR/Matchers.h"  // from @llvm-project
 #include "mlir/IR/TypeUtilities.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 
 namespace mlir {
 namespace TF {
@@ -33,9 +34,9 @@ class IdentityNOp;
 RankedTensorType GetRankedTensorTypeForOperand(Value operand) {
   DenseElementsAttr attr;
   if (matchPattern(operand, m_Constant(&attr))) {
-    return attr.getType().dyn_cast<RankedTensorType>();
+    return mlir::dyn_cast<RankedTensorType>(attr.getType());
   }
-  return operand.getType().dyn_cast<RankedTensorType>();
+  return mlir::dyn_cast<RankedTensorType>(operand.getType());
 }
 
 // Returns the tf.Equal/tf.NotEqual result type given `x` and `y` and inputs. If
@@ -53,7 +54,7 @@ Type DeduceEqualCmpOpType(Builder *builder, Location loc, Value x, Value y,
     }
   }
 
-  auto ranked_type = result_type.dyn_cast<RankedTensorType>();
+  auto ranked_type = mlir::dyn_cast<RankedTensorType>(result_type);
   if (!ranked_type) return UnrankedTensorType::get(builder->getI1Type());
 
   return RankedTensorType::get(ranked_type.getShape(), builder->getI1Type());
@@ -65,7 +66,7 @@ Type InferReductionOpType(Value input, Value reduction_indices,
   Type element_ty = getElementTypeOrSelf(input_ty);
 
   // Output type is unranked if input type is not ranked.
-  auto ranked_ty = input_ty.dyn_cast<RankedTensorType>();
+  auto ranked_ty = mlir::dyn_cast<RankedTensorType>(input_ty);
   if (!ranked_ty) return UnrankedTensorType::get(element_ty);
   int64_t rank = ranked_ty.getRank();
 
@@ -124,7 +125,7 @@ LogicalResult VerifyTypesCompatibility(Operation::operand_type_range types,
   // the dimension index on the first mismatch and ignore dimension at that
   // index in following types.
   for (Type ty : types) {
-    RankedTensorType ranked_ty = ty.dyn_cast<RankedTensorType>();
+    RankedTensorType ranked_ty = mlir::dyn_cast<RankedTensorType>(ty);
     if (!ranked_ty) continue;
 
     int64_t rank = ranked_ty.getRank();
diff --git a/tensorflow/compiler/mlir/tensorflow/ir/tf_ops_tensor_helper.h b/tensorflow/compiler/mlir/tensorflow/ir/tf_ops_tensor_helper.h
index aaf795afd72917..e77ea7d77deef0 100644
--- a/tensorflow/compiler/mlir/tensorflow/ir/tf_ops_tensor_helper.h
+++ b/tensorflow/compiler/mlir/tensorflow/ir/tf_ops_tensor_helper.h
@@ -19,6 +19,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/IR/Operation.h"  // from @llvm-project
 #include "mlir/IR/Value.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 
 namespace mlir {
 
@@ -36,7 +37,7 @@ RankedTensorType GetRankedTensorTypeForOperand(Value operand);
 // given `rank`.
 inline bool IsOfRankedFloatTensorType(RankedTensorType type, int rank) {
   return type && type.getRank() == rank &&
-         type.getElementType().isa<FloatType>();
+         mlir::isa<FloatType>(type.getElementType());
 }
 
 // Returns true if the given `value` has the specified rank or has unranked
diff --git a/tensorflow/compiler/mlir/tensorflow/ir/tf_saved_model.cc b/tensorflow/compiler/mlir/tensorflow/ir/tf_saved_model.cc
index e5ecef28a38377..45717471e373a2 100644
--- a/tensorflow/compiler/mlir/tensorflow/ir/tf_saved_model.cc
+++ b/tensorflow/compiler/mlir/tensorflow/ir/tf_saved_model.cc
@@ -34,6 +34,7 @@ limitations under the License.
 #include "mlir/IR/SymbolTable.h"  // from @llvm-project
 #include "mlir/IR/TypeUtilities.h"  // from @llvm-project
 #include "mlir/IR/Visitors.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_types.h"
@@ -46,11 +47,11 @@ namespace tf_saved_model {
 //===----------------------------------------------------------------------===//
 
 static bool IsStrArrayAttr(Attribute attr) {
-  auto array = attr.dyn_cast<ArrayAttr>();
+  auto array = mlir::dyn_cast<ArrayAttr>(attr);
   if (!array) return false;
 
-  return llvm::all_of(array,
-                      [](Attribute attr) { return attr.isa<StringAttr>(); });
+  return llvm::all_of(
+      array, [](Attribute attr) { return mlir::isa<StringAttr>(attr); });
 }
 
 //===----------------------------------------------------------------------===//
@@ -58,10 +59,11 @@ static bool IsStrArrayAttr(Attribute attr) {
 //===----------------------------------------------------------------------===//
 
 LogicalResult VerifyTensorTypesCompatible(Type t1, Type t2) {
-  if (!t1.isa<TensorType>() || !t2.isa<TensorType>()) {
+  if (!mlir::isa<TensorType>(t1) || !mlir::isa<TensorType>(t2)) {
     return failure();
   }
-  return verifyCompatibleShape(t1.cast<TensorType>(), t2.cast<TensorType>());
+  return verifyCompatibleShape(mlir::cast<TensorType>(t1),
+                               mlir::cast<TensorType>(t2));
 }
 
 LogicalResult GlobalTensorOp::verify() {
@@ -75,7 +77,7 @@ LogicalResult GlobalTensorOp::verify() {
     }
   }
   if (!global_tensor.getIsMutable()) {
-    if (!global_tensor.getType().cast<TensorType>().hasStaticShape()) {
+    if (!mlir::cast<TensorType>(global_tensor.getType()).hasStaticShape()) {
       return global_tensor.emitError()
              << "'type' attribute for immutable 'tf_saved_model.global_tensor' "
                 "should have a static shape";
@@ -91,7 +93,7 @@ LogicalResult SessionInitializerOp::verify() {
 
   for (auto sym_ref : session_initializer.getInitializers()) {
     auto init_func_op = symbol_table.lookup<mlir::func::FuncOp>(
-        sym_ref.cast<FlatSymbolRefAttr>().getValue());
+        mlir::cast<FlatSymbolRefAttr>(sym_ref).getValue());
 
     if (!init_func_op)
       return session_initializer.emitOpError()
@@ -143,16 +145,16 @@ TensorFlowSavedModelDialect::TensorFlowSavedModelDialect(MLIRContext *context)
 }
 
 static LogicalResult VerifyIndexPath(Operation *op, NamedAttribute named_attr) {
-  auto attr = named_attr.getValue().dyn_cast<ArrayAttr>();
+  auto attr = mlir::dyn_cast<ArrayAttr>(named_attr.getValue());
   if (!attr) {
     return op->emitError() << "'" << kTfSavedModelIndexPathAttr
                            << "' attribute should be an ArrayAttr";
   }
   for (auto element : attr) {
-    if (element.isa<StringAttr>()) {
+    if (mlir::isa<StringAttr>(element)) {
       continue;
     }
-    if (auto integer = element.dyn_cast<IntegerAttr>()) {
+    if (auto integer = mlir::dyn_cast<IntegerAttr>(element)) {
       if (integer.getValue().getBitWidth() == 64) {
         continue;
       }
@@ -165,7 +167,7 @@ static LogicalResult VerifyIndexPath(Operation *op, NamedAttribute named_attr) {
 
 Type GetBoundInputArgTypeFor(mlir::Operation *op) {
   if (auto global_tensor = llvm::dyn_cast<GlobalTensorOp>(op)) {
-    auto type = global_tensor.getType().cast<TensorType>();
+    auto type = mlir::cast<TensorType>(global_tensor.getType());
     return RankedTensorType::get(
         {}, TF::ResourceType::get({type}, type.getContext()));
   }
@@ -196,12 +198,12 @@ LogicalResult TensorFlowSavedModelDialect::verifyRegionArgAttribute(
     Operation *op, unsigned region_index, unsigned arg_index,
     NamedAttribute named_attr) {
   if (named_attr.getName() == "tf_saved_model.bound_input") {
-    if (!named_attr.getValue().isa<FlatSymbolRefAttr>()) {
+    if (!mlir::isa<FlatSymbolRefAttr>(named_attr.getValue())) {
       return op->emitError() << "'tf_saved_model.bound_input' attribute should "
                                 "be a FlatSymbolRefAttr";
     }
     auto symbol_name =
-        named_attr.getValue().cast<FlatSymbolRefAttr>().getValue();
+        mlir::cast<FlatSymbolRefAttr>(named_attr.getValue()).getValue();
     auto module = op->getParentOfType<ModuleOp>();
     mlir::Operation *symbol_op = module.lookupSymbol(symbol_name);
     if (!symbol_op) {
@@ -292,8 +294,8 @@ static LogicalResult VerifySavedModelModule(
             &op, {exported_names_ident, attr}))) {
       return failure();
     }
-    for (auto str : attr.cast<ArrayAttr>()) {
-      auto exported_name = str.cast<StringAttr>().getValue();
+    for (auto str : mlir::cast<ArrayAttr>(attr)) {
+      auto exported_name = mlir::cast<StringAttr>(str).getValue();
       auto p = exported_name_to_op.insert({exported_name, &op});
       if (!p.second) {
         return op.emitError()
@@ -341,7 +343,8 @@ static LogicalResult VerifySavedModelModule(
     auto init_syms = (*session_initializers.begin()).getInitializers();
     return std::any_of(
         init_syms.begin(), init_syms.end(), [&](Attribute sym_ref) {
-          return sym_ref.cast<FlatSymbolRefAttr>().getValue() == func.getName();
+          return mlir::cast<FlatSymbolRefAttr>(sym_ref).getValue() ==
+                 func.getName();
         });
   };
 
@@ -439,7 +442,7 @@ LogicalResult VerifyInitializerTypeAttr(Operation *op,
 
   // Validate the attribute value.
   auto initializer_type_attr_value =
-      named_attr.getValue().dyn_cast_or_null<StringAttr>();
+      mlir::dyn_cast_or_null<StringAttr>(named_attr.getValue());
   if (!initializer_type_attr_value) {
     return op->emitError() << "Attribute tf_saved_model.initializer_type "
                            << "should be a StringAttr.";
@@ -504,7 +507,7 @@ SmallVector<StringRef, 2> GetExportedNames(Operation *op) {
       op->getAttrOfType<ArrayAttr>(kTfSavedModelExportedNamesAttr);
   if (exported_names) {
     for (auto name : exported_names) {
-      ret.push_back(name.cast<StringAttr>().getValue());
+      ret.push_back(mlir::cast<StringAttr>(name).getValue());
     }
   }
   return ret;
@@ -547,7 +550,7 @@ class OptimizeSessionInitializerPattern
     SmallVector<mlir::Attribute, 2> to_keep;
     for (auto sym_ref : op.getInitializers()) {
       auto init_func_op = symbol_table.lookup<mlir::func::FuncOp>(
-          sym_ref.cast<FlatSymbolRefAttr>().getValue());
+          mlir::cast<FlatSymbolRefAttr>(sym_ref).getValue());
 
       // The init function can only be referenced from the SessionInitializerOp.
       // And there is at most one SessionInitializerOp in the module. So if both
@@ -590,7 +593,7 @@ SmallVector<StringRef, 2> GetSessionInitializerExportedName(ModuleOp op) {
   SmallVector<StringRef, 2> results;
   for (auto sym_ref : session_initializer_op.getInitializers()) {
     auto init_func_op = symbol_table.lookup<mlir::func::FuncOp>(
-        sym_ref.cast<FlatSymbolRefAttr>().getValue());
+        mlir::cast<FlatSymbolRefAttr>(sym_ref).getValue());
     auto exported_names = GetExportedNames(init_func_op);
     assert(exported_names.size() == 1);
     results.push_back(exported_names[0]);
diff --git a/tensorflow/compiler/mlir/tensorflow/ir/tf_traits.h b/tensorflow/compiler/mlir/tensorflow/ir/tf_traits.h
index 62f6192c1f84f0..c6abd7689beddc 100644
--- a/tensorflow/compiler/mlir/tensorflow/ir/tf_traits.h
+++ b/tensorflow/compiler/mlir/tensorflow/ir/tf_traits.h
@@ -26,6 +26,7 @@ limitations under the License.
 #include "mlir/IR/TypeUtilities.h"  // from @llvm-project
 #include "mlir/Interfaces/InferTypeOpInterface.h"  // from @llvm-project
 #include "mlir/Interfaces/SideEffectInterfaces.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_op_interfaces.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_types.h"
@@ -38,7 +39,7 @@ namespace TF {
 static inline LogicalResult VerifyRefTypeMatch(mlir::Type type,
                                                mlir::Type maybe_ref_type) {
   if (auto ref_type =
-          maybe_ref_type.dyn_cast<mlir::tf_type::TensorFlowRefType>())
+          mlir::dyn_cast<mlir::tf_type::TensorFlowRefType>(maybe_ref_type))
     return success(ref_type.RemoveRef().getTypeID() == type.getTypeID());
   return failure();
 }
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/BUILD b/tensorflow/compiler/mlir/tensorflow/transforms/BUILD
index 00fd3934676c86..825430513060fc 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/BUILD
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/BUILD
@@ -147,6 +147,7 @@ cc_library(
         "//tensorflow/compiler/mlir/tensorflow:attribute_utils",
         "//tensorflow/core:framework",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
     ],
 )
 
@@ -298,6 +299,7 @@ cc_library(
         "@llvm-project//mlir:FuncDialect",
         "@llvm-project//mlir:IR",
         "@llvm-project//mlir:Pass",
+        "@llvm-project//mlir:Support",
     ],
 )
 
@@ -1034,6 +1036,7 @@ cc_library(
         "//tensorflow/core:framework",
         "@llvm-project//llvm:Support",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
     ],
 )
 
@@ -1045,6 +1048,7 @@ cc_library(
         "//tensorflow/compiler/mlir/tensorflow",
         "@llvm-project//mlir:FuncDialect",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
         "@local_xla//xla:shape_util",
         "@local_xla//xla/mlir_hlo",
         "@local_xla//xla/stream_executor/tpu:c_api_conversions",
@@ -1067,6 +1071,7 @@ cc_library(
         "@llvm-project//mlir:FuncDialect",
         "@llvm-project//mlir:IR",
         "@llvm-project//mlir:Pass",
+        "@llvm-project//mlir:Support",
         "@local_tsl//tsl/platform:path",
     ],
 )
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/annotate_parameter_replication.cc b/tensorflow/compiler/mlir/tensorflow/transforms/annotate_parameter_replication.cc
index 996686eb525d03..52765fb5657eba 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/annotate_parameter_replication.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/annotate_parameter_replication.cc
@@ -25,6 +25,7 @@ limitations under the License.
 #include "mlir/IR/Value.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
 #include "mlir/Pass/PassRegistry.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_device.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/compiler/mlir/tensorflow/transforms/passes.h"
@@ -70,14 +71,14 @@ void AnnotateParameterReplicationPass::runOnOperation() {
     if (mirrored_variable_indices_attr) {
       for (const auto& mirrored_index : mirrored_variable_indices_attr) {
         mirrored_replicate_args.insert(
-            mirrored_index.cast<IntegerAttr>().getInt());
+            mlir::cast<IntegerAttr>(mirrored_index).getInt());
       }
     }
     auto func =
         llvm::cast<func::FuncOp>(m.lookupSymbol(cluster_func.getFunc()));
     for (auto entry : llvm::enumerate(cluster_func.getOperands())) {
       auto operand = SkipIdentityAndReadVariable(entry.value());
-      auto block_arg = operand.dyn_cast<BlockArgument>();
+      auto block_arg = mlir::dyn_cast<BlockArgument>(operand);
       if (block_arg && block_arg.getOwner() == &replicate.GetBody()) {
         // Only mirrored args of ReplicateOp can be annotated.
         if (mirrored_replicate_args.count(block_arg.getArgNumber()) == 0) {
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/batchmatmul_to_einsum.cc b/tensorflow/compiler/mlir/tensorflow/transforms/batchmatmul_to_einsum.cc
index 14ab17be0fdee5..c6e21cb1e03054 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/batchmatmul_to_einsum.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/batchmatmul_to_einsum.cc
@@ -53,8 +53,8 @@ class ConvertTFBatchMatMulToEinsumOp
     Value input_rhs = op.getY();
 
     // LHS and RHS must be a ranked tensor type
-    auto lhs_type = input_lhs.getType().dyn_cast<RankedTensorType>();
-    auto rhs_type = input_rhs.getType().dyn_cast<RankedTensorType>();
+    auto lhs_type = mlir::dyn_cast<RankedTensorType>(input_lhs.getType());
+    auto rhs_type = mlir::dyn_cast<RankedTensorType>(input_rhs.getType());
 
     if (!lhs_type || !rhs_type) return failure();
 
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/cluster_ops_by_policy.cc b/tensorflow/compiler/mlir/tensorflow/transforms/cluster_ops_by_policy.cc
index 4b409ffe1f614f..3ce5fb5bcb8379 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/cluster_ops_by_policy.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/cluster_ops_by_policy.cc
@@ -27,6 +27,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/IR/Operation.h"  // from @llvm-project
 #include "mlir/IR/Value.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 
 #define DEBUG_TYPE "cluster-ops-by-policy"
@@ -44,7 +45,7 @@ ValueConstraint Merge(ValueConstraint a, ValueConstraint b) {
 
 LogicalResult IsStaticallyResolved(Value value, ValueConstraint constraint) {
   // Resolve constraints inferred from the tensor type.
-  if (auto tensor = value.getType().dyn_cast<TensorType>()) {
+  if (auto tensor = mlir::dyn_cast<TensorType>(value.getType())) {
     if (constraint == ValueConstraint::kRank && tensor.hasRank())
       return success();
     if (constraint == ValueConstraint::kShape && tensor.hasStaticShape())
@@ -710,7 +711,7 @@ void EmitValueConstraintsRemarks(const ValuesConstraintSet &constraints) {
 void EmitInputsConstraintsRemarks(func::FuncOp func,
                                   const ValuesConstraintSet &constraints) {
   constraints.Walk([&](Value value, ValueConstraint constraint) {
-    if (auto arg = value.dyn_cast<BlockArgument>())
+    if (auto arg = mlir::dyn_cast<BlockArgument>(value))
       if (arg.getOwner() == &func.getBody().front())
         func.emitRemark(llvm::formatv("input #{0} constrained to: {1}",
                                       arg.getArgNumber(), constraint));
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/cluster_tf_ops_pass.cc b/tensorflow/compiler/mlir/tensorflow/transforms/cluster_tf_ops_pass.cc
index 5d9f5f9718446f..3d3e1305993a30 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/cluster_tf_ops_pass.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/cluster_tf_ops_pass.cc
@@ -33,6 +33,7 @@ limitations under the License.
 #include "llvm/ADT/StringRef.h"
 #include "mlir/Dialect/Func/IR/FuncOps.h"  // from @llvm-project
 #include "mlir/IR/IRMapping.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_device.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/core/util/device_name_utils.h"
@@ -124,7 +125,7 @@ std::optional<llvm::StringMap<FunctionMetadata>> GetFunctionMetadatas(
 
       // If the value is defined as an argument of the func_op, adds it to
       // the argument list of the function that uses this op.
-      if (BlockArgument block_arg = value.dyn_cast<BlockArgument>()) {
+      if (BlockArgument block_arg = mlir::dyn_cast<BlockArgument>(value)) {
         if (StringAttr attr = func_op.getArgAttrOfType<StringAttr>(
                 block_arg.getArgNumber(), kTFDeviceAttr)) {
           value_device = attr.getValue().str();
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/collection_ops_util.cc b/tensorflow/compiler/mlir/tensorflow/transforms/collection_ops_util.cc
index 59faa220521f0b..5a83e75e9eedf4 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/collection_ops_util.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/collection_ops_util.cc
@@ -62,7 +62,7 @@ Value GetR1Const(ArrayRef<int64_t> r1, OpBuilder builder, Location loc,
 
 Value GetIndicesForElement(Value index, Value buffer, OpBuilder builder,
                            Location loc) {
-  auto buffer_type = buffer.getType().cast<RankedTensorType>();
+  auto buffer_type = mlir::cast<RankedTensorType>(buffer.getType());
   if (buffer_type.getShape().size() == 1) return index;
   // Create a concat of index and trailing zeros.
   llvm::SmallVector<int64_t, 8> zeros(buffer_type.getShape().size() - 1, 0);
@@ -77,7 +77,7 @@ Value GetIndicesForElement(Value index, Value buffer, OpBuilder builder,
 
 Value GetElement(Value index, Value buffer, OpBuilder builder, Location loc,
                  bool keep_slice_shape) {
-  auto buffer_type = buffer.getType().cast<RankedTensorType>();
+  auto buffer_type = mlir::cast<RankedTensorType>(buffer.getType());
   // Create a slice then reshape to remove the leading trivial dimension of
   // size 1.
   llvm::SmallVector<int64_t, 8> slice_size =
@@ -102,7 +102,7 @@ Value GetElement(Value index, Value buffer, OpBuilder builder, Location loc,
 
 Value SetElement(Value index, Value buffer, Value element, OpBuilder builder,
                  Location loc) {
-  auto buffer_type = buffer.getType().cast<RankedTensorType>();
+  auto buffer_type = mlir::cast<RankedTensorType>(buffer.getType());
   // Reshape the element to add a leading dimension of size 1 if th element does
   // not have that dimension, then perform a dynamic update slice.
   auto slice_shape = llvm::to_vector<8>(buffer_type.getShape());
@@ -208,7 +208,7 @@ std::optional<RankedTensorType> GetElementTypeFromAccess(
       if (type_from_alias.has_value()) return type_from_alias;
     } else if (auto type = infer_from_op(use.getOwner())) {
       if (!type) continue;
-      auto elem_type = type->dyn_cast<RankedTensorType>();
+      auto elem_type = mlir::dyn_cast<RankedTensorType>(*type);
       if (elem_type && elem_type.hasStaticShape()) return elem_type;
     }
   }
@@ -220,8 +220,8 @@ Value ReadLocalVariable(Value local_var, OpBuilder builder, Location loc) {
   return builder
       .create<TF::ReadVariableOp>(
           loc,
-          ArrayRef<Type>{getElementTypeOrSelf(local_var.getType())
-                             .cast<TF::ResourceType>()
+          ArrayRef<Type>{mlir::cast<TF::ResourceType>(
+                             getElementTypeOrSelf(local_var.getType()))
                              .getSubtypes()[0]},
           ArrayRef<Value>{local_var})
       .getValue();
@@ -246,7 +246,7 @@ Value AccumulateBuffers(Value a, Value b, OpBuilder builder, Location loc) {
 namespace {
 
 int64_t GetFirstIfIndicesAreContiguous(Value indices) {
-  auto type = indices.getType().dyn_cast<RankedTensorType>();
+  auto type = mlir::dyn_cast<RankedTensorType>(indices.getType());
   if (!type) return -1;
   auto indices_op = indices.getDefiningOp();
   if (!indices_op) return -1;
@@ -270,9 +270,10 @@ int64_t GetFirstIfIndicesAreContiguous(Value indices) {
 
 Value GatherElements(Value indices, Value buffer, OpBuilder builder,
                      Location loc) {
-  auto buffer_type = buffer.getType().cast<RankedTensorType>();
+  auto buffer_type = mlir::cast<RankedTensorType>(buffer.getType());
   auto result_shape = llvm::to_vector<8>(buffer_type.getShape());
-  result_shape[0] = indices.getType().cast<RankedTensorType>().getDimSize(0);
+  result_shape[0] =
+      mlir::cast<RankedTensorType>(indices.getType()).getDimSize(0);
   int64_t maybe_contiguous_start = GetFirstIfIndicesAreContiguous(indices);
   if (maybe_contiguous_start >= 0) {
     llvm::SmallVector<int64_t, 8> slice_starts(result_shape.size(), 0);
@@ -293,8 +294,8 @@ Value GatherElements(Value indices, Value buffer, OpBuilder builder,
 
 Value ScatterAccumulateElements(Value indices, Value updates, Value buffer,
                                 OpBuilder builder, Location loc) {
-  auto buffer_type = buffer.getType().cast<RankedTensorType>();
-  auto updates_type = updates.getType().cast<RankedTensorType>();
+  auto buffer_type = mlir::cast<RankedTensorType>(buffer.getType());
+  auto updates_type = mlir::cast<RankedTensorType>(updates.getType());
   int64_t maybe_contiguous_start = GetFirstIfIndicesAreContiguous(indices);
   if (maybe_contiguous_start == 0 && buffer_type == updates_type) {
     return AccumulateBuffers(buffer, updates, builder, loc);
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/constant_fold.cc b/tensorflow/compiler/mlir/tensorflow/transforms/constant_fold.cc
index 880dfa837e881c..ca5eb4bc737b99 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/constant_fold.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/constant_fold.cc
@@ -19,6 +19,7 @@ limitations under the License.
 
 #include "mlir/IR/BuiltinAttributes.h"  // from @llvm-project
 #include "mlir/IR/OpDefinition.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_types.h"
@@ -47,7 +48,7 @@ static bool IsFoldedByDefaultPolicy(Operation* inst) {
   auto get_size = [&](TypeRange types) {
     int64_t size = 0;
     for (auto t : types) {
-      auto tensor_type = t.cast<TensorType>();
+      auto tensor_type = mlir::cast<TensorType>(t);
       // Ignore types with undefined bit widths.
       if (!tensor_type.getElementType().isIntOrFloat()) continue;
       if (!tensor_type.hasStaticShape()) {
@@ -93,7 +94,7 @@ LogicalResult ConstantFoldFallbackHook(
   // propagation.
   bool has_empty_numerical_results =
       llvm::all_of(inst->getResultTypes(), [](Type ty) {
-        ShapedType shaped_ty = ty.cast<ShapedType>();
+        ShapedType shaped_ty = mlir::cast<ShapedType>(ty);
         Type element_ty = shaped_ty.getElementType();
         return shaped_ty.hasStaticShape() && shaped_ty.getNumElements() == 0 &&
                element_ty.isIntOrFloat();
@@ -103,7 +104,7 @@ LogicalResult ConstantFoldFallbackHook(
       // addressed.
       inst->isRegistered()) {
     for (Type ty : inst->getResultTypes()) {
-      auto shaped_ty = ty.cast<ShapedType>();
+      auto shaped_ty = mlir::cast<ShapedType>(ty);
       results.push_back(
           DenseElementsAttr::get(shaped_ty, llvm::ArrayRef<Attribute>()));
     }
@@ -112,14 +113,14 @@ LogicalResult ConstantFoldFallbackHook(
 
   // Returns directly if any of the operands is not an elements attributes.
   if (std::any_of(operands.begin(), operands.end(), [](Attribute attr) {
-        return !attr || !attr.isa<ElementsAttr>();
+        return !attr || !mlir::isa<ElementsAttr>(attr);
       }))
     return failure();
 
   SmallVector<ElementsAttr, 4> inputs;
   inputs.reserve(operands.size());
   for (auto input : operands) {
-    inputs.push_back(input.cast<ElementsAttr>());
+    inputs.push_back(mlir::cast<ElementsAttr>(input));
   }
 
   SmallVector<Attribute> constants;
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/constant_fold_utils.cc b/tensorflow/compiler/mlir/tensorflow/transforms/constant_fold_utils.cc
index a41dbdefa6f520..84c96590910243 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/constant_fold_utils.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/constant_fold_utils.cc
@@ -25,6 +25,7 @@ limitations under the License.
 #include "llvm/ADT/ArrayRef.h"
 #include "llvm/ADT/SmallVector.h"
 #include "mlir/IR/Operation.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_traits.h"
@@ -65,8 +66,8 @@ bool CanBeFolded(Operation* inst) {
   // This creates opaque variant constants which lose information and would
   // require "raising" later.
   for (const Type type : inst->getResultTypes()) {
-    if (const TensorType tensor_type = type.dyn_cast<TensorType>()) {
-      if (tensor_type.getElementType().isa<VariantType>()) {
+    if (const TensorType tensor_type = mlir::dyn_cast<TensorType>(type)) {
+      if (mlir::isa<VariantType>(tensor_type.getElementType())) {
         return false;
       }
     }
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/convert_control_to_data_outputs.cc b/tensorflow/compiler/mlir/tensorflow/transforms/convert_control_to_data_outputs.cc
index 4de43317677f63..6262cad26ca6e3 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/convert_control_to_data_outputs.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/convert_control_to_data_outputs.cc
@@ -114,7 +114,7 @@ SmallVector<TF::WhileOp> GetWhileCallers(func::FuncOp func,
 }
 
 bool IsResourceType(Type type) {
-  return getElementTypeOrSelf(type).isa<TF::ResourceType>();
+  return mlir::isa<TF::ResourceType>(getElementTypeOrSelf(type));
 }
 
 bool OnlyOperatesOnCompositeDevices(
@@ -124,11 +124,11 @@ bool OnlyOperatesOnCompositeDevices(
   auto& alias_analysis = side_effect_analysis.GetAliasAnalysis();
   llvm::SmallSet<int, 8> read_array;
   for (const Attribute& attr : op.getDeviceVarReadsIndices()) {
-    read_array.insert(attr.cast<IntegerAttr>().getInt());
+    read_array.insert(mlir::cast<IntegerAttr>(attr).getInt());
   }
   llvm::SmallSet<int, 8> update_array;
   for (const Attribute& attr : op.getDeviceVarUpdatesIndices()) {
-    update_array.insert(attr.cast<IntegerAttr>().getInt());
+    update_array.insert(mlir::cast<IntegerAttr>(attr).getInt());
   }
 
   for (auto& arg : op->getOpOperands()) {
@@ -270,7 +270,7 @@ void CollectChainResources(
 //
 // Checks if the value `control` is a NoOp control barrier.
 bool IsNoOpControlBarrier(Value control) {
-  if (!control.getType().isa<ControlType>()) return false;
+  if (!mlir::isa<ControlType>(control.getType())) return false;
 
   auto control_island = dyn_cast_or_null<IslandOp>(control.getDefiningOp());
   if (!control_island) return false;
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/decompose_reduce_dataset.cc b/tensorflow/compiler/mlir/tensorflow/transforms/decompose_reduce_dataset.cc
index 8e89f3988dd8d4..4af1246d5a72b6 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/decompose_reduce_dataset.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/decompose_reduce_dataset.cc
@@ -38,6 +38,7 @@ limitations under the License.
 #include "mlir/Pass/Pass.h"  // from @llvm-project
 #include "mlir/Pass/PassRegistry.h"  // from @llvm-project
 #include "mlir/Support/DebugStringHelper.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Transforms/RegionUtils.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/analysis/side_effect_analysis.h"
@@ -76,7 +77,7 @@ AnonymousIteratorV3Op CreateIterator(OpBuilder builder,
   llvm::SmallVector<Attribute, 2> type_attrs;
   for (Type type : dataset_types) {
     shape_attrs.push_back(
-        TF::ShapeAttr::get(builder.getContext(), type.cast<ShapedType>()));
+        TF::ShapeAttr::get(builder.getContext(), mlir::cast<ShapedType>(type)));
     type_attrs.push_back(TypeAttr::get(getElementTypeOrSelf(type)));
   }
 
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/einsum.cc b/tensorflow/compiler/mlir/tensorflow/transforms/einsum.cc
index 51438ac4901b9d..4cdc90376c2317 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/einsum.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/einsum.cc
@@ -90,7 +90,7 @@ TF::SumOp createSumOp(Value value, Location loc,
                       PatternRewriter* rewriter) {
   Value redux_op = createI32ConstantOp(redux_axes, loc, rewriter);
 
-  auto value_type = value.getType().cast<RankedTensorType>();
+  auto value_type = mlir::cast<RankedTensorType>(value.getType());
   auto shape = value_type.getShape();
   llvm::SmallVector<int64_t> sum_shape;
   for (int i = 0; i < shape.size(); ++i) {
@@ -108,7 +108,7 @@ TF::TransposeOp createTransposeOp(Value value, Location loc,
                                   llvm::ArrayRef<int32_t> permutation,
                                   PatternRewriter* rewriter) {
   auto perm_op = createI32ConstantOp(permutation, loc, rewriter);
-  auto value_type = value.getType().cast<RankedTensorType>();
+  auto value_type = mlir::cast<RankedTensorType>(value.getType());
   auto shape = value_type.getShape();
   SmallVector<int64_t, 4> transposed_shape(shape.begin(), shape.end());
   for (int i = 0, end = shape.size(); i < end; ++i) {
@@ -529,7 +529,7 @@ LogicalResult rewriteToReduceSumAndTranspose(TF::EinsumOp op,
   bool needs_transpose = false;
   for (int64_t i = 0; i < dnums.lhs_out.size(); ++i) {
     if (std::get<0>(dnums.lhs_out[i]) >
-        lhs.getType().cast<RankedTensorType>().getRank() - 1) {
+        mlir::cast<RankedTensorType>(lhs.getType()).getRank() - 1) {
       continue;
     }
 
@@ -637,8 +637,8 @@ LogicalResult reshapeForBatchMatmul(const Location& loc,
                                     Value* rhs,
                                     SmallVectorImpl<int64_t>* out_shape,
                                     PatternRewriter* rewriter) {
-  RankedTensorType lhs_type = lhs->getType().cast<RankedTensorType>();
-  RankedTensorType rhs_type = rhs->getType().cast<RankedTensorType>();
+  RankedTensorType lhs_type = mlir::cast<RankedTensorType>(lhs->getType());
+  RankedTensorType rhs_type = mlir::cast<RankedTensorType>(rhs->getType());
 
   int32_t num_lhs_reshape_segids = 0;
   int32_t num_rhs_reshape_segids = 0;
@@ -776,7 +776,7 @@ LogicalResult rewriteToBatchMatmul(TF::EinsumOp op,
   EinsumDimensionNumbers original_dnums = dnums;
 
   RankedTensorType original_type =
-      op.getResult().getType().dyn_cast_or_null<RankedTensorType>();
+      mlir::dyn_cast_or_null<RankedTensorType>(op.getResult().getType());
   if (!original_type) return failure();
 
   std::vector<int32_t> out_transpose;
@@ -822,7 +822,7 @@ LogicalResult matchAndRewriteUnaryEinsumOp(TF::EinsumOp op,
         op, "Function only supports unary einsum op");
   }
   RankedTensorType lhs =
-      op.getOperand(0).getType().dyn_cast_or_null<RankedTensorType>();
+      mlir::dyn_cast_or_null<RankedTensorType>(op.getOperand(0).getType());
   if (!lhs) {
     return failure();
   }
@@ -862,9 +862,9 @@ LogicalResult ConvertTFEinsumOp::matchAndRewrite(
   }
 
   RankedTensorType lhs =
-      op.getOperand(0).getType().dyn_cast_or_null<RankedTensorType>();
+      mlir::dyn_cast_or_null<RankedTensorType>(op.getOperand(0).getType());
   RankedTensorType rhs =
-      op.getOperand(1).getType().dyn_cast_or_null<RankedTensorType>();
+      mlir::dyn_cast_or_null<RankedTensorType>(op.getOperand(1).getType());
   if (!lhs || !rhs) {
     return failure();
   }
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/executor_island_coarsening.cc b/tensorflow/compiler/mlir/tensorflow/transforms/executor_island_coarsening.cc
index 51afea6d84671e..e1611432f36e8c 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/executor_island_coarsening.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/executor_island_coarsening.cc
@@ -32,6 +32,7 @@ limitations under the License.
 #include "mlir/IR/Operation.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
 #include "mlir/Pass/PassRegistry.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_executor.h"
 #include "tensorflow/compiler/mlir/tensorflow/transforms/passes.h"
 #include "tensorflow/core/platform/logging.h"
@@ -443,7 +444,7 @@ void InsertDummyIslandForFetch(FetchOp fetch) {
   control_fetches.reserve(data_fetches.capacity());
 
   for (auto value : fetch.getFetches()) {
-    if (value.getType().isa<ControlType>()) {
+    if (mlir::isa<ControlType>(value.getType())) {
       control_fetches.push_back(value);
     } else {
       data_fetches.push_back(value);
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/executor_tpuv1_island_coarsening.cc b/tensorflow/compiler/mlir/tensorflow/transforms/executor_tpuv1_island_coarsening.cc
index 9567278d98dc9c..2f456248c381af 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/executor_tpuv1_island_coarsening.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/executor_tpuv1_island_coarsening.cc
@@ -624,7 +624,7 @@ void TpuV1BridgeExecutorIslandCoarsening::runOnOperation() {
     assert(!funcs_for_cluster->second.empty());
     if (funcs_for_cluster->second.size() == 1) return false;
     for (NamedAttribute attr : op->getAttrs()) {
-      auto symbol_ref = attr.getValue().dyn_cast<FlatSymbolRefAttr>();
+      auto symbol_ref = mlir::dyn_cast<FlatSymbolRefAttr>(attr.getValue());
       if (!symbol_ref) continue;
       func::FuncOp callee =
           symbol_table.lookup<func::FuncOp>(symbol_ref.getValue());
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/executor_tpuv1_outline_tpu_island.cc b/tensorflow/compiler/mlir/tensorflow/transforms/executor_tpuv1_outline_tpu_island.cc
index 0106d149d3d343..19603170b89e20 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/executor_tpuv1_outline_tpu_island.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/executor_tpuv1_outline_tpu_island.cc
@@ -178,13 +178,14 @@ void TPUBridgeExecutorIslandOutlining::runOnOperation() {
   for (func::FuncOp func : outlined_module.getOps<func::FuncOp>()) {
     func.walk([&](Operation *op) {
       for (NamedAttribute attr : op->getAttrs()) {
-        if (auto symbol_ref = attr.getValue().dyn_cast<FlatSymbolRefAttr>()) {
+        if (auto symbol_ref =
+                mlir::dyn_cast<FlatSymbolRefAttr>(attr.getValue())) {
           MoveFuncOp(symbol_ref, symbol_table, outlined_symbol_table);
           continue;
         }
-        if (auto array_attr = attr.getValue().dyn_cast<ArrayAttr>()) {
+        if (auto array_attr = mlir::dyn_cast<ArrayAttr>(attr.getValue())) {
           for (const Attribute &attribute : array_attr) {
-            auto symbol_ref = attribute.dyn_cast<FlatSymbolRefAttr>();
+            auto symbol_ref = mlir::dyn_cast<FlatSymbolRefAttr>(attribute);
             if (!symbol_ref) continue;
             MoveFuncOp(symbol_ref, symbol_table, outlined_symbol_table);
           }
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/extract_tpu_copy_with_dynamic_shape_op.cc b/tensorflow/compiler/mlir/tensorflow/transforms/extract_tpu_copy_with_dynamic_shape_op.cc
index dfd20d8dd0e07a..18480fbd772fa9 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/extract_tpu_copy_with_dynamic_shape_op.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/extract_tpu_copy_with_dynamic_shape_op.cc
@@ -22,6 +22,7 @@ limitations under the License.
 #include "mlir/IR/Value.h"  // from @llvm-project
 #include "mlir/IR/Visitors.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_device.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
@@ -47,7 +48,7 @@ class ExtractTPUCopyWithDynamicShapeOpPass
 // Finds op that created a given value. If the value is a BlockArgument, this
 // returns the owner of the Block.
 Operation* GetOpOfValue(Value value) {
-  if (auto block_arg = value.dyn_cast<BlockArgument>())
+  if (auto block_arg = mlir::dyn_cast<BlockArgument>(value))
     return block_arg.getOwner()->getParentOp();
 
   return value.getDefiningOp();
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/fold_broadcast.cc b/tensorflow/compiler/mlir/tensorflow/transforms/fold_broadcast.cc
index d755696c74607b..6547b6f168c3bf 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/fold_broadcast.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/fold_broadcast.cc
@@ -26,6 +26,7 @@ limitations under the License.
 #include "mlir/IR/Operation.h"  // from @llvm-project
 #include "mlir/IR/PatternMatch.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
@@ -144,7 +145,7 @@ LogicalResult ConvertResultsBroadcastableShapeOp::RewriteOp(
 
   // Check that the result shape is fully defined.
   auto result_type =
-      op->getResultTypes().front().dyn_cast_or_null<RankedTensorType>();
+      mlir::dyn_cast_or_null<RankedTensorType>(op->getResultTypes().front());
   if (!result_type || !result_type.hasStaticShape()) return failure();
 
   bool changed = false;
@@ -155,15 +156,13 @@ LogicalResult ConvertResultsBroadcastableShapeOp::RewriteOp(
     if (!broadcast) continue;
 
     // Check that the operand of the broadcast has fully defined shape.
-    auto broadcast_arg_type =
-        broadcast.getInput().getType().dyn_cast_or_null<RankedTensorType>();
+    auto broadcast_arg_type = mlir::dyn_cast_or_null<RankedTensorType>(
+        broadcast.getInput().getType());
     if (!broadcast_arg_type || !broadcast_arg_type.hasStaticShape()) continue;
 
     // Check that the other argument has fully defined shape.
-    auto argument_type = op->getOpOperand(1 - i)
-                             .get()
-                             .getType()
-                             .dyn_cast_or_null<RankedTensorType>();
+    auto argument_type = mlir::dyn_cast_or_null<RankedTensorType>(
+        op->getOpOperand(1 - i).get().getType());
     if (!argument_type || !argument_type.hasStaticShape()) continue;
 
     // Get the unbroadcasted shapes in the operand order.
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/freeze_global_tensors.cc b/tensorflow/compiler/mlir/tensorflow/transforms/freeze_global_tensors.cc
index 6a1a4852e68a1c..9f9da90bf76594 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/freeze_global_tensors.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/freeze_global_tensors.cc
@@ -86,7 +86,7 @@ void FreezeGlobalTensorsPass::runOnOperation() {
   DenseMap<BlockArgument, bool> freezeable;
   for (auto func : module.getOps<func::FuncOp>()) {
     for (BlockArgument val : func.getArguments()) {
-      if (!getElementTypeOrSelf(val.getType()).isa<TF::ResourceType>())
+      if (!mlir::isa<TF::ResourceType>(getElementTypeOrSelf(val.getType())))
         continue;
 
       // Check that there is only a single global tensor associated with arg.
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/functional_control_flow_to_regions.cc b/tensorflow/compiler/mlir/tensorflow/transforms/functional_control_flow_to_regions.cc
index 0cff8946687dcb..11be79869f4fd2 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/functional_control_flow_to_regions.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/functional_control_flow_to_regions.cc
@@ -30,6 +30,7 @@ limitations under the License.
 #include "mlir/IR/Visitors.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
 #include "mlir/Pass/PassRegistry.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_types.h"
 #include "tensorflow/compiler/mlir/tensorflow/transforms/passes.h"
@@ -101,7 +102,7 @@ YieldOp CreateCall(Operation* op, func::FuncOp func, Region& caller_region,
 
 // Converts the condition for an IfOp/WhileOp to a boolean value.
 Value ConvertConditionToBoolean(Operation* op, Value cond) {
-  if (auto ranked_type = cond.getType().dyn_cast<RankedTensorType>())
+  if (auto ranked_type = mlir::dyn_cast<RankedTensorType>(cond.getType()))
     if (ranked_type.getRank() == 0 &&
         ranked_type.getElementType().isSignlessInteger(1))
       return cond;
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/fused_kernel_matcher.cc b/tensorflow/compiler/mlir/tensorflow/transforms/fused_kernel_matcher.cc
index 1c0a125598cdbe..4eb791a909022d 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/fused_kernel_matcher.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/fused_kernel_matcher.cc
@@ -332,9 +332,9 @@ class FuseMatMulBiasAdd
     }
     // FusedMatMul kernel does not support grad_a/grad_b attrs
     if ((matmul->hasAttr("grad_a") &&
-         matmul->getAttr("grad_a").cast<BoolAttr>().getValue()) ||
+         mlir::cast<BoolAttr>(matmul->getAttr("grad_a")).getValue()) ||
         (matmul->hasAttr("grad_b") &&
-         matmul->getAttr("grad_b").cast<BoolAttr>().getValue())) {
+         mlir::cast<BoolAttr>(matmul->getAttr("grad_b")).getValue())) {
       (void)rewriter.notifyMatchFailure(matmul, [&](Diagnostic &diag) {
         diag << "FusedMatMul kernel does not support grad_a/grad_b attrs";
       });
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/hoist_loop_invariant.cc b/tensorflow/compiler/mlir/tensorflow/transforms/hoist_loop_invariant.cc
index 78fb6aad3abdde..91f14794494de7 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/hoist_loop_invariant.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/hoist_loop_invariant.cc
@@ -23,6 +23,7 @@ limitations under the License.
 #include "mlir/Interfaces/SideEffectInterfaces.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
 #include "mlir/Support/DebugStringHelper.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Transforms/LoopInvariantCodeMotionUtils.h"  // from @llvm-project
 #include "mlir/Transforms/RegionUtils.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
@@ -135,7 +136,7 @@ void HoistLoopInvariantPass::runOnOperation() {
 
   // Skip the pass if the function inputs contain any resource.
   for (const auto &type : func.getArgumentTypes()) {
-    if (getElementTypeOrSelf(type).isa<ResourceType>()) return;
+    if (mlir::isa<ResourceType>(getElementTypeOrSelf(type))) return;
   }
 
   llvm::DenseSet<ResourceHandle> read_only_vars = GetReadOnlyVariables(func);
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/host_runtime/BUILD b/tensorflow/compiler/mlir/tensorflow/transforms/host_runtime/BUILD
index f8e75d9032f3e5..3d046b4c41c51f 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/host_runtime/BUILD
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/host_runtime/BUILD
@@ -252,6 +252,7 @@ cc_library(
         "@llvm-project//mlir:FuncDialect",
         "@llvm-project//mlir:IR",
         "@llvm-project//mlir:Pass",
+        "@llvm-project//mlir:Support",
         "@llvm-project//mlir:Transforms",
         "@local_xla//xla/mlir_hlo",
     ],
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/host_runtime/tpu_metadata_utils.cc b/tensorflow/compiler/mlir/tensorflow/transforms/host_runtime/tpu_metadata_utils.cc
index 767d5cf7f0cf8c..a21c78a9e3ca82 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/host_runtime/tpu_metadata_utils.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/host_runtime/tpu_metadata_utils.cc
@@ -32,6 +32,7 @@ limitations under the License.
 #include "mlir/IR/Diagnostics.h"  // from @llvm-project
 #include "mlir/IR/Operation.h"  // from @llvm-project
 #include "mlir/IR/Types.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_device.h"
 #include "tensorflow/compiler/mlir/tensorflow/utils/attribute_utils.h"
@@ -93,7 +94,7 @@ LogicalResult SetMetadataProtoStepMarkerLocation(
 // Parses a xla::OpSharding from a string attribute.
 LogicalResult SetOpSharding(Operation* op, Attribute attr, llvm::StringRef name,
                             int index, xla::OpSharding* sharding_ptr) {
-  auto sharding_attr = attr.dyn_cast<StringAttr>();
+  auto sharding_attr = mlir::dyn_cast<StringAttr>(attr);
   if (!sharding_attr)
     return op->emitOpError(
         llvm::formatv(kBadStringArrayElementMsg, name, index));
@@ -130,7 +131,7 @@ LogicalResult SetMetadataProtoArgs(
   llvm::SmallSet<int, 4> dynamic_arg_idx_set;
   if (dynamic_arg_idx) {
     for (auto idx : dynamic_arg_idx.getValue()) {
-      dynamic_arg_idx_set.insert(idx.dyn_cast<IntegerAttr>().getInt());
+      dynamic_arg_idx_set.insert(mlir::dyn_cast<IntegerAttr>(idx).getInt());
     }
   }
 
@@ -155,7 +156,8 @@ LogicalResult SetMetadataProtoArgs(
 
     // Populate argument shapes.
     *arg->mutable_shape() = tensorflow::TensorShapeProto();
-    if (auto ranked_tensor_type = operand_type.dyn_cast<RankedTensorType>()) {
+    if (auto ranked_tensor_type =
+            mlir::dyn_cast<RankedTensorType>(operand_type)) {
       tensorflow::TensorShapeProto shape_proto;
       ConvertToTensorShapeProto(ranked_tensor_type.getShape(), &shape_proto);
       *arg->mutable_shape() = std::move(shape_proto);
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/host_runtime/tpu_rewrite_pass.cc b/tensorflow/compiler/mlir/tensorflow/transforms/host_runtime/tpu_rewrite_pass.cc
index ed1e0549dfb769..72521680142248 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/host_runtime/tpu_rewrite_pass.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/host_runtime/tpu_rewrite_pass.cc
@@ -43,6 +43,7 @@ limitations under the License.
 #include "mlir/IR/Visitors.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
 #include "mlir/Pass/PassRegistry.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_device.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
@@ -139,7 +140,7 @@ LogicalResult EncapsulateFuncAndSerialize(const std::string& module_name,
     assert(uses && "expected to be able to collect symbol uses");
     for (SymbolTable::SymbolUse use : *uses) {
       func::FuncOp referenced_func = entry_module_table.lookup<func::FuncOp>(
-          use.getSymbolRef().cast<FlatSymbolRefAttr>().getValue());
+          mlir::cast<FlatSymbolRefAttr>(use.getSymbolRef()).getValue());
 
       // Skip Symbols that do not map to a function.
       if (!referenced_func) continue;
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/host_runtime/tpu_variable_runtime_reformatting.cc b/tensorflow/compiler/mlir/tensorflow/transforms/host_runtime/tpu_variable_runtime_reformatting.cc
index 271e525ef8c7ae..4e87c10b1b7ac6 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/host_runtime/tpu_variable_runtime_reformatting.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/host_runtime/tpu_variable_runtime_reformatting.cc
@@ -34,6 +34,7 @@ limitations under the License.
 #include "mlir/IR/Types.h"  // from @llvm-project
 #include "mlir/IR/Value.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_device.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_types.h"
@@ -73,7 +74,7 @@ struct TPUVariableRuntimeReformattingPass
 // provided, it will be used to store the identity nodes skipped.
 Value SkipIdentity(Value v, bool allow_other_use,
                    llvm::SmallPtrSet<Operation*, 4>* skipped = nullptr) {
-  while (auto result = v.dyn_cast<OpResult>()) {
+  while (auto result = mlir::dyn_cast<OpResult>(v)) {
     if (!(allow_other_use || v.hasOneUse())) break;
     auto op = result.getDefiningOp();
     if (!llvm::isa<TF::IdentityOp, TF::IdentityNOp>(op)) {
@@ -108,10 +109,10 @@ AnnotateCompileOpAndGetExecuteArgToWhileArgsMapping(
   for (auto index_and_arg : llvm::enumerate(execute.getArgs())) {
     auto arg = SkipIdentity(index_and_arg.value(), /*allow_other_use=*/false);
     if (!arg.hasOneUse() ||
-        !getElementTypeOrSelf(arg.getType()).isa<TF::ResourceType>()) {
+        !mlir::isa<TF::ResourceType>(getElementTypeOrSelf(arg.getType()))) {
       continue;
     }
-    auto block_arg = arg.dyn_cast<BlockArgument>();
+    auto block_arg = mlir::dyn_cast<BlockArgument>(arg);
     if (!block_arg || block_arg.getOwner() != &replicate.GetBody()) continue;
     assert(replicate_arg_to_execute_arg.count(block_arg.getArgNumber()) == 0 &&
            "Found duplicate use of a resource in the execute op.");
@@ -131,13 +132,13 @@ AnnotateCompileOpAndGetExecuteArgToWhileArgsMapping(
   // variables (arguments of `replicate`), and must be pass-throughs from while
   // operands.
   for (const auto& mirrored_index : mirrored_variable_indices_attr) {
-    int64_t replicate_arg = mirrored_index.cast<IntegerAttr>().getInt();
+    int64_t replicate_arg = mlir::cast<IntegerAttr>(mirrored_index).getInt();
     // Check if the mirrored variable is an input to `execute`.
     auto it = replicate_arg_to_execute_arg.find(replicate_arg);
     if (it == replicate_arg_to_execute_arg.end()) continue;
     // Get the data type of the resource.
-    auto subtypes = getElementTypeOrSelf(execute.getOperand(it->second))
-                        .cast<TF::ResourceType>()
+    auto subtypes = mlir::cast<TF::ResourceType>(
+                        getElementTypeOrSelf(execute.getOperand(it->second)))
                         .getSubtypes();
     if (subtypes.size() != 1) continue;
     auto data_type = getElementTypeOrSelf(subtypes[0]);
@@ -198,14 +199,14 @@ AnnotateCompileOpAndGetExecuteArgToWhileArgsMapping(
   llvm::sort(mapping, llvm::less_first());
   // Populate the `retval_index_for_sharding` field of the argument metadate.
   for (auto entry : llvm::enumerate(execute.getDeviceVarReadsIndices())) {
-    int64_t arg_index = entry.value().cast<IntegerAttr>().getInt();
+    int64_t arg_index = mlir::cast<IntegerAttr>(entry.value()).getInt();
     auto arg_metadata = metadata.mutable_args(arg_index);
     if (arg_metadata->enable_xla_sharding() ==
         ::tensorflow::tpu::TPUCompileMetadataProto_Arg::ALLOWED) {
-      int64_t ret_index = execute.getDeviceVarUpdatesIndices()
-                              .getValue()[entry.index()]
-                              .cast<IntegerAttr>()
-                              .getInt();
+      int64_t ret_index =
+          mlir::cast<IntegerAttr>(
+              execute.getDeviceVarUpdatesIndices().getValue()[entry.index()])
+              .getInt();
       arg_metadata->set_retval_index_for_sharding(ret_index);
     }
   }
@@ -379,12 +380,13 @@ bool HandleReplicateOp(TF::WhileRegionOp while_op,
 
   for (auto it : device_map) {
     auto device_alias = it.getName().strref();
-    auto device_list = it.getValue().cast<ArrayAttr>();
+    auto device_list = mlir::cast<ArrayAttr>(it.getValue());
     llvm::SmallVector<StringRef, 4> device_list_for_alias;
     device_list_for_alias.reserve(device_list.size());
 
     for (auto device : device_list)
-      device_list_for_alias.emplace_back(device.cast<StringAttr>().getValue());
+      device_list_for_alias.emplace_back(
+          mlir::cast<StringAttr>(device).getValue());
 
     devices.insert({device_alias, device_list_for_alias});
   }
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/initialize_variables_in_session_init.cc b/tensorflow/compiler/mlir/tensorflow/transforms/initialize_variables_in_session_init.cc
index 3b974c395706aa..6e7fe42ef4dfab 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/initialize_variables_in_session_init.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/initialize_variables_in_session_init.cc
@@ -22,6 +22,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinOps.h"  // from @llvm-project
 #include "mlir/IR/SymbolTable.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops_a_m.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops_n_z.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_saved_model.h"
@@ -99,8 +100,7 @@ func::FuncOp GetOrCreateSessionInitFunc(ModuleOp module) {
     // tf_saved_model.initializer_type attribute was introduced.
     SymbolTable symbol_table(module);
     return symbol_table.lookup<func::FuncOp>(
-        session_init_op.getInitializers()[0]
-            .cast<FlatSymbolRefAttr>()
+        mlir::cast<FlatSymbolRefAttr>(session_init_op.getInitializers()[0])
             .getValue());
   } else {
     return CreateSessionInitFunc(module);
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/launch_to_device_attribute.cc b/tensorflow/compiler/mlir/tensorflow/transforms/launch_to_device_attribute.cc
index aa1efc6837eee6..015499c6996f38 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/launch_to_device_attribute.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/launch_to_device_attribute.cc
@@ -22,6 +22,7 @@ limitations under the License.
 #include "mlir/IR/Operation.h"  // from @llvm-project
 #include "mlir/IR/Visitors.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_device.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_executor.h"
@@ -66,7 +67,7 @@ LogicalResult AssignDevicesInRegion(const Dialect* tf_dialect,
       return WalkResult::advance();
     }
 
-    if (auto device_str_attr = device_attr.dyn_cast<StringAttr>()) {
+    if (auto device_str_attr = mlir::dyn_cast<StringAttr>(device_attr)) {
       if (device_str_attr.getValue().empty()) {
         op->setAttr(kDeviceAttr, launch.getDeviceAttr());
         return WalkResult::advance();
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/layout_optimization.cc b/tensorflow/compiler/mlir/tensorflow/transforms/layout_optimization.cc
index 0fad3c019ea432..e8c1d1997e195e 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/layout_optimization.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/layout_optimization.cc
@@ -25,6 +25,7 @@ limitations under the License.
 #include "mlir/Pass/Pass.h"  // from @llvm-project
 #include "mlir/Pass/PassManager.h"  // from @llvm-project
 #include "mlir/Pass/PassRegistry.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Transforms/Passes.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops_layout_helper.h"
@@ -49,7 +50,7 @@ TransposeOp ReuseExistingTranspose(const OpOperand* operand,
     auto tranpose_op = *it;
     for (auto tranpose_operand : tranpose_op.getOperands()) {
       auto ranked_tranpose_type =
-          tranpose_operand.getType().dyn_cast_or_null<RankedTensorType>();
+          mlir::dyn_cast_or_null<RankedTensorType>(tranpose_operand.getType());
       if (!ranked_tranpose_type) continue;
       if (ranked_tranpose_type.getRank() == permutation.size() &&
           operand->get().getType() ==
@@ -201,7 +202,7 @@ void MoveTransposeBefore(Operation* op, SmallVector<Operation*, 8>* work_list) {
       if (!perm) return;
 
       // With the same permutation indices.
-      auto dense_elem_attr = perm.getValue().dyn_cast<DenseElementsAttr>();
+      auto dense_elem_attr = mlir::dyn_cast<DenseElementsAttr>(perm.getValue());
       if (!dense_elem_attr) return;
 
       if (!permutation_op) permutation_op = perm;
@@ -217,7 +218,7 @@ void MoveTransposeBefore(Operation* op, SmallVector<Operation*, 8>* work_list) {
   // Nothing to do here.
   if (!permutation_op || transpose_ops.empty()) return;
   SmallVector<int64_t, 4> permutation;
-  auto perm_attr = permutation_op.getValue().cast<DenseElementsAttr>();
+  auto perm_attr = mlir::cast<DenseElementsAttr>(permutation_op.getValue());
   for (const auto& value : perm_attr.getValues<APInt>())
     permutation.push_back(value.getSExtValue());
 
@@ -227,10 +228,11 @@ void MoveTransposeBefore(Operation* op, SmallVector<Operation*, 8>* work_list) {
   if (op->hasTrait<OpTrait::ResultsBroadcastableShape>()) {
     auto transpose_op = *transpose_ops.begin();
     auto result_type =
-        transpose_op.getResult().getType().dyn_cast_or_null<ShapedType>();
+        mlir::dyn_cast_or_null<ShapedType>(transpose_op.getResult().getType());
     auto is_valid_move =
         llvm::all_of(op->getOperands(), [result_type](Value operand) -> bool {
-          auto operand_type = operand.getType().dyn_cast_or_null<ShapedType>();
+          auto operand_type =
+              mlir::dyn_cast_or_null<ShapedType>(operand.getType());
           return result_type && operand_type && result_type.hasRank() &&
                  operand_type.hasRank() &&
                  result_type.getRank() == operand_type.getRank();
@@ -343,7 +345,7 @@ void MoveTransposeAfter(Operation* op, SmallVector<Operation*, 8>* work_list,
     if (!perm) return;
 
     // With the same permutation indices.
-    auto dense_elem_attr = perm.getValue().dyn_cast<DenseElementsAttr>();
+    auto dense_elem_attr = mlir::dyn_cast<DenseElementsAttr>(perm.getValue());
     if (!dense_elem_attr) return;
 
     if (!permutation_op) permutation_op = perm;
@@ -365,7 +367,7 @@ void MoveTransposeAfter(Operation* op, SmallVector<Operation*, 8>* work_list,
 
   SmallVector<int64_t, 8> permutation;
 
-  auto attr = permutation_op.getValue().cast<DenseElementsAttr>();
+  auto attr = mlir::cast<DenseElementsAttr>(permutation_op.getValue());
   for (const auto& value : attr.getValues<APInt>())
     permutation.push_back(value.getSExtValue());
 
@@ -373,7 +375,7 @@ void MoveTransposeAfter(Operation* op, SmallVector<Operation*, 8>* work_list,
   if (fold_operands && fold_transpose_in_ops) {
     SmallVector<int64_t, 8> permutation;
 
-    auto attr = permutation_op.getValue().cast<DenseElementsAttr>();
+    auto attr = mlir::cast<DenseElementsAttr>(permutation_op.getValue());
     for (const auto& value : attr.getValues<APInt>())
       permutation.push_back(value.getSExtValue());
 
@@ -408,7 +410,7 @@ void MoveTransposeAfter(Operation* op, SmallVector<Operation*, 8>* work_list,
     // update the result type in `FoldOperandsPermutation`.
     if (layout_agnostic)
       result.setType(ReversePermuteShapedType(
-          result.getType().cast<ShapedType>(), permutation));
+          mlir::cast<ShapedType>(result.getType()), permutation));
 
     // Try to push transpose further down.
     for (Operation* user : result.getUsers()) {
@@ -422,7 +424,7 @@ void MoveTransposeAfter(Operation* op, SmallVector<Operation*, 8>* work_list,
       transpose.getOperation()->moveBefore(op->getNextNode());
       transpose.setOperand(0, result);
       transpose.setOperand(1, permutation_op);
-      transpose.getResult().setType(original_type[idx].cast<TensorType>());
+      transpose.getResult().setType(mlir::cast<TensorType>(original_type[idx]));
     } else {
       transpose = builder.create<TransposeOp>(loc, result, permutation_op);
     }
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/lift_variables.cc b/tensorflow/compiler/mlir/tensorflow/transforms/lift_variables.cc
index bc0534fdb0bb84..c4ea84d8b0948c 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/lift_variables.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/lift_variables.cc
@@ -189,10 +189,10 @@ LogicalResult LiftVariables(ModuleOp module, Session* session) {
           func, arg_number, symbol_table);
       if (!global_tensor) continue;
 
-      auto arg_type = arg.getType().cast<RankedTensorType>();
+      auto arg_type = mlir::cast<RankedTensorType>(arg.getType());
       assert(arg_type.getRank() == 0);
       llvm::ArrayRef<TensorType> underlying_type =
-          arg_type.getElementType().cast<TF::ResourceType>().getSubtypes();
+          mlir::cast<TF::ResourceType>(arg_type.getElementType()).getSubtypes();
 
       // If the arg type already matches the global_tensor type, we don't need
       // to do anything.
@@ -206,7 +206,7 @@ LogicalResult LiftVariables(ModuleOp module, Session* session) {
       auto new_arg_type = mlir::RankedTensorType::get(
           /*shape=*/{},
           mlir::TF::ResourceType::get(
-              /*subtypes=*/{global_tensor.getType().cast<TensorType>()},
+              /*subtypes=*/{mlir::cast<TensorType>(global_tensor.getType())},
               module.getContext()));
 
       arg.setType(new_arg_type);
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/lower_globals_to_ml_program.cc b/tensorflow/compiler/mlir/tensorflow/transforms/lower_globals_to_ml_program.cc
index cdb256ab25f177..8d58b8177b33c8 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/lower_globals_to_ml_program.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/lower_globals_to_ml_program.cc
@@ -47,7 +47,7 @@ static LogicalResult traceUpwardsToArgument(Value v, llvm::DenseSet<Value> seen,
   }
   seen.insert(v);
 
-  if (auto blockArg = v.dyn_cast<BlockArgument>()) {
+  if (auto blockArg = mlir::dyn_cast<BlockArgument>(v)) {
     Operation *op = blockArg.getOwner()->getParentOp();
 
     // If we're in the first block, then the argument to that block is the
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/lower_tf.cc b/tensorflow/compiler/mlir/tensorflow/transforms/lower_tf.cc
index 1c9b1e03a663c6..da565f00b45b99 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/lower_tf.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/lower_tf.cc
@@ -29,6 +29,7 @@ limitations under the License.
 #include "mlir/IR/PatternMatch.h"  // from @llvm-project
 #include "mlir/IR/TypeRange.h"  // from @llvm-project
 #include "mlir/IR/TypeUtilities.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops_a_m.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops_n_z.h"
@@ -79,7 +80,7 @@ static DenseElementsAttr GetF32Scalar(OpBuilder *builder, float value) {
 // Preconditions: The given value must have a ShapedType.
 static Value CreateTFCastOpF32(OpBuilder *builder, Location loc, Value x,
                                BoolAttr truncate) {
-  auto x_type = x.getType().dyn_cast_or_null<ShapedType>();
+  auto x_type = mlir::dyn_cast_or_null<ShapedType>(x.getType());
   if (!x_type) llvm_unreachable("unsupported type");
   Type type = x_type.clone(builder->getF32Type());
   return builder->create<CastOp>(loc, type, x, truncate);
@@ -92,7 +93,7 @@ static Value CreateTFCastOpF32(OpBuilder *builder, Location loc, Value x,
 // Preconditions: The given value must have a ShapedType.
 static Value CreateTFCastOpI32(OpBuilder *builder, Location loc, Value x,
                                BoolAttr truncate) {
-  auto x_type = x.getType().dyn_cast_or_null<ShapedType>();
+  auto x_type = mlir::dyn_cast_or_null<ShapedType>(x.getType());
   if (!x_type) llvm_unreachable("unsupported type");
   Type type = x_type.clone(builder->getI32Type());
   return builder->create<CastOp>(loc, type, x, truncate);
@@ -109,7 +110,8 @@ static APFloat ConvertToAPFloat(double val, Type type) {
 // Performs the operation of `Shape(input)[idx]`.
 static Value GetDimensionSize(OpBuilder *builder, Location loc, Value input,
                               int32_t idx, BoolAttr use_32bit) {
-  if (auto ranked_ty = input.getType().dyn_cast_or_null<RankedTensorType>()) {
+  if (auto ranked_ty =
+          mlir::dyn_cast_or_null<RankedTensorType>(input.getType())) {
     // Canonicalize negative index.
     if (idx < 0) {
       idx += ranked_ty.getRank();
@@ -154,7 +156,7 @@ bool QuantizedTypeIsUnsigned(Type type) {
 // to offset the quantized representation before it gets scaled. In the case
 // of negative quantize types, this offset is half the type's range.
 static DenseElementsAttr DequantizeHalfRange(OpBuilder *builder, Value input) {
-  auto input_type = input.getType().dyn_cast_or_null<ShapedType>();
+  auto input_type = mlir::dyn_cast_or_null<ShapedType>(input.getType());
   if (!input_type) llvm_unreachable("DequantizeHalfRange: not a ShapedType");
   bool is_unsigned = QuantizedTypeIsUnsigned(input_type.getElementType());
   float half_range = is_unsigned ? 0 : 128;
@@ -183,7 +185,7 @@ DenseIntElementsAttr GetBiasAddGradReductionIndices(int64_t rank,
 // Infers ExpandDims op output type for the given input type `ty` and dimension
 // to expand at the given `axis`.
 Type InferExpandDimsType(Type ty, int64_t axis, Builder *builder) {
-  auto ranked_ty = ty.dyn_cast<RankedTensorType>();
+  auto ranked_ty = mlir::dyn_cast<RankedTensorType>(ty);
 
   // Unranked type.
   if (!ranked_ty) return ty;
@@ -258,7 +260,7 @@ class LowerAddNOp : public RewritePattern {
 
     // TODO(hinsu): Support variant with TensorList type. tf.AddV2 doesn't
     // support variant type so variant types require special handling.
-    if (getElementTypeOrSelf(addn_op.getType()).isa<VariantType>())
+    if (mlir::isa<VariantType>(getElementTypeOrSelf(addn_op.getType())))
       return failure();
     llvm::SmallVector<Value, 4> operands(addn_op.getInputs().begin(),
                                          addn_op.getInputs().end());
@@ -324,8 +326,7 @@ class LowerDynamicStitchOp : public RewritePattern {
     // Static output type is used to compute intermediate values. Note that the
     // output type doesn't have to be static but if input types and indices are
     // constant, then the output type can be statically determined.
-    RankedTensorType out_ty =
-        op.getType().template dyn_cast<RankedTensorType>();
+    RankedTensorType out_ty = mlir::dyn_cast<RankedTensorType>(op.getType());
     if (!out_ty || !out_ty.hasStaticShape()) return failure();
 
     // Extract out all the constant indices' attributes and verify that data
@@ -341,7 +342,7 @@ class LowerDynamicStitchOp : public RewritePattern {
       indices.push_back(index_attr);
 
       RankedTensorType data_ty =
-          data.getType().template dyn_cast<RankedTensorType>();
+          mlir::dyn_cast<RankedTensorType>(data.getType());
       if (!data_ty || !data_ty.hasStaticShape()) return failure();
     }
 
@@ -367,9 +368,8 @@ class LowerDynamicStitchOp : public RewritePattern {
 
       auto reshaped_data =
           rewriter.create<ReshapeOp>(loc, data, packed_shape_val);
-      auto num_items = reshaped_data.getType()
-                           .template cast<RankedTensorType>()
-                           .getShape()[0];
+      auto num_items =
+          mlir::cast<RankedTensorType>(reshaped_data.getType()).getShape()[0];
       auto items = rewriter.create<UnpackOp>(
           loc, SmallVector<Type, 4>(num_items, item_ty), reshaped_data,
           /*axis=*/0);
@@ -407,7 +407,7 @@ class ConvertFakeQuantWithMinMaxVarsOp : public RewritePattern {
     auto op = cast<FakeQuantWithMinMaxVarsOp>(src_op);
 
     auto input = op.getInputs();
-    auto input_ty = input.getType().cast<ShapedType>();
+    auto input_ty = mlir::cast<ShapedType>(input.getType());
     auto element_ty = input_ty.getElementType();
     auto scalar_ty = tensorflow::GetTypeFromTFTensorShape({}, element_ty);
 
@@ -534,7 +534,7 @@ class LowerInvertPermutationOp : public RewritePattern {
     auto op = cast<InvertPermutationOp>(src_op);
 
     Location loc = op.getLoc();
-    auto x_type = op.getX().getType().dyn_cast<RankedTensorType>();
+    auto x_type = mlir::dyn_cast<RankedTensorType>(op.getX().getType());
     // x input must have static shape.
     if (!x_type || !x_type.hasStaticShape()) {
       return failure();
@@ -617,12 +617,13 @@ class LowerLgammaOp : public RewritePattern {
 
     Location loc = op.getLoc();
     Value input = op.getX();
-    TensorType original_tensor_type = op.getX().getType().cast<TensorType>();
+    TensorType original_tensor_type =
+        mlir::cast<TensorType>(op.getX().getType());
 
     // The approximation is not precise enough for float16. Do the computation
     // in float32 for that case.
     TensorType tensor_type = original_tensor_type;
-    FloatType float_type = tensor_type.getElementType().cast<FloatType>();
+    FloatType float_type = mlir::cast<FloatType>(tensor_type.getElementType());
     bool needs_cast = float_type.getWidth() < 32;
     if (needs_cast) {
       MLIRContext *context = rewriter.getContext();
@@ -887,17 +888,18 @@ class LowerSpaceToBatchNDOp : public RewritePattern {
     auto op = cast<SpaceToBatchNDOp>(src_op);
 
     Location loc = op.getLoc();
-    auto input_type = op.getInput().getType().cast<TensorType>();
+    auto input_type = mlir::cast<TensorType>(op.getInput().getType());
     auto element_type = input_type.getElementType();
     if (!input_type.hasStaticShape()) {
       return failure();
     }
     ArrayRef<int64_t> input_shape = input_type.getShape();
-    auto block_shape_type = op.getBlockShape().getType().cast<TensorType>();
+    auto block_shape_type =
+        mlir::cast<TensorType>(op.getBlockShape().getType());
     if (!block_shape_type.hasStaticShape()) {
       return failure();
     }
-    auto paddings_type = op.getPaddings().getType().cast<ShapedType>();
+    auto paddings_type = mlir::cast<ShapedType>(op.getPaddings().getType());
     if (!paddings_type.hasRank()) {
       return failure();
     }
@@ -1100,7 +1102,7 @@ class LowerBatchToSpaceND : public RewritePattern {
                                 PatternRewriter &rewriter) const override {
     auto op = cast<BatchToSpaceNDOp>(src_op);
     auto input = op.getInput();
-    auto input_ty = input.getType().cast<ShapedType>();
+    auto input_ty = mlir::cast<ShapedType>(input.getType());
     auto element_ty = input_ty.getElementType();
     if (!input_ty.hasStaticShape()) {
       return failure();
@@ -1279,9 +1281,7 @@ class LowerSparseMatMulOp : public RewritePattern {
 
     // Result type must be f32 for applying the pattern (currently this is
     // required by the op anyway but this might change).
-    if (!op.getProduct()
-             .getType()
-             .cast<TensorType>()
+    if (!mlir::cast<TensorType>(op.getProduct().getType())
              .getElementType()
              .isF32()) {
       return failure();
@@ -1289,7 +1289,7 @@ class LowerSparseMatMulOp : public RewritePattern {
     MLIRContext *context = rewriter.getContext();
     llvm::SmallVector<Value, 2> operands{op.getA(), op.getB()};
     for (Value &operand : operands) {
-      TensorType tensor_type = operand.getType().cast<TensorType>();
+      TensorType tensor_type = mlir::cast<TensorType>(operand.getType());
       Type element_type = tensor_type.getElementType();
       if (element_type.isF32()) continue;
       // Element type can either be f32 or bf16 for `SparseMatMulOp` so it
@@ -1374,13 +1374,13 @@ class LowerResizeNearestNeighbor : public RewritePattern {
                                 PatternRewriter &rewriter) const override {
     auto op = cast<ResizeNearestNeighborOp>(src_op);
     auto loc = op.getLoc();
-    auto result_ty = op.getType().cast<ShapedType>();
+    auto result_ty = mlir::cast<ShapedType>(op.getType());
 
     auto input = op.getImages();
-    auto input_ty = input.getType().cast<ShapedType>();
+    auto input_ty = mlir::cast<ShapedType>(input.getType());
     auto input_element_ty = input_ty.getElementType();
     auto out_size = op.getSize();
-    auto out_size_ty = out_size.getType().cast<ShapedType>();
+    auto out_size_ty = mlir::cast<ShapedType>(out_size.getType());
     auto out_size_element_ty = out_size_ty.getElementType();
 
     // Input should be rank 4.
@@ -1620,7 +1620,7 @@ struct LowerRollOp : public RewritePattern {
     auto tf_roll_op = cast<RollOp>(op);
 
     auto input_ty =
-        tf_roll_op.getInput().getType().dyn_cast<RankedTensorType>();
+        mlir::dyn_cast<RankedTensorType>(tf_roll_op.getInput().getType());
     if (!input_ty || !input_ty.hasStaticShape()) {
       return rewriter.notifyMatchFailure(
           op, "require the type of input to have static shapes");
@@ -1628,7 +1628,8 @@ struct LowerRollOp : public RewritePattern {
 
     DenseIntElementsAttr shift_attr;
     Value shift = tf_roll_op.getShift();
-    auto shift_ranked_attr_type = shift.getType().dyn_cast<RankedTensorType>();
+    auto shift_ranked_attr_type =
+        mlir::dyn_cast<RankedTensorType>(shift.getType());
     if (!shift_ranked_attr_type ||
         !matchPattern(shift, m_Constant(&shift_attr))) {
       return failure();
@@ -1636,7 +1637,8 @@ struct LowerRollOp : public RewritePattern {
 
     DenseIntElementsAttr axis_attr;
     Value axis = tf_roll_op.getAxis();
-    auto axis_ranked_attr_type = axis.getType().dyn_cast<RankedTensorType>();
+    auto axis_ranked_attr_type =
+        mlir::dyn_cast<RankedTensorType>(axis.getType());
     if (!axis_ranked_attr_type || !matchPattern(axis, m_Constant(&axis_attr))) {
       return failure();
     }
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/optimize.cc b/tensorflow/compiler/mlir/tensorflow/transforms/optimize.cc
index cd608bdf269ad7..80e7cd3991c727 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/optimize.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/optimize.cc
@@ -22,6 +22,7 @@ limitations under the License.
 #include "mlir/IR/PatternMatch.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
 #include "mlir/Pass/PassManager.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"  // from @llvm-project
 #include "mlir/Transforms/Passes.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/lite/utils/validators.h"
@@ -57,13 +58,14 @@ class SimplifyBroadcastReshape : public OpRewritePattern<BroadcastToOp> {
     auto reshape_op = llvm::dyn_cast_or_null<ReshapeOp>(user);
     if (!reshape_op) return failure();
 
-    auto reshape_type = reshape_op.getOutput().getType().cast<ShapedType>();
+    auto reshape_type =
+        mlir::cast<ShapedType>(reshape_op.getOutput().getType());
 
     if (!reshape_type.hasStaticShape()) return failure();
     ArrayRef<int64_t> reshape_shape = reshape_type.getShape();
 
-    auto input_type = op.getInput().getType().cast<ShapedType>();
-    auto output_type = op.getOutput().getType().cast<ShapedType>();
+    auto input_type = mlir::cast<ShapedType>(op.getInput().getType());
+    auto output_type = mlir::cast<ShapedType>(op.getOutput().getType());
 
     if (!input_type.hasRank() || !output_type.hasRank()) return failure();
 
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/optimize_global_tensors.cc b/tensorflow/compiler/mlir/tensorflow/transforms/optimize_global_tensors.cc
index eaf881c43df95e..bfed05448bd25a 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/optimize_global_tensors.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/optimize_global_tensors.cc
@@ -94,7 +94,7 @@ GlobalTensorUsesMap CreateGlobalTensorUsesMap(ModuleOp module) {
         continue;
       }
       auto global_tensor = symbol_table.lookup<GlobalTensorOp>(
-          sym.cast<FlatSymbolRefAttr>().getValue());
+          mlir::cast<FlatSymbolRefAttr>(sym).getValue());
       if (!global_tensor) {
         continue;
       }
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/prepare_tpu_computation_for_tf_export.cc b/tensorflow/compiler/mlir/tensorflow/transforms/prepare_tpu_computation_for_tf_export.cc
index 661dafe2a2f327..b968923089cb8f 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/prepare_tpu_computation_for_tf_export.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/prepare_tpu_computation_for_tf_export.cc
@@ -25,6 +25,7 @@ limitations under the License.
 #include "mlir/IR/Value.h"  // from @llvm-project
 #include "mlir/IR/Visitors.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/op_or_arg_name_mapper.h"
@@ -79,8 +80,8 @@ class RewriteXlaHostComputeMlir
     llvm::SmallVector<Attribute> shape_attrs;
     shape_attrs.reserve(op.getNumResults());
     for (Type ty : op.getResultTypes()) {
-      shape_attrs.push_back(
-          TF::ShapeAttr::get(rewriter.getContext(), ty.cast<ShapedType>()));
+      shape_attrs.push_back(TF::ShapeAttr::get(rewriter.getContext(),
+                                               mlir::cast<ShapedType>(ty)));
     }
 
     // Clone the `host_func` in the `host_mlir_module` attribute if it exists
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/promote_resources_to_args.cc b/tensorflow/compiler/mlir/tensorflow/transforms/promote_resources_to_args.cc
index a7226b39ebe380..bc64c48c81a596 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/promote_resources_to_args.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/promote_resources_to_args.cc
@@ -30,6 +30,7 @@ limitations under the License.
 #include "mlir/IR/Types.h"  // from @llvm-project
 #include "mlir/IR/Value.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_types.h"
@@ -196,8 +197,8 @@ LogicalResult PromoteResourcesToArguments(
   auto func_args = function.getArguments().take_front(
       function.getNumArguments() - var_handle_shared_names.size());
   for (BlockArgument& func_arg : func_args) {
-    auto resource_type =
-        getElementTypeOrSelf(func_arg.getType()).dyn_cast<TF::ResourceType>();
+    auto resource_type = mlir::dyn_cast<TF::ResourceType>(
+        getElementTypeOrSelf(func_arg.getType()));
     if (!resource_type) continue;
     if (failed(ValidateResourceArgument(function, func_arg, resource_type)))
       return failure();
@@ -212,8 +213,8 @@ LogicalResult PromoteResourcesToArguments(
   auto var_handle_args =
       function.getArguments().take_back(var_handle_shared_names.size());
   for (BlockArgument& var_handle_arg : var_handle_args) {
-    auto resource_type =
-        getElementTypeOrSelf(var_handle_arg.getType()).cast<TF::ResourceType>();
+    auto resource_type = mlir::cast<TF::ResourceType>(
+        getElementTypeOrSelf(var_handle_arg.getType()));
     add_resource_argument(var_handle_arg, resource_type);
   }
 
@@ -226,7 +227,8 @@ LogicalResult PromoteResourcesToArguments(
   // live value.
   for (Operation& op : llvm::make_early_inc_range(block)) {
     if (auto read_op = llvm::dyn_cast<TF::ReadVariableOp>(&op)) {
-      if (auto func_arg = read_op.getResource().dyn_cast<BlockArgument>()) {
+      if (auto func_arg =
+              mlir::dyn_cast<BlockArgument>(read_op.getResource())) {
         if (func_arg.getOwner() != &block)
           return read_op.emitOpError(kResourceFunctionMsg);
 
@@ -239,7 +241,8 @@ LogicalResult PromoteResourcesToArguments(
 
       read_op.erase();
     } else if (auto write_op = llvm::dyn_cast<TF::AssignVariableOp>(&op)) {
-      if (auto func_arg = write_op.getResource().dyn_cast<BlockArgument>()) {
+      if (auto func_arg =
+              mlir::dyn_cast<BlockArgument>(write_op.getResource())) {
         if (func_arg.getOwner() != &block)
           return write_op.emitOpError(kResourceFunctionMsg);
 
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/readonly_references_to_resources.cc b/tensorflow/compiler/mlir/tensorflow/transforms/readonly_references_to_resources.cc
index 975a1484d6984a..7c488b8992d2cb 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/readonly_references_to_resources.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/readonly_references_to_resources.cc
@@ -26,6 +26,7 @@ limitations under the License.
 #include "mlir/IR/Types.h"  // from @llvm-project
 #include "mlir/IR/Value.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_types.h"
 #include "tensorflow/compiler/mlir/tensorflow/transforms/passes.h"
@@ -91,7 +92,7 @@ StringRef GetNodeNameFromClassAttrOrSharedNameAttr(Operation *op) {
 
   StringRef result;
   for (Attribute class_attr : classes_attr) {
-    StringRef node_name = class_attr.cast<StringAttr>().getValue();
+    StringRef node_name = mlir::cast<StringAttr>(class_attr).getValue();
     if (!node_name.starts_with(kLocationPrefix)) {
       continue;
     }
@@ -150,8 +151,8 @@ void ConvertReadonlyReferenceVariablesToResourceVariablesPass::
   for (VariableV2Op variable_v2_op : variable_v2s_to_replace) {
     builder.setInsertionPoint(variable_v2_op);
     ShapedType shaped_type =
-        variable_v2_op.getResult().getType().cast<ShapedType>();
-    TensorType tensor_type = DropRefType(shaped_type).cast<TensorType>();
+        mlir::cast<ShapedType>(variable_v2_op.getResult().getType());
+    TensorType tensor_type = mlir::cast<TensorType>(DropRefType(shaped_type));
     StringAttr device_attr =
         variable_v2_op->getAttrOfType<StringAttr>("device");
     if (!device_attr) device_attr = builder.getStringAttr("");
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/region_control_flow_to_functional.cc b/tensorflow/compiler/mlir/tensorflow/transforms/region_control_flow_to_functional.cc
index a669276e35a175..b740e667dabe84 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/region_control_flow_to_functional.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/region_control_flow_to_functional.cc
@@ -508,10 +508,10 @@ LogicalResult RegionControlFlowToFunctional::ConvertWhileOp(
   // existing function as is.
   auto while_arg_matcher = [](Value first, Region& first_region, Value second,
                               Region& second_region) {
-    if (!first.isa<BlockArgument>() || !second.isa<BlockArgument>())
+    if (!mlir::isa<BlockArgument>(first) || !mlir::isa<BlockArgument>(second))
       return false;
-    BlockArgument first_block_arg = first.cast<BlockArgument>();
-    BlockArgument second_block_arg = second.cast<BlockArgument>();
+    BlockArgument first_block_arg = mlir::cast<BlockArgument>(first);
+    BlockArgument second_block_arg = mlir::cast<BlockArgument>(second);
 
     // 2 block arguments will match if they are the same argument number, and
     // are block arguments of the corresponding containing regions.
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/remove_unused_arguments.cc b/tensorflow/compiler/mlir/tensorflow/transforms/remove_unused_arguments.cc
index 6aa3d161c0e121..18f54d6b5826d3 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/remove_unused_arguments.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/remove_unused_arguments.cc
@@ -31,6 +31,7 @@ limitations under the License.
 #include "mlir/Interfaces/ControlFlowInterfaces.h"  // from @llvm-project
 #include "mlir/Interfaces/FunctionInterfaces.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 
 namespace mlir {
 namespace TF {
@@ -137,7 +138,7 @@ void RemoveUnusedArgumentsPass::runOnOperation() {
     // SymbolUserOpInterface doesn't tell us which attributes contain
     // the symbols, so we have to scan through all of them.
     for (auto attr : op->getAttrs()) {
-      if (auto sym = attr.getValue().dyn_cast<FlatSymbolRefAttr>()) {
+      if (auto sym = mlir::dyn_cast<FlatSymbolRefAttr>(attr.getValue())) {
         Operation* func = mlir::SymbolTable::lookupNearestSymbolFrom(op, sym);
         if (func) {
           do_not_touch.insert(func);
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/remove_vars_in_session_initializer.cc b/tensorflow/compiler/mlir/tensorflow/transforms/remove_vars_in_session_initializer.cc
index 9e85c5f9ed6fda..3a6377a3bb63e1 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/remove_vars_in_session_initializer.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/remove_vars_in_session_initializer.cc
@@ -55,7 +55,7 @@ void RecursiveRemove(Operation* op,
   erase_list.push_back(op);
 
   for (auto& use : op->getOpOperands()) {
-    if (auto op_result = use.get().dyn_cast<mlir::OpResult>()) {
+    if (auto op_result = mlir::dyn_cast<mlir::OpResult>(use.get())) {
       Operation* def = op_result.getDefiningOp();
       if (!dead_ops.insert(def).second) continue;
       RecursiveRemove(def, erase_list, dead_ops);
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/replicate_invariant_op_hoisting.cc b/tensorflow/compiler/mlir/tensorflow/transforms/replicate_invariant_op_hoisting.cc
index 1c9558eecda702..803f135af624d7 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/replicate_invariant_op_hoisting.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/replicate_invariant_op_hoisting.cc
@@ -25,6 +25,7 @@ limitations under the License.
 #include "mlir/IR/Value.h"  // from @llvm-project
 #include "mlir/IR/Visitors.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Transforms/RegionUtils.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_device.h"
@@ -90,7 +91,7 @@ void MakeShapeOpInvariant(tf_device::ReplicateOp replicate_op, int num_replicas,
   Value input = shape_op.getInput();
   // If ShapeOp operand is replicate tensor block argument, replace with the
   // associated first replica operand.
-  if (auto block_arg = input.dyn_cast<BlockArgument>()) {
+  if (auto block_arg = mlir::dyn_cast<BlockArgument>(input)) {
     if (block_arg.getOwner() != replicate_block) return;
 
     shape_op.setOperand(replicate_op.GetReplicaOperandForBlockArgument(
@@ -112,7 +113,8 @@ void MakeShapeOpInvariant(tf_device::ReplicateOp replicate_op, int num_replicas,
   // shape has not changed in replicate prior to read. Currently after both
   // ResourceOpLiftingPass and TPURewritePass, there should not be any updates
   // to resources prior to their respective ReadVariableOp.
-  if (auto block_arg = read_var_op.getResource().dyn_cast<BlockArgument>()) {
+  if (auto block_arg =
+          mlir::dyn_cast<BlockArgument>(read_var_op.getResource())) {
     if (block_arg.getOwner() != replicate_block) return;
 
     OpBuilder builder(shape_op);
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/resource_op_lifting.cc b/tensorflow/compiler/mlir/tensorflow/transforms/resource_op_lifting.cc
index e03eb9a9228f35..90397e7f8237c9 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/resource_op_lifting.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/resource_op_lifting.cc
@@ -74,14 +74,14 @@ struct ResourceOpLiftingPass
 };
 
 bool IsResource(Value value) {
-  return getElementTypeOrSelf(value.getType()).isa<TF::ResourceType>();
+  return mlir::isa<TF::ResourceType>(getElementTypeOrSelf(value.getType()));
 }
 
 // Get the type of the data contained in a resource. Returns null if there is
 // no single type in the resource.
 Type GetResourceSubtype(Value value) {
   auto resource_type =
-      getElementTypeOrSelf(value.getType()).dyn_cast<TF::ResourceType>();
+      mlir::dyn_cast<TF::ResourceType>(getElementTypeOrSelf(value.getType()));
   auto subtypes = resource_type.getSubtypes();
   if (subtypes.size() == 1) return subtypes[0];
   return nullptr;
@@ -691,7 +691,7 @@ void RemoveUnusedResourceArgumentsAndForwardedRetvals(
   int64_t skipped_retvals = 0;
   for (auto entry : llvm::enumerate(old_return_vals)) {
     auto return_val = entry.value();
-    if (auto arg = return_val.dyn_cast<BlockArgument>()) {
+    if (auto arg = mlir::dyn_cast<BlockArgument>(return_val)) {
       auto it = infos.find(arg.getArgNumber());
       if (it != infos.end() && !it->getSecond().used) {
         return_op->eraseOperand(entry.index() - skipped_retvals++);
@@ -747,7 +747,7 @@ LogicalResult LiftArgRetResourcesForFunction(
   // with type replaced.
   llvm::SmallVector<Value, 4> skipped_args;
   for (auto& it : hoister.GetResources()) {
-    BlockArgument arg = it.first.dyn_cast<BlockArgument>();
+    BlockArgument arg = mlir::dyn_cast<BlockArgument>(it.first);
     assert(arg && "Expect resources for FuncOp to be its arguments");
     auto type_iter = resource_data_types.find(arg.getArgNumber());
     if (type_iter == resource_data_types.end()) {
@@ -772,7 +772,7 @@ LogicalResult LiftArgRetResourcesForFunction(
     Value resource = assign_variable_op.getResource();
     if (!hoister.Contains(resource)) continue;
 
-    auto arg = resource.dyn_cast<BlockArgument>();
+    auto arg = mlir::dyn_cast<BlockArgument>(resource);
     handle_updated_arg_value(arg.getArgNumber(), assign_variable_op.getValue());
     assign_variable_op.erase();
   }
@@ -1018,11 +1018,11 @@ LogicalResult HandlePartitionedCallOpCallee(
   for (auto entry :
        llvm::enumerate(callee.front().getTerminator()->getOperands())) {
     auto retval = entry.value();
-    if (!getElementTypeOrSelf(retval.getType()).isa<TF::ResourceType>()) {
+    if (!mlir::isa<TF::ResourceType>(getElementTypeOrSelf(retval.getType()))) {
       result->old_to_new_output_indices.push_back(non_resource_results++);
       continue;
     }
-    auto aliasing_arg = retval.dyn_cast<BlockArgument>();
+    auto aliasing_arg = mlir::dyn_cast<BlockArgument>(retval);
     if (!aliasing_arg) {
       return callee.emitOpError("unsupported function call: ")
              << "resource return value does not alias an input.";
@@ -1063,7 +1063,7 @@ LogicalResult HandlePartitionedCallOpCallee(
   llvm::SmallVector<int64_t, 4> retval_indices_to_preserve;
   for (auto& val : callee.front().getTerminator()->getOpOperands()) {
     // Store indices of results that are not resources.
-    if (!getElementTypeOrSelf(val.get().getType()).isa<TF::ResourceType>())
+    if (!mlir::isa<TF::ResourceType>(getElementTypeOrSelf(val.get().getType())))
       retval_indices_to_preserve.push_back(val.getOperandNumber());
   }
   int64_t num_retvals = retval_indices_to_preserve.size();
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/resource_op_lifting_cleanup.cc b/tensorflow/compiler/mlir/tensorflow/transforms/resource_op_lifting_cleanup.cc
index 2f1c675b305516..303e5aa2b6ddeb 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/resource_op_lifting_cleanup.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/resource_op_lifting_cleanup.cc
@@ -24,6 +24,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinOps.h"  // from @llvm-project
 #include "mlir/IR/Value.h"  // from @llvm-project
 #include "mlir/IR/Visitors.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_device.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_types.h"
@@ -32,7 +33,7 @@ namespace mlir {
 namespace {
 
 bool IsResource(Value value) {
-  return getElementTypeOrSelf(value.getType()).isa<TF::ResourceType>();
+  return mlir::isa<TF::ResourceType>(getElementTypeOrSelf(value.getType()));
 }
 
 // Checks if a cast op is casting a resource -> resource.
@@ -182,7 +183,7 @@ void EliminateUnusedResultsForIfCase(Operation *op,
     if (cloned == func) continue;
     // Patch up the op attribute to point to the new function.
     for (NamedAttribute attr : op->getAttrs()) {
-      auto symref = attr.getValue().dyn_cast<FlatSymbolRefAttr>();
+      auto symref = mlir::dyn_cast<FlatSymbolRefAttr>(attr.getValue());
       if (!symref) continue;
       if (symref.getValue() != func.getName()) continue;
       op->setAttr(attr.getName(),
@@ -301,7 +302,8 @@ LogicalResult ForwardCommonArgToOutput(Operation *op,
     std::optional<int> common_arg_index;
     for (func::FuncOp func : branches) {
       auto ret = func.front().getTerminator();
-      auto block_arg = ret->getOperand(result_idx).dyn_cast<BlockArgument>();
+      auto block_arg =
+          mlir::dyn_cast<BlockArgument>(ret->getOperand(result_idx));
       if (!block_arg) {
         return op->emitOpError("result #")
                << result_idx << " not tied to function argument for branch @"
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/rewrite_util.h b/tensorflow/compiler/mlir/tensorflow/transforms/rewrite_util.h
index c86c4383cc602f..4dd6ae7c8e4a7d 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/rewrite_util.h
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/rewrite_util.h
@@ -18,6 +18,7 @@ limitations under the License.
 
 #include "mlir/IR/Matchers.h"  // from @llvm-project
 #include "mlir/IR/PatternMatch.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 
 namespace mlir {
 namespace TF {
@@ -27,13 +28,13 @@ namespace TF {
 template <typename T>
 DenseElementsAttr GetScalarOfType(Type ty, T raw_value) {
   RankedTensorType scalar_ty = RankedTensorType::get({}, ty);
-  if (auto float_ty = ty.dyn_cast<FloatType>()) {
+  if (auto float_ty = mlir::dyn_cast<FloatType>(ty)) {
     FloatAttr attr = FloatAttr::get(float_ty, raw_value);
     return DenseElementsAttr::get(scalar_ty, attr);
-  } else if (auto int_ty = ty.dyn_cast<IntegerType>()) {
+  } else if (auto int_ty = mlir::dyn_cast<IntegerType>(ty)) {
     IntegerAttr attr = IntegerAttr::get(int_ty, raw_value);
     return DenseElementsAttr::get(scalar_ty, attr);
-  } else if (auto complex_ty = ty.dyn_cast<ComplexType>()) {
+  } else if (auto complex_ty = mlir::dyn_cast<ComplexType>(ty)) {
     Type complex_element_ty = complex_ty.getElementType();
     if (complex_element_ty.isF32()) {
       return DenseElementsAttr::get(
@@ -50,13 +51,13 @@ DenseElementsAttr GetScalarOfType(Type ty, T raw_value) {
 // to `raw_value`.
 template <typename T>
 bool IsConstantValueOf(Value value, T raw_value) {
-  auto element_type = value.getType().cast<ShapedType>().getElementType();
-  if (element_type.isa<FloatType>()) {
+  auto element_type = mlir::cast<ShapedType>(value.getType()).getElementType();
+  if (mlir::isa<FloatType>(element_type)) {
     DenseFPElementsAttr float_attr;
     if (matchPattern(value, m_Constant(&float_attr)) && float_attr.isSplat() &&
         float_attr.getSplatValue<APFloat>().isExactlyValue(raw_value))
       return true;
-  } else if (element_type.isa<IntegerType>()) {
+  } else if (mlir::isa<IntegerType>(element_type)) {
     DenseIntElementsAttr int_attr;
     if (matchPattern(value, m_Constant(&int_attr)) && int_attr.isSplat() &&
         int_attr.getSplatValue<APInt>() == raw_value)
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/set_tpu_infeed_layout.cc b/tensorflow/compiler/mlir/tensorflow/transforms/set_tpu_infeed_layout.cc
index 4948aa68e13039..0eb552208194e1 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/set_tpu_infeed_layout.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/set_tpu_infeed_layout.cc
@@ -25,6 +25,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinOps.h"  // from @llvm-project
 #include "mlir/IR/OwningOpRef.h"  // from @llvm-project
 #include "mlir/IR/Types.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "xla/layout.h"
 #include "xla/mlir_hlo/mhlo/IR/hlo_ops.h"
@@ -64,27 +65,27 @@ FailureOr<Attribute> GetTPUInfeedLayout(const ArrayRef<Type> types,
     llvm::SmallVector<mlir::Attribute> v;
     v.reserve(types.size());
     for (const mlir::Type &t : types) {
-      if (t.isa<mhlo::TokenType>()) continue;
+      if (mlir::isa<mhlo::TokenType>(t)) continue;
       auto layout = GetTPUInfeedLayout({t}, rewriter);
       if (failed(layout)) return failure();
       v.push_back(layout.value());
     }
     ArrayRef<Attribute> shape(v);
     return rewriter.getArrayAttr(shape);
-  } else if (types[0].isa<TupleType>()) {
-    auto tuple_type = types[0].dyn_cast<TupleType>();
+  } else if (mlir::isa<TupleType>(types[0])) {
+    auto tuple_type = mlir::dyn_cast<TupleType>(types[0]);
     const auto &types = tuple_type.getTypes();
     llvm::SmallVector<mlir::Attribute> v;
     v.reserve(types.size());
     for (const mlir::Type &t : types) {
-      if (t.isa<mhlo::TokenType>()) continue;
+      if (mlir::isa<mhlo::TokenType>(t)) continue;
       auto layout = GetTPUInfeedLayout({t}, rewriter);
       if (failed(layout)) return failure();
       v.push_back(layout.value());
     }
     ArrayRef<Attribute> shape(v);
     return rewriter.getArrayAttr(shape);
-  } else if (auto t = types[0].dyn_cast<RankedTensorType>()) {
+  } else if (auto t = mlir::dyn_cast<RankedTensorType>(types[0])) {
     if (!t.hasStaticShape()) return failure();
     auto layout = GetTPUInfeedLayoutFromAPI(t);
     std::vector<int64_t> minor_to_major;
@@ -129,7 +130,7 @@ bool SetTPUInfeedLayout(mlir::OwningOpRef<mlir::ModuleOp> &mlir_module) {
     std::vector<mlir::Type> result_types;
 
     for (mlir::Type t : op.getResultTypes()) {
-      auto ty = t.cast<mlir::TensorType>();
+      auto ty = mlir::cast<mlir::TensorType>(t);
       if (!ty.hasStaticShape()) return mlir::WalkResult::interrupt();
       result_types.push_back(t);
     }
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/shape_inference.cc b/tensorflow/compiler/mlir/tensorflow/transforms/shape_inference.cc
index 9d1d8d599e8224..6a9527aea26b3f 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/shape_inference.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/shape_inference.cc
@@ -125,9 +125,9 @@ Type TypeMeet(Type lhs, Type rhs) {
   DCOMMENT("RefineTypeWith : " << lhs << " : " << rhs);
   if (lhs == rhs) return lhs;
 
-  auto rhs_shape_type = rhs.dyn_cast<ShapedType>();
+  auto rhs_shape_type = mlir::dyn_cast<ShapedType>(rhs);
   if (!rhs_shape_type) return lhs;
-  auto lhs_shape_type = lhs.cast<ShapedType>();
+  auto lhs_shape_type = mlir::cast<ShapedType>(lhs);
   if (lhs_shape_type.hasRank() && rhs_shape_type.hasRank() &&
       lhs_shape_type.getRank() != rhs_shape_type.getRank()) {
     DCOMMENT("Unexpected rank mismatch: " << lhs << " vs " << rhs);
@@ -167,7 +167,8 @@ Type TypeMeet(Type lhs, Type rhs) {
   // returned type.
   auto lhs_element_type = lhs_shape_type.getElementType();
   auto rhs_element_type_with_subtype =
-      rhs_shape_type.getElementType().dyn_cast<TF::TensorFlowTypeWithSubtype>();
+      mlir::dyn_cast<TF::TensorFlowTypeWithSubtype>(
+          rhs_shape_type.getElementType());
   // Look for resource or variant element type and ensure we refine the subtype.
   // We only support a single subtype at the moment, we won't handle something
   // like:
@@ -175,7 +176,7 @@ Type TypeMeet(Type lhs, Type rhs) {
   if (rhs_element_type_with_subtype &&
       rhs_element_type_with_subtype.GetSubtypes().size() == 1) {
     auto lhs_element_type_with_subtype =
-        lhs_element_type.dyn_cast<TF::TensorFlowTypeWithSubtype>();
+        mlir::dyn_cast<TF::TensorFlowTypeWithSubtype>(lhs_element_type);
     TensorType subtype;
     if (!lhs_element_type_with_subtype) {
       DCOMMENT(
@@ -193,10 +194,9 @@ Type TypeMeet(Type lhs, Type rhs) {
       // and:
       //   tensor<!tf_type.variant<tensor<10x8xf32>>>
       // we'll try here to refine tensor<?x8xf32> with tensor<10x8xf32>.
-      auto refined_subtype =
+      auto refined_subtype = mlir::cast<TensorType>(
           TypeMeet(lhs_element_type_with_subtype.GetSubtypes().front(),
-                   rhs_element_type_with_subtype.GetSubtypes().front())
-              .cast<TensorType>();
+                   rhs_element_type_with_subtype.GetSubtypes().front()));
       if (refined_subtype !=
           lhs_element_type_with_subtype.GetSubtypes().front())
         subtype = refined_subtype;
@@ -272,7 +272,7 @@ Value GetElementShapeOperand(Operation* op) {
 // Utility function to create a ranked tensor type after dropping the first
 // dimension from the input type.
 RankedTensorType DropFirstDimension(Type type) {
-  RankedTensorType ranked_type = type.dyn_cast<RankedTensorType>();
+  RankedTensorType ranked_type = mlir::dyn_cast<RankedTensorType>(type);
   if (!ranked_type) return {};
   llvm::ArrayRef<int64_t> dims_except_first =
       ranked_type.getShape().drop_front();
@@ -282,7 +282,7 @@ RankedTensorType DropFirstDimension(Type type) {
 
 Operation* InsertCast(OpBuilder& b, Location loc, Type dst_type, Value input) {
   Type element_type = getElementTypeOrSelf(dst_type);
-  if (element_type.isa<IndexType>())
+  if (mlir::isa<IndexType>(element_type))
     return b.create<tensor::CastOp>(loc, dst_type, input);
   if (isa<TensorFlowDialect, BuiltinDialect>(element_type.getDialect()))
     return b.create<TF::CastOp>(loc, dst_type, input,
@@ -342,7 +342,7 @@ bool CanInferTensorListElementType(Value tensorlist,
     for (auto& use : tensorlist.getUses()) {
       if (auto push = llvm::dyn_cast<TensorListPushBackOp>(use.getOwner())) {
         auto element_type =
-            push.getTensor().getType().dyn_cast<RankedTensorType>();
+            mlir::dyn_cast<RankedTensorType>(push.getTensor().getType());
         if (!verify_and_update_potential_element_type(element_type))
           return false;
         add_to_worklist(push.getOutputHandle());
@@ -361,7 +361,7 @@ bool CanInferTensorListElementType(Value tensorlist,
       }
       if (auto set_item = llvm::dyn_cast<TensorListSetItemOp>(use.getOwner())) {
         auto element_type =
-            set_item.getItem().getType().dyn_cast<RankedTensorType>();
+            mlir::dyn_cast<RankedTensorType>(set_item.getItem().getType());
         DCOMMENT("\tTensorListSetItemOp " << element_type);
         if (!verify_and_update_potential_element_type(element_type))
           return false;
@@ -433,8 +433,8 @@ bool CanInferTensorListElementType(Value tensorlist,
 // Returns the tensor type created from the `shape_attr` and `type_attr`
 // attributes.
 Type GetType(Attribute shape_attr, Attribute type_attr) {
-  auto shape = shape_attr.cast<tf_type::ShapeAttr>();
-  auto type = type_attr.cast<TypeAttr>();
+  auto shape = mlir::cast<tf_type::ShapeAttr>(shape_attr);
+  auto type = mlir::cast<TypeAttr>(type_attr);
   if (shape.hasRank())
     return tensorflow::GetTypeFromTFTensorShape(shape.getShape(),
                                                 type.getValue());
@@ -445,7 +445,7 @@ Type GetType(Attribute shape_attr, Attribute type_attr) {
 
 // Returns whether type can be further refined.
 bool CanBeRefined(Type type) {
-  auto shape_type = type.dyn_cast<ShapedType>();
+  auto shape_type = mlir::dyn_cast<ShapedType>(type);
   if (!shape_type) return false;
 
   // Returns whether type with subtypes can be further refined.
@@ -453,8 +453,8 @@ bool CanBeRefined(Type type) {
     return tws.GetSubtypes().empty() ||
            llvm::any_of(tws.GetSubtypes(), CanBeRefined);
   };
-  auto type_with_subtype =
-      shape_type.getElementType().dyn_cast<TF::TensorFlowTypeWithSubtype>();
+  auto type_with_subtype = mlir::dyn_cast<TF::TensorFlowTypeWithSubtype>(
+      shape_type.getElementType());
   if (type_with_subtype && can_refine_subtypes(type_with_subtype)) return true;
 
   return !shape_type.hasStaticShape();
@@ -467,7 +467,7 @@ Type GetNewArgType(Type old_arg_type, ArrayRef<int64_t> shape,
                    Type element_type, mlir::MLIRContext* context) {
   Type new_arg_type = tensorflow::GetTypeFromTFTensorShape(shape, element_type);
 
-  if (auto input_ty = old_arg_type.dyn_cast<RankedTensorType>()) {
+  if (auto input_ty = mlir::dyn_cast<RankedTensorType>(old_arg_type)) {
     ArrayRef<int64_t> bounds = hlo::encodingToBounds(input_ty.getEncoding());
     // The input type has bounded dynamic dimension.
     if (!bounds.empty()) {
@@ -505,12 +505,12 @@ struct ValuePort {
 
   // Convert output value to ValuePort.
   explicit ValuePort(Value v) {
-    OpResult opr = v.dyn_cast<OpResult>();
+    OpResult opr = mlir::dyn_cast<OpResult>(v);
     if (opr) {
       producer = opr.getOwner();
       port = {opr.getResultNumber()};
     } else {
-      producer = v.cast<BlockArgument>();
+      producer = mlir::cast<BlockArgument>(v);
       port = {0};
     }
   }
@@ -549,7 +549,7 @@ using ValuePortInputs = SmallVectorImpl<ValuePort>;
 // Maps the specified component in the `port` of the given op's result to one of
 // the element in the input.
 ValuePort ComputeInputComponentFor(PackOp op, ArrayRef<unsigned int> port) {
-  auto type = op.getType().cast<TensorType>();
+  auto type = mlir::cast<TensorType>(op.getType());
   if (!type.hasRank() || type.getRank() != 1) return {};
   if (port.size() != 2) return {};
   assert(port[0] == 0);
@@ -562,7 +562,7 @@ ValuePort ComputeInputComponentFor(ConcatV2Op op, ArrayRef<unsigned int> port) {
 
   int64_t element_idx = port[1];
   for (Value val : op.getValues()) {
-    auto val_ty = val.getType().cast<TensorType>();
+    auto val_ty = mlir::cast<TensorType>(val.getType());
     if (!val_ty.hasStaticShape() || val_ty.getRank() != 1) return {};
 
     int64_t dim_size = val_ty.getNumElements();
@@ -583,7 +583,7 @@ ValuePort ComputeInputComponentFor(GatherV2Op op, ArrayRef<unsigned int> port) {
   assert(port[0] == 0);
 
   auto params = op.getParams();
-  auto params_ty = params.getType().dyn_cast<RankedTensorType>();
+  auto params_ty = mlir::dyn_cast<RankedTensorType>(params.getType());
   if (!params_ty || !params_ty.hasStaticShape() || params_ty.getRank() != 1 ||
       op.getBatchDims() != 0) {
     return {};
@@ -687,7 +687,7 @@ Attribute ComputeOutputComponent(const ValuePort& value_port,
   if (auto shape_op = dyn_cast<TF::ShapeOp>(op)) {
     // No shape available in an unranked tensor type.
     auto operand_ty =
-        shape_op.getOperand().getType().dyn_cast<RankedTensorType>();
+        mlir::dyn_cast<RankedTensorType>(shape_op.getOperand().getType());
     if (!operand_ty) return nullptr;
 
     // Shape op has a single output so the first element should always be zero
@@ -1134,14 +1134,14 @@ bool ShapeInference::InferShapeForCast(Operation* op) {
   if (!new_type) {
     // Combine shape information when leaf element types are not the same, not
     // including shape info in subtypes.
-    auto ranked_operand_type = operand_type.dyn_cast<RankedTensorType>();
+    auto ranked_operand_type = mlir::dyn_cast<RankedTensorType>(operand_type);
     if (!ranked_operand_type) return false;
-    auto ranked_res_type = result.getType().dyn_cast<RankedTensorType>();
+    auto ranked_res_type = mlir::dyn_cast<RankedTensorType>(result.getType());
     if (ranked_res_type &&
         ranked_operand_type.getShape() == ranked_res_type.getShape())
       return false;
 
-    auto shaped_res_type = result_type.dyn_cast<ShapedType>();
+    auto shaped_res_type = mlir::dyn_cast<ShapedType>(result_type);
     if (!shaped_res_type) return false;
     new_type = tensorflow::GetTypeFromTFTensorShape(
         ranked_operand_type.getShape(), shaped_res_type.getElementType());
@@ -1296,7 +1296,7 @@ bool ShapeInference::InferShapeForXlaCallModule(XlaCallModuleOp op) {
   int next_op_result = 0;
   for (auto output_type : main_output_types) {
     if (tensorflow::IsTokenType(output_type)) continue;
-    auto output_type_ranked = output_type.dyn_cast<RankedTensorType>();
+    auto output_type_ranked = mlir::dyn_cast<RankedTensorType>(output_type);
     if (output_type_ranked == nullptr) {
       llvm::errs() << "Unsupported XlaCallModule result type: " << output_type
                    << "\n";
@@ -1422,20 +1422,20 @@ bool ShapeInference::InferShapeForRestore(Operation* op) {
     if (!assign_op) {
       continue;
     }
-    auto subtypes = getElementTypeOrSelf(assign_op.getResource())
-                        .cast<TF::ResourceType>()
+    auto subtypes = mlir::cast<TF::ResourceType>(
+                        getElementTypeOrSelf(assign_op.getResource()))
                         .getSubtypes();
     if (subtypes.empty()) {
       continue;
     }
-    auto subtype = subtypes.front().dyn_cast<ShapedType>();
+    auto subtype = mlir::dyn_cast<ShapedType>(subtypes.front());
     if (subtype == nullptr) {
       continue;
     }
     // Preserve the dtype from the restore op even if `AssignVariableOp` uses a
     // different dtype, which is possible when there's a `CastOp` between them.
     subtype = subtype.clone(
-        op->getResult(0).getType().cast<ShapedType>().getElementType());
+        mlir::cast<ShapedType>(op->getResult(0).getType()).getElementType());
     // Update the result type of this op with the resource's type. We only use
     // the resource subtype of the first user since shapes from all the users
     // should be equal or compatible.
@@ -1460,7 +1460,7 @@ DatasetInput GetDatasetInput(Value value) {
   while (
       llvm::isa_and_nonnull<IdentityOp, IdentityNOp>(value.getDefiningOp())) {
     value = value.getDefiningOp()->getOperand(
-        value.cast<OpResult>().getResultNumber());
+        mlir::cast<OpResult>(value).getResultNumber());
   }
 
   Operation* op = value.getDefiningOp();
@@ -1668,14 +1668,14 @@ bool ShapeInference::InferShapeForTensorListPopBackOp(TensorListPopBackOp op) {
   DCOMMENT_OP(op, "Inferring shape for TensorListPopBackOp.");
 
   auto src_list_handle_t =
-      op.getOperand(0).getType().dyn_cast_or_null<TensorType>();
+      mlir::dyn_cast_or_null<TensorType>(op.getOperand(0).getType());
   if (!src_list_handle_t) return false;
 
   // Copy of operand tensorlist type.
   TensorType dst_list_handle_t =
       src_list_handle_t.clone(src_list_handle_t.getElementType());
   auto variant_element_t =
-      dst_list_handle_t.getElementType().dyn_cast_or_null<VariantType>();
+      mlir::dyn_cast_or_null<VariantType>(dst_list_handle_t.getElementType());
   if (!variant_element_t || variant_element_t.getSubtypes().size() != 1)
     return false;
 
@@ -1726,7 +1726,7 @@ bool ShapeInference::InferShapeForVarHandleOp(VarHandleOp op) {
       llvm_unreachable("unexpected operator type");
     }
 
-    TensorType resource_subtype = value.getType().cast<TensorType>();
+    TensorType resource_subtype = mlir::cast<TensorType>(value.getType());
     ResourceType resource_type =
         ResourceType::get({resource_subtype}, op.getContext());
     UnrankedTensorType new_resource_type =
@@ -1858,7 +1858,7 @@ bool ShapeInference::InferShapeForXlaReduceWindowOp(XlaReduceWindowOp op) {
 
   bool changed = false;
 
-  auto input_ty = op.getInput().getType().cast<ShapedType>();
+  auto input_ty = mlir::cast<ShapedType>(op.getInput().getType());
   DenseElementsAttr window_dimensions, window_strides, base_dilations,
       window_dilations, padding;
   if (input_ty.hasStaticShape() &&
@@ -1905,7 +1905,7 @@ bool ShapeInference::InferShapeForXlaReduceWindowOp(XlaReduceWindowOp op) {
     }
     auto output_shape = InferWindowOutputShape(
         input_ty, window.value(),
-        op.getInitValue().getType().cast<ShapedType>().getElementType());
+        mlir::cast<ShapedType>(op.getInitValue().getType()).getElementType());
 
     if (!output_shape) {
       op->emitOpError("failed to infer output shape");
@@ -1922,8 +1922,8 @@ bool ShapeInference::InferShapeForXlaSelectAndScatterOp(
     XlaSelectAndScatterOp op) {
   DCOMMENT_OP(op, "Inferring shape for XlaSelectAndScatterOp");
 
-  auto operand_shape = op.getOperand().getType().cast<ShapedType>();
-  auto source_shape = op.getSource().getType().cast<ShapedType>();
+  auto operand_shape = mlir::cast<ShapedType>(op.getOperand().getType());
+  auto source_shape = mlir::cast<ShapedType>(op.getSource().getType());
   DenseElementsAttr window_dimensions, window_strides, padding;
   if (operand_shape.hasRank() && source_shape.hasRank() &&
       matchPattern(op.getWindowDimensions(), m_Constant(&window_dimensions)) &&
@@ -2085,13 +2085,14 @@ LogicalResult PrecheckForXlaConvV2Op(XlaConvV2Op op) {
   int64_t batch_group_count = op.getBatchGroupCount();
 
   auto input_args_have_static_shape = [&]() -> bool {
-    return input_tensor.getType().cast<TensorType>().hasStaticShape() &&
-           kernel_tensor.getType().cast<TensorType>().hasStaticShape() &&
-           window_strides.getType().cast<TensorType>().hasStaticShape() &&
-           padding.getType().cast<TensorType>().hasStaticShape() &&
-           lhs_dilation.getType().cast<TensorType>().hasStaticShape() &&
-           rhs_dilation.getType().cast<TensorType>().hasStaticShape() &&
-           feature_group_count.getType().cast<TensorType>().hasStaticShape();
+    return mlir::cast<TensorType>(input_tensor.getType()).hasStaticShape() &&
+           mlir::cast<TensorType>(kernel_tensor.getType()).hasStaticShape() &&
+           mlir::cast<TensorType>(window_strides.getType()).hasStaticShape() &&
+           mlir::cast<TensorType>(padding.getType()).hasStaticShape() &&
+           mlir::cast<TensorType>(lhs_dilation.getType()).hasStaticShape() &&
+           mlir::cast<TensorType>(rhs_dilation.getType()).hasStaticShape() &&
+           mlir::cast<TensorType>(feature_group_count.getType())
+               .hasStaticShape();
   };
 
   // Return failure when one of the input args has not a static shape
@@ -2100,9 +2101,9 @@ LogicalResult PrecheckForXlaConvV2Op(XlaConvV2Op op) {
   }
 
   auto input_tensor_shape =
-      input_tensor.getType().cast<RankedTensorType>().getShape();
+      mlir::cast<RankedTensorType>(input_tensor.getType()).getShape();
   auto kernel_tensor_shape =
-      kernel_tensor.getType().cast<RankedTensorType>().getShape();
+      mlir::cast<RankedTensorType>(kernel_tensor.getType()).getShape();
 
   if (input_tensor_shape.size() <= 2) {
     return op.emitOpError()
@@ -2229,14 +2230,16 @@ bool ShapeInference::InferShapeForXlaConvV2Op(XlaConvV2Op op) {
     xla::ConvolutionDimensionNumbers dnums;
     dnums.ParseFromString(op.getDimensionNumbersAttr().getValue().str());
 
-    auto input_tensor_shape = input_tensor.getType().cast<RankedTensorType>();
+    auto input_tensor_shape =
+        mlir::cast<RankedTensorType>(input_tensor.getType());
     for (auto i = 0; i < input_tensor_shape.getShape().size(); ++i) {
       DCOMMENT("Input Tensor Shape " << i << "th is "
                                      << input_tensor_shape.getShape()[i]);
       input_tensor_dims_vec.push_back(input_tensor_shape.getShape()[i]);
     }
 
-    auto kernel_tensor_shape = kernel_tensor.getType().cast<RankedTensorType>();
+    auto kernel_tensor_shape =
+        mlir::cast<RankedTensorType>(kernel_tensor.getType());
     for (auto i = 0; i < kernel_tensor_shape.getShape().size(); ++i) {
       DCOMMENT("Kernel tensor Shape" << i << "th is "
                                      << kernel_tensor_shape.getShape()[i]);
@@ -2319,7 +2322,7 @@ bool ShapeInference::RefineWithInferTypeOpInterface(
 ShapeHandle ShapeInference::ComputeOutputAsShape(OpResult result,
                                                  InferenceContext* ic) {
   LLVM_DEBUG(result.print(llvm::dbgs() << "\nEvaluate partially "));
-  auto rt = result.getType().dyn_cast<RankedTensorType>();
+  auto rt = mlir::dyn_cast<RankedTensorType>(result.getType());
   if (!rt || !rt.hasStaticShape() || rt.getRank() != 1) return {};
   int dim_size = rt.getDimSize(0);
 
@@ -2366,7 +2369,7 @@ ShapeHandle ShapeInference::ComputeOutputAsShape(OpResult result,
       // If worklist is empty, then this is the root query op.
       if (worklist.empty()) {
         LLVM_DEBUG(llvm::dbgs() << "[root node]\n");
-        if (auto dea = ret.dyn_cast<DenseIntElementsAttr>()) {
+        if (auto dea = mlir::dyn_cast<DenseIntElementsAttr>(ret)) {
           if (dea.getNumElements() != 1) {
             LLVM_DEBUG(llvm::dbgs() << "Unexpected number of elements\n");
             return {};
@@ -2404,7 +2407,7 @@ bool ShapeInference::RefineTypeForPassThroughOperands(Operation* op,
   for (auto entry : llvm::zip(operands, results)) {
     Type operand_type = std::get<0>(entry).getType();
     Value result = std::get<1>(entry);
-    TensorType result_type = result.getType().cast<TensorType>();
+    TensorType result_type = mlir::cast<TensorType>(result.getType());
     Type inferred_type = TypeMeet(result_type, operand_type);
     if (result_type == inferred_type) continue;
 
@@ -2470,10 +2473,10 @@ bool ShapeInference::InferShapeForNonTFDialectOperation(Operation* op) {
 Type GetElementTypeFromOperand(TensorType operand_type,
                                TensorType result_type) {
   auto operand_handle_type =
-      operand_type.getElementType().dyn_cast<TensorFlowTypeWithSubtype>();
+      mlir::dyn_cast<TensorFlowTypeWithSubtype>(operand_type.getElementType());
   if (!operand_handle_type) return result_type.getElementType();
   auto result_handle_type =
-      result_type.getElementType().cast<TensorFlowTypeWithSubtype>();
+      mlir::cast<TensorFlowTypeWithSubtype>(result_type.getElementType());
   if (operand_handle_type.GetSubtypes().empty() ||
       !result_handle_type.GetSubtypes().empty())
     return result_type.getElementType();
@@ -2509,9 +2512,8 @@ bool ShapeInference::InferShapeForWhile(WhileOpTy op,
   for (auto entry :
        zip(op.getInput().getTypes(), op.getOutput(), body_result_types)) {
     Value result = std::get<1>(entry);
-    TensorType body_result_type =
-        std::get<2>(entry).template cast<TensorType>();
-    auto result_type = result.getType().cast<TensorType>();
+    TensorType body_result_type = mlir::cast<TensorType>(std::get<2>(entry));
+    auto result_type = mlir::cast<TensorType>(result.getType());
 
     Type potential_refined_type;
     if (CanWhileTypeBeRefinedWith(result_type, body_result_type)) {
@@ -2522,7 +2524,7 @@ bool ShapeInference::InferShapeForWhile(WhileOpTy op,
                                      : std::optional<ArrayRef<int64_t>>(),
           element_type);
     } else {
-      TensorType operand_type = std::get<0>(entry).template cast<TensorType>();
+      TensorType operand_type = mlir::cast<TensorType>(std::get<0>(entry));
       Type element_type = GetElementTypeFromOperand(operand_type, result_type);
       potential_refined_type = CreateTensorType(
           result_type.hasRank() ? result_type.getShape()
@@ -2675,7 +2677,8 @@ bool ShapeInference::InferShapeForSingleOperation(Operation* op,
 
   // Return result element type at `index`.
   auto result_element_type_fn = [&](int index) {
-    return op->getResult(index).getType().cast<TensorType>().getElementType();
+    return mlir::cast<TensorType>(op->getResult(index).getType())
+        .getElementType();
   };
 
   llvm::SmallVector<ShapedTypeComponents, 4> inferred_return_shapes;
@@ -2702,7 +2705,7 @@ bool ShapeInference::InferShapeForSingleOperation(Operation* op,
       inferred_type = UnrankedTensorType::get(inferred.getElementType());
     }
     inferred_type =
-        TypeMeet(op_result.getType(), inferred_type).cast<TensorType>();
+        mlir::cast<TensorType>(TypeMeet(op_result.getType(), inferred_type));
     if (op_result.getType() == inferred_type) continue;
     if (!UpdateTypeAndInsertIncompatibleUseCasts(inferred_type, op_result))
       continue;
@@ -2883,19 +2886,19 @@ llvm::SmallVector<Type, 4> GetWhileCompatibleTypes(
   types.reserve(operand_types.size());
   for (auto entry :
        llvm::zip(operand_types, result_types, region_argument_types)) {
-    auto operand_type = std::get<0>(entry).cast<TensorType>();
-    auto result_type = std::get<1>(entry).cast<TensorType>();
+    auto operand_type = mlir::cast<TensorType>(std::get<0>(entry));
+    auto result_type = mlir::cast<TensorType>(std::get<1>(entry));
     if (operand_type == result_type) {
       types.push_back(operand_type);
     } else if (RankedAndSameRank(operand_type, result_type)) {
-      auto potential_refined_type =
-          GetCompatibleRankedTensorType(operand_type.cast<RankedTensorType>(),
-                                        result_type.cast<RankedTensorType>());
+      auto potential_refined_type = GetCompatibleRankedTensorType(
+          mlir::cast<RankedTensorType>(operand_type),
+          mlir::cast<RankedTensorType>(result_type));
       types.push_back(potential_refined_type);
     } else {
-      auto region_argument_type = std::get<2>(entry).cast<TensorType>();
+      auto region_argument_type = mlir::cast<TensorType>(std::get<2>(entry));
       Type element_type = GetElementTypeFromOperand(
-          operand_type.cast<TensorType>(), region_argument_type);
+          mlir::cast<TensorType>(operand_type), region_argument_type);
       Type potential_refined_type = CreateTensorType(
           region_argument_type.hasRank() ? region_argument_type.getShape()
                                          : std::optional<ArrayRef<int64_t>>(),
@@ -3068,7 +3071,7 @@ LogicalResult ShapeInference::TryToFold(Operation* op) {
       }
     }
 
-    if (ElementsAttr eattr = attr.dyn_cast_or_null<ElementsAttr>()) {
+    if (ElementsAttr eattr = mlir::dyn_cast_or_null<ElementsAttr>(attr)) {
       if (std::get<0>(result).getType() == eattr.getType()) continue;
 
       (void)UpdateTypeAndInsertIncompatibleUseCasts(eattr.getType(),
@@ -3268,13 +3271,15 @@ FailureOr<bool> InferShapeForFunction(func::FuncOp func,
   for (size_t i = 0; i < func_type.getNumInputs(); ++i) {
     ArrayRef<int64_t> shape = arg_shapes[i];
     Type element_type;
-    if (auto input_ty = func_type.getInput(i).dyn_cast<RankedTensorType>()) {
+    if (auto input_ty =
+            mlir::dyn_cast<RankedTensorType>(func_type.getInput(i))) {
       if (input_ty.getRank() != shape.size()) {
         return failure();
       }
       element_type = input_ty.getElementType();
     } else {
-      auto unranked_input_ty = func_type.getInput(i).dyn_cast<TensorType>();
+      auto unranked_input_ty =
+          mlir::dyn_cast<TensorType>(func_type.getInput(i));
       if (!unranked_input_ty) {
         return failure();
       }
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/sparsecore/embedding_pipelining.cc b/tensorflow/compiler/mlir/tensorflow/transforms/sparsecore/embedding_pipelining.cc
index e565d50660558c..abef8ee04f2212 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/sparsecore/embedding_pipelining.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/sparsecore/embedding_pipelining.cc
@@ -174,8 +174,8 @@ namespace TFDevice {
 namespace {
 
 bool IsResourceType(Type val_type) {
-  if (auto tensor_type = val_type.dyn_cast<mlir::TensorType>()) {
-    if (tensor_type.getElementType().isa<TF::ResourceType>()) {
+  if (auto tensor_type = mlir::dyn_cast<mlir::TensorType>(val_type)) {
+    if (mlir::isa<TF::ResourceType>(tensor_type.getElementType())) {
       return true;
     }
   }
@@ -588,7 +588,7 @@ void GatherOpsForExtraction(mlir::SetVector<Operation*>* operations,
       if (predecessors) {
         for (Value operand : op->getOperands()) {
           // Stop at the block boundary.
-          if (operand.isa<BlockArgument>()) continue;
+          if (mlir::isa<BlockArgument>(operand)) continue;
 
           Operation* predecessor = operand.getDefiningOp();
           if (!operations->contains(predecessor) &&
@@ -1867,7 +1867,7 @@ void EmbeddingPipeliningPass::runOnOperation() {
   for (int ret_pos = 0; ret_pos < orig_return_op->getNumOperands(); ++ret_pos) {
     auto operand = orig_return_op->getOperand(ret_pos);
     auto def_op = operand.getDefiningOp();
-    auto result = operand.dyn_cast<OpResult>();
+    auto result = mlir::dyn_cast<OpResult>(operand);
     if (def_op == non_tpu_caller) {
       loop_arg_update_map_non_tpu[result.getResultNumber()] = ret_pos;
     } else if (def_op == core_tpu_caller) {
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/sparsecore/embedding_program_key.cc b/tensorflow/compiler/mlir/tensorflow/transforms/sparsecore/embedding_program_key.cc
index 3e41762feb16c2..1e7958660fd8c4 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/sparsecore/embedding_program_key.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/sparsecore/embedding_program_key.cc
@@ -314,7 +314,7 @@ void CreateReducedLaunchOp(OpBuilder* builder, Block* old_block,
   // Handle pass through block arguments.
   for (OpOperand& operand :
        original_launch_op.GetBody().getTerminator()->getOpOperands()) {
-    if (operand.get().isa<BlockArgument>()) {
+    if (mlir::isa<BlockArgument>(operand.get())) {
       original_launch_op.getResult(operand.getOperandNumber())
           .replaceAllUsesWith(operand.get());
     }
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/sparsecore/embedding_sequencing.cc b/tensorflow/compiler/mlir/tensorflow/transforms/sparsecore/embedding_sequencing.cc
index 577b374a43847d..b224b723cda50d 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/sparsecore/embedding_sequencing.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/sparsecore/embedding_sequencing.cc
@@ -95,8 +95,8 @@ std::vector<Type> GetValueTypes(const InputContainer& input) {
 }
 
 bool IsResourceType(Type val_type) {
-  if (auto tensor_type = val_type.dyn_cast<mlir::TensorType>()) {
-    if (tensor_type.getElementType().isa<TF::ResourceType>()) {
+  if (auto tensor_type = mlir::dyn_cast<mlir::TensorType>(val_type)) {
+    if (mlir::isa<TF::ResourceType>(tensor_type.getElementType())) {
       return true;
     }
   }
@@ -139,7 +139,7 @@ void GatherOpsForExtraction(mlir::SetVector<Operation*>* operations,
       if (predecessors) {
         for (Value operand : op->getOperands()) {
           // Stop at the block boundary.
-          if (operand.isa<BlockArgument>()) continue;
+          if (mlir::isa<BlockArgument>(operand)) continue;
 
           Operation* predecessor = operand.getDefiningOp();
           if (!operations->contains(predecessor) &&
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/stack_ops_decomposition.cc b/tensorflow/compiler/mlir/tensorflow/transforms/stack_ops_decomposition.cc
index fb9848dbaeac47..476a67b496355f 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/stack_ops_decomposition.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/stack_ops_decomposition.cc
@@ -73,7 +73,7 @@ Type GetSizeVarType(OpBuilder builder) {
 // forwards the argument. Otherwise, returns -1.
 int64_t FindAliasedInput(func::FuncOp func, int64_t return_index) {
   Value return_val = func.front().getTerminator()->getOperand(return_index);
-  auto maybe_arg = return_val.dyn_cast<BlockArgument>();
+  auto maybe_arg = mlir::dyn_cast<BlockArgument>(return_val);
   if (!maybe_arg) return -1;
   return maybe_arg.getArgNumber();
 }
@@ -180,8 +180,8 @@ LogicalResult HandleWhileOp(
       while_op.getLoc(), body.getFunctionType().getInputs(), new_while_operands,
       while_op->getAttrs());
   for (int64_t i = 0; i < while_op.getNumResults(); ++i) {
-    if (!getElementTypeOrSelf(while_op.getOperand(i).getType())
-             .isa<TF::ResourceType>()) {
+    if (!mlir::isa<TF::ResourceType>(
+            getElementTypeOrSelf(while_op.getOperand(i).getType()))) {
       continue;
     }
     int64_t aliased_input = FindAliasedInput(body, i);
@@ -233,7 +233,7 @@ LogicalResult HandleIfOp(
       if_op.getLoc(), then_func.getFunctionType().getResults(), new_if_operands,
       if_op->getAttrs());
   for (auto result : if_op.getResults()) {
-    if (!getElementTypeOrSelf(result.getType()).isa<TF::ResourceType>()) {
+    if (!mlir::isa<TF::ResourceType>(getElementTypeOrSelf(result.getType()))) {
       continue;
     }
     int64_t then_aliased_input =
@@ -287,8 +287,8 @@ LogicalResult HandlePartitionedCallOp(
                  const_cast<func::FuncOp&>(info.decomposed_callee).getName()));
     for (int64_t i = 0; i < call.getNumResults(); ++i) {
       auto result = call.getResult(i);
-      if (!getElementTypeOrSelf(result.getType())
-               .template isa<TF::ResourceType>()) {
+      if (!mlir::isa<TF::ResourceType>(
+              getElementTypeOrSelf(result.getType()))) {
         continue;
       }
       int64_t aliased_input = FindAliasedInput(info.decomposed_callee, i);
@@ -328,9 +328,9 @@ LogicalResult HandlePartitionedCallOp(
   } else {
     info.decomposed_callee = lowered_callee;
     for (auto& entry : callee_map) {
-      info.stack_var_arg_to_size_arg
-          [entry.getFirst().cast<BlockArgument>().getArgNumber()] =
-          entry.getSecond().cast<BlockArgument>().getArgNumber();
+      info.stack_var_arg_to_size_arg[mlir::cast<BlockArgument>(entry.getFirst())
+                                         .getArgNumber()] =
+          mlir::cast<BlockArgument>(entry.getSecond()).getArgNumber();
     }
     if (lowered_callee != callee) {
       // Add the clone with a new name.
@@ -372,7 +372,7 @@ LogicalResult HandleStackV2Op(
   auto size_var_type = GetSizeVarType(builder);
   auto var_type = RankedTensorType::get(
       {}, TF::ResourceType::get(
-              ArrayRef<TensorType>{buffer.getType().cast<TensorType>()},
+              ArrayRef<TensorType>{mlir::cast<TensorType>(buffer.getType())},
               stack.getContext()));
   auto local_var = builder.create<TF::MlirLocalVarOp>(
       stack.getLoc(), ArrayRef<Type>{var_type}, ArrayRef<Value>{});
@@ -446,7 +446,8 @@ LogicalResult HandleRegionControlFlowOps(
     llvm::StringMap<PartitionedCallStackOpsInfo>*
         decomposed_partitioned_call_callees) {
   for (OpOperand& operand : op.getOpOperands()) {
-    if (getElementTypeOrSelf(operand.get().getType()).isa<TF::ResourceType>()) {
+    if (mlir::isa<TF::ResourceType>(
+            getElementTypeOrSelf(operand.get().getType()))) {
       return op.emitOpError()
              << "found unexpected type " << operand.get().getType()
              << " of operand #" << operand.getOperandNumber()
@@ -455,7 +456,7 @@ LogicalResult HandleRegionControlFlowOps(
     }
   }
   for (OpResult result : op.getResults()) {
-    if (getElementTypeOrSelf(result.getType()).isa<TF::ResourceType>()) {
+    if (mlir::isa<TF::ResourceType>(getElementTypeOrSelf(result.getType()))) {
       return op.emitOpError()
              << "found unexpected type " << result.getType() << " of result #"
              << result.getResultNumber()
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/tensor_device_copy_conversion.cc b/tensorflow/compiler/mlir/tensorflow/transforms/tensor_device_copy_conversion.cc
index b18a6a3496649a..267f32daa9f6e6 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/tensor_device_copy_conversion.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/tensor_device_copy_conversion.cc
@@ -25,6 +25,7 @@ limitations under the License.
 #include "mlir/IR/OperationSupport.h"  // from @llvm-project
 #include "mlir/IR/Types.h"  // from @llvm-project
 #include "mlir/Pass/PassOptions.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/compiler/mlir/tensorflow/utils/convert_tensor.h"
 
@@ -67,7 +68,7 @@ void TensorDeviceCopyConversionPass::runOnOperation() {
         (isa<TF::TPUExecuteOp, TF::TPUExecuteAndUpdateVariablesOp>(def_op))) {
       return true;
     }
-    if (BlockArgument block_arg = arg.dyn_cast<BlockArgument>()) {
+    if (BlockArgument block_arg = mlir::dyn_cast<BlockArgument>(arg)) {
       // Skip the folding logic if the block argument is not from the function
       // arguments. This can happen when the argument is from a while loop.
       if (block_arg.getParentRegion() != &func_op.getRegion()) {
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/tensor_list_ops_decomposition.cc b/tensorflow/compiler/mlir/tensorflow/transforms/tensor_list_ops_decomposition.cc
index 278ba1f7fdf65b..a9ad31a28461f7 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/tensor_list_ops_decomposition.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/tensor_list_ops_decomposition.cc
@@ -31,6 +31,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/IR/TypeUtilities.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_device.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
@@ -510,10 +511,10 @@ LogicalResult HandlePartitionedCallOp(
   } else {
     info.signature_change = true;
     for (auto& entry : callee_map) {
-      auto buffer_arg = entry.getFirst().dyn_cast<BlockArgument>();
+      auto buffer_arg = mlir::dyn_cast<BlockArgument>(entry.getFirst());
       if (!buffer_arg) continue;
       info.buffer_arg_to_size_arg[buffer_arg.getArgNumber()] =
-          entry.getSecond().size.cast<BlockArgument>().getArgNumber();
+          mlir::cast<BlockArgument>(entry.getSecond().size).getArgNumber();
     }
     if (lowered_callee != callee) {
       // Add the clone with a new name.
@@ -549,7 +550,8 @@ LogicalResult GetConstShapeValue(Value shape_value,
 // return error.
 LogicalResult GetElementShapeFromResultType(
     Type type, llvm::SmallVector<int64_t, 8>* shape) {
-  auto variant_type = getElementTypeOrSelf(type).dyn_cast<TF::VariantType>();
+  auto variant_type =
+      mlir::dyn_cast<TF::VariantType>(getElementTypeOrSelf(type));
   if (!variant_type || variant_type.getSubtypes().size() != 1) return failure();
   TensorType tensor_type = variant_type.getSubtypes().front();
   if (!tensor_type.hasStaticShape()) return failure();
@@ -619,7 +621,7 @@ LogicalResult HandleTensorListFromTensorOp(
   Value buffer = builder.create<TF::IdentityOp>(
       list.getLoc(), ArrayRef<Type>{list.getTensor().getType()},
       ArrayRef<Value>{list.getTensor()});
-  auto type = buffer.getType().cast<TensorType>();
+  auto type = mlir::cast<TensorType>(buffer.getType());
   if (!type.hasStaticShape()) {
     return list.emitOpError("TensorListFromTensorOp input has unknown shape.");
   }
@@ -733,8 +735,8 @@ LogicalResult HandleTensorListLengthOp(
   OpBuilder builder(length);
   if (it->getSecond().fixed) {
     auto dim = cutil::CreateScalarConst(
-        length.getInputHandle().getType().cast<RankedTensorType>().getDimSize(
-            0),
+        mlir::cast<RankedTensorType>(length.getInputHandle().getType())
+            .getDimSize(0),
         builder, length.getLoc());
     length.getLength().replaceAllUsesWith(dim);
   } else {
@@ -760,7 +762,7 @@ LogicalResult HandleTensorListElementShapeOp(
   }
   auto buffer = elem_shape.getInputHandle();
   auto result = cutil::GetR1Const(
-      buffer.getType().cast<RankedTensorType>().getShape().drop_front(),
+      mlir::cast<RankedTensorType>(buffer.getType()).getShape().drop_front(),
       OpBuilder(elem_shape), elem_shape.getLoc(),
       elem_shape.getShapeType().getIntOrFloatBitWidth());
   elem_shape.getElementShape().replaceAllUsesWith(result);
@@ -792,7 +794,8 @@ LogicalResult HandleTensorListScatterIntoExistingListOp(
   }
   auto buffer = scatter.getInputHandle();
   OpBuilder builder(scatter);
-  auto indices_type = scatter.getIndices().getType().cast<RankedTensorType>();
+  auto indices_type =
+      mlir::cast<RankedTensorType>(scatter.getIndices().getType());
   if (!indices_type) return scatter.emitOpError("unranked indices shape");
   auto shape_type = RankedTensorType::get({2}, builder.getIntegerType(32));
   auto shape = builder.create<TF::ConstOp>(
@@ -874,7 +877,8 @@ LogicalResult DecomposeTensorListOpsInternal(
     } else if (auto addn = llvm::dyn_cast<TF::AddNOp>(&op)) {
       auto it = buffer_to_size->find(addn.getOperand(0));
       if (it != buffer_to_size->end()) {
-        addn.getSum().setType(addn.getOperand(0).getType().cast<TensorType>());
+        addn.getSum().setType(
+            mlir::cast<TensorType>(addn.getOperand(0).getType()));
         auto size = it->getSecond();
         (*buffer_to_size)[addn.getSum()] = size;
       }
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/tf_saved_model_asset_sinking_pass.cc b/tensorflow/compiler/mlir/tensorflow/transforms/tf_saved_model_asset_sinking_pass.cc
index 0bc7b47377fa3f..40d9032b499ff6 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/tf_saved_model_asset_sinking_pass.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/tf_saved_model_asset_sinking_pass.cc
@@ -35,6 +35,7 @@ limitations under the License.
 #include "mlir/IR/SymbolTable.h"  // from @llvm-project
 #include "mlir/IR/Value.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_saved_model.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_types.h"
@@ -70,7 +71,7 @@ class AssetSinkingPass : public impl::AssetSinkingPassBase<AssetSinkingPass> {
     SymbolTable symbol_table(module);
     for (auto initializer : init_op.getInitializers()) {
       auto func = symbol_table.lookup<func::FuncOp>(
-          initializer.cast<FlatSymbolRefAttr>().getValue());
+          mlir::cast<FlatSymbolRefAttr>(initializer).getValue());
       RewriteFunction(symbol_table, func);
     }
 
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/tfg-to-tfe.cc b/tensorflow/compiler/mlir/tensorflow/transforms/tfg-to-tfe.cc
index 7f449520030876..8180b4116ef21b 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/tfg-to-tfe.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/tfg-to-tfe.cc
@@ -18,12 +18,13 @@ limitations under the License.
 #include "llvm/ADT/STLExtras.h"
 #include "llvm/Support/FormatVariadic.h"
 #include "mlir/IR/Attributes.h"  // from @llvm-project
-#include "mlir/IR/IRMapping.h"  // from @llvm-project
 #include "mlir/IR/Builders.h"  // from @llvm-project
 #include "mlir/IR/BuiltinAttributes.h"  // from @llvm-project
+#include "mlir/IR/IRMapping.h"  // from @llvm-project
 #include "mlir/IR/PatternMatch.h"  // from @llvm-project
 #include "mlir/IR/SymbolTable.h"  // from @llvm-project
 #include "mlir/IR/Visitors.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Transforms/DialectConversion.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/dialect_registration.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_executor.h"
@@ -58,7 +59,7 @@ static mlir::LogicalResult FilterTfgSpecificArgResultAttributes(
     llvm::SmallVector<mlir::DictionaryAttr> &output_attrs) {
   for (auto it : llvm::zip(
            types, array_attr.template getAsRange<mlir::DictionaryAttr>())) {
-    if (std::get<0>(it).isa<tfg::ControlType>()) continue;
+    if (mlir::isa<tfg::ControlType>(std::get<0>(it))) continue;
     output_types.push_back(std::get<0>(it));
 
     mlir::NamedAttrList list;
@@ -80,7 +81,7 @@ static mlir::LogicalResult ReformatOpAttributes(
             mlir::tfg::TFGraphDialect::getDeviceAttrKey())) {
       tensorflow::DeviceNameUtils::ParsedName parsed_name;
       if (!tensorflow::DeviceNameUtils::ParseFullName(
-              attr.getValue().cast<mlir::StringAttr>().getValue().str(),
+              mlir::cast<mlir::StringAttr>(attr.getValue()).getValue().str(),
               &parsed_name))
         return mlir::failure();
       if (!parsed_name.has_type) {
@@ -106,7 +107,7 @@ static mlir::LogicalResult ReformatOpAttributes(
 static void FilterOutBlockArgControlDep(
     ValueRange operands, llvm::SmallVectorImpl<Value> &filtered) {
   for (Value value : operands)
-    if (!value.isa<mlir::BlockArgument>()) filtered.push_back(value);
+    if (!mlir::isa<mlir::BlockArgument>(value)) filtered.push_back(value);
 }
 
 // Split the tfg.NextIteration into tf_executor::NextIterationSourceOp and
@@ -218,7 +219,7 @@ class ConvertGraphFuncOp : public OpConversionPattern<tfg::GraphFuncOp> {
     Block &block = graph_func.getBody().front();
     for (auto iter = block.args_begin(), end_iter = block.args_end();
          iter != end_iter; ++iter) {
-      if (!iter->getType().isa<tfg::ControlType>())
+      if (!mlir::isa<tfg::ControlType>(iter->getType()))
         iter->replaceAllUsesWith(func.getBody().getArgument(idx++));
     }
 
@@ -412,9 +413,9 @@ class ConvertGeneralOp : public ConversionPattern {
     for (Value value : operands) {
       // Because of the property of graph region, the control operands may
       // not have been converted to tf_executor::ControlType.
-      if (value.getType().isa<tfg::ControlType>() ||
-          value.getType().isa<tf_executor::ControlType>()) {
-        if (!value.isa<BlockArgument>())
+      if (mlir::isa<tfg::ControlType>(value.getType()) ||
+          mlir::isa<tf_executor::ControlType>(value.getType())) {
+        if (!mlir::isa<BlockArgument>(value))
           island_control_operands.push_back(value);
       } else {
         inner_op_operands.push_back(value);
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/tpu_annotate_dynamic_shape_inputs.cc b/tensorflow/compiler/mlir/tensorflow/transforms/tpu_annotate_dynamic_shape_inputs.cc
index d1a244b7f2ec2a..b4a98605a34ac2 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/tpu_annotate_dynamic_shape_inputs.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/tpu_annotate_dynamic_shape_inputs.cc
@@ -53,7 +53,7 @@ class TPUAnnotateDynamicShapeInputsPass
 // Finds op that created a given value. If the value is a BlockArgument, this
 // returns the owner of the Block.
 Operation* GetOpOfValue(Value value) {
-  if (auto block_arg = value.dyn_cast<BlockArgument>())
+  if (auto block_arg = mlir::dyn_cast<BlockArgument>(value))
     return block_arg.getOwner()->getParentOp();
 
   return value.getDefiningOp();
@@ -98,7 +98,7 @@ void TPUAnnotateDynamicShapeInputsPass::runOnOperation() {
     // Update the marked argument with dynamic shapes.
     for (int index : dynamic_shape_arg_index) {
       BlockArgument arg = func.getArgument(index);
-      auto inputType = arg.getType().dyn_cast<RankedTensorType>();
+      auto inputType = mlir::dyn_cast<RankedTensorType>(arg.getType());
       // Only rank 1 tensor is supported for now.
       if (!inputType || inputType.getRank() != 1) continue;
       auto shape = llvm::to_vector<4>(inputType.getShape());
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/tpu_device_propagation.cc b/tensorflow/compiler/mlir/tensorflow/transforms/tpu_device_propagation.cc
index a6f9d7d4c63f01..e2b9c62ee8e6bc 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/tpu_device_propagation.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/tpu_device_propagation.cc
@@ -29,6 +29,7 @@ limitations under the License.
 #include "mlir/IR/UseDefLists.h"  // from @llvm-project
 #include "mlir/IR/Value.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_executor.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/compiler/mlir/tensorflow/utils/tpu_rewrite_device_util.h"
@@ -94,8 +95,8 @@ void PopulateDeviceForOpResults(
     op_to_update = op_to_update->getParentOp();
 
   for (Value result : op_to_update->getResults()) {
-    if (result.getType().isa<tf_executor::TokenType>()) continue;
-    if (result.getType().isa<tf_executor::ControlType>()) break;
+    if (mlir::isa<tf_executor::TokenType>(result.getType())) continue;
+    if (mlir::isa<tf_executor::ControlType>(result.getType())) break;
 
     value_to_device.insert({result, device});
   }
@@ -118,8 +119,8 @@ llvm::StringRef FindDeviceFromOperands(
   llvm::StringRef new_device;
   const bool is_switch = llvm::isa<tf_executor::SwitchOp>(op);
   for (Value operand : op.getOperands()) {
-    if (operand.getType().isa<tf_executor::TokenType>()) continue;
-    if (operand.getType().isa<tf_executor::ControlType>()) break;
+    if (mlir::isa<tf_executor::TokenType>(operand.getType())) continue;
+    if (mlir::isa<tf_executor::ControlType>(operand.getType())) break;
 
     if (is_switch &&
         llvm::isa_and_nonnull<tf_executor::LoopCondOp>(operand.getDefiningOp()))
@@ -230,7 +231,7 @@ void PropagateDevicesToResults(
   mlir::Builder builder(func.getOperation());
 
   for (OpOperand& operand : fetch.getOperation()->getOpOperands()) {
-    if (operand.get().getType().isa<tf_executor::ControlType>()) break;
+    if (mlir::isa<tf_executor::ControlType>(operand.get().getType())) break;
     auto it = value_to_device.find(operand.get());
     if (it != value_to_device.end()) {
       auto device_attr = func.getResultAttrOfType<StringAttr>(
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/tpu_dynamic_layout_pass.cc b/tensorflow/compiler/mlir/tensorflow/transforms/tpu_dynamic_layout_pass.cc
index 04b488a38048fd..2281658efc5ed1 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/tpu_dynamic_layout_pass.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/tpu_dynamic_layout_pass.cc
@@ -86,7 +86,7 @@ bool IsSupportedInputOp(
       resource_alias_analysis.GetResourceAliases(resource_iterator);
 
   auto is_generator = [](Value val) {
-    if (val.isa<BlockArgument>()) return true;
+    if (mlir::isa<BlockArgument>(val)) return true;
     Operation* definition = val.getDefiningOp();
     return definition->getNumOperands() == 0 &&
            definition->getNumResults() == 1;
@@ -99,7 +99,7 @@ bool IsSupportedInputOp(
     if (!is_generator(alias)) return true;
 
     StringAttr device;
-    if (auto arg = alias.dyn_cast<BlockArgument>()) {
+    if (auto arg = mlir::dyn_cast<BlockArgument>(alias)) {
       device = func.getArgAttrOfType<mlir::StringAttr>(arg.getArgNumber(),
                                                        kFuncDeviceAttr);
     } else {
@@ -186,10 +186,8 @@ bool HandleReplicatedInputs(
         BuildCopyWithLayout(execute_launch, compile_launch, get_layout,
                             entry.value().get(), &builder);
 
-    auto device_list = replicate.getDevices()
-                           .value()
-                           .get(execute_launch.getDevice())
-                           .cast<ArrayAttr>();
+    auto device_list = mlir::cast<ArrayAttr>(
+        replicate.getDevices().value().get(execute_launch.getDevice()));
     copy_with_layout->setAttr(kDeviceAttr,
                               device_list.getValue()[entry.index()]);
 
@@ -225,7 +223,7 @@ void HandleCompileAndExecutes(
     for (const auto& input_and_idx : llvm::enumerate(execute.getArgs())) {
       Value input = input_and_idx.value();
       const int64_t execute_arg_index = input_and_idx.index();
-      if (auto block_arg = input.dyn_cast<BlockArgument>()) {
+      if (auto block_arg = mlir::dyn_cast<BlockArgument>(input)) {
         // For a block argument, consider transforms only when it is a
         // replicated input (defining ops will be outside the replicate node).
         if (maybe_replicate != block_arg.getParentRegion()->getParentOp() ||
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/tpu_host_computation_expansion.cc b/tensorflow/compiler/mlir/tensorflow/transforms/tpu_host_computation_expansion.cc
index fdea45957eb7d8..b2a3b81f63a1a9 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/tpu_host_computation_expansion.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/tpu_host_computation_expansion.cc
@@ -23,6 +23,7 @@ limitations under the License.
 #include "mlir/IR/Visitors.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
 #include "mlir/Pass/PassRegistry.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_device.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/compiler/mlir/tensorflow/transforms/passes.h"
@@ -41,7 +42,7 @@ bool HasOutsideCompilationAttribute(Operation* op) {
 // Finds op that created a given value. If the value is a BlockArgument, this
 // returns the owner of the Block.
 Operation* GetOpOfValue(Value value) {
-  if (auto block_arg = value.dyn_cast<BlockArgument>())
+  if (auto block_arg = mlir::dyn_cast<BlockArgument>(value))
     return block_arg.getOwner()->getParentOp();
 
   return value.getDefiningOp();
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/tpu_partitioned_op_conversion.cc b/tensorflow/compiler/mlir/tensorflow/transforms/tpu_partitioned_op_conversion.cc
index a2232f9f33bf2a..08165fb1435ff2 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/tpu_partitioned_op_conversion.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/tpu_partitioned_op_conversion.cc
@@ -22,6 +22,7 @@ limitations under the License.
 #include "llvm/Support/Casting.h"
 #include "mlir/IR/BuiltinAttributes.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_types.h"
@@ -61,12 +62,12 @@ LogicalResult ReplacePartitionedOp(IntegerAttr num_cores_per_replica, T op) {
   }
 
   auto element_type = getElementTypeOrSelf(first_operand_type);
-  if (element_type.isa<TF::ResourceType>()) {
+  if (mlir::isa<TF::ResourceType>(element_type)) {
     first_operand_type =
-        element_type.cast<TF::ResourceType>().getSubtypes().front();
+        mlir::cast<TF::ResourceType>(element_type).getSubtypes().front();
   }
 
-  auto tensor_type = first_operand_type.dyn_cast_or_null<TensorType>();
+  auto tensor_type = mlir::dyn_cast_or_null<TensorType>(first_operand_type);
   if (!(tensor_type && tensor_type.hasRank())) {
     return op->emitError()
            << "cannot convert op with unranked or non-tensor input type "
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/tpu_sharding_identification_pass.cc b/tensorflow/compiler/mlir/tensorflow/transforms/tpu_sharding_identification_pass.cc
index fb2588f50631e8..9b2beeb26dfb30 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/tpu_sharding_identification_pass.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/tpu_sharding_identification_pass.cc
@@ -176,7 +176,7 @@ LogicalResult VerifySharding(mlir::Type type,
     // verify shardings that actually break a tensor apart.
     return success();
   }
-  if (RankedTensorType ranked_type = type.dyn_cast<RankedTensorType>()) {
+  if (RankedTensorType ranked_type = mlir::dyn_cast<RankedTensorType>(type)) {
     const int64_t tensor_rank = ranked_type.getRank();
     int tile_assignment_rank = sharding->tile_assignment_dimensions_size();
 
@@ -461,13 +461,13 @@ std::optional<StringRef> GetXlaShardingFromRetval(
           llvm::dyn_cast<func::FuncOp>(call_op.resolveCallable());
       if (!func) continue;
       value_to_visit = func.front().getTerminator()->getOperand(
-          value_to_visit.cast<OpResult>().getResultNumber());
+          mlir::cast<OpResult>(value_to_visit).getResultNumber());
       values_to_visit.push_back(value_to_visit);
       continue;
     }
 
     if (auto while_op = llvm::dyn_cast<TF::WhileRegionOp>(def)) {
-      if (auto op_result = value_to_visit.cast<OpResult>()) {
+      if (auto op_result = mlir::cast<OpResult>(value_to_visit)) {
         int result_idx = op_result.getResultNumber();
         if (auto yield_op = llvm::dyn_cast<TF::YieldOp>(
                 while_op.getBody().front().getTerminator())) {
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/tpu_space_to_depth_pass.cc b/tensorflow/compiler/mlir/tensorflow/transforms/tpu_space_to_depth_pass.cc
index c6ce1428bfb3e4..ef16273e9eea45 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/tpu_space_to_depth_pass.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/tpu_space_to_depth_pass.cc
@@ -90,7 +90,7 @@ LogicalResult HandleCast(TF::CastOp cast_op, ArrayRef<int64_t> new_shape) {
   auto transform_result_type =
       RankedTensorType::get(new_shape, getElementTypeOrSelf(cast_input));
   cast_input.setType(transform_result_type);
-  auto block_arg = cast_input.dyn_cast<mlir::BlockArgument>();
+  auto block_arg = mlir::dyn_cast<mlir::BlockArgument>(cast_input);
   auto cast_op_input = dyn_cast_or_null<TF::CastOp>(cast_input.getDefiningOp());
   while (block_arg || cast_op_input) {
     if (block_arg) {
@@ -105,7 +105,7 @@ LogicalResult HandleCast(TF::CastOp cast_op, ArrayRef<int64_t> new_shape) {
           RankedTensorType::get(new_shape, getElementTypeOrSelf(cast_input));
       cast_input.setType(transform_result_type);
       // Update block arg and cast_op_input.
-      block_arg = cast_input.dyn_cast<mlir::BlockArgument>();
+      block_arg = mlir::dyn_cast<mlir::BlockArgument>(cast_input);
       cast_op_input = dyn_cast_or_null<TF::CastOp>(cast_input.getDefiningOp());
     }
   }
@@ -114,7 +114,7 @@ LogicalResult HandleCast(TF::CastOp cast_op, ArrayRef<int64_t> new_shape) {
 
 // Handles padding before convolution for space to depth transform.
 LogicalResult HandlePad(TF::PadOp op, int32_t kernel_size, int32_t block_size) {
-  auto ranked_type = op.getInput().getType().dyn_cast<RankedTensorType>();
+  auto ranked_type = mlir::dyn_cast<RankedTensorType>(op.getInput().getType());
   if (!ranked_type) return failure();
   auto pad_input_shape = ranked_type.getShape();
   Location loc = op.getLoc();
@@ -164,7 +164,7 @@ void HandleConv2DStride(TF::Conv2DOp conv2d) {
 // Transforms input shape for the first convolution.
 void HandleConv2DInput(TF::Conv2DOp conv2d, int64_t block_size) {
   auto input = conv2d.getInput();
-  auto input_shape = input.getType().cast<RankedTensorType>().getShape();
+  auto input_shape = mlir::cast<RankedTensorType>(input.getType()).getShape();
   SmallVector<int64_t, 4> transform_shape = {
       input_shape[0], input_shape[1] / block_size, input_shape[2] / block_size,
       input_shape[3] * block_size * block_size};
@@ -228,7 +228,7 @@ void HandleConv2DFilter(TF::Conv2DOp conv2d, int64_t block_size) {
   OpBuilder builder(conv2d);
   builder.setInsertionPoint(conv2d);
   // Book keeping filter information.
-  auto filter_shape = filter.getType().cast<RankedTensorType>().getShape();
+  auto filter_shape = mlir::cast<RankedTensorType>(filter.getType()).getShape();
   int64_t height = filter_shape[0];
   int64_t width = filter_shape[1];
   int64_t channel = filter_shape[2];
@@ -422,7 +422,7 @@ bool HandleHostReplicatedInputs(int64_t index,
   }
   for (auto entry : llvm::enumerate(inputs)) {
     Value input = entry.value().get();
-    auto ranked_type = input.getType().dyn_cast<RankedTensorType>();
+    auto ranked_type = mlir::dyn_cast<RankedTensorType>(input.getType());
     if (!ranked_type) return false;
     auto input_shape = ranked_type.getShape();
     auto space_to_depth =
@@ -442,7 +442,7 @@ void HandleCluster(tf_device::ClusterFuncOp cluster_func, int32_t block_size,
 
   llvm::SmallVector<int64_t, 8> transform_input_indices;
   for (const auto& input : llvm::enumerate(cluster_func.getOperands())) {
-    if (auto block_arg = input.value().dyn_cast<BlockArgument>()) {
+    if (auto block_arg = mlir::dyn_cast<BlockArgument>(input.value())) {
       if (block_arg.getArgNumber() != arg_num) continue;
       // For a block argument, consider transforms only when it is a replicated
       // input (defining ops will be outside the replicate node).
@@ -462,7 +462,8 @@ void HandleCluster(tf_device::ClusterFuncOp cluster_func, int32_t block_size,
         continue;
       }
       if (!IsSupportedHostInputOp(input_op)) continue;
-      auto ranked_type = input.value().getType().dyn_cast<RankedTensorType>();
+      auto ranked_type =
+          mlir::dyn_cast<RankedTensorType>(input.value().getType());
       if (!ranked_type) continue;
       auto input_shape = ranked_type.getShape();
       HandleHostInput(input.value(), input.index(), cluster_func, block_size,
@@ -473,7 +474,7 @@ void HandleCluster(tf_device::ClusterFuncOp cluster_func, int32_t block_size,
 
 // Checks if input shape of convolution is good for space to depth transform.
 bool Conv2DInputShapeCanTransform(Value input) {
-  auto ranked_type = input.getType().dyn_cast<RankedTensorType>();
+  auto ranked_type = mlir::dyn_cast<RankedTensorType>(input.getType());
   if (!ranked_type) return false;
   auto input_shape = ranked_type.getShape();
   int32_t batch_size = input_shape[0];
@@ -486,7 +487,7 @@ bool Conv2DInputShapeCanTransform(Value input) {
 
 // Get block argument id and number of users for the input arg.
 std::optional<BlockArgumentInfo> GetBlockArgNum(Value arg) {
-  if (auto block_arg = arg.dyn_cast<mlir::BlockArgument>()) {
+  if (auto block_arg = mlir::dyn_cast<mlir::BlockArgument>(arg)) {
     if (!Conv2DInputShapeCanTransform(arg)) return std::nullopt;
     unsigned num_users =
         std::distance(block_arg.getUsers().begin(), block_arg.getUsers().end());
@@ -540,9 +541,9 @@ std::optional<BlockArgumentInfo> GetConv2DInputArgNum(TF::Conv2DOp conv2d) {
 void HandleFirstConvolution(TF::Conv2DOp conv2d, int64_t block_size) {
   // Check if input and filter type are RankedTensorType.
   auto input_tensor_type =
-      conv2d.getInput().getType().dyn_cast<RankedTensorType>();
+      mlir::dyn_cast<RankedTensorType>(conv2d.getInput().getType());
   auto filter_tensor_type =
-      conv2d.getFilter().getType().dyn_cast<RankedTensorType>();
+      mlir::dyn_cast<RankedTensorType>(conv2d.getFilter().getType());
   if (!input_tensor_type || !filter_tensor_type) return;
   // Book keeping filter shape for padding and backprop filter rewrite.
   auto filter_shape = filter_tensor_type.getShape();
@@ -550,7 +551,7 @@ void HandleFirstConvolution(TF::Conv2DOp conv2d, int64_t block_size) {
                                            filter_shape.end());
   // Handles input.
   auto conv2d_input = conv2d.getInput();
-  if (auto block_arg = conv2d_input.dyn_cast<mlir::BlockArgument>()) {
+  if (auto block_arg = mlir::dyn_cast<mlir::BlockArgument>(conv2d_input)) {
     // Change on device function type/shape.
     HandleFuncOp(block_arg.getOwner()->getParentOp());
   }
@@ -559,7 +560,7 @@ void HandleFirstConvolution(TF::Conv2DOp conv2d, int64_t block_size) {
     // Rewrite pad_op before Convolutioin.
     if (failed(HandlePad(pad_op, filter_shape[0], block_size))) return;
     auto pad_input = pad_op.getInput();
-    if (auto block_arg = pad_input.dyn_cast<mlir::BlockArgument>()) {
+    if (auto block_arg = mlir::dyn_cast<mlir::BlockArgument>(pad_input)) {
       // Change on device function type/shape.
       HandleFuncOp(block_arg.getOwner()->getParentOp());
     }
@@ -573,7 +574,7 @@ void HandleFirstConvolution(TF::Conv2DOp conv2d, int64_t block_size) {
   // Book keeping new filter shape for backprop filter rewrite.
   // Filter shape is defined in HandleConv2DFilter, thus it is RankedTensorType.
   filter_shape =
-      conv2d.getFilter().getType().cast<RankedTensorType>().getShape();
+      mlir::cast<RankedTensorType>(conv2d.getFilter().getType()).getShape();
   SmallVector<int32_t, 4> new_filter_shape(filter_shape.begin(),
                                            filter_shape.end());
 
@@ -593,7 +594,7 @@ void HandleFirstConvolution(TF::Conv2DOp conv2d, int64_t block_size) {
 int32_t GetConv2DBlockSize(TF::Conv2DOp conv2d) {
   SmallVector<int32_t, 4> strides(4, 1);
   for (int i = 0; i < 3; ++i) {
-    strides[i] = conv2d.getStrides()[i].cast<mlir::IntegerAttr>().getInt();
+    strides[i] = mlir::cast<mlir::IntegerAttr>(conv2d.getStrides()[i]).getInt();
   }
 
   // Space to depth only supports striding at spatial dimension.
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/tpu_validate_inputs.cc b/tensorflow/compiler/mlir/tensorflow/transforms/tpu_validate_inputs.cc
index 4dc9daa6c705ee..bfc5437b140e32 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/tpu_validate_inputs.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/tpu_validate_inputs.cc
@@ -372,7 +372,8 @@ bool CheckOpsClusterIO(Operation* op, MetadataMap& metadata_map) {
 
 bool TypeMustBeNonXLA(const Type& type) {
   const Type elem = getElementTypeOrSelf(type);
-  return !elem.isa<TF::ResourceType>() && !tensorflow::TypeValidForXLA(type);
+  return !mlir::isa<TF::ResourceType>(elem) &&
+         !tensorflow::TypeValidForXLA(type);
 }
 
 // Check if the op cannot be XLA compiled. If the op does not satisfy this
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/unroll_batch_matmul.cc b/tensorflow/compiler/mlir/tensorflow/transforms/unroll_batch_matmul.cc
index abdd1a83d516eb..ff8ac1ad7cacd1 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/unroll_batch_matmul.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/unroll_batch_matmul.cc
@@ -96,7 +96,7 @@ TF::ReshapeOp ConvertTFBatchMatMulOp<BatchMatMulOpType>::createReshapeOp(
 template <typename BatchMatMulOpType>
 std::vector<Value> ConvertTFBatchMatMulOp<BatchMatMulOpType>::sliceInput(
     Value value, int batch_size, Location loc, PatternRewriter& rewriter) {
-  RankedTensorType tensorType = value.getType().cast<RankedTensorType>();
+  RankedTensorType tensorType = mlir::cast<RankedTensorType>(value.getType());
   Type element_type = tensorType.getElementType();
 
   int rank = tensorType.getShape().size();
@@ -150,17 +150,17 @@ LogicalResult ConvertTFBatchMatMulOp<BatchMatMulOpType>::matchAndRewrite(
   Value input_lhs = op.getX();
   Value input_rhs = op.getY();
 
-  if (!input_lhs.getType().isa<RankedTensorType>()) {
+  if (!mlir::isa<RankedTensorType>(input_lhs.getType())) {
     // LHS must be a ranked tensor type
     return failure();
   }
-  if (!input_rhs.getType().isa<RankedTensorType>()) {
+  if (!mlir::isa<RankedTensorType>(input_rhs.getType())) {
     // RHS must be a ranked tensor type
     return failure();
   }
 
-  auto lhs_type = input_lhs.getType().cast<RankedTensorType>();
-  auto rhs_type = input_rhs.getType().cast<RankedTensorType>();
+  auto lhs_type = mlir::cast<RankedTensorType>(input_lhs.getType());
+  auto rhs_type = mlir::cast<RankedTensorType>(input_rhs.getType());
 
   // Skip int8 x int8 => int32.
   if (lhs_type.getElementType().isInteger(8) &&
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/xla_call_module_deserialization.cc b/tensorflow/compiler/mlir/tensorflow/transforms/xla_call_module_deserialization.cc
index 20dcdb8b034c97..9237ff8d5b69dd 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/xla_call_module_deserialization.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/xla_call_module_deserialization.cc
@@ -34,6 +34,7 @@ limitations under the License.
 #include "mlir/IR/SymbolTable.h"  // from @llvm-project
 #include "mlir/IR/Visitors.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "stablehlo/dialect/ChloOps.h"  // from @stablehlo  // IWYU pragma: keep
 #include "stablehlo/dialect/StablehloOps.h"  // from @stablehlo  // IWYU pragma: keep
@@ -156,8 +157,8 @@ LogicalResult SymbolizeCustomCallCalledIndex(
           return WalkResult::interrupt();
         }
 
-        auto called_index_attr = backend_config.get(kCalledIndexAttrName)
-                                     .dyn_cast_or_null<IntegerAttr>();
+        auto called_index_attr = mlir::dyn_cast_or_null<IntegerAttr>(
+            backend_config.get(kCalledIndexAttrName));
         if (!called_index_attr) {
           op->emitOpError()
               << "is missing attribute '" << kCalledIndexAttrName << "'";
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/xla_call_module_serialization.cc b/tensorflow/compiler/mlir/tensorflow/transforms/xla_call_module_serialization.cc
index a75bf4c75d8033..6ab5da6bdb2e3c 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/xla_call_module_serialization.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/xla_call_module_serialization.cc
@@ -24,6 +24,7 @@ limitations under the License.
 #include "mlir/IR/OwningOpRef.h"  // from @llvm-project
 #include "mlir/IR/SymbolTable.h"  // from @llvm-project
 #include "mlir/Pass/PassManager.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "stablehlo/api/PortableApi.h"  // from @stablehlo
 #include "stablehlo/dialect/Serialization.h"  // from @stablehlo
 #include "stablehlo/dialect/StablehloOps.h"  // from @stablehlo  // IWYU pragma: keep
@@ -66,8 +67,8 @@ FailureOr<ArrayAttr> DesymbolizeCustomCallCalledIndex(ModuleOp module) {
                         << "'";
       return WalkResult::interrupt();
     }
-    auto called_func = backend_config.get(kCalledFuncAttrName)
-                           .dyn_cast_or_null<SymbolRefAttr>();
+    auto called_func = mlir::dyn_cast_or_null<SymbolRefAttr>(
+        backend_config.get(kCalledFuncAttrName));
     if (!called_func) {
       op->emitOpError() << "is missing attribute '" << kCalledFuncAttrName
                         << "'";
diff --git a/tensorflow/compiler/mlir/tensorflow/transforms/xla_rewrite.cc b/tensorflow/compiler/mlir/tensorflow/transforms/xla_rewrite.cc
index 1992f43a951184..8ce264b47b57d4 100644
--- a/tensorflow/compiler/mlir/tensorflow/transforms/xla_rewrite.cc
+++ b/tensorflow/compiler/mlir/tensorflow/transforms/xla_rewrite.cc
@@ -18,6 +18,7 @@ limitations under the License.
 
 #include <stack>
 
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_device.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_types.h"
@@ -44,8 +45,7 @@ void MoveResourceArgsToEnd(func::FuncOp callee) {
   // Copy the resource-type parameters to the end.
   for (unsigned i = 0; i < num_params; ++i) {
     BlockArgument param = callee.getArgument(i);
-    if (getElementTypeOrSelf(param.getType())
-            .template isa<TF::ResourceType>()) {
+    if (mlir::isa<TF::ResourceType>(getElementTypeOrSelf(param.getType()))) {
       removed_params.set(i);
       callee.getBody().addArgument(param.getType(), param.getLoc());
       param.replaceAllUsesWith(callee.getArguments().back());
@@ -65,7 +65,7 @@ void RewriteCall(tf_device::ClusterFuncOp cluster_func_op, SymbolTable &symtab,
   llvm::SmallVector<Value> non_resource_args, resource_args;
   bool has_resources = false, in_order = true;
   for (const Value &arg : cluster_func_op.getOperands()) {
-    if (!getElementTypeOrSelf(arg.getType()).template isa<TF::ResourceType>()) {
+    if (!mlir::isa<TF::ResourceType>(getElementTypeOrSelf(arg.getType()))) {
       non_resource_args.push_back(arg);
       if (has_resources) in_order = false;
     } else {
diff --git a/tensorflow/compiler/mlir/tensorflow/translate/BUILD b/tensorflow/compiler/mlir/tensorflow/translate/BUILD
index 59d7cfd7081106..6e3a8377b3d81e 100644
--- a/tensorflow/compiler/mlir/tensorflow/translate/BUILD
+++ b/tensorflow/compiler/mlir/tensorflow/translate/BUILD
@@ -107,6 +107,7 @@ cc_library(
         "@llvm-project//llvm:Support",
         "@llvm-project//mlir:DerivedAttributeOpInterface",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
         "@local_xla//xla:status_macros",
     ],
 )
@@ -209,6 +210,7 @@ cc_library(
         "@llvm-project//mlir:FuncDialect",
         "@llvm-project//mlir:IR",
         "@llvm-project//mlir:Parser",
+        "@llvm-project//mlir:Support",
     ],
 )
 
diff --git a/tensorflow/compiler/mlir/tensorflow/translate/export_graphdef.cc b/tensorflow/compiler/mlir/tensorflow/translate/export_graphdef.cc
index 523048cd7cd582..893b5b3ada6b94 100644
--- a/tensorflow/compiler/mlir/tensorflow/translate/export_graphdef.cc
+++ b/tensorflow/compiler/mlir/tensorflow/translate/export_graphdef.cc
@@ -42,6 +42,7 @@ limitations under the License.
 #include "mlir/Pass/Pass.h"  // from @llvm-project
 #include "mlir/Pass/PassManager.h"  // from @llvm-project
 #include "mlir/Support/DebugStringHelper.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/op_or_arg_name_mapper.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_executor.h"
@@ -205,9 +206,9 @@ StatusOr<std::unique_ptr<NodeDef>> Exporter::GetArgumentNode(
 
   node_def->set_op(FunctionLibraryDefinition::kArgOp);
 
-  mlir::TensorType arg_type = arg.getType().cast<mlir::TensorType>();
+  mlir::TensorType arg_type = mlir::cast<mlir::TensorType>(arg.getType());
   if (auto resource_type =
-          arg_type.getElementType().dyn_cast<mlir::TF::ResourceType>()) {
+          mlir::dyn_cast<mlir::TF::ResourceType>(arg_type.getElementType())) {
     llvm::ArrayRef<mlir::TensorType> subtypes = resource_type.getSubtypes();
     if (!subtypes.empty()) {
       AttrValue handle_dtypes_attr;
@@ -266,7 +267,8 @@ StatusOr<std::unique_ptr<NodeDef>> Exporter::GetReturnNode(
   node_def->set_op(FunctionLibraryDefinition::kRetOp);
   DataType dtype;
   TF_RETURN_IF_ERROR(ConvertToDataType(
-      operand.getType().cast<mlir::TensorType>().getElementType(), &dtype));
+      mlir::cast<mlir::TensorType>(operand.getType()).getElementType(),
+      &dtype));
   AttrValue type_attr;
   type_attr.set_type(dtype);
   (*node_def->mutable_attr())["T"] = type_attr;
@@ -290,7 +292,7 @@ StatusOr<std::unique_ptr<NodeDef>> Exporter::GetReturnNode(
 
 Status Exporter::AddEdgeBetweenNodes(Value src, Node* dst_node,
                                      unsigned dst_index) {
-  if (auto input_result = src.dyn_cast<mlir::OpResult>()) {
+  if (auto input_result = mlir::dyn_cast<mlir::OpResult>(src)) {
     auto* input_inst = GetIslandInnerOpOrSelf(input_result.getOwner());
     // Replaces the input node with NextIteration sink if it is a NextIteration
     // source.
@@ -302,7 +304,7 @@ Status Exporter::AddEdgeBetweenNodes(Value src, Node* dst_node,
     auto node_it = nodes_.find(input_inst);
     TF_RET_CHECK(node_it != nodes_.end())
         << "Use of OpResult encountered before def!";
-    if (input_result.getType().isa<mlir::tf_executor::ControlType>()) {
+    if (mlir::isa<mlir::tf_executor::ControlType>(input_result.getType())) {
       graph_->AddControlEdge(node_it->second, dst_node,
                              /*allow_duplicates=*/true);
     } else {
@@ -312,7 +314,7 @@ Status Exporter::AddEdgeBetweenNodes(Value src, Node* dst_node,
     return OkStatus();
   }
 
-  auto input_arg = src.cast<BlockArgument>();
+  auto input_arg = mlir::cast<BlockArgument>(src);
   auto input_node_it = args_.find(input_arg);
   TF_RET_CHECK(input_node_it != args_.end())
       << "Use of BlockArgument encounted before def!";
@@ -327,7 +329,7 @@ Status Exporter::AddEdge(Operation* inst) {
   if (auto fetch = llvm::dyn_cast<mlir::tf_executor::FetchOp>(inst)) {
     for (auto operand_and_idx : llvm::enumerate(fetch.getOperands())) {
       Value operand = operand_and_idx.value();
-      if (operand.getType().isa<mlir::tf_executor::ControlType>()) break;
+      if (mlir::isa<mlir::tf_executor::ControlType>(operand.getType())) break;
 
       auto* dst_node = returns_[fetch][operand_and_idx.index()];
       TF_RETURN_IF_ERROR(AddEdgeBetweenNodes(operand, dst_node, 0));
@@ -447,7 +449,8 @@ Status Exporter::AddFetchNode(FuncOp function, mlir::tf_executor::FetchOp fetch,
                               llvm::ArrayRef<llvm::StringRef> names) {
   auto& return_nodes = returns_[fetch];
   for (auto operand_and_idx : llvm::enumerate(fetch.getOperands())) {
-    if (operand_and_idx.value().getType().isa<mlir::tf_executor::ControlType>())
+    if (mlir::isa<mlir::tf_executor::ControlType>(
+            operand_and_idx.value().getType()))
       break;
 
     TF_ASSIGN_OR_RETURN(
@@ -467,7 +470,7 @@ Status Exporter::GetControlRetNodes(
     mlir::tf_executor::FetchOp fetch,
     absl::flat_hash_set<Node*>* control_ret_nodes) {
   for (Value fetch_operand : fetch.getOperands()) {
-    if (fetch_operand.getType().isa<mlir::tf_executor::ControlType>()) {
+    if (mlir::isa<mlir::tf_executor::ControlType>(fetch_operand.getType())) {
       Operation* defining_op =
           GetIslandInnerOpOrSelf(fetch_operand.getDefiningOp());
       auto node_it = nodes_.find(defining_op);
@@ -509,14 +512,16 @@ StatusOr<std::unique_ptr<Graph>> Exporter::Convert(
   auto dict_attr =
       function->getAttrOfType<mlir::DictionaryAttr>(kEntryFuncAttr);
   if (dict_attr) {
-    TF_RET_CHECK(dict_attr.get("inputs").isa<mlir::StringAttr>())
+    TF_RET_CHECK(mlir::isa<mlir::StringAttr>(dict_attr.get("inputs")))
         << "inputs missing in entry function attribute";
-    TF_RET_CHECK(dict_attr.get("outputs").isa<mlir::StringAttr>())
+    TF_RET_CHECK(mlir::isa<mlir::StringAttr>(dict_attr.get("outputs")))
         << "outputs missing in entry function attribute";
-    dict_attr.get("inputs").cast<mlir::StringAttr>().getValue().split(
-        input_names, ',', /*MaxSplit=*/-1, /*KeepEmpty=*/false);
-    dict_attr.get("outputs").cast<mlir::StringAttr>().getValue().split(
-        output_names, ',', /*MaxSplit=*/-1, /*KeepEmpty=*/false);
+    mlir::cast<mlir::StringAttr>(dict_attr.get("inputs"))
+        .getValue()
+        .split(input_names, ',', /*MaxSplit=*/-1, /*KeepEmpty=*/false);
+    mlir::cast<mlir::StringAttr>(dict_attr.get("outputs"))
+        .getValue()
+        .split(output_names, ',', /*MaxSplit=*/-1, /*KeepEmpty=*/false);
   }
 
   auto graph = std::make_unique<Graph>(OpRegistry::Global());
@@ -582,7 +587,7 @@ StatusOr<std::unique_ptr<Graph>> Exporter::Convert(
     int index = it.index();
     auto arg = it.value();
     mlir::Type type = arg.getType();
-    if (!type.isa<mlir::TensorType>()) {
+    if (!mlir::isa<mlir::TensorType>(type)) {
       return errors::InvalidArgument(
           "FuncOps arguments must have tensor types. Found ",
           mlir::debugString(type), " in function ", function.getName().str());
@@ -607,8 +612,8 @@ StatusOr<std::unique_ptr<Graph>> Exporter::Convert(
   // Adds nodes for operations.
   for (Operation& inst : graph_op.GetBody()) {
     for (auto type : inst.getResultTypes())
-      if (!type.isa<mlir::TensorType, mlir::tf_executor::ControlType,
-                    mlir::tf_executor::TokenType>())
+      if (!mlir::isa<mlir::TensorType, mlir::tf_executor::ControlType,
+                     mlir::tf_executor::TokenType>(type))
         return errors::InvalidArgument(
             "Values must be of tensor type, TensorFlow control type, or "
             "TensorFlow token type. Found ",
diff --git a/tensorflow/compiler/mlir/tensorflow/translate/export_tf_dialect_op.cc b/tensorflow/compiler/mlir/tensorflow/translate/export_tf_dialect_op.cc
index 6ce83519a0fe6d..1734755ee1fa90 100644
--- a/tensorflow/compiler/mlir/tensorflow/translate/export_tf_dialect_op.cc
+++ b/tensorflow/compiler/mlir/tensorflow/translate/export_tf_dialect_op.cc
@@ -25,6 +25,7 @@ limitations under the License.
 #include "llvm/Support/Casting.h"
 #include "mlir/IR/Attributes.h"  // from @llvm-project
 #include "mlir/Interfaces/DerivedAttributeOpInterface.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/compiler/mlir/tensorflow/utils/convert_type.h"
 #include "tensorflow/compiler/mlir/tensorflow/utils/export_utils.h"
@@ -183,7 +184,7 @@ Status PopulateDerivedAttributes(mlir::Operation* inst, llvm::StringRef name,
     auto values = inst->getResults();
     auto begin = values.begin();
     auto end = values.begin();
-    while (end != values.end() && (*end).getType().isa<mlir::ShapedType>())
+    while (end != values.end() && mlir::isa<mlir::ShapedType>((*end).getType()))
       end++;
     if (begin != end) {
       mlir::TF::ResultShapeRange output_shapes = {
diff --git a/tensorflow/compiler/mlir/tensorflow/translate/import_model.cc b/tensorflow/compiler/mlir/tensorflow/translate/import_model.cc
index 42b059cbd0a527..7809c2bd69fab6 100644
--- a/tensorflow/compiler/mlir/tensorflow/translate/import_model.cc
+++ b/tensorflow/compiler/mlir/tensorflow/translate/import_model.cc
@@ -68,6 +68,7 @@ limitations under the License.
 #include "mlir/IR/Verifier.h"  // from @llvm-project
 #include "mlir/IR/Visitors.h"  // from @llvm-project
 #include "mlir/Pass/PassManager.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/cc/saved_model/constants.h"
 #include "tensorflow/cc/saved_model/loader_util.h"
 #include "tensorflow/compiler/jit/shape_inference_helpers.h"
@@ -1228,7 +1229,7 @@ absl::StatusOr<mlir::Type> ImporterBase::InferOutputType(
         TF_ASSIGN_OR_RETURN(
             auto etype, ConvertToMlirTensorType(shape_proto, dtype, &builder));
         return mlir::UnrankedTensorType::get(mlir::TF::ResourceType::get(
-            {etype.cast<TensorType>()}, builder.getContext()));
+            {mlir::cast<TensorType>(etype)}, builder.getContext()));
       } else {
         return mlir::UnrankedTensorType::get(
             mlir::TF::ResourceType::get(builder.getContext()));
@@ -2000,7 +2001,7 @@ mlir::Operation* ImporterBase::CreateOperation(
         record_resource = [&](mlir::Type type) {
           type.walk([&](mlir::Type t) {
             if (resource) return mlir::WalkResult::interrupt();
-            if (type.isa<mlir::TF::ResourceType>()) {
+            if (mlir::isa<mlir::TF::ResourceType>(type)) {
               resource = true;
               return mlir::WalkResult::interrupt();
             }
@@ -3187,10 +3188,10 @@ void StructuredValueLinearizer::RecursivelyFindLeaves(
          << " at index path: <value>";
       for (auto path_element : current_index_path_) {
         os << ".";
-        if (auto integer = path_element.dyn_cast<mlir::IntegerAttr>()) {
+        if (auto integer = mlir::dyn_cast<mlir::IntegerAttr>(path_element)) {
           os << integer.getValue();
         } else {
-          auto str = path_element.cast<mlir::StringAttr>();
+          auto str = mlir::cast<mlir::StringAttr>(path_element);
           os << str.getValue();
         }
       }
diff --git a/tensorflow/compiler/mlir/tensorflow/translate/tf_mlir_translate.cc b/tensorflow/compiler/mlir/tensorflow/translate/tf_mlir_translate.cc
index b0759da88e4ced..ed604a9290a4a4 100644
--- a/tensorflow/compiler/mlir/tensorflow/translate/tf_mlir_translate.cc
+++ b/tensorflow/compiler/mlir/tensorflow/translate/tf_mlir_translate.cc
@@ -28,6 +28,7 @@ limitations under the License.
 #include "mlir/IR/MLIRContext.h"  // from @llvm-project
 #include "mlir/IR/Operation.h"  // from @llvm-project
 #include "mlir/Parser/Parser.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/cc/saved_model/bundle_v2.h"
 #include "tensorflow/cc/saved_model/reader.h"
 #include "tensorflow/compiler/mlir/tensorflow/translate/import_model.h"
@@ -263,7 +264,7 @@ GraphdefToSplattedMlirTranslateFunction(
         if (auto attr = inst.getAttrOfType<mlir::ElementsAttr>(attr_id)) {
           mlir::Attribute rand_val;
           mlir::Type element_type = attr.getShapedType().getElementType();
-          if (element_type.isa<mlir::IntegerType>()) {
+          if (mlir::isa<mlir::IntegerType>(element_type)) {
             rand_val = mlir::IntegerAttr::get(element_type, std::rand());
           } else if (element_type.isF16() || element_type.isF32() ||
                      element_type.isF64()) {
diff --git a/tensorflow/compiler/mlir/tensorflow/utils/attribute_utils.h b/tensorflow/compiler/mlir/tensorflow/utils/attribute_utils.h
index 5a99806d4295f3..0771b529465a94 100644
--- a/tensorflow/compiler/mlir/tensorflow/utils/attribute_utils.h
+++ b/tensorflow/compiler/mlir/tensorflow/utils/attribute_utils.h
@@ -22,6 +22,7 @@ limitations under the License.
 #include "llvm/ADT/SmallVector.h"
 #include "mlir/IR/Attributes.h"  // from @llvm-project
 #include "mlir/IR/Operation.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/tf2xla/tf2xla_defs.h"
 
 namespace mlir {
@@ -167,7 +168,7 @@ class IdentityNOp;
 // as an attribute.
 template <typename AttrT>
 bool GetValueAsConstant(Value val, AttrT &attr) {
-  while (auto result = val.dyn_cast<OpResult>()) {
+  while (auto result = mlir::dyn_cast<OpResult>(val)) {
     Operation *op = result.getOwner();
     if (!isa<IdentityOp>(op) && !isa<IdentityNOp>(op)) break;
     val = op->getOperand(result.getResultNumber());
diff --git a/tensorflow/compiler/mlir/tensorflow/utils/call_graph_util.cc b/tensorflow/compiler/mlir/tensorflow/utils/call_graph_util.cc
index fd3c00a3873e5c..030b8ae7575a40 100644
--- a/tensorflow/compiler/mlir/tensorflow/utils/call_graph_util.cc
+++ b/tensorflow/compiler/mlir/tensorflow/utils/call_graph_util.cc
@@ -19,6 +19,7 @@ limitations under the License.
 #include "llvm/ADT/StringRef.h"
 #include "mlir/Dialect/Func/IR/FuncOps.h"  // from @llvm-project
 #include "mlir/IR/BuiltinOps.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_saved_model.h"
 
 namespace mlir {
@@ -54,7 +55,7 @@ llvm::SmallVector<func::FuncOp> GetEntryFunctions(ModuleOp module) {
 LogicalResult GetCallees(SymbolUserOpInterface op, SymbolTable &symtab,
                          llvm::SmallVector<func::FuncOp> &callees) {
   for (auto attr : op->getAttrs()) {
-    auto sym = attr.getValue().dyn_cast<SymbolRefAttr>();
+    auto sym = mlir::dyn_cast<SymbolRefAttr>(attr.getValue());
     if (!sym) continue;
     auto callee = symtab.lookup<func::FuncOp>(sym.getRootReference());
     if (!callee) {
diff --git a/tensorflow/compiler/mlir/tensorflow/utils/convert_tensor.cc b/tensorflow/compiler/mlir/tensorflow/utils/convert_tensor.cc
index 10e882192cfdf3..d1f68c1cd9ddd6 100644
--- a/tensorflow/compiler/mlir/tensorflow/utils/convert_tensor.cc
+++ b/tensorflow/compiler/mlir/tensorflow/utils/convert_tensor.cc
@@ -34,6 +34,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/IR/Types.h"  // from @llvm-project
 #include "mlir/Support/DebugStringHelper.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_attributes.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_types.h"
 #include "tensorflow/compiler/mlir/tensorflow/utils/convert_type.h"
@@ -242,12 +243,12 @@ void ConvertToTensorShapeProto(ArrayRef<int64_t> shape,
 }
 
 PartialTensorShape ConvertTypeToTensorShape(const mlir::Type& type) {
-  if (type.isa<mlir::UnrankedTensorType>()) {
+  if (mlir::isa<mlir::UnrankedTensorType>(type)) {
     // An empty PartialTensorShape indicates an unranked tensor.
     return PartialTensorShape();
   }
 
-  if (auto tensor_type = type.dyn_cast<mlir::RankedTensorType>()) {
+  if (auto tensor_type = mlir::dyn_cast<mlir::RankedTensorType>(type)) {
     TensorShapeProto tensor_shape_proto;
     ConvertToTensorShapeProto(tensor_type.getShape(), &tensor_shape_proto);
     return PartialTensorShape(tensor_shape_proto);
@@ -259,11 +260,11 @@ PartialTensorShape ConvertTypeToTensorShape(const mlir::Type& type) {
 }
 
 mlir::TF::ShapeAttr ConvertTypeToTensorShapeAttr(const mlir::Type& type) {
-  if (type.isa<mlir::UnrankedTensorType>()) {
+  if (mlir::isa<mlir::UnrankedTensorType>(type)) {
     return mlir::TF::ShapeAttr::get(type.getContext(), std::nullopt);
   }
 
-  if (auto tensor_type = type.dyn_cast<mlir::RankedTensorType>()) {
+  if (auto tensor_type = mlir::dyn_cast<mlir::RankedTensorType>(type)) {
     return mlir::TF::ShapeAttr::get(type.getContext(), tensor_type.getShape());
   }
 
@@ -427,10 +428,10 @@ Status ConvertToTensorProto(const ElementsAttr attr, TensorProto* output) {
   output->set_dtype(output_dtype);
   ConvertToTensorShapeProto(shape, output->mutable_tensor_shape());
 
-  if (auto tensor_attr = attr.dyn_cast<mlir::TF::TensorProtoAttr>())
+  if (auto tensor_attr = mlir::dyn_cast<mlir::TF::TensorProtoAttr>(attr))
     return ConvertTensorProtoAttr(tensor_attr, output);
 
-  auto dense_attr = attr.dyn_cast<mlir::DenseElementsAttr>();
+  auto dense_attr = mlir::dyn_cast<mlir::DenseElementsAttr>(attr);
   if (!dense_attr) return errors::InvalidArgument("Unsupported elements attr");
 
   switch (output_dtype) {
@@ -496,7 +497,7 @@ Status ConvertToTensorProto(const ElementsAttr attr, TensorProto* output) {
                              output->mutable_tensor_content());
       break;
     case DT_STRING:
-      ConvertStringElementsAttr(dense_attr.cast<DenseStringElementsAttr>(),
+      ConvertStringElementsAttr(mlir::cast<DenseStringElementsAttr>(dense_attr),
                                 output->mutable_string_val());
       break;
     case DT_UINT8:
diff --git a/tensorflow/compiler/mlir/tensorflow/utils/convert_tensor_test.cc b/tensorflow/compiler/mlir/tensorflow/utils/convert_tensor_test.cc
index f3c51f88fc7630..3feed8904fab0e 100644
--- a/tensorflow/compiler/mlir/tensorflow/utils/convert_tensor_test.cc
+++ b/tensorflow/compiler/mlir/tensorflow/utils/convert_tensor_test.cc
@@ -23,6 +23,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/IR/Dialect.h"  // from @llvm-project
 #include "mlir/IR/MLIRContext.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/compiler/mlir/tensorflow/utils/dynamic_shape_utils.h"
 #include "xla/test.h"
@@ -97,8 +98,8 @@ TEST(ConvertTypeToTensorTypeTest, ConvertStringTensor) {
   ASSERT_TRUE(value_or_status.ok());
   auto attr = value_or_status.value();
 
-  EXPECT_TRUE(attr.isa<mlir::DenseStringElementsAttr>());
-  auto string_attr = attr.cast<mlir::DenseStringElementsAttr>();
+  EXPECT_TRUE(mlir::isa<mlir::DenseStringElementsAttr>(attr));
+  auto string_attr = mlir::cast<mlir::DenseStringElementsAttr>(attr);
   auto string_values = string_attr.getRawStringData();
   ASSERT_EQ(string_values.size(), 4);
   EXPECT_EQ(string_values[0], mlir::StringRef("one"));
@@ -191,7 +192,7 @@ TEST_F(ConvertTensorTest, Simple) {
 }
 
 bool IsSplat(mlir::ElementsAttr attr) {
-  return attr.cast<mlir::DenseElementsAttr>().isSplat();
+  return mlir::cast<mlir::DenseElementsAttr>(attr).isSplat();
 }
 
 TEST(ConvertTensorProtoTest, SplatTensor) {
diff --git a/tensorflow/compiler/mlir/tensorflow/utils/convert_type.cc b/tensorflow/compiler/mlir/tensorflow/utils/convert_type.cc
index 880501c3e89554..cc7179ffb3968c 100644
--- a/tensorflow/compiler/mlir/tensorflow/utils/convert_type.cc
+++ b/tensorflow/compiler/mlir/tensorflow/utils/convert_type.cc
@@ -22,6 +22,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/IR/Types.h"  // from @llvm-project
 #include "mlir/Support/DebugStringHelper.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_types.h"
 #include "tensorflow/compiler/mlir/tensorflow/utils/dynamic_shape_utils.h"
 #include "tensorflow/core/framework/types.h"
@@ -124,7 +125,7 @@ Status ConvertScalarTypeToDataType(Type type, DataType* dtype) {
   } else if (type.isFloat8E5M2()) {
     *dtype = DT_FLOAT8_E5M2;
     return OkStatus();
-  } else if (auto itype = type.dyn_cast<mlir::IntegerType>()) {
+  } else if (auto itype = mlir::dyn_cast<mlir::IntegerType>(type)) {
     switch (itype.getWidth()) {
       case 1:
         *dtype = DT_BOOL;
@@ -148,7 +149,7 @@ Status ConvertScalarTypeToDataType(Type type, DataType* dtype) {
         return errors::Unimplemented(
             absl::StrCat("Converting ", debugString(type), " to DataType"));
     }
-  } else if (auto complex_type = type.dyn_cast<mlir::ComplexType>()) {
+  } else if (auto complex_type = mlir::dyn_cast<mlir::ComplexType>(type)) {
     auto etype = complex_type.getElementType();
     if (etype.isF32()) {
       *dtype = DT_COMPLEX64;
@@ -174,7 +175,7 @@ Status ConvertScalarTypeToDataType(Type type, DataType* dtype) {
 }
 
 Status ConvertToDataType(Type type, DataType* dtype) {
-  if (auto stype = type.dyn_cast<ShapedType>()) {
+  if (auto stype = mlir::dyn_cast<ShapedType>(type)) {
     TF_RETURN_IF_ERROR(
         ConvertScalarTypeToDataType(stype.getElementType(), dtype));
   } else {
diff --git a/tensorflow/compiler/mlir/tensorflow/utils/device_util.cc b/tensorflow/compiler/mlir/tensorflow/utils/device_util.cc
index 51db1be0820761..d9249d472b334c 100644
--- a/tensorflow/compiler/mlir/tensorflow/utils/device_util.cc
+++ b/tensorflow/compiler/mlir/tensorflow/utils/device_util.cc
@@ -29,6 +29,7 @@ limitations under the License.
 #include "mlir/IR/Diagnostics.h"  // from @llvm-project
 #include "mlir/IR/Location.h"  // from @llvm-project
 #include "mlir/IR/Operation.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "tensorflow/core/common_runtime/device.h"
 #include "tensorflow/core/common_runtime/device_set.h"
@@ -67,7 +68,7 @@ mlir::LogicalResult GetDevicesFromOp(mlir::Operation* op,
   for (const auto& kv : llvm::enumerate(array_attr)) {
     const int idx = kv.index();
 
-    auto string_attr = kv.value().dyn_cast<mlir::StringAttr>();
+    auto string_attr = mlir::dyn_cast<mlir::StringAttr>(kv.value());
     if (!string_attr)
       return op->emitOpError(llvm::formatv(
           "bad '{0}' attribute at index {1}, not a string", kDevicesAttr, idx));
@@ -100,7 +101,7 @@ mlir::LogicalResult GetDevicesFromOp(mlir::Operation* op,
           llvm::formatv("bad '{0}' attribute, '{1}', not a valid device",
                         kDevicesAttr, name.strref()));
 
-    if (auto gpu_metadata = attr.dyn_cast<mlir::TF::GpuDeviceMetadata>()) {
+    if (auto gpu_metadata = mlir::dyn_cast<mlir::TF::GpuDeviceMetadata>(attr)) {
       devices->AddGpuDevice(device, gpu_metadata);
     } else {
       devices->AddDevice(device);
@@ -144,10 +145,11 @@ mlir::LogicalResult GetDevicesFromOp(mlir::Operation* op,
   auto devices_attr = op->getAttr(kDevicesAttr);
   if (!devices_attr) return mlir::success();
 
-  if (auto array_attr = devices_attr.dyn_cast<mlir::ArrayAttr>()) {
+  if (auto array_attr = mlir::dyn_cast<mlir::ArrayAttr>(devices_attr)) {
     return GetDevicesFromOp(op, array_attr, devices);
 
-  } else if (auto dict_attr = devices_attr.dyn_cast<mlir::DictionaryAttr>()) {
+  } else if (auto dict_attr =
+                 mlir::dyn_cast<mlir::DictionaryAttr>(devices_attr)) {
     return GetDevicesFromOp(op, dict_attr, devices);
   }
 
diff --git a/tensorflow/compiler/mlir/tensorflow/utils/device_util_test.cc b/tensorflow/compiler/mlir/tensorflow/utils/device_util_test.cc
index 326dbbb4781602..f089ec111991e7 100644
--- a/tensorflow/compiler/mlir/tensorflow/utils/device_util_test.cc
+++ b/tensorflow/compiler/mlir/tensorflow/utils/device_util_test.cc
@@ -28,6 +28,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinOps.h"  // from @llvm-project
 #include "mlir/IR/Location.h"  // from @llvm-project
 #include "mlir/IR/MLIRContext.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "tensorflow/core/common_runtime/device.h"
 #include "tensorflow/core/common_runtime/device_set.h"
@@ -87,18 +88,18 @@ TEST(DeviceUtilTest, AddDeviceToOp) {
   ASSERT_EQ(devices_attr.size(), 3);
 
   // CPU device added with an empty metadata.
-  auto device_meta_0 = devices_attr.get(cpu0).dyn_cast<mlir::UnitAttr>();
+  auto device_meta_0 = mlir::dyn_cast<mlir::UnitAttr>(devices_attr.get(cpu0));
   ASSERT_NE(device_meta_0, nullptr);
 
   // GPU device successfully parsed compute capability from description.
   auto device_meta_1 =
-      devices_attr.get(gpu0).dyn_cast<mlir::TF::GpuDeviceMetadata>();
+      mlir::dyn_cast<mlir::TF::GpuDeviceMetadata>(devices_attr.get(gpu0));
   ASSERT_NE(device_meta_1, nullptr);
   ASSERT_EQ(device_meta_1.getCcMajor(), 7);
   ASSERT_EQ(device_meta_1.getCcMinor(), 0);
 
   // If description is empty GPU devices added with an empty metadata.
-  auto device_meta_2 = devices_attr.get(gpu1).dyn_cast<mlir::UnitAttr>();
+  auto device_meta_2 = mlir::dyn_cast<mlir::UnitAttr>(devices_attr.get(gpu1));
   ASSERT_NE(device_meta_2, nullptr);
 }
 
diff --git a/tensorflow/compiler/mlir/tensorflow/utils/error_util.cc b/tensorflow/compiler/mlir/tensorflow/utils/error_util.cc
index 6a66067920fdcb..f0dd8f1c748a25 100644
--- a/tensorflow/compiler/mlir/tensorflow/utils/error_util.cc
+++ b/tensorflow/compiler/mlir/tensorflow/utils/error_util.cc
@@ -20,6 +20,7 @@ limitations under the License.
 #include "absl/status/status.h"
 #include "mlir/IR/BuiltinAttributes.h"  // from @llvm-project
 #include "mlir/IR/Diagnostics.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/core/platform/errors.h"
 #include "tensorflow/core/platform/status.h"
 #include "tensorflow/core/util/managed_stack_trace.h"
@@ -33,7 +34,7 @@ StatusScopedDiagnosticHandler::StatusScopedDiagnosticHandler(
     this->shouldShowLocFn = [](Location loc) -> bool {
       // For a Location to be surfaced in the stack, it must evaluate to true.
       // For any Location that is a FileLineColLoc:
-      if (FileLineColLoc fileLoc = loc.dyn_cast<FileLineColLoc>()) {
+      if (FileLineColLoc fileLoc = mlir::dyn_cast<FileLineColLoc>(loc)) {
         return !tensorflow::IsInternalFrameForFilename(
             fileLoc.getFilename().str());
       } else {
diff --git a/tensorflow/compiler/mlir/tensorflow/utils/export_utils.cc b/tensorflow/compiler/mlir/tensorflow/utils/export_utils.cc
index f01a3f0e09d19b..cd6b2e0f8fa8b3 100644
--- a/tensorflow/compiler/mlir/tensorflow/utils/export_utils.cc
+++ b/tensorflow/compiler/mlir/tensorflow/utils/export_utils.cc
@@ -39,6 +39,7 @@ limitations under the License.
 #include "mlir/IR/OperationSupport.h"  // from @llvm-project
 #include "mlir/IR/TypeUtilities.h"  // from @llvm-project
 #include "mlir/Support/DebugStringHelper.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_attributes.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_executor.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
@@ -81,9 +82,9 @@ Status ConvertLocation(mlir::Location inst_loc, llvm::StringRef node_name,
                        NodeDef::ExperimentalDebugInfo* debug_info) {
   mlir::Location unwrapped_inst_loc = GetLocationWithoutOpType(inst_loc);
 
-  if (auto call_site = unwrapped_inst_loc.dyn_cast<mlir::CallSiteLoc>()) {
-    if (auto name_loc = GetLocationWithoutOpType(call_site.getCallee())
-                            .dyn_cast<mlir::NameLoc>()) {
+  if (auto call_site = mlir::dyn_cast<mlir::CallSiteLoc>(unwrapped_inst_loc)) {
+    if (auto name_loc = mlir::dyn_cast<mlir::NameLoc>(
+            GetLocationWithoutOpType(call_site.getCallee()))) {
       llvm::StringRef original_node_name, original_func_name;
       std::tie(original_node_name, original_func_name) =
           name_loc.getName().strref().split('@');
@@ -96,7 +97,7 @@ Status ConvertLocation(mlir::Location inst_loc, llvm::StringRef node_name,
         debug_info->add_original_func_names(original_func_name.str());
       }
     }
-  } else if (auto fused = unwrapped_inst_loc.dyn_cast<mlir::FusedLoc>()) {
+  } else if (auto fused = mlir::dyn_cast<mlir::FusedLoc>(unwrapped_inst_loc)) {
     auto locations = fused.getLocations();
     if (locations.size() <= 1)
       return errors::InvalidArgument("expected experimental debuf info.");
@@ -145,8 +146,8 @@ Status ConvertAttribute(const mlir::FlatSymbolRefAttr& attr, AttrValue* value) {
 
 Status ConvertAttribute(const mlir::TF::FuncAttr& attr, bool remove_ref_type,
                         AttrValue* value) {
-  TF_RETURN_IF_ERROR(
-      ConvertAttribute(attr.getName().cast<mlir::FlatSymbolRefAttr>(), value));
+  TF_RETURN_IF_ERROR(ConvertAttribute(
+      mlir::cast<mlir::FlatSymbolRefAttr>(attr.getName()), value));
   TF_RETURN_IF_ERROR(ConvertAttributes(attr.getAttrs().getValue(),
                                        /*attrs_to_ignore=*/{}, remove_ref_type,
                                        value->mutable_func()->mutable_attr()));
@@ -199,13 +200,13 @@ Status ConvertAttribute(const mlir::ArrayAttr& attr, bool remove_ref_type,
                         AttrValue* value) {
   auto* list = value->mutable_list();
   for (mlir::Attribute a : attr.getValue()) {
-    if (auto attr = a.dyn_cast<mlir::BoolAttr>()) {
+    if (auto attr = mlir::dyn_cast<mlir::BoolAttr>(a)) {
       list->add_b(attr.getValue());
-    } else if (auto attr = a.dyn_cast<mlir::IntegerAttr>()) {
+    } else if (auto attr = mlir::dyn_cast<mlir::IntegerAttr>(a)) {
       list->add_i(attr.getInt());
-    } else if (auto attr = a.dyn_cast<mlir::FloatAttr>()) {
+    } else if (auto attr = mlir::dyn_cast<mlir::FloatAttr>(a)) {
       list->add_f(attr.getValueAsDouble());
-    } else if (auto attr = a.dyn_cast<mlir::StringAttr>()) {
+    } else if (auto attr = mlir::dyn_cast<mlir::StringAttr>(a)) {
       AttrValue nested_value;
       TF_RETURN_IF_ERROR(ConvertAttribute(attr, &nested_value));
       switch (nested_value.value_case()) {
@@ -221,32 +222,32 @@ Status ConvertAttribute(const mlir::ArrayAttr& attr, bool remove_ref_type,
         default:
           return errors::Unimplemented("Unhandled nested attribute!");
       }
-    } else if (auto attr = a.dyn_cast<mlir::ElementsAttr>()) {
+    } else if (auto attr = mlir::dyn_cast<mlir::ElementsAttr>(a)) {
       TensorProto tensor;
       TF_RETURN_IF_ERROR(ConvertToTensorProto(attr, &tensor));
       *list->add_tensor() = tensor;
-    } else if (auto attr = a.dyn_cast<mlir::FlatSymbolRefAttr>()) {
+    } else if (auto attr = mlir::dyn_cast<mlir::FlatSymbolRefAttr>(a)) {
       AttrValue attr_val;
       TF_RETURN_IF_ERROR(ConvertAttribute(attr, &attr_val));
       *list->add_func() = attr_val.func();
-    } else if (auto attr = a.dyn_cast<mlir::TypeAttr>()) {
+    } else if (auto attr = mlir::dyn_cast<mlir::TypeAttr>(a)) {
       AttrValue attr_val;
       // For type attributes, we only propagate the element type.
       mlir::Type elt_type = attr.getValue();
-      if (auto shaped_type = elt_type.dyn_cast<mlir::ShapedType>()) {
+      if (auto shaped_type = mlir::dyn_cast<mlir::ShapedType>(elt_type)) {
         elt_type = shaped_type.getElementType();
       }
       TF_RETURN_IF_ERROR(
           ConvertAttribute(elt_type, remove_ref_type, &attr_val));
       list->add_type(attr_val.type());
-    } else if (auto attr = a.dyn_cast<mlir::TF::ShapeAttr>()) {
+    } else if (auto attr = mlir::dyn_cast<mlir::TF::ShapeAttr>(a)) {
       AttrValue attr_val;
       TF_RETURN_IF_ERROR(ConvertAttribute(attr, &attr_val));
       *list->add_shape() = attr_val.shape();
-    } else if (auto attr = a.dyn_cast<mlir::ArrayAttr>()) {
+    } else if (auto attr = mlir::dyn_cast<mlir::ArrayAttr>(a)) {
       std::vector<int64_t> vals;
       for (mlir::Attribute a : attr.getValue()) {
-        auto i = a.dyn_cast<mlir::IntegerAttr>();
+        auto i = mlir::dyn_cast<mlir::IntegerAttr>(a);
         if (!i)
           return errors::Unimplemented(
               "Expected 64-bit integer array attributes!");
@@ -274,21 +275,21 @@ Status ConvertAttribute(const mlir::ArrayAttr& attr, bool remove_ref_type,
 static bool IsRefTypeControlOp(mlir::Operation* op) {
   if (auto next_iter_sink =
           llvm::dyn_cast<mlir::tf_executor::NextIterationSinkOp>(op))
-    return mlir::getElementTypeOrSelf(next_iter_sink.getInput().getType())
-        .isa<mlir::TF::TensorFlowRefType>();
+    return mlir::isa<mlir::TF::TensorFlowRefType>(
+        mlir::getElementTypeOrSelf(next_iter_sink.getInput().getType()));
 
   auto op_name_or_status = GetTensorFlowOpName(op->getName().getStringRef());
   if (!op_name_or_status.ok()) return false;
 
   auto op_name = std::move(op_name_or_status).value();
   if (op_name.equals("NextIteration"))
-    return mlir::getElementTypeOrSelf(op->getOperand(0).getType())
-        .isa<mlir::TF::TensorFlowRefType>();
+    return mlir::isa<mlir::TF::TensorFlowRefType>(
+        mlir::getElementTypeOrSelf(op->getOperand(0).getType()));
 
   if (op_name.equals("Enter") || op_name.equals("Exit") ||
       op_name.equals("Switch") || op_name.equals("Merge")) {
-    return getElementTypeOrSelf(op->getResult(0).getType())
-        .isa<mlir::TF::TensorFlowRefType>();
+    return mlir::isa<mlir::TF::TensorFlowRefType>(
+        getElementTypeOrSelf(op->getResult(0).getType()));
   }
   return false;
 }
@@ -393,18 +394,18 @@ Status ConvertAttributes(
       name = mangling_util::DemangleAttributeName(name);
     }
     AttrValue value;
-    if (auto symbol_ref = attr.dyn_cast<mlir::SymbolRefAttr>()) {
-      TF_RETURN_IF_ERROR(
-          ConvertAttribute(symbol_ref.cast<mlir::FlatSymbolRefAttr>(), &value));
+    if (auto symbol_ref = mlir::dyn_cast<mlir::SymbolRefAttr>(attr)) {
+      TF_RETURN_IF_ERROR(ConvertAttribute(
+          mlir::cast<mlir::FlatSymbolRefAttr>(symbol_ref), &value));
       func_call_attrs[string(name)] = std::move(value);
       continue;
     }
-    if (auto func_attr = attr.dyn_cast<mlir::TF::FuncAttr>()) {
+    if (auto func_attr = mlir::dyn_cast<mlir::TF::FuncAttr>(attr)) {
       TF_RETURN_IF_ERROR(ConvertAttribute(func_attr, remove_ref_type, &value));
       func_call_attrs[string(name)] = std::move(value);
       continue;
     }
-    if (attr.isa<mlir::AffineMapAttr>()) {
+    if (mlir::isa<mlir::AffineMapAttr>(attr)) {
       // AffineMapAttr is not implemented.
       return errors::Unimplemented("AffineMap attribute (needed for '",
                                    name_strref, "') unimplemented");
diff --git a/tensorflow/compiler/mlir/tensorflow/utils/location_utils.cc b/tensorflow/compiler/mlir/tensorflow/utils/location_utils.cc
index 2a6ff2921a4ad5..afaa78640af3d9 100644
--- a/tensorflow/compiler/mlir/tensorflow/utils/location_utils.cc
+++ b/tensorflow/compiler/mlir/tensorflow/utils/location_utils.cc
@@ -17,15 +17,16 @@ limitations under the License.
 
 #include "mlir/IR/BuiltinAttributes.h"  // from @llvm-project
 #include "mlir/IR/Location.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 
 namespace tensorflow {
 
 mlir::Location GetLocationWithoutOpType(mlir::Location loc) {
-  if (auto fused_loc = loc.dyn_cast<mlir::FusedLoc>()) {
+  if (auto fused_loc = mlir::dyn_cast<mlir::FusedLoc>(loc)) {
     auto locations = fused_loc.getLocations();
     if (!locations.empty()) {
       // Skip locations for propagating op_type metadata.
-      if (auto name_loc = locations[0].dyn_cast<mlir::NameLoc>()) {
+      if (auto name_loc = mlir::dyn_cast<mlir::NameLoc>(locations[0])) {
         if (name_loc.getName().strref().ends_with(":")) {
           if (locations.size() == 2)
             return locations[1];
diff --git a/tensorflow/compiler/mlir/tensorflow/utils/session_utils.cc b/tensorflow/compiler/mlir/tensorflow/utils/session_utils.cc
index 2895ebdc9c6424..9e8db314f51b0d 100644
--- a/tensorflow/compiler/mlir/tensorflow/utils/session_utils.cc
+++ b/tensorflow/compiler/mlir/tensorflow/utils/session_utils.cc
@@ -20,6 +20,7 @@ limitations under the License.
 #include "absl/status/status.h"
 #include "llvm/ADT/SmallSet.h"
 #include "llvm/ADT/StringRef.h"
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/utils/string_container_utils.h"
 #include "tensorflow/core/common_runtime/device_mgr.h"
 #include "tensorflow/core/framework/device.h"
@@ -32,7 +33,7 @@ std::string GetVariableName(TF::VarHandleOp var_handle_op) {
   // In some cases the shared_name attribute doesn't have the same
   // tensor name in the model, so we first try to use the location
   // then fallback to shared_name attribute.
-  if (auto loc = var_handle_op->getLoc().dyn_cast<NameLoc>())
+  if (auto loc = mlir::dyn_cast<NameLoc>(var_handle_op->getLoc()))
     return loc.getName().str();
   return var_handle_op.getSharedName().str();
 }
diff --git a/tensorflow/compiler/mlir/tensorflow/utils/stablehlo_custom_call.cc b/tensorflow/compiler/mlir/tensorflow/utils/stablehlo_custom_call.cc
index 549b665f044314..6ab4aa64a89070 100644
--- a/tensorflow/compiler/mlir/tensorflow/utils/stablehlo_custom_call.cc
+++ b/tensorflow/compiler/mlir/tensorflow/utils/stablehlo_custom_call.cc
@@ -17,6 +17,7 @@ limitations under the License.
 
 #include "mlir/IR/Attributes.h"  // from @llvm-project
 #include "mlir/IR/BuiltinAttributes.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 
 namespace mlir {
@@ -63,7 +64,7 @@ FailureOr<SymbolRefAttr> GetTfFuncCustomCallFuncName(
     return failure();
   }
 
-  if (auto attr = f.dyn_cast<FlatSymbolRefAttr>()) {
+  if (auto attr = mlir::dyn_cast<FlatSymbolRefAttr>(f)) {
     return attr;
   }
 
diff --git a/tensorflow/compiler/mlir/tensorflow/utils/tf_xla_mlir_translate.cc b/tensorflow/compiler/mlir/tensorflow/utils/tf_xla_mlir_translate.cc
index 97f1093fe3d56b..5a29bae67afe01 100644
--- a/tensorflow/compiler/mlir/tensorflow/utils/tf_xla_mlir_translate.cc
+++ b/tensorflow/compiler/mlir/tensorflow/utils/tf_xla_mlir_translate.cc
@@ -37,6 +37,7 @@ limitations under the License.
 #include "mlir/IR/Attributes.h"  // from @llvm-project
 #include "mlir/IR/BuiltinOps.h"  // from @llvm-project
 #include "mlir/IR/Dialect.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Tools/mlir-translate/Translation.h"  // from @llvm-project
 #include "stablehlo/dialect/StablehloOps.h"  // from @stablehlo
@@ -396,11 +397,11 @@ SerializedMlirStringAttrToMlirModuleTranslate(llvm::StringRef input,
   // an output parameter is provided for returning the number of chars read.
   size_t numRead;
   mlir::Attribute attr = mlir::parseAttribute(input, context, {}, &numRead);
-  if (!attr || !attr.isa<mlir::StringAttr>()) {
+  if (!attr || !mlir::isa<mlir::StringAttr>(attr)) {
     LOG(ERROR) << "Input is not parsable as a MLIR StringAttr.";
     return nullptr;
   }
-  auto str_attr = attr.cast<mlir::StringAttr>();
+  auto str_attr = mlir::cast<mlir::StringAttr>(attr);
 
   mlir::DialectRegistry registry;
   RegisterMlirInputDialects(registry);
diff --git a/tensorflow/compiler/mlir/tensorflow/utils/tpu_rewrite_device_util.cc b/tensorflow/compiler/mlir/tensorflow/utils/tpu_rewrite_device_util.cc
index c6ff5f5c93c6ef..690263319cf51e 100644
--- a/tensorflow/compiler/mlir/tensorflow/utils/tpu_rewrite_device_util.cc
+++ b/tensorflow/compiler/mlir/tensorflow/utils/tpu_rewrite_device_util.cc
@@ -36,6 +36,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinAttributes.h"  // from @llvm-project
 #include "mlir/IR/BuiltinOps.h"  // from @llvm-project
 #include "mlir/IR/TypeUtilities.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "tensorflow/compiler/jit/flags.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_device.h"
@@ -609,7 +610,7 @@ StatusOr<llvm::SmallVector<int64_t, 8>> GetDeviceCoordinates(
   for (auto device_coordinate_and_idx :
        llvm::enumerate(device_assignment_attr)) {
     auto device_coordinate =
-        device_coordinate_and_idx.value().dyn_cast<mlir::IntegerAttr>();
+        mlir::dyn_cast<mlir::IntegerAttr>(device_coordinate_and_idx.value());
     if (!device_coordinate)
       return absl::InvalidArgumentError(
           llvm::formatv(kBadIntArrayElementMsg, kDeviceAssignmentAttr,
@@ -733,8 +734,8 @@ bool IsTPUReplicatedCore(llvm::StringRef device) {
 
 bool TypeValidForXLA(const mlir::Type& type) {
   const mlir::Type elem = getElementTypeOrSelf(type);
-  return !elem.isa<mlir::TF::ResourceType>() &&
-         !elem.isa<mlir::TF::StringType>();
+  return !mlir::isa<mlir::TF::ResourceType>(elem) &&
+         !mlir::isa<mlir::TF::StringType>(elem);
 }
 
 mlir::LogicalResult GetDeviceToHostMap(
diff --git a/tensorflow/compiler/mlir/tensorflow/utils/translate_utils.cc b/tensorflow/compiler/mlir/tensorflow/utils/translate_utils.cc
index 988950389edf8b..74dd7803a48a20 100644
--- a/tensorflow/compiler/mlir/tensorflow/utils/translate_utils.cc
+++ b/tensorflow/compiler/mlir/tensorflow/utils/translate_utils.cc
@@ -16,6 +16,7 @@ limitations under the License.
 #include "tensorflow/compiler/mlir/tensorflow/utils/translate_utils.h"
 
 #include "mlir/IR/OpDefinition.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/core/platform/errors.h"
 
 namespace tensorflow {
@@ -44,21 +45,21 @@ mlir::LogicalResult ExtractTfVersions(mlir::ModuleOp module,
   if (!version_attr) return mlir::failure();
 
   auto producer =
-      version_attr.get("producer").dyn_cast_or_null<mlir::IntegerAttr>();
+      mlir::dyn_cast_or_null<mlir::IntegerAttr>(version_attr.get("producer"));
   if (!producer) return mlir::failure();
   versions->set_producer(producer.getInt());
 
-  auto min_consumer =
-      version_attr.get("min_consumer").dyn_cast_or_null<mlir::IntegerAttr>();
+  auto min_consumer = mlir::dyn_cast_or_null<mlir::IntegerAttr>(
+      version_attr.get("min_consumer"));
   if (min_consumer) versions->set_min_consumer(min_consumer.getInt());
 
-  auto bad_consumers =
-      version_attr.get("bad_consumers").dyn_cast_or_null<mlir::ArrayAttr>();
+  auto bad_consumers = mlir::dyn_cast_or_null<mlir::ArrayAttr>(
+      version_attr.get("bad_consumers"));
   if (!bad_consumers) return mlir::success();
 
   for (auto bad_consumer : bad_consumers) {
     auto bad_consumer_int_attr =
-        bad_consumer.dyn_cast_or_null<mlir::IntegerAttr>();
+        mlir::dyn_cast_or_null<mlir::IntegerAttr>(bad_consumer);
     if (!bad_consumer_int_attr) return mlir::failure();
 
     versions->mutable_bad_consumers()->Add(bad_consumer_int_attr.getInt());
@@ -72,7 +73,7 @@ ::tsl::StatusOr<int64_t> GetTfGraphProducerVersion(mlir::ModuleOp module) {
     return errors::Internal(
         "Missing 'tf.versions' attribute on the module, abort.\n");
   }
-  auto producer = versions.get("producer").dyn_cast<mlir::IntegerAttr>();
+  auto producer = mlir::dyn_cast<mlir::IntegerAttr>(versions.get("producer"));
   if (!producer) {
     return errors::Internal(
         "Missing 'producer' attribute on the module, abort.\n");
diff --git a/tensorflow/compiler/mlir/tensorflow/utils/xla_sharding_util.cc b/tensorflow/compiler/mlir/tensorflow/utils/xla_sharding_util.cc
index ea76adb284b7e2..334cca591cf569 100644
--- a/tensorflow/compiler/mlir/tensorflow/utils/xla_sharding_util.cc
+++ b/tensorflow/compiler/mlir/tensorflow/utils/xla_sharding_util.cc
@@ -70,7 +70,7 @@ mlir::LogicalResult CreateSplitOp(const int num_split,
   // Correctly set output shapes of split op output if input shape is statically
   // known.
   mlir::Type output_type;
-  auto input_type = src_input.getType().cast<mlir::TensorType>();
+  auto input_type = mlir::cast<mlir::TensorType>(src_input.getType());
 
   if (input_type.hasRank()) {
     if (input_type.getShape()[split_dimension] == mlir::ShapedType::kDynamic) {
@@ -122,7 +122,7 @@ mlir::TF::ConcatOp CreateConcatOp(const int concat_dimension,
   // across logical devices, we refer to the shape of 0th logical device
   // computation output.
   mlir::Type output_type;
-  auto input_type = inputs[0].getType().cast<mlir::TensorType>();
+  auto input_type = mlir::cast<mlir::TensorType>(inputs[0].getType());
 
   if (input_type.hasRank()) {
     if (input_type.getShape()[concat_dimension] == mlir::ShapedType::kDynamic) {
@@ -294,9 +294,9 @@ mlir::LogicalResult DecodeShardingAttribute(const std::string& shard_str,
 mlir::LogicalResult DecodeShardingAttribute(mlir::Attribute shard_attr,
                                             xla::OpSharding& sharding,
                                             bool report_error) {
-  if (!shard_attr.isa<mlir::StringAttr>()) return mlir::failure();
+  if (!mlir::isa<mlir::StringAttr>(shard_attr)) return mlir::failure();
 
-  auto shard_str = shard_attr.cast<mlir::StringAttr>().getValue().str();
+  auto shard_str = mlir::cast<mlir::StringAttr>(shard_attr).getValue().str();
   return DecodeShardingAttribute(shard_str, sharding, report_error);
 }
 
@@ -350,7 +350,8 @@ mlir::LogicalResult ExtractInputsForLogicalDevices(
 
     xla::OpSharding sharding;
     if (DecodeShardingAttribute(
-            sharding_attr.cast<mlir::StringAttr>().getValue().str(), sharding)
+            mlir::cast<mlir::StringAttr>(sharding_attr).getValue().str(),
+            sharding)
             .failed()) {
       return cluster_func.emitError("incorrect sharding format for inputs");
     }
@@ -443,13 +444,14 @@ mlir::LogicalResult ParseAndValidateOutputSharding(
        llvm::enumerate(output_sharding_attrs)) {
     const auto& output_sharding = output_sharding_and_index.value();
     const int sharding_index = output_sharding_and_index.index();
-    if (!output_sharding.isa<mlir::StringAttr>())
+    if (!mlir::isa<mlir::StringAttr>(output_sharding))
       return cluster_func.emitError(llvm::formatv(
           "non-string output sharding at index {0}", sharding_index));
 
     xla::OpSharding sharding;
     if (DecodeShardingAttribute(
-            output_sharding.cast<mlir::StringAttr>().getValue().str(), sharding)
+            mlir::cast<mlir::StringAttr>(output_sharding).getValue().str(),
+            sharding)
             .failed()) {
       return cluster_func.emitError("incorrect sharding format for outputs");
     }
@@ -661,7 +663,7 @@ mlir::LogicalResult GetOutputTypesForLogicalDeviceComputation(
     const auto output_index = result_and_index.index();
     const auto& output_sharding = output_sharding_config[output_index];
     const auto cluster_func_output_type =
-        result_and_index.value().getType().cast<mlir::TensorType>();
+        mlir::cast<mlir::TensorType>(result_and_index.value().getType());
 
     // If output shape of cluster func is statically known and output is tiled
     // sharded, then the corresponding output shape of cluster func must be
diff --git a/tensorflow/compiler/mlir/tf2xla/api/v1/compile_mlir_util.cc b/tensorflow/compiler/mlir/tf2xla/api/v1/compile_mlir_util.cc
index 322862828e63b3..7358b97971e0fe 100644
--- a/tensorflow/compiler/mlir/tf2xla/api/v1/compile_mlir_util.cc
+++ b/tensorflow/compiler/mlir/tf2xla/api/v1/compile_mlir_util.cc
@@ -175,13 +175,13 @@ Status GetXlaInputShapes(
 // bounded type by using the bounds as dimension sizes. Returns null if is
 // neither.
 mlir::RankedTensorType GetBufferType(mlir::Type ty) {
-  auto ranked_ty = ty.dyn_cast_or_null<mlir::RankedTensorType>();
+  auto ranked_ty = mlir::dyn_cast_or_null<mlir::RankedTensorType>(ty);
   if (!ranked_ty) return {};
 
   int64_t rank = ranked_ty.getRank();
   llvm::SmallVector<int64_t, 4> dims = llvm::to_vector<4>(ranked_ty.getShape());
-  auto encoding = ranked_ty.getEncoding()
-                      .dyn_cast_or_null<mlir::mhlo::TypeExtensionsAttr>();
+  auto encoding = mlir::dyn_cast_or_null<mlir::mhlo::TypeExtensionsAttr>(
+      ranked_ty.getEncoding());
   if (encoding && !encoding.getBounds().empty()) {
     for (int64_t dim = 0; dim < rank; ++dim) {
       if (dims[dim] == mlir::ShapedType::kDynamic) {
@@ -234,7 +234,7 @@ Status GetOutputInfo(
   auto return_op = main_func.begin()->getTerminator();
   for (const auto& type_and_idx : llvm::enumerate(func_type.getResults())) {
     size_t idx = type_and_idx.index();
-    auto result_ty = type_and_idx.value().cast<mlir::RankedTensorType>();
+    auto result_ty = mlir::cast<mlir::RankedTensorType>(type_and_idx.value());
 
     // If the result type isn't static, then the owner of the result may be a
     // cast op from a more specific bounded type to an unbounded dynamic type.
@@ -275,7 +275,8 @@ Status GetOutputInfo(
     TF_RETURN_IF_ERROR(MaybeRewriteLayoutWithShardedShape(
         sharding, shape_determination_fns, &shape));
 
-    auto tensor_type = type_and_idx.value().dyn_cast<mlir::RankedTensorType>();
+    auto tensor_type =
+        mlir::dyn_cast<mlir::RankedTensorType>(type_and_idx.value());
     shapes.push_back(shape);
 
     auto it = output_to_input_alias.find(type_and_idx.index());
@@ -872,7 +873,7 @@ static absl::StatusOr<std::vector<int>> RewriteWithArgs(
       auto resource_type =
           mlir::TF::ResourceType::get({resource_subtype}, builder.getContext());
 
-      auto tensor_type = mlir_arg.getType().cast<mlir::TensorType>();
+      auto tensor_type = mlir::cast<mlir::TensorType>(mlir_arg.getType());
       if (tensor_type.hasRank()) {
         mlir_arg.setType(
             GetTypeFromTFTensorShape(tensor_type.getShape(), resource_type));
diff --git a/tensorflow/compiler/mlir/tf2xla/internal/passes/extract_head_tail_outside_compilation.cc b/tensorflow/compiler/mlir/tf2xla/internal/passes/extract_head_tail_outside_compilation.cc
index ad85310291c146..e0dc7bda1f9c86 100644
--- a/tensorflow/compiler/mlir/tf2xla/internal/passes/extract_head_tail_outside_compilation.cc
+++ b/tensorflow/compiler/mlir/tf2xla/internal/passes/extract_head_tail_outside_compilation.cc
@@ -32,6 +32,7 @@ limitations under the License.
 #include "mlir/IR/Value.h"  // from @llvm-project
 #include "mlir/IR/Visitors.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Transforms/RegionUtils.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/analysis/side_effect_analysis.h"
@@ -78,7 +79,7 @@ bool HasOutsideCompilationAttribute(Operation* op) {
 // Finds op that created a given value. If the value is a BlockArgument, this
 // returns the owner of the Block.
 Operation* GetOpOfValue(Value value) {
-  if (auto block_arg = value.dyn_cast<BlockArgument>())
+  if (auto block_arg = mlir::dyn_cast<BlockArgument>(value))
     return block_arg.getOwner()->getParentOp();
 
   return value.getDefiningOp();
diff --git a/tensorflow/compiler/mlir/tf2xla/internal/passes/extract_outside_compilation.cc b/tensorflow/compiler/mlir/tf2xla/internal/passes/extract_outside_compilation.cc
index 6bc3468a2729e3..10fbd371ca81b2 100644
--- a/tensorflow/compiler/mlir/tf2xla/internal/passes/extract_outside_compilation.cc
+++ b/tensorflow/compiler/mlir/tf2xla/internal/passes/extract_outside_compilation.cc
@@ -386,7 +386,7 @@ llvm::SmallSetVector<Value, 4> GetStaticExternalOperands(
           }
           continue;
         }
-        auto block_arg = v.cast<BlockArgument>();
+        auto block_arg = mlir::cast<BlockArgument>(v);
         if (block_arg.getParentRegion() == op->getParentRegion())
           external_values.insert(v);
       }
@@ -475,7 +475,7 @@ void GetExternalOutputs(const llvm::SmallSetVector<Operation*, 4>& cluster_ops,
 LogicalResult GetShardShapedType(Operation* context_op,
                                  int num_cores_per_replica, Type full_type,
                                  Type& shard_type) {
-  RankedTensorType ranked_type = full_type.dyn_cast<RankedTensorType>();
+  RankedTensorType ranked_type = mlir::dyn_cast<RankedTensorType>(full_type);
   if (!ranked_type)
     return context_op->emitOpError()
            << "A map_outside_compilation op's input and output types must be "
@@ -587,7 +587,8 @@ LogicalResult CreateHostComputeMap(
   // Convert MANUAL sharded outputs to split sharded outputs.
   for (auto [full_type, out] :
        llvm::zip(full_output_types, host_compute.getResults())) {
-    RankedTensorType full_type_ranked = full_type.dyn_cast<RankedTensorType>();
+    RankedTensorType full_type_ranked =
+        mlir::dyn_cast<RankedTensorType>(full_type);
     if (!full_type_ranked)
       return original_op->emitOpError()
              << "map_outside_compilation must have ranked outputs";
diff --git a/tensorflow/compiler/mlir/tf2xla/internal/passes/hoist_broadcast_read.cc b/tensorflow/compiler/mlir/tf2xla/internal/passes/hoist_broadcast_read.cc
index 732bae8c67b018..f16df445439084 100644
--- a/tensorflow/compiler/mlir/tf2xla/internal/passes/hoist_broadcast_read.cc
+++ b/tensorflow/compiler/mlir/tf2xla/internal/passes/hoist_broadcast_read.cc
@@ -72,7 +72,7 @@ Operation* GetAncestorBelow(Operation* descendant, Operation* ancestor) {
 // `is_cpu_read` is set to `true` iff `read` is on a resource with device type
 // CPU.
 LogicalResult IsCpuRead(FuncOp func, ReadVariableOp read, bool& is_cpu_read) {
-  if (auto arg = read->getOperand(0).dyn_cast<BlockArgument>()) {
+  if (auto arg = mlir::dyn_cast<BlockArgument>(read->getOperand(0))) {
     if (arg.getOwner() != &(func.front())) {
       is_cpu_read = false;
       return success();
diff --git a/tensorflow/compiler/mlir/tf2xla/internal/passes/mark_ops_for_outside_compilation.cc b/tensorflow/compiler/mlir/tf2xla/internal/passes/mark_ops_for_outside_compilation.cc
index 617185360a9936..7308669b6359cb 100644
--- a/tensorflow/compiler/mlir/tf2xla/internal/passes/mark_ops_for_outside_compilation.cc
+++ b/tensorflow/compiler/mlir/tf2xla/internal/passes/mark_ops_for_outside_compilation.cc
@@ -38,6 +38,7 @@ limitations under the License.
 #include "mlir/IR/Visitors.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
 #include "mlir/Rewrite/PatternApplicator.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Transforms/RegionUtils.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_device.h"
@@ -238,13 +239,13 @@ void AddRewrittenCompositeOps(MLIRContext* context,
 }
 
 bool IsStringType(Type type) {
-  if (type.isa<mlir::TF::StringType>()) return true;
+  if (mlir::isa<mlir::TF::StringType>(type)) return true;
 
-  auto sub_type = type.dyn_cast<mlir::TF::TensorFlowTypeWithSubtype>();
+  auto sub_type = mlir::dyn_cast<mlir::TF::TensorFlowTypeWithSubtype>(type);
   if (!sub_type) return false;
 
   bool has_string = llvm::any_of(sub_type.GetSubtypes(), [](TensorType type) {
-    return type.getElementType().isa<mlir::TF::StringType>();
+    return mlir::isa<mlir::TF::StringType>(type.getElementType());
   });
   return has_string;
 }
@@ -290,7 +291,8 @@ bool IsSupportedOp(Operation& op,
 }
 
 bool IsVariant(Value value) {
-  return getElementTypeOrSelf(value.getType()).isa<mlir::TF::VariantType>();
+  return mlir::isa<mlir::TF::VariantType>(
+      getElementTypeOrSelf(value.getType()));
 }
 
 bool HasOutsideCompiledAncestor(Operation* op) {
diff --git a/tensorflow/compiler/mlir/tf2xla/internal/passes/tpu_cluster_formation.cc b/tensorflow/compiler/mlir/tf2xla/internal/passes/tpu_cluster_formation.cc
index b600c865661d58..5f752cdedc5c82 100644
--- a/tensorflow/compiler/mlir/tf2xla/internal/passes/tpu_cluster_formation.cc
+++ b/tensorflow/compiler/mlir/tf2xla/internal/passes/tpu_cluster_formation.cc
@@ -51,6 +51,7 @@ limitations under the License.
 #include "mlir/IR/ValueRange.h"  // from @llvm-project
 #include "mlir/IR/Visitors.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Transforms/RegionUtils.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/analysis/side_effect_analysis.h"
@@ -142,7 +143,7 @@ LogicalResult CollectMetadata(Block* block, MetadataMap* metadata_map) {
       return metadata_op.emitError() << kBadReplicateInfoAttrMsg;
 
     auto replication_info_attr_str =
-        replication_info_attr.dyn_cast<StringAttr>();
+        mlir::dyn_cast<StringAttr>(replication_info_attr);
     if (!replication_info_attr_str ||
         replication_info_attr_str.getValue().empty())
       return metadata_op.emitError() << kBadReplicateInfoAttrMsg;
@@ -991,17 +992,16 @@ LogicalResult FormClustersInBlock(
     // Determine `num_replicas`.
     auto num_replicas_attr =
         cluster_metadata->getSecond().get(kNumReplicasAttr);
-    if (!num_replicas_attr || !num_replicas_attr.isa<mlir::IntegerAttr>())
+    if (!num_replicas_attr || !mlir::isa<mlir::IntegerAttr>(num_replicas_attr))
       return cluster.emitError()
              << "requires '" << kNumReplicasAttr << "' int attribute";
-    int num_replicas = num_replicas_attr.cast<mlir::IntegerAttr>().getInt();
+    int num_replicas =
+        mlir::cast<mlir::IntegerAttr>(num_replicas_attr).getInt();
 
     // Determine `num_cores_per_replica`.
     int num_cores_per_replica = 1;
-    auto num_cores_per_replica_attr =
-        cluster_metadata->getSecond()
-            .get(kNumCoresPerReplicaAttr)
-            .dyn_cast_or_null<mlir::IntegerAttr>();
+    auto num_cores_per_replica_attr = mlir::dyn_cast_or_null<mlir::IntegerAttr>(
+        cluster_metadata->getSecond().get(kNumCoresPerReplicaAttr));
     if (num_cores_per_replica_attr)
       num_cores_per_replica = num_cores_per_replica_attr.getInt();
     if (failed(ReplicateCluster(cluster, num_replicas, num_cores_per_replica)))
diff --git a/tensorflow/compiler/mlir/tf2xla/transforms/legalize_tf.cc b/tensorflow/compiler/mlir/tf2xla/transforms/legalize_tf.cc
index edf0b96b569fea..c63cae83079a02 100644
--- a/tensorflow/compiler/mlir/tf2xla/transforms/legalize_tf.cc
+++ b/tensorflow/compiler/mlir/tf2xla/transforms/legalize_tf.cc
@@ -51,6 +51,7 @@ limitations under the License.
 #include "mlir/IR/TypeUtilities.h"  // from @llvm-project
 #include "mlir/IR/Types.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "stablehlo/dialect/ChloOps.h"  // from @stablehlo
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
@@ -89,10 +90,10 @@ static size_t GetFeatureDimension(tensorflow::TensorFormat format,
 
 // Gets all integer values from the given attribute and push them to `values`.
 void GetI64ArrayAttrValues(Attribute attr, SmallVectorImpl<int64_t> *values) {
-  auto array_attr = attr.cast<ArrayAttr>();
+  auto array_attr = mlir::cast<ArrayAttr>(attr);
   values->reserve(array_attr.getValue().size());
   for (Attribute val : array_attr.getValue())
-    values->push_back(val.cast<IntegerAttr>().getValue().getSExtValue());
+    values->push_back(mlir::cast<IntegerAttr>(val).getValue().getSExtValue());
 }
 
 // Returns 1D 32-bit dense elements attribute with the given values.
@@ -142,8 +143,8 @@ Type GetSumAccumulationType(Type input_type) {
 // format supports negative indexing unlike HLO.
 static IntegerAttr GetHLOAxisFromTFAxis(Attribute attr, int64_t rank,
                                         Builder *b) {
-  IntegerAttr intAttr = attr.dyn_cast_or_null<IntegerAttr>();
-  if (auto elementAttr = attr.dyn_cast_or_null<ElementsAttr>()) {
+  IntegerAttr intAttr = mlir::dyn_cast_or_null<IntegerAttr>(attr);
+  if (auto elementAttr = mlir::dyn_cast_or_null<ElementsAttr>(attr)) {
     SmallVector<uint64_t, 1> index(elementAttr.getShapedType().getRank(), 0);
     intAttr = elementAttr.getValues<IntegerAttr>()[index];
   }
@@ -198,7 +199,7 @@ static ConvertOp CastValueToI64(Location loc, Value value,
 // must be a ranked tensor.
 static TF::UnpackOp UnpackTensorAlongZeroDim(Location loc, Value value,
                                              PatternRewriter *rewriter) {
-  auto indices_type = value.getType().cast<RankedTensorType>();
+  auto indices_type = mlir::cast<RankedTensorType>(value.getType());
   int num_outputs = indices_type.getShape().front();
   SmallVector<Type, 2> unpacked_indices_type(
       num_outputs,
@@ -214,7 +215,7 @@ static TF::UnpackOp UnpackTensorAlongZeroDim(Location loc, Value value,
 //
 // Aborts if the type is ranked but doesn't have the dimension.
 int64_t GetDimSize(Type ty, int64_t index) {
-  RankedTensorType ranked_ty = ty.dyn_cast<RankedTensorType>();
+  RankedTensorType ranked_ty = mlir::dyn_cast<RankedTensorType>(ty);
   if (!ranked_ty) return -1;
 
   return ranked_ty.getDimSize(index);
@@ -298,8 +299,8 @@ template <typename BinaryOp>
 static Value StaticBinaryBroadcast(Location loc, Value x, Value y,
                                    DenseIntElementsAttr broadcast_dims,
                                    OpBuilder &builder) {
-  auto x_type = x.getType().cast<RankedTensorType>();
-  auto y_type = y.getType().cast<RankedTensorType>();
+  auto x_type = mlir::cast<RankedTensorType>(x.getType());
+  auto y_type = mlir::cast<RankedTensorType>(y.getType());
   auto result_type = GetStaticBroadcastType(x_type, y_type, broadcast_dims);
   if (!result_type) {
     emitError(loc) << "could not binary broadcast " << x_type << ", " << y_type
@@ -353,7 +354,7 @@ static Value Broadcast1DToFeatureDim(Location loc, Value broadcast_to,
                                      Value broadcast_from, int64_t feature_dim,
                                      OpBuilder &builder) {
   auto broadcast_dims = GetI64ElementsAttr({feature_dim}, &builder);
-  auto to_type = broadcast_to.getType().cast<RankedTensorType>();
+  auto to_type = mlir::cast<RankedTensorType>(broadcast_to.getType());
   auto result_shape = builder.create<shape::ShapeOfOp>(loc, broadcast_to);
   auto result_extents_type = GetExtentsTensorTypeFor(to_type);
   auto result_extents = builder.create<shape::ToExtentTensorOp>(
@@ -372,11 +373,11 @@ static Value Broadcast1DToFeatureDim(Location loc, Value broadcast_to,
 static Value BroadcastToShapeOf(Location loc, Value input, Value broadcast_to,
                                 OpBuilder &builder) {
   auto result_shape = builder.create<shape::ShapeOfOp>(loc, broadcast_to);
-  auto to_type = broadcast_to.getType().cast<TensorType>();
+  auto to_type = mlir::cast<TensorType>(broadcast_to.getType());
   auto result_extents_type = GetExtentsTensorTypeFor(to_type);
   auto result_extents = builder.create<shape::ToExtentTensorOp>(
       loc, result_extents_type, result_shape);
-  int64_t rank = input.getType().cast<RankedTensorType>().getRank();
+  int64_t rank = mlir::cast<RankedTensorType>(input.getType()).getRank();
   auto broadcast_dims = GetI64ElementsAttrForSeq(0, rank, &builder);
   return builder.create<DynamicBroadcastInDimOp>(
       loc, to_type, input, result_extents, broadcast_dims);
@@ -520,8 +521,8 @@ static void CreateWhile32(Location loc, int num_iterations,
 static IntegerAttr getFeatureDimensionAttr(Builder &b,
                                            tensorflow::TensorFormat format,
                                            Value input) {
-  return b.getI64IntegerAttr(
-      GetFeatureDimension(format, input.getType().cast<RankedTensorType>()));
+  return b.getI64IntegerAttr(GetFeatureDimension(
+      format, mlir::cast<RankedTensorType>(input.getType())));
 }
 
 //===----------------------------------------------------------------------===//
@@ -567,7 +568,7 @@ static DenseIntElementsAttr Get2DTransposePerm(BoolAttr transpose, Builder *b) {
 // attribute.
 static DenseIntElementsAttr SliceDenseIntElementsAttrColumn2D(
     ElementsAttr input, int column) {
-  auto int_attr = input.cast<DenseIntElementsAttr>();
+  auto int_attr = mlir::cast<DenseIntElementsAttr>(input);
   auto shaped_type = int_attr.getType();
   auto shape = shaped_type.getShape();
 
@@ -605,8 +606,8 @@ static DenseIntElementsAttr GetInteriorPadding(ElementsAttr tf_padding) {
 // must be broadcasted with a size 1 tensor or another dynamic dimension.
 // Returns false on rankless.
 static bool AreBroadcastCompatible(Value x, Value y) {
-  auto x_rankless = x.getType().dyn_cast<RankedTensorType>();
-  auto y_rankless = y.getType().dyn_cast<RankedTensorType>();
+  auto x_rankless = mlir::dyn_cast<RankedTensorType>(x.getType());
+  auto y_rankless = mlir::dyn_cast<RankedTensorType>(y.getType());
   if (!x_rankless || !y_rankless) {
     return false;
   }
@@ -634,7 +635,7 @@ static bool AreBroadcastCompatible(Value x, Value y) {
 // updated element type.
 static Type ChangeTensorElementType(Builder *b, Type tensor_type,
                                     Type element_type) {
-  RankedTensorType ranked_type = tensor_type.dyn_cast<RankedTensorType>();
+  RankedTensorType ranked_type = mlir::dyn_cast<RankedTensorType>(tensor_type);
   if (ranked_type) {
     return tensorflow::GetTypeFromTFTensorShape(ranked_type.getShape(),
                                                 element_type);
@@ -659,7 +660,7 @@ static Type GetAccumulationType(Type ty) {
 //===----------------------------------------------------------------------===//
 
 static DenseElementsAttr GetEpsilonValue(Type ty) {
-  auto element_ty = ty.cast<TensorType>().getElementType();
+  auto element_ty = mlir::cast<TensorType>(ty).getElementType();
   auto scalar_ty = tensorflow::GetTypeFromTFTensorShape({}, element_ty);
   if (element_ty.isF16()) {
     uint16_t raw_epsilon = Eigen::numext::bit_cast<uint16_t>(
@@ -750,9 +751,10 @@ static bool ArgTypesMatchCallee(mlir::Operation *op, OperandRange args,
 
 static bool CanBeTranslatedToDynamicSlice(Value input, Value start_indices,
                                           DenseIntElementsAttr slice_sizes) {
-  auto input_ty = input.getType().dyn_cast<RankedTensorType>();
+  auto input_ty = mlir::dyn_cast<RankedTensorType>(input.getType());
   if (!input_ty) return false;
-  auto start_indices_ty = start_indices.getType().dyn_cast<RankedTensorType>();
+  auto start_indices_ty =
+      mlir::dyn_cast<RankedTensorType>(start_indices.getType());
   if (!start_indices_ty) return false;
 
   int64_t input_rank = input_ty.getRank();
@@ -780,11 +782,11 @@ static DenseIntElementsAttr TFSliceSizes2HLOSliceSizes(
     Builder *builder) {
   DenseIntElementsAttr constant_start_indices;
   if (!matchPattern(start_indices, m_Constant(&constant_start_indices))) {
-    return hlo::convertElementsAttr(slice_sizes, builder->getIntegerType(64))
-        .cast<DenseIntElementsAttr>();
+    return mlir::cast<DenseIntElementsAttr>(
+        hlo::convertElementsAttr(slice_sizes, builder->getIntegerType(64)));
   }
 
-  auto input_ty = input.getType().dyn_cast<RankedTensorType>();
+  auto input_ty = mlir::dyn_cast<RankedTensorType>(input.getType());
   int64_t input_rank = input_ty.getRank();
   ArrayRef<int64_t> input_shape = input_ty.getShape();
   SmallVector<int64_t, 4> normalized_sizes;
@@ -906,7 +908,7 @@ class ConvertBiasAddOp : public OpRewritePattern<TF::BiasAddOp> {
     if (!FormatFromString(op.getDataFormat().str(), &data_format))
       return op.emitOpError("invalid data format");
 
-    auto value_type = op.getValue().getType().dyn_cast<RankedTensorType>();
+    auto value_type = mlir::dyn_cast<RankedTensorType>(op.getValue().getType());
     if (!value_type) return failure();
     auto feature_dim = GetFeatureDimension(data_format, value_type);
     auto bias_broadcast = Broadcast1DToFeatureDim(
@@ -1008,11 +1010,9 @@ class ConvertConvDynamic : public OpRewritePattern<OpT> {
     if (!GetPaddingFromString(op.getPadding().str(), &padding).ok())
       return failure();
 
-    auto input_ty =
-        op.getInput().getType().template dyn_cast<RankedTensorType>();
-    auto filter_ty =
-        op.getFilter().getType().template dyn_cast<RankedTensorType>();
-    auto result_ty = op.getType().template dyn_cast<RankedTensorType>();
+    auto input_ty = mlir::dyn_cast<RankedTensorType>(op.getInput().getType());
+    auto filter_ty = mlir::dyn_cast<RankedTensorType>(op.getFilter().getType());
+    auto result_ty = mlir::dyn_cast<RankedTensorType>(op.getType());
     if (!input_ty || !filter_ty || !result_ty) return failure();
     // TODO(disc): Remove this constraint once fold and canonicalization
     // implemented.
@@ -1035,7 +1035,7 @@ class ConvertConvDynamic : public OpRewritePattern<OpT> {
     SmallVector<Value, num_spatial_dims * 2> paddings;
 
     auto get_int = [](Attribute attr) {
-      return attr.template cast<IntegerAttr>().getInt();
+      return mlir::cast<IntegerAttr>(attr).getInt();
     };
 
     constexpr int num_dims = num_spatial_dims + 2;
@@ -1177,10 +1177,8 @@ class ConvertConvOp : public OpRewritePattern<OpTy> {
     if (!GetPaddingFromString(op.getPadding().str(), &padding).ok())
       return failure();
 
-    auto input_ty =
-        op.getInput().getType().template dyn_cast<RankedTensorType>();
-    auto filter_ty =
-        op.getFilter().getType().template dyn_cast<RankedTensorType>();
+    auto input_ty = mlir::dyn_cast<RankedTensorType>(op.getInput().getType());
+    auto filter_ty = mlir::dyn_cast<RankedTensorType>(op.getFilter().getType());
 
     // With the exception of input's batch dimension, input and filter need to
     // have static shape for calculation of HLO paddings and feature group count
@@ -1205,7 +1203,7 @@ class ConvertConvOp : public OpRewritePattern<OpTy> {
     SmallVector<int64_t, num_spatial_dims * 2> paddings;
 
     auto get_int = [](Attribute attr) {
-      return attr.template cast<IntegerAttr>().getInt();
+      return mlir::cast<IntegerAttr>(attr).getInt();
     };
 
     constexpr int num_dims = num_spatial_dims + 2;
@@ -1318,8 +1316,8 @@ class ConvertPadOpDynamic : public OpRewritePattern<TF::PadV2Op> {
     auto input = op.getInput();
     auto paddings = op.getPaddings();
     auto constant_values = op.getConstantValues();
-    auto input_type = input.getType().dyn_cast<RankedTensorType>();
-    auto paddings_type = paddings.getType().dyn_cast<RankedTensorType>();
+    auto input_type = mlir::dyn_cast<RankedTensorType>(input.getType());
+    auto paddings_type = mlir::dyn_cast<RankedTensorType>(paddings.getType());
     if (!input_type || !paddings_type || !paddings_type.hasStaticShape())
       return failure();
 
@@ -1385,9 +1383,9 @@ class ConvertGatherNdOpDynamic : public OpRewritePattern<TF::GatherNdOp> {
                                 PatternRewriter &rewriter) const override {
     Location loc = op.getLoc();
     auto params = op.getParams();
-    auto params_ty = params.getType().dyn_cast<RankedTensorType>();
+    auto params_ty = mlir::dyn_cast<RankedTensorType>(params.getType());
     auto indices = op.getIndices();
-    auto indices_ty = indices.getType().dyn_cast<RankedTensorType>();
+    auto indices_ty = mlir::dyn_cast<RankedTensorType>(indices.getType());
     auto params_rank = params_ty.getRank();
     auto indices_rank = indices_ty.getRank();
     int64_t num_index_dims = indices_ty.getDimSize(indices_rank - 1);
@@ -1485,8 +1483,8 @@ class ConvertBF16FloorDivOp : public OpRewritePattern<TF::FloorDivOp> {
 
   LogicalResult matchAndRewrite(TF::FloorDivOp op,
                                 PatternRewriter &rewriter) const override {
-    auto l = op.getX().dyn_cast<TypedValue<RankedTensorType>>();
-    auto r = op.getY().dyn_cast<TypedValue<RankedTensorType>>();
+    auto l = mlir::dyn_cast<TypedValue<RankedTensorType>>(op.getX());
+    auto r = mlir::dyn_cast<TypedValue<RankedTensorType>>(op.getY());
     if (!l || !r) return failure();
 
     auto element_type = getElementTypeOrSelf(l.getType());
@@ -1515,14 +1513,14 @@ class ConvertBroadcastToOp : public OpRewritePattern<TF::BroadcastToOp> {
 
   LogicalResult matchAndRewrite(TF::BroadcastToOp op,
                                 PatternRewriter &rewriter) const override {
-    auto input_type = op.getInput().getType().dyn_cast<RankedTensorType>();
+    auto input_type = mlir::dyn_cast<RankedTensorType>(op.getInput().getType());
     auto output_type = op.getOutput().getType();
     if (!input_type) {
       return rewriter.notifyMatchFailure(op, "requires ranked input shape");
     }
     llvm::SmallVector<int64_t, 4> broadcast_dimensions;
     if (input_type.getRank() > 0) {
-      auto ranked_output_type = output_type.dyn_cast<RankedTensorType>();
+      auto ranked_output_type = mlir::dyn_cast<RankedTensorType>(output_type);
       if (!ranked_output_type) {
         return rewriter.notifyMatchFailure(op, "requires ranked output shape");
       }
@@ -1546,7 +1544,7 @@ class ConvertRollOp : public OpRewritePattern<TF::RollOp> {
   using OpRewritePattern::OpRewritePattern;
   LogicalResult matchAndRewrite(TF::RollOp op,
                                 PatternRewriter &rewriter) const override {
-    auto shift_ty = op.getShift().getType().dyn_cast<RankedTensorType>();
+    auto shift_ty = mlir::dyn_cast<RankedTensorType>(op.getShift().getType());
     if (!shift_ty || shift_ty.getRank() != 0) {
       return rewriter.notifyMatchFailure(
           op, "require the type of shift to be 0D tensor");
@@ -1558,7 +1556,7 @@ class ConvertRollOp : public OpRewritePattern<TF::RollOp> {
     }
     int axis = val.getSExtValue();
 
-    auto input_ty = op.getInput().getType().dyn_cast<RankedTensorType>();
+    auto input_ty = mlir::dyn_cast<RankedTensorType>(op.getInput().getType());
     if (!input_ty || !input_ty.hasStaticShape()) {
       return rewriter.notifyMatchFailure(
           op, "require the type of input to have static shapes");
@@ -1674,7 +1672,7 @@ class ConvertDiagPartOp : public OpRewritePattern<TF::DiagPartOp> {
 
   LogicalResult matchAndRewrite(TF::DiagPartOp op,
                                 PatternRewriter &rewriter) const override {
-    auto input_type = op.getInput().getType().dyn_cast<RankedTensorType>();
+    auto input_type = mlir::dyn_cast<RankedTensorType>(op.getInput().getType());
     if (!input_type || !input_type.hasStaticShape()) return failure();
     int64_t num_dims = input_type.getRank();
     if (num_dims < 2 || num_dims % 2 != 0) return failure();
@@ -1771,7 +1769,7 @@ class ConvertMatrixDiagPartV3Op
   LogicalResult matchAndRewrite(TF::MatrixDiagPartV3Op op,
                                 PatternRewriter &rewriter) const override {
     Location loc = op.getLoc();
-    ShapedType input_type = op.getInput().getType().dyn_cast<ShapedType>();
+    ShapedType input_type = mlir::dyn_cast<ShapedType>(op.getInput().getType());
 
     // Align is a string specifying how superdiagonals and subdiagonals should
     // be aligned/padded for diagonals that are shorter than max_diag_len. The
@@ -2035,7 +2033,7 @@ class ConvertFFTOp : public OpRewritePattern<OpTy> {
   using OpRewritePattern<OpTy>::OpRewritePattern;
   LogicalResult matchAndRewrite(OpTy op,
                                 PatternRewriter &rewriter) const override {
-    auto input_ty = op.getInput().getType().template cast<ShapedType>();
+    auto input_ty = mlir::cast<ShapedType>(op.getInput().getType());
     if (!input_ty.hasRank()) {
       return failure();
     }
@@ -2131,14 +2129,12 @@ class ConvertFusedBatchNormGradBase
     // TODO(b/141785544): Update this to not require static shapes.
     // activation shape needs to be static to convert negative indices in
     // TensorFlow to absolute indices required by HLO.
-    RankedTensorType act_type =
-        act.getType().template dyn_cast<RankedTensorType>();
+    RankedTensorType act_type = mlir::dyn_cast<RankedTensorType>(act.getType());
     if (!act_type) return failure();
     Type act_ele_type = act_type.getElementType();
     // To support mixed precision, the statistics type, which maybe more
     // precise than the input types, are used for this op.
-    Type kernel_type =
-        scale.getType().template cast<TensorType>().getElementType();
+    Type kernel_type = mlir::cast<TensorType>(scale.getType()).getElementType();
     grad = rewriter.create<ConvertOp>(loc, grad, kernel_type);
     act = rewriter.create<ConvertOp>(loc, act, kernel_type);
 
@@ -2260,14 +2256,13 @@ class ConvertFusedBatchNormBase : public OpRewritePattern<FusedBatchNormOpT> {
     auto feature_dim =
         getFeatureDimensionAttr(rewriter, data_format, op.getX());
 
-    auto input_type_tensor = op.getX().getType().template cast<TensorType>();
+    auto input_type_tensor = mlir::cast<TensorType>(op.getX().getType());
     auto input_element_type = input_type_tensor.getElementType();
 
-    auto scale_type_tensor =
-        op.getScale().getType().template cast<TensorType>();
+    auto scale_type_tensor = mlir::cast<TensorType>(op.getScale().getType());
     auto scale_element_type = scale_type_tensor.getElementType();
 
-    auto mean_type_tensor = op.getMean().getType().template cast<TensorType>();
+    auto mean_type_tensor = mlir::cast<TensorType>(op.getMean().getType());
     auto mean_element_type = mean_type_tensor.getElementType();
     // In the training case, dimensions of input tensors must be static.
     if (op.getIsTraining() && (!input_type_tensor.hasStaticShape() ||
@@ -2281,7 +2276,7 @@ class ConvertFusedBatchNormBase : public OpRewritePattern<FusedBatchNormOpT> {
     Value bn_train_input = rewriter.create<mhlo::ConvertOp>(
         op.getLoc(), op.getX(), scale_element_type);
     TensorType bn_train_input_type_tensor =
-        bn_train_input.getType().template cast<TensorType>();
+        mlir::cast<TensorType>(bn_train_input.getType());
 
     if (op.getIsTraining()) {
       // Training case.
@@ -2372,7 +2367,7 @@ class ConvertFusedBatchNormBase : public OpRewritePattern<FusedBatchNormOpT> {
         // For FusedBatchNormV3Op, also create a constant tensor to forward to
         // last reserve_space_3 output.
         auto reserve_space_3_type =
-            op.getResult(5).getType().template cast<TensorType>();
+            mlir::cast<TensorType>(op.getResult(5).getType());
         int num_elements = reserve_space_3_type.hasStaticShape()
                                ? reserve_space_3_type.getNumElements()
                                : 0;
@@ -2416,7 +2411,7 @@ class ConvertFusedBatchNormBase : public OpRewritePattern<FusedBatchNormOpT> {
         // For FusedBatchNormV3Op, also create a constant tensor to forward to
         // last reserve_space_3 output.
         auto reserve_space_3_type =
-            op.getResult(5).getType().template cast<TensorType>();
+            mlir::cast<TensorType>(op.getResult(5).getType());
         int num_elements = reserve_space_3_type.hasStaticShape()
                                ? reserve_space_3_type.getNumElements()
                                : 0;
@@ -2465,9 +2460,9 @@ static PaddingArray GetReduceWindowPaddingAsArray(
 
   for (const auto &dim : input_dims) input_shape.push_back(dim);
   for (Attribute attr : window_dims)
-    window_shape.push_back(attr.cast<IntegerAttr>().getInt());
+    window_shape.push_back(mlir::cast<IntegerAttr>(attr).getInt());
   for (Attribute attr : window_strides)
-    strides.push_back(attr.cast<IntegerAttr>().getInt());
+    strides.push_back(mlir::cast<IntegerAttr>(attr).getInt());
 
   PaddingArray paddings = ::xla::MakePadding(input_shape, window_shape, strides,
                                              ::xla::Padding::kSame);
@@ -2509,8 +2504,7 @@ Operation *AvgPoolDivideByCount(
     const SmallVector<int64_t, num_dims> &strides, OpTy op, Value zero,
     PatternRewriter &rewriter) {
   Location loc = op.getLoc();
-  RankedTensorType pooled_type =
-      pooled.getType().template cast<RankedTensorType>();
+  RankedTensorType pooled_type = mlir::cast<RankedTensorType>(pooled.getType());
   Type element_type = pooled_type.getElementType();
   Operation *result = nullptr;
   RankedTensorType orig_input_type =
@@ -2577,8 +2571,7 @@ class ConvertAvgPoolOp : public OpRewritePattern<OpTy> {
   LogicalResult matchAndRewrite(OpTy op,
                                 PatternRewriter &rewriter) const override {
     Value input_value = GetAvgPoolInput(op);
-    auto input_type =
-        input_value.getType().template dyn_cast<RankedTensorType>();
+    auto input_type = mlir::dyn_cast<RankedTensorType>(input_value.getType());
     if (!input_type) return failure();
 
     // We will do accumulation first; use a larger bitwidth if suitable.
@@ -2587,7 +2580,7 @@ class ConvertAvgPoolOp : public OpRewritePattern<OpTy> {
     Type result_type;
 
     // The result type for reduction and division with the proper element type.
-    if (auto ranked_type = op.getType().template dyn_cast<RankedTensorType>())
+    if (auto ranked_type = mlir::dyn_cast<RankedTensorType>(op.getType()))
       result_type = tensorflow::GetTypeFromTFTensorShape(ranked_type.getShape(),
                                                          sum_element_type);
     else
@@ -2695,8 +2688,7 @@ class ConvertAvgPoolGradOp : public OpRewritePattern<OpTy> {
     // `out_grad` is the gradient that was propagated via backpropagation from
     // the output layer.
     Value out_grad = op.getGrad();
-    auto out_grad_type =
-        out_grad.getType().template dyn_cast<RankedTensorType>();
+    auto out_grad_type = mlir::dyn_cast<RankedTensorType>(out_grad.getType());
     if (!out_grad_type) {
       return failure();
     }
@@ -2833,7 +2825,7 @@ class ConvertMaxPoolOp : public OpRewritePattern<OpTy> {
   LogicalResult matchAndRewrite(OpTy op,
                                 PatternRewriter &rewriter) const override {
     Type element_type =
-        op.getInput().getType().template cast<TensorType>().getElementType();
+        mlir::cast<TensorType>(op.getInput().getType()).getElementType();
     if (!element_type.isSignlessIntOrFloat()) return failure();
     tensorflow::Padding padding;
     if (!GetPaddingFromString(op.getPadding().str(), &padding).ok())
@@ -2845,8 +2837,7 @@ class ConvertMaxPoolOp : public OpRewritePattern<OpTy> {
     ConstantOp init = GetScalarLimitConstOfType(
         element_type, loc, hlo::kInfinityLowest, &rewriter);
 
-    auto input_ty =
-        op.getInput().getType().template dyn_cast<RankedTensorType>();
+    auto input_ty = mlir::dyn_cast<RankedTensorType>(op.getInput().getType());
     if (!input_ty) return failure();
     DenseIntElementsAttr paddings_attr = GetReduceWindowPaddingAsAttr<num_dims>(
         input_ty.getShape(), op.getKsize(), op.getStrides(), op.getPadding(),
@@ -2875,9 +2866,12 @@ class ConvertSelectOp : public OpRewritePattern<TF::SelectOp> {
   LogicalResult matchAndRewrite(TF::SelectOp op,
                                 PatternRewriter &rewriter) const override {
     // This lowering only works on ranked types.
-    auto cond_type = op.getCondition().getType().dyn_cast<RankedTensorType>();
-    auto then_type = op.getThenValue().getType().dyn_cast<RankedTensorType>();
-    auto else_type = op.getElseValue().getType().dyn_cast<RankedTensorType>();
+    auto cond_type =
+        mlir::dyn_cast<RankedTensorType>(op.getCondition().getType());
+    auto then_type =
+        mlir::dyn_cast<RankedTensorType>(op.getThenValue().getType());
+    auto else_type =
+        mlir::dyn_cast<RankedTensorType>(op.getElseValue().getType());
     if (!cond_type || !then_type || !else_type) {
       return failure();
     }
@@ -2913,7 +2907,7 @@ class ConvertSelectOp : public OpRewritePattern<TF::SelectOp> {
       assumption = b.createOrFold<shape::AssumingAllOp>(
           witness, ValueRange{assumption, eq_cstr});
     }
-    auto result_type = op.getResult().getType().cast<TensorType>();
+    auto result_type = mlir::cast<TensorType>(op.getResult().getType());
     auto assuming_op =
         b.create<shape::AssumingOp>(ArrayRef<Type>{result_type}, assumption);
 
@@ -2978,7 +2972,7 @@ class ConvertSigmoidOp : public RewritePattern {
 
     // Create constant half with shape and element type same as the operand.
     Value operand = op.getOperand();
-    auto operand_ty = operand.getType().cast<TensorType>();
+    auto operand_ty = mlir::cast<TensorType>(operand.getType());
     auto scalar_ty =
         tensorflow::GetTypeFromTFTensorShape({}, operand_ty.getElementType());
     ElementsAttr attr = mlir::hlo::getSplat(&rewriter, scalar_ty, 0.5);
@@ -3009,9 +3003,9 @@ class ConvertSliceOpDynamic : public OpRewritePattern<TF::SliceOp> {
     Value begin_indices = op.getBegin();
     Value sizes = op.getSize();
 
-    auto input_ty = input.getType().dyn_cast<RankedTensorType>();
-    auto begin_type = begin_indices.getType().dyn_cast<RankedTensorType>();
-    auto size_type = sizes.getType().dyn_cast<RankedTensorType>();
+    auto input_ty = mlir::dyn_cast<RankedTensorType>(input.getType());
+    auto begin_type = mlir::dyn_cast<RankedTensorType>(begin_indices.getType());
+    auto size_type = mlir::dyn_cast<RankedTensorType>(sizes.getType());
 
     if (!input_ty || !begin_type || !size_type ||
         !begin_type.hasStaticShape() || !size_type.hasStaticShape() ||
@@ -3112,8 +3106,8 @@ static void BroadcastBatchMatMulV2Operands(Value lhs, Value rhs, Location loc,
       loc, TypeRange{shape_type, shape_type}, lhs_shape, const_neg2);
   auto rhs_splitted = rewriter->create<shape::SplitAtOp>(
       loc, TypeRange{shape_type, shape_type}, rhs_shape, const_neg2);
-  auto lhs_type = lhs.getType().cast<RankedTensorType>();
-  auto rhs_type = rhs.getType().cast<RankedTensorType>();
+  auto lhs_type = mlir::cast<RankedTensorType>(lhs.getType());
+  auto rhs_type = mlir::cast<RankedTensorType>(rhs.getType());
   // The last two dimensions are the matrix row/col dimensions. Don't broadcast
   // them.
   SmallVector<int64_t, 6> result_batch_shape_compile_time_extents;
@@ -3166,21 +3160,21 @@ class ConvertBatchMatMulV2Op : public OpRewritePattern<TF::BatchMatMulV2Op> {
                                 PatternRewriter &rewriter) const override {
     Value lhs = op.getX();
     Value rhs = op.getY();
-    auto lhs_type = lhs.getType().dyn_cast<RankedTensorType>();
-    auto rhs_type = rhs.getType().dyn_cast<RankedTensorType>();
+    auto lhs_type = mlir::dyn_cast<RankedTensorType>(lhs.getType());
+    auto rhs_type = mlir::dyn_cast<RankedTensorType>(rhs.getType());
     if (!lhs_type || !rhs_type) return failure();
-    if (lhs_type.getElementType().isa<ComplexType>() && op.getAdjX()) {
+    if (mlir::isa<ComplexType>(lhs_type.getElementType()) && op.getAdjX()) {
       lhs = rewriter.create<TF::ConjOp>(op.getLoc(), lhs_type, lhs);
     }
-    if (rhs_type.getElementType().isa<ComplexType>() && op.getAdjY()) {
+    if (mlir::isa<ComplexType>(rhs_type.getElementType()) && op.getAdjY()) {
       rhs = rewriter.create<TF::ConjOp>(op.getLoc(), rhs_type, rhs);
     }
 
     // Broadcast both operands.
     BroadcastBatchMatMulV2Operands(lhs, rhs, op.getLoc(), &lhs, &rhs,
                                    &rewriter);
-    lhs_type = lhs.getType().cast<RankedTensorType>();
-    rhs_type = rhs.getType().cast<RankedTensorType>();
+    lhs_type = mlir::cast<RankedTensorType>(lhs.getType());
+    rhs_type = mlir::cast<RankedTensorType>(rhs.getType());
     assert(lhs_type.getRank() == rhs_type.getRank());
     int64_t rank = lhs_type.getRank();
     auto batch_dimensions = llvm::to_vector<4>(llvm::seq<int64_t>(0, rank - 2));
@@ -3243,7 +3237,7 @@ class ConvertSplitOp : public OpRewritePattern<TF::SplitOp> {
   LogicalResult matchAndRewrite(TF::SplitOp op,
                                 PatternRewriter &rewriter) const override {
     // We can only split inputs that have fully static shape.
-    auto input_type = op.getValue().getType().dyn_cast<RankedTensorType>();
+    auto input_type = mlir::dyn_cast<RankedTensorType>(op.getValue().getType());
     if (!input_type || !input_type.hasStaticShape()) return failure();
 
     // We can only match when the split dimension is a constant scalar.
@@ -3304,7 +3298,7 @@ class ConvertSplitOpDynamic : public OpRewritePattern<TF::SplitOp> {
                                 PatternRewriter &rewriter) const override {
     Location loc = op.getLoc();
     Value input = op.getValue();
-    auto input_type = input.getType().dyn_cast<RankedTensorType>();
+    auto input_type = mlir::dyn_cast<RankedTensorType>(input.getType());
     if (!input_type) return failure();
 
     // TODO(disc): remove static shape check once folding/canonicalization func
@@ -3419,7 +3413,7 @@ class ConvertSplitVOp : public OpRewritePattern<TF::SplitVOp> {
                                 PatternRewriter &rewriter) const override {
     // We can only split inputs that have fully static shape.
     // TODO(b/145731001): enhance to support dynamic-shaped inputs.
-    auto input_type = op.getValue().getType().dyn_cast<RankedTensorType>();
+    auto input_type = mlir::dyn_cast<RankedTensorType>(op.getValue().getType());
     if (!input_type || !input_type.hasStaticShape()) return failure();
 
     // We can only match when the split dimension is a constant scalar.
@@ -3438,7 +3432,7 @@ class ConvertSplitVOp : public OpRewritePattern<TF::SplitVOp> {
     int64_t total_dim_size = 0;  // Total dimension size assigned to splits
     std::optional<int> dynamic_dim_index;
     split_sizes.reserve(
-        split_sizes_attr.getType().cast<ShapedType>().getNumElements());
+        mlir::cast<ShapedType>(split_sizes_attr.getType()).getNumElements());
     for (const auto &dim : llvm::enumerate(split_sizes_attr)) {
       int64_t dim_val = dim.value().getSExtValue();
       split_sizes.push_back(dim_val);
@@ -3620,7 +3614,7 @@ class ConvertStridedSliceOp : public OpRewritePattern<TF::StridedSliceOp> {
     // Begin must be a ranked, 1-dimensional tensor: This is checked by the
     // verifier.
     int64_t slicing_dim_size =
-        op.getBegin().getType().cast<RankedTensorType>().getDimSize(0);
+        mlir::cast<RankedTensorType>(op.getBegin().getType()).getDimSize(0);
     uint64_t begin_mask = op.getBeginMask();
     uint64_t end_mask = op.getEndMask();
     const int input_rank = input_shape.size();
@@ -3642,7 +3636,7 @@ class ConvertStridedSliceOp : public OpRewritePattern<TF::StridedSliceOp> {
     // For the dimensions that are to be sliced, all have slice sizes of 1.
     SmallVector<int64_t, 4> slice_sizes;
     auto begin_element_ty =
-        op.getBegin().getType().cast<ShapedType>().getElementType();
+        mlir::cast<ShapedType>(op.getBegin().getType()).getElementType();
     // Scalar tensor type.
     TensorType type =
         tensorflow::GetTypeFromTFTensorShape(/*shape=*/{}, begin_element_ty);
@@ -3696,14 +3690,14 @@ class ConvertStridedSliceOp : public OpRewritePattern<TF::StridedSliceOp> {
     //
     // TODO(hinsu): Relax this constraint for ops without negative indices and
     // strides.
-    auto input_ty = op.getInput().getType().dyn_cast<RankedTensorType>();
+    auto input_ty = mlir::dyn_cast<RankedTensorType>(op.getInput().getType());
     if (!input_ty || !input_ty.hasStaticShape()) return failure();
 
     // Output shape needs to be static to apply 'new_axis_mask' or
     // 'shrink_axis_mask' by reshaping tensor after slice.
     //
     // TODO(hinsu): Relax this constraint for ops without the above masks.
-    auto result_ty = op.getType().dyn_cast<RankedTensorType>();
+    auto result_ty = mlir::dyn_cast<RankedTensorType>(op.getType());
     if (!result_ty || !result_ty.hasStaticShape()) return failure();
 
     DenseIntElementsAttr sparse_begin_attr, sparse_end_attr;
@@ -3750,7 +3744,7 @@ class ConvertStridedSliceGradOp
       return failure();
 
     Value grad = op.getDy();
-    Type element_type = grad.getType().cast<ShapedType>().getElementType();
+    Type element_type = mlir::cast<ShapedType>(grad.getType()).getElementType();
 
     // Perform reshape to undo any new/shrink axes done by strided slice.
     grad = rewriter.create<mhlo::ReshapeOp>(
@@ -3830,7 +3824,7 @@ class ConvertRangeOp : public OpRewritePattern<TF::RangeOp> {
                                 PatternRewriter &rewriter) const override {
     auto result = op.getResult();
     auto result_type = result.getType();
-    if (!result_type.cast<ShapedType>().hasStaticShape()) {
+    if (!mlir::cast<ShapedType>(result_type).hasStaticShape()) {
       return failure();
     }
 
@@ -3863,7 +3857,7 @@ class ConvertDynamicRangeOp : public OpRewritePattern<TF::RangeOp> {
   LogicalResult matchAndRewrite(TF::RangeOp op,
                                 PatternRewriter &rewriter) const override {
     auto result = op.getResult();
-    auto result_type = result.getType().cast<ShapedType>();
+    auto result_type = mlir::cast<ShapedType>(result.getType());
     if (result_type.hasStaticShape()) {
       return failure();
     }
@@ -3875,11 +3869,12 @@ class ConvertDynamicRangeOp : public OpRewritePattern<TF::RangeOp> {
     // To compute the length we need to use floating point calculations so that
     // ceil can be computed for the number of steps.
     auto compute_element_type =
-        getElementTypeOrSelf(start.getType()).isa<FloatType>()
+        mlir::isa<FloatType>(getElementTypeOrSelf(start.getType()))
             ? getElementTypeOrSelf(start.getType())
             : rewriter.getF64Type();
     auto compute_type = tensorflow::GetTypeFromTFTensorShape(
-        limit.getType().cast<ShapedType>().getShape(), compute_element_type);
+        mlir::cast<ShapedType>(limit.getType()).getShape(),
+        compute_element_type);
 
     // Compute the length of the sequence we are going to need. This includes
     // some conversion to float for the operations.
@@ -3930,8 +3925,8 @@ class ConvertDynamicRangeOp : public OpRewritePattern<TF::RangeOp> {
 };
 
 ElementsAttr ConvertAxisAttr(Value val, ElementsAttr attr, Builder *builder) {
-  auto int_attr = attr.cast<DenseIntElementsAttr>();
-  auto type = val.getType().cast<ShapedType>();
+  auto int_attr = mlir::cast<DenseIntElementsAttr>(attr);
+  auto type = mlir::cast<ShapedType>(val.getType());
 
   SmallVector<int64_t, 6> axis;
   axis.reserve(int_attr.getNumElements());
@@ -3954,7 +3949,7 @@ class ConvertLinSpaceOp : public OpRewritePattern<TF::LinSpaceOp> {
   LogicalResult matchAndRewrite(TF::LinSpaceOp op,
                                 PatternRewriter &rewriter) const override {
     auto result = op.getResult();
-    auto result_type = result.getType().dyn_cast<ShapedType>();
+    auto result_type = mlir::dyn_cast<ShapedType>(result.getType());
     if (!result_type || !result_type.hasStaticShape()) {
       return failure();
     }
@@ -4023,8 +4018,7 @@ class GenericConvertReductionOp : public OpRewritePattern<OpTy> {
     // TODO(b/141785544): Update this to not require ranked shapes.
     // Input shape needs to be ranked to convert negative indices in TensorFlow
     // to absolute indices required by HLO.
-    auto input_ty =
-        op.getInput().getType().template dyn_cast<RankedTensorType>();
+    auto input_ty = mlir::dyn_cast<RankedTensorType>(op.getInput().getType());
     if (!input_ty) return failure();
     ArrayRef<int64_t> input_shape = input_ty.getShape();
 
@@ -4049,8 +4043,9 @@ class GenericConvertReductionOp : public OpRewritePattern<OpTy> {
     Type element_type = input_ty.getElementType();
 
     // Only float, int, and complex types are currently supported.
-    if (!element_type.isa<FloatType>() && !element_type.isa<IntegerType>() &&
-        !element_type.isa<ComplexType>()) {
+    if (!mlir::isa<FloatType>(element_type) &&
+        !mlir::isa<IntegerType>(element_type) &&
+        !mlir::isa<ComplexType>(element_type)) {
       return rewriter.notifyMatchFailure(
           op, "element type must be float, int, or complex type");
     }
@@ -4252,7 +4247,7 @@ class ConvertArgMinMaxOp : public OpRewritePattern<OpTy> {
   LogicalResult matchAndRewrite(OpTy op,
                                 PatternRewriter &rewriter) const override {
     RankedTensorType input_type =
-        op.getInput().getType().template dyn_cast<RankedTensorType>();
+        mlir::dyn_cast<RankedTensorType>(op.getInput().getType());
     if (!input_type) {
       return failure();
     }
@@ -4267,7 +4262,7 @@ class ConvertArgMinMaxOp : public OpRewritePattern<OpTy> {
         Derived::GetInitialValue(input_element_type, loc, rewriter);
 
     RankedTensorType output_type =
-        op.getOutput().getType().template dyn_cast<RankedTensorType>();
+        mlir::dyn_cast<RankedTensorType>(op.getOutput().getType());
     if (!output_type) {
       return rewriter.notifyMatchFailure(op, "requires known rank");
     }
@@ -4364,12 +4359,11 @@ class ConvertTensorScatterOp : public OpRewritePattern<OpTy> {
 
   LogicalResult matchAndRewrite(OpTy op,
                                 PatternRewriter &rewriter) const override {
-    auto tensor_ty =
-        op.getTensor().getType().template dyn_cast<RankedTensorType>();
+    auto tensor_ty = mlir::dyn_cast<RankedTensorType>(op.getTensor().getType());
     auto indices_ty =
-        op.getIndices().getType().template dyn_cast<RankedTensorType>();
+        mlir::dyn_cast<RankedTensorType>(op.getIndices().getType());
     auto updates_ty =
-        op.getUpdates().getType().template dyn_cast<RankedTensorType>();
+        mlir::dyn_cast<RankedTensorType>(op.getUpdates().getType());
 
     if (!tensor_ty || !indices_ty || !updates_ty) return failure();
     // Last dimension of the indices needs to known at compile time for
@@ -4421,13 +4415,13 @@ class ConvertTensorScatterOp : public OpRewritePattern<OpTy> {
       updates = rewriter.create<TF::BroadcastToOp>(
           op->getLoc(), broadcast_to_type, op.getUpdates(), const_op);
 
-      updates_ty = updates.getType().template dyn_cast<RankedTensorType>();
+      updates_ty = mlir::dyn_cast<RankedTensorType>(updates.getType());
     }
 
     int64_t tensor_rank = tensor_ty.getRank();
     int64_t indices_rank = indices_ty.getRank();
     int64_t updates_rank =
-        updates.getType().template dyn_cast<RankedTensorType>().getRank();
+        mlir::dyn_cast<RankedTensorType>(updates.getType()).getRank();
 
     int64_t window_dims = tensor_rank - num_index_dims;
     auto dims_attr = ScatterDimensionNumbersAttr::get(
@@ -4558,7 +4552,7 @@ class ConvertTileOp : public OpRewritePattern<TF::TileOp> {
 
   LogicalResult matchAndRewrite(TF::TileOp op,
                                 PatternRewriter &rewriter) const override {
-    auto input_ty = op.getInput().getType().dyn_cast<RankedTensorType>();
+    auto input_ty = mlir::dyn_cast<RankedTensorType>(op.getInput().getType());
     if (!input_ty || !input_ty.hasStaticShape()) return failure();
     ArrayRef<int64_t> input_shape = input_ty.getShape();
     Type element_type = input_ty.getElementType();
@@ -4639,7 +4633,7 @@ class ConvertTileOpDynamic : public OpRewritePattern<TF::TileOp> {
     Location loc = op.getLoc();
     Value input = op.getInput();
     Value multiples = op.getMultiples();
-    auto input_ty = input.getType().dyn_cast<RankedTensorType>();
+    auto input_ty = mlir::dyn_cast<RankedTensorType>(input.getType());
     if (!input_ty) return failure();
     // TODO(disc): Remove this constraint once fold and canonicalization
     // implemented.
@@ -4659,7 +4653,7 @@ class ConvertTileOpDynamic : public OpRewritePattern<TF::TileOp> {
       }
     }
 
-    auto multiples_ty = multiples.getType().dyn_cast<RankedTensorType>();
+    auto multiples_ty = mlir::dyn_cast<RankedTensorType>(multiples.getType());
     int64_t multiples_rank = multiples_ty.getRank();
     // rank of multiples input of tf.TileOp must be 1
     if (multiples_rank != 1) return failure();
@@ -4728,16 +4722,14 @@ class ConvertMaxPoolGradOp : public OpRewritePattern<OpTy> {
                                 PatternRewriter &rewriter) const override {
     Location loc = op.getLoc();
 
-    Type element_type = op.getOrigInput()
-                            .getType()
-                            .template cast<TensorType>()
-                            .getElementType();
+    Type element_type =
+        mlir::cast<TensorType>(op.getOrigInput().getType()).getElementType();
 
     // Compute paddings using the original input and kernel shape and strides.
     // Here, ReduceWindow op as used as the MaxPool op is lowered to the
     // ReduceWindow op.
     auto input_ty =
-        op.getOrigInput().getType().template dyn_cast<RankedTensorType>();
+        mlir::dyn_cast<RankedTensorType>(op.getOrigInput().getType());
     if (!input_ty) return failure();
     DenseIntElementsAttr paddings_attr = GetReduceWindowPaddingAsAttr<num_dims>(
         input_ty.getShape(), op.getKsize(), op.getStrides(), op.getPadding(),
@@ -4798,9 +4790,8 @@ class ConvertConvBackpropInputOp : public OpRewritePattern<OpTy> {
       return failure();
 
     auto out_backprop_ty =
-        op.getOutBackprop().getType().template dyn_cast<RankedTensorType>();
-    auto filter_ty =
-        op.getFilter().getType().template dyn_cast<RankedTensorType>();
+        mlir::dyn_cast<RankedTensorType>(op.getOutBackprop().getType());
+    auto filter_ty = mlir::dyn_cast<RankedTensorType>(op.getFilter().getType());
 
     // With the exception of out_backprop's batch dimension, out_backprop and
     // filter need to have static shape. Filter is validated here, out_backprop
@@ -4824,7 +4815,7 @@ class ConvertConvBackpropInputOp : public OpRewritePattern<OpTy> {
     } else {
       auto pack = op.getInputSizes().template getDefiningOp<TF::PackOp>();
       if (!pack || pack.getAxis() != 0) return failure();
-      auto pack_ty = pack.getType().template dyn_cast<RankedTensorType>();
+      auto pack_ty = mlir::dyn_cast<RankedTensorType>(pack.getType());
       if (!pack_ty || pack_ty.getRank() != 1) return failure();
       for (auto i = 0; i < pack_ty.getDimSize(0); ++i) {
         if (i == batch_dim) {
@@ -4862,7 +4853,7 @@ class ConvertConvBackpropInputOp : public OpRewritePattern<OpTy> {
       explicit_paddings.reserve(explicit_paddings_attr.size());
       for (Attribute explicit_padding : explicit_paddings_attr)
         explicit_paddings.push_back(
-            explicit_padding.cast<IntegerAttr>().getInt());
+            mlir::cast<IntegerAttr>(explicit_padding).getInt());
     }
 
     ArrayRef<int64_t> filter_shape = filter_ty.getShape();
@@ -5029,9 +5020,8 @@ class ConvertConvBackpropFilterOp : public OpRewritePattern<OpTy> {
       return failure();
 
     auto out_backprop_ty =
-        op.getOutBackprop().getType().template dyn_cast<RankedTensorType>();
-    auto input_ty =
-        op.getInput().getType().template dyn_cast<RankedTensorType>();
+        mlir::dyn_cast<RankedTensorType>(op.getOutBackprop().getType());
+    auto input_ty = mlir::dyn_cast<RankedTensorType>(op.getInput().getType());
 
     for (RankedTensorType ty : {out_backprop_ty, input_ty})
       if (!ty || !ty.hasStaticShape()) return failure();
@@ -5063,7 +5053,7 @@ class ConvertConvBackpropFilterOp : public OpRewritePattern<OpTy> {
       explicit_paddings.reserve(explicit_paddings_attr.size());
       for (Attribute explicit_padding : explicit_paddings_attr)
         explicit_paddings.push_back(
-            explicit_padding.cast<IntegerAttr>().getInt());
+            mlir::cast<IntegerAttr>(explicit_padding).getInt());
     }
 
     constexpr int num_dims = num_spatial_dims + 2;
@@ -5223,7 +5213,8 @@ class ConvertOneHotOp : public OpRewritePattern<TF::OneHotOp> {
 
   LogicalResult matchAndRewrite(TF::OneHotOp op,
                                 PatternRewriter &rewriter) const override {
-    auto indices_ty = op.getIndices().getType().dyn_cast<RankedTensorType>();
+    auto indices_ty =
+        mlir::dyn_cast<RankedTensorType>(op.getIndices().getType());
     if (!indices_ty || !indices_ty.hasStaticShape()) return failure();
     ArrayRef<int64_t> indices_shape = indices_ty.getShape();
     Type element_type = indices_ty.getElementType();
@@ -5307,7 +5298,7 @@ class ConvertInfeedDequeueTupleOp
     result_types.reserve(op.getOutputs().size() + 1);
     for (const auto &output : op.getOutputs()) {
       Type ty = output.getType();
-      if (auto tensor_ty = ty.dyn_cast<RankedTensorType>()) {
+      if (auto tensor_ty = mlir::dyn_cast<RankedTensorType>(ty)) {
         if (!tensor_ty.hasStaticShape()) return failure();
       }
       result_types.push_back(ty);
@@ -5412,7 +5403,7 @@ class ConvertTopKV2Op : public OpRewritePattern<TF::TopKV2Op> {
     if (!matchPattern(op.getK(), m_Constant(&k_attr))) return failure();
     int64_t k = (*k_attr.begin()).getSExtValue();
 
-    TensorType input_type = op.getInput().getType().cast<TensorType>();
+    TensorType input_type = mlir::cast<TensorType>(op.getInput().getType());
     if (!input_type.hasRank()) return failure();
     int64_t input_rank = input_type.getRank();
     int64_t last_dim_index = input_rank - 1;
@@ -5436,7 +5427,7 @@ class ConvertUnpackOp : public OpRewritePattern<TF::UnpackOp> {
 
   LogicalResult matchAndRewrite(TF::UnpackOp op,
                                 PatternRewriter &rewriter) const override {
-    auto value_type = op.getValue().getType().dyn_cast<RankedTensorType>();
+    auto value_type = mlir::dyn_cast<RankedTensorType>(op.getValue().getType());
     if (!value_type) return failure();
 
     int64_t value_rank = value_type.getRank();
@@ -5482,7 +5473,7 @@ class ConvertUnpackOpDynamic : public OpRewritePattern<TF::UnpackOp> {
 
   LogicalResult matchAndRewrite(TF::UnpackOp op,
                                 PatternRewriter &rewriter) const override {
-    auto value_type = op.getValue().getType().dyn_cast<RankedTensorType>();
+    auto value_type = mlir::dyn_cast<RankedTensorType>(op.getValue().getType());
     if (!value_type) return failure();
     // TODO(disc): Remove this constraint once fold and canonicalization
     // implemented.
@@ -5585,8 +5576,8 @@ class ConvertSigmoidGradOpDynamic : public OpRewritePattern<TF::SigmoidGradOp> {
     Location loc = op.getLoc();
     Value y = op.getY();
     Value dy = op.getDy();
-    auto tp_y = y.getType().dyn_cast<RankedTensorType>();
-    auto tp_dy = dy.getType().dyn_cast<RankedTensorType>();
+    auto tp_y = mlir::dyn_cast<RankedTensorType>(y.getType());
+    auto tp_dy = mlir::dyn_cast<RankedTensorType>(dy.getType());
     if (!tp_y || !tp_dy) return failure();
 
     // TODO(disc): Remove this constraint once fold and canonicalization
@@ -5598,7 +5589,7 @@ class ConvertSigmoidGradOpDynamic : public OpRewritePattern<TF::SigmoidGradOp> {
     if (elem_tp.isSignlessInteger()) {
       attr = rewriter.getIntegerAttr(elem_tp, 1);
     } else {
-      assert(elem_tp.isa<FloatType>());
+      assert(mlir::isa<FloatType>(elem_tp));
       attr = rewriter.getFloatAttr(elem_tp, 1);
     }
     Value one = rewriter.create<mhlo::ConstantOp>(
@@ -5640,13 +5631,12 @@ class GenericConvertUnsortedSegmentReductionOp : public OpRewritePattern<OpTy> {
 
   LogicalResult matchAndRewrite(OpTy op,
                                 PatternRewriter &rewriter) const override {
-    auto data_type =
-        op.getData().getType().template dyn_cast<RankedTensorType>();
+    auto data_type = mlir::dyn_cast<RankedTensorType>(op.getData().getType());
     if (!data_type) return failure();
     int64_t data_rank = data_type.getRank();
 
     auto segment_ids_type =
-        op.getSegmentIds().getType().template dyn_cast<RankedTensorType>();
+        mlir::dyn_cast<RankedTensorType>(op.getSegmentIds().getType());
     if (!segment_ids_type) return failure();
     int64_t segment_ids_rank = segment_ids_type.getRank();
 
@@ -5766,7 +5756,7 @@ class ConvertRandomShuffleOp : public OpRewritePattern<TF::RandomShuffleOp> {
       return success();
     };
 
-    auto input_type = op.getValue().getType().dyn_cast<RankedTensorType>();
+    auto input_type = mlir::dyn_cast<RankedTensorType>(op.getValue().getType());
     if (!input_type) return failure();
     if (input_type.hasStaticShape() && input_type.getNumElements() <= 1)
       // No shuffling is required, so copy input directly to output.
@@ -5966,16 +5956,16 @@ class ConvertInplaceUpdateOp : public OpRewritePattern<TF::InplaceUpdateOp> {
 
   LogicalResult matchAndRewrite(TF::InplaceUpdateOp op,
                                 PatternRewriter &rewriter) const override {
-    auto input = op.getX().dyn_cast<TypedValue<RankedTensorType>>();
+    auto input = mlir::dyn_cast<TypedValue<RankedTensorType>>(op.getX());
     if (!input) return failure();
     auto indices = op.getI();
     auto updates = op.getV();
 
     // Slice each row of `i` and `v` to perform a separate dynamic-update-slice
     // on the contents of `x`.
-    auto input_type = input.getType().cast<ShapedType>();
-    auto updates_type = updates.getType().cast<ShapedType>();
-    auto indices_type = indices.getType().cast<ShapedType>();
+    auto input_type = mlir::cast<ShapedType>(input.getType());
+    auto updates_type = mlir::cast<ShapedType>(updates.getType());
+    auto indices_type = mlir::cast<ShapedType>(indices.getType());
     if (!input_type.hasRank()) return failure();
     if (!updates_type.hasRank() || updates_type.isDynamicDim(0))
       return failure();
@@ -6033,7 +6023,8 @@ class ConvertXlaDynamicUpdateSliceOp
 
   LogicalResult matchAndRewrite(TF::XlaDynamicUpdateSliceOp op,
                                 PatternRewriter &rewriter) const override {
-    auto indices_type = op.getIndices().getType().dyn_cast<RankedTensorType>();
+    auto indices_type =
+        mlir::dyn_cast<RankedTensorType>(op.getIndices().getType());
     if (!indices_type || !indices_type.hasStaticShape() ||
         indices_type.getShape().size() != 1)
       return failure();
@@ -6062,8 +6053,8 @@ class ConvertXlaReduceScatterOp
     if (!matchPattern(op.getGroupAssignment(), m_Constant(&group_assignment)))
       return failure();
     auto replica_groups =
-        hlo::convertElementsAttr(group_assignment, rewriter.getIntegerType(64))
-            .cast<DenseIntElementsAttr>();
+        mlir::cast<DenseIntElementsAttr>(hlo::convertElementsAttr(
+            group_assignment, rewriter.getIntegerType(64)));
     if (replica_groups.getType().getRank() != 2) return failure();
 
     APInt scatter_dimension;
@@ -6141,16 +6132,16 @@ class ConvertXlaReduceWindowOp
     // Create the mhlo.SelectAndScatter op.
     auto reduce_window_op = rewriter.create<mhlo::ReduceWindowOp>(
         loc, result_types, op.getInput(), op.getInitValue(),
-        hlo::convertElementsAttr(window_dimensions, rewriter.getIntegerType(64))
-            .cast<DenseIntElementsAttr>(),
-        hlo::convertElementsAttr(window_strides, rewriter.getIntegerType(64))
-            .cast<DenseIntElementsAttr>(),
-        hlo::convertElementsAttr(base_dilations, rewriter.getIntegerType(64))
-            .cast<DenseIntElementsAttr>(),
-        hlo::convertElementsAttr(window_dilations, rewriter.getIntegerType(64))
-            .cast<DenseIntElementsAttr>(),
-        hlo::convertElementsAttr(padding, rewriter.getIntegerType(64))
-            .cast<DenseIntElementsAttr>());
+        mlir::cast<DenseIntElementsAttr>(hlo::convertElementsAttr(
+            window_dimensions, rewriter.getIntegerType(64))),
+        mlir::cast<DenseIntElementsAttr>(hlo::convertElementsAttr(
+            window_strides, rewriter.getIntegerType(64))),
+        mlir::cast<DenseIntElementsAttr>(hlo::convertElementsAttr(
+            base_dilations, rewriter.getIntegerType(64))),
+        mlir::cast<DenseIntElementsAttr>(hlo::convertElementsAttr(
+            window_dilations, rewriter.getIntegerType(64))),
+        mlir::cast<DenseIntElementsAttr>(
+            hlo::convertElementsAttr(padding, rewriter.getIntegerType(64))));
     // Insert a call to the reducer in the region of the mhlo op.
     mlir::SymbolRefAttr func = op.getComputation();
     auto func_op = cast<mlir::func::FuncOp>(SymbolTable::lookupSymbolIn(
@@ -6177,9 +6168,9 @@ class ConvertClipByValueOp : public OpRewritePattern<TF::ClipByValueOp> {
     Value min = op.getClipValueMin();
     Value max = op.getClipValueMax();
 
-    auto input_ty = input.getType().cast<ShapedType>();
-    auto min_ty = min.getType().cast<ShapedType>();
-    auto max_ty = max.getType().cast<ShapedType>();
+    auto input_ty = mlir::cast<ShapedType>(input.getType());
+    auto min_ty = mlir::cast<ShapedType>(min.getType());
+    auto max_ty = mlir::cast<ShapedType>(max.getType());
 
     if (!input_ty.hasRank() || !min_ty.hasRank() || !max_ty.hasRank()) {
       return failure();
@@ -6215,8 +6206,9 @@ class ConvertConstOp : public OpRewritePattern<TF::ConstOp> {
   LogicalResult matchAndRewrite(TF::ConstOp op,
                                 PatternRewriter &rewriter) const override {
     // Convert only for valid HLO tensors.
-    auto ty = op.getType().dyn_cast<TensorType>();
-    if (!ty || !ty.getElementType().isa<FloatType, IntegerType, ComplexType>())
+    auto ty = mlir::dyn_cast<TensorType>(op.getType());
+    if (!ty ||
+        !mlir::isa<FloatType, IntegerType, ComplexType>(ty.getElementType()))
       return failure();
 
     Location loc = op.getLoc();
@@ -6239,9 +6231,9 @@ class ConvertCumOp : public OpRewritePattern<OpT> {
 
   LogicalResult matchAndRewrite(OpT op,
                                 PatternRewriter &rewriter) const override {
-    auto input = op.getX().template dyn_cast<TypedValue<RankedTensorType>>();
+    auto input = mlir::dyn_cast<TypedValue<RankedTensorType>>(op.getX());
     if (!input) return failure();
-    auto input_type = input.getType().template dyn_cast<ShapedType>();
+    auto input_type = mlir::dyn_cast<ShapedType>(input.getType());
     if (!input_type || !input_type.hasStaticShape()) {
       return failure();
     }
@@ -6352,7 +6344,7 @@ class ConvertShapeOp : public OpRewritePattern<TF::ShapeOp> {
                                 PatternRewriter &rewriter) const override {
     Value input = op.getInput();
 
-    auto result_ty = op.getResult().getType().dyn_cast<RankedTensorType>();
+    auto result_ty = mlir::dyn_cast<RankedTensorType>(op.getResult().getType());
     if (!result_ty) {
       return failure();
     }
@@ -6373,8 +6365,8 @@ class ConvertDynamicExpandDimsOp : public OpRewritePattern<TF::ExpandDimsOp> {
   LogicalResult matchAndRewrite(TF::ExpandDimsOp op,
                                 PatternRewriter &rewriter) const override {
     auto input = op.getInput();
-    auto input_ty = input.getType().cast<ShapedType>();
-    auto result_ty = op.getType().cast<ShapedType>();
+    auto input_ty = mlir::cast<ShapedType>(input.getType());
+    auto result_ty = mlir::cast<ShapedType>(op.getType());
     if (!result_ty.hasRank() || !input_ty.hasRank() ||
         result_ty.hasStaticShape()) {
       return failure();
@@ -6431,8 +6423,8 @@ class ConvertDynamicSqueezeOp : public OpRewritePattern<TF::SqueezeOp> {
   LogicalResult matchAndRewrite(TF::SqueezeOp op,
                                 PatternRewriter &rewriter) const override {
     auto input = op.getInput();
-    auto input_ty = input.getType().cast<ShapedType>();
-    auto result_ty = op.getType().cast<ShapedType>();
+    auto input_ty = mlir::cast<ShapedType>(input.getType());
+    auto result_ty = mlir::cast<ShapedType>(op.getType());
     if (!result_ty.hasRank() || !input_ty.hasRank() ||
         result_ty.hasStaticShape()) {
       return failure();
@@ -6492,24 +6484,23 @@ class ConvertXlaConvV2Op : public OpRewritePattern<TF::XlaConvV2Op> {
       return failure();
 
     auto window_strides_named_attr = rewriter.getNamedAttr(
-        "window_strides", hlo::convertElementsAttr(window_strides_attr,
-                                                   rewriter.getIntegerType(64))
-                              .cast<DenseIntElementsAttr>());
+        "window_strides",
+        mlir::cast<DenseIntElementsAttr>(hlo::convertElementsAttr(
+            window_strides_attr, rewriter.getIntegerType(64))));
 
     auto padding_named_attr = rewriter.getNamedAttr(
-        "padding",
-        hlo::convertElementsAttr(padding_attr, rewriter.getIntegerType(64))
-            .cast<DenseIntElementsAttr>());
+        "padding", mlir::cast<DenseIntElementsAttr>(hlo::convertElementsAttr(
+                       padding_attr, rewriter.getIntegerType(64))));
 
     auto lhs_dilation_named_attr = rewriter.getNamedAttr(
         "lhs_dilation",
-        hlo::convertElementsAttr(lhs_dilation_attr, rewriter.getIntegerType(64))
-            .cast<DenseIntElementsAttr>());
+        mlir::cast<DenseIntElementsAttr>(hlo::convertElementsAttr(
+            lhs_dilation_attr, rewriter.getIntegerType(64))));
 
     auto rhs_dilation_named_attr = rewriter.getNamedAttr(
         "rhs_dilation",
-        hlo::convertElementsAttr(rhs_dilation_attr, rewriter.getIntegerType(64))
-            .cast<DenseIntElementsAttr>());
+        mlir::cast<DenseIntElementsAttr>(hlo::convertElementsAttr(
+            rhs_dilation_attr, rewriter.getIntegerType(64))));
 
     int64_t feature_group_count_val =
         feature_group_count_attr.getValues<IntegerAttr>()[0].getInt();
@@ -6566,12 +6557,12 @@ class ConvertXlaSelectAndScatterOp
     // Create the mhlo.SelectAndScatter op.
     auto select_and_scatter_op = rewriter.create<mhlo::SelectAndScatterOp>(
         loc, result_types, op.getOperand(), op.getSource(), op.getInitValue(),
-        hlo::convertElementsAttr(window_dimensions, rewriter.getIntegerType(64))
-            .cast<DenseIntElementsAttr>(),
-        hlo::convertElementsAttr(window_strides, rewriter.getIntegerType(64))
-            .cast<DenseIntElementsAttr>(),
-        hlo::convertElementsAttr(padding, rewriter.getIntegerType(64))
-            .cast<DenseIntElementsAttr>());
+        mlir::cast<DenseIntElementsAttr>(hlo::convertElementsAttr(
+            window_dimensions, rewriter.getIntegerType(64))),
+        mlir::cast<DenseIntElementsAttr>(hlo::convertElementsAttr(
+            window_strides, rewriter.getIntegerType(64))),
+        mlir::cast<DenseIntElementsAttr>(
+            hlo::convertElementsAttr(padding, rewriter.getIntegerType(64))));
 
     auto insert_call_to = [&](const mlir::SymbolRefAttr &func, Region *region) {
       auto func_op = cast<mlir::func::FuncOp>(SymbolTable::lookupSymbolIn(
@@ -6671,7 +6662,7 @@ class ConvertXlaVariadicReduceV2Op
     auto func_ty = func_op.getFunctionType();
     SmallVector<Type> elementTypes{llvm::map_range(
         func_ty.getResults(),
-        [](Type ty) { return ty.cast<ShapedType>().getElementType(); })};
+        [](Type ty) { return mlir::cast<ShapedType>(ty).getElementType(); })};
 
     // Create the mhlo.reduce op.
     auto reduce_op = rewriter.create<mhlo::ReduceOp>(
@@ -6754,7 +6745,7 @@ class LowerYieldOp : public OpConversionPattern<TF::YieldOp> {
 // Returns a new tensor type from the given type with element type updated to
 // the given type.
 TensorType UpdateElementTypeTo(Type ty, Type element_ty) {
-  auto ranked_ty = ty.dyn_cast<RankedTensorType>();
+  auto ranked_ty = mlir::dyn_cast<RankedTensorType>(ty);
   if (!ranked_ty) {
     return UnrankedTensorType::get(element_ty);
   }
diff --git a/tensorflow/compiler/mlir/tf2xla/transforms/legalize_tf_collective.cc b/tensorflow/compiler/mlir/tf2xla/transforms/legalize_tf_collective.cc
index 54bd5812644488..34df8fc9759a5c 100644
--- a/tensorflow/compiler/mlir/tf2xla/transforms/legalize_tf_collective.cc
+++ b/tensorflow/compiler/mlir/tf2xla/transforms/legalize_tf_collective.cc
@@ -113,9 +113,8 @@ LogicalResult ConvertReplicaGroups(OpBuilder& builder,
   if (!matchPattern(group_assignment_value, m_Constant(&group_assignment))) {
     return op->emitOpError() << "expects constant group_assignment";
   }
-  replica_groups =
-      hlo::convertElementsAttr(group_assignment, builder.getIntegerType(64))
-          .cast<DenseIntElementsAttr>();
+  replica_groups = mlir::cast<DenseIntElementsAttr>(
+      hlo::convertElementsAttr(group_assignment, builder.getIntegerType(64)));
   if (replica_groups.getType().getRank() != 2) {
     return op->emitOpError() << "group_assignment should have rank 2, got "
                              << replica_groups.getType().getRank();
diff --git a/tensorflow/compiler/mlir/tf2xla/transforms/legalize_tf_communication.cc b/tensorflow/compiler/mlir/tf2xla/transforms/legalize_tf_communication.cc
index 3e8dd5b58ed2f1..68c412f79ff393 100644
--- a/tensorflow/compiler/mlir/tf2xla/transforms/legalize_tf_communication.cc
+++ b/tensorflow/compiler/mlir/tf2xla/transforms/legalize_tf_communication.cc
@@ -458,7 +458,7 @@ SmallVector<Value> GetValueWithToken(
     return new_result;
   };
 
-  auto tuple_type = value.getType().dyn_cast<TupleType>();
+  auto tuple_type = mlir::dyn_cast<TupleType>(value.getType());
   // `value` is not a tuple, create a new tuple.
   if (!tuple_type) return {create_tuple({value, token})};
 
@@ -499,7 +499,7 @@ SmallVector<Type> GetTypeWithToken(OpBuilder& builder, ArrayRef<Type> types,
   }
 
   auto type = types[0];
-  if (auto tuple_type = type.dyn_cast<TupleType>()) {
+  if (auto tuple_type = mlir::dyn_cast<TupleType>(type)) {
     auto result_types = llvm::to_vector(tuple_type.getTypes());
     result_types.push_back(token_type);
     return {builder.getTupleType(result_types)};
@@ -536,7 +536,7 @@ void ReplaceWithTupleResult(OpBuilder& builder, ValueRange values,
 
   auto value = values[0];
   auto replacement = replacements[0];
-  auto tuple_type = value.getType().dyn_cast<TupleType>();
+  auto tuple_type = mlir::dyn_cast<TupleType>(value.getType());
   if (!tuple_type) {
     if (!value.use_empty()) {
       auto new_element = builder.create<GetTupleElementOp>(replacement.getLoc(),
diff --git a/tensorflow/compiler/mlir/tf2xla/transforms/legalize_tf_with_tf2xla.cc b/tensorflow/compiler/mlir/tf2xla/transforms/legalize_tf_with_tf2xla.cc
index d5560f2481b00f..ce8b46708d2f52 100644
--- a/tensorflow/compiler/mlir/tf2xla/transforms/legalize_tf_with_tf2xla.cc
+++ b/tensorflow/compiler/mlir/tf2xla/transforms/legalize_tf_with_tf2xla.cc
@@ -35,6 +35,7 @@ limitations under the License.
 #include "mlir/IR/Operation.h"  // from @llvm-project
 #include "mlir/IR/Types.h"  // from @llvm-project
 #include "mlir/IR/Value.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/op_or_arg_name_mapper.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
@@ -75,13 +76,13 @@ namespace {
 // Returns true if the given type is a ranked tensor type with static or bounded
 // dimensions.
 bool IsBounded(Type ty) {
-  auto ranked_ty = ty.dyn_cast<RankedTensorType>();
+  auto ranked_ty = mlir::dyn_cast<RankedTensorType>(ty);
   if (!ranked_ty) return false;
 
   if (ranked_ty.hasStaticShape()) return true;
 
   auto encoding =
-      ranked_ty.getEncoding().dyn_cast_or_null<TypeExtensionsAttr>();
+      mlir::dyn_cast_or_null<TypeExtensionsAttr>(ranked_ty.getEncoding());
   if (!encoding) return false;
 
   for (int i = 0; i < ranked_ty.getRank(); ++i) {
@@ -96,10 +97,11 @@ bool IsBounded(Type ty) {
 bool HasSymbolRefAttr(Operation* op) {
   for (const auto& attr : op->getAttrs()) {
     Attribute attr_value = attr.getValue();
-    if (attr_value.isa<SymbolRefAttr>()) {
+    if (mlir::isa<SymbolRefAttr>(attr_value)) {
       return true;
-    } else if (auto array_attr = attr_value.dyn_cast<ArrayAttr>()) {
-      if (!array_attr.empty() && array_attr.begin()->isa<SymbolRefAttr>()) {
+    } else if (auto array_attr = mlir::dyn_cast<ArrayAttr>(attr_value)) {
+      if (!array_attr.empty() &&
+          mlir::isa<SymbolRefAttr>(*array_attr.begin())) {
         return true;
       }
     }
@@ -146,8 +148,8 @@ class Tf2XlaRewritePattern : public ConversionPattern {
 };
 
 bool ShouldRefineTypeTo(Type original_ty, Type updated_ty) {
-  auto updated = updated_ty.dyn_cast<ShapedType>();
-  auto original = original_ty.dyn_cast<ShapedType>();
+  auto updated = mlir::dyn_cast<ShapedType>(updated_ty);
+  auto original = mlir::dyn_cast<ShapedType>(original_ty);
 
   // Both types must be shaped types.
   if (!original || !updated) return false;
diff --git a/tensorflow/compiler/mlir/tf2xla/transforms/tf2xla_rewriter.cc b/tensorflow/compiler/mlir/tf2xla/transforms/tf2xla_rewriter.cc
index b17d474f85a652..927e59e0195bb2 100644
--- a/tensorflow/compiler/mlir/tf2xla/transforms/tf2xla_rewriter.cc
+++ b/tensorflow/compiler/mlir/tf2xla/transforms/tf2xla_rewriter.cc
@@ -232,13 +232,13 @@ LogicalResult Tf2XlaRewriter::PrepareParams() {
 // Returns true if the given type is a ranked tensor type with static or
 // bounded dimensions.
 bool IsBounded(Type ty) {
-  auto ranked_ty = ty.dyn_cast<RankedTensorType>();
+  auto ranked_ty = mlir::dyn_cast<RankedTensorType>(ty);
   if (!ranked_ty) return false;
 
   if (ranked_ty.hasStaticShape()) return true;
 
   auto encoding =
-      ranked_ty.getEncoding().dyn_cast_or_null<TypeExtensionsAttr>();
+      mlir::dyn_cast_or_null<TypeExtensionsAttr>(ranked_ty.getEncoding());
   if (!encoding) return false;
 
   for (int i = 0; i < ranked_ty.getRank(); ++i) {
@@ -253,10 +253,11 @@ bool IsBounded(Type ty) {
 bool HasSymbolRefAttr(Operation* op) {
   for (const auto& attr : op->getAttrs()) {
     Attribute attr_value = attr.getValue();
-    if (attr_value.isa<SymbolRefAttr>()) {
+    if (mlir::isa<SymbolRefAttr>(attr_value)) {
       return true;
-    } else if (auto array_attr = attr_value.dyn_cast<ArrayAttr>()) {
-      if (!array_attr.empty() && array_attr.begin()->isa<SymbolRefAttr>()) {
+    } else if (auto array_attr = mlir::dyn_cast<ArrayAttr>(attr_value)) {
+      if (!array_attr.empty() &&
+          mlir::isa<SymbolRefAttr>(*array_attr.begin())) {
         return true;
       }
     }
@@ -305,7 +306,7 @@ LogicalResult Tf2XlaRewriter::PrepareKernelInputs(
 
 LogicalResult Tf2XlaRewriter::LegalizeOp() {
   for (Type ty : op_->getOperandTypes()) {
-    auto ranked_ty = ty.dyn_cast<ShapedType>();
+    auto ranked_ty = mlir::dyn_cast<ShapedType>(ty);
     // Only bounded operands are supported in the XLA builders.
     if (!IsBounded(ranked_ty)) {
       return op_->emitRemark()
diff --git a/tensorflow/compiler/mlir/tf2xla/transforms/verify_tfxla_legalization.cc b/tensorflow/compiler/mlir/tf2xla/transforms/verify_tfxla_legalization.cc
index 7938fc4684ce2b..a6435081820880 100644
--- a/tensorflow/compiler/mlir/tf2xla/transforms/verify_tfxla_legalization.cc
+++ b/tensorflow/compiler/mlir/tf2xla/transforms/verify_tfxla_legalization.cc
@@ -27,6 +27,7 @@ limitations under the License.
 #include "mlir/IR/Diagnostics.h"  // from @llvm-project
 #include "mlir/IR/Operation.h"  // from @llvm-project
 #include "mlir/IR/Visitors.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Transforms/DialectConversion.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_dialect.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
@@ -89,18 +90,18 @@ static void IncrementCounterFor(tensorflow::monitoring::Counter<1>* counter,
 }
 
 bool HasBounds(RankedTensorType type) {
-  auto encoding =
-      type.getEncoding().dyn_cast_or_null<mlir::mhlo::TypeExtensionsAttr>();
+  auto encoding = mlir::dyn_cast_or_null<mlir::mhlo::TypeExtensionsAttr>(
+      type.getEncoding());
   return (encoding && !encoding.getBounds().empty());
 }
 
 bool HasStaticShapeOrBounded(Value val) {
   auto type = val.getType();
-  if (type.isa<UnrankedTensorType>()) {
+  if (mlir::isa<UnrankedTensorType>(type)) {
     return false;
   }
-  if (type.isa<RankedTensorType>()) {
-    auto ranked_tensor = type.dyn_cast<RankedTensorType>();
+  if (mlir::isa<RankedTensorType>(type)) {
+    auto ranked_tensor = mlir::dyn_cast<RankedTensorType>(type);
     if (ranked_tensor.hasStaticShape()) {
       return true;
     }
diff --git a/tensorflow/compiler/mlir/tfr/passes/decompose.cc b/tensorflow/compiler/mlir/tfr/passes/decompose.cc
index 5d59d958d3e7c9..988dc9e612b9c3 100644
--- a/tensorflow/compiler/mlir/tfr/passes/decompose.cc
+++ b/tensorflow/compiler/mlir/tfr/passes/decompose.cc
@@ -84,8 +84,8 @@ namespace {
 // Quantize the float value based on given scale and zero point attributes.
 IntegerAttr Quantize(float value, Attribute scale_attr, Attribute zp_attr,
                      OpBuilder builder) {
-  double scale = scale_attr.cast<FloatAttr>().getValueAsDouble();
-  int64_t zp = zp_attr.cast<IntegerAttr>().getInt();
+  double scale = mlir::cast<FloatAttr>(scale_attr).getValueAsDouble();
+  int64_t zp = mlir::cast<IntegerAttr>(zp_attr).getInt();
 
   int quantized = static_cast<int>(std::round(value / scale) + zp);
   quantized =
@@ -187,11 +187,12 @@ LogicalResult DecomposeTFOpsPass::RewriteUnregisteredTFOps() {
     // default value in the argument attribute.
     llvm::SmallVector<Value, 4> new_operands;
     for (auto arg : llvm::enumerate(compose_func_type.getInputs())) {
-      if (auto tensor_type = arg.value().dyn_cast<TFRTensorType>()) {
+      if (auto tensor_type = mlir::dyn_cast<TFRTensorType>(arg.value())) {
         auto casted = builder.create<CastOp>(op->getLoc(), tensor_type,
                                              op->getOperand(arg.index()));
         new_operands.push_back(casted);
-      } else if (auto list_type = arg.value().dyn_cast<TFRTensorListType>()) {
+      } else if (auto list_type =
+                     mlir::dyn_cast<TFRTensorListType>(arg.value())) {
         llvm::SmallVector<Value, 4> variadic_operands;
         for (int i = arg.index(); i < op->getNumOperands(); i++) {
           auto casted = builder.create<CastOp>(
@@ -211,8 +212,8 @@ LogicalResult DecomposeTFOpsPass::RewriteUnregisteredTFOps() {
         }
         if (!attribute && attr_name.getValue() == "out_type") {
           auto type = op->getResult(0).getType();
-          if (type.isa<TensorType>()) {
-            type = type.cast<TensorType>().getElementType();
+          if (mlir::isa<TensorType>(type)) {
+            type = mlir::cast<TensorType>(type).getElementType();
           }
           attribute = TypeAttr::get(type);
         }
@@ -220,8 +221,9 @@ LogicalResult DecomposeTFOpsPass::RewriteUnregisteredTFOps() {
         // Wrap these special attributes as a special TFR constant, so the SSA
         // value has a valid type to be used as TFR function argument. These
         // attributes are not expected to be manipulated by the lowering passes.
-        if (attribute.isa<TypeAttr>() || attribute.isa<ArrayAttr>() ||
-            attribute.isa<StringAttr>() || attribute.isa<FlatSymbolRefAttr>()) {
+        if (mlir::isa<TypeAttr>(attribute) || mlir::isa<ArrayAttr>(attribute) ||
+            mlir::isa<StringAttr>(attribute) ||
+            mlir::isa<FlatSymbolRefAttr>(attribute)) {
           TFRAttrType output_type = TFRAttrType::get(builder.getContext());
           attr_cst =
               builder.create<ConstOp>(op->getLoc(), output_type, attribute);
@@ -245,9 +247,10 @@ LogicalResult DecomposeTFOpsPass::RewriteUnregisteredTFOps() {
     // op result.
     llvm::SmallVector<Value, 4> new_results;
     for (auto res : llvm::enumerate(compose_func_type.getResults())) {
-      if (res.value().dyn_cast<TFRTensorType>()) {
+      if (mlir::dyn_cast<TFRTensorType>(res.value())) {
         new_results.push_back(new_op.getResult(res.index()));
-      } else if (auto list_type = res.value().dyn_cast<TFRTensorListType>()) {
+      } else if (auto list_type =
+                     mlir::dyn_cast<TFRTensorListType>(res.value())) {
         for (int i = res.index(), j = 0; i < op->getNumResults(); i++, j++) {
           auto index = builder.create<mlir::arith::ConstantOp>(
               op->getLoc(), builder.getIndexAttr(j));
diff --git a/tensorflow/compiler/mlir/tfr/passes/raise_to_tf.cc b/tensorflow/compiler/mlir/tfr/passes/raise_to_tf.cc
index dd85565cfed88e..61aa404847ee07 100644
--- a/tensorflow/compiler/mlir/tfr/passes/raise_to_tf.cc
+++ b/tensorflow/compiler/mlir/tfr/passes/raise_to_tf.cc
@@ -136,7 +136,7 @@ class RewriteTFRCallOp : public OpRewritePattern<CallOp> {
   // by the frontend correctly.
   Value CastToNonDerivedType(PatternRewriter& rewriter, Location loc,
                              CastOp cast_op, Type input_tfr_type) const {
-    auto tensor_type = input_tfr_type.dyn_cast<TFRTensorType>();
+    auto tensor_type = mlir::dyn_cast<TFRTensorType>(input_tfr_type);
     if (!tensor_type) return cast_op.getArg();
 
     auto attr_names = tensor_type.getAttrKeys();
@@ -150,7 +150,7 @@ class RewriteTFRCallOp : public OpRewritePattern<CallOp> {
     }
 
     Type original_input_type =
-        cast_op.getInputElementType().cast<TypeAttr>().getValue();
+        mlir::cast<TypeAttr>(cast_op.getInputElementType()).getValue();
     if (result_elt_type != original_input_type) {
       UnrankedTensorType result_type = UnrankedTensorType::get(result_elt_type);
       return rewriter.create<TF::CastOp>(loc, result_type, cast_op.getArg());
@@ -166,10 +166,10 @@ class RewriteTFRCallOp : public OpRewritePattern<CallOp> {
                             llvm::SmallVectorImpl<Value>& input_values) const {
     if (input_types.size() <= 1) return;
 
-    Type target_input_type = input_types[0].cast<TypeAttr>().getValue();
+    Type target_input_type = mlir::cast<TypeAttr>(input_types[0]).getValue();
     auto result_type = UnrankedTensorType::get(target_input_type);
     for (auto i = 1; i < input_types.size(); ++i) {
-      Type current_input_type = input_types[i].cast<TypeAttr>().getValue();
+      Type current_input_type = mlir::cast<TypeAttr>(input_types[i]).getValue();
       if (current_input_type != target_input_type) {
         input_values[i] =
             rewriter.create<TF::CastOp>(loc, result_type, input_values[i]);
@@ -189,7 +189,7 @@ LogicalResult RewriteTFRCallOp::AddDerivedAttrs(
     llvm::StringMap<Attribute>* derived_attrs) const {
   // If there is an attribute associated to the input in the signature, we
   // store it as an derived attribute.
-  if (auto tensor_type = input_tfr_type.dyn_cast<TFRTensorType>()) {
+  if (auto tensor_type = mlir::dyn_cast<TFRTensorType>(input_tfr_type)) {
     auto attr_names = tensor_type.getAttrKeys();
     if (attr_names.empty()) return success();
 
@@ -201,7 +201,7 @@ LogicalResult RewriteTFRCallOp::AddDerivedAttrs(
 
   // If there is an attribute associated to the input in the signature,
   // we store it as an derived attribute.
-  if (auto list_type = input_tfr_type.dyn_cast<TFRTensorListType>()) {
+  if (auto list_type = mlir::dyn_cast<TFRTensorListType>(input_tfr_type)) {
     auto attr_names = list_type.getAttrKeys();
     if (attr_names.empty()) return success();
 
@@ -314,7 +314,7 @@ Attribute RewriteTFRCallOp::ProcessAttributeValue(Attribute attr,
   if (!attr_type) return attr;
 
   if (attr_type.getValue() == "tensor") {
-    if (auto f = attr.dyn_cast<FloatAttr>()) {
+    if (auto f = mlir::dyn_cast<FloatAttr>(attr)) {
       RankedTensorType type = RankedTensorType::get({}, f.getType());
       return DenseFPElementsAttr::get(type, attr);
     }
@@ -332,13 +332,13 @@ LogicalResult RewriteTFRCallOp::DeriveOutputTypes(
     const llvm::StringMap<Attribute>& attrs,
     SmallVectorImpl<Type>* output_types) const {
   for (auto res : llvm::enumerate(signature.getResults())) {
-    if (auto tensor_type = res.value().dyn_cast<TFRTensorType>()) {
+    if (auto tensor_type = mlir::dyn_cast<TFRTensorType>(res.value())) {
       // tfr.tensor should only have one attribute attached.
       auto attr_key = tensor_type.getAttrKeys().front();
       Builder builder(signature.getContext());
       if (auto attr = attrs.lookup(attr_key.getValue())) {
         output_types->push_back(
-            UnrankedTensorType::get(attr.cast<TypeAttr>().getValue()));
+            UnrankedTensorType::get(mlir::cast<TypeAttr>(attr).getValue()));
       } else if (Type element_type =
                      GetFixedElementType(attr_key.getValue(), builder)) {
         output_types->push_back(UnrankedTensorType::get(element_type));
@@ -350,16 +350,18 @@ LogicalResult RewriteTFRCallOp::DeriveOutputTypes(
       continue;
     }
 
-    if (auto list_type = res.value().dyn_cast<TFRTensorListType>()) {
+    if (auto list_type = mlir::dyn_cast<TFRTensorListType>(res.value())) {
       // There are two cases: N*T or list(dtype)
       auto attr_keys = list_type.getAttrKeys();
       // N*T case
       if (attr_keys.size() == 2) {
         // The first one is N, and the second one is T
         int list_size =
-            attrs.lookup(attr_keys[0].getValue()).cast<IntegerAttr>().getInt();
+            mlir::cast<IntegerAttr>(attrs.lookup(attr_keys[0].getValue()))
+                .getInt();
         Type list_type =
-            attrs.lookup(attr_keys[1].getValue()).cast<TypeAttr>().getValue();
+            mlir::cast<TypeAttr>(attrs.lookup(attr_keys[1].getValue()))
+                .getValue();
         for (int i = 0; i < list_size; ++i) {
           output_types->push_back(UnrankedTensorType::get(list_type));
         }
@@ -398,11 +400,12 @@ LogicalResult RewriteTFRCallOp::CreateAndReplaceOp(
   SmallVector<Value, 4> new_results;
   for (auto res : llvm::enumerate(call_op.getResultTypes())) {
     Type res_type = res.value();
-    if (res_type.dyn_cast<TFRTensorType>()) {
+    if (mlir::dyn_cast<TFRTensorType>(res_type)) {
       Value new_res = new_op->getResult(res.index());
       auto casted = rewriter.create<CastOp>(loc, res_type, new_res);
       new_results.push_back(casted.getOut());
-    } else if (auto list_type = res.value().dyn_cast<TFRTensorListType>()) {
+    } else if (auto list_type =
+                   mlir::dyn_cast<TFRTensorListType>(res.value())) {
       SmallVector<Value, 4> tensor_list;
       for (int i = res.index(); i < new_op->getNumResults(); i++) {
         Value new_res = new_op->getResult(i);
diff --git a/tensorflow/compiler/mlir/tfrt/BUILD b/tensorflow/compiler/mlir/tfrt/BUILD
index 2343fd84c07d32..3642cf67ce74a0 100644
--- a/tensorflow/compiler/mlir/tfrt/BUILD
+++ b/tensorflow/compiler/mlir/tfrt/BUILD
@@ -145,6 +145,7 @@ cc_library(
         "@llvm-project//mlir:FuncDialect",
         "@llvm-project//mlir:IR",
         "@llvm-project//mlir:Pass",
+        "@llvm-project//mlir:Support",
         "@llvm-project//mlir:TransformUtils",
         "@llvm-project//mlir:Transforms",
         "@tf_runtime//:basic_kernels_opdefs",
@@ -166,6 +167,7 @@ cc_library(
         "//tensorflow/compiler/mlir/tfrt/ir:tfrt_fallback_async_opdefs",
         "//tensorflow/compiler/mlir/tfrt/ir:tfrt_fallback_opdefs",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
         "@llvm-project//mlir:TransformUtils",
         "@llvm-project//mlir:Transforms",
         "@tf_runtime//:basic_kernels_opdefs",
@@ -331,6 +333,7 @@ cc_library(
         "@llvm-project//mlir:FuncDialect",
         "@llvm-project//mlir:IR",
         "@llvm-project//mlir:Pass",
+        "@llvm-project//mlir:Support",
         "@local_tsl//tsl/platform:errors",
         "@tf_runtime//:bef",
         "@tf_runtime//:core_runtime",
@@ -426,6 +429,7 @@ cc_library(
         "@com_google_absl//absl/strings",
         "@llvm-project//mlir:FuncDialect",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
         "@tf_runtime//:compiler_tfrt_op_interfaces",
     ],
 )
@@ -621,6 +625,7 @@ cc_library(
         "//tensorflow/compiler/mlir/tensorflow:tensorflow_types",
         "@llvm-project//llvm:Support",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
         "@tf_runtime//:core_runtime_opdefs",
     ],
 )
@@ -641,6 +646,7 @@ cc_library(
         "@com_google_absl//absl/strings",
         "@llvm-project//mlir:FuncDialect",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
         "@tf_runtime//:basic_kernels_opdefs",
         "@tf_runtime//:core_runtime_opdefs",
     ],
diff --git a/tensorflow/compiler/mlir/tfrt/analysis/cost_analysis.cc b/tensorflow/compiler/mlir/tfrt/analysis/cost_analysis.cc
index 5573e7c2d46866..28f582723c8b2f 100644
--- a/tensorflow/compiler/mlir/tfrt/analysis/cost_analysis.cc
+++ b/tensorflow/compiler/mlir/tfrt/analysis/cost_analysis.cc
@@ -19,6 +19,7 @@ limitations under the License.
 #include <utility>
 
 #include "absl/container/flat_hash_map.h"
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/compiler/mlir/tfrt/constants.h"
 #include "tensorflow/core/tfrt/fallback/cost_recorder.h"
@@ -59,14 +60,14 @@ int64_t InferLookupTableFindV2Cost(const CostContext& context,
   constexpr int64_t kLookupTableFindCostScale = 8;
   constexpr int64_t kLookupTableFindStringKeyCostScale = 16;
 
-  auto value_type = op.getValues().getType().cast<mlir::TensorType>();
-  auto key_type = op.getKeys().getType().cast<mlir::TensorType>();
+  auto value_type = mlir::cast<mlir::TensorType>(op.getValues().getType());
+  auto key_type = mlir::cast<mlir::TensorType>(op.getKeys().getType());
 
   int64_t output_size = InferTensorSize(context, value_type);
 
   int64_t cost = kLookupTableFindCostScale * output_size;
 
-  if (key_type.getElementType().isa<mlir::TF::StringType>())
+  if (mlir::isa<mlir::TF::StringType>(key_type.getElementType()))
     cost *= kLookupTableFindStringKeyCostScale;
 
   return cost;
@@ -74,15 +75,15 @@ int64_t InferLookupTableFindV2Cost(const CostContext& context,
 
 // The cost function for tf.GatherV2.
 int64_t InferGatherV2Cost(const CostContext& context, mlir::TF::GatherV2Op op) {
-  return InferTensorSize(context,
-                         op.getOutput().getType().cast<mlir::TensorType>());
+  return InferTensorSize(
+      context, mlir::cast<mlir::TensorType>(op.getOutput().getType()));
 }
 
 // The cost function for tf.SparseSegmentSumOp.
 template <typename OpType>
 int64_t InferSparseSegmentOpCost(const CostContext& context, OpType op) {
   return InferTensorSize(
-      context, op.getOutput().getType().template cast<mlir::TensorType>());
+      context, mlir::cast<mlir::TensorType>(op.getOutput().getType()));
 }
 
 // CostFunctionRegistry is a map from op names to their cost functions.
@@ -145,8 +146,8 @@ void CostAnalysis::AnalyzeArguments(mlir::func::FuncOp func_op) {
   // Use the max size among function inputs as the default size of dynamic
   // shaped tensors in the function.
   for (auto arg : func_op.getArguments()) {
-    if (!arg.getType().isa<mlir::TensorType>()) continue;
-    auto type = arg.getType().cast<mlir::TensorType>();
+    if (!mlir::isa<mlir::TensorType>(arg.getType())) continue;
+    auto type = mlir::cast<mlir::TensorType>(arg.getType());
     if (type.hasRank()) {
       max_arg_size_ = std::max(max_arg_size_, GetRankedTensorSize(type));
     }
@@ -204,7 +205,7 @@ void CostAnalysis::EvaluateCost(mlir::Operation* op) {
   // For other ops, use the sum of input sizes as its cost.
   int64_t cost = kDefaultCheapCost;
   for (auto operand : op->getOperands()) {
-    auto type = operand.getType().cast<mlir::TensorType>();
+    auto type = mlir::cast<mlir::TensorType>(operand.getType());
     if (type.hasRank()) {
       cost += GetRankedTensorSize(type);
     } else {
diff --git a/tensorflow/compiler/mlir/tfrt/ir/BUILD b/tensorflow/compiler/mlir/tfrt/ir/BUILD
index 68e9624e118453..cbdcc602ec3397 100644
--- a/tensorflow/compiler/mlir/tfrt/ir/BUILD
+++ b/tensorflow/compiler/mlir/tfrt/ir/BUILD
@@ -29,6 +29,7 @@ cc_library(
         ":tfrt_fallback_opdefs_inc_gen",
         "@llvm-project//mlir:IR",
         "@llvm-project//mlir:SideEffectInterfaces",
+        "@llvm-project//mlir:Support",
     ],
 )
 
@@ -98,6 +99,7 @@ cc_library(
     deps = [
         "@llvm-project//llvm:Support",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
         "@tf_runtime//:basic_kernels_opdefs",
     ],
 )
diff --git a/tensorflow/compiler/mlir/tfrt/ir/mlrt/BUILD b/tensorflow/compiler/mlir/tfrt/ir/mlrt/BUILD
index bfc93b9252ccbf..5bc69ce7a70758 100644
--- a/tensorflow/compiler/mlir/tfrt/ir/mlrt/BUILD
+++ b/tensorflow/compiler/mlir/tfrt/ir/mlrt/BUILD
@@ -59,6 +59,7 @@ cc_library(
         "@llvm-project//mlir:FuncDialect",
         "@llvm-project//mlir:IR",
         "@llvm-project//mlir:InliningUtils",
+        "@llvm-project//mlir:Support",
     ],
 )
 
@@ -167,6 +168,7 @@ cc_library(
         "@llvm-project//mlir:IR",
         "@llvm-project//mlir:InliningUtils",
         "@llvm-project//mlir:SideEffectInterfaces",
+        "@llvm-project//mlir:Support",
         "@llvm-project//mlir:Transforms",
         "@tf_runtime//:compiler_tfrt_op_interfaces",
         "@tf_runtime//:compiler_tfrt_traits",
diff --git a/tensorflow/compiler/mlir/tfrt/ir/mlrt/mlrt_dialect.cc b/tensorflow/compiler/mlir/tfrt/ir/mlrt/mlrt_dialect.cc
index 50d4cb1214250b..b4e337f328b27b 100644
--- a/tensorflow/compiler/mlir/tfrt/ir/mlrt/mlrt_dialect.cc
+++ b/tensorflow/compiler/mlir/tfrt/ir/mlrt/mlrt_dialect.cc
@@ -23,6 +23,7 @@ limitations under the License.
 #include "mlir/IR/Region.h"  // from @llvm-project
 #include "mlir/IR/TypeUtilities.h"  // from @llvm-project
 #include "mlir/IR/Value.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Transforms/InliningUtils.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tfrt/ir/mlrt/mlrt_ops.h"
 
@@ -73,17 +74,17 @@ mlir::Type MlrtDialect::parseType(mlir::DialectAsmParser &parser) const {
 // Print a type registered to this dialect.
 void MlrtDialect::printType(mlir::Type type,
                             mlir::DialectAsmPrinter &os) const {
-  if (type.isa<FutureType>()) {
+  if (mlir::isa<FutureType>(type)) {
     os << "future";
     return;
   }
 
-  if (type.isa<PromiseType>()) {
+  if (mlir::isa<PromiseType>(type)) {
     os << "promise";
     return;
   }
 
-  if (type.isa<AsyncHandleType>()) {
+  if (mlir::isa<AsyncHandleType>(type)) {
     os << "async_handle";
     return;
   }
diff --git a/tensorflow/compiler/mlir/tfrt/ir/mlrt/tf_mlrt_ops.cc b/tensorflow/compiler/mlir/tfrt/ir/mlrt/tf_mlrt_ops.cc
index fc4cb6a93a28ea..d6ddc8f96fd901 100644
--- a/tensorflow/compiler/mlir/tfrt/ir/mlrt/tf_mlrt_ops.cc
+++ b/tensorflow/compiler/mlir/tfrt/ir/mlrt/tf_mlrt_ops.cc
@@ -19,6 +19,7 @@ limitations under the License.
 #include "mlir/IR/DialectImplementation.h"  // from @llvm-project
 #include "mlir/IR/OpDefinition.h"  // from @llvm-project
 #include "mlir/IR/TypeUtilities.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Transforms/InliningUtils.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/compiler/mlir/tfrt/ir/mlrt/mlrt_dialect.h"
@@ -74,7 +75,7 @@ mlir::Type TensorflowMlrtDialect::parseType(
 // Print a type registered to this dialect.
 void TensorflowMlrtDialect::printType(mlir::Type type,
                                       mlir::DialectAsmPrinter &os) const {
-  if (type.isa<TFTensorType>()) {
+  if (mlir::isa<TFTensorType>(type)) {
     os << "tensor";
     return;
   }
diff --git a/tensorflow/compiler/mlir/tfrt/ir/tfrt_fallback.cc b/tensorflow/compiler/mlir/tfrt/ir/tfrt_fallback.cc
index 4bc8a6842bffe1..dd47e81ee1a6df 100644
--- a/tensorflow/compiler/mlir/tfrt/ir/tfrt_fallback.cc
+++ b/tensorflow/compiler/mlir/tfrt/ir/tfrt_fallback.cc
@@ -18,6 +18,7 @@ limitations under the License.
 #include "mlir/IR/DialectImplementation.h"  // from @llvm-project
 #include "mlir/IR/OpDefinition.h"  // from @llvm-project
 #include "mlir/IR/TypeUtilities.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 
 namespace tfrt {
 namespace fallback {
@@ -47,12 +48,12 @@ Type FallbackDialect::parseType(DialectAsmParser &parser) const {
 
 /// Print a type registered to this dialect.
 void FallbackDialect::printType(Type type, DialectAsmPrinter &os) const {
-  if (type.isa<TFTensorType>()) {
+  if (mlir::isa<TFTensorType>(type)) {
     os << "tf_tensor";
     return;
   }
 
-  if (type.isa<TFAllocatorType>()) {
+  if (mlir::isa<TFAllocatorType>(type)) {
     os << "tf_allocator";
     return;
   }
diff --git a/tensorflow/compiler/mlir/tfrt/ir/tfrt_fallback_common.cc b/tensorflow/compiler/mlir/tfrt/ir/tfrt_fallback_common.cc
index 3a835b3796962d..30f6aa234a2d59 100644
--- a/tensorflow/compiler/mlir/tfrt/ir/tfrt_fallback_common.cc
+++ b/tensorflow/compiler/mlir/tfrt/ir/tfrt_fallback_common.cc
@@ -18,6 +18,7 @@ limitations under the License.
 
 #include "mlir/IR/Builders.h"  // from @llvm-project
 #include "mlir/IR/BuiltinAttributes.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 
 namespace tfrt {
 namespace fallback_common {
@@ -31,8 +32,8 @@ void GetExecuteOpAttrsCommon(
 
   mlir::Builder builder(context);
   for (auto iter : op_attr_array) {
-    auto key_value = iter.cast<mlir::ArrayAttr>().getValue();
-    llvm::StringRef key = key_value[0].cast<mlir::StringAttr>().getValue();
+    auto key_value = mlir::cast<mlir::ArrayAttr>(iter).getValue();
+    llvm::StringRef key = mlir::cast<mlir::StringAttr>(key_value[0]).getValue();
     mlir::Attribute value = key_value[1];
     op_attrs->push_back({key, value});
   }
diff --git a/tensorflow/compiler/mlir/tfrt/ir/tfrt_fallback_common.h b/tensorflow/compiler/mlir/tfrt/ir/tfrt_fallback_common.h
index e78d247c038c64..0cddb1017a33d8 100644
--- a/tensorflow/compiler/mlir/tfrt/ir/tfrt_fallback_common.h
+++ b/tensorflow/compiler/mlir/tfrt/ir/tfrt_fallback_common.h
@@ -21,6 +21,7 @@ limitations under the License.
 #include "mlir/IR/Attributes.h"  // from @llvm-project
 #include "mlir/IR/Builders.h"  // from @llvm-project
 #include "mlir/IR/OpImplementation.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tfrt/basic_kernels/opdefs/types.h"  // from @tf_runtime
 
 namespace tfrt {
@@ -30,9 +31,9 @@ template <typename OpTy>
 mlir::LogicalResult VerifyExecuteOpCommon(OpTy op) {
   auto op_attr_array = op.getOpAttrs().getValue();
   for (auto op_attr : op_attr_array) {
-    auto key_value = op_attr.template dyn_cast<mlir::ArrayAttr>();
+    auto key_value = mlir::dyn_cast<mlir::ArrayAttr>(op_attr);
     if (!key_value || key_value.getValue().size() != 2 ||
-        !key_value.getValue()[0].template isa<mlir::StringAttr>())
+        !mlir::isa<mlir::StringAttr>(key_value.getValue()[0]))
       return op.emitOpError() << "each op_attr should be a key-value pair, "
                                  "where the key is a string";
   }
@@ -47,10 +48,10 @@ mlir::LogicalResult VerifyFallbackExecuteOp(OpTy op) {
   // Verify function attributes.
   auto op_func_attr_array = op.getOpFuncAttrs().getValue();
   for (auto op_attr : op_func_attr_array) {
-    auto key_value = op_attr.template dyn_cast<mlir::ArrayAttr>();
+    auto key_value = mlir::dyn_cast<mlir::ArrayAttr>(op_attr);
     if (!key_value || key_value.getValue().size() != 2 ||
-        !key_value.getValue()[0].template isa<mlir::StringAttr>() ||
-        !key_value.getValue()[1].template isa<mlir::StringAttr>())
+        !mlir::isa<mlir::StringAttr>(key_value.getValue()[0]) ||
+        !mlir::isa<mlir::StringAttr>(key_value.getValue()[1]))
       return op.emitOpError() << "each op_func_attr should be a key-value "
                                  "pair, where both the key and the value are "
                                  "strings";
@@ -63,11 +64,11 @@ void PrintExecuteOpFuncAttribute(mlir::OpAsmPrinter &p, OpTy op) {
   auto op_func_attrs = op.getOpFuncAttrs();
   if (!op_func_attrs.empty()) {
     auto print_key_value = [&](mlir::Attribute attr) {
-      auto key_value = attr.cast<mlir::ArrayAttr>().getValue();
+      auto key_value = mlir::cast<mlir::ArrayAttr>(attr).getValue();
       auto key = key_value[0];
       auto value = key_value[1];
 
-      p << key.cast<mlir::StringAttr>().getValue();
+      p << mlir::cast<mlir::StringAttr>(key).getValue();
       p << " = ";
       p << value;
     };
@@ -84,11 +85,11 @@ void PrintExecuteOpCommon(mlir::OpAsmPrinter &p, OpTy op) {
   auto op_attrs = op.getOpAttrs();
   if (!op_attrs.empty()) {
     auto print_key_value = [&](mlir::Attribute attr) {
-      auto key_value = attr.cast<mlir::ArrayAttr>().getValue();
+      auto key_value = mlir::cast<mlir::ArrayAttr>(attr).getValue();
       auto key = key_value[0];
       auto value = key_value[1];
 
-      p << key.cast<mlir::StringAttr>().getValue();
+      p << mlir::cast<mlir::StringAttr>(key).getValue();
       p << " = ";
       p << value;
     };
diff --git a/tensorflow/compiler/mlir/tfrt/saved_model/saved_model.cc b/tensorflow/compiler/mlir/tfrt/saved_model/saved_model.cc
index e3acecf75e3073..93d50a012a6fed 100644
--- a/tensorflow/compiler/mlir/tfrt/saved_model/saved_model.cc
+++ b/tensorflow/compiler/mlir/tfrt/saved_model/saved_model.cc
@@ -27,6 +27,7 @@ limitations under the License.
 #include "mlir/IR/SymbolTable.h"  // from @llvm-project
 #include "mlir/IR/Visitors.h"  // from @llvm-project
 #include "mlir/Pass/PassManager.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_saved_model.h"
 #include "tensorflow/compiler/mlir/tensorflow/translate/tf_mlir_translate.h"
 #include "tensorflow/compiler/mlir/tensorflow/utils/convert_type.h"
@@ -42,9 +43,9 @@ namespace {
 using ::mlir::tf_saved_model::kTfSavedModelIndexPathAttr;
 
 llvm::StringRef ProcessIndexPath(mlir::ArrayAttr index_path) {
-  if (index_path.size() == 1 && index_path[0].isa<mlir::StringAttr>()) {
+  if (index_path.size() == 1 && mlir::isa<mlir::StringAttr>(index_path[0])) {
     // TODO(chky): Support cases where index_path is not a single string.
-    return index_path[0].cast<mlir::StringAttr>().getValue();
+    return mlir::cast<mlir::StringAttr>(index_path[0]).getValue();
   }
   return "";
 }
@@ -92,8 +93,8 @@ Status MapFunctionSignaturesFromTFSavedModelMLIR(
       if (auto input_index_path = func.getArgAttrOfType<mlir::ArrayAttr>(
               i, kTfSavedModelIndexPathAttr)) {
         input_names.push_back(ProcessIndexPath(input_index_path));
-        auto statusor_spec =
-            ProcessTensorSpec(func_type.getInput(i).cast<mlir::TensorType>());
+        auto statusor_spec = ProcessTensorSpec(
+            mlir::cast<mlir::TensorType>(func_type.getInput(i)));
         if (!statusor_spec.ok()) {
           status = std::move(statusor_spec).status();
           return mlir::WalkResult::interrupt();
@@ -120,8 +121,8 @@ Status MapFunctionSignaturesFromTFSavedModelMLIR(
       if (auto output_index_path = func.getResultAttrOfType<mlir::ArrayAttr>(
               i, kTfSavedModelIndexPathAttr)) {
         output_names.push_back(ProcessIndexPath(output_index_path));
-        auto statusor_spec =
-            ProcessTensorSpec(func_type.getResult(i).cast<mlir::TensorType>());
+        auto statusor_spec = ProcessTensorSpec(
+            mlir::cast<mlir::TensorType>(func_type.getResult(i)));
         if (!statusor_spec.ok()) {
           status = std::move(statusor_spec).status();
           return mlir::WalkResult::interrupt();
diff --git a/tensorflow/compiler/mlir/tfrt/transforms/attr_lowering_utils.cc b/tensorflow/compiler/mlir/tfrt/transforms/attr_lowering_utils.cc
index efedf36452dc12..a0ae8cb06e45df 100644
--- a/tensorflow/compiler/mlir/tfrt/transforms/attr_lowering_utils.cc
+++ b/tensorflow/compiler/mlir/tfrt/transforms/attr_lowering_utils.cc
@@ -20,6 +20,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinTypes.h"
 #include "mlir/IR/OperationSupport.h"
 #include "mlir/IR/Types.h"
+#include "mlir/Support/LLVM.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/ADT/StringRef.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_attributes.h"
@@ -37,39 +38,39 @@ mlir::TypeAttr ConvertTypeAttribute(mlir::TypeAttr type_attr,
   if (IsSupportedTfrtNumericDType(type)) return type_attr;
 
   // For TF custom types, we convert it to custom corert types.
-  if (type.isa<mlir::TF::StringType>())
+  if (mlir::isa<mlir::TF::StringType>(type))
     return mlir::TypeAttr::get(
         tfrt::corert::StringType::get(builder.getContext()));
 
-  if (type.isa<mlir::TF::ResourceType>())
+  if (mlir::isa<mlir::TF::ResourceType>(type))
     return mlir::TypeAttr::get(
         tfrt::corert::ResourceType::get(builder.getContext()));
 
-  if (type.isa<mlir::TF::VariantType>())
+  if (mlir::isa<mlir::TF::VariantType>(type))
     return mlir::TypeAttr::get(
         tfrt::corert::VariantType::get(builder.getContext()));
 
-  if (type.isa<mlir::TF::Quint8Type>()) {
+  if (mlir::isa<mlir::TF::Quint8Type>(type)) {
     return mlir::TypeAttr::get(
         tfrt::corert::Quint8Type::get(builder.getContext()));
   }
 
-  if (type.isa<mlir::TF::Quint16Type>()) {
+  if (mlir::isa<mlir::TF::Quint16Type>(type)) {
     return mlir::TypeAttr::get(
         tfrt::corert::Quint16Type::get(builder.getContext()));
   }
 
-  if (type.isa<mlir::TF::Qint8Type>()) {
+  if (mlir::isa<mlir::TF::Qint8Type>(type)) {
     return mlir::TypeAttr::get(
         tfrt::corert::Qint8Type::get(builder.getContext()));
   }
 
-  if (type.isa<mlir::TF::Qint16Type>()) {
+  if (mlir::isa<mlir::TF::Qint16Type>(type)) {
     return mlir::TypeAttr::get(
         tfrt::corert::Qint16Type::get(builder.getContext()));
   }
 
-  if (type.isa<mlir::TF::Qint32Type>()) {
+  if (mlir::isa<mlir::TF::Qint32Type>(type)) {
     return mlir::TypeAttr::get(
         tfrt::corert::Qint32Type::get(builder.getContext()));
   }
@@ -86,14 +87,15 @@ mlir::Attribute ConvertAttribute(mlir::Attribute attr, mlir::Builder& builder) {
   // attributes are not supported yet.
 
   // Return directly if the attribute is already supported.
-  if (attr.isa<mlir::IntegerAttr, mlir::FloatAttr, mlir::BoolAttr,
-               mlir::StringAttr, mlir::DenseIntOrFPElementsAttr>())
+  if (mlir::isa<mlir::IntegerAttr, mlir::FloatAttr, mlir::BoolAttr,
+                mlir::StringAttr, mlir::DenseIntOrFPElementsAttr>(attr))
     return attr;
 
   // For type attributes, we convert non-standard MLIR types to corresponding
   // corert types.
-  if (auto type_attr = attr.dyn_cast<mlir::TypeAttr>()) {
-    if (auto shape_type = type_attr.getValue().dyn_cast<mlir::TensorType>()) {
+  if (auto type_attr = mlir::dyn_cast<mlir::TypeAttr>(attr)) {
+    if (auto shape_type =
+            mlir::dyn_cast<mlir::TensorType>(type_attr.getValue())) {
       if (!shape_type.hasRank())
         return tfrt::corert::ShapeAttr::get(builder.getContext());
 
@@ -106,7 +108,7 @@ mlir::Attribute ConvertAttribute(mlir::Attribute attr, mlir::Builder& builder) {
 
   // Convert the attribute to the corresponding format in TFRT dialect if
   // needed.
-  if (auto shape_attr = attr.dyn_cast<mlir::TF::ShapeAttr>()) {
+  if (auto shape_attr = mlir::dyn_cast<mlir::TF::ShapeAttr>(attr)) {
     if (!shape_attr.hasRank())
       return tfrt::corert::ShapeAttr::get(builder.getContext());
     return tfrt::corert::ShapeAttr::get(builder.getContext(),
@@ -114,7 +116,7 @@ mlir::Attribute ConvertAttribute(mlir::Attribute attr, mlir::Builder& builder) {
   }
 
   // For arrays, we recursively convert the elements.
-  if (auto array_attr = attr.dyn_cast<mlir::ArrayAttr>()) {
+  if (auto array_attr = mlir::dyn_cast<mlir::ArrayAttr>(attr)) {
     llvm::SmallVector<mlir::Attribute, 8> attrs;
     attrs.reserve(array_attr.size());
     for (auto attr : array_attr) {
@@ -140,7 +142,7 @@ bool IsSupportedTfrtNumericDType(mlir::Type type) {
       type.isUnsignedInteger(64))
     return true;
 
-  if (auto complex_type = type.dyn_cast<mlir::ComplexType>()) {
+  if (auto complex_type = mlir::dyn_cast<mlir::ComplexType>(type)) {
     auto element_type = complex_type.getElementType();
     if (element_type.isF32() || element_type.isF64()) return true;
   }
diff --git a/tensorflow/compiler/mlir/tfrt/transforms/corert_converter.cc b/tensorflow/compiler/mlir/tfrt/transforms/corert_converter.cc
index 48d9f755c16c7b..910f7a83a9f7af 100644
--- a/tensorflow/compiler/mlir/tfrt/transforms/corert_converter.cc
+++ b/tensorflow/compiler/mlir/tfrt/transforms/corert_converter.cc
@@ -23,6 +23,7 @@ limitations under the License.
 #include "mlir/IR/OperationSupport.h"
 #include "mlir/IR/Types.h"
 #include "mlir/Pass/PassManager.h"
+#include "mlir/Support/LLVM.h"
 #include "mlir/Transforms/DialectConversion.h"
 #include "mlir/Transforms/Passes.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
@@ -46,7 +47,7 @@ CoreRTConverter::CoreRTConverter(
   addConversion([](tfrt::corert::TensorHandleType type) { return type; });
   addConversion([=](mlir::TensorType type) -> std::optional<mlir::Type> {
     // Ref types are not supported in both compiler and runtime.
-    if (type.getElementType().isa<mlir::TF::TensorFlowRefType>())
+    if (mlir::isa<mlir::TF::TensorFlowRefType>(type.getElementType()))
       return std::nullopt;
     return tensor_handle_type();
   });
@@ -74,8 +75,8 @@ mlir::ArrayAttr CoreRTConverter::CreateOpFuncAttrs(
     auto attr_key = key_and_value.getName();
     auto attr_value = key_and_value.getValue();
     if (!IsUnusedTfrtAttribute(attr_key) &&
-        attr_value.isa<mlir::FlatSymbolRefAttr, mlir::SymbolRefAttr>()) {
-      auto func_attr = attr_value.dyn_cast<mlir::FlatSymbolRefAttr>();
+        mlir::isa<mlir::FlatSymbolRefAttr, mlir::SymbolRefAttr>(attr_value)) {
+      auto func_attr = mlir::dyn_cast<mlir::FlatSymbolRefAttr>(attr_value);
       auto converted = CanonicalizeTensorflowFunctionName(
           symbol_table, func_attr.getValue().str(), use_mlir_func_name);
       if (!converted) return {};
@@ -126,7 +127,7 @@ std::optional<ParseDeviceNameResult> CoreRTConverter::ParseDeviceName(
   }
 
   auto parsed_device_name =
-      ParseDeviceName(device_attr.cast<mlir::StringAttr>().getValue());
+      ParseDeviceName(mlir::cast<mlir::StringAttr>(device_attr).getValue());
   if (!parsed_device_name) op->emitWarning("failed to parse device name.");
   return parsed_device_name;
 }
diff --git a/tensorflow/compiler/mlir/tfrt/transforms/cross_device_transfer.cc b/tensorflow/compiler/mlir/tfrt/transforms/cross_device_transfer.cc
index 2b1e29c5347096..5f539b8c520e65 100644
--- a/tensorflow/compiler/mlir/tfrt/transforms/cross_device_transfer.cc
+++ b/tensorflow/compiler/mlir/tfrt/transforms/cross_device_transfer.cc
@@ -23,6 +23,7 @@ limitations under the License.
 #include "mlir/IR/Builders.h"  // from @llvm-project
 #include "mlir/IR/Types.h"  // from @llvm-project
 #include "mlir/Pass/PassManager.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Transforms/Passes.h"  // from @llvm-project
 #include "tensorflow/core/util/device_name_utils.h"
 #include "tfrt/basic_kernels/opdefs/basic_kernels.h"  // from @tf_runtime
@@ -81,8 +82,8 @@ static std::string GetDevice(Operation *op) {
     SmallVector<std::pair<StringRef, Attribute>, 4> attrs;
     execute_op.getOpAttrs(&attrs);
     for (std::pair<StringRef, Attribute> entry : attrs) {
-      if (entry.first == kDeviceAttr && entry.second.isa<StringAttr>()) {
-        device = entry.second.cast<StringAttr>().getValue().str();
+      if (entry.first == kDeviceAttr && mlir::isa<StringAttr>(entry.second)) {
+        device = mlir::cast<StringAttr>(entry.second).getValue().str();
         break;
       }
     }
@@ -94,7 +95,7 @@ static std::string GetDevice(Operation *op) {
 // Return the device of the given value.
 static std::string GetDevice(mlir::Value value, func::FuncOp parent_func_op) {
   std::string device = "";
-  if (BlockArgument block_arg = value.dyn_cast<BlockArgument>()) {
+  if (BlockArgument block_arg = mlir::dyn_cast<BlockArgument>(value)) {
     if (StringAttr device_attr = parent_func_op.getArgAttrOfType<StringAttr>(
             block_arg.getArgNumber(), kTFRTDeviceAttr)) {
       device = device_attr.getValue().str();
@@ -140,10 +141,10 @@ void CrossDeviceTransferPass::runOnOperation() {
 
     for (mlir::Value arg : op->getOperands()) {
       // Do not transfer non-TensorHandle values.
-      if (!arg.getType().isa<tfrt::corert::TensorHandleType>()) continue;
+      if (!mlir::isa<tfrt::corert::TensorHandleType>(arg.getType())) continue;
 
       // Do not transfer the result of corert.transfer op.
-      if (OpResult op_result = arg.dyn_cast<OpResult>()) {
+      if (OpResult op_result = mlir::dyn_cast<OpResult>(arg)) {
         Operation *defining_op = arg.getDefiningOp();
         if (llvm::isa<tfrt::corert::TransferOp>(defining_op)) continue;
       }
diff --git a/tensorflow/compiler/mlir/tfrt/transforms/fallback_converter.cc b/tensorflow/compiler/mlir/tfrt/transforms/fallback_converter.cc
index ef8c2ec38ce64b..77759a631f177f 100644
--- a/tensorflow/compiler/mlir/tfrt/transforms/fallback_converter.cc
+++ b/tensorflow/compiler/mlir/tfrt/transforms/fallback_converter.cc
@@ -16,6 +16,7 @@ limitations under the License.
 
 #include <optional>
 
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_types.h"
 #include "tensorflow/compiler/mlir/tfrt/ir/tfrt_fallback.h"
 #include "tensorflow/compiler/mlir/tfrt/ir/tfrt_fallback_async.h"
@@ -31,7 +32,7 @@ FallbackConverter::FallbackConverter(mlir::MLIRContext *context)
   addConversion([](tfrt::fallback::TFTensorType type) { return type; });
   addConversion([=](mlir::TensorType type) -> std::optional<mlir::Type> {
     // Ref types are not supported in both compiler and runtime.
-    if (type.getElementType().isa<mlir::TF::TensorFlowRefType>()) {
+    if (mlir::isa<mlir::TF::TensorFlowRefType>(type.getElementType())) {
       return std::nullopt;
     }
 
@@ -46,9 +47,9 @@ FallbackConverter::FallbackConverter(mlir::MLIRContext *context)
 mlir::Value ConvertCoreRTTensorHandleToFallbackTensor(
     mlir::Location loc, llvm::StringRef device, mlir::Value value,
     mlir::ConversionPatternRewriter &rewriter) {
-  if (value.getType().isa<tfrt::fallback::TFTensorType>()) return value;
+  if (mlir::isa<tfrt::fallback::TFTensorType>(value.getType())) return value;
 
-  if (!value.getType().isa<tfrt::corert::TensorHandleType>()) return {};
+  if (!mlir::isa<tfrt::corert::TensorHandleType>(value.getType())) return {};
 
   mlir::OpBuilder::InsertionGuard guard(rewriter);
 
@@ -82,9 +83,9 @@ mlir::Value ConvertCoreRTTensorHandleToFallbackTensor(
 mlir::Value ConvertFallbackTensorToCoreRTTensorHandle(
     mlir::Location loc, mlir::Value value,
     mlir::ConversionPatternRewriter &rewriter) {
-  if (value.getType().isa<tfrt::corert::TensorHandleType>()) return value;
+  if (mlir::isa<tfrt::corert::TensorHandleType>(value.getType())) return value;
 
-  if (!value.getType().isa<tfrt::fallback::TFTensorType>()) return {};
+  if (!mlir::isa<tfrt::fallback::TFTensorType>(value.getType())) return {};
 
   // Use CPU device by default if no device is specified.
   llvm::StringRef device = GetDefaultCpuDeviceName();
@@ -134,7 +135,7 @@ mlir::LogicalResult ConvertFallbackOperands(
     llvm::SmallVectorImpl<mlir::Value> *new_operands,
     mlir::ConversionPatternRewriter &rewriter) {
   for (auto operand : operands) {
-    if (!operand.getType().isa<tfrt::fallback::TFTensorType>()) {
+    if (!mlir::isa<tfrt::fallback::TFTensorType>(operand.getType())) {
       auto new_operand = ConvertCoreRTTensorHandleToFallbackTensor(
           op->getLoc(), device, operand, rewriter);
       if (!new_operand)
diff --git a/tensorflow/compiler/mlir/tfrt/transforms/insert_tensor_copy.cc b/tensorflow/compiler/mlir/tfrt/transforms/insert_tensor_copy.cc
index 2b2cbbcf318d15..d6c87abeedd54a 100644
--- a/tensorflow/compiler/mlir/tfrt/transforms/insert_tensor_copy.cc
+++ b/tensorflow/compiler/mlir/tfrt/transforms/insert_tensor_copy.cc
@@ -26,6 +26,7 @@ limitations under the License.
 #include "mlir/IR/Value.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
 #include "mlir/Pass/PassRegistry.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/TypeID.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tfrt/ir/tfrt_fallback.h"
 #include "tensorflow/compiler/mlir/tfrt/ir/tfrt_fallback_async.h"
@@ -69,7 +70,7 @@ class InsertFallbackTensorCopy
 
     // Process function arguments first.
     for (auto arg : func_op.getArguments()) {
-      if (!arg.getType().isa<tfrt::fallback::TFTensorType>()) continue;
+      if (!mlir::isa<tfrt::fallback::TFTensorType>(arg.getType())) continue;
       InsertFallbackTensorCopyForValue(arg, func_op->getLoc(), builder,
                                        stream_analysis);
     }
@@ -91,7 +92,7 @@ class InsertFallbackTensorCopy
 
     // Process each result value.
     for (auto result : op->getResults()) {
-      if (!result.getType().isa<tfrt::fallback::TFTensorType>()) continue;
+      if (!mlir::isa<tfrt::fallback::TFTensorType>(result.getType())) continue;
       InsertFallbackTensorCopyForValue(result, op->getLoc(), builder,
                                        stream_analysis);
     }
@@ -147,7 +148,7 @@ class InsertFallbackTensorCopy
     // For each stream, we will create one new value that replaces the uses in
     // that stream.
 
-    assert(value.getType().isa<tfrt::fallback::TFTensorType>());
+    assert(mlir::isa<tfrt::fallback::TFTensorType>(value.getType()));
 
     // The number of results is the number candidate streams.
     llvm::SmallVector<mlir::Type, 4> result_types(copies.size(),
diff --git a/tensorflow/compiler/mlir/tfrt/transforms/lower_saved_model.cc b/tensorflow/compiler/mlir/tfrt/transforms/lower_saved_model.cc
index 17e3d8be95204d..01ae5811b46b9a 100644
--- a/tensorflow/compiler/mlir/tfrt/transforms/lower_saved_model.cc
+++ b/tensorflow/compiler/mlir/tfrt/transforms/lower_saved_model.cc
@@ -44,6 +44,7 @@ limitations under the License.
 #include "mlir/Interfaces/SideEffectInterfaces.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
 #include "mlir/Pass/PassRegistry.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Support/TypeID.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/analysis/side_effect_analysis.h"
@@ -231,7 +232,7 @@ void FindCalleesRecursiveForOp(const mlir::SymbolTable &symbol_table,
                                llvm::StringSet<> &callees) {
   for (const auto &named_attr : op->getAttrs()) {
     if (auto symbol_attr =
-            named_attr.getValue().dyn_cast<mlir::FlatSymbolRefAttr>()) {
+            mlir::dyn_cast<mlir::FlatSymbolRefAttr>(named_attr.getValue())) {
       auto symbol = symbol_attr.getValue();
       if (!callees.contains(symbol)) {
         callees.insert(symbol);
@@ -337,7 +338,8 @@ class LowerTFSavedModelPass
           func_op->removeAttr(kTfSavedModelExportedNamesAttr);
           for (auto exported_name : exported_names) {
             auto exported_func_op = func_op.clone();
-            exported_func_op.setName(exported_name.cast<mlir::StringAttr>());
+            exported_func_op.setName(
+                mlir::cast<mlir::StringAttr>(exported_name));
 
             // If it is a session initializer, we want to maximize parallelism
             // and do not perform any stream merge, to minimize latency.
@@ -631,8 +633,8 @@ class ConvertReferenceVariableToResourceVariablePass
 
 mlir::LogicalResult ConvertReferenceVariableToResourceVariable(
     mlir::TF::VariableV2Op var_op) {
-  auto tensor_type =
-      mlir::TF::DropRefType(var_op.getRef().getType()).cast<mlir::TensorType>();
+  auto tensor_type = mlir::cast<mlir::TensorType>(
+      mlir::TF::DropRefType(var_op.getRef().getType()));
 
   llvm::SmallVector<mlir::TF::IdentityOp, 4> identity_ops;
   llvm::SmallVector<mlir::TF::AssignOp, 4> assign_ops;
diff --git a/tensorflow/compiler/mlir/tfrt/transforms/mlrt/tf_to_mlrt.cc b/tensorflow/compiler/mlir/tfrt/transforms/mlrt/tf_to_mlrt.cc
index 5942fe2ddb816f..dc43f3bc213f6d 100644
--- a/tensorflow/compiler/mlir/tfrt/transforms/mlrt/tf_to_mlrt.cc
+++ b/tensorflow/compiler/mlir/tfrt/transforms/mlrt/tf_to_mlrt.cc
@@ -37,6 +37,7 @@ limitations under the License.
 #include "mlir/IR/PatternMatch.h"  // from @llvm-project
 #include "mlir/IR/SymbolTable.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Transforms/DialectConversion.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/host_runtime/tfrt_ops.h.inc"
@@ -380,11 +381,11 @@ class IfrtRestoreVariableOpConversion
 };
 
 std::optional<std::string> DecodeLongName(mlir::Location loc) {
-  if (auto name_loc = loc.dyn_cast<mlir::NameLoc>()) {
+  if (auto name_loc = mlir::dyn_cast<mlir::NameLoc>(loc)) {
     return name_loc.getName().str();
   }
 
-  if (auto fused_loc = loc.dyn_cast<mlir::FusedLoc>()) {
+  if (auto fused_loc = mlir::dyn_cast<mlir::FusedLoc>(loc)) {
     std::string fused_name;
     for (auto l : fused_loc.getLocations()) {
       if (auto n = DecodeLongName(l)) {
@@ -1027,7 +1028,7 @@ class TfToMlrtConversionPass
     type_converter_.addConversion(
         [=](mlir::TensorType type) -> std::optional<mlir::Type> {
           // Ref types are not supported in both compiler and runtime.
-          if (type.getElementType().isa<mlir::TF::TensorFlowRefType>())
+          if (mlir::isa<mlir::TF::TensorFlowRefType>(type.getElementType()))
             return std::nullopt;
           return tf_mlrt::TFTensorType::get(context);
         });
@@ -1037,8 +1038,8 @@ class TfToMlrtConversionPass
            mlir::ValueRange inputs, mlir::Location loc) -> mlir::Value {
       if (inputs.size() != 1) return mlir::Value();
 
-      if (inputs[0].getType().isa<mlrt::compiler::FutureType>()) {
-        if (desired_type.isa<tf_mlrt::TFTensorType>()) {
+      if (mlir::isa<mlrt::compiler::FutureType>(inputs[0].getType())) {
+        if (mlir::isa<tf_mlrt::TFTensorType>(desired_type)) {
           return builder.create<tf_mlrt::AwaitOp>(loc, desired_type, inputs[0]);
         }
 
diff --git a/tensorflow/compiler/mlir/tfrt/transforms/optimize.cc b/tensorflow/compiler/mlir/tfrt/transforms/optimize.cc
index e13e8f36b1a436..0e47fad312c7cc 100644
--- a/tensorflow/compiler/mlir/tfrt/transforms/optimize.cc
+++ b/tensorflow/compiler/mlir/tfrt/transforms/optimize.cc
@@ -13,6 +13,7 @@ See the License for the specific language governing permissions and
 limitations under the License.
 ==============================================================================*/
 #include "mlir/Dialect/Func/IR/FuncOps.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/compiler/mlir/tfrt/transforms/passes.h"
@@ -41,7 +42,8 @@ class FoldDeviceIndex : public mlir::OpRewritePattern<mlir::TF::DeviceIndexOp> {
     int32_t i = 0;
     mlir::ArrayAttr device_names = op.getDeviceNames();
     for (; i < device_names.size(); ++i) {
-      auto device_name = device_names[i].cast<mlir::StringAttr>().getValue();
+      auto device_name =
+          mlir::cast<mlir::StringAttr>(device_names[i]).getValue();
       if (device_name == parsed_name.type) break;
     }
 
diff --git a/tensorflow/compiler/mlir/tfrt/transforms/sink_in_invariant_ops.cc b/tensorflow/compiler/mlir/tfrt/transforms/sink_in_invariant_ops.cc
index 848498c68ba71c..8bdb39c913bf75 100644
--- a/tensorflow/compiler/mlir/tfrt/transforms/sink_in_invariant_ops.cc
+++ b/tensorflow/compiler/mlir/tfrt/transforms/sink_in_invariant_ops.cc
@@ -39,6 +39,7 @@ limitations under the License.
 #include "mlir/IR/Visitors.h"  // from @llvm-project
 #include "mlir/Interfaces/CallInterfaces.h"  // from @llvm-project
 #include "mlir/Pass/PassManager.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/compiler/mlir/tensorflow/transforms/passes.h"
 
@@ -82,7 +83,7 @@ llvm::SmallVector<mlir::Value> FindValueInCallees(
   llvm::SmallDenseSet<llvm::StringRef> callees;
   for (const auto &named_attr : caller->getAttrs()) {
     if (auto symbol_attr =
-            named_attr.getValue().dyn_cast<mlir::FlatSymbolRefAttr>()) {
+            mlir::dyn_cast<mlir::FlatSymbolRefAttr>(named_attr.getValue())) {
       auto symbol = symbol_attr.getValue();
 
       auto callee = symbol_table.lookup<mlir::func::FuncOp>(symbol);
diff --git a/tensorflow/compiler/mlir/tfrt/transforms/tf_to_tfrt.cc b/tensorflow/compiler/mlir/tfrt/transforms/tf_to_tfrt.cc
index f893ec7f2b3f33..48aee8f98f314d 100644
--- a/tensorflow/compiler/mlir/tfrt/transforms/tf_to_tfrt.cc
+++ b/tensorflow/compiler/mlir/tfrt/transforms/tf_to_tfrt.cc
@@ -41,6 +41,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinAttributes.h"  // from @llvm-project
 #include "mlir/IR/BuiltinOps.h"  // from @llvm-project
 #include "mlir/Pass/PassManager.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/analysis/side_effect_analysis.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_device.h"
@@ -181,7 +182,7 @@ class GpuCompileAndExecuteOpConversion
     if (!xla_function) {
       return op->emitWarning("failed to find 'function' attribute");
     }
-    auto func_attr = xla_function.dyn_cast<mlir::FlatSymbolRefAttr>();
+    auto func_attr = mlir::dyn_cast<mlir::FlatSymbolRefAttr>(xla_function);
     if (!func_attr || func_attr.getValue().empty()) {
       return op->emitWarning("failed to find a non-empty 'function' attribute");
     }
@@ -512,7 +513,7 @@ class FallbackConstOpConversion
       mlir::ConversionPatternRewriter &rewriter) const override {
     // Some data types are handled separately using a fast path.
     if (IsSupportedTfrtNumericDType(op.getDtype()) ||
-        op.getDtype().isa<mlir::TF::StringType>())
+        mlir::isa<mlir::TF::StringType>(op.getDtype()))
       return failure();
 
     // For other data types that do not have a fast path (eg. quantized types),
@@ -757,7 +758,7 @@ class CoreRTConstDenseTensorOpConversion
 
     auto new_op = rewriter.create<tfrt::corert::ConstDenseTensorOp>(
         op.getLoc(), corert_converter_.tensor_handle_type(),
-        op.getValue().cast<DenseElementsAttr>());
+        mlir::cast<DenseElementsAttr>(op.getValue()));
     rewriter.replaceOp(op, new_op->getResult(0));
     return success();
   }
@@ -870,10 +871,10 @@ class CoreRTConstStringTensorOpConversion
   LogicalResult matchAndRewrite(
       mlir::TF::ConstOp op, OpAdaptor adaptor,
       ConversionPatternRewriter &rewriter) const override {  // NOLINT
-    if (!op.getDtype().isa<mlir::TF::StringType>()) return failure();
+    if (!mlir::isa<mlir::TF::StringType>(op.getDtype())) return failure();
 
     DenseStringElementsAttr attr =
-        op.getValue().cast<DenseStringElementsAttr>();
+        mlir::cast<DenseStringElementsAttr>(op.getValue());
 
     llvm::SmallVector<Attribute, 4> values;
     values.reserve(attr.getNumElements());
@@ -1067,7 +1068,7 @@ class TFRTCaseOpConversion : public mlir::OpConversionPattern<TF::CaseOp> {
 
     mlir::Value index_operand = adaptor.getOperands()[0];
     // TODO(b/182233401): Support TF tensor; remove the conversion op here.
-    if (index_operand.getType().isa<tfrt::fallback::TFTensorType>()) {
+    if (mlir::isa<tfrt::fallback::TFTensorType>(index_operand.getType())) {
       // TODO(b/182232457): Support other devices.
       index_operand =
           rewriter
@@ -1079,7 +1080,7 @@ class TFRTCaseOpConversion : public mlir::OpConversionPattern<TF::CaseOp> {
                   tfrt_compiler::GetDefaultCpuDeviceName())
               .getResult(0);
     }
-    if (!index_operand.getType().isa<tfrt::corert::TensorHandleType>())
+    if (!mlir::isa<tfrt::corert::TensorHandleType>(index_operand.getType()))
       return op.emitError(
           "branch index operand is expected to be a TensorHandle.");
     mlir::Value index_value =
@@ -1101,7 +1102,7 @@ class TFRTCaseOpConversion : public mlir::OpConversionPattern<TF::CaseOp> {
 
 static mlir::Value GetPredicate(mlir::Operation *op, mlir::Value cond_operand,
                                 mlir::ConversionPatternRewriter &rewriter) {
-  if (!cond_operand.getType().isa<tfrt::fallback::TFTensorType>()) {
+  if (!mlir::isa<tfrt::fallback::TFTensorType>(cond_operand.getType())) {
     cond_operand = tfrt_compiler::ConvertCoreRTTensorHandleToFallbackTensor(
         op->getLoc(), tfrt_compiler::GetDefaultCpuDeviceName(), cond_operand,
         rewriter);
@@ -1721,7 +1722,7 @@ class TfToTfrtConversionPass
     auto return_op =
         llvm::cast<tfrt::compiler::ReturnOp>(block.getTerminator());
     auto chain = return_op->getOperand(0);
-    assert(chain.getType().isa<tfrt::compiler::ChainType>());
+    assert(mlir::isa<tfrt::compiler::ChainType>(chain.getType()));
     dangling_values.push_back(chain);
 
     mlir::OpBuilder builder(return_op);
diff --git a/tensorflow/compiler/mlir/tfrt/transforms/utils.cc b/tensorflow/compiler/mlir/tfrt/transforms/utils.cc
index 9b602babeafe22..711438f21d13f9 100644
--- a/tensorflow/compiler/mlir/tfrt/transforms/utils.cc
+++ b/tensorflow/compiler/mlir/tfrt/transforms/utils.cc
@@ -25,6 +25,7 @@ limitations under the License.
 #include "mlir/IR/OperationSupport.h"  // from @llvm-project
 #include "mlir/IR/Types.h"  // from @llvm-project
 #include "mlir/IR/Value.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_saved_model.h"
 #include "tfrt/basic_kernels/opdefs/tfrt_base.h"  // from @tf_runtime
@@ -34,7 +35,7 @@ limitations under the License.
 namespace tensorflow {
 
 bool IsResourceArgument(mlir::Value value) {
-  auto arg = value.dyn_cast<mlir::BlockArgument>();
+  auto arg = mlir::dyn_cast<mlir::BlockArgument>(value);
   if (!arg) return false;
 
   auto func = llvm::cast<mlir::func::FuncOp>(arg.getOwner()->getParentOp());
@@ -44,7 +45,7 @@ bool IsResourceArgument(mlir::Value value) {
 
 bool IsResultVariable(const mlir::Value &original_operand,
                       const mlir::Value &operand) {
-  if (original_operand.isa<mlir::OpResult>()) {
+  if (mlir::isa<mlir::OpResult>(original_operand)) {
     auto defining_op = original_operand.getDefiningOp();
 
     // TODO(b/174753886): When device assignment is properly done, we
@@ -99,7 +100,8 @@ bool IsSessionInitializer(mlir::func::FuncOp op) {
   if (!session_initializer_op) return false;
 
   for (auto sym_ref : session_initializer_op.getInitializers()) {
-    if (op.getSymName() == sym_ref.cast<mlir::FlatSymbolRefAttr>().getValue())
+    if (op.getSymName() ==
+        mlir::cast<mlir::FlatSymbolRefAttr>(sym_ref).getValue())
       return true;
   }
 
diff --git a/tensorflow/compiler/mlir/tfrt/translate/import_model.cc b/tensorflow/compiler/mlir/tfrt/translate/import_model.cc
index 7917cf15391e39..f68f0a2bcc80cc 100644
--- a/tensorflow/compiler/mlir/tfrt/translate/import_model.cc
+++ b/tensorflow/compiler/mlir/tfrt/translate/import_model.cc
@@ -123,7 +123,7 @@ absl::StatusOr<std::vector<FunctionDef>> ExportXlaFunctions(
     func_op->walk([&](mlir::Operation* op) {
       for (const mlir::NamedAttribute& attr : op->getAttrs()) {
         if (const auto sym =
-                attr.getValue().dyn_cast<mlir::FlatSymbolRefAttr>()) {
+                mlir::dyn_cast<mlir::FlatSymbolRefAttr>(attr.getValue())) {
           mlir::Operation* func =
               mlir::SymbolTable::lookupNearestSymbolFrom(op, sym);
           if (func) {
diff --git a/tensorflow/compiler/mlir/tfrt/translate/mlrt/BUILD b/tensorflow/compiler/mlir/tfrt/translate/mlrt/BUILD
index bc887cdfc966f9..79caaccb155101 100644
--- a/tensorflow/compiler/mlir/tfrt/translate/mlrt/BUILD
+++ b/tensorflow/compiler/mlir/tfrt/translate/mlrt/BUILD
@@ -29,6 +29,7 @@ cc_library(
         "@llvm-project//llvm:Support",
         "@llvm-project//mlir:FuncDialect",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
     ],
 )
 
@@ -43,6 +44,7 @@ tf_cc_test(
         "@com_google_googletest//:gtest_main",
         "@llvm-project//mlir:FuncDialect",
         "@llvm-project//mlir:Parser",
+        "@llvm-project//mlir:Support",
         "@local_tsl//tsl/platform:resource_loader",
         "@local_tsl//tsl/platform:status_matchers",
         "@local_tsl//tsl/platform:test",
diff --git a/tensorflow/compiler/mlir/tfrt/translate/mlrt/mlir_to_bytecode.cc b/tensorflow/compiler/mlir/tfrt/translate/mlrt/mlir_to_bytecode.cc
index 98cb26acdba8fa..06606c6fff345e 100644
--- a/tensorflow/compiler/mlir/tfrt/translate/mlrt/mlir_to_bytecode.cc
+++ b/tensorflow/compiler/mlir/tfrt/translate/mlrt/mlir_to_bytecode.cc
@@ -29,6 +29,7 @@ limitations under the License.
 #include "llvm/ADT/TypeSwitch.h"
 #include "mlir/IR/Attributes.h"  // from @llvm-project
 #include "mlir/IR/BuiltinAttributes.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/core/tfrt/mlrt/bytecode/executable.h"
 
 namespace mlrt {
@@ -37,8 +38,8 @@ namespace {
 // LINT.IfChange(mlrt_attributes)
 bool CanBeInlined(mlir::Attribute attr, absl::string_view data) {
   // FlatSymbolRefAttr is a special case as we are emitting it as integer.
-  return attr.isa<mlir::IntegerAttr, mlir::FloatAttr,
-                  mlir::FlatSymbolRefAttr>() &&
+  return mlir::isa<mlir::IntegerAttr, mlir::FloatAttr, mlir::FlatSymbolRefAttr>(
+             attr) &&
          data.size() <= sizeof(uint32_t);
 }
 // LINT.ThenChange(../../../../../core/tfrt/mlrt/interpreter/attribute_span.h:mlrt_attributes)
@@ -64,7 +65,7 @@ std::optional<std::string> EncodeListOfInteger(mlir::ArrayAttr array) {
   mlir::Type type;
 
   for (int i = 0; i < array.size(); ++i) {
-    if (auto integer_attr = array[i].dyn_cast<mlir::IntegerAttr>()) {
+    if (auto integer_attr = mlir::dyn_cast<mlir::IntegerAttr>(array[i])) {
       if (type && integer_attr.getType() != type) return std::nullopt;
       type = integer_attr.getType();
       llvm::APInt value = integer_attr.getValue();
@@ -85,7 +86,7 @@ std::optional<std::string> EncodeListOfSymbolRef(
   auto ctor = bc::New<bc::Vector<uint32_t>>(&allocator, array.size());
 
   for (int i = 0; i < array.size(); ++i) {
-    if (auto symbol_ref = array[i].dyn_cast<mlir::FlatSymbolRefAttr>()) {
+    if (auto symbol_ref = mlir::dyn_cast<mlir::FlatSymbolRefAttr>(array[i])) {
       ctor.ConstructAt(i, module_context.GetFunctionId(symbol_ref.getValue()));
     } else {
       return std::nullopt;
@@ -117,7 +118,7 @@ std::optional<std::string> EncodeListOfString(mlir::ArrayAttr array) {
   auto ctor = bc::New<bc::Vector<bc::String>>(&allocator, array.size());
 
   for (int i = 0; i < array.size(); ++i) {
-    if (auto string_attr = array[i].dyn_cast<mlir::StringAttr>()) {
+    if (auto string_attr = mlir::dyn_cast<mlir::StringAttr>(array[i])) {
       ctor.ConstructAt(i, string_attr.getValue().str());
     } else {
       return std::nullopt;
diff --git a/tensorflow/compiler/mlir/tfrt/translate/mlrt/mlir_to_bytecode_test.cc b/tensorflow/compiler/mlir/tfrt/translate/mlrt/mlir_to_bytecode_test.cc
index 8214d1d6deb3b3..07f1fbfdb0c0c1 100644
--- a/tensorflow/compiler/mlir/tfrt/translate/mlrt/mlir_to_bytecode_test.cc
+++ b/tensorflow/compiler/mlir/tfrt/translate/mlrt/mlir_to_bytecode_test.cc
@@ -21,6 +21,7 @@ limitations under the License.
 #include <gmock/gmock.h>
 #include "mlir/Dialect/Func/IR/FuncOps.h"  // from @llvm-project
 #include "mlir/Parser/Parser.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/core/tfrt/mlrt/bytecode/executable.h"
 #include "tensorflow/core/tfrt/mlrt/interpreter/attribute_span.h"
 #include "tsl/platform/resource_loader.h"
@@ -299,13 +300,13 @@ class CustomDense {
 
 absl::StatusOr<std::string> EncodeCustomDense(const ModuleEmitterContext&,
                                               mlir::Attribute attr) {
-  auto dense_int_attr = attr.dyn_cast<mlir::DenseIntElementsAttr>();
+  auto dense_int_attr = mlir::dyn_cast<mlir::DenseIntElementsAttr>(attr);
   if (!dense_int_attr)
     return absl::InvalidArgumentError(
         "The element of the custom dense attribute must be an integer.");
 
-  if (dense_int_attr.getElementType().cast<mlir::IntegerType>().getWidth() !=
-      32) {
+  if (mlir::cast<mlir::IntegerType>(dense_int_attr.getElementType())
+          .getWidth() != 32) {
     return absl::InvalidArgumentError(
         "The element of the custom dense attribute must be an i32 integer.");
   }
diff --git a/tensorflow/compiler/mlir/tools/kernel_gen/ir/BUILD b/tensorflow/compiler/mlir/tools/kernel_gen/ir/BUILD
index 42d679c35d0173..2862b79475a930 100644
--- a/tensorflow/compiler/mlir/tools/kernel_gen/ir/BUILD
+++ b/tensorflow/compiler/mlir/tools/kernel_gen/ir/BUILD
@@ -92,6 +92,7 @@ cc_library(
         "@llvm-project//mlir:IR",
         "@llvm-project//mlir:MemRefDialect",
         "@llvm-project//mlir:SideEffectInterfaces",
+        "@llvm-project//mlir:Support",
         "@local_tsl//tsl/protobuf:error_codes_proto_impl_cc",
     ],
 )
diff --git a/tensorflow/compiler/mlir/tools/kernel_gen/ir/tf_framework_ops.cc b/tensorflow/compiler/mlir/tools/kernel_gen/ir/tf_framework_ops.cc
index a3b8c07cc1bb66..ee295c19335ff5 100644
--- a/tensorflow/compiler/mlir/tools/kernel_gen/ir/tf_framework_ops.cc
+++ b/tensorflow/compiler/mlir/tools/kernel_gen/ir/tf_framework_ops.cc
@@ -24,6 +24,7 @@ limitations under the License.
 #include "mlir/Dialect/MemRef/IR/MemRef.h"  // from @llvm-project
 #include "mlir/IR/Builders.h"  // from @llvm-project
 #include "mlir/IR/DialectImplementation.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tools/kernel_gen/ir/tf_status.cc.inc"
 
 // Generated dialect definitions.
@@ -61,11 +62,11 @@ Type TFFrameworkDialect::parseType(DialectAsmParser &parser) const {
 
 /// Print a type registered to this dialect.
 void TFFrameworkDialect::printType(Type type, DialectAsmPrinter &os) const {
-  if (type.isa<OpKernelContextType>()) {
+  if (mlir::isa<OpKernelContextType>(type)) {
     os << "op_kernel_context";
     return;
   }
-  if (type.isa<JITCallableType>()) {
+  if (mlir::isa<JITCallableType>(type)) {
     os << "jit_callable";
     return;
   }
diff --git a/tensorflow/compiler/mlir/tools/kernel_gen/kernel_creator.cc b/tensorflow/compiler/mlir/tools/kernel_gen/kernel_creator.cc
index 277511fed098e0..e863d056b2fb04 100644
--- a/tensorflow/compiler/mlir/tools/kernel_gen/kernel_creator.cc
+++ b/tensorflow/compiler/mlir/tools/kernel_gen/kernel_creator.cc
@@ -52,6 +52,7 @@ limitations under the License.
 #include "mlir/Interfaces/DataLayoutInterfaces.h"  // from @llvm-project
 #include "mlir/Parser/Parser.h"  // from @llvm-project
 #include "mlir/Pass/PassManager.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Target/LLVMIR/Dialect/Builtin/BuiltinToLLVMIRTranslation.h"  // from @llvm-project
 #include "mlir/Target/LLVMIR/Dialect/GPU/GPUToLLVMIRTranslation.h"  // from @llvm-project
@@ -91,7 +92,7 @@ bool IsSmallAlloc(Value alloc) {
   constexpr unsigned kMaximumSizeInBytes = 64;
   constexpr unsigned kMaxRankOfAllocatedMemRef = 1;
 
-  auto type = alloc.getType().dyn_cast<mlir::ShapedType>();
+  auto type = mlir::dyn_cast<mlir::ShapedType>(alloc.getType());
   if (!type || !alloc.getDefiningOp<mlir::memref::AllocOp>()) return false;
   if (!type.hasStaticShape()) {
     // Check if the dynamic shape dimension of the alloc is produced by RankOp
diff --git a/tensorflow/compiler/mlir/tools/kernel_gen/transforms/BUILD b/tensorflow/compiler/mlir/tools/kernel_gen/transforms/BUILD
index d1c3af0b9a6191..489e13d172c059 100644
--- a/tensorflow/compiler/mlir/tools/kernel_gen/transforms/BUILD
+++ b/tensorflow/compiler/mlir/tools/kernel_gen/transforms/BUILD
@@ -39,6 +39,7 @@ cc_library(
         "@llvm-project//mlir:IR",
         "@llvm-project//mlir:LLVMCommonConversion",
         "@llvm-project//mlir:LLVMDialect",
+        "@llvm-project//mlir:Support",
         "@llvm-project//mlir:TransformUtils",
         "@llvm-project//mlir:Transforms",
     ],
@@ -75,6 +76,7 @@ cc_library(
         "@llvm-project//mlir:FuncDialect",
         "@llvm-project//mlir:IR",
         "@llvm-project//mlir:MemRefDialect",
+        "@llvm-project//mlir:Support",
         "@llvm-project//mlir:TransformUtils",
         "@llvm-project//mlir:Transforms",
     ],
diff --git a/tensorflow/compiler/mlir/tools/kernel_gen/transforms/buffer_reuse_pass.cc b/tensorflow/compiler/mlir/tools/kernel_gen/transforms/buffer_reuse_pass.cc
index 37999960cd69e7..45dbbf993bb6be 100644
--- a/tensorflow/compiler/mlir/tools/kernel_gen/transforms/buffer_reuse_pass.cc
+++ b/tensorflow/compiler/mlir/tools/kernel_gen/transforms/buffer_reuse_pass.cc
@@ -29,6 +29,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinOps.h"  // from @llvm-project
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/IR/Operation.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tools/kernel_gen/ir/tf_framework_ops.h"
 #include "tensorflow/compiler/mlir/tools/kernel_gen/transforms/passes.h"
 #include "tensorflow/compiler/mlir/tools/kernel_gen/transforms/rewriters.h"
@@ -115,7 +116,7 @@ class BufferReuseAnalysis {
       // Find reuse candidates for the regarded allocation.
       SmallVector<int32_t, 2> local_reuse_candidates;
       for (BlockArgument old_buffer : arguments) {
-        if (!old_buffer.getType().isa<BaseMemRefType>()) continue;
+        if (!mlir::isa<BaseMemRefType>(old_buffer.getType())) continue;
 
         // Lifetime criterion: Only reuse buffers that are no longer used on
         // first reuse, i.e. they are no longer alive.
@@ -177,15 +178,16 @@ class BufferReuseAnalysis {
   std::vector<Value> get_buffer_arguments(func::FuncOp &f) {
     std::vector<Value> buffer_arguments;
     for (BlockArgument arg : f.getArguments()) {
-      if (arg.getType().isa<BaseMemRefType>()) buffer_arguments.push_back(arg);
+      if (mlir::isa<BaseMemRefType>(arg.getType()))
+        buffer_arguments.push_back(arg);
     }
     return buffer_arguments;
   }
 
   bool can_reuse_locally(Operation *op, Value old_buffer, Value new_buffer) {
     // For now, we support only memrefs with the same memory layout.
-    auto old_buffer_ty = old_buffer.getType().dyn_cast<MemRefType>();
-    auto new_buffer_ty = old_buffer.getType().dyn_cast<MemRefType>();
+    auto old_buffer_ty = mlir::dyn_cast<MemRefType>(old_buffer.getType());
+    auto new_buffer_ty = mlir::dyn_cast<MemRefType>(old_buffer.getType());
     if (!old_buffer_ty || !new_buffer_ty ||
         old_buffer_ty.getLayout() != new_buffer_ty.getLayout())
       return false;
@@ -205,7 +207,7 @@ class BufferReuseAnalysis {
         // Allow dropping dimensions but no permutations.
         int64_t i = -1;
         for (AffineExpr expr : map.getResults()) {
-          auto dim_expr = expr.dyn_cast<AffineDimExpr>();
+          auto dim_expr = mlir::dyn_cast<AffineDimExpr>(expr);
           if (!dim_expr || dim_expr.getPosition() <= i) return false;
           i = dim_expr.getPosition();
         }
diff --git a/tensorflow/compiler/mlir/tools/kernel_gen/transforms/copy_cleanup_pass.cc b/tensorflow/compiler/mlir/tools/kernel_gen/transforms/copy_cleanup_pass.cc
index 32faed506e52b4..9f41b399e2fd7f 100644
--- a/tensorflow/compiler/mlir/tools/kernel_gen/transforms/copy_cleanup_pass.cc
+++ b/tensorflow/compiler/mlir/tools/kernel_gen/transforms/copy_cleanup_pass.cc
@@ -23,6 +23,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/IR/Value.h"  // from @llvm-project
 #include "mlir/Interfaces/SideEffectInterfaces.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tools/kernel_gen/transforms/passes.h"
 
 namespace mlir {
@@ -135,7 +136,7 @@ void RemoveCopyIfTargetIsFunctionArg(func::FuncOp func) {
   Block &body = func.getBody().front();
   for (auto &op : llvm::reverse(body.without_terminator())) {
     if (auto copy = dyn_cast<memref::CopyOp>(op)) {
-      auto block_arg = copy.getTarget().dyn_cast<BlockArgument>();
+      auto block_arg = mlir::dyn_cast<BlockArgument>(copy.getTarget());
       if (!block_arg) break;
       if (!isa<func::FuncOp>(block_arg.getOwner()->getParentOp()) ||
           !block_arg.hasOneUse())
diff --git a/tensorflow/compiler/mlir/tools/kernel_gen/transforms/embed_tf_framework.cc b/tensorflow/compiler/mlir/tools/kernel_gen/transforms/embed_tf_framework.cc
index b7ad2d4d28b129..a6f23f1ad43aa8 100644
--- a/tensorflow/compiler/mlir/tools/kernel_gen/transforms/embed_tf_framework.cc
+++ b/tensorflow/compiler/mlir/tools/kernel_gen/transforms/embed_tf_framework.cc
@@ -21,6 +21,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinOps.h"  // from @llvm-project
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/IR/TypeRange.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Transforms/DialectConversion.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tools/kernel_gen/ir/tf_framework_ops.h"
 #include "tensorflow/compiler/mlir/tools/kernel_gen/transforms/rewriters.h"
@@ -64,7 +65,7 @@ std::optional<Value> FindOpKernelContext(Operation *op) {
     return std::nullopt;
   }
   Value ctx = func.getArgument(0);
-  if (!ctx.getType().isa<OpKernelContextType>()) {
+  if (!mlir::isa<OpKernelContextType>(ctx.getType())) {
     return std::nullopt;
   }
   return ctx;
@@ -114,7 +115,8 @@ struct DeallocOpConverter : public OpConversionPattern<memref::DeallocOp> {
     if (!ctx) return failure();
 
     // Operand with no layout is expected.
-    auto operand_memref_type = dealloc.getMemref().getType().cast<MemRefType>();
+    auto operand_memref_type =
+        mlir::cast<MemRefType>(dealloc.getMemref().getType());
     if (!operand_memref_type.getLayout().isIdentity()) {
       return failure();
     }
diff --git a/tensorflow/compiler/mlir/tools/kernel_gen/transforms/embed_tf_framework_pass.cc b/tensorflow/compiler/mlir/tools/kernel_gen/transforms/embed_tf_framework_pass.cc
index ed1138849e5a06..b5b22008dcb951 100644
--- a/tensorflow/compiler/mlir/tools/kernel_gen/transforms/embed_tf_framework_pass.cc
+++ b/tensorflow/compiler/mlir/tools/kernel_gen/transforms/embed_tf_framework_pass.cc
@@ -20,6 +20,7 @@ limitations under the License.
 #include "mlir/Dialect/Func/IR/FuncOps.h"  // from @llvm-project
 #include "mlir/Dialect/MemRef/IR/MemRef.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Transforms/DialectConversion.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tools/kernel_gen/ir/tf_framework_ops.h"
 #include "tensorflow/compiler/mlir/tools/kernel_gen/transforms/passes.h"
@@ -71,7 +72,7 @@ class EmbedTFFrameworkPass
       }
       FunctionType func_type = op.getFunctionType();
       return func_type.getNumInputs() > 0 &&
-             func_type.getInput(0).isa<OpKernelContextType>();
+             mlir::isa<OpKernelContextType>(func_type.getInput(0));
     });
     target.addDynamicallyLegalOp<cf::AssertOp, memref::AllocOp,
                                  memref::DeallocOp>(IsNotInsideTfEntryFunction);
diff --git a/tensorflow/compiler/mlir/tools/kernel_gen/transforms/same_shape_propagation.cc b/tensorflow/compiler/mlir/tools/kernel_gen/transforms/same_shape_propagation.cc
index a6b24b1a3afcc3..fa6ba2491d5906 100644
--- a/tensorflow/compiler/mlir/tools/kernel_gen/transforms/same_shape_propagation.cc
+++ b/tensorflow/compiler/mlir/tools/kernel_gen/transforms/same_shape_propagation.cc
@@ -217,7 +217,7 @@ class ShapeEqualityKnowledge {
       }
       if (auto alloc = dyn_cast<memref::AllocOp>(op)) {
         SmallVector<ValueOrConst, 4> shape;
-        ShapedType type = alloc.getResult().getType().cast<ShapedType>();
+        ShapedType type = mlir::cast<ShapedType>(alloc.getResult().getType());
         fillShapeFromAllocLike(alloc.getDynamicSizes(), type, shape);
         registerAssociation(ShapeValue{shape}, alloc.getResult());
         return;
@@ -225,7 +225,7 @@ class ShapeEqualityKnowledge {
       if (auto alloc = dyn_cast<tf_framework::TFAllocOp>(op)) {
         // Construct a symbol representing the allocated shape.
         SmallVector<ValueOrConst, 4> shape;
-        ShapedType type = alloc.getResult().getType().cast<ShapedType>();
+        ShapedType type = mlir::cast<ShapedType>(alloc.getResult().getType());
         fillShapeFromAllocLike(alloc.getDynSizes(), type, shape);
         registerAssociation(ShapeValue{shape}, alloc.getResult());
         return;
@@ -331,7 +331,7 @@ struct PropagateShapeKnowledgeToKernels
       // Position of the kernel argument we are currently at.
       int kernel_p = 0;
       for (auto operand : launch.getKernelOperands()) {
-        auto memref = operand.getType().dyn_cast<MemRefType>();
+        auto memref = mlir::dyn_cast<MemRefType>(operand.getType());
         if (!memref) {
           // Scalar argument, advance kernel position by one.
           kernel_p++;
@@ -341,7 +341,7 @@ struct PropagateShapeKnowledgeToKernels
           if (!knowledge.haveSameShape(operand, previous.first)) {
             continue;
           }
-          auto previous_type = previous.first.getType().cast<MemRefType>();
+          auto previous_type = mlir::cast<MemRefType>(previous.first.getType());
           // We use the first equality found and replace uses of corresponding
           // size and (potentially) stride information here.
           auto args_to_replace = memref.getRank();
diff --git a/tensorflow/compiler/mlir/tools/kernel_gen/transforms/tensorflow_abi_knowledge_propagation.cc b/tensorflow/compiler/mlir/tools/kernel_gen/transforms/tensorflow_abi_knowledge_propagation.cc
index 89ecd6da13be74..a7d26813239571 100644
--- a/tensorflow/compiler/mlir/tools/kernel_gen/transforms/tensorflow_abi_knowledge_propagation.cc
+++ b/tensorflow/compiler/mlir/tools/kernel_gen/transforms/tensorflow_abi_knowledge_propagation.cc
@@ -56,7 +56,7 @@ struct PropagateTfAbiKnowledgeToKernelsPass
       // the inner stride is one.
       // TODO(herhut): Insert asserts in debug mode to check this.
       for (auto argument : function.getArguments()) {
-        if (argument.getType().isa<BaseMemRefType>()) {
+        if (mlir::isa<BaseMemRefType>(argument.getType())) {
           worklist.push_back(argument);
           allocated_by_tf_runtime.insert(argument);
           offset_is_zero.insert(argument);
@@ -95,7 +95,7 @@ struct PropagateTfAbiKnowledgeToKernelsPass
       llvm::SmallDenseMap<int64_t, Value> constants;
       auto loc = kernel.getLoc();
       for (auto operand : launch.getKernelOperands()) {
-        auto memref = operand.getType().dyn_cast<MemRefType>();
+        auto memref = mlir::dyn_cast<MemRefType>(operand.getType());
         if (!memref) {
           // Scalar argument, advance kernel position by one.
           kernel_p++;
diff --git a/tensorflow/compiler/mlir/tools/kernel_gen/transforms/tf_framework_legalize_to_llvm.cc b/tensorflow/compiler/mlir/tools/kernel_gen/transforms/tf_framework_legalize_to_llvm.cc
index cffa5e7b44691e..8748b188f35dfa 100644
--- a/tensorflow/compiler/mlir/tools/kernel_gen/transforms/tf_framework_legalize_to_llvm.cc
+++ b/tensorflow/compiler/mlir/tools/kernel_gen/transforms/tf_framework_legalize_to_llvm.cc
@@ -25,6 +25,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinOps.h"  // from @llvm-project
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/IR/Operation.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Transforms/DialectConversion.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tools/kernel_gen/ir/tf_framework_ops.h"
 #include "tensorflow/compiler/mlir/tools/kernel_gen/transforms/rewriters.h"
@@ -96,14 +97,14 @@ class ConvertToLLVMCallOpPattern : public ConvertOpToLLVMPattern<OpTy> {
       Location loc, Type size_ty, Type element_ty,
       std::optional<ArrayAttr> attr,
       ConversionPatternRewriter *rewriter) const {
-    assert(size_ty.isa<IntegerType>() && "expect integer size type");
-    assert(element_ty.isa<IntegerType>() && "expect integer element type");
+    assert(mlir::isa<IntegerType>(size_ty) && "expect integer size type");
+    assert(mlir::isa<IntegerType>(element_ty) && "expect integer element type");
     return ConvertArrayAttrToStackAllocatedArray(
         loc, size_ty, element_ty, attr, rewriter, [&](Attribute attr) {
           return rewriter->create<LLVM::ConstantOp>(
               loc, element_ty,
               rewriter->getIntegerAttr(element_ty,
-                                       attr.cast<IntegerAttr>().getInt()));
+                                       mlir::cast<IntegerAttr>(attr).getInt()));
         });
   }
 };
@@ -227,7 +228,7 @@ class TFDeallocOpConverter : public ConvertToLLVMCallOpPattern<TFDeallocOp> {
       TFDeallocOp op, OpAdaptor adaptor,
       ConversionPatternRewriter &rewriter) const override {
     // TODO(herhut) Support unranked memrefs.
-    if (!op.getMemref().getType().isa<MemRefType>()) return failure();
+    if (!mlir::isa<MemRefType>(op.getMemref().getType())) return failure();
     MemRefDescriptor memref(adaptor.getMemref());
 
     Value allocated_bytes_ptr = memref.allocatedPtr(rewriter, op.getLoc());
@@ -429,7 +430,7 @@ class ReportErrorOpConverter
     std::string err_str;
     llvm::raw_string_ostream err_stream(err_str);
     err_stream << message;
-    if (!loc.isa<UnknownLoc>()) {
+    if (!mlir::isa<UnknownLoc>(loc)) {
       err_stream << " at ";
       loc.print(err_stream);
     }
@@ -465,16 +466,18 @@ class NullMemRefOpConverter : public ConvertOpToLLVMPattern<NullMemRefOp> {
     MLIRContext *ctx = null_memref_op.getContext();
     mlir::Operation *op = null_memref_op.getOperation();
 
-    auto shaped_result_type = null_memref_op.getType().cast<BaseMemRefType>();
-    auto mem_space =
-        shaped_result_type.getMemorySpace().dyn_cast_or_null<IntegerAttr>();
+    auto shaped_result_type =
+        mlir::cast<BaseMemRefType>(null_memref_op.getType());
+    auto mem_space = mlir::dyn_cast_or_null<IntegerAttr>(
+        shaped_result_type.getMemorySpace());
     unsigned address_space =
         static_cast<unsigned>(mem_space ? mem_space.getInt() : 0);
     LLVM::LLVMPointerType llvm_ptr_type =
         LLVM::LLVMPointerType::get(ctx, address_space);
 
     Value zero = createIndexAttrConstant(rewriter, loc, getIndexType(), 0);
-    if (auto result_type = null_memref_op.getType().dyn_cast<MemRefType>()) {
+    if (auto result_type =
+            mlir::dyn_cast<MemRefType>(null_memref_op.getType())) {
       // Set all dynamic sizes to 1 and compute fake strides.
       SmallVector<Value, 4> dyn_sizes(
           result_type.getNumDynamicDims(),
@@ -497,7 +500,7 @@ class NullMemRefOpConverter : public ConvertOpToLLVMPattern<NullMemRefOp> {
       return success();
     }
 
-    auto result_type = null_memref_op.getType().cast<UnrankedMemRefType>();
+    auto result_type = mlir::cast<UnrankedMemRefType>(null_memref_op.getType());
     Type llvm_result_type = type_converter.convertType(result_type);
 
     auto desc =
@@ -506,7 +509,7 @@ class NullMemRefOpConverter : public ConvertOpToLLVMPattern<NullMemRefOp> {
 
     // Extract address space and element type.
     auto targetType =
-        null_memref_op.getResult().getType().cast<UnrankedMemRefType>();
+        mlir::cast<UnrankedMemRefType>(null_memref_op.getResult().getType());
     unsigned addressSpace =
         *getTypeConverter()->getMemRefAddressSpace(targetType);
 
@@ -549,7 +552,7 @@ class IsValidMemRefOpConverter
     MemRefDescriptor desc(adaptor.getArg());
 
     // Compare every size in the descriptor to 0 to check num_elements == 0.
-    int64_t rank = op.getArg().getType().cast<MemRefType>().getRank();
+    int64_t rank = mlir::cast<MemRefType>(op.getArg().getType()).getRank();
     Value is_empty_shape = rewriter.create<LLVM::ConstantOp>(
         loc, rewriter.getI1Type(), rewriter.getBoolAttr(false));
     Value zero = createIndexAttrConstant(rewriter, loc, getIndexType(), 0);
diff --git a/tensorflow/compiler/mlir/tosa/transforms/convert_tfl_uint8.cc b/tensorflow/compiler/mlir/tosa/transforms/convert_tfl_uint8.cc
index 350d9e47545fb0..6523824611a603 100644
--- a/tensorflow/compiler/mlir/tosa/transforms/convert_tfl_uint8.cc
+++ b/tensorflow/compiler/mlir/tosa/transforms/convert_tfl_uint8.cc
@@ -39,6 +39,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/IR/PatternMatch.h"  // from @llvm-project
 #include "mlir/Pass/PassRegistry.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/lite/ir/tfl_ops.h"
@@ -90,7 +91,7 @@ struct ConvertUint8QConstOp : public RewritePattern {
     }
 
     mlir::DenseElementsAttr src_dense_attr =
-        tfl_qconst_op.getValue().cast<DenseElementsAttr>();
+        mlir::cast<DenseElementsAttr>(tfl_qconst_op.getValue());
 
     double type_range_min =
         static_cast<double>(output_element_type.getStorageTypeMin() -
diff --git a/tensorflow/compiler/mlir/tosa/transforms/dequantize_tfl_softmax.cc b/tensorflow/compiler/mlir/tosa/transforms/dequantize_tfl_softmax.cc
index b64e4eda6d5e37..ba194e3e81c964 100644
--- a/tensorflow/compiler/mlir/tosa/transforms/dequantize_tfl_softmax.cc
+++ b/tensorflow/compiler/mlir/tosa/transforms/dequantize_tfl_softmax.cc
@@ -19,6 +19,7 @@ limitations under the License.
 #include "mlir/Dialect/Quant/QuantTypes.h"  // from @llvm-project
 #include "mlir/IR/MLIRContext.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/lite/ir/tfl_ops.h"
@@ -52,8 +53,8 @@ LogicalResult TosaDequantizeTFLSoftmaxPattern::matchAndRewrite(
     Operation* op, PatternRewriter& rewriter) const {
   TFL::SoftmaxOp tfl_softmax_op = cast<TFL::SoftmaxOp>(op);
   RankedTensorType input_type =
-      tfl_softmax_op.getInput().getType().cast<RankedTensorType>();
-  if (!input_type.getElementType().isa<mlir::quant::QuantizedType>()) {
+      mlir::cast<RankedTensorType>(tfl_softmax_op.getInput().getType());
+  if (!mlir::isa<mlir::quant::QuantizedType>(input_type.getElementType())) {
     return failure();
   }
   Location loc = tfl_softmax_op.getLoc();
diff --git a/tensorflow/compiler/mlir/tosa/transforms/fuse_bias_tf.cc b/tensorflow/compiler/mlir/tosa/transforms/fuse_bias_tf.cc
index efee9aa9e9b9c2..ff07b9d6f91039 100644
--- a/tensorflow/compiler/mlir/tosa/transforms/fuse_bias_tf.cc
+++ b/tensorflow/compiler/mlir/tosa/transforms/fuse_bias_tf.cc
@@ -27,6 +27,7 @@ limitations under the License.
 #include "mlir/Dialect/Tosa/IR/TosaOps.h"  // from @llvm-project
 #include "mlir/IR/MLIRContext.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/lite/quantization/ir/QuantOps.h"
@@ -80,7 +81,7 @@ LogicalResult ConvertTFBiasAddOp::matchAndRewrite(
 
   auto value = tf_biasadd_op.getValue();
   auto bias = tf_biasadd_op.getBias();
-  auto bias_shape = bias.getType().cast<RankedTensorType>().getShape();
+  auto bias_shape = mlir::cast<RankedTensorType>(bias.getType()).getShape();
   if (bias_shape.size() != 1) {
     return rewriter.notifyMatchFailure(op, "bias tensor must be rank 1");
   }
@@ -89,7 +90,8 @@ LogicalResult ConvertTFBiasAddOp::matchAndRewrite(
           llvm::dyn_cast_if_present<TF::Conv2DOp>(value.getDefiningOp())) {
     // Sanity check to confirm rhs() has the expected shape of bias
     auto filter_shape =
-        tf_conv2d_op.getFilter().getType().cast<RankedTensorType>().getShape();
+        mlir::cast<RankedTensorType>(tf_conv2d_op.getFilter().getType())
+            .getShape();
 
     // Assume the filter shape is [H, W, I, O]
     if (filter_shape.back() != bias_shape.back()) {
@@ -114,7 +116,8 @@ LogicalResult ConvertTFBiasAddOp::matchAndRewrite(
           llvm::dyn_cast_if_present<TF::Conv3DOp>(value.getDefiningOp())) {
     // Sanity check to confirm rhs() has the expected shape of bias
     auto filter_shape =
-        tf_conv3d_op.getFilter().getType().cast<RankedTensorType>().getShape();
+        mlir::cast<RankedTensorType>(tf_conv3d_op.getFilter().getType())
+            .getShape();
 
     // Assume the filter shape is [D, H, W, I, O]
     if (filter_shape.back() != bias_shape.back()) {
diff --git a/tensorflow/compiler/mlir/tosa/transforms/legalize_common.cc b/tensorflow/compiler/mlir/tosa/transforms/legalize_common.cc
index 3b461b8b36ae42..7b631ff418056e 100644
--- a/tensorflow/compiler/mlir/tosa/transforms/legalize_common.cc
+++ b/tensorflow/compiler/mlir/tosa/transforms/legalize_common.cc
@@ -56,6 +56,7 @@ limitations under the License.
 #include "mlir/IR/PatternMatch.h"  // from @llvm-project
 #include "mlir/IR/TypeUtilities.h"  // from @llvm-project
 #include "mlir/IR/Value.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/utils/dynamic_shape_utils.h"
 #include "tensorflow/compiler/mlir/tosa/transforms/legalize_utils.h"
 
@@ -571,7 +572,7 @@ std::optional<Value> convertZerosLikeOp(PatternRewriter& rewriter,
   Attribute zero_attr = rewriter.getZeroAttr(zero_type);
 
   return CreateOpAndInfer<tosa::ConstOp>(rewriter, op->getLoc(), zero_type,
-                                         zero_attr.cast<ElementsAttr>())
+                                         mlir::cast<ElementsAttr>(zero_attr))
       .getResult();
 }
 
@@ -586,12 +587,12 @@ std::optional<Value> convertMultiplyOp(PatternRewriter& rewriter, Operation* op,
   // Not a shaped tensor output
   if (!input_lhs_type || !input_rhs_type || !output_type) return std::nullopt;
 
-  bool input_lhs_is_qtype =
-      input_lhs_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
-  bool input_rhs_is_qtype =
-      input_rhs_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
-  bool output_is_qtype =
-      output_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
+  bool input_lhs_is_qtype = mlir::isa<mlir::quant::UniformQuantizedType>(
+      input_lhs_type.getElementType());
+  bool input_rhs_is_qtype = mlir::isa<mlir::quant::UniformQuantizedType>(
+      input_rhs_type.getElementType());
+  bool output_is_qtype = mlir::isa<mlir::quant::UniformQuantizedType>(
+      output_type.getElementType());
 
   if (input_lhs_is_qtype != output_is_qtype ||
       input_rhs_is_qtype != output_is_qtype) {
@@ -603,12 +604,12 @@ std::optional<Value> convertMultiplyOp(PatternRewriter& rewriter, Operation* op,
 
   if (output_is_qtype) {
     ShapedType rescale_type = output_type.clone(rewriter.getI32Type());
-    auto input_lhs_qtype = input_lhs_type.getElementType()
-                               .cast<mlir::quant::UniformQuantizedType>();
-    auto input_rhs_qtype = input_rhs_type.getElementType()
-                               .cast<mlir::quant::UniformQuantizedType>();
-    auto output_qtype =
-        output_type.getElementType().cast<mlir::quant::UniformQuantizedType>();
+    auto input_lhs_qtype = mlir::cast<mlir::quant::UniformQuantizedType>(
+        input_lhs_type.getElementType());
+    auto input_rhs_qtype = mlir::cast<mlir::quant::UniformQuantizedType>(
+        input_rhs_type.getElementType());
+    auto output_qtype = mlir::cast<mlir::quant::UniformQuantizedType>(
+        output_type.getElementType());
 
     // MLIR store scale as double, but TFLite store scale as float
     // Downcasting from double to float to match TFLite behavior
@@ -661,11 +662,11 @@ std::optional<Value> convertSquaredDifferenceOp(PatternRewriter& rewriter,
   }
 
   bool x_is_qtype =
-      x_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
+      mlir::isa<mlir::quant::UniformQuantizedType>(x_type.getElementType());
   bool y_is_qtype =
-      y_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
-  bool result_is_qtype =
-      result_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
+      mlir::isa<mlir::quant::UniformQuantizedType>(y_type.getElementType());
+  bool result_is_qtype = mlir::isa<mlir::quant::UniformQuantizedType>(
+      result_type.getElementType());
 
   if (x_is_qtype != result_is_qtype || y_is_qtype != result_is_qtype) {
     (void)rewriter.notifyMatchFailure(
@@ -678,11 +679,11 @@ std::optional<Value> convertSquaredDifferenceOp(PatternRewriter& rewriter,
   // Then scale back to I8
   if (result_is_qtype) {
     auto x_qtype =
-        x_type.getElementType().cast<mlir::quant::UniformQuantizedType>();
+        mlir::cast<mlir::quant::UniformQuantizedType>(x_type.getElementType());
     auto y_qtype =
-        y_type.getElementType().cast<mlir::quant::UniformQuantizedType>();
-    auto result_qtype =
-        result_type.getElementType().cast<mlir::quant::UniformQuantizedType>();
+        mlir::cast<mlir::quant::UniformQuantizedType>(y_type.getElementType());
+    auto result_qtype = mlir::cast<mlir::quant::UniformQuantizedType>(
+        result_type.getElementType());
 
     uint32_t result_bits = result_qtype.getStorageTypeIntegralWidth();
 
@@ -779,16 +780,16 @@ std::optional<Value> convertConcatV2Op(PatternRewriter& rewriter, Operation* op,
   }
 
   mlir::quant::UniformQuantizedType result_quant_type =
-      result_type.getElementType()
-          .dyn_cast_or_null<mlir::quant::UniformQuantizedType>();
+      mlir::dyn_cast_or_null<mlir::quant::UniformQuantizedType>(
+          result_type.getElementType());
 
   SmallVector<Value> values_rescaled;
 
   for (auto v : values) {
     RankedTensorType operand_type = dyn_cast<RankedTensorType>(v.getType());
     mlir::quant::UniformQuantizedType operand_quant_type =
-        operand_type.getElementType()
-            .dyn_cast_or_null<mlir::quant::UniformQuantizedType>();
+        mlir::dyn_cast_or_null<mlir::quant::UniformQuantizedType>(
+            operand_type.getElementType());
 
     // tfl.concat currently allows different scales for each input tensor, which
     // TFlite team will fix in:
@@ -818,7 +819,8 @@ std::optional<Value> convertConcatV2Op(PatternRewriter& rewriter, Operation* op,
     }
   }
 
-  int32_t tensor_rank = values[0].getType().cast<RankedTensorType>().getRank();
+  int32_t tensor_rank =
+      mlir::cast<RankedTensorType>(values[0].getType()).getRank();
 
   if (axis < 0) axis += tensor_rank;
   if ((axis < 0) || (axis > tensor_rank)) {
@@ -1046,7 +1048,8 @@ std::optional<Value> convertSpaceToBatchNDOp(PatternRewriter& rewriter,
   //  [padded_shape[M] / block_shape[M-1]] +
   //  remaining_shape
   int32_t a2_reshape_a1_rank =
-      a2_reshape_a1_op.getResult().getType().cast<RankedTensorType>().getRank();
+      mlir::cast<RankedTensorType>(a2_reshape_a1_op.getResult().getType())
+          .getRank();
   SmallVector<int32_t> a3_perm(a2_reshape_a1_rank);
   SmallVector<int64_t> a3_transpose_shape(a2_reshape_a1_rank);
 
@@ -1579,17 +1582,19 @@ std::optional<Value> convertSoftmaxOp(PatternRewriter& rewriter, Operation* op,
   int32_t input_rank = input_type.getShape().size();
   ArrayRef<int64_t> logits_shape = output_type.getShape();
 
-  if (input_type.getElementType().isa<mlir::quant::QuantizedType>() &&
-      output_type.getElementType().isa<mlir::quant::QuantizedType>()) {
+  if (mlir::isa<mlir::quant::QuantizedType>(input_type.getElementType()) &&
+      mlir::isa<mlir::quant::QuantizedType>(output_type.getElementType())) {
     SmallVector<int64_t> rsum_shape_v(input_type.getShape().begin(),
                                       input_type.getShape().end() - 1);
     rsum_shape_v.push_back(1);
     ArrayRef<int64_t> rsum_shape(rsum_shape_v);
     // The if condition already checks if these are UQTs
     mlir::quant::UniformQuantizedType in_quant_type =
-        input_type.getElementType().cast<mlir::quant::UniformQuantizedType>();
+        mlir::cast<mlir::quant::UniformQuantizedType>(
+            input_type.getElementType());
     mlir::quant::UniformQuantizedType out_quant_type =
-        output_type.getElementType().cast<mlir::quant::UniformQuantizedType>();
+        mlir::cast<mlir::quant::UniformQuantizedType>(
+            output_type.getElementType());
 
     auto int16_element_qtype = mlir::quant::UniformQuantizedType::get(
         true, rewriter.getIntegerType(16), rewriter.getF32Type(), 1.0f, 0,
@@ -2005,11 +2010,11 @@ std::optional<Value> convertLogSoftmaxOp(PatternRewriter& rewriter,
   }
 
   mlir::quant::UniformQuantizedType in_quant_type =
-      input_type.getElementType()
-          .dyn_cast_or_null<mlir::quant::UniformQuantizedType>();
+      mlir::dyn_cast_or_null<mlir::quant::UniformQuantizedType>(
+          input_type.getElementType());
   mlir::quant::UniformQuantizedType out_quant_type =
-      output_type.getElementType()
-          .dyn_cast_or_null<mlir::quant::UniformQuantizedType>();
+      mlir::dyn_cast_or_null<mlir::quant::UniformQuantizedType>(
+          output_type.getElementType());
   if (in_quant_type || out_quant_type) {
     (void)rewriter.notifyMatchFailure(
         op, "quantized log_softmax lowering not implemented yet");
@@ -2271,7 +2276,8 @@ std::optional<SmallVector<Value>> convertSplitOp(
             tensorflow::ConvertMlirShapeToTF(new_shape)));
   }
 
-  RankedTensorType slice_type = slice_value.getType().cast<RankedTensorType>();
+  RankedTensorType slice_type =
+      mlir::cast<RankedTensorType>(slice_value.getType());
   assert((slice_type.getDimSize(axis) % num_split) == 0);
 
   // Each slice has a different beginning point.
@@ -2442,7 +2448,7 @@ std::optional<Value> convertStridedSliceOp(
   // Limitations:
   // * This implementation only supports ellipsis_mask=0 for now
   auto input_type = dyn_cast<RankedTensorType>(input_value.getType());
-  ShapedType result_type = result_value.getType().cast<ShapedType>();
+  ShapedType result_type = mlir::cast<ShapedType>(result_value.getType());
 
   if (ellipsis_mask != 0) {
     (void)rewriter.notifyMatchFailure(op, "ellipses mask not supported yet");
@@ -2586,7 +2592,7 @@ std::optional<Value> convertStridedSliceOp(
   if (all_strides_one) {
     auto reversed =
         reverseNegativeStride(rewriter, op, a1_slice_op.getResult(), strides);
-    auto shape = reversed.getType().cast<RankedTensorType>().getShape();
+    auto shape = mlir::cast<RankedTensorType>(reversed.getType()).getShape();
 
     SmallVector<int64_t> new_shape;
     for (int i = 0; i < input_rank; ++i) {
@@ -2684,7 +2690,7 @@ std::optional<Value> convertFloorDivOp(PatternRewriter& rewriter, Operation* op,
 
   Type element_type = output_type.getElementType();
 
-  if (element_type.isa<IntegerType>()) {
+  if (mlir::isa<IntegerType>(element_type)) {
     return CreateOpAndInfer<tosa::DivOp>(rewriter, op->getLoc(), output_type,
                                          lhs_value, rhs_value)
         .getResult();
@@ -2738,14 +2744,14 @@ std::optional<Value> convertFusedActivation(PatternRewriter& rewriter,
   if (!input_type) return std::nullopt;
 
   bool input_is_qtype =
-      input_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
+      mlir::isa<mlir::quant::UniformQuantizedType>(input_type.getElementType());
 
   if (input_is_qtype) {
     // We can always make output/input tensor's scale/zp always be the same
     // when legalizing fused_activation_function, as it's generated during
     // legalization.
-    auto input_qtype =
-        input_type.getElementType().cast<mlir::quant::UniformQuantizedType>();
+    auto input_qtype = mlir::cast<mlir::quant::UniformQuantizedType>(
+        input_type.getElementType());
 
     if (fused_activation_fn.getValue() == "NONE") {
       return input_value;
@@ -3079,9 +3085,9 @@ std::optional<Value> convertReduceProdOp(PatternRewriter& rewriter,
   if (!input_type) return std::nullopt;
 
   bool input_is_qtype =
-      input_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
-  bool output_is_qtype =
-      output_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
+      mlir::isa<mlir::quant::UniformQuantizedType>(input_type.getElementType());
+  bool output_is_qtype = mlir::isa<mlir::quant::UniformQuantizedType>(
+      output_type.getElementType());
 
   if (input_is_qtype || output_is_qtype) {
     (void)rewriter.notifyMatchFailure(
@@ -3105,9 +3111,9 @@ std::optional<Value> convertReduceSumOp(PatternRewriter& rewriter,
   if (!input_type) return std::nullopt;
 
   bool input_is_qtype =
-      input_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
-  bool output_is_qtype =
-      output_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
+      mlir::isa<mlir::quant::UniformQuantizedType>(input_type.getElementType());
+  bool output_is_qtype = mlir::isa<mlir::quant::UniformQuantizedType>(
+      output_type.getElementType());
 
   if (input_is_qtype != output_is_qtype) {
     (void)rewriter.notifyMatchFailure(
@@ -3123,10 +3129,10 @@ std::optional<Value> convertReduceSumOp(PatternRewriter& rewriter,
   Type reduce_element_type = input_type.getElementType();
 
   if (input_is_qtype) {
-    auto input_qtype =
-        input_type.getElementType().cast<mlir::quant::UniformQuantizedType>();
-    auto output_qtype =
-        output_type.getElementType().cast<mlir::quant::UniformQuantizedType>();
+    auto input_qtype = mlir::cast<mlir::quant::UniformQuantizedType>(
+        input_type.getElementType());
+    auto output_qtype = mlir::cast<mlir::quant::UniformQuantizedType>(
+        output_type.getElementType());
 
     int32_t input_shift = 20;
 
@@ -3164,9 +3170,9 @@ std::optional<Value> convertReduceMeanOp(PatternRewriter& rewriter,
   if (!input_type) return std::nullopt;
 
   bool input_is_qtype =
-      input_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
-  bool output_is_qtype =
-      output_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
+      mlir::isa<mlir::quant::UniformQuantizedType>(input_type.getElementType());
+  bool output_is_qtype = mlir::isa<mlir::quant::UniformQuantizedType>(
+      output_type.getElementType());
 
   if (input_is_qtype != output_is_qtype) {
     (void)rewriter.notifyMatchFailure(
@@ -3176,7 +3182,8 @@ std::optional<Value> convertReduceMeanOp(PatternRewriter& rewriter,
   }
 
   // Only supports float type mean() if it's non-quantized
-  if (!input_is_qtype && !output_type.getElementType().isa<mlir::FloatType>()) {
+  if (!input_is_qtype &&
+      !mlir::isa<mlir::FloatType>(output_type.getElementType())) {
     op->emitWarning("input unquantized type but output element not FloatType");
     return std::nullopt;
   }
@@ -3206,10 +3213,10 @@ std::optional<Value> convertReduceMeanOp(PatternRewriter& rewriter,
   int32_t output_scale_shift = 0;
 
   if (input_is_qtype) {
-    auto input_qtype =
-        input_type.getElementType().cast<mlir::quant::UniformQuantizedType>();
-    auto output_qtype =
-        output_type.getElementType().cast<mlir::quant::UniformQuantizedType>();
+    auto input_qtype = mlir::cast<mlir::quant::UniformQuantizedType>(
+        input_type.getElementType());
+    auto output_qtype = mlir::cast<mlir::quant::UniformQuantizedType>(
+        output_type.getElementType());
 
     const int32_t scale_width = 32;
     computeMultiplierAndShift(1.0f, input_scale_multiplier, input_scale_shift,
@@ -3275,9 +3282,9 @@ std::optional<Value> convertResizeOp(PatternRewriter& rewriter, Operation* op,
   }
 
   bool input_is_qtype =
-      input_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
-  bool output_is_qtype =
-      output_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
+      mlir::isa<mlir::quant::UniformQuantizedType>(input_type.getElementType());
+  bool output_is_qtype = mlir::isa<mlir::quant::UniformQuantizedType>(
+      output_type.getElementType());
 
   if (input_is_qtype != output_is_qtype) {
     (void)rewriter.notifyMatchFailure(
@@ -3287,7 +3294,7 @@ std::optional<Value> convertResizeOp(PatternRewriter& rewriter, Operation* op,
   }
 
   if (!input_is_qtype) {
-    if (!input_type.getElementType().isa<mlir::FloatType>()) {
+    if (!mlir::isa<mlir::FloatType>(input_type.getElementType())) {
       (void)rewriter.notifyMatchFailure(
           op, "only quantized or float types supported");
       return std::nullopt;
@@ -3406,8 +3413,8 @@ std::optional<Value> convertResizeOp(PatternRewriter& rewriter, Operation* op,
     // If quantized bilinear mode, need to lower to RESIZE + RESCALE pair.
     if (is_bilinear) {
       RankedTensorType output_acc_type;
-      auto input_element_qtype =
-          input_type.getElementType().cast<mlir::quant::UniformQuantizedType>();
+      auto input_element_qtype = mlir::cast<mlir::quant::UniformQuantizedType>(
+          input_type.getElementType());
 
       bool is_scale32;
 
@@ -3505,7 +3512,7 @@ std::optional<Value> convertQuantizeOp(PatternRewriter& rewriter, Operation* op,
   auto output_element_type = output_type.getElementType();
 
   // output element type could only be quantized integer
-  if (!output_element_type.isa<mlir::quant::QuantizedType>()) {
+  if (!mlir::isa<mlir::quant::QuantizedType>(output_element_type)) {
     (void)rewriter.notifyMatchFailure(
         op, "lowering quantizeOp but output element type not quantized");
     return std::nullopt;
@@ -3546,7 +3553,7 @@ std::optional<Value> convertDequantizeOp(PatternRewriter& rewriter,
   if (!input_type) return std::nullopt;
 
   // input element type could only be quantized integer
-  if (!input_type.getElementType().isa<mlir::quant::QuantizedType>())
+  if (!mlir::isa<mlir::quant::QuantizedType>(input_type.getElementType()))
     return std::nullopt;
 
   std::optional<Value> zp_val;
@@ -3839,8 +3846,8 @@ std::optional<Value> convertTFConv2DCommon(
       stride = rewriter.getDenseI64ArrayAttr({1, 1});
     } else {
       // Note: hardcoded to NHWC for now
-      int64_t stride_h = strides_attr[1].cast<IntegerAttr>().getInt();
-      int64_t stride_w = strides_attr[2].cast<IntegerAttr>().getInt();
+      int64_t stride_h = mlir::cast<IntegerAttr>(strides_attr[1]).getInt();
+      int64_t stride_w = mlir::cast<IntegerAttr>(strides_attr[2]).getInt();
       stride = rewriter.getDenseI64ArrayAttr({stride_h, stride_w});
     }
   }
@@ -3849,8 +3856,8 @@ std::optional<Value> convertTFConv2DCommon(
       dilation = rewriter.getDenseI64ArrayAttr({1, 1});
     } else {
       // Note: hardcoded to NHWC for now
-      int64_t dilation_h = dilations_attr[1].cast<IntegerAttr>().getInt();
-      int64_t dilation_w = dilations_attr[2].cast<IntegerAttr>().getInt();
+      int64_t dilation_h = mlir::cast<IntegerAttr>(dilations_attr[1]).getInt();
+      int64_t dilation_w = mlir::cast<IntegerAttr>(dilations_attr[2]).getInt();
       dilation = rewriter.getDenseI64ArrayAttr({dilation_h, dilation_w});
     }
   }
@@ -3915,8 +3922,8 @@ std::optional<Value> convertConv3DCommon(PatternRewriter& rewriter,
 
   DenseI64ArrayAttr strides_attr = rewriter.getDenseI64ArrayAttr(strides);
   DenseI64ArrayAttr dilations_attr = rewriter.getDenseI64ArrayAttr(dilations);
-  RankedTensorType input_type = input.getType().cast<RankedTensorType>();
-  RankedTensorType filter_type = filter.getType().cast<RankedTensorType>();
+  RankedTensorType input_type = mlir::cast<RankedTensorType>(input.getType());
+  RankedTensorType filter_type = mlir::cast<RankedTensorType>(filter.getType());
 
   DenseI64ArrayAttr pads_attr;
   if (!getPaddingValuesFromPadType(tf_pad, data_format_tf, 0, input_type,
@@ -3963,9 +3970,9 @@ std::optional<Value> convertTFConv3DCommon(
     // Defaults to [1, 1, 1].
     strides = {1, 1, 1};
   } else {
-    int64_t stride_d = strides_attr[1].cast<IntegerAttr>().getInt();
-    int64_t stride_h = strides_attr[2].cast<IntegerAttr>().getInt();
-    int64_t stride_w = strides_attr[3].cast<IntegerAttr>().getInt();
+    int64_t stride_d = mlir::cast<IntegerAttr>(strides_attr[1]).getInt();
+    int64_t stride_h = mlir::cast<IntegerAttr>(strides_attr[2]).getInt();
+    int64_t stride_w = mlir::cast<IntegerAttr>(strides_attr[3]).getInt();
     strides = {stride_d, stride_h, stride_w};
   }
 
@@ -3974,9 +3981,9 @@ std::optional<Value> convertTFConv3DCommon(
     // Defaults to [1, 1, 1].
     dilations = {1, 1, 1};
   } else {
-    int64_t dilation_d = dilations_attr[1].cast<IntegerAttr>().getInt();
-    int64_t dilation_h = dilations_attr[2].cast<IntegerAttr>().getInt();
-    int64_t dilation_w = dilations_attr[3].cast<IntegerAttr>().getInt();
+    int64_t dilation_d = mlir::cast<IntegerAttr>(dilations_attr[1]).getInt();
+    int64_t dilation_h = mlir::cast<IntegerAttr>(dilations_attr[2]).getInt();
+    int64_t dilation_w = mlir::cast<IntegerAttr>(dilations_attr[3]).getInt();
     dilations = {dilation_d, dilation_h, dilation_w};
   }
 
@@ -4686,7 +4693,7 @@ std::optional<Value> convertSinOp(PatternRewriter& rewriter, Operation* op,
 std::optional<Value> convertSignOp(PatternRewriter& rewriter, Operation* op,
                                    Value input, RankedTensorType output_type) {
   auto output_elem_type = output_type.getElementType();
-  if (output_elem_type.isa<mlir::quant::QuantizedType>()) {
+  if (mlir::isa<mlir::quant::QuantizedType>(output_elem_type)) {
     (void)rewriter.notifyMatchFailure(op, "tfl quantization not yet supported");
     return std::nullopt;
   }
@@ -4695,7 +4702,7 @@ std::optional<Value> convertSignOp(PatternRewriter& rewriter, Operation* op,
   // one element.
   Value pos_one, neg_one, zero;
   ImplicitLocOpBuilder builder(op->getLoc(), rewriter);
-  if (output_elem_type.isa<FloatType>()) {
+  if (mlir::isa<FloatType>(output_elem_type)) {
     pos_one = getTosaConstTensorSingleF32(rewriter, op, 1.0f);
     neg_one = getTosaConstTensorSingleF32(rewriter, op, -1.0f);
     zero = getTosaConstTensorSingleF32(rewriter, op, 0.0f);
@@ -4733,7 +4740,7 @@ std::optional<Value> convertBroadcastToOp(PatternRewriter& rewriter,
   }
 
   Type element_type = input_type.getElementType();
-  if (element_type.isa<ComplexType>()) {
+  if (mlir::isa<ComplexType>(element_type)) {
     (void)rewriter.notifyMatchFailure(op, "input element type is complex");
     return std::nullopt;
   }
@@ -4816,7 +4823,7 @@ std::optional<Value> convertBroadcastToOp(PatternRewriter& rewriter,
   RankedTensorType output_type =
       tensorflow::GetTypeFromTFTensorShape(new_shape, element_type);
 
-  if (element_type.isa<FloatType>()) {
+  if (mlir::isa<FloatType>(element_type)) {
     // F32: legalize to broadcastable Add with (-0.f), instead of 0.f.
     // This is to preserve original values:
     // for corner case where x = -0.f
diff --git a/tensorflow/compiler/mlir/tosa/transforms/legalize_tf.cc b/tensorflow/compiler/mlir/tosa/transforms/legalize_tf.cc
index 0ab48cc417fc98..10be9422c60762 100644
--- a/tensorflow/compiler/mlir/tosa/transforms/legalize_tf.cc
+++ b/tensorflow/compiler/mlir/tosa/transforms/legalize_tf.cc
@@ -257,7 +257,7 @@ LogicalResult ConvertTFSignOp::matchAndRewrite(
   auto tf_sign_op = cast<TF::SignOp>(op);
 
   RankedTensorType output_type =
-      tf_sign_op.getResult().getType().cast<RankedTensorType>();
+      mlir::cast<RankedTensorType>(tf_sign_op.getResult().getType());
 
   std::optional<Value> result =
       convertSignOp(rewriter, op, tf_sign_op.getX(), output_type);
@@ -270,7 +270,8 @@ LogicalResult ConvertTFSignOp::matchAndRewrite(
 LogicalResult ConvertTFSinOp::matchAndRewrite(Operation* op,
                                               PatternRewriter& rewriter) const {
   auto tf_sin_op = cast<TF::SinOp>(op);
-  ShapedType output_type = tf_sin_op.getResult().getType().cast<ShapedType>();
+  ShapedType output_type =
+      mlir::cast<ShapedType>(tf_sin_op.getResult().getType());
 
   std::optional<Value> result =
       convertSinOp(rewriter, op, tf_sin_op.getX(), output_type);
@@ -289,8 +290,8 @@ LogicalResult ConvertTFCosOp::matchAndRewrite(Operation* op,
 
   if (!input_ty || !output_ty) return failure();
 
-  bool input_is_fp = input_ty.getElementType().isa<mlir::FloatType>();
-  bool output_is_fp = output_ty.getElementType().isa<mlir::FloatType>();
+  bool input_is_fp = mlir::isa<mlir::FloatType>(input_ty.getElementType());
+  bool output_is_fp = mlir::isa<mlir::FloatType>(output_ty.getElementType());
 
   if (!input_is_fp || !output_is_fp) {
     return rewriter.notifyMatchFailure(
@@ -427,7 +428,7 @@ LogicalResult ConvertTFRoundOp::matchAndRewrite(
     return rewriter.notifyMatchFailure(op, "input not tensor type");
   }
 
-  if (input_type.getElementType().isa<FloatType>()) {
+  if (mlir::isa<FloatType>(input_type.getElementType())) {
     std::optional<Value> result = convertRoundOp(
         rewriter, op, tf_round_op.getResult(), tf_round_op.getX());
 
@@ -519,7 +520,7 @@ LogicalResult ConvertTFRealDivOp::matchAndRewrite(
 
   Type element_type = output_type.getElementType();
 
-  if (element_type.isa<IntegerType>()) {
+  if (mlir::isa<IntegerType>(element_type)) {
     CreateReplaceOpAndInfer<tosa::DivOp>(rewriter, op, output_type,
                                          tf_div_op.getX(), tf_div_op.getY());
     return success();
@@ -717,7 +718,8 @@ LogicalResult ConvertTFMaxPoolOp::matchAndRewrite(
 LogicalResult ConvertTFConcatV2Op::matchAndRewrite(
     Operation* op, PatternRewriter& rewriter) const {
   auto tf_concatv2_op = cast<TF::ConcatV2Op>(op);
-  auto result_type = tf_concatv2_op.getResult().getType().cast<ShapedType>();
+  auto result_type =
+      mlir::cast<ShapedType>(tf_concatv2_op.getResult().getType());
   SmallVector<Value> values(tf_concatv2_op.getValues());
 
   ElementsAttr axis_elems;
@@ -877,7 +879,7 @@ LogicalResult ConvertTFFillOp::matchAndRewrite(
   DenseArrayAttr fill_attr;
 
   // Convert to a compatible zero type
-  if (value_elem.getShapedType().getElementType().isa<FloatType>()) {
+  if (mlir::isa<FloatType>(value_elem.getShapedType().getElementType())) {
     SmallVector<float> fill_arr(
         total_size,
         value_elem.getValues<FloatAttr>()[0].getValue().convertToFloat());
@@ -891,7 +893,7 @@ LogicalResult ConvertTFFillOp::matchAndRewrite(
         DenseI32ArrayAttr::get(rewriter.getContext(), llvm::ArrayRef(fill_arr));
   }
   auto fill_const_op = CreateOpAndInfer<tosa::ConstOp>(
-      rewriter, op->getLoc(), fill_type, fill_attr.cast<ElementsAttr>());
+      rewriter, op->getLoc(), fill_type, mlir::cast<ElementsAttr>(fill_attr));
   rewriter.replaceOp(op, {fill_const_op.getResult()});
 
   return success();
@@ -911,8 +913,8 @@ LogicalResult ConvertTFConv2DOp::matchAndRewrite(
   RankedTensorType bias_type = tensorflow::GetTypeFromTFTensorShape(
       {bias_dim}, filter_type.getElementType());
   auto bias_attr = rewriter.getZeroAttr(bias_type);
-  auto bias = CreateOpAndInfer<tosa::ConstOp>(rewriter, op->getLoc(), bias_type,
-                                              bias_attr.cast<ElementsAttr>());
+  auto bias = CreateOpAndInfer<tosa::ConstOp>(
+      rewriter, op->getLoc(), bias_type, mlir::cast<ElementsAttr>(bias_attr));
 
   std::optional<Value> result = convertTFConv2DCommon(
       rewriter, op, output_type, tf_conv2d_op.getInput(),
@@ -946,8 +948,8 @@ LogicalResult ConvertTFConv3DOp::matchAndRewrite(
   RankedTensorType bias_type =
       RankedTensorType::get({bias_dim}, filter_type.getElementType());
   auto bias_attr = rewriter.getZeroAttr(bias_type);
-  auto bias = CreateOpAndInfer<tosa::ConstOp>(rewriter, op->getLoc(), bias_type,
-                                              bias_attr.cast<ElementsAttr>());
+  auto bias = CreateOpAndInfer<tosa::ConstOp>(
+      rewriter, op->getLoc(), bias_type, mlir::cast<ElementsAttr>(bias_attr));
 
   std::optional<Value> result = convertTFConv3DCommon(
       rewriter, op, output_type, tf_conv3d_op.getInput(),
@@ -1036,8 +1038,8 @@ LogicalResult ConvertTFDepthwiseConv2dNativeOp::matchAndRewrite(
   RankedTensorType bias_type = tensorflow::GetTypeFromTFTensorShape(
       {bias_dim}, filter_type.getElementType());
   auto bias_attr = rewriter.getZeroAttr(bias_type);
-  auto bias = CreateOpAndInfer<tosa::ConstOp>(rewriter, op->getLoc(), bias_type,
-                                              bias_attr.cast<ElementsAttr>());
+  auto bias = CreateOpAndInfer<tosa::ConstOp>(
+      rewriter, op->getLoc(), bias_type, mlir::cast<ElementsAttr>(bias_attr));
 
   CreateReplaceOpAndInfer<tosa::DepthwiseConv2DOp>(
       rewriter, op, output_type, tf_dwconv2d_op.getInput(),
diff --git a/tensorflow/compiler/mlir/tosa/transforms/legalize_tfl.cc b/tensorflow/compiler/mlir/tosa/transforms/legalize_tfl.cc
index 024fdd88af43c1..39755b1add0f00 100644
--- a/tensorflow/compiler/mlir/tosa/transforms/legalize_tfl.cc
+++ b/tensorflow/compiler/mlir/tosa/transforms/legalize_tfl.cc
@@ -321,9 +321,9 @@ LogicalResult ConvertTFLReluOp::matchAndRewrite(
   if (!input_type || !output_type) return failure();
 
   bool input_is_qtype =
-      input_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
-  bool output_is_qtype =
-      output_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
+      mlir::isa<mlir::quant::UniformQuantizedType>(input_type.getElementType());
+  bool output_is_qtype = mlir::isa<mlir::quant::UniformQuantizedType>(
+      output_type.getElementType());
 
   if (input_is_qtype != output_is_qtype) {
     return rewriter.notifyMatchFailure(
@@ -373,9 +373,9 @@ LogicalResult ConvertTFLRelu1Op::matchAndRewrite(
   if (!input_type || !output_type) return failure();
 
   bool input_is_qtype =
-      input_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
-  bool output_is_qtype =
-      output_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
+      mlir::isa<mlir::quant::UniformQuantizedType>(input_type.getElementType());
+  bool output_is_qtype = mlir::isa<mlir::quant::UniformQuantizedType>(
+      output_type.getElementType());
 
   if (input_is_qtype != output_is_qtype) {
     return rewriter.notifyMatchFailure(
@@ -423,14 +423,15 @@ LogicalResult ConvertTFLRelu0To1Op::matchAndRewrite(
     Operation* op, PatternRewriter& rewriter) const {
   auto tfl_relu0to1_op = cast<TFL::Relu0To1Op>(op);
 
-  ShapedType input_type = tfl_relu0to1_op.getX().getType().cast<ShapedType>();
+  ShapedType input_type =
+      mlir::cast<ShapedType>(tfl_relu0to1_op.getX().getType());
   ShapedType output_type =
-      tfl_relu0to1_op.getResult().getType().cast<ShapedType>();
+      mlir::cast<ShapedType>(tfl_relu0to1_op.getResult().getType());
 
   bool input_is_qtype =
-      input_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
-  bool output_is_qtype =
-      output_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
+      mlir::isa<mlir::quant::UniformQuantizedType>(input_type.getElementType());
+  bool output_is_qtype = mlir::isa<mlir::quant::UniformQuantizedType>(
+      output_type.getElementType());
 
   if (input_is_qtype != output_is_qtype) {
     return rewriter.notifyMatchFailure(
@@ -444,9 +445,11 @@ LogicalResult ConvertTFLRelu0To1Op::matchAndRewrite(
 
   if (output_is_qtype && input_is_qtype) {
     UniformQuantizedType input_qtype =
-        input_type.getElementType().cast<mlir::quant::UniformQuantizedType>();
+        mlir::cast<mlir::quant::UniformQuantizedType>(
+            input_type.getElementType());
     UniformQuantizedType output_qtype =
-        output_type.getElementType().cast<mlir::quant::UniformQuantizedType>();
+        mlir::cast<mlir::quant::UniformQuantizedType>(
+            output_type.getElementType());
 
     clamp_min = output_qtype.getZeroPoint();
 
@@ -482,9 +485,9 @@ LogicalResult ConvertTFLRelu6Op::matchAndRewrite(
   if (!input_type || !output_type) return failure();
 
   bool input_is_qtype =
-      input_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
-  bool output_is_qtype =
-      output_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
+      mlir::isa<mlir::quant::UniformQuantizedType>(input_type.getElementType());
+  bool output_is_qtype = mlir::isa<mlir::quant::UniformQuantizedType>(
+      output_type.getElementType());
 
   if (input_is_qtype != output_is_qtype) {
     return rewriter.notifyMatchFailure(
@@ -539,12 +542,12 @@ static LogicalResult prepareMatchAndRewriteComparison(
   // Not a shaped tensor output
   if (!input_x_type || !input_y_type || !output_type) return failure();
 
-  bool input_x_is_qtype =
-      input_x_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
-  bool input_y_is_qtype =
-      input_y_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
-  bool output_is_qtype =
-      output_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
+  bool input_x_is_qtype = mlir::isa<mlir::quant::UniformQuantizedType>(
+      input_x_type.getElementType());
+  bool input_y_is_qtype = mlir::isa<mlir::quant::UniformQuantizedType>(
+      input_y_type.getElementType());
+  bool output_is_qtype = mlir::isa<mlir::quant::UniformQuantizedType>(
+      output_type.getElementType());
 
   if (input_x_is_qtype != input_y_is_qtype ||
       input_y_is_qtype != output_is_qtype) {
@@ -671,20 +674,20 @@ static LogicalResult matchAndRewriteAddSub(Operation* op,
   auto tfl_add_op = cast<TflOp>(op);
 
   ShapedType input_lhs_type =
-      tfl_add_op.getLhs().getType().template dyn_cast<ShapedType>();
+      mlir::dyn_cast<ShapedType>(tfl_add_op.getLhs().getType());
   ShapedType input_rhs_type =
-      tfl_add_op.getRhs().getType().template dyn_cast<ShapedType>();
+      mlir::dyn_cast<ShapedType>(tfl_add_op.getRhs().getType());
   ShapedType output_type =
-      tfl_add_op.getResult().getType().template dyn_cast<ShapedType>();
+      mlir::dyn_cast<ShapedType>(tfl_add_op.getResult().getType());
   // Not a ranked tensor output
   if (!input_lhs_type || !input_rhs_type || !output_type) return failure();
 
-  bool input_lhs_is_qtype =
-      input_lhs_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
-  bool input_rhs_is_qtype =
-      input_rhs_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
-  bool output_is_qtype =
-      output_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
+  bool input_lhs_is_qtype = mlir::isa<mlir::quant::UniformQuantizedType>(
+      input_lhs_type.getElementType());
+  bool input_rhs_is_qtype = mlir::isa<mlir::quant::UniformQuantizedType>(
+      input_rhs_type.getElementType());
+  bool output_is_qtype = mlir::isa<mlir::quant::UniformQuantizedType>(
+      output_type.getElementType());
 
   if (input_lhs_is_qtype != output_is_qtype ||
       input_rhs_is_qtype != output_is_qtype) {
@@ -847,7 +850,7 @@ LogicalResult ConvertTFLSignOp::matchAndRewrite(
   auto tfl_sign_op = cast<TFL::SignOp>(op);
 
   RankedTensorType output_type =
-      tfl_sign_op.getResult().getType().cast<RankedTensorType>();
+      mlir::cast<RankedTensorType>(tfl_sign_op.getResult().getType());
 
   std::optional<Value> result =
       convertSignOp(rewriter, op, tfl_sign_op.getX(), output_type);
@@ -932,7 +935,7 @@ LogicalResult ConvertTFLRoundOp::matchAndRewrite(
     return rewriter.notifyMatchFailure(op, "input not shaped tensor type");
   }
 
-  if (input_type.getElementType().isa<FloatType>()) {
+  if (mlir::isa<FloatType>(input_type.getElementType())) {
     std::optional<Value> result = convertRoundOp(
         rewriter, op, tfl_round_op.getResult(), tfl_round_op.getX());
 
@@ -962,7 +965,7 @@ LogicalResult ConvertTFLDivOp::matchAndRewrite(
 
   Type element_type = output_type.getElementType();
   Value div_op;
-  if (element_type.isa<IntegerType>()) {
+  if (mlir::isa<IntegerType>(element_type)) {
     div_op =
         CreateOpAndInfer<tosa::DivOp>(rewriter, op->getLoc(), output_type,
                                       tfl_div_op.getLhs(), tfl_div_op.getRhs())
@@ -1006,12 +1009,12 @@ LogicalResult ConvertTFLMaximumOp::matchAndRewrite(
   // Not a shaped tensor output
   if (!input_lhs_type || !input_rhs_type || !output_type) return failure();
 
-  bool input_lhs_is_qtype =
-      input_lhs_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
-  bool input_rhs_is_qtype =
-      input_rhs_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
-  bool output_is_qtype =
-      output_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
+  bool input_lhs_is_qtype = mlir::isa<mlir::quant::UniformQuantizedType>(
+      input_lhs_type.getElementType());
+  bool input_rhs_is_qtype = mlir::isa<mlir::quant::UniformQuantizedType>(
+      input_rhs_type.getElementType());
+  bool output_is_qtype = mlir::isa<mlir::quant::UniformQuantizedType>(
+      output_type.getElementType());
 
   if (input_lhs_is_qtype != output_is_qtype ||
       input_rhs_is_qtype != output_is_qtype) {
@@ -1062,12 +1065,12 @@ LogicalResult ConvertTFLMinimumOp::matchAndRewrite(
   // Not a shaped tensor output
   if (!input_lhs_type || !input_rhs_type || !output_type) return failure();
 
-  bool input_lhs_is_qtype =
-      input_lhs_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
-  bool input_rhs_is_qtype =
-      input_rhs_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
-  bool output_is_qtype =
-      output_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
+  bool input_lhs_is_qtype = mlir::isa<mlir::quant::UniformQuantizedType>(
+      input_lhs_type.getElementType());
+  bool input_rhs_is_qtype = mlir::isa<mlir::quant::UniformQuantizedType>(
+      input_rhs_type.getElementType());
+  bool output_is_qtype = mlir::isa<mlir::quant::UniformQuantizedType>(
+      output_type.getElementType());
 
   if (input_lhs_is_qtype != output_is_qtype ||
       input_rhs_is_qtype != output_is_qtype) {
@@ -1215,12 +1218,12 @@ LogicalResult ConvertTFLAveragePool2DOp::matchAndRewrite(
   // Tosa supports FP16 and FP32 accumulator type for FP16 input. When the time
   // FP16 is supported, the accumulator type can be selected based on trade-off
   // between performance and accuracy. Set to FP32 by default.
-  TypeAttr acc_attr = average_etype.isa<FloatType>()
+  TypeAttr acc_attr = mlir::isa<FloatType>(average_etype)
                           ? mlir::TypeAttr::get(rewriter.getF32Type())
                           : mlir::TypeAttr::get(rewriter.getIntegerType(32));
 
   Value result;
-  if (average_etype.isa<quant::UniformQuantizedType>()) {
+  if (mlir::isa<quant::UniformQuantizedType>(average_etype)) {
     // TensorFlow Lite doesn't use the zero point when calculating
     // quantized average pool, while TOSA does. Force the TOSA
     // zero_points to zero to ensure that the calculations match
@@ -1445,11 +1448,11 @@ LogicalResult ConvertTFLConv2DOp::matchAndRewrite(
   if (!filter_type) return failure();
 
   bool input_is_qtype =
-      input_type.getElementType().isa<mlir::quant::QuantizedType>();
+      mlir::isa<mlir::quant::QuantizedType>(input_type.getElementType());
   bool filter_is_qtype =
-      filter_type.getElementType().isa<mlir::quant::QuantizedType>();
+      mlir::isa<mlir::quant::QuantizedType>(filter_type.getElementType());
   bool output_is_qtype =
-      output_type.getElementType().isa<mlir::quant::QuantizedType>();
+      mlir::isa<mlir::quant::QuantizedType>(output_type.getElementType());
 
   if ((input_is_qtype != filter_is_qtype) ||
       (input_is_qtype != output_is_qtype)) {
@@ -1499,7 +1502,7 @@ LogicalResult ConvertTFLConv2DOp::matchAndRewrite(
       output_is_qtype ? rewriter.getI32Type() : output_type.getElementType();
   if (unquantized_bias) {
     Type new_bias_ety = getElementTypeOrSelf(unquantized_bias.getType());
-    if (auto qtype = new_bias_ety.dyn_cast<mlir::quant::QuantizedType>()) {
+    if (auto qtype = mlir::dyn_cast<mlir::quant::QuantizedType>(new_bias_ety)) {
       new_bias_ety = qtype.getStorageType();
     }
     if (new_bias_ety.getIntOrFloatBitWidth() >
@@ -1555,11 +1558,11 @@ LogicalResult ConvertTFLConv3DOp::matchAndRewrite(
   }
 
   bool input_is_qtype =
-      input_type.getElementType().isa<mlir::quant::QuantizedType>();
+      mlir::isa<mlir::quant::QuantizedType>(input_type.getElementType());
   bool filter_is_qtype =
-      filter_type.getElementType().isa<mlir::quant::QuantizedType>();
+      mlir::isa<mlir::quant::QuantizedType>(filter_type.getElementType());
   bool output_is_qtype =
-      output_type.getElementType().isa<mlir::quant::QuantizedType>();
+      mlir::isa<mlir::quant::QuantizedType>(output_type.getElementType());
 
   if ((input_is_qtype != filter_is_qtype) ||
       (input_is_qtype != output_is_qtype)) {
@@ -1578,7 +1581,7 @@ LogicalResult ConvertTFLConv3DOp::matchAndRewrite(
         RankedTensorType::get({bias_dim}, filter_type.getElementType());
     auto bias_attr = rewriter.getZeroAttr(bias_type);
     unquantized_bias = CreateOpAndInfer<tosa::ConstOp>(
-        rewriter, op->getLoc(), bias_type, bias_attr.cast<ElementsAttr>());
+        rewriter, op->getLoc(), bias_type, mlir::cast<ElementsAttr>(bias_attr));
   }
 
   SmallVector<int64_t, 3> strides({tfl_conv3d_op.getStrideD(),
@@ -1588,7 +1591,7 @@ LogicalResult ConvertTFLConv3DOp::matchAndRewrite(
                                      tfl_conv3d_op.getDilationHFactor(),
                                      tfl_conv3d_op.getDilationWFactor()});
   Type bias_ety =
-      unquantized_bias.getType().cast<ShapedType>().getElementType();
+      mlir::cast<ShapedType>(unquantized_bias.getType()).getElementType();
   std::optional<Value> a1_conv3d_op = convertConv3DCommon(
       rewriter, op, output_type.clone(bias_ety), tfl_conv3d_op.getInput(),
       tfl_conv3d_op.getFilter(), unquantized_bias, strides, dilations,
@@ -1634,11 +1637,11 @@ LogicalResult ConvertTFLTransposeConvOp::matchAndRewrite(
   if (!filter_type) return failure();
 
   bool input_is_qtype =
-      input_type.getElementType().isa<mlir::quant::QuantizedType>();
+      mlir::isa<mlir::quant::QuantizedType>(input_type.getElementType());
   bool filter_is_qtype =
-      filter_type.getElementType().isa<mlir::quant::QuantizedType>();
+      mlir::isa<mlir::quant::QuantizedType>(filter_type.getElementType());
   bool output_is_qtype =
-      output_type.getElementType().isa<mlir::quant::QuantizedType>();
+      mlir::isa<mlir::quant::QuantizedType>(output_type.getElementType());
 
   if ((input_is_qtype != filter_is_qtype) ||
       (input_is_qtype != output_is_qtype)) {
@@ -1721,7 +1724,7 @@ LogicalResult ConvertTFLTransposeConvOp::matchAndRewrite(
   }
 
   if (!zero_bias) return failure();
-  Type bias_ety = zero_bias->getType().cast<ShapedType>().getElementType();
+  Type bias_ety = mlir::cast<ShapedType>(zero_bias->getType()).getElementType();
 
   auto a1_conv2d_op = CreateOpAndInfer<tosa::TransposeConv2DOp>(
       rewriter, op->getLoc(), output_type.clone(bias_ety),
@@ -1770,11 +1773,11 @@ LogicalResult ConvertTFLDepthwiseConv2DOp::matchAndRewrite(
   if (!filter_type) return failure();
 
   bool input_is_qtype =
-      input_type.getElementType().isa<mlir::quant::QuantizedType>();
+      mlir::isa<mlir::quant::QuantizedType>(input_type.getElementType());
   bool filter_is_qtype =
-      filter_type.getElementType().isa<mlir::quant::QuantizedType>();
+      mlir::isa<mlir::quant::QuantizedType>(filter_type.getElementType());
   bool output_is_qtype =
-      output_type.getElementType().isa<mlir::quant::QuantizedType>();
+      mlir::isa<mlir::quant::QuantizedType>(output_type.getElementType());
 
   if ((input_is_qtype != filter_is_qtype) ||
       (input_is_qtype != output_is_qtype)) {
@@ -1863,7 +1866,7 @@ LogicalResult ConvertTFLDepthwiseConv2DOp::matchAndRewrite(
   Value unquantized_bias = tfl_conv2d_op.getBias();
   if (unquantized_bias) {
     Type new_bias_ety = getElementTypeOrSelf(unquantized_bias.getType());
-    if (auto qtype = new_bias_ety.dyn_cast<mlir::quant::QuantizedType>()) {
+    if (auto qtype = mlir::dyn_cast<mlir::quant::QuantizedType>(new_bias_ety)) {
       new_bias_ety = qtype.getStorageType();
     }
     if (new_bias_ety.getIntOrFloatBitWidth() >
@@ -1906,7 +1909,7 @@ LogicalResult ConvertTFLDepthwiseConv2DOp::matchAndRewrite(
 LogicalResult ConvertTFLBatchMatMulOp::matchAndRewrite(
     Operation* op, PatternRewriter& rewriter) const {
   auto tfl_mm_op = cast<TFL::BatchMatMulOp>(op);
-  auto result_ty = tfl_mm_op.getType().cast<ShapedType>();
+  auto result_ty = mlir::cast<ShapedType>(tfl_mm_op.getType());
   Value lhs = tfl_mm_op.getX();
   Value rhs = tfl_mm_op.getY();
   RankedTensorType lhs_ty = dyn_cast<RankedTensorType>(lhs.getType());
@@ -1916,10 +1919,12 @@ LogicalResult ConvertTFLBatchMatMulOp::matchAndRewrite(
 
   if (!lhs_ty || !rhs_ty) return failure();
 
-  bool lhs_is_qtype = lhs_ty.getElementType().isa<mlir::quant::QuantizedType>();
-  bool rhs_is_qtype = rhs_ty.getElementType().isa<mlir::quant::QuantizedType>();
+  bool lhs_is_qtype =
+      mlir::isa<mlir::quant::QuantizedType>(lhs_ty.getElementType());
+  bool rhs_is_qtype =
+      mlir::isa<mlir::quant::QuantizedType>(rhs_ty.getElementType());
   bool result_is_qtype =
-      result_ty.getElementType().isa<mlir::quant::QuantizedType>();
+      mlir::isa<mlir::quant::QuantizedType>(result_ty.getElementType());
 
   if ((lhs_is_qtype != rhs_is_qtype) || (lhs_is_qtype != result_is_qtype)) {
     return rewriter.notifyMatchFailure(
@@ -1951,8 +1956,8 @@ LogicalResult ConvertTFLBatchMatMulOp::matchAndRewrite(
         rewriter, op->getLoc(),
         UnrankedTensorType::get(rhs_ty.getElementType()), rhs,
         rewriter.getDenseI64ArrayAttr(new_rhs_shape));
-    lhs_ty = lhs.getType().cast<RankedTensorType>();
-    rhs_ty = rhs.getType().cast<RankedTensorType>();
+    lhs_ty = mlir::cast<RankedTensorType>(lhs.getType());
+    rhs_ty = mlir::cast<RankedTensorType>(rhs.getType());
   }
 
   if (transpose_lhs) {
@@ -1977,12 +1982,12 @@ LogicalResult ConvertTFLBatchMatMulOp::matchAndRewrite(
 
   Type output_ety;
   if (result_is_qtype) {
-    auto lhs_qty_width = lhs_ty.getElementType()
-                             .cast<mlir::quant::QuantizedType>()
-                             .getStorageTypeIntegralWidth();
-    auto rhs_qty_width = rhs_ty.getElementType()
-                             .cast<mlir::quant::QuantizedType>()
-                             .getStorageTypeIntegralWidth();
+    auto lhs_qty_width =
+        mlir::cast<mlir::quant::QuantizedType>(lhs_ty.getElementType())
+            .getStorageTypeIntegralWidth();
+    auto rhs_qty_width =
+        mlir::cast<mlir::quant::QuantizedType>(rhs_ty.getElementType())
+            .getStorageTypeIntegralWidth();
 
     if (lhs_qty_width != rhs_qty_width) {
       return rewriter.notifyMatchFailure(
@@ -2007,7 +2012,7 @@ LogicalResult ConvertTFLBatchMatMulOp::matchAndRewrite(
           .getResult();
 
   // Conditionally reshape rank back to expected rank.
-  auto matmul_ty = matmul.getType().cast<RankedTensorType>();
+  auto matmul_ty = mlir::cast<RankedTensorType>(matmul.getType());
   if (batch_dims.size() != 1) {
     llvm::SmallVector<int64_t> new_shape{};
     for (auto d : batch_dims) {
@@ -2052,11 +2057,11 @@ LogicalResult ConvertTFLFullyConnectedOp::matchAndRewrite(
   if (!input_type || !filter_type) return failure();
 
   bool input_is_qtype =
-      input_type.getElementType().isa<mlir::quant::QuantizedType>();
+      mlir::isa<mlir::quant::QuantizedType>(input_type.getElementType());
   bool filter_is_qtype =
-      filter_type.getElementType().isa<mlir::quant::QuantizedType>();
+      mlir::isa<mlir::quant::QuantizedType>(filter_type.getElementType());
   bool output_is_qtype =
-      output_type.getElementType().isa<mlir::quant::QuantizedType>();
+      mlir::isa<mlir::quant::QuantizedType>(output_type.getElementType());
 
   if ((input_is_qtype != filter_is_qtype) ||
       (input_is_qtype != output_is_qtype)) {
@@ -2099,7 +2104,7 @@ LogicalResult ConvertTFLFullyConnectedOp::matchAndRewrite(
     RankedTensorType new_bias_type;
 
     DenseElementsAttr bias_attr;
-    if (input_type.getElementType().isa<FloatType>()) {
+    if (mlir::isa<FloatType>(input_type.getElementType())) {
       SmallVector<float> bias_arr(bias_shape[0]);
 
       for (int i = 0; i < bias_shape[0]; i++) {
@@ -2120,7 +2125,7 @@ LogicalResult ConvertTFLFullyConnectedOp::matchAndRewrite(
             op, "input must be quantized type if it's not float type");
       }
       auto input_qtype =
-          input_type.getElementType().cast<mlir::quant::QuantizedType>();
+          mlir::cast<mlir::quant::QuantizedType>(input_type.getElementType());
       Type new_bias_ety = input_qtype.getStorageTypeIntegralWidth() == 16
                               ? rewriter.getIntegerType(48)
                               : rewriter.getI32Type();
@@ -2136,7 +2141,7 @@ LogicalResult ConvertTFLFullyConnectedOp::matchAndRewrite(
     bias_val = tfl_fc_op.getBias();
   }
 
-  Type bias_ety = bias_val.getType().cast<ShapedType>().getElementType();
+  Type bias_ety = mlir::cast<ShapedType>(bias_val.getType()).getElementType();
 
   auto fc_op = CreateOpAndInfer<tosa::FullyConnectedOp>(
       rewriter, op->getLoc(), UnrankedTensorType::get(bias_ety), input_val,
@@ -2152,7 +2157,7 @@ LogicalResult ConvertTFLFullyConnectedOp::matchAndRewrite(
   }
 
   // If we know the output rank, we need to ensure the output shape is correct.
-  ShapedType fc_type = fc_output.getType().cast<ShapedType>();
+  ShapedType fc_type = mlir::cast<ShapedType>(fc_output.getType());
   if (output_type.hasRank()) {
     llvm::SmallVector<int64_t> output_shape;
 
@@ -2270,7 +2275,7 @@ LogicalResult ConvertTFLRankOp::matchAndRewrite(
       RankedTensorType::get({1}, rewriter.getIntegerType(32));
   auto rank_attr = DenseI32ArrayAttr::get(rewriter.getContext(), {rank});
   auto rank_const = CreateOpAndInfer<tosa::ConstOp>(
-      rewriter, op->getLoc(), rank_type, rank_attr.cast<ElementsAttr>());
+      rewriter, op->getLoc(), rank_type, mlir::cast<ElementsAttr>(rank_attr));
 
   rewriter.replaceOp(op, {rank_const.getResult()});
 
@@ -2303,7 +2308,7 @@ LogicalResult ConvertTFLShapeOp::matchAndRewrite(
   auto shape_attr =
       DenseI32ArrayAttr::get(rewriter.getContext(), llvm::ArrayRef(shape_arr));
   auto shape_const = CreateOpAndInfer<tosa::ConstOp>(
-      rewriter, op->getLoc(), shape_type, shape_attr.cast<ElementsAttr>());
+      rewriter, op->getLoc(), shape_type, mlir::cast<ElementsAttr>(shape_attr));
 
   rewriter.replaceOp(op, {shape_const.getResult()});
 
@@ -2376,7 +2381,7 @@ LogicalResult ConvertTFLFillOp::matchAndRewrite(
   DenseArrayAttr fill_attr;
 
   // Convert to a compatible zero type.
-  if (value_elem.getShapedType().getElementType().isa<FloatType>()) {
+  if (mlir::isa<FloatType>(value_elem.getShapedType().getElementType())) {
     SmallVector<float> fill_arr(
         total_size, value_elem.getValues<APFloat>()[0].convertToFloat());
     fill_attr =
@@ -2388,7 +2393,7 @@ LogicalResult ConvertTFLFillOp::matchAndRewrite(
         DenseI32ArrayAttr::get(rewriter.getContext(), llvm::ArrayRef(fill_arr));
   }
   auto fill_const_op = CreateOpAndInfer<tosa::ConstOp>(
-      rewriter, op->getLoc(), fill_type, fill_attr.cast<ElementsAttr>());
+      rewriter, op->getLoc(), fill_type, mlir::cast<ElementsAttr>(fill_attr));
   rewriter.replaceOp(op, {fill_const_op.getResult()});
 
   return success();
@@ -2589,11 +2594,11 @@ LogicalResult ConvertTFLRsqrtOp::matchAndRewrite(
       dyn_cast<RankedTensorType>(tfl_rsqrt_op.getX().getType());
 
   mlir::quant::UniformQuantizedType input_qtype =
-      input_type.getElementType()
-          .dyn_cast_or_null<mlir::quant::UniformQuantizedType>();
+      mlir::dyn_cast_or_null<mlir::quant::UniformQuantizedType>(
+          input_type.getElementType());
   mlir::quant::UniformQuantizedType output_qtype =
-      output_type.getElementType()
-          .dyn_cast_or_null<mlir::quant::UniformQuantizedType>();
+      mlir::dyn_cast_or_null<mlir::quant::UniformQuantizedType>(
+          output_type.getElementType());
 
   // Quantization case
   if (input_qtype && output_qtype) {
@@ -2636,7 +2641,7 @@ LogicalResult ConvertTFLL2NormalizationOp::matchAndRewrite(
     Operation* op, PatternRewriter& rewriter) const {
   auto tfl_l2norm_op = cast<TFL::L2NormalizationOp>(op);
   auto input = tfl_l2norm_op.getInput();
-  auto input_ty = input.getType().cast<ShapedType>();
+  auto input_ty = mlir::cast<ShapedType>(input.getType());
   auto loc = op->getLoc();
 
   if (!input_ty.hasRank()) return failure();
@@ -3200,15 +3205,15 @@ LogicalResult ConvertTFLHardSwishOp::matchAndRewrite(
 
   // TFL hardswish: f(x) -> (x * relu6(x+3))/6
 
-  if (input_type.getElementType().isa<mlir::quant::QuantizedType>() &&
-      output_type.getElementType().isa<mlir::quant::QuantizedType>()) {
+  if (mlir::isa<mlir::quant::QuantizedType>(input_type.getElementType()) &&
+      mlir::isa<mlir::quant::QuantizedType>(output_type.getElementType())) {
     // Should match TFLite reference numerical behavior
     mlir::quant::UniformQuantizedType input_qtype =
-        input_type.getElementType()
-            .dyn_cast_or_null<mlir::quant::UniformQuantizedType>();
+        mlir::dyn_cast_or_null<mlir::quant::UniformQuantizedType>(
+            input_type.getElementType());
     mlir::quant::UniformQuantizedType output_qtype =
-        output_type.getElementType()
-            .dyn_cast_or_null<mlir::quant::UniformQuantizedType>();
+        mlir::dyn_cast_or_null<mlir::quant::UniformQuantizedType>(
+            output_type.getElementType());
 
     auto hardswish_func = [](double v) -> double {
       double w = v + 3.0;
@@ -3286,8 +3291,8 @@ LogicalResult ConvertTFLCosOp::matchAndRewrite(
 
   if (!input_ty || !output_ty) return failure();
 
-  bool input_is_fp = input_ty.getElementType().isa<mlir::FloatType>();
-  bool output_is_fp = output_ty.getElementType().isa<mlir::FloatType>();
+  bool input_is_fp = mlir::isa<mlir::FloatType>(input_ty.getElementType());
+  bool output_is_fp = mlir::isa<mlir::FloatType>(output_ty.getElementType());
 
   if (!input_is_fp || !output_is_fp) {
     return rewriter.notifyMatchFailure(op, "input/result must be fp");
@@ -3440,9 +3445,9 @@ LogicalResult ConvertTFLLogisticOp::matchAndRewrite(
   if (!input_type || !output_type) return failure();
 
   bool input_is_qtype =
-      input_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
-  bool output_is_qtype =
-      output_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
+      mlir::isa<mlir::quant::UniformQuantizedType>(input_type.getElementType());
+  bool output_is_qtype = mlir::isa<mlir::quant::UniformQuantizedType>(
+      output_type.getElementType());
 
   if (input_is_qtype != output_is_qtype) {
     return rewriter.notifyMatchFailure(
@@ -3453,11 +3458,11 @@ LogicalResult ConvertTFLLogisticOp::matchAndRewrite(
   if (input_is_qtype) {
     ShapedType int32_type = output_type.clone(rewriter.getIntegerType(32));
     mlir::quant::UniformQuantizedType input_qtype =
-        input_type.getElementType()
-            .dyn_cast_or_null<mlir::quant::UniformQuantizedType>();
+        mlir::dyn_cast_or_null<mlir::quant::UniformQuantizedType>(
+            input_type.getElementType());
     mlir::quant::UniformQuantizedType output_qtype =
-        output_type.getElementType()
-            .dyn_cast_or_null<mlir::quant::UniformQuantizedType>();
+        mlir::dyn_cast_or_null<mlir::quant::UniformQuantizedType>(
+            output_type.getElementType());
 
     auto sigmoid_func = [](double x) -> double {
       return 1.0 / (1.0 + std::exp(-x));
@@ -3511,9 +3516,9 @@ LogicalResult ConvertTFLTanhOp::matchAndRewrite(
   if (!input_type || !output_type) return failure();
 
   bool input_is_qtype =
-      input_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
-  bool output_is_qtype =
-      output_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
+      mlir::isa<mlir::quant::UniformQuantizedType>(input_type.getElementType());
+  bool output_is_qtype = mlir::isa<mlir::quant::UniformQuantizedType>(
+      output_type.getElementType());
 
   if (input_is_qtype != output_is_qtype) {
     return rewriter.notifyMatchFailure(
@@ -3524,11 +3529,11 @@ LogicalResult ConvertTFLTanhOp::matchAndRewrite(
   if (input_is_qtype) {
     ShapedType int32_type = output_type.clone(rewriter.getIntegerType(32));
     mlir::quant::UniformQuantizedType input_qtype =
-        input_type.getElementType()
-            .dyn_cast_or_null<mlir::quant::UniformQuantizedType>();
+        mlir::dyn_cast_or_null<mlir::quant::UniformQuantizedType>(
+            input_type.getElementType());
     mlir::quant::UniformQuantizedType output_qtype =
-        output_type.getElementType()
-            .dyn_cast_or_null<mlir::quant::UniformQuantizedType>();
+        mlir::dyn_cast_or_null<mlir::quant::UniformQuantizedType>(
+            output_type.getElementType());
 
     auto tanh_func = [](double x) -> double {
       x = std::exp(-2.0 * x);
@@ -3644,9 +3649,9 @@ static LogicalResult LegalizeQuantizedPrelu(Operation* op,
   // Perform an element-wise multiplication on rescaled alpha and input for
   // PReLU.
   Value alpha = tfl_prelu_op.getAlpha();
-  ShapedType alpha_type = alpha.getType().cast<ShapedType>();
+  ShapedType alpha_type = mlir::cast<ShapedType>(alpha.getType());
   UniformQuantizedType alpha_qtype =
-      alpha_type.getElementType().cast<UniformQuantizedType>();
+      mlir::cast<UniformQuantizedType>(alpha_type.getElementType());
 
   Value op_rescale_alpha = removeZeroPointAndCastToInt32(
       rewriter, op, alpha, alpha_qtype.getZeroPoint());
@@ -3698,7 +3703,7 @@ static LogicalResult LegalizeQuantizedLeakyRelu(Operation* op,
                                                 PatternRewriter& rewriter,
                                                 Value input, double alpha,
                                                 ShapedType output_type) {
-  ShapedType input_type = input.getType().cast<ShapedType>();
+  ShapedType input_type = mlir::cast<ShapedType>(input.getType());
   ShapedType rescale_type = input_type.clone(rewriter.getI32Type());
 
   UniformQuantizedType input_qtype =
@@ -3784,9 +3789,9 @@ LogicalResult ConvertTFLLeakyReluOp::matchAndRewrite(
                                        "input or output is not a ShapedType");
 
   bool input_is_qtype =
-      input_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
-  bool output_is_qtype =
-      output_type.getElementType().isa<mlir::quant::UniformQuantizedType>();
+      mlir::isa<mlir::quant::UniformQuantizedType>(input_type.getElementType());
+  bool output_is_qtype = mlir::isa<mlir::quant::UniformQuantizedType>(
+      output_type.getElementType());
 
   if (input_is_qtype != output_is_qtype) {
     return rewriter.notifyMatchFailure(
@@ -3846,8 +3851,7 @@ LogicalResult ConvertTFLCustomOp::matchAndRewrite(
   rewriter.replaceOpWithNewOp<tosa::CustomOp>(
       op, op->getResultTypes(), tfl_custom_op.getCustomCode(),
       rewriter.getStringAttr("TFL"),
-      tfl_custom_op.getCustomOption()
-          .cast<mlir::TFL::ConstBytesAttr>()
+      mlir::cast<mlir::TFL::ConstBytesAttr>(tfl_custom_op.getCustomOption())
           .getValue()
           .str(),
       op->getOperands());
@@ -3966,7 +3970,7 @@ LogicalResult ConvertTFLDequantizeOp::matchAndRewrite(
   if (!qtype) return failure();
 
   Type element_type = qtype.getElementType();
-  if (element_type.isa<FloatType>()) {
+  if (mlir::isa<FloatType>(element_type)) {
     CreateReplaceOpAndInfer<tosa::CastOp>(rewriter, op, output_type,
                                           tfl_dequantize_op.getInput());
     return success();
@@ -4023,7 +4027,7 @@ LogicalResult ConvertTFLConstOp::matchAndRewrite(
 
   ElementsAttr elements = tfl_const_op.getValue();
   Type element_type = elements.getShapedType().getElementType();
-  if (output_type.getElementType().isa<quant::QuantizedType>()) {
+  if (mlir::isa<quant::QuantizedType>(output_type.getElementType())) {
     output_type = RankedTensorType::get(output_type.getShape(), element_type);
   }
 
@@ -4031,7 +4035,8 @@ LogicalResult ConvertTFLConstOp::matchAndRewrite(
   // attribute shape. This occurs as some TFLite folders create constants with
   // unranked shapes.
   if (!output_type.hasRank()) {
-    output_type = elements.getType().cast<ShapedType>().clone(element_type);
+    output_type =
+        mlir::cast<ShapedType>(elements.getType()).clone(element_type);
   }
 
   rewriter.replaceOpWithNewOp<tosa::ConstOp>(op, output_type, elements);
@@ -4053,8 +4058,8 @@ LogicalResult ConvertTFLQConstOp::matchAndRewrite(
   // attribute shape. This occurs as some TFLite folders create constants with
   // unranked shapes.
   if (!output_type.hasRank()) {
-    output_type = elements.getType().cast<ShapedType>().clone(
-        output_type.getElementType());
+    output_type = mlir::cast<ShapedType>(elements.getType())
+                      .clone(output_type.getElementType());
   }
 
   rewriter.replaceOpWithNewOp<tosa::ConstOp>(op, output_type, elements);
@@ -4079,7 +4084,7 @@ LogicalResult ConvertConstantOp::matchAndRewrite(
   // For data type like 64 bits, we need to truncate them into 48 bits.
   if (e_type.isInteger(64)) {
     e_type = rewriter.getIntegerType(48);
-    attr = attr.cast<DenseIntOrFPElementsAttr>().mapValues(
+    attr = mlir::cast<DenseIntOrFPElementsAttr>(attr).mapValues(
         e_type, [](const APInt& x) -> APInt { return x.trunc(48); });
   }
 
@@ -4136,11 +4141,11 @@ LogicalResult ConvertTFLSparseToDenseOp::matchAndRewrite(
   auto indices = tfl_sparse_to_dense_op.getSparseIndices();
   auto values = tfl_sparse_to_dense_op.getSparseValues();
   auto default_value = tfl_sparse_to_dense_op.getDefaultValue();
-  auto indices_ty = indices.getType().cast<ShapedType>();
+  auto indices_ty = mlir::cast<ShapedType>(indices.getType());
   auto indices_ety = indices_ty.getElementType();
-  auto values_ty = values.getType().cast<ShapedType>();
+  auto values_ty = mlir::cast<ShapedType>(values.getType());
   auto result_ty =
-      tfl_sparse_to_dense_op.getResult().getType().cast<ShapedType>();
+      mlir::cast<ShapedType>(tfl_sparse_to_dense_op.getResult().getType());
   auto result_ety = result_ty.getElementType();
   auto loc = op->getLoc();
 
@@ -4262,7 +4267,7 @@ LogicalResult ConvertTFLArgMinOp::matchAndRewrite(
   auto arg_max_op = cast<TFL::ArgMinOp>(op);
   auto loc = arg_max_op.getLoc();
   auto input = arg_max_op.getInput();
-  auto input_ty = input.getType().cast<ShapedType>();
+  auto input_ty = mlir::cast<ShapedType>(input.getType());
   Type input_ety = input_ty.getElementType();
 
   if (auto quantized_ty = dyn_cast<QuantizedType>(input_ety)) {
@@ -4281,9 +4286,9 @@ LogicalResult ConvertTFLArgMinOp::matchAndRewrite(
   int32_t dim = dim_elems.getValues<APInt>()[0].getSExtValue();
   if (dim < 0) dim += input_ty.getRank();
 
-  if (input_ety.isa<FloatType>()) {
+  if (mlir::isa<FloatType>(input_ety)) {
     input = CreateOpAndInfer<tosa::NegateOp>(rewriter, loc, input_ty, input);
-  } else if (input_ety.isa<IntegerType>()) {
+  } else if (mlir::isa<IntegerType>(input_ety)) {
     auto reverse_ty = RankedTensorType::get({}, input_ety);
     Value reverse_val = rewriter.create<tosa::ConstOp>(
         loc, reverse_ty,
@@ -4370,12 +4375,12 @@ LogicalResult ConvertTFLRealOp::matchAndRewrite(
   Type input_ety = input_ty.getElementType();
 
   // For non-complex inputs, return the original tensor.
-  if (!input_ety.isa<ComplexType>()) {
+  if (!mlir::isa<ComplexType>(input_ety)) {
     CreateReplaceOpAndInfer<tosa::IdentityOp>(rewriter, op, input_ty, input);
     return success();
   }
 
-  if (!input_ety.cast<ComplexType>().getElementType().isF32()) {
+  if (!mlir::cast<ComplexType>(input_ety).getElementType().isF32()) {
     return rewriter.notifyMatchFailure(
         op, "complex input must be of type complex64");
   }
@@ -4425,13 +4430,13 @@ LogicalResult ConvertTFLImagOp::matchAndRewrite(
   Type input_ety = input_ty.getElementType();
 
   // For non-complex inputs return all zero's.
-  if (!input_ety.isa<ComplexType>()) {
+  if (!mlir::isa<ComplexType>(input_ety)) {
     CreateReplaceOpAndInfer<tosa::ConstOp>(
         rewriter, op, input_ty, DenseElementsAttr::get(input_ty, {0.0f}));
     return success();
   }
 
-  if (!input_ety.cast<ComplexType>().getElementType().isF32()) {
+  if (!mlir::cast<ComplexType>(input_ety).getElementType().isF32()) {
     return rewriter.notifyMatchFailure(
         op, "complex input must be of type complex64");
   }
diff --git a/tensorflow/compiler/mlir/tosa/transforms/legalize_utils.cc b/tensorflow/compiler/mlir/tosa/transforms/legalize_utils.cc
index de8e777a7d558e..8571995d719484 100644
--- a/tensorflow/compiler/mlir/tosa/transforms/legalize_utils.cc
+++ b/tensorflow/compiler/mlir/tosa/transforms/legalize_utils.cc
@@ -30,6 +30,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinAttributes.h"  // from @llvm-project
 #include "mlir/IR/BuiltinTypeInterfaces.h"  // from @llvm-project
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/lite/ir/tfl_ops.h"
 #include "tensorflow/compiler/mlir/tensorflow/utils/dynamic_shape_utils.h"
@@ -78,7 +79,7 @@ std::optional<Value> buildReshapeWithDynamicDims(PatternRewriter& rewriter,
                                                  Value input_value,
                                                  ShapedType output_type,
                                                  llvm::ArrayRef<Value> dims) {
-  auto e_ty = input_value.getType().cast<ShapedType>().getElementType();
+  auto e_ty = mlir::cast<ShapedType>(input_value.getType()).getElementType();
   llvm::SmallVector<int64_t> static_dims;
 
   if (output_type.hasRank()) {
@@ -92,7 +93,7 @@ std::optional<Value> buildReshapeWithDynamicDims(PatternRewriter& rewriter,
     auto dim = dims[i];
     SplatElementsAttr dim_attr;
     if (matchPattern(dim, m_Constant(&dim_attr))) {
-      if (dim_attr.getType().cast<ShapedType>().getRank() != 0) {
+      if (mlir::cast<ShapedType>(dim_attr.getType()).getRank() != 0) {
         (void)rewriter.notifyMatchFailure(
             op, "dim for building tosa::ReshapeOp should be rank-0");
         return std::nullopt;
@@ -643,8 +644,8 @@ DenseI64ArrayAttr getPaddingValuesFromExplicitPadAttr(
   for (int i = 0; i < 2; i++) {  // Two spatial dimensions X&Y
     int64_t dim = GetTensorSpatialDimIndex(4, data_format_tf,
                                            i);  // 4D tensor, NHWC/NCHW format
-    pad_before = explicit_pad[dim * 2].template cast<IntegerAttr>().getInt();
-    pad_after = explicit_pad[dim * 2 + 1].template cast<IntegerAttr>().getInt();
+    pad_before = mlir::cast<IntegerAttr>(explicit_pad[dim * 2]).getInt();
+    pad_after = mlir::cast<IntegerAttr>(explicit_pad[dim * 2 + 1]).getInt();
     computed_paddings.push_back(pad_before);
     computed_paddings.push_back(pad_after);
   }
@@ -801,11 +802,11 @@ LogicalResult ApplyPatternsWithShapeResolution(
   // This should be investigate for whether it is still necessary due to quant
   // type stripping changing.
   func.walk([&](tosa::ConstOp op) {
-    if (op.getType().getElementType().isa<QuantizedType>()) {
+    if (mlir::isa<QuantizedType>(op.getType().getElementType())) {
       return;
     }
     auto ety = op.getValue().getShapedType().getElementType();
-    auto new_ty = op.getType().cast<TensorType>().clone(ety);
+    auto new_ty = mlir::cast<TensorType>(op.getType()).clone(ety);
     op.getResult().setType(new_ty);
   });
 
diff --git a/tensorflow/compiler/mlir/tosa/transforms/legalize_utils.h b/tensorflow/compiler/mlir/tosa/transforms/legalize_utils.h
index d2e04ac869ae48..acb9dff2a4a8ff 100644
--- a/tensorflow/compiler/mlir/tosa/transforms/legalize_utils.h
+++ b/tensorflow/compiler/mlir/tosa/transforms/legalize_utils.h
@@ -202,7 +202,7 @@ TosaOp CreateOpAndInfer(ImplicitLocOpBuilder& builder, Type result_ty,
 
   // Compute the knowledge based on the inferred type.
   auto inferredKnowledge = ValueKnowledge::getPessimisticValueState();
-  inferredKnowledge.dtype = result_ty.cast<ShapedType>().getElementType();
+  inferredKnowledge.dtype = mlir::cast<ShapedType>(result_ty).getElementType();
   inferredKnowledge.hasRank = predictedShape.hasRank();
   if (predictedShape.hasRank()) {
     for (auto dim : predictedShape.getDims()) {
diff --git a/tensorflow/compiler/mlir/tosa/transforms/lower_complex_types.cc b/tensorflow/compiler/mlir/tosa/transforms/lower_complex_types.cc
index 987ac5deb7479f..765cf33aa08812 100644
--- a/tensorflow/compiler/mlir/tosa/transforms/lower_complex_types.cc
+++ b/tensorflow/compiler/mlir/tosa/transforms/lower_complex_types.cc
@@ -42,6 +42,7 @@ limitations under the License.
 #include "mlir/IR/PatternMatch.h"  // from @llvm-project
 #include "mlir/IR/TypeUtilities.h"  // from @llvm-project
 #include "mlir/Pass/PassRegistry.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Transforms/DialectConversion.h"  // from @llvm-project
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"  // from @llvm-project
@@ -115,7 +116,7 @@ class GenericTypeConvert : public ConversionPattern {
 
 static bool isIllegalType(Type type) {
   if (auto shapedType = dyn_cast<ShapedType>(type)) {
-    return shapedType.getElementType().isa<ComplexType>();
+    return mlir::isa<ComplexType>(shapedType.getElementType());
   }
   return false;
 }
diff --git a/tensorflow/compiler/mlir/tosa/transforms/strip_quant_types.cc b/tensorflow/compiler/mlir/tosa/transforms/strip_quant_types.cc
index 85df18855769fc..11857f3b1c3404 100644
--- a/tensorflow/compiler/mlir/tosa/transforms/strip_quant_types.cc
+++ b/tensorflow/compiler/mlir/tosa/transforms/strip_quant_types.cc
@@ -38,6 +38,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/IR/PatternMatch.h"  // from @llvm-project
 #include "mlir/Pass/PassRegistry.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Transforms/DialectConversion.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/lite/quantization/ir/QuantOps.h"
@@ -121,7 +122,7 @@ class GenericTypeConvert : public ConversionPattern {
 };
 
 static bool isIllegalType(Type type) {
-  if (type.isa<quant::QuantizedType>()) return true;
+  if (mlir::isa<quant::QuantizedType>(type)) return true;
   if (auto shapedType = dyn_cast<ShapedType>(type)) {
     return isIllegalType(shapedType.getElementType());
   }
diff --git a/tensorflow/compiler/mlir/utils/BUILD b/tensorflow/compiler/mlir/utils/BUILD
index e34e9cf7be7cca..2256c421b45717 100644
--- a/tensorflow/compiler/mlir/utils/BUILD
+++ b/tensorflow/compiler/mlir/utils/BUILD
@@ -16,6 +16,7 @@ cc_library(
     deps = [
         "@llvm-project//llvm:Support",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
     ],
 )
 
diff --git a/tensorflow/compiler/mlir/utils/name_utils.cc b/tensorflow/compiler/mlir/utils/name_utils.cc
index 6ca366fc9d64d5..7ce1c46861c2bb 100644
--- a/tensorflow/compiler/mlir/utils/name_utils.cc
+++ b/tensorflow/compiler/mlir/utils/name_utils.cc
@@ -22,6 +22,7 @@ limitations under the License.
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/ADT/StringExtras.h"
 #include "mlir/IR/BuiltinAttributes.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 
 namespace mlir {
 
@@ -63,7 +64,7 @@ std::string GetNameFromLoc(Location loc) {
   while (!locs.empty()) {
     Location curr_loc = locs.pop_back_val();
 
-    if (auto name_loc = curr_loc.dyn_cast<NameLoc>()) {
+    if (auto name_loc = mlir::dyn_cast<NameLoc>(curr_loc)) {
       // Add name in NameLoc. For NameLoc we also account for names due to ops
       // in functions where the op's name is first.
       auto name = name_loc.getName().strref().split('@').first;
@@ -73,11 +74,11 @@ std::string GetNameFromLoc(Location loc) {
         if (!name.empty()) names_is_nonempty = true;
       }
       continue;
-    } else if (auto call_loc = curr_loc.dyn_cast<CallSiteLoc>()) {
+    } else if (auto call_loc = mlir::dyn_cast<CallSiteLoc>(curr_loc)) {
       // Use location of the Callee to generate the name.
       locs.push_back(call_loc.getCallee());
       continue;
-    } else if (auto fused_loc = curr_loc.dyn_cast<FusedLoc>()) {
+    } else if (auto fused_loc = mlir::dyn_cast<FusedLoc>(curr_loc)) {
       // Push all locations in FusedLoc in reverse order, so locations are
       // visited based on order in FusedLoc.
       auto reversed_fused_locs = llvm::reverse(fused_loc.getLocations());
diff --git a/tensorflow/compiler/tf2xla/kernels/xla_call_module_loader.cc b/tensorflow/compiler/tf2xla/kernels/xla_call_module_loader.cc
index 5c19b9fe1014d3..39d4b086788ffe 100644
--- a/tensorflow/compiler/tf2xla/kernels/xla_call_module_loader.cc
+++ b/tensorflow/compiler/tf2xla/kernels/xla_call_module_loader.cc
@@ -116,8 +116,8 @@ constexpr llvm::StringRef kCustomCallShimTarget =
 }  // namespace
 
 bool IsTokenType(mlir::Type type) {
-  return type.isa<mlir::stablehlo::TokenType>() ||
-         type.isa<mlir::mhlo::TokenType>();
+  return mlir::isa<mlir::stablehlo::TokenType>(type) ||
+         mlir::isa<mlir::mhlo::TokenType>(type);
 }
 
 absl::StatusOr<std::unique_ptr<XlaCallModuleLoader>>
@@ -174,7 +174,7 @@ absl::Status XlaCallModuleLoader::SetPlatformIndex(
   op_builder.setInsertionPointToStart(&main_body);
   mlir::BlockArgument platform_index_arg = main_body.getArgument(0);
   mlir::RankedTensorType arg_ranked_type =
-      platform_index_arg.getType().dyn_cast<mlir::RankedTensorType>();
+      mlir::dyn_cast<mlir::RankedTensorType>(platform_index_arg.getType());
   if (!arg_ranked_type || arg_ranked_type.getRank() != 0 ||
       !(arg_ranked_type.getElementType().isSignlessInteger(32) ||
         arg_ranked_type.getElementType().isSignlessInteger(64))) {
@@ -301,7 +301,7 @@ absl::Status XlaCallModuleLoader::RefineDynamicShapes(
               << mlir::debugString(type) << " for argument type "
               << mlir::debugString(arg_type);
       mlir::TensorType arg_type =
-          main_body.getArgument(i).getType().dyn_cast<mlir::TensorType>();
+          mlir::dyn_cast<mlir::TensorType>(main_body.getArgument(i).getType());
       if (arg_type == nullptr) {
         return absl::InvalidArgumentError(absl::StrCat(
             "Argument ", i, " passed to XlaCallModule is not a tensor, ",
@@ -316,7 +316,8 @@ absl::Status XlaCallModuleLoader::RefineDynamicShapes(
             mlir::debugString(arg_type), ", got ", mlir::debugString(type)));
       }
 
-      if (auto ranked_arg_type = arg_type.dyn_cast<mlir::RankedTensorType>()) {
+      if (auto ranked_arg_type =
+              mlir::dyn_cast<mlir::RankedTensorType>(arg_type)) {
         if (mlir::failed(mlir::verifyCompatibleShape(ranked_arg_type.getShape(),
                                                      type.getShape()))) {
           return absl::InvalidArgumentError(absl::StrCat(
@@ -380,9 +381,10 @@ absl::Status XlaCallModuleLoader::RefineDynamicShapes(
     if (IsTokenType(arg_type) || is_input_refined) {
       continue;
     }
-    auto ranked_arg_type = arg_type.dyn_cast<mlir::RankedTensorType>();
+    auto ranked_arg_type = mlir::dyn_cast<mlir::RankedTensorType>(arg_type);
     if (!ranked_arg_type || !ranked_arg_type.hasStaticShape()) {
-      auto type = static_array_input_types[i].cast<mlir::RankedTensorType>();
+      auto type =
+          mlir::cast<mlir::RankedTensorType>(static_array_input_types[i]);
       auto custom_call =
           MakeShapeRefinementOperandWrapper(op_builder, arg, type.getShape());
       auto call_result = custom_call.getResult(0);
@@ -409,8 +411,8 @@ absl::Status XlaCallModuleLoader::RefineDynamicShapes(
   // Clean up custom_call shims.
   for (auto call : llvm::make_early_inc_range(
            main_body.getOps<mlir::stablehlo::CustomCallOp>())) {
-    if (call->getAttr("call_target_name").cast<mlir::StringAttr>().strref() ==
-        kCustomCallShimTarget) {
+    if (mlir::cast<mlir::StringAttr>(call->getAttr("call_target_name"))
+            .strref() == kCustomCallShimTarget) {
       auto operand = call->getOperand(0);
       auto result = call->getResult(0);
       if (operand.getType() != result.getType()) {
diff --git a/tensorflow/compiler/tf2xla/kernels/xla_call_module_op.cc b/tensorflow/compiler/tf2xla/kernels/xla_call_module_op.cc
index dbba8e7d8afd6a..529f27a0f7b25d 100644
--- a/tensorflow/compiler/tf2xla/kernels/xla_call_module_op.cc
+++ b/tensorflow/compiler/tf2xla/kernels/xla_call_module_op.cc
@@ -40,6 +40,7 @@ limitations under the License.
 #include "mlir/IR/TypeUtilities.h"  // from @llvm-project
 #include "mlir/Pass/PassManager.h"  // from @llvm-project
 #include "mlir/Support/DebugStringHelper.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/utils/convert_type.h"
 #include "tensorflow/compiler/mlir/tensorflow/utils/dump_mlir_util.h"
 #include "tensorflow/compiler/tf2xla/kernels/xla_call_module_loader.h"
@@ -403,7 +404,7 @@ class XlaCallModuleOp : public XlaOpKernel {
         mlir::TypeRange input_types(custom_call->getOperandTypes());
         if (custom_call_has_token_input_output) {
           if (input_types.empty() ||
-              !input_types.front().isa<mlir::mhlo::TokenType>()) {
+              !mlir::isa<mlir::mhlo::TokenType>(input_types.front())) {
             return absl::InvalidArgumentError(absl::StrCat(
                 "stablehlo.custom_call with has_token_input_output = true is "
                 "expected to take !stablehlo.token as the first argument, but "
@@ -422,7 +423,7 @@ class XlaCallModuleOp : public XlaOpKernel {
         mlir::TypeRange result_types(custom_call->getResultTypes());
         if (custom_call_has_token_input_output) {
           if (result_types.empty() ||
-              !result_types.front().isa<mlir::mhlo::TokenType>()) {
+              !mlir::isa<mlir::mhlo::TokenType>(result_types.front())) {
             return absl::InvalidArgumentError(absl::StrCat(
                 "stablehlo.custom_call with has_token_input_output = true is "
                 "expected to return !stablehlo.token as the first result, but "
diff --git a/tensorflow/core/ir/BUILD b/tensorflow/core/ir/BUILD
index 5fc887ce213d76..9369b912467852 100644
--- a/tensorflow/core/ir/BUILD
+++ b/tensorflow/core/ir/BUILD
@@ -192,6 +192,7 @@ tf_cc_test(
         "//tensorflow/core:test_main",
         "@llvm-project//mlir:IR",
         "@llvm-project//mlir:Parser",
+        "@llvm-project//mlir:Support",
     ],
 )
 
@@ -206,6 +207,7 @@ tf_cc_test(
         "@llvm-project//llvm:Support",
         "@llvm-project//mlir:IR",
         "@llvm-project//mlir:Parser",
+        "@llvm-project//mlir:Support",
     ],
 )
 
diff --git a/tensorflow/core/ir/importexport/BUILD b/tensorflow/core/ir/importexport/BUILD
index 5694f228b32b7b..007fd3de65aa3b 100644
--- a/tensorflow/core/ir/importexport/BUILD
+++ b/tensorflow/core/ir/importexport/BUILD
@@ -109,6 +109,7 @@ cc_library(
         "//tensorflow/core/platform:statusor",
         "@llvm-project//llvm:Support",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
         "@local_tsl//tsl/platform:ml_dtypes",
     ],
 )
diff --git a/tensorflow/core/ir/importexport/convert_attributes.cc b/tensorflow/core/ir/importexport/convert_attributes.cc
index a591d77afe4977..6e1fd89c355bdd 100644
--- a/tensorflow/core/ir/importexport/convert_attributes.cc
+++ b/tensorflow/core/ir/importexport/convert_attributes.cc
@@ -25,6 +25,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinAttributes.h"  // from @llvm-project
 #include "mlir/IR/Location.h"  // from @llvm-project
 #include "mlir/Support/DebugStringHelper.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "xla/status_macros.h"
 #include "tensorflow/core/framework/attr_value.pb.h"
 #include "tensorflow/core/framework/full_type.pb.h"
@@ -55,11 +56,11 @@ namespace {
 // Converts a location to the debug information for the node def.
 Status ConvertLocation(Location inst_loc,
                        NodeDef::ExperimentalDebugInfo* debug_info) {
-  if (auto call_site = inst_loc.dyn_cast<CallSiteLoc>()) {
-    if (auto name_loc = call_site.getCallee().dyn_cast<NameLoc>()) {
+  if (auto call_site = mlir::dyn_cast<CallSiteLoc>(inst_loc)) {
+    if (auto name_loc = mlir::dyn_cast<NameLoc>(call_site.getCallee())) {
       debug_info->add_original_node_names(name_loc.getName().data());
     }
-  } else if (auto fused = inst_loc.dyn_cast<FusedLoc>()) {
+  } else if (auto fused = mlir::dyn_cast<FusedLoc>(inst_loc)) {
     auto locations = fused.getLocations();
     if (locations.size() <= 1)
       return InvalidArgument("Expected experimental debug info.");
@@ -107,7 +108,7 @@ Status ConvertAttribute(FlatSymbolRefAttr attr, AttrValue* value) {
 
 Status ConvertAttribute(FuncAttr attr, bool remove_ref_type, AttrValue* value) {
   TF_RETURN_IF_ERROR(
-      ConvertAttribute(attr.getName().cast<FlatSymbolRefAttr>(), value));
+      ConvertAttribute(mlir::cast<FlatSymbolRefAttr>(attr.getName()), value));
   TF_RETURN_IF_ERROR(ConvertAttributes(attr.getAttrs().getValue(),
                                        /*attrs_to_ignore=*/{}, remove_ref_type,
                                        value->mutable_func()->mutable_attr()));
@@ -141,13 +142,13 @@ Status ConvertAttribute(const ArrayAttr& attr, bool remove_ref_type,
                         AttrValue* value) {
   auto* list = value->mutable_list();
   for (Attribute a : attr.getValue()) {
-    if (auto attr = a.dyn_cast<BoolAttr>()) {
+    if (auto attr = mlir::dyn_cast<BoolAttr>(a)) {
       list->add_b(attr.getValue());
-    } else if (auto attr = a.dyn_cast<IntegerAttr>()) {
+    } else if (auto attr = mlir::dyn_cast<IntegerAttr>(a)) {
       list->add_i(attr.getInt());
-    } else if (auto attr = a.dyn_cast<FloatAttr>()) {
+    } else if (auto attr = mlir::dyn_cast<FloatAttr>(a)) {
       list->add_f(attr.getValueAsDouble());
-    } else if (auto attr = a.dyn_cast<StringAttr>()) {
+    } else if (auto attr = mlir::dyn_cast<StringAttr>(a)) {
       AttrValue nested_value;
       TF_RETURN_IF_ERROR(ConvertAttribute(attr, &nested_value));
       switch (nested_value.value_case()) {
@@ -163,29 +164,29 @@ Status ConvertAttribute(const ArrayAttr& attr, bool remove_ref_type,
         default:
           return Unimplemented("Unhandled nested attribute!");
       }
-    } else if (auto attr = a.dyn_cast<ElementsAttr>()) {
+    } else if (auto attr = mlir::dyn_cast<ElementsAttr>(a)) {
       TensorProto tensor;
       TF_RETURN_IF_ERROR(ConvertToTensorProto(attr, &tensor));
       *list->add_tensor() = tensor;
-    } else if (auto attr = a.dyn_cast<FlatSymbolRefAttr>()) {
+    } else if (auto attr = mlir::dyn_cast<FlatSymbolRefAttr>(a)) {
       AttrValue attr_val;
       TF_RETURN_IF_ERROR(ConvertAttribute(attr, &attr_val));
       *list->add_func() = attr_val.func();
-    } else if (auto attr = a.dyn_cast<FuncAttr>()) {
+    } else if (auto attr = mlir::dyn_cast<FuncAttr>(a)) {
       AttrValue attr_val;
       TF_RETURN_IF_ERROR(ConvertAttribute(attr, remove_ref_type, &attr_val));
       *list->add_func() = attr_val.func();
-    } else if (auto attr = a.dyn_cast<TypeAttr>()) {
+    } else if (auto attr = mlir::dyn_cast<TypeAttr>(a)) {
       AttrValue attr_val;
       // For type attributes, we only propagate the element type.
       Type elt_type = attr.getValue();
-      if (auto shaped_type = elt_type.dyn_cast<ShapedType>()) {
+      if (auto shaped_type = mlir::dyn_cast<ShapedType>(elt_type)) {
         elt_type = shaped_type.getElementType();
       }
       TF_RETURN_IF_ERROR(
           ConvertAttribute(elt_type, remove_ref_type, &attr_val));
       list->add_type(attr_val.type());
-    } else if (auto attr = a.dyn_cast<ShapeAttr>()) {
+    } else if (auto attr = mlir::dyn_cast<ShapeAttr>(a)) {
       AttrValue attr_val;
       TF_RETURN_IF_ERROR(ConvertAttribute(attr, &attr_val));
       *list->add_shape() = attr_val.shape();
@@ -200,17 +201,17 @@ Status ConvertAttribute(const ArrayAttr& attr, bool remove_ref_type,
 
 absl::StatusOr<AttrValue> ConvertAttribute(Attribute attr) {
   AttrValue value;
-  if (auto symbol_ref = attr.dyn_cast<SymbolRefAttr>()) {
+  if (auto symbol_ref = mlir::dyn_cast<SymbolRefAttr>(attr)) {
     TF_RETURN_IF_ERROR(
-        ConvertAttribute(symbol_ref.cast<FlatSymbolRefAttr>(), &value));
+        ConvertAttribute(mlir::cast<FlatSymbolRefAttr>(symbol_ref), &value));
     return value;
   }
-  if (auto func_attr = attr.dyn_cast<FuncAttr>()) {
+  if (auto func_attr = mlir::dyn_cast<FuncAttr>(attr)) {
     TF_RETURN_IF_ERROR(
         ConvertAttribute(func_attr, /*remove_ref_type=*/false, &value));
     return value;
   }
-  if (attr.isa<AffineMapAttr>())
+  if (mlir::isa<AffineMapAttr>(attr))
     return Unimplemented("AffineMap attribute unimplemented");
   TF_RETURN_IF_ERROR(
       llvm::TypeSwitch<Attribute, Status>(attr)
@@ -251,11 +252,11 @@ Status ConvertAttributes(ArrayRef<NamedAttribute> attrs,
       name = mangling_util::DemangleAttributeName(name);
     }
     TF_ASSIGN_OR_RETURN(AttrValue value, ConvertAttribute(attr));
-    if (attr.isa<SymbolRefAttr>()) {
+    if (mlir::isa<SymbolRefAttr>(attr)) {
       func_call_attrs[std::string(name)] = value;
       continue;
     }
-    if (attr.isa<FuncAttr>()) {
+    if (mlir::isa<FuncAttr>(attr)) {
       func_call_attrs[std::string(name)] = value;
       continue;
     }
@@ -479,7 +480,8 @@ Status ConvertHandleData(ArrayAttr handle_data_arr,
                          tensorflow::OpDef::ArgDef* arg) {
   if (!handle_data_arr) return {};
   for (auto handle_data_attr : handle_data_arr.getAsRange<TypeAttr>()) {
-    TensorType handle_type = handle_data_attr.getValue().dyn_cast<TensorType>();
+    TensorType handle_type =
+        mlir::dyn_cast<TensorType>(handle_data_attr.getValue());
     if (!handle_type) {
       return InvalidArgument("Expected an array of tensor types, but got ",
                              debugString(handle_data_arr));
diff --git a/tensorflow/core/ir/importexport/convert_tensor.cc b/tensorflow/core/ir/importexport/convert_tensor.cc
index e3b801dc52860c..752bb8b44ba5a7 100644
--- a/tensorflow/core/ir/importexport/convert_tensor.cc
+++ b/tensorflow/core/ir/importexport/convert_tensor.cc
@@ -26,6 +26,7 @@ limitations under the License.
 #include "mlir/IR/Builders.h"  // from @llvm-project
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/IR/Types.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/core/framework/tensor.h"
 #include "tensorflow/core/framework/tensor.pb.h"
 #include "tensorflow/core/framework/tensor_shape.pb.h"
@@ -248,12 +249,12 @@ void ConvertToTensorShapeProto(ArrayRef<int64_t> shape,
 }
 
 PartialTensorShape ConvertTypeToTensorShape(const Type& type) {
-  if (type.isa<UnrankedTensorType>()) {
+  if (mlir::isa<UnrankedTensorType>(type)) {
     // An empty PartialTensorShape indicates an unranked tensor.
     return PartialTensorShape();
   }
 
-  if (auto tensor_type = type.dyn_cast<RankedTensorType>()) {
+  if (auto tensor_type = mlir::dyn_cast<RankedTensorType>(type)) {
     TensorShapeProto tensor_shape_proto;
     ConvertToTensorShapeProto(ConvertMlirShapeToTF(tensor_type.getShape()),
                               &tensor_shape_proto);
@@ -266,11 +267,11 @@ PartialTensorShape ConvertTypeToTensorShape(const Type& type) {
 }
 
 ShapeAttr ConvertTypeToTensorShapeAttr(const Type& type) {
-  if (type.isa<UnrankedTensorType>()) {
+  if (mlir::isa<UnrankedTensorType>(type)) {
     return ShapeAttr::get(type.getContext(), std::nullopt);
   }
 
-  if (auto tensor_type = type.dyn_cast<RankedTensorType>()) {
+  if (auto tensor_type = mlir::dyn_cast<RankedTensorType>(type)) {
     return ShapeAttr::get(
         type.getContext(),
         llvm::ArrayRef(ConvertMlirShapeToTF(tensor_type.getShape())));
@@ -439,10 +440,10 @@ Status ConvertToTensorProto(const ElementsAttr attr, TensorProto* output) {
   output->set_dtype(output_dtype);
   ConvertToTensorShapeProto(shape, output->mutable_tensor_shape());
 
-  if (auto tensor_attr = attr.dyn_cast<mlir::tf_type::TensorProtoAttr>())
+  if (auto tensor_attr = mlir::dyn_cast<mlir::tf_type::TensorProtoAttr>(attr))
     return ConvertTensorProtoAttr(tensor_attr, output);
 
-  auto dense_attr = attr.dyn_cast<DenseElementsAttr>();
+  auto dense_attr = mlir::dyn_cast<DenseElementsAttr>(attr);
   if (!dense_attr) return InvalidArgument("Unsupported elements attr");
 
   switch (output_dtype) {
@@ -508,7 +509,7 @@ Status ConvertToTensorProto(const ElementsAttr attr, TensorProto* output) {
                              output->mutable_tensor_content());
       break;
     case tensorflow::DT_STRING:
-      ConvertStringElementsAttr(dense_attr.cast<DenseStringElementsAttr>(),
+      ConvertStringElementsAttr(mlir::cast<DenseStringElementsAttr>(dense_attr),
                                 output->mutable_string_val());
       break;
     case tensorflow::DT_UINT8:
diff --git a/tensorflow/core/ir/importexport/convert_types.cc b/tensorflow/core/ir/importexport/convert_types.cc
index 26e21205460512..f733f1025ae3e1 100644
--- a/tensorflow/core/ir/importexport/convert_types.cc
+++ b/tensorflow/core/ir/importexport/convert_types.cc
@@ -22,6 +22,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/IR/Types.h"  // from @llvm-project
 #include "mlir/Support/DebugStringHelper.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/core/framework/types.h"
 #include "tensorflow/core/framework/types.pb.h"
 #include "tensorflow/core/ir/dialect.h"
@@ -127,7 +128,7 @@ Status ConvertScalarTypeToDataType(Type type, DataType* dtype) {
   } else if (type.isFloat8E5M2()) {
     *dtype = ::tensorflow::DT_FLOAT8_E5M2;
     return ::tensorflow::OkStatus();
-  } else if (auto itype = type.dyn_cast<IntegerType>()) {
+  } else if (auto itype = mlir::dyn_cast<IntegerType>(type)) {
     switch (itype.getWidth()) {
       case 1:
         *dtype = tensorflow::DT_BOOL;
@@ -156,7 +157,7 @@ Status ConvertScalarTypeToDataType(Type type, DataType* dtype) {
         return Unimplemented(
             absl::StrCat("Converting ", debugString(type), " to DataType"));
     }
-  } else if (auto complex_type = type.dyn_cast<ComplexType>()) {
+  } else if (auto complex_type = mlir::dyn_cast<ComplexType>(type)) {
     auto etype = complex_type.getElementType();
     if (etype.isF32()) {
       *dtype = tensorflow::DT_COMPLEX64;
@@ -182,7 +183,7 @@ Status ConvertScalarTypeToDataType(Type type, DataType* dtype) {
 }
 
 Status ConvertToDataType(Type type, DataType* dtype) {
-  if (auto stype = type.dyn_cast<ShapedType>()) {
+  if (auto stype = mlir::dyn_cast<ShapedType>(type)) {
     TF_RETURN_IF_ERROR(
         ConvertScalarTypeToDataType(stype.getElementType(), dtype));
   } else {
diff --git a/tensorflow/core/ir/importexport/functiondef_export.cc b/tensorflow/core/ir/importexport/functiondef_export.cc
index a274aac1b8ab27..6aa9f815e52885 100644
--- a/tensorflow/core/ir/importexport/functiondef_export.cc
+++ b/tensorflow/core/ir/importexport/functiondef_export.cc
@@ -21,6 +21,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinAttributes.h"  // from @llvm-project
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/IR/OperationSupport.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/core/framework/attr_value.pb.h"
 #include "tensorflow/core/framework/node_def.pb.h"
 #include "tensorflow/core/framework/op_def.pb.h"
@@ -51,9 +52,9 @@ namespace tfg {
 static absl::StatusOr<std::string> GetValueName(Value operand,
                                                 Type control_ty) {
   bool is_control = (operand.getType() == control_ty);
-  OpResult op_result = operand.dyn_cast<OpResult>();
+  OpResult op_result = mlir::dyn_cast<OpResult>(operand);
   if (!op_result) {
-    BlockArgument block_operand = operand.dyn_cast<BlockArgument>();
+    BlockArgument block_operand = mlir::dyn_cast<BlockArgument>(operand);
     int arg_num = block_operand.getArgNumber();
 
     // Function arguments are coming as pair: the even are the actual tensors
@@ -174,7 +175,8 @@ absl::StatusOr<FunctionDef> ConvertGenericFunctionToFunctionDef(
     for (NamedAttribute attr : attrs) {
       OpDef_AttrDef *func_attr = signature->add_attr();
       func_attr->set_name(attr.getName().str());
-      DictionaryAttr dict_attr = attr.getValue().dyn_cast<DictionaryAttr>();
+      DictionaryAttr dict_attr =
+          mlir::dyn_cast<DictionaryAttr>(attr.getValue());
       if (!dict_attr) return InvalidArgument("Expects dict attribute");
       if (StringAttr type = dict_attr.getAs<StringAttr>("function_type"))
         func_attr->set_type(type.getValue().str());
@@ -198,7 +200,7 @@ absl::StatusOr<FunctionDef> ConvertGenericFunctionToFunctionDef(
   if (auto control_outputs =
           func_op->getAttrOfType<ArrayAttr>("control_output")) {
     for (Attribute attr : control_outputs) {
-      StringAttr output = attr.dyn_cast<StringAttr>();
+      StringAttr output = mlir::dyn_cast<StringAttr>(attr);
       if (!output)
         return InvalidArgument(
             "Can't export function with non-string \"control_output\" "
@@ -216,7 +218,7 @@ absl::StatusOr<FunctionDef> ConvertGenericFunctionToFunctionDef(
     if (arg_num >= args_attr.size())
       return InvalidArgument("Can't export function ", func_op.getName().str(),
                              " because missing attributes for arg #", arg_num);
-    DictionaryAttr arg_attrs = args_attr[arg_num].cast<DictionaryAttr>();
+    DictionaryAttr arg_attrs = mlir::cast<DictionaryAttr>(args_attr[arg_num]);
     FunctionDef::ArgAttrs func_def_arg_attrs;
     TF_RETURN_WITH_CONTEXT_IF_ERROR(
         ExportArgDef(arg, arg_attrs, &func_def_arg_attrs),
@@ -242,7 +244,7 @@ absl::StatusOr<FunctionDef> ConvertGenericFunctionToFunctionDef(
       return InvalidArgument("Can't export function ", func_op.getName().str(),
                              " because missing attributes for result #",
                              res_num);
-    auto res_attrs = results_attr[res_num].cast<DictionaryAttr>();
+    auto res_attrs = mlir::cast<DictionaryAttr>(results_attr[res_num]);
     auto name = res_attrs.getAs<StringAttr>("tfg.name");
     if (!name)
       return InvalidArgument(
diff --git a/tensorflow/core/ir/importexport/functiondef_import.cc b/tensorflow/core/ir/importexport/functiondef_import.cc
index 74bc67fcf077d5..7246cd35378eb3 100644
--- a/tensorflow/core/ir/importexport/functiondef_import.cc
+++ b/tensorflow/core/ir/importexport/functiondef_import.cc
@@ -24,6 +24,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinAttributes.h"  // from @llvm-project
 #include "mlir/IR/MLIRContext.h"  // from @llvm-project
 #include "mlir/IR/OperationSupport.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/core/framework/attr_value.pb.h"
 #include "tensorflow/core/framework/node_def.pb.h"
 #include "tensorflow/core/framework/op_def.pb.h"
@@ -504,7 +505,7 @@ Status ImportGenericFunction(
     }
     TF_ASSIGN_OR_RETURN(Value result, value_manager.GetValueOrCreatePlaceholder(
                                           (Twine("^") + ret_val.second).str()));
-    if (!result.getType().isa<ControlType>())
+    if (!mlir::isa<ControlType>(result.getType()))
       return InvalidArgument("failed to map returned value ", ret_val.second,
                              ", isn't a control output");
     ret_vals[func.ret_size() + position->second] = result;
diff --git a/tensorflow/core/ir/importexport/graphdef_export.cc b/tensorflow/core/ir/importexport/graphdef_export.cc
index bc0df8d0160628..54da202ddfdf2f 100644
--- a/tensorflow/core/ir/importexport/graphdef_export.cc
+++ b/tensorflow/core/ir/importexport/graphdef_export.cc
@@ -290,12 +290,12 @@ absl::StatusOr<std::optional<GradientDef>> GraphDefExporter::ExportFunction(
 
   // Convert the arguments.
   for (int i = 0, e = func.getNumArguments(); i < e; i += 2) {
-    auto attrs = func.getArgAttrs().value()[i].cast<DictionaryAttr>();
+    auto attrs = mlir::cast<DictionaryAttr>(func.getArgAttrs().value()[i]);
     TF_ASSIGN_OR_RETURN(OpDef::ArgDef &arg = *signature->add_input_arg(),
                         ConvertArgumentAttributes(attrs));
     DataType dtype;
     TF_RETURN_IF_ERROR(ConvertToDataType(
-        func.getArgument(i).getType().cast<TensorType>().getElementType(),
+        mlir::cast<TensorType>(func.getArgument(i).getType()).getElementType(),
         &dtype));
     arg.set_type(dtype);
     // Convert the attributes.
@@ -317,7 +317,7 @@ absl::StatusOr<std::optional<GradientDef>> GraphDefExporter::ExportFunction(
                         ConvertArgumentAttributes(std::get<1>(it)));
     DataType dtype;
     TF_RETURN_IF_ERROR(ConvertToDataType(
-        std::get<0>(it).cast<TensorType>().getElementType(), &dtype));
+        mlir::cast<TensorType>(std::get<0>(it)).getElementType(), &dtype));
     arg.set_type(dtype);
     // Map the result.
     TF_ASSIGN_OR_RETURN((*def->mutable_ret())[arg.name()],
@@ -333,7 +333,7 @@ absl::StatusOr<std::optional<GradientDef>> GraphDefExporter::ExportFunction(
     if (attrs.empty())
       return InvalidArgument("Control result is missing 'tfg.name'");
     assert(attrs.begin()->getName() == dialect_->getTfgNameAttrIdentifier());
-    std::string name = attrs.begin()->getValue().cast<StringAttr>().str();
+    std::string name = mlir::cast<StringAttr>(attrs.begin()->getValue()).str();
     signature->add_control_output(name);
     // Map the control result.
     TF_ASSIGN_OR_RETURN(std::string value_name,
@@ -383,12 +383,13 @@ static void ExtractExperimentalDebugInfoFromLocation(
     debug_info->add_original_node_names(node.str());
     if (!func.empty()) debug_info->add_original_func_names(func.str());
   };
-  if (auto fused = inst_loc.dyn_cast<mlir::FusedLoc>()) {
+  if (auto fused = mlir::dyn_cast<mlir::FusedLoc>(inst_loc)) {
     for (Location loc : fused.getLocations())
-      if (auto name_loc = loc.dyn_cast<mlir::NameLoc>()) add_name_loc(name_loc);
+      if (auto name_loc = mlir::dyn_cast<mlir::NameLoc>(loc))
+        add_name_loc(name_loc);
     return;
   }
-  if (auto name_loc = inst_loc.dyn_cast<mlir::NameLoc>())
+  if (auto name_loc = mlir::dyn_cast<mlir::NameLoc>(inst_loc))
     add_name_loc(name_loc);
 }
 
@@ -437,7 +438,7 @@ Status ConvertToNodeDef(
   }
 
   // Export the location as debug info.
-  if (!op->getLoc().isa<UnknownLoc>()) {
+  if (!mlir::isa<UnknownLoc>(op->getLoc())) {
     ExtractExperimentalDebugInfoFromLocation(
         op->getLoc(), node->mutable_experimental_debug_info());
     if (node->experimental_debug_info().original_node_names().empty())
@@ -464,15 +465,14 @@ static absl::StatusOr<std::string> GetValueName(
   std::string name;
   bool is_control = value.getType() == dialect->getControlType();
 
-  if (auto arg = value.dyn_cast<BlockArgument>()) {
+  if (auto arg = mlir::dyn_cast<BlockArgument>(value)) {
     auto func = dyn_cast<GraphFuncOp>(arg.getOwner()->getParentOp());
     if (!func)
       return InvalidArgument("Expected block argument owner to be tfg.func");
     // If the block argument is a control token, use the attributes of the
     // associated data argument (which preceeds it).
-    auto attrs = func.getArgAttrs()
-                     .value()[arg.getArgNumber() - is_control]
-                     .cast<DictionaryAttr>();
+    auto attrs = mlir::cast<DictionaryAttr>(
+        func.getArgAttrs().value()[arg.getArgNumber() - is_control]);
     auto name_attr =
         attrs.getAs<StringAttr>(dialect->getTfgNameAttrIdentifier());
     if (!name_attr) {
@@ -486,7 +486,7 @@ static absl::StatusOr<std::string> GetValueName(
     return name;
   }
 
-  auto result = value.cast<OpResult>();
+  auto result = mlir::cast<OpResult>(value);
   auto name_attr = result.getOwner()->getAttrOfType<StringAttr>(
       dialect->getNameAttrIdentifier());
   if (!name_attr)
@@ -535,12 +535,12 @@ absl::StatusOr<std::string> GraphDefExporter::GetEdgeName(Value value,
 static absl::StatusOr<unsigned int> GetOutputSegmentSize(
     Operation *op, const OpDef::ArgDef &arg) {
   if (!arg.type_list_attr().empty()) {
-    if (auto v = op->getAttr(arg.type_list_attr()).dyn_cast<ArrayAttr>())
+    if (auto v = mlir::dyn_cast<ArrayAttr>(op->getAttr(arg.type_list_attr())))
       return v.size();
     return InvalidArgument("Type attr not found: ", arg.type_list_attr());
   }
   if (arg.number_attr().empty()) return 1;
-  if (auto v = op->getAttr(arg.number_attr()).dyn_cast<IntegerAttr>())
+  if (auto v = mlir::dyn_cast<IntegerAttr>(op->getAttr(arg.number_attr())))
     return v.getValue().getZExtValue();
   return InvalidArgument("Type attr not found: ", arg.number_attr());
 }
diff --git a/tensorflow/core/ir/importexport/graphdef_import.cc b/tensorflow/core/ir/importexport/graphdef_import.cc
index da2ebcf2d9f0c3..9e8f244cd9c9f3 100644
--- a/tensorflow/core/ir/importexport/graphdef_import.cc
+++ b/tensorflow/core/ir/importexport/graphdef_import.cc
@@ -710,10 +710,10 @@ absl::StatusOr<unsigned int> GraphDefImporter::ArgNumType(
     SmallVectorImpl<Type> &types) {
   // Check whether a type list attribute is specified.
   if (!arg_def.type_list_attr().empty()) {
-    if (auto v =
-            attrs.get(arg_def.type_list_attr()).dyn_cast_or_null<ArrayAttr>()) {
+    if (auto v = mlir::dyn_cast_or_null<ArrayAttr>(
+            attrs.get(arg_def.type_list_attr()))) {
       for (Attribute attr : v) {
-        if (auto dtype = attr.dyn_cast<TypeAttr>()) {
+        if (auto dtype = mlir::dyn_cast<TypeAttr>(attr)) {
           types.push_back(UnrankedTensorType::get(dtype.getValue()));
         } else {
           return InvalidArgument("Expected '", arg_def.type_list_attr(),
@@ -728,8 +728,8 @@ absl::StatusOr<unsigned int> GraphDefImporter::ArgNumType(
   unsigned num = 1;
   // Check whether a number attribute is specified.
   if (!arg_def.number_attr().empty()) {
-    if (auto v =
-            attrs.get(arg_def.number_attr()).dyn_cast_or_null<IntegerAttr>()) {
+    if (auto v = mlir::dyn_cast_or_null<IntegerAttr>(
+            attrs.get(arg_def.number_attr()))) {
       num = v.getValue().getZExtValue();
     } else {
       return NotFound("Type attr not found: ", arg_def.number_attr());
@@ -744,7 +744,8 @@ absl::StatusOr<unsigned int> GraphDefImporter::ArgNumType(
     return InvalidArgument("Arg '", arg_def.name(),
                            "' has invalid type and no type attribute");
   } else {
-    if (auto v = attrs.get(arg_def.type_attr()).dyn_cast_or_null<TypeAttr>()) {
+    if (auto v =
+            mlir::dyn_cast_or_null<TypeAttr>(attrs.get(arg_def.type_attr()))) {
       dtype = v.getValue();
     } else {
       return NotFound("Type attr not found: ", arg_def.type_attr());
diff --git a/tensorflow/core/ir/interfaces.cc b/tensorflow/core/ir/interfaces.cc
index a8b84af5e1eafb..a9f69eba6bbff0 100644
--- a/tensorflow/core/ir/interfaces.cc
+++ b/tensorflow/core/ir/interfaces.cc
@@ -20,6 +20,7 @@ limitations under the License.
 #include "mlir/IR/Region.h"  // from @llvm-project
 #include "mlir/IR/Value.h"  // from @llvm-project
 #include "mlir/Interfaces/SideEffectInterfaces.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/core/ir/ops.h"
 #include "tensorflow/core/ir/types/dialect.h"
 
@@ -30,7 +31,7 @@ LogicalResult ControlArgumentInterface::verifyRegion(Operation *op,
                                                      Region &region) {
   unsigned num_ctl = 0, num_data = 0;
   for (BlockArgument arg : region.getArguments()) {
-    bool is_ctl = arg.getType().isa<tf_type::ControlType>();
+    bool is_ctl = mlir::isa<tf_type::ControlType>(arg.getType());
     num_ctl += is_ctl;
     num_data += !is_ctl;
   }
diff --git a/tensorflow/core/ir/ops.cc b/tensorflow/core/ir/ops.cc
index 0814e1e4af4b35..830fb59e8e3fdd 100644
--- a/tensorflow/core/ir/ops.cc
+++ b/tensorflow/core/ir/ops.cc
@@ -69,10 +69,11 @@ static void GenericGetAsmResultNames(Operation* op,
   // We only name the results when there are results to name, an op like `print`
   // which does not have results will just use the `ctl` name for the control
   // output.
-  if (op->getNumResults() > 1 && !op->getResult(0).getType().isa<ControlType>())
+  if (op->getNumResults() > 1 &&
+      !mlir::isa<ControlType>(op->getResult(0).getType()))
     set_name_fn(op->getResult(0), op->getName().stripDialect());
   for (Value result : op->getResults()) {
-    if (result.getType().isa<ControlType>()) {
+    if (mlir::isa<ControlType>(result.getType())) {
       set_name_fn(op->getResult(op->getNumResults() - 1), "ctl");
       break;
     }
@@ -310,8 +311,8 @@ static ParseResult ParseCustomTfOp(OpAsmParser& parser,
   llvm::SMLoc loc = parser.getCurrentLocation();
   Type control_type = ControlType::get(context);
   if (failed(parser.parseOptionalColonTypeList(arg_types))) return failure();
-  if (arg_types.size() == 1 && arg_types.front().isa<FunctionType>()) {
-    auto funcType = arg_types.front().cast<FunctionType>();
+  if (arg_types.size() == 1 && mlir::isa<FunctionType>(arg_types.front())) {
+    auto funcType = mlir::cast<FunctionType>(arg_types.front());
     if (funcType.getNumInputs() != numNonControlOperands)
       return parser.emitError(loc)
              << "got " << numNonControlOperands
@@ -398,8 +399,9 @@ bool GraphFuncOp::isMarkedForCompilation() {
   auto is_enabled = [this](StringRef attr_name) -> bool {
     Attribute attr = (*this)->getAttr(attr_name);
     if (!attr) return false;
-    if (auto bool_attr = attr.dyn_cast<BoolAttr>()) return bool_attr.getValue();
-    if (auto str_attr = attr.dyn_cast<StringAttr>())
+    if (auto bool_attr = mlir::dyn_cast<BoolAttr>(attr))
+      return bool_attr.getValue();
+    if (auto str_attr = mlir::dyn_cast<StringAttr>(attr))
       return !str_attr.getValue().empty();
     return false;
   };
@@ -673,7 +675,7 @@ void GraphFuncOp::print(OpAsmPrinter& p) {
     p.printOperand(getArgument(i));
     p << ": ";
     p.printType(arg_types[i]);
-    if (auto arg_attrs = args_attr[i].dyn_cast<DictionaryAttr>())
+    if (auto arg_attrs = mlir::dyn_cast<DictionaryAttr>(args_attr[i]))
       p.printOptionalAttrDict(arg_attrs.getValue());
     if (i != e - 2) {
       p << ", ";
@@ -691,7 +693,7 @@ void GraphFuncOp::print(OpAsmPrinter& p) {
     ArrayAttr results_attr = getAllResultAttrs();
     for (int i = 0, e = result_types.size(); i < e; ++i) {
       p.printType(result_types[i]);
-      if (auto result_attrs = results_attr[i].dyn_cast<DictionaryAttr>())
+      if (auto result_attrs = mlir::dyn_cast<DictionaryAttr>(results_attr[i]))
         p.printOptionalAttrDict(result_attrs.getValue());
       if (i != e - 1) {
         p << ", ";
@@ -761,7 +763,8 @@ void GraphFuncOp::getAsmBlockArgumentNames(Region& region,
   ArrayAttr args_attr = getAllArgAttrs();
   if (!args_attr || args_attr.size() != args.size()) return;
   for (int arg_num = 0, e = args.size(); arg_num < e; arg_num += 2) {
-    DictionaryAttr arg_attrs = args_attr[arg_num].dyn_cast<DictionaryAttr>();
+    DictionaryAttr arg_attrs =
+        mlir::dyn_cast<DictionaryAttr>(args_attr[arg_num]);
     if (!arg_attrs) continue;
     if (auto strAttr = arg_attrs.getAs<StringAttr>("tfg.name")) {
       set_name_fn(args[arg_num], strAttr.getValue());
@@ -1053,7 +1056,7 @@ static LogicalResult VerifyCaseLikeOp(CaseLikeOp op,
   TypeRange func_args = ins->drop_front();
 
   for (const auto& it : llvm::enumerate(op.getBranches())) {
-    SymbolRefAttr func_name = it.value().template cast<FuncAttr>().getName();
+    SymbolRefAttr func_name = mlir::cast<FuncAttr>(it.value()).getName();
     auto func =
         symbol_table.lookupNearestSymbolFrom<GraphFuncOp>(op, func_name);
     if (func && failed(VerifySignature(func, op, func_args, *outs,
@@ -1126,7 +1129,7 @@ static LogicalResult VerifyPreservedAttrs(Operation* op,
   assert(op->getNumRegions() == preserved_attrs.size());
   for (auto it : llvm::zip(preserved_attrs, op->getRegions())) {
     // Preserved attributes for a particular region may not exist.
-    auto attrs = std::get<0>(it).dyn_cast_or_null<RegionAttr>();
+    auto attrs = mlir::dyn_cast_or_null<RegionAttr>(std::get<0>(it));
     if (!attrs) continue;
     Region& region = std::get<1>(it);
 
@@ -1195,7 +1198,7 @@ static LogicalResult VerifyIfLikeRegionOp(IfLikeRegionOp op) {
 // TODO(jeffniu): Incorporate the other cases of `tf.ToBool`.
 static std::optional<bool> GetStaticallyKnownBranch(Attribute cond_attr) {
   // Only handle the case of a scalar tensor of i1.
-  auto cond = cond_attr.dyn_cast_or_null<ElementsAttr>();
+  auto cond = mlir::dyn_cast_or_null<ElementsAttr>(cond_attr);
   if (cond && cond.getNumElements() == 1 &&
       cond.getElementType().isSignlessInteger(1))
     return cond.getSplatValue<bool>();
@@ -1275,7 +1278,7 @@ static LogicalResult VerifyCaseLikeRegionOp(CaseLikeRegionOp op) {
 // try to narrow it to a statically known branch index.
 static std::optional<unsigned> GetStaticallyKnownCaseBranch(
     Attribute branch_attr) {
-  auto branch = branch_attr.dyn_cast_or_null<ElementsAttr>();
+  auto branch = mlir::dyn_cast_or_null<ElementsAttr>(branch_attr);
   if (branch && branch.getNumElements() == 1 &&
       branch.getElementType().isSignlessInteger(32))
     return branch.getSplatValue<unsigned>();
@@ -1344,7 +1347,7 @@ static LogicalResult VerifyLoopRegionArgs(Operation* op, Region& region) {
   // the first half of the arguments are not control tokens, then we know for
   // sure that the second half is only control tokens.
   for (BlockArgument data : GetLoopRegionDataArgs(region))
-    if (data.getType().isa<ControlType>())
+    if (mlir::isa<ControlType>(data.getType()))
       return arg_error(data) << "should not be a control token";
   return success();
 }
@@ -1412,7 +1415,7 @@ LogicalResult ForRegionOp::verify() {
         "expected the body block to have at least have the loop index as an "
         "argument");
   }
-  auto index = args.front().getType().dyn_cast<TensorType>();
+  auto index = mlir::dyn_cast<TensorType>(args.front().getType());
   if (!index || !index.getElementType().isSignlessInteger(32)) {
     return emitOpError(
         "expected first body block argument to be an i32 tensor");
@@ -1467,8 +1470,9 @@ bool FunctionTable::MayBeCall(Operation* op) const {
   if (IsLegacyCall(op)) return true;
   // The operation might be a call if it references a symbol.
   bool references_symbol = false;
-  op->getAttrDictionary().walk(
-      [&](Attribute attr) { references_symbol |= attr.isa<SymbolRefAttr>(); });
+  op->getAttrDictionary().walk([&](Attribute attr) {
+    references_symbol |= mlir::isa<SymbolRefAttr>(attr);
+  });
   return references_symbol;
 }
 
diff --git a/tensorflow/core/ir/tf_op_names.cc b/tensorflow/core/ir/tf_op_names.cc
index 0aadaf9288863a..bd43c99d84b397 100644
--- a/tensorflow/core/ir/tf_op_names.cc
+++ b/tensorflow/core/ir/tf_op_names.cc
@@ -15,6 +15,7 @@ limitations under the License.
 
 #include "mlir/IR/Operation.h"  // from @llvm-project
 #include "mlir/IR/OperationSupport.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/core/ir/dialect.h"
 #include "tensorflow/core/ir/tf_op_wrapper.h"
 
@@ -26,7 +27,7 @@ bool TFGraphDialect::IsAdd(TFOp op) const {
 
   if (op_name == add_v2_) return true;
   if (op_name == add_)
-    return !op->getAttrOfType<TypeAttr>("T").getValue().isa<StringType>();
+    return !mlir::isa<StringType>(op->getAttrOfType<TypeAttr>("T").getValue());
   return false;
 }
 
diff --git a/tensorflow/core/ir/tf_op_wrapper.h b/tensorflow/core/ir/tf_op_wrapper.h
index 1bf02d90877c66..36a3964d45ea7d 100644
--- a/tensorflow/core/ir/tf_op_wrapper.h
+++ b/tensorflow/core/ir/tf_op_wrapper.h
@@ -22,6 +22,7 @@ limitations under the License.
 #include "mlir/IR/Operation.h"  // from @llvm-project
 #include "mlir/IR/OperationSupport.h"  // from @llvm-project
 #include "mlir/IR/TypeRange.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/core/ir/dialect.h"
 #include "tensorflow/core/ir/types/dialect.h"
 #include "tensorflow/core/ir/utility.h"
@@ -38,7 +39,7 @@ class ControlRetIterator final
                                    ValueIteratorT, Value>::mapped_iterator_base;
 
   Value mapElement(Value value) const {
-    return value.getType().isa<tf_type::ControlType>()
+    return mlir::isa<tf_type::ControlType>(value.getType())
                ? value
                : tfg::LookupControlDependency(value);
   }
diff --git a/tensorflow/core/ir/tf_op_wrapper_test.cc b/tensorflow/core/ir/tf_op_wrapper_test.cc
index 1eaf6731e670fc..b8bc7bfd55c86d 100644
--- a/tensorflow/core/ir/tf_op_wrapper_test.cc
+++ b/tensorflow/core/ir/tf_op_wrapper_test.cc
@@ -23,6 +23,7 @@ limitations under the License.
 #include "mlir/IR/OperationSupport.h"  // from @llvm-project
 #include "mlir/IR/OwningOpRef.h"  // from @llvm-project
 #include "mlir/Parser/Parser.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/core/ir/dialect.h"
 #include "tensorflow/core/ir/ops.h"
 #include "tensorflow/core/platform/test.h"
@@ -84,7 +85,7 @@ TEST(TFOpWrapper, ControlOperands) {
   EXPECT_EQ(ctls.size(), 2u);
 
   OperandRange::iterator ctl_it = llvm::find_if(operands, [](Value operand) {
-    return operand.getType().isa<ControlType>();
+    return mlir::isa<ControlType>(operand.getType());
   });
   EXPECT_NE(ctl_it, operands.end());
   EXPECT_EQ(data.end(), ctl_it);
@@ -184,7 +185,7 @@ TEST(TFOpWrapper, ValueControlRet) {
   // Value with ControlType will be the same.
   EXPECT_EQ(ret_range[2], const_op.controlRet());
 
-  for (Value v : ret_range) EXPECT_TRUE(v.getType().isa<ControlType>());
+  for (Value v : ret_range) EXPECT_TRUE(mlir::isa<ControlType>(v.getType()));
 }
 
 }  // namespace
diff --git a/tensorflow/core/ir/types/BUILD b/tensorflow/core/ir/types/BUILD
index 2181219addb51f..18bb1541d76662 100644
--- a/tensorflow/core/ir/types/BUILD
+++ b/tensorflow/core/ir/types/BUILD
@@ -123,5 +123,6 @@ tf_cc_test(
         "//tensorflow/core:test_main",
         "@llvm-project//mlir:IR",
         "@llvm-project//mlir:Parser",
+        "@llvm-project//mlir:Support",
     ],
 )
diff --git a/tensorflow/core/ir/types/dialect.cc b/tensorflow/core/ir/types/dialect.cc
index 80fd703bdf1c29..bd693656cf6fbe 100644
--- a/tensorflow/core/ir/types/dialect.cc
+++ b/tensorflow/core/ir/types/dialect.cc
@@ -38,6 +38,7 @@ limitations under the License.
 #include "mlir/IR/MLIRContext.h"  // from @llvm-project
 #include "mlir/IR/OpImplementation.h"  // from @llvm-project
 #include "mlir/IR/OperationSupport.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 
 #define GET_ATTRDEF_CLASSES
@@ -274,7 +275,7 @@ static void RawFullTypeAttrPrint(FullTypeAttr tfattr, AsmPrinter& printer) {
   if (!tfattr.getArgs().empty()) {
     printer << "<";
     llvm::interleaveComma(tfattr.getArgs(), printer, [&](Attribute arg) {
-      if (auto t = arg.dyn_cast<FullTypeAttr>())
+      if (auto t = mlir::dyn_cast<FullTypeAttr>(arg))
         RawFullTypeAttrPrint(t, printer);
       else
         printer << "<<INVALID ARG>>";
@@ -320,7 +321,7 @@ Attribute FuncAttr::parse(AsmParser& parser, Type type) {
     parser.emitError(loc) << "expected symbol while parsing tf.func attribute";
     return {};
   }
-  if (auto func_name_str = name.dyn_cast<StringAttr>()) {
+  if (auto func_name_str = mlir::dyn_cast<StringAttr>(name)) {
     if (!func_name_str.getValue().empty()) {
       parser.emitError(loc)
           << "expected empty string or symbol while parsing tf.func "
@@ -329,20 +330,20 @@ Attribute FuncAttr::parse(AsmParser& parser, Type type) {
     }
     name = SymbolRefAttr::get(parser.getContext(), "");
   }
-  if (!name.isa<SymbolRefAttr>()) {
+  if (!mlir::isa<SymbolRefAttr>(name)) {
     parser.emitError(loc) << "expected symbol while parsing tf.func attribute";
     return {};
   }
   if (failed(parser.parseComma())) return {};
   loc = parser.getCurrentLocation();
-  if (failed(parser.parseAttribute(dict)) || !dict.isa<DictionaryAttr>()) {
+  if (failed(parser.parseAttribute(dict)) || !mlir::isa<DictionaryAttr>(dict)) {
     parser.emitError(loc)
         << "expected Dictionary attribute while parsing tf.func attribute";
     return {};
   }
   if (failed(parser.parseGreater())) return {};
-  return FuncAttr::get(parser.getContext(), name.cast<SymbolRefAttr>(),
-                       dict.cast<DictionaryAttr>());
+  return FuncAttr::get(parser.getContext(), mlir::cast<SymbolRefAttr>(name),
+                       mlir::cast<DictionaryAttr>(dict));
 }
 
 void PlaceholderAttr::print(AsmPrinter& os) const {
@@ -455,7 +456,7 @@ namespace {
 // Returns the shape of the given value if it's ranked; returns std::nullopt
 // otherwise.
 std::optional<ArrayRef<int64_t>> GetShape(Value value) {
-  auto shaped_type = value.getType().cast<ShapedType>();
+  auto shaped_type = mlir::cast<ShapedType>(value.getType());
   if (shaped_type.hasRank()) return shaped_type.getShape();
   return std::nullopt;
 }
@@ -516,13 +517,13 @@ bool TensorFlowType::classof(Type type) {
   return llvm::isa<TFTypeDialect>(type.getDialect());
 }
 bool TensorFlowRefType::classof(Type type) {
-  return type.isa<
+  return mlir::isa<
 #define HANDLE_TF_TYPE(tftype, enumerant, name)
 #define HANDLE_TF_REF_TYPE(tftype, enumerant, name) tftype##Type,
 #define HANDLE_LAST_TF_TYPE(tftype, enumerant, name) tftype##Type
 // NOLINTNEXTLINE
 #include "tensorflow/core/ir/types/types.def"
-      >();
+      >(type);
 }
 
 TensorFlowType TensorFlowRefType::get(Type type) {
@@ -540,7 +541,7 @@ TensorFlowType TensorFlowRefType::get(Type type) {
     return Float8E4M3FNRefType::get(ctx);
   } else if (type.isFloat8E5M2()) {
     return Float8E5M2RefType::get(ctx);
-  } else if (auto complex_type = type.dyn_cast<ComplexType>()) {
+  } else if (auto complex_type = mlir::dyn_cast<ComplexType>(type)) {
     Type etype = complex_type.getElementType();
     if (etype.isF32()) {
       return Complex64RefType::get(ctx);
@@ -548,7 +549,7 @@ TensorFlowType TensorFlowRefType::get(Type type) {
       return Complex128RefType::get(ctx);
     }
     llvm_unreachable("unexpected complex type");
-  } else if (auto itype = type.dyn_cast<IntegerType>()) {
+  } else if (auto itype = mlir::dyn_cast<IntegerType>(type)) {
     switch (itype.getWidth()) {
       case 1:
         return BoolRefType::get(ctx);
@@ -583,30 +584,34 @@ TensorFlowType TensorFlowRefType::get(Type type) {
 
 Type TensorFlowRefType::RemoveRef() {
   MLIRContext* ctx = getContext();
-  if (isa<HalfRefType>()) return FloatType::getF16(ctx);
-  if (isa<FloatRefType>()) return FloatType::getF32(ctx);
-  if (isa<DoubleRefType>()) return FloatType::getF64(ctx);
-  if (isa<Bfloat16RefType>()) return FloatType::getBF16(ctx);
-  if (isa<Float8E4M3FNType>()) return FloatType::getFloat8E4M3FN(ctx);
-  if (isa<Float8E5M2Type>()) return FloatType::getFloat8E5M2(ctx);
-  if (isa<BoolRefType>()) return IntegerType::get(ctx, 1);
-  if (isa<Int4RefType>()) return IntegerType::get(ctx, 4, IntegerType::Signed);
-  if (isa<Int8RefType>()) return IntegerType::get(ctx, 8);
-  if (isa<Int16RefType>()) return IntegerType::get(ctx, 16);
-  if (isa<Int32RefType>()) return IntegerType::get(ctx, 32);
-  if (isa<Int64RefType>()) return IntegerType::get(ctx, 64);
-  if (isa<Uint4RefType>())
+  if (mlir::isa<HalfRefType>(*this)) return FloatType::getF16(ctx);
+  if (mlir::isa<FloatRefType>(*this)) return FloatType::getF32(ctx);
+  if (mlir::isa<DoubleRefType>(*this)) return FloatType::getF64(ctx);
+  if (mlir::isa<Bfloat16RefType>(*this)) return FloatType::getBF16(ctx);
+  if (mlir::isa<Float8E4M3FNType>(*this))
+    return FloatType::getFloat8E4M3FN(ctx);
+  if (mlir::isa<Float8E5M2Type>(*this)) return FloatType::getFloat8E5M2(ctx);
+  if (mlir::isa<BoolRefType>(*this)) return IntegerType::get(ctx, 1);
+  if (mlir::isa<Int4RefType>(*this))
+    return IntegerType::get(ctx, 4, IntegerType::Signed);
+  if (mlir::isa<Int8RefType>(*this)) return IntegerType::get(ctx, 8);
+  if (mlir::isa<Int16RefType>(*this)) return IntegerType::get(ctx, 16);
+  if (mlir::isa<Int32RefType>(*this)) return IntegerType::get(ctx, 32);
+  if (mlir::isa<Int64RefType>(*this)) return IntegerType::get(ctx, 64);
+  if (mlir::isa<Uint4RefType>(*this))
     return IntegerType::get(ctx, 4, IntegerType::Unsigned);
-  if (isa<Uint8RefType>())
+  if (mlir::isa<Uint8RefType>(*this))
     return IntegerType::get(ctx, 8, IntegerType::Unsigned);
-  if (isa<Uint16RefType>())
+  if (mlir::isa<Uint16RefType>(*this))
     return IntegerType::get(ctx, 16, IntegerType::Unsigned);
-  if (isa<Uint32RefType>())
+  if (mlir::isa<Uint32RefType>(*this))
     return IntegerType::get(ctx, 32, IntegerType::Unsigned);
-  if (isa<Uint64RefType>())
+  if (mlir::isa<Uint64RefType>(*this))
     return IntegerType::get(ctx, 64, IntegerType::Unsigned);
-  if (isa<Complex64RefType>()) return ComplexType::get(FloatType::getF32(ctx));
-  if (isa<Complex128RefType>()) return ComplexType::get(FloatType::getF64(ctx));
+  if (mlir::isa<Complex64RefType>(*this))
+    return ComplexType::get(FloatType::getF32(ctx));
+  if (mlir::isa<Complex128RefType>(*this))
+    return ComplexType::get(FloatType::getF64(ctx));
 #define HANDLE_TF_TYPE(tftype, enumerant, name) \
   if (isa<tftype##RefType>()) return tftype##Type::get(ctx);
 
@@ -617,32 +622,32 @@ Type TensorFlowRefType::RemoveRef() {
 }
 
 bool TensorFlowTypeWithSubtype::classof(Type type) {
-  return type.isa<ResourceType, VariantType>();
+  return mlir::isa<ResourceType, VariantType>(type);
 }
 
 Type TensorFlowTypeWithSubtype::RemoveSubtypes() {
   MLIRContext* ctx = getContext();
-  if (isa<VariantType>()) return VariantType::get(ctx);
-  if (isa<ResourceType>()) return ResourceType::get(ctx);
+  if (mlir::isa<VariantType>(*this)) return VariantType::get(ctx);
+  if (mlir::isa<ResourceType>(*this)) return ResourceType::get(ctx);
   llvm_unreachable("unexpected tensorflow type with subtypes kind");
 }
 
 TensorFlowTypeWithSubtype TensorFlowTypeWithSubtype::clone(
     ArrayRef<TensorType> new_subtypes) {
   MLIRContext* ctx = getContext();
-  if (isa<VariantType>())
-    return VariantType::get(new_subtypes, ctx)
-        .cast<TensorFlowTypeWithSubtype>();
-  if (isa<ResourceType>())
-    return ResourceType::get(new_subtypes, ctx)
-        .cast<TensorFlowTypeWithSubtype>();
+  if (mlir::isa<VariantType>(*this))
+    return mlir::cast<TensorFlowTypeWithSubtype>(
+        VariantType::get(new_subtypes, ctx));
+  if (mlir::isa<ResourceType>(*this))
+    return mlir::cast<TensorFlowTypeWithSubtype>(
+        ResourceType::get(new_subtypes, ctx));
   llvm_unreachable("unexpected tensorflow type with subtypes kind");
 }
 
 ArrayRef<TensorType> TensorFlowTypeWithSubtype::GetSubtypes() {
-  if (auto variant_type = dyn_cast<VariantType>())
+  if (auto variant_type = mlir::dyn_cast<VariantType>(*this))
     return variant_type.getSubtypes();
-  if (auto resource_type = dyn_cast<ResourceType>())
+  if (auto resource_type = mlir::dyn_cast<ResourceType>(*this))
     return resource_type.getSubtypes();
   llvm_unreachable("unexpected tensorflow type with subtypes kind");
 }
@@ -659,8 +664,8 @@ bool BroadcastCompatible(TypeRange lhs, TypeRange rhs) {
     auto rhs_type = DropRefType(std::get<1>(types));
 
     // This should be true for all TF ops:
-    auto lhs_tt = lhs_type.dyn_cast<TensorType>();
-    auto rhs_tt = rhs_type.dyn_cast<TensorType>();
+    auto lhs_tt = mlir::dyn_cast<TensorType>(lhs_type);
+    auto rhs_tt = mlir::dyn_cast<TensorType>(rhs_type);
     if (!lhs_tt || !rhs_tt) {
       if (lhs_type != rhs_type) return false;
       continue;
@@ -673,8 +678,8 @@ bool BroadcastCompatible(TypeRange lhs, TypeRange rhs) {
     auto rhs_et = rhs_tt.getElementType();
     if (lhs_et != rhs_et) {
       // If either does not have subtypes, then the element types don't match.
-      auto lhs_wst = lhs_et.dyn_cast<TensorFlowTypeWithSubtype>();
-      auto rhs_wst = rhs_et.dyn_cast<TensorFlowTypeWithSubtype>();
+      auto lhs_wst = mlir::dyn_cast<TensorFlowTypeWithSubtype>(lhs_et);
+      auto rhs_wst = mlir::dyn_cast<TensorFlowTypeWithSubtype>(rhs_et);
       if (!lhs_wst || !rhs_wst) return false;
 
       // Consider the subtype of variant types.
@@ -689,8 +694,8 @@ bool BroadcastCompatible(TypeRange lhs, TypeRange rhs) {
       }
     }
 
-    auto lhs_rt = lhs_type.dyn_cast<RankedTensorType>();
-    auto rhs_rt = rhs_type.dyn_cast<RankedTensorType>();
+    auto lhs_rt = mlir::dyn_cast<RankedTensorType>(lhs_type);
+    auto rhs_rt = mlir::dyn_cast<RankedTensorType>(rhs_type);
     if (!lhs_rt || !rhs_rt) return true;
     SmallVector<int64_t, 4> shape;
     return OpTrait::util::getBroadcastedShape(lhs_rt.getShape(),
@@ -721,8 +726,8 @@ Type GetCastCompatibleType(Type a, Type b, bool may_ignore_ref_type_a) {
   // Fast path if everything is equal.
   if (a == b) return b;
 
-  auto a_tt = a.dyn_cast<TensorType>();
-  auto b_tt = b.dyn_cast<TensorType>();
+  auto a_tt = mlir::dyn_cast<TensorType>(a);
+  auto b_tt = mlir::dyn_cast<TensorType>(b);
 
   // If only one of a or b is a tensor type, they are incompatible.
   if (static_cast<bool>(a_tt) ^ static_cast<bool>(b_tt)) return nullptr;
@@ -732,7 +737,7 @@ Type GetCastCompatibleType(Type a, Type b, bool may_ignore_ref_type_a) {
   if (!a_tt && !b_tt) {
     // Remove ref types.
     if (may_ignore_ref_type_a) {
-      if (auto ref_type = a.dyn_cast<TensorFlowRefType>()) {
+      if (auto ref_type = mlir::dyn_cast<TensorFlowRefType>(a)) {
         a = ref_type.RemoveRef();
         if (a == b) return a;
       }
@@ -741,8 +746,8 @@ Type GetCastCompatibleType(Type a, Type b, bool may_ignore_ref_type_a) {
 
     // If either is not a type that contain subtypes then the types are not cast
     // compatible.
-    auto a_wst = a.dyn_cast<TensorFlowTypeWithSubtype>();
-    auto b_wst = b.dyn_cast<TensorFlowTypeWithSubtype>();
+    auto a_wst = mlir::dyn_cast<TensorFlowTypeWithSubtype>(a);
+    auto b_wst = mlir::dyn_cast<TensorFlowTypeWithSubtype>(b);
     if (!a_wst || !b_wst) return nullptr;
 
     // For Variant types we are more permissive right now and accept all pairs
@@ -752,8 +757,8 @@ Type GetCastCompatibleType(Type a, Type b, bool may_ignore_ref_type_a) {
     // one, so we should only assign it one when we know the subtype. Then we
     // can be more constrained and check subtypes for cast compatibility as
     // well.
-    if (a.isa<VariantType>()) return a;
-    if (b.isa<VariantType>()) return b;
+    if (mlir::isa<VariantType>(a)) return a;
+    if (mlir::isa<VariantType>(b)) return b;
 
     // For Resource types, we recursively check the subtypes for cast
     // compatibility, if possible. Otherwise treat them as compatible.
@@ -768,7 +773,7 @@ Type GetCastCompatibleType(Type a, Type b, bool may_ignore_ref_type_a) {
           GetCastCompatibleType(std::get<0>(subtypes), std::get<1>(subtypes),
                                 /*may_ignore_ref_type_a=*/false);
       if (!refined_st) return nullptr;
-      refined_subtypes.push_back(refined_st.cast<TensorType>());
+      refined_subtypes.push_back(mlir::cast<TensorType>(refined_st));
     }
 
     return ResourceType::get(refined_subtypes, a.getContext());
@@ -833,13 +838,13 @@ static Type GetDefaultTypeOf(TensorFlowRefType type) {
 template <typename ComposedType>
 Type DropTypeHelper(Type ty) {
   Type element_ty = getElementTypeOrSelf(ty);
-  auto composed_type = element_ty.dyn_cast<ComposedType>();
+  auto composed_type = mlir::dyn_cast<ComposedType>(element_ty);
   if (!composed_type) return ty;
 
   Type default_ty = GetDefaultTypeOf(composed_type);
-  if (auto ranked_ty = ty.dyn_cast<RankedTensorType>()) {
+  if (auto ranked_ty = mlir::dyn_cast<RankedTensorType>(ty)) {
     return RankedTensorType::get(ranked_ty.getShape(), default_ty);
-  } else if (ty.dyn_cast<UnrankedTensorType>()) {
+  } else if (mlir::dyn_cast<UnrankedTensorType>(ty)) {
     return UnrankedTensorType::get(default_ty);
   } else {
     return default_ty;
@@ -867,7 +872,7 @@ Attribute TensorProtoAttr::parse(AsmParser& parser, Type type) {
     parser.emitError(parser.getNameLoc(), "Hex string doesn't start with `0x`");
     return nullptr;
   }
-  auto shapedType = type.dyn_cast<ShapedType>();
+  auto shapedType = mlir::dyn_cast<ShapedType>(type);
   if (!shapedType) return nullptr;
 
   std::string bytes_data = absl::HexStringToBytes(data.substr(2));
diff --git a/tensorflow/core/ir/types/dialect.h b/tensorflow/core/ir/types/dialect.h
index e2dc8bef70a5d1..7c1a1cda1bec94 100644
--- a/tensorflow/core/ir/types/dialect.h
+++ b/tensorflow/core/ir/types/dialect.h
@@ -28,6 +28,7 @@ limitations under the License.
 // Include the dialect class generated from dialect.td.
 // The constructor and the printing/parsing of dialect types are manually
 // implemented (see ops.cpp).
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/core/ir/types/dialect.h.inc"
 
 // Include the Type classes declaration generated from types.td
@@ -52,15 +53,15 @@ class TensorFlowType : public Type {
 
 // Returns true if the specified type is a valid TensorFlow element type.
 inline bool IsValidTFElementType(Type type) {
-  return type.isa<ComplexType, FloatType, IntegerType, TensorFlowType,
-                  quant::QuantizedType>();
+  return mlir::isa<ComplexType, FloatType, IntegerType, TensorFlowType,
+                   quant::QuantizedType>(type);
 }
 
 // Returns true if this is a valid TensorFlow tensor type.
 inline bool IsValidTFTensorType(Type type) {
   // TensorFlow types should be tensors of one of the valid TensorFlow element
   // types.
-  if (auto tensor_ty = type.dyn_cast<TensorType>())
+  if (auto tensor_ty = mlir::dyn_cast<TensorType>(type))
     return IsValidTFElementType(tensor_ty.getElementType());
   return false;
 }
@@ -329,7 +330,7 @@ using ResultShapeRange = iterator_range<ResultShapeIterator>;
 template <typename RangeT>
 auto filter_resources(RangeT&& range) {
   return llvm::make_filter_range(std::forward<RangeT>(range), [](Value val) {
-    return getElementTypeOrSelf(val.getType()).isa<ResourceType>();
+    return mlir::isa<ResourceType>(getElementTypeOrSelf(val.getType()));
   });
 }
 
@@ -338,7 +339,7 @@ auto filter_resources(RangeT&& range) {
 // standard type if necessary.
 inline Type GetElementTypeOrSelfResolveRef(Type type) {
   Type element_type = getElementTypeOrSelf(type);
-  if (auto ref_type = element_type.dyn_cast<TensorFlowRefType>()) {
+  if (auto ref_type = mlir::dyn_cast<TensorFlowRefType>(element_type)) {
     element_type = ref_type.RemoveRef();
   }
   return element_type;
diff --git a/tensorflow/core/ir/types/dialect_test.cc b/tensorflow/core/ir/types/dialect_test.cc
index db5d1cfed6d502..1fb6537b4684f7 100644
--- a/tensorflow/core/ir/types/dialect_test.cc
+++ b/tensorflow/core/ir/types/dialect_test.cc
@@ -21,6 +21,7 @@ limitations under the License.
 #include "mlir/IR/MLIRContext.h"  // from @llvm-project
 #include "mlir/IR/Operation.h"  // from @llvm-project
 #include "mlir/Parser/Parser.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/core/platform/test.h"
 
 namespace mlir {
@@ -46,7 +47,7 @@ TEST(TFTypesDialect, TestFuncAttrSubElement) {
   ASSERT_TRUE(succeeded(SymbolTable::replaceAllSymbolUses(
       b.getStringAttr("foo"), baz, test_op.getParentRegion())));
 
-  auto func_attr = test_op.getAttr("func").dyn_cast<tf_type::FuncAttr>();
+  auto func_attr = mlir::dyn_cast<tf_type::FuncAttr>(test_op.getAttr("func"));
   ASSERT_TRUE(func_attr);
   auto sym_ref = FlatSymbolRefAttr::get(baz);
   EXPECT_TRUE(func_attr.getName() == sym_ref);
diff --git a/tensorflow/core/ir/utility.cc b/tensorflow/core/ir/utility.cc
index e15eb5799f8f3d..168a71e76bc310 100644
--- a/tensorflow/core/ir/utility.cc
+++ b/tensorflow/core/ir/utility.cc
@@ -20,6 +20,7 @@ limitations under the License.
 #include "mlir/IR/Block.h"  // from @llvm-project
 #include "mlir/IR/Operation.h"  // from @llvm-project
 #include "mlir/IR/Types.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/core/ir/dialect.h"
 #include "tensorflow/core/ir/interfaces.h"
 #include "tensorflow/core/ir/types/dialect.h"
@@ -47,35 +48,36 @@ BlockArgument GetLoopRegionDataOf(BlockArgument ctl) {
 }
 
 Value LookupControlDependency(Value data) {
-  assert(!data.getType().isa<ControlType>() && "expected a data type");
+  assert(!mlir::isa<ControlType>(data.getType()) && "expected a data type");
   // If the value is defined by an op, then the last result is the control
   // dependency.
   Value control_dep;
-  if (auto result = data.dyn_cast<OpResult>()) {
+  if (auto result = mlir::dyn_cast<OpResult>(data)) {
     control_dep = *std::prev(result.getOwner()->result_end());
   } else {
-    auto arg = data.cast<BlockArgument>();
+    auto arg = mlir::cast<BlockArgument>(data);
     control_dep = cast<ControlArgumentInterface>(arg.getOwner()->getParentOp())
                       .getControlTokenOf(arg);
   }
-  assert(control_dep.getType().isa<ControlType>() && "expected a control type");
+  assert(mlir::isa<ControlType>(control_dep.getType()) &&
+         "expected a control type");
   return control_dep;
 }
 
 std::optional<Value> LookupDataValue(Value ctl) {
-  assert(ctl.getType().isa<ControlType>() && "expected a control type");
+  assert(mlir::isa<ControlType>(ctl.getType()) && "expected a control type");
   // If the value is defined by an op, then return the first result.
   Value data;
-  if (auto result = ctl.dyn_cast<OpResult>()) {
+  if (auto result = mlir::dyn_cast<OpResult>(ctl)) {
     // If the op only has a control result, then there is no data value.
     if (result.getOwner()->getNumResults() == 1) return {};
     data = *result.getOwner()->result_begin();
   } else {
-    auto arg = ctl.cast<BlockArgument>();
+    auto arg = mlir::cast<BlockArgument>(ctl);
     data = cast<ControlArgumentInterface>(arg.getOwner()->getParentOp())
                .getDataValueOf(arg);
   }
-  assert(!data.getType().isa<ControlType>() && "expected a data type");
+  assert(!mlir::isa<ControlType>(data.getType()) && "expected a data type");
   return data;
 }
 
diff --git a/tensorflow/core/ir/utility_test.cc b/tensorflow/core/ir/utility_test.cc
index 97c3184f228535..200d1103c7d7fb 100644
--- a/tensorflow/core/ir/utility_test.cc
+++ b/tensorflow/core/ir/utility_test.cc
@@ -21,6 +21,7 @@ limitations under the License.
 #include "mlir/IR/MLIRContext.h"  // from @llvm-project
 #include "mlir/IR/Operation.h"  // from @llvm-project
 #include "mlir/Parser/Parser.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/core/ir/dialect.h"
 #include "tensorflow/core/ir/ops.h"
 #include "tensorflow/core/platform/test.h"
@@ -49,7 +50,7 @@ TEST(DialectUtilityTest, TestLookupControlDependency) {
   Value copy = ret_op.getOperand(0);
   Value ctl = LookupControlDependency(copy);
   ASSERT_TRUE(ctl);
-  OpResult ctl_result = ctl.dyn_cast<OpResult>();
+  OpResult ctl_result = mlir::dyn_cast<OpResult>(ctl);
   ASSERT_TRUE(ctl_result);
   EXPECT_EQ(ctl_result.getResultNumber(), 1);
   EXPECT_EQ(copy, ctl_result.getOwner()->getResult(0));
@@ -58,7 +59,7 @@ TEST(DialectUtilityTest, TestLookupControlDependency) {
   Value arg = ctl_result.getOwner()->getOperand(0);
   Value arg_ctl = LookupControlDependency(arg);
   ASSERT_TRUE(arg_ctl);
-  BlockArgument ctl_arg = arg_ctl.dyn_cast<BlockArgument>();
+  BlockArgument ctl_arg = mlir::dyn_cast<BlockArgument>(arg_ctl);
   ASSERT_TRUE(ctl_arg);
   EXPECT_EQ(ctl_arg.getArgNumber(), 1);
   EXPECT_EQ(arg, ctl_arg.getOwner()->getArgument(0));
@@ -84,7 +85,7 @@ TEST(DialectUtilityTest, TestLookupDataValue) {
   Value ctl = ret_op.getOperand(1);
   std::optional<Value> produce = LookupDataValue(ctl);
   ASSERT_TRUE(produce);
-  OpResult produce_result = produce->dyn_cast<OpResult>();
+  OpResult produce_result = mlir::dyn_cast<OpResult>(*produce);
   ASSERT_TRUE(produce_result);
   ASSERT_EQ(produce_result.getResultNumber(), 0);
   ASSERT_EQ(produce_result.getOwner()->getName().getStringRef(), "tfg.Produce");
@@ -93,7 +94,7 @@ TEST(DialectUtilityTest, TestLookupDataValue) {
   Value arg_ctl = produce_result.getOwner()->getOperand(0);
   std::optional<Value> arg = LookupDataValue(arg_ctl);
   ASSERT_TRUE(arg);
-  BlockArgument arg_arg = arg->dyn_cast<BlockArgument>();
+  BlockArgument arg_arg = mlir::dyn_cast<BlockArgument>(*arg);
   ASSERT_TRUE(arg_arg);
   ASSERT_EQ(arg_arg.getArgNumber(), 0);
   ASSERT_EQ(arg_arg.getOwner()->getArgument(1), arg_ctl);
diff --git a/tensorflow/core/ir/utils/shape_inference_utils_test.cc b/tensorflow/core/ir/utils/shape_inference_utils_test.cc
index 96399a90f88d3f..c5359b19048099 100644
--- a/tensorflow/core/ir/utils/shape_inference_utils_test.cc
+++ b/tensorflow/core/ir/utils/shape_inference_utils_test.cc
@@ -18,6 +18,7 @@ limitations under the License.
 #include "mlir/IR/MLIRContext.h"  // from @llvm-project
 #include "mlir/IR/Operation.h"  // from @llvm-project
 #include "mlir/Parser/Parser.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "tensorflow/core/framework/shape_inference.h"
 #include "tensorflow/core/ir/dialect.h"
@@ -82,7 +83,7 @@ class ShapeInferenceTest : public ::testing::Test {
 
       EXPECT_EQ(op.getNumResults() - 1, info.size());
       for (int i = 0; i < op.getNumResults() - 1; ++i) {
-        ShapedType shape = op.getResultTypes()[i].cast<ShapedType>();
+        ShapedType shape = mlir::cast<ShapedType>(op.getResultTypes()[i]);
         EXPECT_EQ(shape.hasRank(), info[i].hasRank());
         if (shape.hasRank()) EXPECT_EQ(shape.getShape(), info[i].getDims());
         if (check_type)
@@ -114,7 +115,7 @@ TEST_F(ShapeInferenceTest, TestShapeAndTypeInference) {
   // `value` attr contains the tensor information and it's a DenseElementAttr.
   auto op_result_as_shape_fn = [](InferenceContext &ic,
                                   OpResult op_result) -> ShapeHandle {
-    auto rt = op_result.getType().dyn_cast<RankedTensorType>();
+    auto rt = mlir::dyn_cast<RankedTensorType>(op_result.getType());
     if (!rt || rt.getRank() != 1 || !rt.hasStaticShape()) return {};
 
     std::vector<DimensionHandle> dims(rt.getDimSize(0), ic.UnknownDim());
@@ -136,7 +137,8 @@ TEST_F(ShapeInferenceTest, TestShapeAndTypeInference) {
     // `InferReturnTypeComponentsForTFOp`uses this callback to get the type
     // information.
     auto result_element_type_fn = [&](int idx) -> Type {
-      return op.getResult(idx).getType().cast<ShapedType>().getElementType();
+      return mlir::cast<ShapedType>(op.getResult(idx).getType())
+          .getElementType();
     };
 
     // We use TFG operation so that we don't need to provide
@@ -178,7 +180,8 @@ TEST_F(ShapeInferenceTest, TestShapeAndTypeInference) {
   all_results.clear();
   for (Operation &op : block.without_terminator()) {
     auto result_element_type_fn = [&](int idx) -> Type {
-      return op.getResult(idx).getType().cast<ShapedType>().getElementType();
+      return mlir::cast<ShapedType>(op.getResult(idx).getType())
+          .getElementType();
     };
 
     SmallVector<ShapedTypeComponents> results;
diff --git a/tensorflow/core/tfrt/mlrt/attribute/BUILD b/tensorflow/core/tfrt/mlrt/attribute/BUILD
index 5bebee19f89926..9a9d33042fcb75 100644
--- a/tensorflow/core/tfrt/mlrt/attribute/BUILD
+++ b/tensorflow/core/tfrt/mlrt/attribute/BUILD
@@ -28,6 +28,7 @@ cc_library(
         "@com_google_absl//absl/strings",
         "@llvm-project//llvm:Support",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
         "@local_tsl//tsl/platform:errors",
     ],
 )
diff --git a/tensorflow/core/tfrt/mlrt/attribute/attribute.cc b/tensorflow/core/tfrt/mlrt/attribute/attribute.cc
index daa92fcaca5953..a9749e92871b14 100644
--- a/tensorflow/core/tfrt/mlrt/attribute/attribute.cc
+++ b/tensorflow/core/tfrt/mlrt/attribute/attribute.cc
@@ -26,6 +26,7 @@ limitations under the License.
 #include "llvm/Support/raw_ostream.h"
 #include "mlir/IR/Attributes.h"  // from @llvm-project
 #include "mlir/IR/BuiltinAttributes.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_attributes.h"
 #include "tensorflow/compiler/mlir/tensorflow/utils/convert_type.h"
 #include "tensorflow/compiler/mlir/tfrt/translate/mlrt/mlir_to_bytecode.h"
@@ -42,7 +43,7 @@ absl::StatusOr<std::string> EncodeTensorflowAttribute(
     return std::move(*result);
   }
 
-  if (auto dense_attr = attr.dyn_cast<mlir::DenseElementsAttr>()) {
+  if (auto dense_attr = mlir::dyn_cast<mlir::DenseElementsAttr>(attr)) {
     auto element_type = dense_attr.getElementType();
 
     tensorflow::DataType dtype;
@@ -95,7 +96,7 @@ absl::StatusOr<std::string> EncodeTensorflowAttribute(
   }
 
   // Handle dtype attrs
-  if (auto type_attr = attr.dyn_cast<mlir::TypeAttr>()) {
+  if (auto type_attr = mlir::dyn_cast<mlir::TypeAttr>(attr)) {
     tensorflow::DataType dtype;
     TF_RETURN_IF_ERROR(
         tensorflow::ConvertToDataType(type_attr.getValue(), &dtype));
@@ -105,7 +106,7 @@ absl::StatusOr<std::string> EncodeTensorflowAttribute(
   }
 
   // Handle shape attrs
-  if (auto shape_attr = attr.dyn_cast<mlir::TF::ShapeAttr>()) {
+  if (auto shape_attr = mlir::dyn_cast<mlir::TF::ShapeAttr>(attr)) {
     llvm::ArrayRef<int64_t> shape;
     if (!shape_attr.getUnranked()) {
       auto shape_or = shape_attr.getValue();
@@ -131,7 +132,7 @@ absl::StatusOr<std::string> EncodeTensorflowAttribute(
   }
 
   // Handle attribute arrays.
-  if (auto array_attr = attr.dyn_cast<mlir::ArrayAttr>()) {
+  if (auto array_attr = mlir::dyn_cast<mlir::ArrayAttr>(attr)) {
     mlrt::bc::Buffer buffer;
     mlrt::bc::Allocator allocator(&buffer);
     auto ctor = mlrt::bc::New<mlrt::bc::Vector<tensorflow::DataType>>(
@@ -139,7 +140,7 @@ absl::StatusOr<std::string> EncodeTensorflowAttribute(
 
     int i;
     for (i = 0; i < array_attr.size(); ++i) {
-      if (auto type_attr = array_attr[i].dyn_cast<mlir::TypeAttr>()) {
+      if (auto type_attr = mlir::dyn_cast<mlir::TypeAttr>(array_attr[i])) {
         tensorflow::DataType dtype;
         TF_RETURN_IF_ERROR(
             tensorflow::ConvertToDataType(type_attr.getValue(), &dtype));
diff --git a/tensorflow/core/transforms/BUILD b/tensorflow/core/transforms/BUILD
index 54850bc90c587b..1968db2a555270 100644
--- a/tensorflow/core/transforms/BUILD
+++ b/tensorflow/core/transforms/BUILD
@@ -105,6 +105,7 @@ cc_library(
         "//tensorflow/core/ir:Dialect",
         "@llvm-project//llvm:Support",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
     ],
 )
 
diff --git a/tensorflow/core/transforms/consolidate_attrs/pass.cc b/tensorflow/core/transforms/consolidate_attrs/pass.cc
index 2f8b629b2d2988..3c58d7b8ab9402 100644
--- a/tensorflow/core/transforms/consolidate_attrs/pass.cc
+++ b/tensorflow/core/transforms/consolidate_attrs/pass.cc
@@ -26,6 +26,7 @@ limitations under the License.
 #include "mlir/IR/PatternMatch.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
 #include "mlir/Pass/PassManager.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"  // from @llvm-project
 #include "tensorflow/core/ir/dialect.h"
@@ -47,13 +48,13 @@ static const char *kRegenerateOutputShapes = "tfg.regenerate_output_shapes";
 
 // Returns true if an attribute is an array of shapes;
 static bool IsArrayOfShapes(ArrayAttr array) {
-  return llvm::all_of(array,
-                      [](Attribute attr) { return attr.isa<ShapeAttr>(); });
+  return llvm::all_of(
+      array, [](Attribute attr) { return mlir::isa<ShapeAttr>(attr); });
 }
 
 // Given a tensor type and shape information, try to refine the type.
 static Type GetReifiedType(Type orig, ShapeAttr shape) {
-  Type element_type = orig.cast<ShapedType>().getElementType();
+  Type element_type = mlir::cast<ShapedType>(orig).getElementType();
   TensorType inferred;
   if (shape.hasRank()) {
     // Replace dimensions less than -1 with ?
@@ -137,11 +138,11 @@ Type ConsolidateAttributesPassImpl::refineTypeWithOutputShapes(
   // Get the output shapes attribute. If the attribute is not an array of
   // exactly one shape, ignore it.
   if (auto output_shapes =
-          attrs.get(output_shapes_id_).dyn_cast_or_null<ArrayAttr>()) {
+          mlir::dyn_cast_or_null<ArrayAttr>(attrs.get(output_shapes_id_))) {
     if (output_shapes.size() == 1 && IsArrayOfShapes(output_shapes)) {
       attrs.erase(output_shapes_id_);
       attrs.set(regenerate_output_shapes_id_, UnitAttr::get(&getContext()));
-      return GetReifiedType(type, output_shapes[0].cast<ShapeAttr>());
+      return GetReifiedType(type, mlir::cast<ShapeAttr>(output_shapes[0]));
     }
   }
   return type;
@@ -153,8 +154,9 @@ Type ConsolidateAttributesPassImpl::refineTypeWithHandleData(
   SmallVector<TensorType> subtypes;
   // Because `tfg.handle_data` is a TFG internal attribute, it will be
   // well-formed.
-  for (Type type : handle_data.cast<ArrayAttr>().getAsValueRange<TypeAttr>())
-    subtypes.push_back(type.cast<TensorType>());
+  for (Type type :
+       mlir::cast<ArrayAttr>(handle_data).getAsValueRange<TypeAttr>())
+    subtypes.push_back(mlir::cast<TensorType>(type));
   auto resource =
       UnrankedTensorType::get(ResourceType::get(subtypes, &getContext()));
   Type reified = tf_type::GetCastCompatibleType(resource, type);
@@ -167,7 +169,7 @@ ArrayAttr ConsolidateAttributesPassImpl::reifyAndDropFunctionArgumentAttributes(
   // we will ignore it. If it isn't an array of shapes or has an inconsistent
   // number of shapes, ignore it.
   ArrayAttr input_shapes =
-      func->getAttr(input_shapes_id_).dyn_cast_or_null<ArrayAttr>();
+      mlir::dyn_cast_or_null<ArrayAttr>(func->getAttr(input_shapes_id_));
   unsigned num_args = func.getNumArguments() / 2;
   if (input_shapes) {
     if (input_shapes.size() != num_args || !IsArrayOfShapes(input_shapes)) {
@@ -188,7 +190,8 @@ ArrayAttr ConsolidateAttributesPassImpl::reifyAndDropFunctionArgumentAttributes(
     arg_type = refineTypeWithOutputShapes(arg_type, attrs);
     arg_type = refineTypeWithHandleData(arg_type, attrs.erase(handle_data_id_));
     if (input_shapes)
-      arg_type = GetReifiedType(arg_type, input_shapes[i].cast<ShapeAttr>());
+      arg_type =
+          GetReifiedType(arg_type, mlir::cast<ShapeAttr>(input_shapes[i]));
     arg.setType(arg_type);
     attrs.erase(dtype_id_);
     attrs.erase(is_ref_id_);
@@ -242,7 +245,7 @@ class ReifyOperationOutputShapes : public RewritePattern {
     // attribute, if it has an inconsistent number of shapes, or if it is not
     // an array of shapes.
     ArrayAttr output_shapes =
-        op->getAttr(output_shapes_id_).dyn_cast_or_null<ArrayAttr>();
+        mlir::dyn_cast_or_null<ArrayAttr>(op->getAttr(output_shapes_id_));
     if (!output_shapes || results.size() != output_shapes.size() ||
         !IsArrayOfShapes(output_shapes))
       return failure();
@@ -422,7 +425,7 @@ void PrepareAttributesForExportPassImpl::prepareFunctionAttributes(
       continue;
     }
     arg_attrs.push_back(prepareAttributesFor(type, attrs));
-    if (auto ranked = type.dyn_cast<RankedTensorType>()) {
+    if (auto ranked = mlir::dyn_cast<RankedTensorType>(type)) {
       input_shapes.push_back(ShapeAttr::get(&getContext(), ranked.getShape()));
     } else {
       input_shapes.push_back(ShapeAttr::get(&getContext(), std::nullopt));
@@ -450,14 +453,14 @@ DictionaryAttr PrepareAttributesForExportPassImpl::prepareAttributesFor(
   NamedAttrList attrs(attr_dict);
   // Add shape data if requested.
   if (attrs.erase(regenerate_output_shapes_id_)) {
-    auto shape = ShapeAttr::get(&getContext(),
-                                type.isa<RankedTensorType>()
-                                    ? type.cast<RankedTensorType>().getShape()
-                                    : std::optional<ArrayRef<int64_t>>());
+    auto shape = ShapeAttr::get(
+        &getContext(), mlir::isa<RankedTensorType>(type)
+                           ? mlir::cast<RankedTensorType>(type).getShape()
+                           : std::optional<ArrayRef<int64_t>>());
     attrs.set(output_shapes_id_, ArrayAttr::get(&getContext(), {shape}));
   }
-  auto element_type = type.cast<TensorType>().getElementType();
-  if (auto resource = element_type.dyn_cast<ResourceType>()) {
+  auto element_type = mlir::cast<TensorType>(type).getElementType();
+  if (auto resource = mlir::dyn_cast<ResourceType>(element_type)) {
     SmallVector<Attribute> handle_data;
     for (TensorType subtype : resource.getSubtypes())
       handle_data.push_back(TypeAttr::get(subtype));
@@ -465,7 +468,7 @@ DictionaryAttr PrepareAttributesForExportPassImpl::prepareAttributesFor(
     if (!handle_data.empty())
       attrs.set(handle_data_id_, ArrayAttr::get(&getContext(), handle_data));
   }
-  if (element_type.isa<tf_type::TensorFlowRefType>())
+  if (mlir::isa<tf_type::TensorFlowRefType>(element_type))
     attrs.set(is_ref_id_, UnitAttr::get(&getContext()));
   return attrs.getDictionary(&getContext());
 }
@@ -475,8 +478,8 @@ static ArrayAttr GetElementTypesAttr(PatternRewriter &rewriter,
                                      ValueRange values) {
   SmallVector<Attribute> types;
   for (Value value : values) {
-    types.push_back(
-        TypeAttr::get(value.getType().cast<TensorType>().getElementType()));
+    types.push_back(TypeAttr::get(
+        mlir::cast<TensorType>(value.getType()).getElementType()));
   }
   return rewriter.getArrayAttr(types);
 }
@@ -515,11 +518,10 @@ struct MaterializeIfAttrs : public MaterializeAttrsPattern<IfLikeOp> {
                                 PatternRewriter &rewriter) const override {
     if (op.getTcond() && op.getTin() && op.getTout()) return failure();
     NamedAttrList attrs(op->getAttrDictionary());
-    attrs.set(op.getTcondAttrName(),
-              TypeAttr::get(op.getCond()
-                                .getType()
-                                .template cast<TensorType>()
-                                .getElementType()));
+    attrs.set(
+        op.getTcondAttrName(),
+        TypeAttr::get(
+            mlir::cast<TensorType>(op.getCond().getType()).getElementType()));
     attrs.set(op.getTinAttrName(),
               this->getArgumentElementTypesAttr(rewriter, op));
     attrs.set(op.getToutAttrName(),
@@ -583,7 +585,7 @@ class MaterializeOutputShapesBase : public RewritePattern {
 
     SmallVector<Attribute> shapes;
     for (Value result : results) {
-      if (auto ranked = result.getType().dyn_cast<RankedTensorType>()) {
+      if (auto ranked = mlir::dyn_cast<RankedTensorType>(result.getType())) {
         shapes.push_back(ShapeAttr::get(op->getContext(), ranked.getShape()));
       } else {
         shapes.push_back(ShapeAttr::get(op->getContext(), std::nullopt));
diff --git a/tensorflow/core/transforms/const_dedupe_hoist/BUILD b/tensorflow/core/transforms/const_dedupe_hoist/BUILD
index 381b666a80a711..54d58e8c7ee09f 100644
--- a/tensorflow/core/transforms/const_dedupe_hoist/BUILD
+++ b/tensorflow/core/transforms/const_dedupe_hoist/BUILD
@@ -21,6 +21,7 @@ cc_library(
         "@llvm-project//llvm:Support",
         "@llvm-project//mlir:IR",
         "@llvm-project//mlir:Pass",
+        "@llvm-project//mlir:Support",
     ],
 )
 
diff --git a/tensorflow/core/transforms/const_dedupe_hoist/pass.cc b/tensorflow/core/transforms/const_dedupe_hoist/pass.cc
index 8358bd338d374c..6a793cedea3b13 100644
--- a/tensorflow/core/transforms/const_dedupe_hoist/pass.cc
+++ b/tensorflow/core/transforms/const_dedupe_hoist/pass.cc
@@ -29,6 +29,7 @@ limitations under the License.
 #include "mlir/IR/MLIRContext.h"  // from @llvm-project
 #include "mlir/IR/Visitors.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/core/ir/dialect.h"
 #include "tensorflow/core/ir/ops.h"
 #include "tensorflow/core/ir/utility.h"
@@ -189,7 +190,7 @@ void DedupeAndHoistConstantPass::RunOnGraphOrFuncOp(Operation* op) {
   op->walk([&](Operation* inner_op) {
     if (inner_op->getName().getIdentifier() != tfg_const) return;
 
-    ElementsAttr val = inner_op->getAttr(value_id).cast<ElementsAttr>();
+    ElementsAttr val = mlir::cast<ElementsAttr>(inner_op->getAttr(value_id));
     if (val.getNumElements() > max_size_) return;
     constant_ops[inner_op].push_back(inner_op);
   });
diff --git a/tensorflow/core/transforms/constant_folding/pass.cc b/tensorflow/core/transforms/constant_folding/pass.cc
index 07e831317891c4..a168283bbb7190 100644
--- a/tensorflow/core/transforms/constant_folding/pass.cc
+++ b/tensorflow/core/transforms/constant_folding/pass.cc
@@ -107,7 +107,7 @@ static FailureOr<TFOp> CreateConstantTensorOp(
     OpBuilder &builder, Location loc, StringRef name_prefix, Type type,
     ValueRange control_operands, TypedAttr tensor_value,
     ArrayRef<NamedAttribute> other_attrs = std::nullopt) {
-  if (type.isa<VariantType>()) return failure();
+  if (mlir::isa<VariantType>(type)) return failure();
   // TODO(chiahungduan): Reuse ConstOp Like
   // OperationFolder::tryGetOrCreateConstant.
   OperationState state(loc, "tfg.Const");
@@ -116,8 +116,9 @@ static FailureOr<TFOp> CreateConstantTensorOp(
   state.attributes = other_attrs;
   util::EraseRegularNodeAttributes(state.attributes);
   state.attributes.set(
-      "dtype", TypeAttr::get(
-                   tensor_value.getType().cast<ShapedType>().getElementType()));
+      "dtype",
+      TypeAttr::get(
+          mlir::cast<ShapedType>(tensor_value.getType()).getElementType()));
   state.attributes.set("value", tensor_value);
   if (!name_prefix.empty()) {
     state.attributes.set(
@@ -170,7 +171,7 @@ static TFOp GetControlAnchorForSwitchResult(
   if (StringAttr device_attr = switch_op.deviceAttr())
     identity_op.setRequestedDevice(device_attr);
   identity_op.setName(Twine(switch_op.name(), "/ControlDependencyCtrl_") +
-                      Twine(value.cast<OpResult>().getResultNumber()));
+                      Twine(mlir::cast<OpResult>(value).getResultNumber()));
   return identity_op;
 }
 
@@ -179,12 +180,12 @@ static TFOp GetControlAnchorForSwitchResult(
 // the output does not necessarily activate when the switch op activates. We
 // add a "control anchor" in the form of an identity op instead.
 static Value GetControlDependency(OpBuilder &builder, Value value) {
-  if (value.getType().isa<ControlType>()) return value;
+  if (mlir::isa<ControlType>(value.getType())) return value;
 
   TFGraphDialect *dialect =
       builder.getContext()->getLoadedDialect<TFGraphDialect>();
   assert(dialect);
-  if (OpResult result = value.dyn_cast<OpResult>();
+  if (OpResult result = mlir::dyn_cast<OpResult>(value);
       result && dialect->IsSwitch(result.getOwner())) {
     return GetControlAnchorForSwitchResult(builder, result, dialect)
         .controlRet();
@@ -196,7 +197,7 @@ static Value GetControlDependency(OpBuilder &builder, Value value) {
 // Add control operand to `op` if it doesn't exist.
 static void AddControlOperand(Operation *op, Value control,
                               PatternRewriter &rewriter) {
-  assert(control.getType().isa<ControlType>());
+  assert(mlir::isa<ControlType>(control.getType()));
   if (llvm::is_contained(op->getOperands(), control)) return;
   rewriter.startOpModification(op);
   op->insertOperands(op->getNumOperands(), control);
@@ -271,7 +272,7 @@ static FailureOr<TFOp> ReplaceOpWithNoOp(OpBuilder &builder, TFOp op) {
 
 static FailureOr<TFOp> ReplaceOpWithConstant(OpBuilder &builder, Operation *op,
                                              double constant_value) {
-  auto res = (*op->result_type_begin()).cast<ShapedType>();
+  auto res = mlir::cast<ShapedType>((*op->result_type_begin()));
   Type dtype = GetDataTypeFromOp(builder, op);
   Attribute value_attr;
   if (dtype.isIntOrIndex())
@@ -315,7 +316,7 @@ static FailureOr<TFOp> ReplaceOpWithSnapshot(OpBuilder &builder, TFOp op,
 
 static FailureOr<TFOp> ReplaceOpWithBroadcastTo(OpBuilder &builder, TFOp op,
                                                 int idx_to_replace) {
-  ShapedType tensor_type = (*op->result_type_begin()).cast<ShapedType>();
+  ShapedType tensor_type = mlir::cast<ShapedType>((*op->result_type_begin()));
   if (!tensor_type.hasStaticShape()) return failure();
   ElementsAttr const_attr = ConvertShapeToAttr(tensor_type);
 
@@ -551,7 +552,8 @@ bool OpPropertyHelper::IsFoldableUncached(TFOp op) {
     TFOp operand_op = operand.getDefiningOp();
     if (operand_op && dialect_->IsConstant(operand_op)) {
       auto dtype = operand_op->getAttrOfType<TypeAttr>("dtype");
-      if (!dtype || dtype.getValue().isa<tf_type::StringType>()) return false;
+      if (!dtype || mlir::isa<tf_type::StringType>(dtype.getValue()))
+        return false;
 
       // Special case: If a Merge node has at least one constant input that
       // does not depend on a control input, we can fold it.
@@ -572,7 +574,7 @@ bool OpPropertyHelper::IsFoldableUncached(TFOp op) {
   // to materialize.
   int64_t input_size_bytes = 0;
   for (Value operand : operands) {
-    auto shape = operand.getType().dyn_cast<ShapedType>();
+    auto shape = mlir::dyn_cast<ShapedType>(operand.getType());
     if (!shape || !shape.hasStaticShape()) continue;
     auto element_type = shape.getElementType();
 
@@ -581,7 +583,7 @@ bool OpPropertyHelper::IsFoldableUncached(TFOp op) {
     input_size_bytes += shape.getNumElements() * DataTypeSize(dtype);
   }
   for (Value res : op->getResults().drop_back()) {
-    auto shape = res.getType().dyn_cast<ShapedType>();
+    auto shape = mlir::dyn_cast<ShapedType>(res.getType());
     if (!shape || !shape.hasStaticShape()) continue;
     auto element_type = shape.getElementType();
 
@@ -742,7 +744,7 @@ class EvaluateConstant : public FolderPatternBase<EvaluateConstant> {
     // TODO(tlongeri): Is CreateConstantTensorNode check correct? Shouldn't it
     // always be a ShapedType?
     for (TypedAttr r : result)
-      if (r && r.getType().isa<VariantType>()) return failure();
+      if (r && mlir::isa<VariantType>(r.getType())) return failure();
 
     StringAttr name_attr = static_cast<TFGraphDialect *>(op->getDialect())
                                ->getNameAttrIdentifier();
@@ -824,7 +826,7 @@ class MaterializeShapeOp : public FolderPatternBase<MaterializeShapeOp> {
                                 PatternRewriter &rewriter) const override {
     Value input = op->getOperand(0);
 
-    auto input_shape = input.getType().cast<ShapedType>();
+    auto input_shape = mlir::cast<ShapedType>(input.getType());
     if (!input_shape.hasStaticShape()) return failure();
 
     // TODO(rmlarsen): Remove this workaround for b/150861569
@@ -834,7 +836,7 @@ class MaterializeShapeOp : public FolderPatternBase<MaterializeShapeOp> {
       return failure();
 
     Type output_dtype =
-        op->getResult(0).getType().cast<ShapedType>().getElementType();
+        mlir::cast<ShapedType>(op->getResult(0).getType()).getElementType();
     ElementsAttr const_attr = CreateElementsAttrOfTypeValues(
         output_dtype, {input_shape.getRank()}, input_shape.getShape());
 
@@ -863,10 +865,10 @@ class MaterializeSizeOp : public FolderPatternBase<MaterializeSizeOp> {
                                 PatternRewriter &rewriter) const override {
     Value input = op->getOperand(0);
 
-    auto input_shape = input.getType().cast<ShapedType>();
+    auto input_shape = mlir::cast<ShapedType>(input.getType());
     if (!input_shape.hasStaticShape()) return failure();
 
-    ShapedType result_type = (*op->result_type_begin()).cast<ShapedType>();
+    ShapedType result_type = mlir::cast<ShapedType>((*op->result_type_begin()));
     if (!result_type.getElementType().isIntOrIndexOrFloat()) return failure();
 
     ElementsAttr const_attr = CreateElementsAttrOfTypeValues(
@@ -898,10 +900,10 @@ class MaterializeRankOp : public FolderPatternBase<MaterializeRankOp> {
                                 PatternRewriter &rewriter) const override {
     Value input = op->getOperand(0);
 
-    auto input_shape = input.getType().cast<ShapedType>();
+    auto input_shape = mlir::cast<ShapedType>(input.getType());
     if (!input_shape.hasRank()) return failure();
 
-    ShapedType result_type = (*op->result_type_begin()).cast<ShapedType>();
+    ShapedType result_type = mlir::cast<ShapedType>((*op->result_type_begin()));
     if (!result_type.getElementType().isIntOrIndexOrFloat()) return failure();
 
     ElementsAttr const_attr = CreateElementsAttrOfTypeValues(
@@ -976,7 +978,7 @@ class MaterializeShapeNOp : public FolderPatternBase<MaterializeShapeNOp> {
     for (const auto &it : llvm::enumerate(TFOp(op).getNonControlOperands())) {
       Value operand = op->getOperand(it.index());
 
-      auto operand_shape = operand.getType().cast<ShapedType>();
+      auto operand_shape = mlir::cast<ShapedType>(operand.getType());
       if (!operand_shape.hasStaticShape()) continue;
 
       if (op->getResults()[it.index()].use_empty()) continue;
@@ -1033,7 +1035,7 @@ class MaterializeBroadcastGradientArgsOp
     auto get_shape = [this](Operation *op,
                             SmallVector<int64_t> &shape) -> bool {
       if (dialect_->IsShape(op)) {
-        auto type = op->getOperand(0).getType().cast<ShapedType>();
+        auto type = mlir::cast<ShapedType>(op->getOperand(0).getType());
         if (!type.hasRank()) return false;
 
         llvm::append_range(shape, type.getShape());
@@ -1139,18 +1141,19 @@ class MaterializeReductionIndices
     // The reduction indices are already constant, there's nothing to do.
     if (!indices || dialect_->IsConstant(indices)) return failure();
 
-    auto indices_shape = indices->getResult(0).getType().cast<ShapedType>();
+    auto indices_shape =
+        mlir::cast<ShapedType>(indices->getResult(0).getType());
     if (!indices_shape.hasRank()) return failure();
     if (!indices_shape.getElementType().isInteger(32) &&
         !indices_shape.getElementType().isInteger(64)) {
       return failure();
     }
 
-    auto input_shape = op->getOperand(0).getType().cast<ShapedType>();
+    auto input_shape = mlir::cast<ShapedType>(op->getOperand(0).getType());
     // Unexpected graph, don't try to change it.
     if (!input_shape.hasRank() || input_shape.getRank() < 1) return failure();
 
-    auto output_shape = op->getResult(0).getType().cast<ShapedType>();
+    auto output_shape = mlir::cast<ShapedType>(op->getResult(0).getType());
     const int output_rank =
         output_shape.hasRank() ? output_shape.getRank() : -1;
 
@@ -1167,7 +1170,7 @@ class MaterializeReductionIndices
         full_reduction = false;
         if (!dialect_->IsReshape(user)) return failure();
 
-        auto shape = user->getResult(0).getType().cast<ShapedType>();
+        auto shape = mlir::cast<ShapedType>(user->getResult(0).getType());
         if (!shape.hasStaticShape() || shape.getNumElements() != 1)
           return failure();
         else
@@ -1214,7 +1217,7 @@ class MaterializeFillNode : public FolderPatternBase<MaterializeFillNode> {
     // Only handles single result op. Note that another result is control ret.
     if (op->getNumResults() != 2) return failure();
 
-    auto output_type = op->getResult(0).getType().cast<ShapedType>();
+    auto output_type = mlir::cast<ShapedType>(op->getResult(0).getType());
     if (!output_type.hasStaticShape()) return failure();
     if (!output_type.isIntOrIndexOrFloat()) return failure();
 
@@ -1262,7 +1265,7 @@ class MaterializeConstantValuedNode
 
     // TODO(chiahungduan): If op->getOperand(0) has static shape, can we use
     // that to materialize?
-    auto output_type = op->getResult(0).getType().cast<ShapedType>();
+    auto output_type = mlir::cast<ShapedType>(op->getResult(0).getType());
     if (!output_type.hasStaticShape()) return failure();
 
     int value = is_zeros_like ? 0 : 1;
@@ -1277,8 +1280,9 @@ class MaterializeConstantValuedNode
     } else {
       const_attr = SplatElementsAttr::get(
           output_type,
-          APFloat(output_element_type.cast<FloatType>().getFloatSemantics(),
-                  value));
+          APFloat(
+              mlir::cast<FloatType>(output_element_type).getFloatSemantics(),
+              value));
     }
 
     FailureOr<TFOp> const_op =
@@ -1457,7 +1461,7 @@ class RemoveShuffleOp : public FolderPatternBase<RemoveShuffleOp> {
     ElementsAttr perm_tensor = perm_op->getAttrOfType<ElementsAttr>("value");
     if (!perm_tensor) return failure();
 
-    ShapedType x_shape = op->getOperand(0).getType().cast<ShapedType>();
+    ShapedType x_shape = mlir::cast<ShapedType>(op->getOperand(0).getType());
     if (!x_shape.hasRank()) return failure();
     if (perm_tensor.getNumElements() != x_shape.getRank()) return failure();
 
@@ -1489,7 +1493,7 @@ class RemoveTransposeOp : public FolderPatternBase<RemoveTransposeOp> {
     ElementsAttr perm_tensor = perm_op->getAttrOfType<ElementsAttr>("value");
     if (!perm_tensor) return failure();
 
-    ShapedType x_shape = op->getOperand(0).getType().cast<ShapedType>();
+    ShapedType x_shape = mlir::cast<ShapedType>(op->getOperand(0).getType());
     if (!x_shape.hasRank()) return failure();
     if (perm_tensor.getNumElements() != x_shape.getRank()) return failure();
 
@@ -1516,7 +1520,7 @@ class RemoveRandomShuffleOp : public FolderPatternBase<RemoveRandomShuffleOp> {
       : FolderPatternBase<RemoveRandomShuffleOp>("tfg.RandomShuffle", helper) {}
   LogicalResult matchAndRewrite(Operation *op,
                                 PatternRewriter &rewriter) const override {
-    auto shape = op->getOperand(0).getType().cast<ShapedType>();
+    auto shape = mlir::cast<ShapedType>(op->getOperand(0).getType());
     if (!shape.hasRank()) return failure();
     if (shape.getRank() != 0 && shape.getShape()[0] != 1) return failure();
 
@@ -1536,7 +1540,8 @@ class RemoveReverse : public FolderPatternBase<RemoveReverse> {
       : FolderPatternBase<RemoveReverse>("tfg.ReverseV2", helper) {}
   LogicalResult matchAndRewrite(Operation *op,
                                 PatternRewriter &rewriter) const override {
-    ShapedType tensor_type = op->getOperand(0).getType().cast<ShapedType>();
+    ShapedType tensor_type =
+        mlir::cast<ShapedType>(op->getOperand(0).getType());
     if (!tensor_type.hasRank()) return failure();
 
     Operation *dim_op = op->getOperand(1).getDefiningOp();
@@ -1588,7 +1593,7 @@ class SimplifySliceOp : public FolderPatternBase<SimplifySliceOp> {
     auto begin_attr = begin_op->getAttrOfType<ElementsAttr>("value");
     auto size_attr = size_op->getAttrOfType<ElementsAttr>("value");
 
-    ShapedType input_type = op->getOperand(0).getType().cast<ShapedType>();
+    ShapedType input_type = mlir::cast<ShapedType>(op->getOperand(0).getType());
     if (!input_type.hasRank()) return failure();
 
     for (unsigned i = 0; i < input_type.getRank(); ++i) {
@@ -1643,7 +1648,7 @@ class SimplifyStridedSlice : public FolderPatternBase<SimplifyStridedSlice> {
     if (!begin_mask_attr || !end_mask_attr || !ellipsis_mask_attr)
       return failure();
 
-    ShapedType input_type = op->getOperand(0).getType().cast<ShapedType>();
+    ShapedType input_type = mlir::cast<ShapedType>(op->getOperand(0).getType());
     if (!input_type.hasStaticShape()) return failure();
 
     Operation *begin_op = op->getOperand(1).getDefiningOp();
@@ -1805,7 +1810,7 @@ class SimplifySqueezeOp : public FolderPatternBase<SimplifySqueezeOp> {
       : FolderPatternBase<SimplifySqueezeOp>("tfg.Squeeze", helper) {}
   LogicalResult matchAndRewrite(Operation *op,
                                 PatternRewriter &rewriter) const override {
-    auto shape_type = op->getOperand(0).getType().cast<ShapedType>();
+    auto shape_type = mlir::cast<ShapedType>(op->getOperand(0).getType());
     if (!shape_type.hasRank()) return failure();
     if (llvm::any_of(shape_type.getShape(), [](int64_t s) { return s <= 1; }))
       return failure();
@@ -1836,13 +1841,13 @@ class SimplifyPackOp : public FolderPatternBase<SimplifyPackOp> {
     // protos, e.g. there is DT_RESOURCE).
     // TODO(tlongeri): is there a reason ExpandDims does not support DT_VARIANT?
     if (ShapedType values_type =
-            non_control_operands[0].getType().dyn_cast<ShapedType>();
-        !values_type || values_type.getElementType().isa<VariantType>())
+            mlir::dyn_cast<ShapedType>(non_control_operands[0].getType());
+        !values_type || mlir::isa<VariantType>(values_type.getElementType()))
       return failure();
 
     // It's unsafe to add a control dependency on the feed node, because it
     // might have been never executed otherwiwise.
-    if (non_control_operands[0].isa<BlockArgument>()) return failure();
+    if (mlir::isa<BlockArgument>(non_control_operands[0])) return failure();
 
     IntegerAttr axis = op->getAttrOfType<IntegerAttr>("axis");
     ElementsAttr const_attr = CreateElementsAttrOfTypeValues(
@@ -2033,8 +2038,8 @@ class SimplifyReductionOp : public FolderPatternBase<SimplifyReductionOp> {
     }
 
     // Check `IsReductionCandidateForSimplification`
-    auto input_type = op->getOperand(0).getType().cast<ShapedType>();
-    auto op_type = (*op->result_type_begin()).cast<ShapedType>();
+    auto input_type = mlir::cast<ShapedType>(op->getOperand(0).getType());
+    auto op_type = mlir::cast<ShapedType>((*op->result_type_begin()));
     if (!input_type.hasStaticShape() || !op_type.hasStaticShape())
       return failure();
 
@@ -2096,7 +2101,7 @@ class SimplifyReductionOp : public FolderPatternBase<SimplifyReductionOp> {
   Operation *ReplaceReductionWithReshape(OpBuilder &builder, Operation *op,
                                          Operation *reduction_indices) const {
     const int new_num_dimensions =
-        (*op->result_type_begin()).cast<ShapedType>().getRank();
+        mlir::cast<ShapedType>((*op->result_type_begin())).getRank();
     SmallVector<int64_t> elements(new_num_dimensions);
     std::iota(elements.begin(), elements.end(), 1);
     ElementsAttr const_attr = CreateElementsAttrOfTypeValues(
@@ -2164,7 +2169,7 @@ class SimplifyReshapeOp : public FolderPatternBase<SimplifyReshapeOp> {
                                 PatternRewriter &rewriter) const override {
     if (!dialect_->IsReshape(op) || !op->hasAttr("T")) return failure();
 
-    auto input_shape = op->getOperand(0).getType().cast<ShapedType>();
+    auto input_shape = mlir::cast<ShapedType>(op->getOperand(0).getType());
     if (!input_shape.hasStaticShape()) return failure();
 
     Operation *shape_op = op->getOperand(1).getDefiningOp();
@@ -2227,9 +2232,9 @@ class SimplifyArithmeticOp
     Operation *y = op->getOperand(1).getDefiningOp();
     if (!x || !y) return failure();
 
-    ShapedType op_type = (*op->result_type_begin()).cast<ShapedType>();
-    ShapedType x_type = (*x->result_type_begin()).cast<ShapedType>();
-    ShapedType y_type = (*y->result_type_begin()).cast<ShapedType>();
+    ShapedType op_type = mlir::cast<ShapedType>((*op->result_type_begin()));
+    ShapedType x_type = mlir::cast<ShapedType>((*x->result_type_begin()));
+    ShapedType y_type = mlir::cast<ShapedType>((*y->result_type_begin()));
 
     const bool y_matches_output_shape = op_type.hasStaticShape() &&
                                         y_type.hasStaticShape() &&
@@ -2277,8 +2282,8 @@ class SimplifyArithmeticOp
       TypeAttr type_attr = op->getAttrOfType<TypeAttr>("T");
       if (!type_attr) return failure();
 
-      if (type_attr.getValue().isa<FloatType>() ||
-          type_attr.getValue().isa<ComplexType>()) {
+      if (mlir::isa<FloatType>(type_attr.getValue()) ||
+          mlir::isa<ComplexType>(type_attr.getValue())) {
         OperationState state(op->getLoc(), "tfg.Reciprocal");
         state.addOperands({op->getOperand(1),
                            GetControlDependency(rewriter, op->getOperand(0))});
@@ -2401,8 +2406,9 @@ class ReduceDivToReciprocalMul
     if (!type_attr) return failure();
 
     // Skip integer division.
-    if (dialect_->IsDiv(op) && !(type_attr.getValue().isa<FloatType>() ||
-                                 type_attr.getValue().isa<ComplexType>())) {
+    if (dialect_->IsDiv(op) &&
+        !(mlir::isa<FloatType>(type_attr.getValue()) ||
+          mlir::isa<ComplexType>(type_attr.getValue()))) {
       return failure();
     }
 
@@ -2572,8 +2578,8 @@ class ConstantPushDown : public ConstantPushDownBase<ConstantPushDown> {
       // Dimensions of X must be smaller than or equal than those of C.
       // This also avoids having to increase the size of the child op's result
       // to match the broadcast with a bigger operand.
-      auto c_shape = const_op->getResult(0).getType().cast<ShapedType>();
-      auto x_shape = x_value.getType().cast<ShapedType>();
+      auto c_shape = mlir::cast<ShapedType>(const_op->getResult(0).getType());
+      auto x_shape = mlir::cast<ShapedType>(x_value.getType());
 
       if (c_shape.hasStaticShape() && x_shape.hasStaticShape() &&
           c_shape.getNumElements() > x_shape.getNumElements()) {
@@ -2677,7 +2683,7 @@ class PartialConstPropThroughIdentityN
     SmallVector<Value> control_operands;
     for (OpOperand &operand : op->getOpOperands()) {
       Value v = operand.get();
-      if (v.getType().isa<ControlType>()) break;
+      if (mlir::isa<ControlType>(v.getType())) break;
 
       Operation *v_op = v.getDefiningOp();
       if (!v_op || !dialect_->IsIdentityN(v_op) ||
@@ -2685,7 +2691,7 @@ class PartialConstPropThroughIdentityN
         continue;
       }
 
-      int res_index = v.cast<OpResult>().getResultNumber();
+      int res_index = mlir::cast<OpResult>(v).getResultNumber();
       Value value_to_forward = v_op->getOperand(res_index);
       if (!value_to_forward.getDefiningOp() ||
           !dialect_->IsConstant(value_to_forward.getDefiningOp())) {
@@ -2965,21 +2971,22 @@ class MulConvPushDown : public ConstantPatternBase<MulConvPushDown, FolderTrait,
       return failure();
     }
 
-    ShapedType mul_shape = (*op->result_type_begin()).cast<ShapedType>();
+    ShapedType mul_shape = mlir::cast<ShapedType>((*op->result_type_begin()));
     ShapedType conv_shape =
-        (*conv_node->result_type_begin()).cast<ShapedType>();
+        mlir::cast<ShapedType>((*conv_node->result_type_begin()));
     // TODO(chiahungduan): Symbolic shape equivalence is acceptable.
     if (!mul_shape.hasStaticShape() || !conv_shape.hasStaticShape() ||
         mul_shape != conv_shape) {
       return failure();
     }
 
-    auto filter_shape = conv_node->getOperand(1).getType().cast<ShapedType>();
+    auto filter_shape =
+        mlir::cast<ShapedType>(conv_node->getOperand(1).getType());
 
     Operation *const_node =
         left_child_is_constant ? mul_left_child : mul_right_child;
     auto const_node_shape =
-        (*const_node->result_type_begin()).cast<ShapedType>();
+        mlir::cast<ShapedType>((*const_node->result_type_begin()));
     if (!IsValidConstShapeForMulConvPushDown(
             conv_node->getAttrOfType<StringAttr>("data_format"), filter_shape,
             const_node_shape)) {
@@ -3235,7 +3242,7 @@ class ConstantPushDownBiasAdd
     if (!IsOperandsSafeToMove(add_child, const_child)) return failure();
 
     auto hasRank = [&](Value value) {
-      return value.getType().cast<ShapedType>().hasRank();
+      return mlir::cast<ShapedType>(value.getType()).hasRank();
     };
 
     if (!hasRank(op->getOperand(0)) || !hasRank(op->getOperand(1)) ||
@@ -3246,19 +3253,19 @@ class ConstantPushDownBiasAdd
 
     // Now get the ranks and types of the 3 leaf nodes.
     const int left_leaf_rank =
-        add_child->getOperand(0).getType().cast<ShapedType>().getRank();
+        mlir::cast<ShapedType>(add_child->getOperand(0).getType()).getRank();
     const int right_leaf_rank =
-        add_child->getOperand(1).getType().cast<ShapedType>().getRank();
+        mlir::cast<ShapedType>(add_child->getOperand(1).getType()).getRank();
 
     // At least one leaf must be a vector.
     if (left_leaf_rank != 1 && right_leaf_rank != 1) return failure();
 
     const int vector_idx = left_leaf_rank == 1 ? 0 : 1;
     auto vector_type =
-        add_child->getOperand(vector_idx).getType().cast<ShapedType>();
+        mlir::cast<ShapedType>(add_child->getOperand(vector_idx).getType());
     Type vector_d_type = vector_type.getElementType();
 
-    auto const_type = const_child->getResultTypes()[0].cast<ShapedType>();
+    auto const_type = mlir::cast<ShapedType>(const_child->getResultTypes()[0]);
     const int const_rank = const_type.getRank();
     Type const_d_type = const_type.getElementType();
 
@@ -3336,7 +3343,7 @@ class ConstantPushDownAdd : public ConstantPushDownBase<ConstantPushDownAdd> {
     if (!child_is_bias_add && !dialect_->IsAdd(add_child)) return failure();
 
     auto hasRank = [&](Value value) {
-      return value.getType().cast<ShapedType>().hasRank();
+      return mlir::cast<ShapedType>(value.getType()).hasRank();
     };
 
     if (!hasRank(op->getOperand(0)) || !hasRank(op->getOperand(1)) ||
@@ -3347,9 +3354,9 @@ class ConstantPushDownAdd : public ConstantPushDownBase<ConstantPushDownAdd> {
 
     // Now get the ranks and types of the 3 leaf nodes.
     const int left_leaf_rank =
-        add_child->getOperand(0).getType().cast<ShapedType>().getRank();
+        mlir::cast<ShapedType>(add_child->getOperand(0).getType()).getRank();
     const int right_leaf_rank =
-        add_child->getOperand(1).getType().cast<ShapedType>().getRank();
+        mlir::cast<ShapedType>(add_child->getOperand(1).getType()).getRank();
     // At least one leaf must be a vector.
     if (left_leaf_rank != 1 && right_leaf_rank != 1) return failure();
 
@@ -3357,18 +3364,18 @@ class ConstantPushDownAdd : public ConstantPushDownBase<ConstantPushDownAdd> {
     const int matrix_idx = 1 - vector_idx;
 
     ShapedType vector_type =
-        add_child->getOperand(vector_idx).getType().cast<ShapedType>();
+        mlir::cast<ShapedType>(add_child->getOperand(vector_idx).getType());
     Type vector_d_type = vector_type.getElementType();
 
     ShapedType matrix_type =
-        add_child->getOperand(matrix_idx).getType().cast<ShapedType>();
+        mlir::cast<ShapedType>(add_child->getOperand(matrix_idx).getType());
     const int matrix_rank = matrix_type.getRank();
     Type matrix_d_type = matrix_type.getElementType();
 
     const int const_index =
         op->getOperand(0).getDefiningOp() == const_child ? 0 : 1;
     ShapedType const_type =
-        const_child->getResult(0).getType().cast<ShapedType>();
+        mlir::cast<ShapedType>(const_child->getResult(0).getType());
     const int const_rank = const_type.getRank();
     Type const_d_type = const_type.getElementType();
 
@@ -3518,9 +3525,9 @@ class SimplifySelectOpBase : public FolderPatternBase<ConcreteType> {
     bool is_all_false = this->helper_.IsZeros(condition_op);
     if (!is_all_true && !is_all_false) return failure();
 
-    auto condition_type = op->getOperand(0).getType().cast<ShapedType>();
-    auto t_type = op->getOperand(1).getType().cast<ShapedType>();
-    auto e_type = op->getOperand(2).getType().cast<ShapedType>();
+    auto condition_type = mlir::cast<ShapedType>(op->getOperand(0).getType());
+    auto t_type = mlir::cast<ShapedType>(op->getOperand(1).getType());
+    auto e_type = mlir::cast<ShapedType>(op->getOperand(2).getType());
     if (!condition_type.hasStaticShape() || !t_type.hasStaticShape() ||
         !e_type.hasStaticShape()) {
       return failure();
diff --git a/tensorflow/core/transforms/func_to_graph/BUILD b/tensorflow/core/transforms/func_to_graph/BUILD
index 0c62a5a2f90894..8463483b01d80f 100644
--- a/tensorflow/core/transforms/func_to_graph/BUILD
+++ b/tensorflow/core/transforms/func_to_graph/BUILD
@@ -19,6 +19,7 @@ cc_library(
         "//tensorflow/core/platform:errors",
         "//tensorflow/core/platform:status",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
     ],
 )
 
diff --git a/tensorflow/core/transforms/func_to_graph/func_to_graph.cc b/tensorflow/core/transforms/func_to_graph/func_to_graph.cc
index 15bd5bc00252a6..dcedaed70f4c1a 100644
--- a/tensorflow/core/transforms/func_to_graph/func_to_graph.cc
+++ b/tensorflow/core/transforms/func_to_graph/func_to_graph.cc
@@ -16,6 +16,7 @@ limitations under the License.
 #include "tensorflow/core/transforms/func_to_graph/func_to_graph.h"
 
 #include "mlir/IR/BuiltinAttributes.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/core/ir/ops.h"
 #include "tensorflow/core/platform/errors.h"
 #include "tensorflow/core/platform/status.h"
@@ -47,8 +48,9 @@ tensorflow::Status FuncToGraph(GraphFuncOp func) {
 
       // Init the entry with nullptr and it'll be updated with associated op
       // later.
-      referred_ops.insert({lifted_value_attr[0].cast<StringAttr>().getValue(),
-                           /*Operation=*/nullptr});
+      referred_ops.insert(
+          {mlir::cast<StringAttr>(lifted_value_attr[0]).getValue(),
+           /*Operation=*/nullptr});
     }
   }
 
@@ -59,7 +61,7 @@ tensorflow::Status FuncToGraph(GraphFuncOp func) {
   }
 
   for (const auto &it : llvm::enumerate(func.getArguments())) {
-    if (it.value().getType().isa<ControlType>()) continue;
+    if (mlir::isa<ControlType>(it.value().getType())) continue;
 
     auto lifted_value_attr =
         func.getArgAttrOfType<ArrayAttr>(it.index(), lifted_value_attr_name);
@@ -70,7 +72,7 @@ tensorflow::Status FuncToGraph(GraphFuncOp func) {
     }
 
     StringRef value_defining_op_name =
-        lifted_value_attr[0].cast<StringAttr>().getValue();
+        mlir::cast<StringAttr>(lifted_value_attr[0]).getValue();
     Operation *op = referred_ops[value_defining_op_name];
     if (!op) {
       return tensorflow::errors::InvalidArgument(
@@ -79,7 +81,7 @@ tensorflow::Status FuncToGraph(GraphFuncOp func) {
     }
 
     uint64_t result_index =
-        lifted_value_attr[1].cast<IntegerAttr>().getValue().getZExtValue();
+        mlir::cast<IntegerAttr>(lifted_value_attr[1]).getValue().getZExtValue();
     if (result_index >= op->getNumResults()) {
       return tensorflow::errors::InvalidArgument(
           "result index out of bound: seeing index ", result_index,
diff --git a/tensorflow/core/transforms/functional_to_region/impl.cc b/tensorflow/core/transforms/functional_to_region/impl.cc
index ffdffd14d494e5..046f64493eb4a7 100644
--- a/tensorflow/core/transforms/functional_to_region/impl.cc
+++ b/tensorflow/core/transforms/functional_to_region/impl.cc
@@ -29,6 +29,7 @@ limitations under the License.
 #include "mlir/IR/PatternMatch.h"  // from @llvm-project
 #include "mlir/IR/SymbolTable.h"  // from @llvm-project
 #include "mlir/IR/Value.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "tensorflow/core/ir/dialect.h"
 #include "tensorflow/core/ir/ops.h"
@@ -383,7 +384,7 @@ LogicalResult ConvertCaseLikeOp<CaseLikeOp, CaseLikeRegionOp>::matchAndRewrite(
   }
   ArrayAttr region_attrs = nullptr;
   if (!llvm::all_of(preserved_attrs, [](Attribute attr) {
-        return AreRegionAttrsEmpty(attr.cast<RegionAttr>());
+        return AreRegionAttrsEmpty(mlir::cast<RegionAttr>(attr));
       }))
     region_attrs = rewriter.getArrayAttr(preserved_attrs);
 
diff --git a/tensorflow/core/transforms/graph_compactor/pass.cc b/tensorflow/core/transforms/graph_compactor/pass.cc
index bf5eb785c8f181..883bc36891e9d7 100644
--- a/tensorflow/core/transforms/graph_compactor/pass.cc
+++ b/tensorflow/core/transforms/graph_compactor/pass.cc
@@ -110,7 +110,8 @@ class NameCompressPass : public impl::NameCompressBase<NameCompressPass> {
       arg_attrs.reserve(func.getNumArguments());
       // Iterate over the function arguments, skipping the control tokens.
       for (int i = 0, e = func.getNumArguments(); i != e; i += 2) {
-        NamedAttrList attrs = func.getArgAttrsAttr()[i].cast<DictionaryAttr>();
+        NamedAttrList attrs =
+            mlir::cast<DictionaryAttr>(func.getArgAttrsAttr()[i]);
         attrs.set(dialect_->getTfgNameAttrIdentifier(), encode_new_name());
         arg_attrs.append({attrs.getDictionary(&getContext()), empty_dict_});
       }
diff --git a/tensorflow/core/transforms/graph_to_func/graph_to_func.cc b/tensorflow/core/transforms/graph_to_func/graph_to_func.cc
index 83c2230afa40e0..4db1cc15ff310c 100644
--- a/tensorflow/core/transforms/graph_to_func/graph_to_func.cc
+++ b/tensorflow/core/transforms/graph_to_func/graph_to_func.cc
@@ -86,11 +86,11 @@ tensorflow::Status GraphToFunc(GraphOp graph, ArrayRef<Value> feeds,
     feed.replaceAllUsesWith(body->addArgument(feed.getType(), loc));
     body->addArgument(control_ty, loc);
     llvm::SmallVector<NamedAttribute> arg_attrs;
-    std::string slot = OpResultToSlotName(feed.cast<OpResult>());
+    std::string slot = OpResultToSlotName(mlir::cast<OpResult>(feed));
     arg_attrs.push_back(NamedAttribute(tfg_name, builder.getStringAttr(slot)));
-    arg_attrs.push_back(
-        NamedAttribute(lifted_value_name,
-                       createLiftedValueAttr(builder, feed.cast<OpResult>())));
+    arg_attrs.push_back(NamedAttribute(
+        lifted_value_name,
+        createLiftedValueAttr(builder, mlir::cast<OpResult>(feed))));
     args_rets_attrs.push_back(builder.getDictionaryAttr(arg_attrs));
     args_rets_attrs.push_back(Attribute{});
   }
@@ -99,7 +99,7 @@ tensorflow::Status GraphToFunc(GraphOp graph, ArrayRef<Value> feeds,
   args_rets_attrs.clear();
   for (Value fetch : fetches) {
     llvm::SmallVector<NamedAttribute> arg_attrs;
-    std::string slot = OpResultToSlotName(fetch.cast<OpResult>());
+    std::string slot = OpResultToSlotName(mlir::cast<OpResult>(fetch));
     arg_attrs.push_back(NamedAttribute(tfg_name, builder.getStringAttr(slot)));
     args_rets_attrs.push_back(builder.getDictionaryAttr(arg_attrs));
   }
diff --git a/tensorflow/core/transforms/region_to_functional/impl.cc b/tensorflow/core/transforms/region_to_functional/impl.cc
index a4d8b07f2594e2..439f622240b5aa 100644
--- a/tensorflow/core/transforms/region_to_functional/impl.cc
+++ b/tensorflow/core/transforms/region_to_functional/impl.cc
@@ -518,7 +518,7 @@ NamedAttrList BasePattern::BuildAttributes(RegionAttr preserved,
   // For each argument and result, lookup a name and regenerate output shapes.
   const auto build_attrs = [&](ArrayAttr attr, auto &it,
                                std::optional<ValueRange> args) {
-    NamedAttrList attrs(attr ? attr[it.index()].template cast<DictionaryAttr>()
+    NamedAttrList attrs(attr ? mlir::cast<DictionaryAttr>(attr[it.index()])
                              : DictionaryAttr());
     // If no name was preserved, try to find one.
     if (!attrs.get(ids_.tfg_name)) {
@@ -548,7 +548,7 @@ NamedAttrList BasePattern::BuildAttributes(RegionAttr preserved,
 StringAttr BasePattern::TryFindName(Value value,
                                     std::optional<ValueRange> args) const {
   // If this is an op result, return the op's name.
-  if (auto result = value.dyn_cast<OpResult>()) {
+  if (auto result = mlir::dyn_cast<OpResult>(value)) {
     Operation *op = result.getOwner();
     if (auto name =
             op->getAttrOfType<StringAttr>(dialect_.getNameAttrIdentifier())) {
@@ -558,7 +558,7 @@ StringAttr BasePattern::TryFindName(Value value,
     return {};
   }
 
-  auto arg = value.cast<BlockArgument>();
+  auto arg = mlir::cast<BlockArgument>(value);
   Operation *parent = arg.getOwner()->getParentOp();
   auto iface = dyn_cast<ControlArgumentInterface>(parent);
   if (!iface) return {};
@@ -904,12 +904,11 @@ LogicalResult ConvertCaseLikeOp<CaseLikeRegionOp, CaseLikeOp>::matchAndRewrite(
     // Get the preserved attributes, if there are any.
     RegionAttr preserved =
         op.getRegionAttrs()
-            ? op.getRegionAttrsAttr()[idx].template cast<RegionAttr>()
+            ? mlir::cast<RegionAttr>(op.getRegionAttrsAttr()[idx])
             : nullptr;
     DictionaryAttr attrs =
-        branch_func_attrs
-            ? branch_func_attrs[idx].template cast<DictionaryAttr>()
-            : nullptr;
+        branch_func_attrs ? mlir::cast<DictionaryAttr>(branch_func_attrs[idx])
+                          : nullptr;
     branch_regions.push_back(BasePattern::RegionFunction{
         it.value(), preserved, attrs, ("case_function_" + Twine(idx)).str()});
   }
diff --git a/tensorflow/core/transforms/remapper/BUILD b/tensorflow/core/transforms/remapper/BUILD
index 38b09b8bf601cb..e75b654b69a59f 100644
--- a/tensorflow/core/transforms/remapper/BUILD
+++ b/tensorflow/core/transforms/remapper/BUILD
@@ -48,6 +48,7 @@ cc_library(
         "@llvm-project//mlir:PDLInterpDialect",
         "@llvm-project//mlir:Parser",
         "@llvm-project//mlir:Pass",
+        "@llvm-project//mlir:Support",
         "@llvm-project//mlir:TransformUtils",
         "@llvm-project//mlir:Transforms",
     ],
diff --git a/tensorflow/core/transforms/remapper/pass.cc b/tensorflow/core/transforms/remapper/pass.cc
index 7adc8d6d84a069..f881fce665da32 100644
--- a/tensorflow/core/transforms/remapper/pass.cc
+++ b/tensorflow/core/transforms/remapper/pass.cc
@@ -26,6 +26,7 @@ limitations under the License.
 #include "mlir/IR/OperationSupport.h"  // from @llvm-project
 #include "mlir/IR/PatternMatch.h"  // from @llvm-project
 #include "mlir/Parser/Parser.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"  // from @llvm-project
 #include "tensorflow/core/framework/types.h"
 #include "tensorflow/core/ir/dialect.h"
@@ -55,8 +56,8 @@ class MatchMulSigmoid : public RewritePattern {
   LogicalResult matchAndRewrite(Operation *op,
                                 PatternRewriter &rewriter) const override {
     TypeAttr dtype_attr = op->getAttrOfType<TypeAttr>("T");
-    if (!dtype_attr.getValue().isa<Float32Type>() &&
-        !dtype_attr.getValue().isa<BFloat16Type>()) {
+    if (!mlir::isa<Float32Type>(dtype_attr.getValue()) &&
+        !mlir::isa<BFloat16Type>(dtype_attr.getValue())) {
       return failure();
     }
 
@@ -217,7 +218,7 @@ class MatchStringToHashBucket : public RemapperPatternBase {
     TypeAttr dtype_attr = as_string_op->getAttrOfType<TypeAttr>("T");
     if (!dtype_attr) return failure();
     Type dtype = dtype_attr.getValue();
-    if (!dtype.isa<IntegerType>()) return failure();
+    if (!mlir::isa<IntegerType>(dtype)) return failure();
 
     // width/fill attributes must be default values
     auto width_attr = as_string_op->getAttrOfType<IntegerAttr>("width");
@@ -270,7 +271,7 @@ class MatchSoftplusTanhMul : public RemapperPatternBase {
     auto attr = op->getAttrOfType<TypeAttr>("T");
     if (!attr) return failure();
     Type dtype = attr.getValue();
-    if (!dtype.isa<Float32Type, BFloat16Type>()) return failure();
+    if (!mlir::isa<Float32Type, BFloat16Type>(dtype)) return failure();
 
     TFOp mul_wrapper(op);
 
@@ -511,12 +512,12 @@ class FusedBatchNormExRewriter : public RemapperPatternBase {
       // GPU supports float and half.
       // Put this condition before check `isOneDNNEnabled()` because this node
       // should be processed when it's on GPU and oneDNN CPU is enabled.
-      if (!dtype_T.isa<Float32Type, Float16Type>()) return false;
+      if (!mlir::isa<Float32Type, Float16Type>(dtype_T)) return false;
     } else {
       // Bfloat16 is available only with oneDNN.
       // Half is not available with oneDNN.
       if (this->helper_.isOneDNNEnabled() &&
-          !dtype_T.isa<Float32Type, BFloat16Type>()) {
+          !mlir::isa<Float32Type, BFloat16Type>(dtype_T)) {
         return false;
       }
     }
@@ -543,11 +544,11 @@ class FusedBatchNormExRewriter : public RemapperPatternBase {
       if (data_format != "NHWC") return false;
 
       // Data type must be Float16.
-      if (!dtype_T.isa<Float16Type>()) return false;
+      if (!mlir::isa<Float16Type>(dtype_T)) return false;
 
       // Channel dimension must be a multiple of 4.
       auto fbn_input0_shape =
-          fused_batch_norm_op->getOperand(0).getType().cast<ShapedType>();
+          mlir::cast<ShapedType>(fused_batch_norm_op->getOperand(0).getType());
       auto fbn_input0_shape_dims = fbn_input0_shape.getShape();
 
       const bool valid_channel_dim = (fbn_input0_shape.getRank() == 4) &&
@@ -562,7 +563,7 @@ class FusedBatchNormExRewriter : public RemapperPatternBase {
     // FusedBatchNormV2 and V3 have an extra type parameter.
     if (fused_batch_norm_op->getName().getStringRef() != "tfg.FusedBatchNorm") {
       auto attr = fused_batch_norm_op->getAttrOfType<TypeAttr>("U");
-      if (attr && !attr.getValue().isa<Float32Type>()) {
+      if (attr && !mlir::isa<Float32Type>(attr.getValue())) {
         return false;
       }
     }
@@ -618,9 +619,9 @@ class FusedBatchNormExRewriter : public RemapperPatternBase {
       auto add_input1_op = activation_input_op->getOperand(1).getDefiningOp();
       if (add_input0_op == nullptr || add_input1_op == nullptr) return false;
       auto add_input0_shape =
-          activation_input_op->getOperand(0).getType().cast<ShapedType>();
+          mlir::cast<ShapedType>(activation_input_op->getOperand(0).getType());
       auto add_input1_shape =
-          activation_input_op->getOperand(1).getType().cast<ShapedType>();
+          mlir::cast<ShapedType>(activation_input_op->getOperand(1).getType());
       if (add_input0_shape.getShape() != add_input1_shape.getShape()) {
         return false;
       }
diff --git a/tensorflow/core/transforms/remapper/remapping_helper.h b/tensorflow/core/transforms/remapper/remapping_helper.h
index 0e751f3d550629..1d8db8fc459a8e 100644
--- a/tensorflow/core/transforms/remapper/remapping_helper.h
+++ b/tensorflow/core/transforms/remapper/remapping_helper.h
@@ -17,6 +17,7 @@ limitations under the License.
 
 #include <string>
 
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/core/framework/types.h"
 #include "tensorflow/core/transforms/utils/op_cat_helper.h"
 #include "tensorflow/core/transforms/utils/utils.h"
@@ -111,9 +112,9 @@ class OpPropertyHelper : public OpCatHelper {
     if (!attr) return false;
     Type dtype = attr.getValue();
     if (dialect_->IsConv2D(contraction_op)) {
-      return dtype.isa<Float32Type>();
+      return mlir::isa<Float32Type>(dtype);
     } else if (dialect_->IsMatMul(contraction_op)) {
-      return dtype.isa<Float32Type, Float64Type>();
+      return mlir::isa<Float32Type, Float64Type>(dtype);
     } else {
       return false;
     }
@@ -131,13 +132,13 @@ class OpPropertyHelper : public OpCatHelper {
       // fusions are handled differently than contraction ops.
       bool is_supported = IsContraction(contraction_op) ||
                           dialect_->IsAnyBatchMatMul(contraction_op);
-      return is_supported && dtype.isa<Float32Type, BFloat16Type>();
+      return is_supported && mlir::isa<Float32Type, BFloat16Type>(dtype);
     }
 
     if (dialect_->IsConv2D(contraction_op)) {
-      return dtype.isa<Float32Type, Float64Type>();
+      return mlir::isa<Float32Type, Float64Type>(dtype);
     } else if (dialect_->IsMatMul(contraction_op)) {
-      return dtype.isa<Float32Type>();
+      return mlir::isa<Float32Type>(dtype);
     } else {
       return false;
     }
diff --git a/tensorflow/core/transforms/shape_inference/pass.cc b/tensorflow/core/transforms/shape_inference/pass.cc
index 80a28e0b53dbfb..3b95924476adfb 100644
--- a/tensorflow/core/transforms/shape_inference/pass.cc
+++ b/tensorflow/core/transforms/shape_inference/pass.cc
@@ -52,7 +52,7 @@ using tensorflow::shape_inference::ShapeHandle;
 
 // Only non-static shape or type with subtype can be refined.
 static bool CanBeRefined(Type type) {
-  auto shape_type = type.dyn_cast<ShapedType>();
+  auto shape_type = mlir::dyn_cast<ShapedType>(type);
   if (!shape_type) return false;
 
   // Returns whether type with subtypes can be further refined.
@@ -60,8 +60,8 @@ static bool CanBeRefined(Type type) {
     return tws.GetSubtypes().empty() ||
            llvm::any_of(tws.GetSubtypes(), CanBeRefined);
   };
-  auto type_with_subtype = shape_type.getElementType()
-                               .dyn_cast<tf_type::TensorFlowTypeWithSubtype>();
+  auto type_with_subtype = mlir::dyn_cast<tf_type::TensorFlowTypeWithSubtype>(
+      shape_type.getElementType());
   if (type_with_subtype && can_refine_subtypes(type_with_subtype)) return true;
 
   return !shape_type.hasStaticShape();
@@ -85,7 +85,7 @@ class ShapeInference : public impl::ShapeInferenceBase<ShapeInference> {
 
   // Get the tensor value if possible, return nullptr otherwise.
   DenseElementsAttr GetTensorValue(Value result) {
-    OpResult op_result = result.dyn_cast<OpResult>();
+    OpResult op_result = mlir::dyn_cast<OpResult>(result);
     if (op_result) {
       auto it = cached_tensor_values_.find(op_result);
       if (it != cached_tensor_values_.end()) return it->second;
@@ -99,7 +99,7 @@ class ShapeInference : public impl::ShapeInferenceBase<ShapeInference> {
 void ShapeInference::TryToCacheResultsTensorValue(Operation *op) {
   // Only op with static shape is able to construct the tensor value.
   if (llvm::all_of(op->getResults().drop_back(), [this](Value value) {
-        auto shape = value.getType().cast<ShapedType>();
+        auto shape = mlir::cast<ShapedType>(value.getType());
         /// NOMUTANTS -- shape.hasStaticShape is a cheaper operation than
         /// GetTensorValue
         return (!shape.hasStaticShape() || GetTensorValue(value) != nullptr);
@@ -117,9 +117,10 @@ void ShapeInference::TryToCacheResultsTensorValue(Operation *op) {
     if (!operand_tensor_value) return;
     cached_tensor_values_[op->getResult(0)] = operand_tensor_value;
   } else if (op_name == "Rank") {
-    ShapedType operand_shape = op->getOperand(0).getType().cast<ShapedType>();
+    ShapedType operand_shape =
+        mlir::cast<ShapedType>(op->getOperand(0).getType());
     if (!operand_shape.hasRank()) return;
-    ShapedType return_shape = op->getResultTypes()[0].cast<ShapedType>();
+    ShapedType return_shape = mlir::cast<ShapedType>(op->getResultTypes()[0]);
     DenseElementsAttr tensor_value;
     if (return_shape.getElementType().isInteger(32)) {
       tensor_value = DenseElementsAttr::get(
@@ -130,9 +131,10 @@ void ShapeInference::TryToCacheResultsTensorValue(Operation *op) {
     }
     cached_tensor_values_[op->getResult(0)] = tensor_value;
   } else if (op_name == "Size") {
-    ShapedType operand_shape = op->getOperand(0).getType().cast<ShapedType>();
+    ShapedType operand_shape =
+        mlir::cast<ShapedType>(op->getOperand(0).getType());
     if (!operand_shape.hasStaticShape()) return;
-    ShapedType return_shape = op->getResultTypes()[0].cast<ShapedType>();
+    ShapedType return_shape = mlir::cast<ShapedType>(op->getResultTypes()[0]);
     DenseElementsAttr tensor_value;
     if (return_shape.getElementType().isInteger(32)) {
       tensor_value =
@@ -147,13 +149,14 @@ void ShapeInference::TryToCacheResultsTensorValue(Operation *op) {
   } else if (op_name == "Shape" || op_name == "ShapeN") {
     for (OpOperand &operand : op->getOpOperands()) {
       Type operand_type = operand.get().getType();
-      if (operand_type.isa<ControlType>()) break;
+      if (mlir::isa<ControlType>(operand_type)) break;
 
-      auto operand_shape = operand_type.cast<ShapedType>();
+      auto operand_shape = mlir::cast<ShapedType>(operand_type);
       if (!operand_shape.hasStaticShape()) continue;
 
       int idx = operand.getOperandNumber();
-      ShapedType return_shape = op->getResultTypes()[idx].cast<ShapedType>();
+      ShapedType return_shape =
+          mlir::cast<ShapedType>(op->getResultTypes()[idx]);
       DenseElementsAttr tensor_value;
       if (return_shape.getElementType().isInteger(32)) {
         tensor_value = DenseElementsAttr::get<int>(
@@ -182,7 +185,7 @@ void ShapeInference::runOnOperation() {
 
   auto op_result_as_shape_fn = [this](InferenceContext &ic,
                                       OpResult op_result) -> ShapeHandle {
-    auto rt = op_result.getType().dyn_cast<RankedTensorType>();
+    auto rt = mlir::dyn_cast<RankedTensorType>(op_result.getType());
     // NOMUTANTS -- TODO(chiahungduan): Review this condition to see if shape
     // with known rank but unknown dimension is acceptable.
     if (!rt || rt.getRank() != 1 || !rt.hasStaticShape()) return {};
@@ -199,7 +202,8 @@ void ShapeInference::runOnOperation() {
 
   auto infer_and_update_shapes = [&](Operation *op) -> bool {
     auto result_element_type_fn = [&](int idx) -> Type {
-      return op->getResult(idx).getType().cast<ShapedType>().getElementType();
+      return mlir::cast<ShapedType>(op->getResult(idx).getType())
+          .getElementType();
     };
 
     SmallVector<ShapedTypeComponents> results;
@@ -223,7 +227,7 @@ void ShapeInference::runOnOperation() {
       }
 
       Type refined_type = tf_type::GetCastCompatibleType(
-          op_result.getType().cast<ShapedType>(), inferred_type);
+          mlir::cast<ShapedType>(op_result.getType()), inferred_type);
 
       // Certain attributes like _output_shapes may have incorrect shape
       // information. When it's incompatible, use the result of shape inference
diff --git a/tensorflow/core/transforms/utils/eval_utils_test.cc b/tensorflow/core/transforms/utils/eval_utils_test.cc
index 78b71a9683f876..072e88f2db7465 100644
--- a/tensorflow/core/transforms/utils/eval_utils_test.cc
+++ b/tensorflow/core/transforms/utils/eval_utils_test.cc
@@ -22,6 +22,7 @@ limitations under the License.
 #include "mlir/IR/MLIRContext.h"  // from @llvm-project
 #include "mlir/IR/Operation.h"  // from @llvm-project
 #include "mlir/Parser/Parser.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "tensorflow/core/framework/device_base.h"
 #include "tensorflow/core/framework/resource_mgr.h"
@@ -103,8 +104,8 @@ TEST(EvalUtilsTest, EvaluateOperation) {
       {const_0->getAttrOfType<ElementsAttr>("value")}, result)));
 
   ASSERT_EQ(result.size(), 1);
-  ASSERT_TRUE(result[0].isa<ElementsAttr>());
-  EXPECT_EQ(result[0].cast<ElementsAttr>().getValues<int>()[0], 1);
+  ASSERT_TRUE(mlir::isa<ElementsAttr>(result[0]));
+  EXPECT_EQ(mlir::cast<ElementsAttr>(result[0]).getValues<int>()[0], 1);
 
   result.clear();
 
@@ -113,8 +114,8 @@ TEST(EvalUtilsTest, EvaluateOperation) {
       {const_1->getAttrOfType<ElementsAttr>("value")}, result)));
 
   ASSERT_EQ(result.size(), 1);
-  ASSERT_TRUE(result[0].isa<ElementsAttr>());
-  EXPECT_EQ(result[0].cast<ElementsAttr>().getValues<int>()[0], 2);
+  ASSERT_TRUE(mlir::isa<ElementsAttr>(result[0]));
+  EXPECT_EQ(mlir::cast<ElementsAttr>(result[0]).getValues<int>()[0], 2);
 
   result.clear();
 
@@ -125,8 +126,8 @@ TEST(EvalUtilsTest, EvaluateOperation) {
                               result)));
 
   ASSERT_EQ(result.size(), 1);
-  ASSERT_TRUE(result[0].isa<ElementsAttr>());
-  EXPECT_EQ(result[0].cast<ElementsAttr>().getValues<int>()[0], 3);
+  ASSERT_TRUE(mlir::isa<ElementsAttr>(result[0]));
+  EXPECT_EQ(mlir::cast<ElementsAttr>(result[0]).getValues<int>()[0], 3);
 }
 
 TEST(EvalUtilsTest, OutputInvalidation) {
@@ -170,7 +171,7 @@ TEST(EvalUtilsTest, OutputInvalidation) {
   ASSERT_EQ(result.size(), 2);
   // Output 0 is invalidated.
   EXPECT_EQ(result[0], nullptr);
-  EXPECT_EQ(result[1].cast<ElementsAttr>().getValues<int>()[0], 2);
+  EXPECT_EQ(mlir::cast<ElementsAttr>(result[1]).getValues<int>()[0], 2);
 }
 
 }  // namespace tfg
diff --git a/tensorflow/core/transforms/utils/op_cat_helper.cc b/tensorflow/core/transforms/utils/op_cat_helper.cc
index 5107c2e7b7c94e..1347072cd87676 100644
--- a/tensorflow/core/transforms/utils/op_cat_helper.cc
+++ b/tensorflow/core/transforms/utils/op_cat_helper.cc
@@ -15,6 +15,7 @@ limitations under the License.
 
 #include "tensorflow/core/transforms/utils/op_cat_helper.h"
 
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/core/framework/op.h"
 #include "tensorflow/core/framework/types.h"
 #include "tensorflow/core/ir/dialect.h"
@@ -55,22 +56,22 @@ bool SplatElementsAttrHasValue(SplatElementsAttr attr, float v) {
     IF_SPLAT_VALUE_IS(tensorflow::DT_DOUBLE, v);
   } else if (type.isBF16()) {
     IF_SPLAT_VALUE_IS(tensorflow::DT_BFLOAT16, v);
-  } else if (type.isa<ComplexType>()) {
-    ComplexType complex_type = type.cast<ComplexType>();
+  } else if (mlir::isa<ComplexType>(type)) {
+    ComplexType complex_type = mlir::cast<ComplexType>(type);
     if (complex_type.getElementType().isF32()) {
       IF_SPLAT_VALUE_IS(tensorflow::DT_COMPLEX64, v);
     } else if (complex_type.getElementType().isF64()) {
       IF_SPLAT_VALUE_IS(tensorflow::DT_COMPLEX128, v);
     }
-  } else if (type.isa<tf_type::Qint8Type>()) {
+  } else if (mlir::isa<tf_type::Qint8Type>(type)) {
     IF_SPLAT_VALUE_IS(tensorflow::DT_QINT8, v);
-  } else if (type.isa<tf_type::Qint16Type>()) {
+  } else if (mlir::isa<tf_type::Qint16Type>(type)) {
     IF_SPLAT_VALUE_IS(tensorflow::DT_QINT16, v);
-  } else if (type.isa<tf_type::Qint32Type>()) {
+  } else if (mlir::isa<tf_type::Qint32Type>(type)) {
     IF_SPLAT_VALUE_IS(tensorflow::DT_QINT32, v);
-  } else if (type.isa<tf_type::Quint8Type>()) {
+  } else if (mlir::isa<tf_type::Quint8Type>(type)) {
     IF_SPLAT_VALUE_IS(tensorflow::DT_QUINT8, v);
-  } else if (type.isa<tf_type::Quint16Type>()) {
+  } else if (mlir::isa<tf_type::Quint16Type>(type)) {
     IF_SPLAT_VALUE_IS(tensorflow::DT_QUINT16, v);
   }
 #undef IF_SPLAT_VALUE_IS
@@ -82,7 +83,7 @@ bool SplatElementsAttrHasValue(SplatElementsAttr attr, float v) {
 bool OpCatHelper::IsAggregate(TFOp op) {
   if (dialect_->IsAdd(op)) {
     auto attr = op->getAttrOfType<TypeAttr>("T");
-    return !attr || !attr.getValue().isa<StringType>();
+    return !attr || !mlir::isa<StringType>(attr.getValue());
   }
   const tensorflow::OpDef *op_def = nullptr;
   tensorflow::Status status = tensorflow::OpRegistry::Global()->LookUpOpDef(
@@ -93,7 +94,7 @@ bool OpCatHelper::IsAggregate(TFOp op) {
 bool OpCatHelper::IsCommutative(TFOp op) {
   if (dialect_->IsAdd(op)) {
     auto attr = op->getAttrOfType<TypeAttr>("T");
-    return !attr || !attr.getValue().isa<StringType>();
+    return !attr || !mlir::isa<StringType>(attr.getValue());
   }
   const tensorflow::OpDef *op_def = nullptr;
   tensorflow::Status status = tensorflow::OpRegistry::Global()->LookUpOpDef(
diff --git a/tensorflow/dtensor/cc/BUILD b/tensorflow/dtensor/cc/BUILD
index 3d28e474d680ea..a1ba57eb3f104c 100644
--- a/tensorflow/dtensor/cc/BUILD
+++ b/tensorflow/dtensor/cc/BUILD
@@ -204,6 +204,7 @@ cc_library(
         "@com_google_absl//absl/container:flat_hash_map",
         "@llvm-project//llvm:Support",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
     ],
 )
 
diff --git a/tensorflow/dtensor/cc/save_restore_util.cc b/tensorflow/dtensor/cc/save_restore_util.cc
index b6f040a5f24fc6..dcaf41baf5f1e6 100644
--- a/tensorflow/dtensor/cc/save_restore_util.cc
+++ b/tensorflow/dtensor/cc/save_restore_util.cc
@@ -17,6 +17,7 @@ limitations under the License.
 
 #include "llvm/ADT/SmallVector.h"
 #include "mlir/IR/Builders.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/dtensor/mlir/value_utils.h"
 namespace tensorflow {
@@ -158,7 +159,8 @@ SaveOpSpecs BuildPerDeviceSave(
             builder
                 .create<mlir::TF::AddOp>(
                     prefix.getLoc(),
-                    prefix.getType().dyn_cast<mlir::RankedTensorType>(), prefix,
+                    mlir::dyn_cast<mlir::RankedTensorType>(prefix.getType()),
+                    prefix,
                     StringScalarConst(builder, prefix.getLoc(),
                                       DeviceSuffix(device_id, total_devices)))
                 .getZ();
diff --git a/tensorflow/dtensor/mlir/BUILD b/tensorflow/dtensor/mlir/BUILD
index 80531f9c04036a..6d531565f03f88 100644
--- a/tensorflow/dtensor/mlir/BUILD
+++ b/tensorflow/dtensor/mlir/BUILD
@@ -108,6 +108,7 @@ cc_library(
         "@com_google_absl//absl/strings",
         "@llvm-project//llvm:Support",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
     ],
 )
 
@@ -131,6 +132,7 @@ cc_library(
         "//tensorflow/dtensor/cc:tensor_layout",
         "@llvm-project//mlir:FuncDialect",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
     ],
     alwayslink = True,
 )
@@ -326,6 +328,7 @@ cc_library(
         "@llvm-project//llvm:Support",
         "@llvm-project//mlir:FuncDialect",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
     ],
     alwayslink = 1,
 )
diff --git a/tensorflow/dtensor/mlir/annotate_global_shape.cc b/tensorflow/dtensor/mlir/annotate_global_shape.cc
index e251254e1d38cf..462d9b3a3f8e96 100644
--- a/tensorflow/dtensor/mlir/annotate_global_shape.cc
+++ b/tensorflow/dtensor/mlir/annotate_global_shape.cc
@@ -27,6 +27,7 @@ limitations under the License.
 #include "mlir/IR/Operation.h"  // from @llvm-project
 #include "mlir/IR/TypeUtilities.h"  // from @llvm-project
 #include "mlir/IR/Types.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Transforms/Passes.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_types.h"
 #include "tensorflow/compiler/mlir/tensorflow/utils/convert_tensor.h"
@@ -51,8 +52,8 @@ void AnnotateFunctionArgRetvalGlobalShapes(mlir::func::FuncOp function,
     const auto& argument_type = argument_type_and_index.value();
     // Extract TensorType from element of resource type to allow setting proper
     // global shape of resource types.
-    if (auto resource_type = mlir::getElementTypeOrSelf(argument_type)
-                                 .dyn_cast<mlir::TF::ResourceType>()) {
+    if (auto resource_type = mlir::dyn_cast<mlir::TF::ResourceType>(
+            mlir::getElementTypeOrSelf(argument_type))) {
       auto subtype = resource_type.getSubtypes();
       if (subtype.size() == 1) {
         // subtype returns a Array of TensorType -- if it contains more than one
diff --git a/tensorflow/dtensor/mlir/cluster_function_conversion.cc b/tensorflow/dtensor/mlir/cluster_function_conversion.cc
index a1a40fc0801165..11aa6121c4339b 100644
--- a/tensorflow/dtensor/mlir/cluster_function_conversion.cc
+++ b/tensorflow/dtensor/mlir/cluster_function_conversion.cc
@@ -29,6 +29,7 @@ limitations under the License.
 #include "mlir/IR/Value.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
 #include "mlir/Pass/PassManager.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Transforms/Passes.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_device.h"
@@ -80,7 +81,7 @@ mlir::LogicalResult AttachRetvalLayouts(
     // operations. In that case, query the input layouts for function callsite
     // operations for layout information.
     if (!result_layout) {
-      if (auto block_arg = operand.dyn_cast<mlir::BlockArgument>()) {
+      if (auto block_arg = mlir::dyn_cast<mlir::BlockArgument>(operand)) {
         auto layout_or_status = ExtractLayoutFromOperand(
             sp_call_op.getOperand(block_arg.getArgNumber()));
         if (!layout_or_status.ok())
diff --git a/tensorflow/dtensor/mlir/collectives.cc b/tensorflow/dtensor/mlir/collectives.cc
index 696fd52923b36e..8a766d63912b89 100644
--- a/tensorflow/dtensor/mlir/collectives.cc
+++ b/tensorflow/dtensor/mlir/collectives.cc
@@ -29,6 +29,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinAttributes.h"  // from @llvm-project
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/IR/Value.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/compiler/mlir/tensorflow/transforms/collection_ops_util.h"
 #include "tensorflow/core/platform/errors.h"
@@ -79,7 +80,7 @@ StatusOr<mlir::Value> EmitAllGather(
   // For convenience, operate on explicit input shapes. This isn't necessary,
   // as we could instead generate operations on top of the dynamic shape.
   const mlir::TensorType input_type =
-      input.getType().dyn_cast<mlir::TensorType>();
+      mlir::dyn_cast<mlir::TensorType>(input.getType());
   if (!input_type) {
     return errors::Internal(
         llvm::formatv(
@@ -133,7 +134,7 @@ StatusOr<const mlir::Value> EmitAllScatter(
   }
 
   const mlir::TensorType input_type =
-      original_value.getType().dyn_cast<mlir::TensorType>();
+      mlir::dyn_cast<mlir::TensorType>(original_value.getType());
   if (!input_type)
     return errors::InvalidArgument(
         "input to EmitAllScatter does not have a TensorType");
@@ -199,7 +200,7 @@ StatusOr<mlir::Value> EmitAllToAll(
   // For convenience, operate on explicit input shapes. This isn't necessary,
   // as we could instead generate operations on top of the dynamic shape.
   const mlir::TensorType input_type =
-      input.getType().dyn_cast<mlir::TensorType>();
+      mlir::dyn_cast<mlir::TensorType>(input.getType());
   if (!input_type) {
     return errors::Internal(
         llvm::formatv(
@@ -260,7 +261,7 @@ StatusOr<mlir::Value> EmitDenseToSparseToDense(
       mlir::Value zero_scalar,
       CreateZeroScalarConst(
           builder, input.getLoc(),
-          input.getType().cast<mlir::TensorType>().getElementType()));
+          mlir::cast<mlir::TensorType>(input.getType()).getElementType()));
 
   auto dense = builder.create<mlir::TF::SparseToDenseOp>(
       input.getLoc(), input.getType(),
@@ -311,7 +312,7 @@ StatusOr<mlir::Value> EmitRelayout(
   // Save whether the input is from a SparseToDenseOp. If it is, then we will
   // emit a DenseToSparse and a SparseToDense op.
   bool is_sparse = IsSparseValue(input);
-  if (!input.getType().isa<mlir::RankedTensorType>())
+  if (!mlir::isa<mlir::RankedTensorType>(input.getType()))
     return errors::Internal(
         "attempting to relayout a tensor that does not "
         "have a rank");
@@ -389,7 +390,7 @@ StatusOr<mlir::Value> EmitRelayout(
 mlir::Operation* EmitTransposeOp(mlir::OpBuilder& builder,
                                  const mlir::Location& loc, mlir::Value input,
                                  std::vector<int64_t>& perm_arr) {
-  auto tr_input_type = input.getType().cast<mlir::ShapedType>();
+  auto tr_input_type = mlir::cast<mlir::ShapedType>(input.getType());
   auto shape = tr_input_type.getShape();
 
   auto perm_type = mlir::RankedTensorType::get(
@@ -591,7 +592,8 @@ StatusOr<mlir::Value> EmitHaloExchange(mlir::OpBuilder& builder, int halo_size,
   if (!mesh.is_tpu_mesh())
     return errors::InvalidArgument("Halo exchange is only supported on TPU.");
 
-  auto input_tensor_type = tensor.getType().dyn_cast<mlir::RankedTensorType>();
+  auto input_tensor_type =
+      mlir::dyn_cast<mlir::RankedTensorType>(tensor.getType());
   if (!input_tensor_type || !input_tensor_type.hasStaticShape())
     return errors::InvalidArgument(
         "Static shape of input tensor must be known for halo exchange.");
diff --git a/tensorflow/dtensor/mlir/device_utils.cc b/tensorflow/dtensor/mlir/device_utils.cc
index f32ae0f0beff91..16d0ff7871613f 100644
--- a/tensorflow/dtensor/mlir/device_utils.cc
+++ b/tensorflow/dtensor/mlir/device_utils.cc
@@ -17,6 +17,7 @@ limitations under the License.
 
 #include "mlir/Dialect/Func/IR/FuncOps.h"  // from @llvm-project
 #include "mlir/IR/Value.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/core/platform/errors.h"
 
 namespace tensorflow {
@@ -38,9 +39,10 @@ StatusOr<mlir::Value> DeviceId(mlir::Operation* op) {
         "enclosing function must contain device id as argument");
 
   auto device_id = function.getArgument(0);
-  auto device_id_type = device_id.getType().dyn_cast<mlir::RankedTensorType>();
+  auto device_id_type =
+      mlir::dyn_cast<mlir::RankedTensorType>(device_id.getType());
   if (!device_id_type ||
-      !device_id_type.getElementType().isa<mlir::IntegerType>())
+      !mlir::isa<mlir::IntegerType>(device_id_type.getElementType()))
     return errors::InvalidArgument(
         "0-th argument of the enclosing function should be integer device id.");
 
@@ -48,12 +50,12 @@ StatusOr<mlir::Value> DeviceId(mlir::Operation* op) {
 }
 
 StatusOr<mlir::Value> DeviceId(mlir::Value val) {
-  if (auto block_arg = val.dyn_cast<mlir::BlockArgument>()) {
+  if (auto block_arg = mlir::dyn_cast<mlir::BlockArgument>(val)) {
     auto device_id = block_arg.getOwner()->getArgument(0);
     auto device_id_type =
-        device_id.getType().dyn_cast<mlir::RankedTensorType>();
+        mlir::dyn_cast<mlir::RankedTensorType>(device_id.getType());
     if (!device_id_type ||
-        !device_id_type.getElementType().isa<mlir::IntegerType>())
+        !mlir::isa<mlir::IntegerType>(device_id_type.getElementType()))
       return errors::InvalidArgument(
           "0-th argument of the enclosing block should be integer device id.");
     return device_id;
diff --git a/tensorflow/dtensor/mlir/dtensor_allreduce_combine_optimization.cc b/tensorflow/dtensor/mlir/dtensor_allreduce_combine_optimization.cc
index 8d9e34b6aa77a5..a4dec16409fdac 100644
--- a/tensorflow/dtensor/mlir/dtensor_allreduce_combine_optimization.cc
+++ b/tensorflow/dtensor/mlir/dtensor_allreduce_combine_optimization.cc
@@ -31,6 +31,7 @@ limitations under the License.
 #include "mlir/IR/Types.h"  // from @llvm-project
 #include "mlir/IR/Visitors.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Transforms/TopologicalSortUtils.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/analysis/side_effect_analysis.h"
@@ -112,7 +113,7 @@ mlir::LogicalResult MergeAllReduceGroup(
   all_reduce_shapes.reserve(num_all_reduces);
   for (mlir::TF::DTensorAllReduceOp& all_reduce : all_reduce_group) {
     auto all_reduce_ranked_type =
-        all_reduce.getType().dyn_cast<mlir::RankedTensorType>();
+        mlir::dyn_cast<mlir::RankedTensorType>(all_reduce.getType());
     if (!all_reduce_ranked_type || !all_reduce_ranked_type.hasStaticShape()) {
       return all_reduce.emitOpError(llvm::formatv(
           "requires static shape for DTensorAllReduceOp, but got : {0}",
@@ -152,7 +153,7 @@ mlir::LogicalResult MergeAllReduceGroup(
     mlir::TF::DTensorAllReduceOp& all_reduce = all_reduce_group[i];
     mlir::Location loc = all_reduce.getLoc();
     auto all_reduce_ranked_type =
-        all_reduce.getType().dyn_cast<mlir::RankedTensorType>();
+        mlir::dyn_cast<mlir::RankedTensorType>(all_reduce.getType());
     if (!all_reduce_ranked_type || !all_reduce_ranked_type.hasStaticShape()) {
       return all_reduce.emitOpError(llvm::formatv(
           "requires static shape for DTensorAllReduceOp, but got : {0}",
@@ -201,7 +202,7 @@ mlir::LogicalResult MergeAllReduceGroup(
     mlir::TF::DTensorAllReduceOp& all_reduce = all_reduce_group[i];
     mlir::Location loc = all_reduce.getLoc();
     auto all_reduce_ranked_type =
-        all_reduce.getType().dyn_cast<mlir::RankedTensorType>();
+        mlir::dyn_cast<mlir::RankedTensorType>(all_reduce.getType());
     if (!all_reduce_ranked_type || !all_reduce_ranked_type.hasStaticShape()) {
       return all_reduce.emitOpError(llvm::formatv(
           "requires static shape for DTensorAllReduceOp, but got : {0}",
@@ -676,7 +677,7 @@ struct DTensorAllReduceCombineOptimization
         if (!all_reduce.getDeviceType().contains("TPU")) {
           // Only combine all reduces for GPU and CPU
           mlir::RankedTensorType all_reduce_ranked_type =
-              all_reduce.getType().dyn_cast<mlir::RankedTensorType>();
+              mlir::dyn_cast<mlir::RankedTensorType>(all_reduce.getType());
 
           if (all_reduce_ranked_type &&
               all_reduce_ranked_type.hasStaticShape()) {
diff --git a/tensorflow/dtensor/mlir/dtensor_allreduce_sum_optimization.cc b/tensorflow/dtensor/mlir/dtensor_allreduce_sum_optimization.cc
index 78a67ea1b9f404..c7b21f2508fc3d 100644
--- a/tensorflow/dtensor/mlir/dtensor_allreduce_sum_optimization.cc
+++ b/tensorflow/dtensor/mlir/dtensor_allreduce_sum_optimization.cc
@@ -25,6 +25,7 @@ limitations under the License.
 #include "mlir/IR/Operation.h"  // from @llvm-project
 #include "mlir/IR/UseDefLists.h"  // from @llvm-project
 #include "mlir/IR/Value.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Transforms/Passes.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
@@ -56,7 +57,7 @@ bool IsZeroConstant(mlir::Value val) {
       GetIdentitySkippedInputs(val).getDefiningOp());
   if (!const_input) return false;
   mlir::DenseFPElementsAttr attr =
-      const_input.getValue().dyn_cast<mlir::DenseFPElementsAttr>();
+      mlir::dyn_cast<mlir::DenseFPElementsAttr>(const_input.getValue());
   // This uses the fact that constant Attrs becomes splats, so we only need to
   // check one value.
   if (!attr || !attr.isSplat()) return false;
@@ -255,9 +256,9 @@ void OptimizeIdentityLikeOps(mlir::Operation* op, bool* changed) {
   mlir::Value op_output = op->getResult(0);
   dtensor_all_reduce.setOperand(0, op_output);
   dtensor_all_reduce.getInput().setType(
-      op_output.getType().cast<mlir::TensorType>());
+      mlir::cast<mlir::TensorType>(op_output.getType()));
   dtensor_all_reduce.getOutput().setType(
-      op_output.getType().cast<mlir::TensorType>());
+      mlir::cast<mlir::TensorType>(op_output.getType()));
 
   llvm::SmallPtrSet<mlir::Operation*, 4> exceptions{dtensor_all_reduce};
   op_output.replaceAllUsesExcept(dtensor_all_reduce.getOutput(), exceptions);
@@ -296,12 +297,12 @@ bool CheckWhileLoopOptimizationCriteria(
       llvm::dyn_cast_or_null<mlir::TF::DTensorAllReduceOp>(
           first_operand.get().getDefiningOp());
   if (all_reduce) {
-    block_arg = second_operand.get().dyn_cast<mlir::BlockArgument>();
+    block_arg = mlir::dyn_cast<mlir::BlockArgument>(second_operand.get());
     *add_input = &second_operand;
   } else {
     all_reduce = llvm::dyn_cast_or_null<mlir::TF::DTensorAllReduceOp>(
         second_operand.get().getDefiningOp());
-    block_arg = first_operand.get().dyn_cast<mlir::BlockArgument>();
+    block_arg = mlir::dyn_cast<mlir::BlockArgument>(first_operand.get());
     *add_input = &first_operand;
   }
   if (!block_arg || !all_reduce) return false;
diff --git a/tensorflow/dtensor/mlir/dtensor_collective_type_lowering.cc b/tensorflow/dtensor/mlir/dtensor_collective_type_lowering.cc
index 9c3171cbf0131d..2634c993b62014 100644
--- a/tensorflow/dtensor/mlir/dtensor_collective_type_lowering.cc
+++ b/tensorflow/dtensor/mlir/dtensor_collective_type_lowering.cc
@@ -35,6 +35,7 @@ limitations under the License.
 #include "mlir/IR/Value.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
 #include "mlir/Support/DebugStringHelper.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/transforms/collection_ops_util.h"
 #include "tensorflow/core/platform/errors.h"
 #include "tensorflow/core/platform/types.h"
@@ -99,9 +100,9 @@ mlir::LogicalResult ConvertShortIntReduce(ReduceOpType reduce_op) {
 
   // Handle bools by first casting to int32 and swapping All/Any for Min/Max.
   const mlir::TensorType& tensor_input_type =
-      input_type.dyn_cast<mlir::TensorType>();
+      mlir::dyn_cast<mlir::TensorType>(input_type);
   const mlir::TensorType& tensor_output_type =
-      output_type.dyn_cast<mlir::TensorType>();
+      mlir::dyn_cast<mlir::TensorType>(output_type);
   if (!tensor_input_type) return mlir::success();
   if (!tensor_output_type) return mlir::success();
 
@@ -166,12 +167,12 @@ mlir::LogicalResult ConvertComplexReduce(ReduceOpType reduce_op) {
   const mlir::Value tensor_input = reduce_op.getInput();
   const mlir::Value tensor_result = reduce_op.getResult();
   const mlir::TensorType complex_input_tensor_type =
-      tensor_input.getType().dyn_cast<mlir::TensorType>();
+      mlir::dyn_cast<mlir::TensorType>(tensor_input.getType());
   if (!complex_input_tensor_type) {
     return mlir::success();
   }
   const mlir::TensorType complex_result_tensor_type =
-      tensor_result.getType().dyn_cast<mlir::TensorType>();
+      mlir::dyn_cast<mlir::TensorType>(tensor_result.getType());
   if (!complex_result_tensor_type) {
     return mlir::success();
   }
@@ -222,12 +223,12 @@ mlir::LogicalResult ConvertComplexCollectives(CollectiveType op) {
   const mlir::Value tensor_input = op.getInput();
   const mlir::Value tensor_result = op.getResult();
   const mlir::TensorType complex_input_tensor_type =
-      tensor_input.getType().dyn_cast<mlir::TensorType>();
+      mlir::dyn_cast<mlir::TensorType>(tensor_input.getType());
   if (!complex_input_tensor_type) {
     return mlir::success();
   }
   const mlir::TensorType& complex_result_tensor_type =
-      tensor_result.getType().dyn_cast<mlir::TensorType>();
+      mlir::dyn_cast<mlir::TensorType>(tensor_result.getType());
   if (!complex_result_tensor_type) {
     return mlir::success();
   }
diff --git a/tensorflow/dtensor/mlir/dtensor_dialect/BUILD b/tensorflow/dtensor/mlir/dtensor_dialect/BUILD
index d484322d42fea4..534638eed7b6a6 100644
--- a/tensorflow/dtensor/mlir/dtensor_dialect/BUILD
+++ b/tensorflow/dtensor/mlir/dtensor_dialect/BUILD
@@ -71,6 +71,7 @@ cc_library(
         "@com_google_absl//absl/strings",
         "@llvm-project//mlir:IR",
         "@llvm-project//mlir:InferTypeOpInterface",
+        "@llvm-project//mlir:Support",
     ],
 )
 
diff --git a/tensorflow/dtensor/mlir/dtensor_dialect/ir/ops.cc b/tensorflow/dtensor/mlir/dtensor_dialect/ir/ops.cc
index 7fa35ca75f11d7..80a9a91f61b645 100644
--- a/tensorflow/dtensor/mlir/dtensor_dialect/ir/ops.cc
+++ b/tensorflow/dtensor/mlir/dtensor_dialect/ir/ops.cc
@@ -22,6 +22,7 @@ limitations under the License.
 #include "mlir/IR/Dialect.h"  // from @llvm-project
 #include "mlir/IR/DialectImplementation.h"  // from @llvm-project
 #include "mlir/IR/MLIRContext.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/utils/string_container_utils.h"
 #include "tensorflow/dtensor/cc/tensor_layout.h"
 #include "tensorflow/dtensor/mlir/dtensor_dialect/ir/dialect.h"
@@ -144,9 +145,10 @@ static void printLayoutAttr(LayoutAttr attr, DialectAsmPrinter &os) {
 void DTensorDialect::printAttribute(Attribute attr,
                                     DialectAsmPrinter &os) const {
   // Cast into correct attribute and print
-  if (auto mesh_attr = attr.dyn_cast<MeshAttr>()) printMeshAttr(mesh_attr, os);
+  if (auto mesh_attr = mlir::dyn_cast<MeshAttr>(attr))
+    printMeshAttr(mesh_attr, os);
 
-  if (auto layout_attr = attr.dyn_cast<LayoutAttr>())
+  if (auto layout_attr = mlir::dyn_cast<LayoutAttr>(attr))
     printLayoutAttr(layout_attr, os);
 }
 }  // namespace dtensor
diff --git a/tensorflow/dtensor/mlir/dtensor_layout_to_xla_sharding_op.cc b/tensorflow/dtensor/mlir/dtensor_layout_to_xla_sharding_op.cc
index 0f633c3707a459..b9e9b0648a7220 100644
--- a/tensorflow/dtensor/mlir/dtensor_layout_to_xla_sharding_op.cc
+++ b/tensorflow/dtensor/mlir/dtensor_layout_to_xla_sharding_op.cc
@@ -24,6 +24,7 @@ limitations under the License.
 #include "mlir/IR/Value.h"  // from @llvm-project
 #include "mlir/IR/Visitors.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
@@ -65,7 +66,7 @@ class DTensorLayoutToXlaShardingOpPass
 mlir::LogicalResult RemoveDTensorLayoutAfterConstOrBlockArgPattern::match(
     DTensorLayout layout_op) const {
   auto input = layout_op.getInput();
-  if (input.isa<mlir::BlockArgument>()) {
+  if (mlir::isa<mlir::BlockArgument>(input)) {
     return mlir::success();
   }
   mlir::Operation* input_op = input.getDefiningOp();
diff --git a/tensorflow/dtensor/mlir/dtensor_location.cc b/tensorflow/dtensor/mlir/dtensor_location.cc
index 23be51a4c96695..a129889c5e51c0 100644
--- a/tensorflow/dtensor/mlir/dtensor_location.cc
+++ b/tensorflow/dtensor/mlir/dtensor_location.cc
@@ -23,6 +23,7 @@ limitations under the License.
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/Support/FormatVariadic.h"
 #include "llvm/Support/raw_ostream.h"
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/utils/name_utils.h"
 
 namespace tensorflow {
@@ -66,12 +67,12 @@ std::string DTensorLocationToString(mlir::Location loc) {
 
   while (!queue.empty()) {
     mlir::Location& front = queue.front();
-    if (auto name_loc = front.dyn_cast<mlir::NameLoc>()) {
+    if (auto name_loc = mlir::dyn_cast<mlir::NameLoc>(front)) {
       queue.push(name_loc.getChildLoc());
-    } else if (auto callsite_loc = front.dyn_cast<mlir::CallSiteLoc>()) {
+    } else if (auto callsite_loc = mlir::dyn_cast<mlir::CallSiteLoc>(front)) {
       queue.push(callsite_loc.getCallee());
       queue.push(callsite_loc.getCaller());
-    } else if (auto line_loc = front.dyn_cast<mlir::FileLineColLoc>()) {
+    } else if (auto line_loc = mlir::dyn_cast<mlir::FileLineColLoc>(front)) {
       stack.push_back(CreateLocalLocationString(line_loc));
     }
     queue.pop();
diff --git a/tensorflow/dtensor/mlir/dtensor_location_test.cc b/tensorflow/dtensor/mlir/dtensor_location_test.cc
index 3989c3623b3901..773f6af8db4d82 100644
--- a/tensorflow/dtensor/mlir/dtensor_location_test.cc
+++ b/tensorflow/dtensor/mlir/dtensor_location_test.cc
@@ -25,8 +25,8 @@ namespace {
 
 void CheckFileLineColLocation(mlir::Location loc, unsigned line,
                               unsigned column) {
-  ASSERT_TRUE(loc.isa<mlir::FileLineColLoc>());
-  auto file_line_col_loc = loc.cast<mlir::FileLineColLoc>();
+  ASSERT_TRUE(mlir::isa<mlir::FileLineColLoc>(loc));
+  auto file_line_col_loc = mlir::cast<mlir::FileLineColLoc>(loc);
   EXPECT_EQ(file_line_col_loc.getFilename(), "test.cc");
   EXPECT_EQ(file_line_col_loc.getLine(), line);
   EXPECT_EQ(file_line_col_loc.getColumn(), column);
@@ -37,8 +37,8 @@ TEST(DTensorLocationTest, HandlesEmptyLocation) {
   mlir::Location loc = mlir::FileLineColLoc::get(&ctx, "test.cc", 10, 20);
   loc = tensorflow::dtensor::DTensorLocation(loc, "test.cc", 21);
 
-  ASSERT_TRUE(loc.isa<mlir::CallSiteLoc>());
-  auto callsite_loc = loc.cast<mlir::CallSiteLoc>();
+  ASSERT_TRUE(mlir::isa<mlir::CallSiteLoc>(loc));
+  auto callsite_loc = mlir::cast<mlir::CallSiteLoc>(loc);
   CheckFileLineColLocation(callsite_loc.getCallee(), 21, 0);
   CheckFileLineColLocation(callsite_loc.getCaller(), 10, 20);
 
@@ -57,8 +57,8 @@ TEST(DTensorLocationTest, HandlesMultipleCalls) {
 
   auto verify_loc = test_loc;
   for (int i = 0; i < 4; ++i) {
-    ASSERT_TRUE(verify_loc.isa<mlir::CallSiteLoc>());
-    auto callsite_loc = verify_loc.cast<mlir::CallSiteLoc>();
+    ASSERT_TRUE(mlir::isa<mlir::CallSiteLoc>(verify_loc));
+    auto callsite_loc = mlir::cast<mlir::CallSiteLoc>(verify_loc);
     auto callee_loc = callsite_loc.getCallee();
     CheckFileLineColLocation(callee_loc, 24 - i, 0);
     verify_loc = callsite_loc.getCaller();
@@ -80,17 +80,18 @@ TEST(DTensorLocationTest, HandlesNameLoc) {
                          mlir::FileLineColLoc::get(&ctx, "test.cc", 10, 20));
   test_loc = tensorflow::dtensor::DTensorLocation(test_loc, "test.cc", 21);
   ASSERT_EQ(mlir::GetNameFromLoc(test_loc), "op");
-  ASSERT_TRUE(test_loc.isa<mlir::CallSiteLoc>());
-  auto callsite_loc = test_loc.cast<mlir::CallSiteLoc>();
-  mlir::Location caller_loc = test_loc.cast<mlir::CallSiteLoc>().getCaller();
-  ASSERT_TRUE(caller_loc.isa<mlir::NameLoc>());
-  CheckFileLineColLocation(caller_loc.cast<mlir::NameLoc>().getChildLoc(), 10,
-                           20);
+  ASSERT_TRUE(mlir::isa<mlir::CallSiteLoc>(test_loc));
+  auto callsite_loc = mlir::cast<mlir::CallSiteLoc>(test_loc);
+  mlir::Location caller_loc =
+      mlir::cast<mlir::CallSiteLoc>(test_loc).getCaller();
+  ASSERT_TRUE(mlir::isa<mlir::NameLoc>(caller_loc));
+  CheckFileLineColLocation(mlir::cast<mlir::NameLoc>(caller_loc).getChildLoc(),
+                           10, 20);
 
   mlir::Location callee_loc = callsite_loc.getCallee();
-  ASSERT_TRUE(callee_loc.isa<mlir::NameLoc>());
-  CheckFileLineColLocation(callee_loc.cast<mlir::NameLoc>().getChildLoc(), 21,
-                           0);
+  ASSERT_TRUE(mlir::isa<mlir::NameLoc>(callee_loc));
+  CheckFileLineColLocation(mlir::cast<mlir::NameLoc>(callee_loc).getChildLoc(),
+                           21, 0);
 
   constexpr char stack[] = R"stack(>> test.cc:10:20
 >> test.cc:21:0)stack";
diff --git a/tensorflow/dtensor/mlir/dtensor_mixed_precision_reduce.cc b/tensorflow/dtensor/mlir/dtensor_mixed_precision_reduce.cc
index 5ecb38b3e97590..c5fbe20ac067f3 100644
--- a/tensorflow/dtensor/mlir/dtensor_mixed_precision_reduce.cc
+++ b/tensorflow/dtensor/mlir/dtensor_mixed_precision_reduce.cc
@@ -69,9 +69,7 @@ template <class ReduceOpType>
 mlir::LogicalResult MaybeUpcastForReduction(ReduceOpType reduce_op,
                                             bool* changed) {
   const mlir::RankedTensorType& input_type =
-      reduce_op.getInput()
-          .getType()
-          .template dyn_cast<mlir::RankedTensorType>();
+      mlir::dyn_cast<mlir::RankedTensorType>(reduce_op.getInput().getType());
   if (!input_type.getElementType().isBF16()) {
     // Upcast only applies for bfloat16 input.
     return mlir::success();
@@ -96,9 +94,7 @@ mlir::LogicalResult MaybeUpcastForReduction(ReduceOpType reduce_op,
   // The original output tensor type that would have been used by all users of
   // the reduce op.
   const mlir::RankedTensorType& output_type =
-      reduce_op.getOutput()
-          .getType()
-          .template dyn_cast<mlir::RankedTensorType>();
+      mlir::dyn_cast<mlir::RankedTensorType>(reduce_op.getOutput().getType());
 
   mlir::TF::CastOp upcast = builder.create<mlir::TF::CastOp>(
       loc,
diff --git a/tensorflow/dtensor/mlir/dtensor_multi_device_expansion.cc b/tensorflow/dtensor/mlir/dtensor_multi_device_expansion.cc
index 1f47934230e3bc..15a334fccb9d61 100644
--- a/tensorflow/dtensor/mlir/dtensor_multi_device_expansion.cc
+++ b/tensorflow/dtensor/mlir/dtensor_multi_device_expansion.cc
@@ -160,7 +160,7 @@ StatusOr<std::optional<std::vector<Layout>>> GetResourceLayouts(
     std::vector<Layout> layouts;
     layouts.reserve(attrs.size());
     for (mlir::Attribute attr : attrs) {
-      auto string_attr = attr.cast<mlir::StringAttr>();
+      auto string_attr = mlir::cast<mlir::StringAttr>(attr);
       auto layout = Layout::FromString(string_attr.str());
       if (layout.ok()) {
         layouts.emplace_back(std::move(layout.value()));
@@ -175,7 +175,8 @@ StatusOr<std::optional<std::vector<Layout>>> GetResourceLayouts(
 }
 
 bool IsResource(mlir::Value value) {
-  return getElementTypeOrSelf(value.getType()).isa<mlir::TF::ResourceType>();
+  return mlir::isa<mlir::TF::ResourceType>(
+      getElementTypeOrSelf(value.getType()));
 }
 
 StatusOr<std::optional<Layout>> FindResourceLayout(mlir::BlockArgument arg) {
@@ -417,7 +418,7 @@ mlir::LogicalResult ExpandTPUOperation(
 
   llvm::SmallVector<mlir::Value, 8> operands;
   for (const mlir::Value& operand : op->getOperands()) {
-    if (const auto arg = operand.dyn_cast_or_null<mlir::BlockArgument>()) {
+    if (const auto arg = mlir::dyn_cast_or_null<mlir::BlockArgument>(operand)) {
       const StatusOr<absl::Span<mlir::Value>> new_args = GetExpandedArguments(
           builder, target_func, expanded_arguments, arg, &target_mesh);
       if (!new_args.ok()) {
@@ -481,7 +482,8 @@ mlir::LogicalResult ExpandOperation(
   for (size_t i = 0; i < num_devices; ++i) {
     llvm::SmallVector<mlir::Value, 8> operands;
     for (const mlir::Value& operand : op->getOperands()) {
-      if (const auto arg = operand.dyn_cast_or_null<mlir::BlockArgument>()) {
+      if (const auto arg =
+              mlir::dyn_cast_or_null<mlir::BlockArgument>(operand)) {
         const StatusOr<absl::Span<mlir::Value>> new_args = GetExpandedArguments(
             builder, target_func, expanded_arguments, arg, &target_mesh);
         if (!new_args.ok()) {
@@ -609,7 +611,7 @@ StatusOr<absl::Span<mlir::Value>> GetExpandedArguments(
         }
       } else {
         mlir::TensorType tensor_type =
-            arg.getType().dyn_cast_or_null<mlir::TensorType>();
+            mlir::dyn_cast_or_null<mlir::TensorType>(arg.getType());
         if (!tensor_type) {
           return errors::InvalidArgument("Could not determine tensor type.");
         }
diff --git a/tensorflow/dtensor/mlir/dtensor_send_recv.cc b/tensorflow/dtensor/mlir/dtensor_send_recv.cc
index ed4b636081fc93..fe5885012ef471 100644
--- a/tensorflow/dtensor/mlir/dtensor_send_recv.cc
+++ b/tensorflow/dtensor/mlir/dtensor_send_recv.cc
@@ -25,6 +25,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinAttributes.h"  // from @llvm-project
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/Support/DebugStringHelper.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_attributes.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_device.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
@@ -48,14 +49,14 @@ namespace dtensor {
 namespace {
 
 bool IsStringType(mlir::Type type) {
-  if (type.isa<mlir::TF::StringType>()) return true;
+  if (mlir::isa<mlir::TF::StringType>(type)) return true;
 
-  auto sub_type = type.dyn_cast<mlir::TF::TensorFlowTypeWithSubtype>();
+  auto sub_type = mlir::dyn_cast<mlir::TF::TensorFlowTypeWithSubtype>(type);
   if (!sub_type) return false;
 
   bool has_string =
       llvm::any_of(sub_type.GetSubtypes(), [](mlir::TensorType type) {
-        return type.getElementType().isa<mlir::TF::StringType>();
+        return mlir::isa<mlir::TF::StringType>(type.getElementType());
       });
   return has_string;
 }
@@ -421,7 +422,7 @@ StatusOr<mlir::Operation*> LowerOneToOneDTensorSendToTFHostSend(
                            op_builder.getStringAttr(send_layout.ToString()));
         mlir::Value val = arg;
         if (i32_copy) {
-          auto val_type = val.getType().cast<mlir::TensorType>();
+          auto val_type = mlir::cast<mlir::TensorType>(val.getType());
           val = op_builder
                     .create<mlir::TF::CastOp>(
                         loc,
@@ -673,7 +674,7 @@ StatusOr<mlir::Operation*> LowerDTensorSend(mlir::Operation* send_op,
                                                       dtensor_send));
     } else {
       mlir::TensorType send_type =
-          send_input.getType().cast<mlir::TensorType>();
+          mlir::cast<mlir::TensorType>(send_input.getType());
       if (!recv_mesh.is_cpu_mesh() &&
           send_type.getElementType().isInteger(32)) {
         builder.setInsertionPointAfter(send_input.getDefiningOp());
@@ -745,7 +746,7 @@ StatusOr<mlir::Operation*> LowerDTensorRecv(mlir::Operation* send_op,
     TF_ASSIGN_OR_RETURN(
         mlir::TensorType local_output_type,
         LocalTypeFromGlobalType(
-            recv_layout, dtensor_recv.getType().cast<mlir::TensorType>()));
+            recv_layout, mlir::cast<mlir::TensorType>(dtensor_recv.getType())));
     TF_ASSIGN_OR_RETURN(
         lowered_recv, LowerDTensorRecvToXlaOp(dtensor_recv, local_output_type));
     dtensor_recv->replaceAllUsesWith(lowered_recv);
diff --git a/tensorflow/dtensor/mlir/expansions/control_flow_spmd_expander.cc b/tensorflow/dtensor/mlir/expansions/control_flow_spmd_expander.cc
index 6c618def560dfe..1f9711220824d2 100644
--- a/tensorflow/dtensor/mlir/expansions/control_flow_spmd_expander.cc
+++ b/tensorflow/dtensor/mlir/expansions/control_flow_spmd_expander.cc
@@ -15,6 +15,8 @@ limitations under the License.
 
 #include "tensorflow/dtensor/mlir/expansions/control_flow_spmd_expander.h"
 
+#include "mlir/Support/LLVM.h"  // from @llvm-project
+
 namespace tensorflow {
 namespace dtensor {
 
@@ -79,7 +81,7 @@ StatusOr<mlir::Operation*> IfRegionSPMDExpander::ExpandOp(mlir::Operation* op) {
 
       result.setType(mlir::RankedTensorType::get(
           layout.LocalShapeFromGlobalShape(*global_shape),
-          result.getType().cast<mlir::TensorType>().getElementType()));
+          mlir::cast<mlir::TensorType>(result.getType()).getElementType()));
     }
   }
   return op;
diff --git a/tensorflow/dtensor/mlir/expansions/conv_spmd_expander.cc b/tensorflow/dtensor/mlir/expansions/conv_spmd_expander.cc
index 2602a16eb9f824..fa6dee1683936c 100644
--- a/tensorflow/dtensor/mlir/expansions/conv_spmd_expander.cc
+++ b/tensorflow/dtensor/mlir/expansions/conv_spmd_expander.cc
@@ -22,6 +22,7 @@ limitations under the License.
 #include "llvm/Support/FormatVariadic.h"
 #include "mlir/IR/BuiltinAttributes.h"  // from @llvm-project
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_device.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/core/platform/errors.h"
@@ -68,7 +69,7 @@ Status VerifyConvLayout(const Layout& input_layout, const Layout& filter_layout,
 
   const int num_non_default_dilations =
       llvm::count_if(conv_op.getDilations(), [](mlir::Attribute dilation) {
-        return dilation.cast<mlir::IntegerAttr>().getInt() != 1;
+        return mlir::cast<mlir::IntegerAttr>(dilation).getInt() != 1;
       });
   if (num_non_default_dilations > 0)
     return errors::InvalidArgument(
@@ -78,21 +79,21 @@ Status VerifyConvLayout(const Layout& input_layout, const Layout& filter_layout,
   // TODO(b/208700444): support convolution with strides greater than 1.
   const int num_non_default_strides =
       llvm::count_if(conv_op.getStrides(), [](mlir::Attribute stride) {
-        return stride.cast<mlir::IntegerAttr>().getInt() != 1;
+        return mlir::cast<mlir::IntegerAttr>(stride).getInt() != 1;
       });
   if (num_non_default_strides > 0)
     return errors::InvalidArgument(
         "Only stride 1 is supported for convolution with spatial partitions.");
 
   mlir::Value input = conv_op.getInput();
-  auto input_type = input.getType().dyn_cast<mlir::RankedTensorType>();
+  auto input_type = mlir::dyn_cast<mlir::RankedTensorType>(input.getType());
   if (!input_type || !input_type.hasStaticShape())
     return errors::InvalidArgument(
         "Input must have static shapes for convolution with spatial "
         "partitions.");
 
   mlir::Value filter = conv_op.getFilter();
-  auto filter_type = filter.getType().dyn_cast<mlir::RankedTensorType>();
+  auto filter_type = mlir::dyn_cast<mlir::RankedTensorType>(filter.getType());
   if (!filter_type || !filter_type.hasStaticShape())
     return errors::InvalidArgument(
         "Filter must have static shapes for convolution with spatial "
@@ -114,7 +115,7 @@ mlir::Value PadInputOnUnshardedDim(mlir::OpBuilder& builder,
                                    mlir::Value input_tensor, int curr_input_dim,
                                    int64_t curr_filter_dim_size) {
   auto input_tensor_type =
-      input_tensor.getType().dyn_cast<mlir::RankedTensorType>();
+      mlir::dyn_cast<mlir::RankedTensorType>(input_tensor.getType());
   auto input_tensor_shape = input_tensor_type.getShape();
 
   const size_t paddings_flat_length = input_tensor_type.getRank() * 2;
@@ -171,7 +172,7 @@ StatusOr<mlir::Operation*> HandleConv(ConvOp conv_op) {
   const auto output_num_shards = output_layout.num_shards();
 
   auto filter_type =
-      conv_op.getFilter().getType().template dyn_cast<mlir::RankedTensorType>();
+      mlir::dyn_cast<mlir::RankedTensorType>(conv_op.getFilter().getType());
   auto filter_shape = filter_type.getShape();
 
   int begin_input_dim = -1, end_input_dim = -1;
@@ -194,9 +195,8 @@ StatusOr<mlir::Operation*> HandleConv(ConvOp conv_op) {
        ++curr_input_dim) {
     int curr_filter_dim = curr_input_dim - begin_input_dim;
 
-    auto input_type = conv_op.getInput()
-                          .getType()
-                          .template dyn_cast<mlir::RankedTensorType>();
+    auto input_type =
+        mlir::dyn_cast<mlir::RankedTensorType>(conv_op.getInput().getType());
     auto input_shape = input_type.getShape();
 
     if (input_sharding_spec[curr_input_dim] == Layout::kUnshardedDim) {
@@ -410,7 +410,7 @@ StatusOr<mlir::Operation*> HandleConvBackpropInputTensor(
   // HandleConvBackpropInput which expects there to be a layout here.
   mlir::TF::ShapeAttr global_input_shape_shape = mlir::TF::ShapeAttr::get(
       builder.getContext(),
-      global_input_shape.getType().cast<mlir::TensorType>());
+      mlir::cast<mlir::TensorType>(global_input_shape.getType()));
   mlir::TF::DTensorLayout global_input_shape_with_layout =
       builder.create<mlir::TF::DTensorLayout>(
           conv_op->getLoc(), global_input_shape,
@@ -536,7 +536,7 @@ StatusOr<mlir::Operation*> HandleConvBackpropFilterTensor(
   // HandleConvBackpropInput which expects there to be a layout here.
   mlir::TF::ShapeAttr global_filter_shape_shape = mlir::TF::ShapeAttr::get(
       builder.getContext(),
-      global_filter_shape_const.getType().cast<mlir::TensorType>());
+      mlir::cast<mlir::TensorType>(global_filter_shape_const.getType()));
   mlir::TF::DTensorLayout global_filter_shape_with_layout =
       builder.create<mlir::TF::DTensorLayout>(
           conv_op->getLoc(), global_filter_shape_const,
diff --git a/tensorflow/dtensor/mlir/expansions/fft_spmd_expander.cc b/tensorflow/dtensor/mlir/expansions/fft_spmd_expander.cc
index d8de0e07b3be25..2893128e1f01c1 100644
--- a/tensorflow/dtensor/mlir/expansions/fft_spmd_expander.cc
+++ b/tensorflow/dtensor/mlir/expansions/fft_spmd_expander.cc
@@ -33,6 +33,7 @@ limitations under the License.
 #include "mlir/IR/Operation.h"  // from @llvm-project
 #include "mlir/IR/Value.h"  // from @llvm-project
 #include "mlir/Support/DebugStringHelper.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/cc/framework/ops.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/core/platform/errors.h"
@@ -74,7 +75,7 @@ bool IsDistributedFFTN(int num_transform_axes, const Layout& layout) {
 bool IsComplexFFT(mlir::Value input) {
   auto data_type =
       mlir::dyn_cast<mlir::TensorType>(input.getType()).getElementType();
-  return data_type.isa<mlir::ComplexType>();
+  return mlir::isa<mlir::ComplexType>(data_type);
 }
 
 Status IsProperFFTLength(mlir::Operation* op,
diff --git a/tensorflow/dtensor/mlir/expansions/fill_spmd_expander.cc b/tensorflow/dtensor/mlir/expansions/fill_spmd_expander.cc
index 8aeb53f5e8314e..75dde58edee01c 100644
--- a/tensorflow/dtensor/mlir/expansions/fill_spmd_expander.cc
+++ b/tensorflow/dtensor/mlir/expansions/fill_spmd_expander.cc
@@ -18,6 +18,7 @@ limitations under the License.
 #include <optional>
 
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_device.h"
 #include "tensorflow/compiler/mlir/tensorflow/utils/convert_tensor.h"
 #include "xla/mlir_hlo/utils/convert_op_folder.h"
@@ -68,11 +69,9 @@ StatusOr<mlir::Operation*> FillSPMDExpander::ExpandOp(mlir::Operation* op) {
   auto int_type = mlir::RankedTensorType::get(
       static_cast<int64>(shard_values.size()), builder.getIntegerType(32));
   auto int_attr = mlir::DenseIntElementsAttr::get(int_type, shard_values);
-  auto target_type_attr =
-      mlir::hlo::convertElementsAttr(int_attr, original_fill.getDims()
-                                                   .getType()
-                                                   .cast<mlir::TensorType>()
-                                                   .getElementType());
+  auto target_type_attr = mlir::hlo::convertElementsAttr(
+      int_attr, mlir::cast<mlir::TensorType>(original_fill.getDims().getType())
+                    .getElementType());
 
   auto location = DT_LOC(op);
   auto num_shards =
@@ -82,7 +81,7 @@ StatusOr<mlir::Operation*> FillSPMDExpander::ExpandOp(mlir::Operation* op) {
                                              num_shards.getResult());
   // Copy over static shape information if available
   auto global_output_type =
-      original_fill.getResult().getType().cast<mlir::TensorType>();
+      mlir::cast<mlir::TensorType>(original_fill.getResult().getType());
   TF_ASSIGN_OR_RETURN(
       auto local_type,
       LocalTypeFromGlobalType(output_layout.value(), global_output_type));
diff --git a/tensorflow/dtensor/mlir/expansions/io_op_spmd_expander.cc b/tensorflow/dtensor/mlir/expansions/io_op_spmd_expander.cc
index 6cd2f10c4c97aa..64c55363d3451d 100644
--- a/tensorflow/dtensor/mlir/expansions/io_op_spmd_expander.cc
+++ b/tensorflow/dtensor/mlir/expansions/io_op_spmd_expander.cc
@@ -18,6 +18,7 @@ limitations under the License.
 #include <algorithm>
 
 #include "llvm/Support/FormatVariadic.h"
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/dtensor/cc/tensor_layout.h"
 #include "tensorflow/dtensor/mlir/collectives.h"
@@ -99,7 +100,7 @@ StatusOr<mlir::Operation*> Expand(mlir::Operation* op) {
       mlir::Value zero_scalar,
       CreateZeroScalarConst(
           builder, location,
-          device_id.getType().cast<mlir::TensorType>().getElementType()));
+          mlir::cast<mlir::TensorType>(device_id.getType()).getElementType()));
 
   mlir::TF::NotEqualOp not_equal = builder.create<mlir::TF::NotEqualOp>(
       location, device_id, zero_scalar,
diff --git a/tensorflow/dtensor/mlir/expansions/iterator_spmd_expander.cc b/tensorflow/dtensor/mlir/expansions/iterator_spmd_expander.cc
index cbe59bdb8557a0..b0c84ce679733b 100644
--- a/tensorflow/dtensor/mlir/expansions/iterator_spmd_expander.cc
+++ b/tensorflow/dtensor/mlir/expansions/iterator_spmd_expander.cc
@@ -50,7 +50,7 @@ StatusOr<mlir::Operation*> IteratorGetNextSPMDExpander::ExpandOp(
 
   for (int i = 0; i < original_op->getNumResults(); ++i) {
     mlir::TensorType global_output_type =
-        original_op.getResult(i).getType().cast<mlir::TensorType>();
+        mlir::cast<mlir::TensorType>(original_op.getResult(i).getType());
     std::vector<int64_t> local_shape =
         output_layouts[i].LocalShapeFromGlobalShape(
             global_output_type.getShape());
@@ -111,10 +111,9 @@ StatusOr<mlir::Operation*> IteratorGetNextAsOptionalSPMDExpander::ExpandOp(
   for (int i = 0; i < array_attr.size(); ++i) {
     std::vector<int64_t> local_shape =
         output_layouts[i].LocalShapeFromGlobalShape(
-            array_attr[i].cast<mlir::TF::ShapeAttr>().getShape());
-    output_shape_attrs[i] =
-        mlir::TF::ShapeAttr::get(op->getContext(), {local_shape})
-            .cast<mlir::Attribute>();
+            mlir::cast<mlir::TF::ShapeAttr>(array_attr[i]).getShape());
+    output_shape_attrs[i] = mlir::cast<mlir::Attribute>(
+        mlir::TF::ShapeAttr::get(op->getContext(), {local_shape}));
   }
 
   // Update the `output_shapes` attribute on the op to match the local shape
diff --git a/tensorflow/dtensor/mlir/expansions/meta_spmd_expander.cc b/tensorflow/dtensor/mlir/expansions/meta_spmd_expander.cc
index cc82fa42901fa7..0ef04e88833e00 100644
--- a/tensorflow/dtensor/mlir/expansions/meta_spmd_expander.cc
+++ b/tensorflow/dtensor/mlir/expansions/meta_spmd_expander.cc
@@ -31,6 +31,7 @@ limitations under the License.
 #include "mlir/IR/Builders.h"  // from @llvm-project
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/IR/Matchers.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_device.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/compiler/mlir/tensorflow/transforms/collection_ops_util.h"
@@ -244,8 +245,9 @@ namespace {
 Status VerifyPaddedDimensionNotSharded(const Layout& layout,
                                        mlir::Value pad_input,
                                        mlir::Value pad_output) {
-  auto input_type = pad_input.getType().dyn_cast<mlir::RankedTensorType>();
-  auto output_type = pad_output.getType().dyn_cast<mlir::RankedTensorType>();
+  auto input_type = mlir::dyn_cast<mlir::RankedTensorType>(pad_input.getType());
+  auto output_type =
+      mlir::dyn_cast<mlir::RankedTensorType>(pad_output.getType());
   if (!input_type || !output_type)
     return errors::InvalidArgument(
         "pad op input/output should have statically known shape for SPMD.");
@@ -435,7 +437,7 @@ StatusOr<mlir::Operation*> TileSPMDExpander::ExpandOp(mlir::Operation* op) {
   auto multiples_const = IntConst(builder, location, local_tile_multiples);
 
   auto global_output_type =
-      tile_op.getResult().getType().cast<mlir::TensorType>();
+      mlir::cast<mlir::TensorType>(tile_op.getResult().getType());
   TF_ASSIGN_OR_RETURN(
       auto local_type,
       LocalTypeFromGlobalType(output_layout.value(), global_output_type));
@@ -458,7 +460,7 @@ StatusOr<llvm::DenseMap<int, Layout>> TileSPMDExpander::ComputeLayoutForward(
   auto tile_op = llvm::cast<mlir::TF::TileOp>(op);
 
   auto output_ranked_type =
-      tile_op.getOutput().getType().dyn_cast<mlir::RankedTensorType>();
+      mlir::dyn_cast<mlir::RankedTensorType>(tile_op.getOutput().getType());
   if (!output_ranked_type || !output_ranked_type.hasStaticShape()) {
     return errors::InvalidArgument(
         llvm::formatv(
@@ -503,7 +505,7 @@ StatusOr<llvm::DenseMap<int, Layout>> TileSPMDExpander::ComputeLayoutBackward(
 
   // Retrieve operand/output shapes of tile op.
   auto input_ranked_type =
-      tile_op.getInput().getType().dyn_cast<mlir::RankedTensorType>();
+      mlir::dyn_cast<mlir::RankedTensorType>(tile_op.getInput().getType());
   if (!input_ranked_type || !input_ranked_type.hasStaticShape()) {
     return errors::InvalidArgument(
         llvm::formatv(
@@ -516,11 +518,9 @@ StatusOr<llvm::DenseMap<int, Layout>> TileSPMDExpander::ComputeLayoutBackward(
   llvm::DenseMap<int, Layout> input_layouts(op->getNumOperands());
 
   // `multiples` operand is always set to have replicated layout.
-  input_layouts[1] =
-      Layout::ReplicatedOnMesh(mesh, tile_op.getMultiples()
-                                         .getType()
-                                         .cast<mlir::RankedTensorType>()
-                                         .getRank());
+  input_layouts[1] = Layout::ReplicatedOnMesh(
+      mesh, mlir::cast<mlir::RankedTensorType>(tile_op.getMultiples().getType())
+                .getRank());
 
   llvm::SmallVector<int64_t, 4> static_multiple;
   auto status =
@@ -1043,9 +1043,9 @@ StatusOr<mlir::Operation*> OneHotSPMDExpander::ExpandOp(mlir::Operation* op) {
     mlir::TF::SliceOp selected_sharding_at_dimension = builder.create<
         mlir::TF::SliceOp>(
         one_hot_op.getLoc(),
-        mlir::RankedTensorType::get({1, 1}, mesh_coordinates.getType()
-                                                .cast<mlir::TensorType>()
-                                                .getElementType()),
+        mlir::RankedTensorType::get(
+            {1, 1}, mlir::cast<mlir::TensorType>(mesh_coordinates.getType())
+                        .getElementType()),
         /*input=*/mesh_coordinates,
         /*begin=*/IntConst(builder, one_hot_op.getLoc(), {0, mesh_dim_index}),
         /*size=*/IntConst(builder, one_hot_op.getLoc(), {1, 1}));
diff --git a/tensorflow/dtensor/mlir/expansions/nullary_spmd_expander.cc b/tensorflow/dtensor/mlir/expansions/nullary_spmd_expander.cc
index 20ca961d55c8f4..b6c0f573382ea2 100644
--- a/tensorflow/dtensor/mlir/expansions/nullary_spmd_expander.cc
+++ b/tensorflow/dtensor/mlir/expansions/nullary_spmd_expander.cc
@@ -23,6 +23,7 @@ limitations under the License.
 #include "mlir/Dialect/Func/IR/FuncOps.h"  // from @llvm-project
 #include "mlir/IR/Builders.h"  // from @llvm-project
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_device.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/compiler/mlir/utils/array_container_utils.h"
@@ -53,7 +54,8 @@ StatusOr<mlir::Operation*> NullarySPMDExpander::ExpandOp(mlir::Operation* op) {
   if (all_operands_fully_replicated) return op;
 
   if (auto const_op = mlir::dyn_cast<mlir::TF::ConstOp>(op)) {
-    if (auto dense = const_op.getValue().dyn_cast<mlir::DenseElementsAttr>()) {
+    if (auto dense =
+            mlir::dyn_cast<mlir::DenseElementsAttr>(const_op.getValue())) {
       if (dense.isSplat()) {
         // A 'splat' value for a DenseElementsAttr, has a single value for
         // all its elements. For these inputs, we don't need to slice. We just
@@ -120,7 +122,7 @@ StatusOr<llvm::DenseMap<int, Layout>> NullarySPMDExpander::ComputeLayoutForward(
   // Nullary ops always output replicated layout for output values.
   for (auto i = 0; i < op->getNumResults(); ++i) {
     auto output_ranked_type =
-        op->getResult(i).getType().dyn_cast<mlir::RankedTensorType>();
+        mlir::dyn_cast<mlir::RankedTensorType>(op->getResult(i).getType());
     if (!output_ranked_type) {
       return errors::InvalidArgument(
           llvm::formatv("requires output type to have statically known rank, "
diff --git a/tensorflow/dtensor/mlir/expansions/optional_spmd_expander.cc b/tensorflow/dtensor/mlir/expansions/optional_spmd_expander.cc
index d0f5efac876b1f..b2c082d3bb71b0 100644
--- a/tensorflow/dtensor/mlir/expansions/optional_spmd_expander.cc
+++ b/tensorflow/dtensor/mlir/expansions/optional_spmd_expander.cc
@@ -17,6 +17,7 @@ limitations under the License.
 
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/Support/FormatVariadic.h"
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/dtensor/cc/constants.h"
 #include "tensorflow/dtensor/cc/dstatus.h"
 #include "tensorflow/dtensor/mlir/dtensor_location.h"
@@ -39,7 +40,7 @@ StatusOr<mlir::Operation*> OptionalGetValueSPMDExpander::ExpandOp(
 
   for (int i = 0; i < original_op->getNumResults(); ++i) {
     mlir::TensorType global_output_type =
-        original_op.getResult(i).getType().cast<mlir::TensorType>();
+        mlir::cast<mlir::TensorType>(original_op.getResult(i).getType());
     TF_ASSIGN_OR_RETURN(
         mlir::TensorType local_type,
         LocalTypeFromGlobalType(output_layouts[i], global_output_type));
diff --git a/tensorflow/dtensor/mlir/expansions/random_op_spmd_expander.cc b/tensorflow/dtensor/mlir/expansions/random_op_spmd_expander.cc
index 5156e09e417c1f..fb4e5302c9dfae 100644
--- a/tensorflow/dtensor/mlir/expansions/random_op_spmd_expander.cc
+++ b/tensorflow/dtensor/mlir/expansions/random_op_spmd_expander.cc
@@ -22,6 +22,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinAttributes.h"  // from @llvm-project
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/IR/IntegerSet.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/transforms/collection_ops_util.h"
 #include "tensorflow/dtensor/cc/constants.h"
 #include "tensorflow/dtensor/cc/tensor_layout.h"
@@ -192,7 +193,7 @@ StatusOr<mlir::Value> ComputeNewSeed(mlir::OpBuilder& builder,
                                      mlir::Value op_seed) {
   TF_ASSIGN_OR_RETURN(auto device_id_seed, GetDeviceSeed(layout, op));
   mlir::Type seed_type =
-      op_seed.getType().cast<mlir::TensorType>().getElementType();
+      mlir::cast<mlir::TensorType>(op_seed.getType()).getElementType();
 
   device_id_seed = builder.create<mlir::TF::CastOp>(
       location, mlir::RankedTensorType::get({}, seed_type), device_id_seed);
@@ -222,8 +223,8 @@ StatusOr<mlir::Operation*> CreatedShardedLocalRandomOpV1(const Layout& layout,
   // StatelessRandom op is used to make random op SPMD expansion
   // deterministic.
   mlir::Type new_random_type = mlir::RankedTensorType::get(
-      new_random_shape,
-      op->getResult(0).getType().cast<mlir::TensorType>().getElementType());
+      new_random_shape, mlir::cast<mlir::TensorType>(op->getResult(0).getType())
+                            .getElementType());
 
   auto new_shape_value = Int64Const(builder, location, new_random_shape);
   // TODO(zhonglinhan) : check different input for StatelessRandomUniformInt
@@ -254,8 +255,8 @@ StatusOr<mlir::Operation*> CreatedShardedLocalRandomOpV2(const Layout& layout,
   // StatelessRandom op is used to make random op SPMD expansion
   // deterministic.
   mlir::Type new_random_type = mlir::RankedTensorType::get(
-      new_random_shape,
-      op->getResult(0).getType().cast<mlir::TensorType>().getElementType());
+      new_random_shape, mlir::cast<mlir::TensorType>(op->getResult(0).getType())
+                            .getElementType());
 
   auto new_shape_value = Int64Const(builder, location, new_random_shape);
 
@@ -287,8 +288,8 @@ StatusOr<mlir::Operation*> CreatedShardedLocalRandomOpV2Range(
   // StatelessRandom op is used to make random op SPMD expansion
   // deterministic.
   mlir::Type new_random_type = mlir::RankedTensorType::get(
-      new_random_shape,
-      op->getResult(0).getType().cast<mlir::TensorType>().getElementType());
+      new_random_shape, mlir::cast<mlir::TensorType>(op->getResult(0).getType())
+                            .getElementType());
 
   auto new_shape_value = Int64Const(builder, location, new_random_shape);
 
diff --git a/tensorflow/dtensor/mlir/expansions/reduce_spmd_expander.cc b/tensorflow/dtensor/mlir/expansions/reduce_spmd_expander.cc
index 9d40da3173cee4..e3bb17d1829efe 100644
--- a/tensorflow/dtensor/mlir/expansions/reduce_spmd_expander.cc
+++ b/tensorflow/dtensor/mlir/expansions/reduce_spmd_expander.cc
@@ -40,6 +40,7 @@ limitations under the License.
 #include "mlir/IR/Types.h"  // from @llvm-project
 #include "mlir/IR/Value.h"  // from @llvm-project
 #include "mlir/Interfaces/InferTypeOpInterface.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_device.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/compiler/mlir/tensorflow/transforms/collection_ops_util.h"
@@ -218,7 +219,7 @@ StatusOr<mlir::Operation*> ReduceSPMDExpander::ExpandOp(mlir::Operation* op) {
   // Generate an error message for TPU int64.
   if (input_layout->mesh().is_tpu_mesh()) {
     if (auto tensor_type =
-            op->getOperand(0).getType().dyn_cast<mlir::TensorType>()) {
+            mlir::dyn_cast<mlir::TensorType>(op->getOperand(0).getType())) {
       if (tensor_type.getElementType().isInteger(64)) {
         return errors::InvalidArgument(
             "ReduceOp on TPU does not support int64 as dtype.");
diff --git a/tensorflow/dtensor/mlir/expansions/resource_spmd_expander.cc b/tensorflow/dtensor/mlir/expansions/resource_spmd_expander.cc
index c6f5042dfb8034..63d1bf4fd7e198 100644
--- a/tensorflow/dtensor/mlir/expansions/resource_spmd_expander.cc
+++ b/tensorflow/dtensor/mlir/expansions/resource_spmd_expander.cc
@@ -28,6 +28,7 @@ limitations under the License.
 #include "llvm/Support/FormatVariadic.h"
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/IR/Operation.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_device.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops_a_m.h"
@@ -238,7 +239,7 @@ StatusOr<mlir::Operation*> ResourceSPMDExpander::ExpandOp(mlir::Operation* op) {
       TF_RETURN_WITH_CONTEXT(errors::Internal(
           "if both resource and value layout are set they must be equal"));
 
-    auto block_arg = input_resource_value.dyn_cast<mlir::BlockArgument>();
+    auto block_arg = mlir::dyn_cast<mlir::BlockArgument>(input_resource_value);
     auto enclosing_device_cluster =
         op->getParentOfType<mlir::tf_device::ClusterOp>();
 
diff --git a/tensorflow/dtensor/mlir/expansions/save_restore_spmd_expander.cc b/tensorflow/dtensor/mlir/expansions/save_restore_spmd_expander.cc
index 4df082defd1817..ea25519f13b7c3 100644
--- a/tensorflow/dtensor/mlir/expansions/save_restore_spmd_expander.cc
+++ b/tensorflow/dtensor/mlir/expansions/save_restore_spmd_expander.cc
@@ -85,7 +85,7 @@ StatusOr<mlir::Value> GetAllCandidateCheckpointPrefixes(
       builder
           .create<mlir::TF::AddOp>(
               prefix.getLoc(),
-              prefix.getType().dyn_cast<mlir::RankedTensorType>(), prefix,
+              mlir::dyn_cast<mlir::RankedTensorType>(prefix.getType()), prefix,
               StringConst(builder, prefix.getLoc(),
                           llvm::SmallVector<llvm::StringRef>(
                               {DeviceSuffix(0, mesh.num_devices())})))
@@ -96,7 +96,8 @@ StatusOr<mlir::Value> GetAllCandidateCheckpointPrefixes(
         builder
             .create<mlir::TF::AddOp>(
                 prefix.getLoc(),
-                prefix.getType().dyn_cast<mlir::RankedTensorType>(), prefix,
+                mlir::dyn_cast<mlir::RankedTensorType>(prefix.getType()),
+                prefix,
                 StringConst(builder, prefix.getLoc(),
                             llvm::SmallVector<llvm::StringRef>(
                                 {DeviceSuffix(device_id, mesh.num_devices())})))
@@ -529,7 +530,7 @@ StatusOr<mlir::Operation*> ExpandMergeV2Op(mlir::Operation* op) {
       mlir::Value zero_scalar,
       CreateZeroScalarConst(
           builder, location,
-          device_id.getType().cast<mlir::TensorType>().getElementType()));
+          mlir::cast<mlir::TensorType>(device_id.getType()).getElementType()));
 
   mlir::TF::NotEqualOp not_equal = builder.create<mlir::TF::NotEqualOp>(
       location, device_id, zero_scalar,
@@ -697,7 +698,7 @@ StatusOr<mlir::Operation*> ExpandDTensorRestoreV2Op(mlir::Operation* op) {
   std::vector<std::vector<int64_t>> input_shapes;
   input_shapes.reserve(input_shapes_attr.size());
   for (const auto& shape : input_shapes_attr) {
-    mlir::TF::ShapeAttr shape_attr = shape.cast<mlir::TF::ShapeAttr>();
+    mlir::TF::ShapeAttr shape_attr = mlir::cast<mlir::TF::ShapeAttr>(shape);
     if (!shape_attr.hasStaticShape()) {
       return absl::InvalidArgumentError(
           llvm::formatv("DTensorRestoreV2Op requires statically known input "
@@ -718,7 +719,8 @@ StatusOr<mlir::Operation*> ExpandDTensorRestoreV2Op(mlir::Operation* op) {
   input_layouts.reserve(input_layouts_attr.size());
   for (const auto& layout : input_layouts_attr.getValue().vec()) {
     input_layouts.push_back(
-        Layout::FromString(layout.cast<mlir::StringAttr>().getValue().str())
+        Layout::FromString(
+            mlir::cast<mlir::StringAttr>(layout).getValue().str())
             .value());
   }
 
@@ -778,7 +780,7 @@ StatusOr<mlir::Operation*> ExpandRestoreV2Op(mlir::Operation* op) {
     Layout& layout = std::get<2>(it);
     new_types.push_back(mlir::RankedTensorType::get(
         layout.LocalShapeFromGlobalShape(shape),
-        type.dyn_cast<mlir::RankedTensorType>().getElementType()));
+        mlir::dyn_cast<mlir::RankedTensorType>(type).getElementType()));
   }
 
   return ExpandRestoreV2OpHelper(
@@ -910,7 +912,7 @@ SaveRestoreSPMDExpander::ComputeLayoutForward(
       TF_ASSIGN_OR_RETURN(
           Layout layout,
           Layout::FromString(
-              it.value().cast<mlir::StringAttr>().getValue().str()));
+              mlir::cast<mlir::StringAttr>(it.value()).getValue().str()));
       output_layouts[it.index()] = layout;
     }
     return output_layouts;
diff --git a/tensorflow/dtensor/mlir/expansions/slice_spmd_expander.cc b/tensorflow/dtensor/mlir/expansions/slice_spmd_expander.cc
index 13768bc95419b5..275a1bbe1af07e 100644
--- a/tensorflow/dtensor/mlir/expansions/slice_spmd_expander.cc
+++ b/tensorflow/dtensor/mlir/expansions/slice_spmd_expander.cc
@@ -24,6 +24,7 @@ limitations under the License.
 #include "llvm/Support/FormatVariadic.h"
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/IR/Operation.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/core/platform/errors.h"
 #include "tensorflow/dtensor/cc/dstatus.h"
@@ -116,7 +117,7 @@ StatusOr<mlir::Operation*> SliceSPMDExpander::ExpandOp(mlir::Operation* op) {
   // The dyn_cast will never be nullptr as it is checked in
   // GetLayoutFromOperands.
   auto input_type =
-      slice_op.getInput().getType().dyn_cast<mlir::RankedTensorType>();
+      mlir::dyn_cast<mlir::RankedTensorType>(slice_op.getInput().getType());
   if (!input_type)
     return errors::InvalidArgument(
         "rank of input tensor must be statically known for slice op.");
@@ -172,10 +173,10 @@ StatusOr<mlir::Operation*> SliceSPMDExpander::ExpandOp(mlir::Operation* op) {
   auto loc = op->getLoc();
   // Both begin and size need to be the same type, so we must match the new
   // size input with the type of begin.
-  if (!slice_op.getBegin().getType().isa<mlir::ShapedType>())
+  if (!mlir::isa<mlir::ShapedType>(slice_op.getBegin().getType()))
     return errors::Internal("type of begin is not a ShapedType");
   mlir::ShapedType type =
-      slice_op.getBegin().getType().cast<mlir::ShapedType>();
+      mlir::cast<mlir::ShapedType>(slice_op.getBegin().getType());
   if (type.getElementType().isInteger(32))
     new_size = IntConst(
         builder, loc, llvm::SmallVector<int32, 4>(sizes.begin(), sizes.end()));
diff --git a/tensorflow/dtensor/mlir/expansions/softmax_spmd_expander.cc b/tensorflow/dtensor/mlir/expansions/softmax_spmd_expander.cc
index 8ccdf0ee8168ae..2a2b03273f28dc 100644
--- a/tensorflow/dtensor/mlir/expansions/softmax_spmd_expander.cc
+++ b/tensorflow/dtensor/mlir/expansions/softmax_spmd_expander.cc
@@ -25,6 +25,7 @@ limitations under the License.
 #include "mlir/IR/IRMapping.h"  // from @llvm-project
 #include "mlir/IR/Operation.h"  // from @llvm-project
 #include "mlir/IR/Value.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/dtensor/cc/tensor_layout.h"
 #include "tensorflow/dtensor/mlir/collectives.h"
@@ -79,10 +80,8 @@ StatusOr<mlir::Value> ComputeGlobalReduce(
                     local_reduce, reduce_op));
 
   if (!keep_dims) {
-    mlir::RankedTensorType output_type =
-        global_reduce->getResult(0)
-            .getType()
-            .dyn_cast<mlir::RankedTensorType>();
+    mlir::RankedTensorType output_type = mlir::dyn_cast<mlir::RankedTensorType>(
+        global_reduce->getResult(0).getType());
     if (!output_type)
       return errors::Internal(
           "output of EmitAllReduce is not a RankedTensorType");
@@ -209,7 +208,8 @@ StatusOr<Layout> GetBroadcastedLayout(llvm::ArrayRef<int64_t> global_shape,
 // value. Assumes builder's insertion point is after input.
 StatusOr<mlir::Value> GetFPConstOfType(mlir::OpBuilder& builder,
                                        const mlir::Value& input, float value) {
-  if (mlir::TensorType type = input.getType().dyn_cast<mlir::TensorType>()) {
+  if (mlir::TensorType type =
+          mlir::dyn_cast<mlir::TensorType>(input.getType())) {
     return builder
         .create<mlir::TF::ConstOp>(
             input.getLoc(),
@@ -239,7 +239,7 @@ StatusOr<mlir::Value> ComputeOneHot(mlir::OpBuilder& builder,
   // Get the number of classes for this onehot. The number of classes is the
   // global size of the last dimension of features.
   mlir::RankedTensorType features_type =
-      features.getType().dyn_cast<mlir::RankedTensorType>();
+      mlir::dyn_cast<mlir::RankedTensorType>(features.getType());
   if (!features_type)
     return errors::InvalidArgument(
         "feature input shape must be statically known");
@@ -297,7 +297,8 @@ StatusOr<mlir::Value> ComputeOneHot(mlir::OpBuilder& builder,
 
   // Note that the type of id_offset (int32) may not match the type of input.
   // So we insert a cast in this case.
-  mlir::TensorType input_type = input.getType().dyn_cast<mlir::TensorType>();
+  mlir::TensorType input_type =
+      mlir::dyn_cast<mlir::TensorType>(input.getType());
   if (!input_type) return errors::InvalidArgument("input is not a TensorType");
   if (!input_type.getElementType().isInteger(32))
     id_offset =
diff --git a/tensorflow/dtensor/mlir/expansions/sparse_to_dense_spmd_expander.cc b/tensorflow/dtensor/mlir/expansions/sparse_to_dense_spmd_expander.cc
index 1e9b003a14d46f..ee7ee35bbee5aa 100644
--- a/tensorflow/dtensor/mlir/expansions/sparse_to_dense_spmd_expander.cc
+++ b/tensorflow/dtensor/mlir/expansions/sparse_to_dense_spmd_expander.cc
@@ -17,6 +17,7 @@ limitations under the License.
 
 #include <optional>
 
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/dtensor/mlir/layout_parsing.h"
 #include "tensorflow/dtensor/mlir/shape_utils.h"
 #include "tensorflow/dtensor/mlir/value_utils.h"
@@ -35,7 +36,7 @@ StatusOr<mlir::Operation*> SparseToDenseSPMDExpander::ExpandOp(
   auto op_result = op->getResult(0);
 
   const auto element_type =
-      op_result.getType().cast<mlir::TensorType>().getElementType();
+      mlir::cast<mlir::TensorType>(op_result.getType()).getElementType();
   op_result.setType(mlir::RankedTensorType::get(local_shape, element_type));
   // No-op
   return op;
diff --git a/tensorflow/dtensor/mlir/expansions/squeeze_spmd_expander.cc b/tensorflow/dtensor/mlir/expansions/squeeze_spmd_expander.cc
index c40e08814c36a1..5df9f648ffabfd 100644
--- a/tensorflow/dtensor/mlir/expansions/squeeze_spmd_expander.cc
+++ b/tensorflow/dtensor/mlir/expansions/squeeze_spmd_expander.cc
@@ -20,6 +20,7 @@ limitations under the License.
 #include <vector>
 
 #include "mlir/IR/BuiltinAttributes.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/core/platform/errors.h"
 #include "tensorflow/dtensor/cc/dstatus.h"
 #include "tensorflow/dtensor/mlir/layout_parsing.h"
@@ -37,7 +38,8 @@ std::set<int64_t> GetSqueezeDims(mlir::Operation* op, int64_t rank) {
   if (array_attribute) {
     auto attr_list = array_attribute.getValue().vec();
     for (const auto& attr : attr_list) {
-      int64_t dim = attr.cast<mlir::IntegerAttr>().getValue().getSExtValue();
+      int64_t dim =
+          mlir::cast<mlir::IntegerAttr>(attr).getValue().getSExtValue();
       // Offset the negative indices to positive range.
       squeeze_dims.insert((dim + rank) % rank);
     }
diff --git a/tensorflow/dtensor/mlir/expansions/tensorlist_reserve_spmd_expander.cc b/tensorflow/dtensor/mlir/expansions/tensorlist_reserve_spmd_expander.cc
index 0ef5ca777e8446..ce82bae63e930b 100644
--- a/tensorflow/dtensor/mlir/expansions/tensorlist_reserve_spmd_expander.cc
+++ b/tensorflow/dtensor/mlir/expansions/tensorlist_reserve_spmd_expander.cc
@@ -16,6 +16,7 @@ limitations under the License.
 #include "tensorflow/dtensor/mlir/expansions/tensorlist_reserve_spmd_expander.h"
 
 #include "mlir/IR/Operation.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/core/platform/errors.h"
 #include "tensorflow/dtensor/mlir/dtensor_location.h"
@@ -38,9 +39,9 @@ StatusOr<mlir::Operation*> TensorListReserveSPMDExpander::ExpandOp(
       llvm::dyn_cast<mlir::TF::TensorListReserveOp>(op);
   mlir::OpBuilder builder(op);
 
-  mlir::Type element_type = GetSubtypeOrSelf(op->getOpResult(0))
-                                .cast<mlir::TensorType>()
-                                .getElementType();
+  mlir::Type element_type =
+      mlir::cast<mlir::TensorType>(GetSubtypeOrSelf(op->getOpResult(0)))
+          .getElementType();
 
   mlir::RankedTensorType new_output_type = mlir::RankedTensorType::get(
       {}, mlir::TF::VariantType::get(
diff --git a/tensorflow/dtensor/mlir/handle_cross_cluster_dependencies.cc b/tensorflow/dtensor/mlir/handle_cross_cluster_dependencies.cc
index 422a4d4a8cafd1..6877f77dd25f37 100644
--- a/tensorflow/dtensor/mlir/handle_cross_cluster_dependencies.cc
+++ b/tensorflow/dtensor/mlir/handle_cross_cluster_dependencies.cc
@@ -26,6 +26,7 @@ limitations under the License.
 #include "mlir/IR/UseDefLists.h"  // from @llvm-project
 #include "mlir/IR/Value.h"  // from @llvm-project
 #include "mlir/Support/DebugStringHelper.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Transforms/Passes.h"  // from @llvm-project
 #include "mlir/Transforms/RegionUtils.h"  // from @llvm-project
@@ -109,7 +110,7 @@ mlir::LogicalResult CloneOpToCluster(mlir::Operation* const_op,
 
 mlir::LogicalResult GetInputProducingValue(mlir::OpOperand& operand,
                                            mlir::Value* val_output) {
-  auto input_value = operand.get().dyn_cast<mlir::OpResult>();
+  auto input_value = mlir::dyn_cast<mlir::OpResult>(operand.get());
   if (!input_value) return mlir::success();
 
   auto input_cluster =
@@ -216,7 +217,7 @@ mlir::LogicalResult LowerToSendRecv(mlir::TF::CopyToMeshOp copy_to_mesh,
                                     mlir::MLIRContext* context,
                                     int* send_recv_counter) {
   const mlir::OpResult copied_value =
-      copy_to_mesh.getInput().cast<mlir::OpResult>();
+      mlir::cast<mlir::OpResult>(copy_to_mesh.getInput());
   const int result_index = copied_value.getResultNumber();
   auto src_cluster =
       llvm::cast<mlir::tf_device::ClusterOp>(copied_value.getDefiningOp());
@@ -243,7 +244,7 @@ mlir::LogicalResult LowerToSendRecv(mlir::TF::CopyToMeshOp copy_to_mesh,
       mlir::dtensor::MeshAttr::get(context, target_mesh));
 
   // Create recv op that recvs data from send op.
-  auto tensor_type = value_to_send.getType().dyn_cast<mlir::TensorType>();
+  auto tensor_type = mlir::dyn_cast<mlir::TensorType>(value_to_send.getType());
   if (!tensor_type)
     return copy_to_mesh.emitOpError(
         "found CopyToMesh sending value with unknown shape. Inputs to "
diff --git a/tensorflow/dtensor/mlir/handle_sparsetensors.cc b/tensorflow/dtensor/mlir/handle_sparsetensors.cc
index 30c18accca8ff0..678d8a41841114 100644
--- a/tensorflow/dtensor/mlir/handle_sparsetensors.cc
+++ b/tensorflow/dtensor/mlir/handle_sparsetensors.cc
@@ -33,6 +33,7 @@ limitations under the License.
 #include "mlir/IR/Visitors.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
 #include "mlir/Pass/PassManager.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Transforms/Passes.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
@@ -95,11 +96,12 @@ mlir::LogicalResult UpdateFunctionInputAttributes(
   auto dict_attr =
       main_func->getAttrOfType<mlir::DictionaryAttr>(kEntryFuncAttr);
   if (dict_attr) {
-    if (!dict_attr.get("inputs").isa<mlir::StringAttr>())
+    if (!mlir::isa<mlir::StringAttr>(dict_attr.get("inputs")))
       return main_func.emitOpError("Missing attribute inputs in main FuncOp.");
 
-    dict_attr.get("inputs").cast<mlir::StringAttr>().getValue().split(
-        input_names, ',', /*MaxSplit=*/-1, /*KeepEmpty=*/false);
+    mlir::cast<mlir::StringAttr>(dict_attr.get("inputs"))
+        .getValue()
+        .split(input_names, ',', /*MaxSplit=*/-1, /*KeepEmpty=*/false);
 
     llvm::SmallVector<std::string, 2> new_input_names;
 
@@ -148,10 +150,10 @@ void CreateComponentTensorsFromSparseTensors(
               {mlir::ShapedType::kDynamic, ValueRank(block_arg)},
               builder.getI64Type()),
           /*values=*/
-          mlir::RankedTensorType::get({mlir::ShapedType::kDynamic},
-                                      block_arg.getType()
-                                          .dyn_cast<mlir::RankedTensorType>()
-                                          .getElementType()),
+          mlir::RankedTensorType::get(
+              {mlir::ShapedType::kDynamic},
+              mlir::dyn_cast<mlir::RankedTensorType>(block_arg.getType())
+                  .getElementType()),
           /*dense_shapes=*/
           mlir::RankedTensorType::get({ValueRank(block_arg)},
                                       builder.getI64Type()),
@@ -214,11 +216,10 @@ struct DTensorSparseTensorToDenseTensor
 
       // Emit a SparseToDenseOp and replace the SparseTensor with the result of
       // this new op.
-      StatusOr<mlir::Value> zero_scalar =
-          CreateZeroScalarConst(builder, front_op->getLoc(),
-                                sparse_tensor_value.getType()
-                                    .cast<mlir::TensorType>()
-                                    .getElementType());
+      StatusOr<mlir::Value> zero_scalar = CreateZeroScalarConst(
+          builder, front_op->getLoc(),
+          mlir::cast<mlir::TensorType>(sparse_tensor_value.getType())
+              .getElementType());
       if (!zero_scalar.ok()) return signalPassFailure();
       mlir::TF::SparseToDenseOp sparse_to_dense_op =
           builder.create<mlir::TF::SparseToDenseOp>(
diff --git a/tensorflow/dtensor/mlir/ir/tf_dtensor.cc b/tensorflow/dtensor/mlir/ir/tf_dtensor.cc
index 14e66c98b6cb2c..d119f034eecc38 100644
--- a/tensorflow/dtensor/mlir/ir/tf_dtensor.cc
+++ b/tensorflow/dtensor/mlir/ir/tf_dtensor.cc
@@ -22,6 +22,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/IR/MLIRContext.h"  // from @llvm-project
 #include "mlir/IR/OpImplementation.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_dialect.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
@@ -38,13 +39,13 @@ namespace {
 RankedTensorType GetRankedTensorType(mlir::Value val) {
   mlir::Type type = val.getType();
   if (auto type_with_subtype =
-          mlir::getElementTypeOrSelf(val)
-              .dyn_cast<mlir::TF::TensorFlowTypeWithSubtype>()) {
+          mlir::dyn_cast<mlir::TF::TensorFlowTypeWithSubtype>(
+              mlir::getElementTypeOrSelf(val))) {
     if (type_with_subtype.GetSubtypes().size() == 1) {
       type = type_with_subtype.GetSubtypes().front();
     }
   }
-  return type.dyn_cast_or_null<RankedTensorType>();
+  return mlir::dyn_cast_or_null<RankedTensorType>(type);
 }
 }  // namespace
 
@@ -110,7 +111,7 @@ mlir::LogicalResult DTensorAllGatherOp::verify() {
   }
 
   RankedTensorType input_type =
-      op.getInput().getType().dyn_cast<RankedTensorType>();
+      mlir::dyn_cast<RankedTensorType>(op.getInput().getType());
   if (!input_type) return mlir::success();
 
   if (input_type.getRank() != input_layout.rank())
@@ -119,7 +120,7 @@ mlir::LogicalResult DTensorAllGatherOp::verify() {
            << " is not equal to input rank " << input_type.getRank();
 
   RankedTensorType output_type =
-      op.getOutput().getType().dyn_cast<RankedTensorType>();
+      mlir::dyn_cast<RankedTensorType>(op.getOutput().getType());
   if (!output_type) return mlir::success();
 
   if (output_type.getRank() != output_layout.rank())
@@ -166,7 +167,7 @@ mlir::LogicalResult DTensorAllScatterOp::verify() {
   }
 
   RankedTensorType input_type =
-      op.getInput().getType().dyn_cast<RankedTensorType>();
+      mlir::dyn_cast<RankedTensorType>(op.getInput().getType());
   if (!input_type) return mlir::success();
 
   if (input_type.getRank() != input_layout.rank())
@@ -175,7 +176,7 @@ mlir::LogicalResult DTensorAllScatterOp::verify() {
            << " is not equal to input rank " << input_type.getRank();
 
   RankedTensorType output_type =
-      op.getOutput().getType().dyn_cast<RankedTensorType>();
+      mlir::dyn_cast<RankedTensorType>(op.getOutput().getType());
   if (!output_type) return mlir::success();
 
   if (output_type.getRank() != output_layout.rank())
@@ -237,7 +238,7 @@ mlir::LogicalResult DTensorAllToAllOp::verify() {
   }
 
   RankedTensorType input_type =
-      op.getInput().getType().dyn_cast<RankedTensorType>();
+      mlir::dyn_cast<RankedTensorType>(op.getInput().getType());
   if (!input_type) return mlir::success();
 
   if (input_type.getRank() != input_layout.rank())
@@ -246,7 +247,7 @@ mlir::LogicalResult DTensorAllToAllOp::verify() {
            << " is not equal to input rank " << input_type.getRank();
 
   RankedTensorType output_type =
-      op.getOutput().getType().dyn_cast<RankedTensorType>();
+      mlir::dyn_cast<RankedTensorType>(op.getOutput().getType());
   if (!output_type) return mlir::success();
 
   if (output_type.getRank() != output_layout.rank())
diff --git a/tensorflow/dtensor/mlir/layout_parsing.cc b/tensorflow/dtensor/mlir/layout_parsing.cc
index 441ab2b86ede67..4b9011f42b0af0 100644
--- a/tensorflow/dtensor/mlir/layout_parsing.cc
+++ b/tensorflow/dtensor/mlir/layout_parsing.cc
@@ -29,6 +29,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/IR/Operation.h"  // from @llvm-project
 #include "mlir/IR/OperationSupport.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_device.h"
 #include "tensorflow/core/platform/errors.h"
 #include "tensorflow/core/platform/mutex.h"
@@ -105,7 +106,7 @@ StatusOr<std::vector<std::optional<Layout>>> ExtractLayoutFromOp(
     if (!serialized_layouts) return outs;
 
     for (auto const& attr : serialized_layouts) {
-      auto attr_str = attr.cast<mlir::StringAttr>().getValue().str();
+      auto attr_str = mlir::cast<mlir::StringAttr>(attr).getValue().str();
       if (!attr_str.empty()) {
         TF_ASSIGN_OR_RETURN(auto layout, Layout::FromString(attr_str));
         outs.emplace_back(std::move(layout));
@@ -162,7 +163,7 @@ StatusOr<std::optional<Mesh>> ExtractDeviceMeshFromOp(mlir::Operation* op) {
 }
 
 StatusOr<std::optional<Layout>> ExtractLayoutFromOperand(mlir::Value operand) {
-  if (auto op_result = operand.dyn_cast<mlir::OpResult>()) {
+  if (auto op_result = mlir::dyn_cast<mlir::OpResult>(operand)) {
     mlir::Operation* op = op_result.getDefiningOp();
     std::optional<Layout> out;
     if (auto layout_op = llvm::dyn_cast<mlir::TF::DTensorLayout>(op)) {
@@ -185,7 +186,7 @@ StatusOr<std::optional<Layout>> ExtractLayoutFromOperand(mlir::Value operand) {
     return out;
   }
 
-  auto block_arg = operand.dyn_cast<mlir::BlockArgument>();
+  auto block_arg = mlir::dyn_cast<mlir::BlockArgument>(operand);
   if (!block_arg)
     return errors::Internal(
         "Operand is not either a OpResult or a BlockArgument. This should not "
@@ -293,7 +294,7 @@ StatusOr<llvm::SmallVector<Layout, 4>> ExtractElementLayoutsFromOperand(
                       operand_index, op->getName())
             .str());
 
-  auto block_arg = input_value.get().dyn_cast<mlir::BlockArgument>();
+  auto block_arg = mlir::dyn_cast<mlir::BlockArgument>(input_value.get());
   auto array_attr = enclosing_function.getArgAttrOfType<mlir::ArrayAttr>(
       block_arg.getArgNumber(), kIteratorElementLayouts);
   if (!array_attr)
@@ -305,9 +306,10 @@ StatusOr<llvm::SmallVector<Layout, 4>> ExtractElementLayoutsFromOperand(
 
   llvm::SmallVector<Layout, 4> layouts(array_attr.size());
   for (int i = 0; i < array_attr.size(); ++i) {
-    layouts[i] = Layout::FromString(
-                     array_attr[i].cast<mlir::StringAttr>().getValue().str())
-                     .value();
+    layouts[i] =
+        Layout::FromString(
+            mlir::cast<mlir::StringAttr>(array_attr[i]).getValue().str())
+            .value();
   }
 
   return layouts;
diff --git a/tensorflow/dtensor/mlir/layout_propagation_v2.cc b/tensorflow/dtensor/mlir/layout_propagation_v2.cc
index a7f089eb1726ec..54b798881e5b09 100644
--- a/tensorflow/dtensor/mlir/layout_propagation_v2.cc
+++ b/tensorflow/dtensor/mlir/layout_propagation_v2.cc
@@ -113,7 +113,7 @@ void UpdateLayoutForSkippedOps(
   llvm::SmallVector<mlir::Value, 4> skipped_values;
   TraceUseToNextTFOp(&operand, func_to_caller, &skipped_values);
   for (const mlir::Value& skipped_value : skipped_values)
-    if ((!skipped_value.isa<mlir::OpResult>() ||
+    if ((!mlir::isa<mlir::OpResult>(skipped_value) ||
          !mlir::isa<mlir::TF::DTensorLayout, mlir::tf_device::ClusterOp>(
              skipped_value.getDefiningOp())) &&
         layouts.find(skipped_value) == layouts.end())
@@ -724,7 +724,7 @@ mlir::LogicalResult InsertDTensorLayoutOps(
     // resource type elements.
     mlir::Type value_type = GetSubtypeOrSelf(merged_layout.first);
 
-    if (auto type = value_type.dyn_cast<mlir::TensorType>()) {
+    if (auto type = mlir::dyn_cast<mlir::TensorType>(value_type)) {
       auto layout_op = builder.create<mlir::TF::DTensorLayout>(
           merged_layout.first.getLoc(), merged_layout.first, layout_attr,
           mlir::TF::ShapeAttr::get(builder.getContext(), type));
@@ -810,7 +810,7 @@ void GetOperationsNeedingUpdate(
         if (!mlir::isa<mlir::TF::CopyToMeshOp>(use->getOwner()))
           operations.insert(use->getOwner());
     // If this is an OpResult, also add the op that produces it.
-    if (value.isa<mlir::OpResult>() &&
+    if (mlir::isa<mlir::OpResult>(value) &&
         !mlir::isa<mlir::TF::CopyToMeshOp>(value.getDefiningOp()))
       operations.insert(value.getDefiningOp());
   }
@@ -933,7 +933,7 @@ class LayoutPrinter : public mlir::OpAsmPrinter {
   // Print an operand, this could be both the OpResult or a BlockArgument.
   // We also print the layout if it exists and the type.
   void printOperand(mlir::Value value, llvm::raw_ostream& os) override {
-    if (auto result = value.dyn_cast<mlir::OpResult>()) {
+    if (auto result = mlir::dyn_cast<mlir::OpResult>(value)) {
       // If DTensorLayout ops are already in the module, we need to skip them
       // since we aren't printing them out.
       if (mlir::isa<mlir::TF::DTensorLayout>(result.getDefiningOp())) {
@@ -946,7 +946,7 @@ class LayoutPrinter : public mlir::OpAsmPrinter {
       os << "%" << location_[result.getDefiningOp()];
       if (result.getDefiningOp()->getNumResults() > 1)
         os << ":" << result.getResultNumber();
-    } else if (auto argument = value.dyn_cast<mlir::BlockArgument>()) {
+    } else if (auto argument = mlir::dyn_cast<mlir::BlockArgument>(value)) {
       if (arguments_.find(argument) == arguments_.end())
         arguments_[argument] = next_argument_++;
       os << "%arg" << arguments_[argument];
@@ -1203,7 +1203,7 @@ mlir::LogicalResult InsertRelayoutForWhileLoops(
           mlir::cast<mlir::TF::DTensorLayout>(input_layout_op).getLayout();
 
       // Inputs to Yield should also be a DTensorLayout op.
-      if (!yield_op->getOperand(i).isa<mlir::OpResult>() ||
+      if (!mlir::isa<mlir::OpResult>(yield_op->getOperand(i)) ||
           !mlir::isa<mlir::TF::DTensorLayout>(
               yield_op->getOperand(i).getDefiningOp()))
         return yield_op->emitOpError()
@@ -1220,12 +1220,12 @@ mlir::LogicalResult InsertRelayoutForWhileLoops(
 
       // Insert the first Relayout op (in the loop body).
       builder.setInsertionPointAfter(output_layout_op);
-      if (!yield_op->getOperand(i).getType().isa<mlir::TensorType>())
+      if (!mlir::isa<mlir::TensorType>(yield_op->getOperand(i).getType()))
         return yield_op->emitOpError()
                << "operand " << i << " does not have TensorType";
       mlir::TF::ShapeAttr global_shape = mlir::TF::ShapeAttr::get(
           builder.getContext(),
-          yield_op->getOperand(i).getType().cast<mlir::TensorType>());
+          mlir::cast<mlir::TensorType>(yield_op->getOperand(i).getType()));
       mlir::TF::RelayoutOp first_relayout =
           builder.create<mlir::TF::RelayoutOp>(
               op.getLoc(), yield_op->getOperand(i).getType(),
diff --git a/tensorflow/dtensor/mlir/merge_clusters.cc b/tensorflow/dtensor/mlir/merge_clusters.cc
index 3aa323ec1d4cc1..575a4e643b331d 100644
--- a/tensorflow/dtensor/mlir/merge_clusters.cc
+++ b/tensorflow/dtensor/mlir/merge_clusters.cc
@@ -39,6 +39,7 @@ limitations under the License.
 #include "mlir/Pass/Pass.h"  // from @llvm-project
 #include "mlir/Pass/PassManager.h"  // from @llvm-project
 #include "mlir/Support/DebugStringHelper.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Transforms/Passes.h"  // from @llvm-project
 #include "mlir/Transforms/RegionUtils.h"  // from @llvm-project
@@ -278,7 +279,7 @@ void CloneEmptyIfWithPredicate(mlir::TF::IfRegionOp if_region, const Mesh& mesh,
   // DTensorSend op sends the predicate to `mesh` cluster with replicated
   // layout.
   mlir::TensorType predicate_tensor_type =
-      if_region.getCond().getType().cast<mlir::TensorType>();
+      mlir::cast<mlir::TensorType>(if_region.getCond().getType());
   const std::string send_recv_key =
       absl::StrCat(kSendRecvKeyPrefix, *num_send_recvs);
   *num_send_recvs += 1;
@@ -341,7 +342,7 @@ mlir::LogicalResult VerifyClusterInputOutput(
   mlir::LogicalResult result = mlir::success();
   mlir::visitUsedValuesDefinedAbove(
       cluster.getBody(), cluster.getBody(), [&](mlir::OpOperand* input) {
-        if (!input->get().isa<mlir::BlockArgument>()) {
+        if (!mlir::isa<mlir::BlockArgument>(input->get())) {
           result = cluster.emitOpError(
               "found nested tf_device.Cluster op with inputs. Nested cluster "
               "must use send/recv instead.");
diff --git a/tensorflow/dtensor/mlir/mesh_propagation.cc b/tensorflow/dtensor/mlir/mesh_propagation.cc
index 6d57b068bd5062..bb5369a530c2cb 100644
--- a/tensorflow/dtensor/mlir/mesh_propagation.cc
+++ b/tensorflow/dtensor/mlir/mesh_propagation.cc
@@ -34,6 +34,7 @@ limitations under the License.
 #include "mlir/Pass/Pass.h"  // from @llvm-project
 #include "mlir/Pass/PassManager.h"  // from @llvm-project
 #include "mlir/Support/DebugStringHelper.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Transforms/RegionUtils.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_device.h"
@@ -101,7 +102,7 @@ mlir::LogicalResult ExtractMeshFromBlockArgumentWhile(
     }
     return mlir::success();
   } else if (auto func_block_arg =
-                 while_op_operand.dyn_cast<mlir::BlockArgument>()) {
+                 mlir::dyn_cast<mlir::BlockArgument>(while_op_operand)) {
     // The while op operand is a block argument of the function, then follow the
     // same routine of getting mesh from function argument.
     auto function_op = mlir::dyn_cast_or_null<mlir::func::FuncOp>(
@@ -183,7 +184,7 @@ mlir::LogicalResult ExtractMeshFromOperand(
 
   // If `operand` is a block argument then extract mesh from `tf._mesh`
   // attribute of the corresponding function argument.
-  if (auto block_arg = operand_value.dyn_cast<mlir::BlockArgument>()) {
+  if (auto block_arg = mlir::dyn_cast<mlir::BlockArgument>(operand_value)) {
     if (mlir::failed(ExtractMeshFromBlockArgument(block_arg, out)))
       return mlir::failure();
 
@@ -193,7 +194,7 @@ mlir::LogicalResult ExtractMeshFromOperand(
         auto producer_values = it->getSecond();
         std::optional<Mesh> operand_mesh;
         for (mlir::Value producer_value : producer_values) {
-          if (auto arg = producer_value.dyn_cast<mlir::BlockArgument>()) {
+          if (auto arg = mlir::dyn_cast<mlir::BlockArgument>(producer_value)) {
             std::optional<Mesh> mesh;
             if (mlir::failed(ExtractMeshFromBlockArgument(arg, &mesh)))
               return mlir::failure();
@@ -206,7 +207,7 @@ mlir::LogicalResult ExtractMeshFromOperand(
                 producer_value.getDefiningOp()
                     ->getParentOfType<mlir::tf_device::ClusterOp>();
             auto output_from_producing_op = input_cluster.getResult(
-                producer_value.cast<mlir::OpResult>().getResultNumber());
+                mlir::cast<mlir::OpResult>(producer_value).getResultNumber());
 
             std::optional<Mesh> mesh;
             if (mlir::failed(
diff --git a/tensorflow/dtensor/mlir/move_compilation_to_host.cc b/tensorflow/dtensor/mlir/move_compilation_to_host.cc
index d10a65f7d6b465..2fd20105388bf4 100644
--- a/tensorflow/dtensor/mlir/move_compilation_to_host.cc
+++ b/tensorflow/dtensor/mlir/move_compilation_to_host.cc
@@ -29,6 +29,7 @@ limitations under the License.
 #include "mlir/IR/Operation.h"  // from @llvm-project
 #include "mlir/IR/Value.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_device.h"
 #include "tensorflow/dtensor/cc/tensor_layout.h"
@@ -141,9 +142,9 @@ mlir::LogicalResult CreateSendRecvOpsToTransferProgramKey(
     mlir::OpBuilder fn_builder = mlir::OpBuilder::atBlockEnd(fn_block);
     auto recv = fn_builder.create<mlir::TF::_HostRecvOp>(
         compile_op->getLoc(),
-        compilation_key.getType().cast<mlir::TensorType>(), device_key_map[i],
-        compile_op_launch.getDevice(), /*send_device_incarnation=*/0,
-        local_devices[i]);
+        mlir::cast<mlir::TensorType>(compilation_key.getType()),
+        device_key_map[i], compile_op_launch.getDevice(),
+        /*send_device_incarnation=*/0, local_devices[i]);
     recv->setAttr("device", builder.getStringAttr(local_devices[i]));
 
     fn_builder.create<mlir::func::ReturnOp>(recv_select_fn.getLoc(),
diff --git a/tensorflow/dtensor/mlir/propagate_default_layout.cc b/tensorflow/dtensor/mlir/propagate_default_layout.cc
index 39aba3a8716b9b..030e8af63aa1d8 100644
--- a/tensorflow/dtensor/mlir/propagate_default_layout.cc
+++ b/tensorflow/dtensor/mlir/propagate_default_layout.cc
@@ -25,6 +25,7 @@ limitations under the License.
 #include "mlir/IR/MLIRContext.h"  // from @llvm-project
 #include "mlir/IR/Operation.h"  // from @llvm-project
 #include "mlir/IR/Visitors.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Transforms/Passes.h"  // from @llvm-project
 #include "tensorflow/dtensor/cc/constants.h"
@@ -83,7 +84,7 @@ mlir::LogicalResult PropagateDTensorLayoutForRelayout(
 
   mlir::OpBuilder builder(relayout->getBlock(),
                           ++mlir::Block::iterator(relayout));
-  mlir::TensorType type = relayout.getType().dyn_cast<mlir::TensorType>();
+  mlir::TensorType type = mlir::dyn_cast<mlir::TensorType>(relayout.getType());
   if (!type) return relayout.emitOpError("type required for Relayout op");
 
   CreateDTensorLayoutOp(layout, relayout.getOutput(), type, relayout.getLoc(),
@@ -110,7 +111,7 @@ mlir::LogicalResult PropagateFunctionArgAttrToLayoutOp(
     mlir::OpBuilder builder(function.getBody());
     auto arg = function.getArgument(arg_index);
     mlir::Type tensor_type = GetSubtypeOrSelf(arg);
-    if (auto type = tensor_type.dyn_cast<mlir::TensorType>()) {
+    if (auto type = mlir::dyn_cast<mlir::TensorType>(tensor_type)) {
       CreateDTensorLayoutOp(layout_or_status.value(), arg, type,
                             function.getLoc(),
                             builder.getI64IntegerAttr(arg_index), &builder, &c);
@@ -149,7 +150,7 @@ mlir::LogicalResult PropagateFunctionDefaultLayoutAttrToLayoutOp(
     mlir::OpBuilder builder(function_terminator);
     auto return_value = function_terminator->getOperand(ret_index);
 
-    if (auto type = return_value.getType().dyn_cast<mlir::TensorType>())
+    if (auto type = mlir::dyn_cast<mlir::TensorType>(return_value.getType()))
       CreateDTensorLayoutOp(result_layout_or_status.value(), return_value, type,
                             function.getLoc(), nullptr, &builder, &c);
     else
@@ -187,7 +188,8 @@ mlir::LogicalResult PropagateOpAttrToLayoutOp(mlir::MLIRContext& context,
           if (!layout || layout->IsEmpty()) continue;
 
           auto op_output = op->getResult(index);
-          if (auto type = op_output.getType().dyn_cast<mlir::TensorType>()) {
+          if (auto type =
+                  mlir::dyn_cast<mlir::TensorType>(op_output.getType())) {
             CreateDTensorLayoutOp(*layout, op_output, type, function.getLoc(),
                                   arg_index, &builder, &context);
           } else {
diff --git a/tensorflow/dtensor/mlir/propagate_device_id_to_function_args.cc b/tensorflow/dtensor/mlir/propagate_device_id_to_function_args.cc
index 404be2b38e61fc..34648f9f407f2c 100644
--- a/tensorflow/dtensor/mlir/propagate_device_id_to_function_args.cc
+++ b/tensorflow/dtensor/mlir/propagate_device_id_to_function_args.cc
@@ -26,6 +26,7 @@ limitations under the License.
 #include "mlir/IR/Visitors.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
 #include "mlir/Pass/PassManager.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Transforms/Passes.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
@@ -69,7 +70,7 @@ llvm::SmallVector<FunctionToChangeInfo, 4> FindFunctionsToRewrite(
       symbol = call_op.getF();
     } else {
       auto symbol_ref = llvm::dyn_cast<mlir::TF::PartitionedCallOp>(op).getF();
-      if (!symbol_ref.isa<mlir::FlatSymbolRefAttr>()) return;
+      if (!mlir::isa<mlir::FlatSymbolRefAttr>(symbol_ref)) return;
       symbol = symbol_ref.getRootReference().getValue();
     }
 
diff --git a/tensorflow/dtensor/mlir/restore_shape_inference.cc b/tensorflow/dtensor/mlir/restore_shape_inference.cc
index abbda8cbdd80ae..4a400ecb9f341e 100644
--- a/tensorflow/dtensor/mlir/restore_shape_inference.cc
+++ b/tensorflow/dtensor/mlir/restore_shape_inference.cc
@@ -19,6 +19,7 @@ limitations under the License.
 #include "mlir/Dialect/Func/IR/FuncOps.h"  // from @llvm-project
 #include "mlir/IR/BuiltinOps.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/dtensor/mlir/dtensor_send_recv.h"
@@ -81,9 +82,7 @@ mlir::LogicalResult BackwardShapeInferenceToRestoreOp(mlir::ModuleOp module,
     // the type to the operand element type.
     mlir::RankedTensorType new_type = mlir::RankedTensorType::get(
         GetShapeOfValue(new_cast_op.getResult()).value(),
-        new_cast_op.getOperand()
-            .getType()
-            .cast<mlir::TensorType>()
+        mlir::cast<mlir::TensorType>(new_cast_op.getOperand().getType())
             .getElementType());
 
     // Recursively shape inference to the input of the cast op with the
@@ -120,7 +119,7 @@ mlir::LogicalResult BackwardShapeInferenceToRestoreOp(mlir::ModuleOp module,
     auto new_recv_op = builder->create<mlir::TF::DTensorRecv>(
         recv_op.getLoc(), type, builder->getStringAttr(recv_op.getKey()),
         mlir::TF::ShapeAttr::get(builder->getContext(),
-                                 type.dyn_cast<mlir::TensorType>()),
+                                 mlir::dyn_cast<mlir::TensorType>(type)),
         mlir::dtensor::MeshAttr::get(builder->getContext(), recv_op.getMesh()));
 
     recv_op.replaceAllUsesWith(new_recv_op.getOutput());
diff --git a/tensorflow/dtensor/mlir/sparse_expansions/dynamic_enqueue_sparse_expander.cc b/tensorflow/dtensor/mlir/sparse_expansions/dynamic_enqueue_sparse_expander.cc
index 3cc8d9e3ec513c..f609c1576f72fd 100644
--- a/tensorflow/dtensor/mlir/sparse_expansions/dynamic_enqueue_sparse_expander.cc
+++ b/tensorflow/dtensor/mlir/sparse_expansions/dynamic_enqueue_sparse_expander.cc
@@ -39,7 +39,7 @@ namespace {
 StatusOr<mlir::Value> ExpandIndices(mlir::OpBuilder& builder,
                                     mlir::Value indices) {
   int64_t num_dim =
-      indices.getType().dyn_cast<mlir::RankedTensorType>().getDimSize(1);
+      mlir::dyn_cast<mlir::RankedTensorType>(indices.getType()).getDimSize(1);
   if (num_dim != 2)
     return errors::Unimplemented(
         "Sparse tensors with dense rank not equal to 2 is not yet supported in "
@@ -47,7 +47,8 @@ StatusOr<mlir::Value> ExpandIndices(mlir::OpBuilder& builder,
   mlir::Location loc = indices.getLoc();
   auto indices_padded_type = mlir::RankedTensorType::get(
       {mlir::ShapedType::kDynamic, 3},
-      indices.getType().dyn_cast<mlir::RankedTensorType>().getElementType());
+      mlir::dyn_cast<mlir::RankedTensorType>(indices.getType())
+          .getElementType());
   // Little trick to make a rank-2 tensor of [[0,0], [0,1]] using rank 1
   // constants.
   mlir::Value indices_padding = builder.create<mlir::TF::ReshapeOp>(
diff --git a/tensorflow/dtensor/mlir/spmd_expander.cc b/tensorflow/dtensor/mlir/spmd_expander.cc
index 4e63f87970777f..5538afe18c1a94 100644
--- a/tensorflow/dtensor/mlir/spmd_expander.cc
+++ b/tensorflow/dtensor/mlir/spmd_expander.cc
@@ -29,6 +29,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/IR/Operation.h"  // from @llvm-project
 #include "mlir/IR/OperationSupport.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_device.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/core/platform/errors.h"
@@ -177,7 +178,7 @@ Status SPMDExpanderBase::ExpandOpAndSetLayout(mlir::Operation* op,
   global_output_shapes.reserve(op->getNumResults());
   for (auto output_value : op->getResults()) {
     auto maybe_ranked =
-        output_value.getType().dyn_cast<mlir::RankedTensorType>();
+        mlir::dyn_cast<mlir::RankedTensorType>(output_value.getType());
     // Do not extract global shape if the shape isn't statically known.
     //
     // This is a bit subtle and relies on the check of static shape of output
diff --git a/tensorflow/dtensor/mlir/spmd_expander_common.cc b/tensorflow/dtensor/mlir/spmd_expander_common.cc
index b3f823ae7e9fc4..1cee400f1a283f 100644
--- a/tensorflow/dtensor/mlir/spmd_expander_common.cc
+++ b/tensorflow/dtensor/mlir/spmd_expander_common.cc
@@ -35,6 +35,7 @@ limitations under the License.
 #include "mlir/IR/Operation.h"  // from @llvm-project
 #include "mlir/IR/OperationSupport.h"  // from @llvm-project
 #include "mlir/IR/Value.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_device.h"
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h"
 #include "tensorflow/core/platform/errors.h"
@@ -113,7 +114,7 @@ Status CreateSplitOp(const int num_split, const int split_dimension,
   // Correctly set output shapes of split op output if input shape is statically
   // known.
   mlir::Type output_type;
-  auto input_type = src_input.getType().cast<mlir::TensorType>();
+  auto input_type = mlir::cast<mlir::TensorType>(src_input.getType());
 
   if (input_type.hasRank()) {
     if (input_type.getShape()[split_dimension] == mlir::ShapedType::kDynamic) {
@@ -680,7 +681,7 @@ mlir::StringAttr GetUniqueControlflowFnName(const std::string& prefix,
 
 Status SetBuilderInsertionAfterValue(mlir::Value value,
                                      mlir::OpBuilder& builder) {
-  if (value.isa<mlir::OpResult>()) {
+  if (mlir::isa<mlir::OpResult>(value)) {
     builder.setInsertionPointAfterValue(value);
     return absl::OkStatus();
   }
@@ -719,7 +720,7 @@ Status PrintTensor(mlir::Value value, const std::string& format_string = "%s") {
 Status ExtractConstStringVectorFromValue(
     mlir::Value value, llvm::SmallVectorImpl<std::string>& out_vector) {
   value = GetForwardedDTensorLayoutInput(value);
-  if (value.isa<mlir::BlockArgument>())
+  if (mlir::isa<mlir::BlockArgument>(value))
     return errors::Internal("Unable get constant value from block argument.");
   mlir::DenseStringElementsAttr attr;
   if (!matchPattern(value, m_Constant(&attr))) {
@@ -736,7 +737,7 @@ Status ExtractConstStringVectorFromValue(
 
 StatusOr<std::string> ExtractConstScalarStringFromValue(mlir::Value value) {
   value = GetForwardedDTensorLayoutInput(value);
-  if (value.isa<mlir::BlockArgument>())
+  if (mlir::isa<mlir::BlockArgument>(value))
     return errors::Internal("Unable get constant value from block argument.");
   mlir::DenseStringElementsAttr attr;
   if (!matchPattern(value, m_Constant(&attr))) {
diff --git a/tensorflow/dtensor/mlir/tpu_add_resource_device_attribute.cc b/tensorflow/dtensor/mlir/tpu_add_resource_device_attribute.cc
index 7fcf1d3b3e2c20..7094adde2ea977 100644
--- a/tensorflow/dtensor/mlir/tpu_add_resource_device_attribute.cc
+++ b/tensorflow/dtensor/mlir/tpu_add_resource_device_attribute.cc
@@ -27,6 +27,7 @@ limitations under the License.
 #include "mlir/IR/Value.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
 #include "mlir/Pass/PassManager.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Transforms/Passes.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/ir/tf_device.h"
@@ -92,10 +93,10 @@ struct DTensorTpuAddResourceDeviceAttribute
     mlir::WalkResult walk_result =
         module.walk([](mlir::TF::TPUExecuteOp tpu_execute) {
           for (mlir::Value tpu_input : tpu_execute.getOperands()) {
-            if (tpu_input.isa<mlir::BlockArgument>() &&
+            if (mlir::isa<mlir::BlockArgument>(tpu_input) &&
                 IsResourceType(tpu_input))
               AddPlaceholderDeviceAttributeToResource(
-                  tpu_input.cast<mlir::BlockArgument>(), tpu_execute);
+                  mlir::cast<mlir::BlockArgument>(tpu_input), tpu_execute);
 
             mlir::Operation* input_op = tpu_input.getDefiningOp();
             auto read_variable_op =
@@ -103,7 +104,7 @@ struct DTensorTpuAddResourceDeviceAttribute
             if (!read_variable_op) continue;
 
             AddPlaceholderDeviceAttributeToResource(
-                read_variable_op.getResource().cast<mlir::BlockArgument>(),
+                mlir::cast<mlir::BlockArgument>(read_variable_op.getResource()),
                 tpu_execute);
           }
 
@@ -113,9 +114,9 @@ struct DTensorTpuAddResourceDeviceAttribute
             if (assign_variable == nullptr) continue;
 
             AddPlaceholderDeviceAttributeToResource(
-                llvm::cast<mlir::TF::AssignVariableOp>(assign_variable)
-                    .getResource()
-                    .cast<mlir::BlockArgument>(),
+                mlir::cast<mlir::BlockArgument>(
+                    llvm::cast<mlir::TF::AssignVariableOp>(assign_variable)
+                        .getResource()),
                 tpu_execute);
           }
 
diff --git a/tensorflow/dtensor/mlir/utils/collective_lowering.cc b/tensorflow/dtensor/mlir/utils/collective_lowering.cc
index 5a12d4de95dcc0..fb71b092d3c695 100644
--- a/tensorflow/dtensor/mlir/utils/collective_lowering.cc
+++ b/tensorflow/dtensor/mlir/utils/collective_lowering.cc
@@ -42,6 +42,7 @@ limitations under the License.
 #include "mlir/IR/Value.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
 #include "mlir/Support/DebugStringHelper.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "tensorflow/compiler/mlir/tensorflow/transforms/collection_ops_util.h"
 #include "xla/tsl/util/env_var.h"
 #include "tensorflow/core/platform/errors.h"
@@ -269,7 +270,8 @@ mlir::Operation* EmitCollectiveReduceScatter(
     const mlir::DenseIntElementsAttr& group_assignment, int32 scatter_dimension,
     int32 key_base, mlir::Value device_id, int32 host_group_size,
     const mlir::StringRef device_type) {
-  mlir::TensorType input_type = input.getType().dyn_cast<mlir::TensorType>();
+  mlir::TensorType input_type =
+      mlir::dyn_cast<mlir::TensorType>(input.getType());
 
   const bool need_transpose = scatter_dimension != 0;
   std::vector<int64> perm_for_transpose;
@@ -282,9 +284,10 @@ mlir::Operation* EmitCollectiveReduceScatter(
     auto pre_transpose_op =
         EmitTransposeOp(builder, loc, input, perm_for_transpose);
     input = pre_transpose_op->getResult(0);
-    input_type = input.getType().dyn_cast<mlir::TensorType>();
+    input_type = mlir::dyn_cast<mlir::TensorType>(input.getType());
     // Compute transposed output type for CollectiveReduceScatter
-    auto output_shape = output_type.dyn_cast<mlir::TensorType>().getShape();
+    auto output_shape =
+        mlir::dyn_cast<mlir::TensorType>(output_type).getShape();
     std::vector<int64> transposed_shape(output_shape.begin(),
                                         output_shape.end());
     for (int i = 0; i < output_shape.size(); i++) {
@@ -338,8 +341,8 @@ mlir::Operation* EmitCollectiveAllToAll(
   // data correctly. An example relayout that requires this is [y, unsharded, x]
   // -> [y, x, unsharded].
   const mlir::TensorType input_type =
-      input.getType().dyn_cast<mlir::TensorType>();
-  auto input_shape = input_type.dyn_cast<mlir::TensorType>().getShape();
+      mlir::dyn_cast<mlir::TensorType>(input.getType());
+  auto input_shape = mlir::dyn_cast<mlir::TensorType>(input_type).getShape();
 
   // TODO(trevor-m): One of the transpose pairs created when requires_transpose
   // is true can be combined with the transpose in permute_data() that lies on
@@ -478,7 +481,7 @@ mlir::Operation* EmitCollectiveGather(
   auto shape = group_assignment.getType().getShape();
   const int32 group_size = shape[1];
   const mlir::TensorType input_type =
-      input.getType().dyn_cast<mlir::TensorType>();
+      mlir::dyn_cast<mlir::TensorType>(input.getType());
   auto input_shape = input_type.getShape();
   auto dim_0_shape = input_shape[0];
   std::vector<int64> output_shape = {input_shape.begin(), input_shape.end()};
@@ -758,9 +761,9 @@ mlir::LogicalResult LowerAllGatherOpToCollective(
   const std::string device_type = device_type_or_status.value();
 
   const mlir::RankedTensorType input_type =
-      all_gather.getInput().getType().dyn_cast<mlir::RankedTensorType>();
+      mlir::dyn_cast<mlir::RankedTensorType>(all_gather.getInput().getType());
   const mlir::RankedTensorType output_type =
-      all_gather.getOutput().getType().dyn_cast<mlir::RankedTensorType>();
+      mlir::dyn_cast<mlir::RankedTensorType>(all_gather.getOutput().getType());
 
   if (!input_type)
     return all_gather.emitOpError() << "input type is not a RankedTensorType";
@@ -901,9 +904,9 @@ mlir::LogicalResult LowerAllGatherOp(mlir::TF::DTensorAllGatherOp all_gather) {
   }
 
   const mlir::RankedTensorType input_type =
-      all_gather.getInput().getType().dyn_cast<mlir::RankedTensorType>();
+      mlir::dyn_cast<mlir::RankedTensorType>(all_gather.getInput().getType());
   const mlir::RankedTensorType output_type =
-      all_gather.getOutput().getType().dyn_cast<mlir::RankedTensorType>();
+      mlir::dyn_cast<mlir::RankedTensorType>(all_gather.getOutput().getType());
 
   if (!input_type)
     return all_gather.emitOpError() << "input type is not a RankedTensorType";
@@ -1048,7 +1051,7 @@ mlir::LogicalResult LowerAllGatherOp(mlir::TF::DTensorAllGatherOp all_gather) {
   // position in the tensor, only one task in the reduction group can have a 1.
   // This is sufficient.
   const mlir::TensorType type =
-      update_result.getType().dyn_cast<mlir::TensorType>();
+      mlir::dyn_cast<mlir::TensorType>(update_result.getType());
   absl::string_view reduce_type = kReduceOpAdd;
   if (type && type.getElementType().isInteger(1)) reduce_type = kReduceOpAny;
   mlir::TF::DTensorAllReduceOp all_reduce =
@@ -1090,7 +1093,7 @@ mlir::LogicalResult LowerAllScatterOp(
   // sharding_spec[j]=i and this is a dimension with split and 0 otherwise.
 
   mlir::RankedTensorType output_type =
-      all_scatter.getOutput().getType().dyn_cast<mlir::RankedTensorType>();
+      mlir::dyn_cast<mlir::RankedTensorType>(all_scatter.getOutput().getType());
   if (!output_type)
     return all_scatter.emitOpError() << "input must have static rank";
 
diff --git a/third_party/xla/xla/mlir/backends/cpu/transforms/BUILD b/third_party/xla/xla/mlir/backends/cpu/transforms/BUILD
index bae1e833302a91..dd3602bd4f7725 100644
--- a/third_party/xla/xla/mlir/backends/cpu/transforms/BUILD
+++ b/third_party/xla/xla/mlir/backends/cpu/transforms/BUILD
@@ -58,6 +58,7 @@ cc_library(
         "@llvm-project//mlir:MemRefDialect",
         "@llvm-project//mlir:Pass",
         "@llvm-project//mlir:SparseTensorDialect",
+        "@llvm-project//mlir:Support",
         "@llvm-project//mlir:TensorDialect",
         "@llvm-project//mlir:TransformUtils",
         "@llvm-project//mlir:VectorDialect",
diff --git a/third_party/xla/xla/mlir/backends/cpu/transforms/legalize_i1_vector_transfers.cc b/third_party/xla/xla/mlir/backends/cpu/transforms/legalize_i1_vector_transfers.cc
index 09d4293af32dc3..359efa920d8451 100644
--- a/third_party/xla/xla/mlir/backends/cpu/transforms/legalize_i1_vector_transfers.cc
+++ b/third_party/xla/xla/mlir/backends/cpu/transforms/legalize_i1_vector_transfers.cc
@@ -25,6 +25,7 @@ limitations under the License.
 #include "mlir/IR/PatternMatch.h"  // from @llvm-project
 #include "mlir/IR/TypeUtilities.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"  // from @llvm-project
 #include "xla/mlir/backends/cpu/transforms/passes.h"
 #include "xla/mlir/xla_cpu/ir/xla_cpu.h"
@@ -51,11 +52,11 @@ Value CastToI8(Value in, ImplicitLocOpBuilder& b, bool optional = false) {
     return {};
   }
 
-  if (auto vec_ty = ty.dyn_cast<VectorType>()) {
+  if (auto vec_ty = mlir::dyn_cast<VectorType>(ty)) {
     return b.create<arith::ExtUIOp>(
         vec_ty.cloneWith(std::nullopt, b.getI8Type()), in);
   }
-  if (auto memref_ty = ty.dyn_cast<MemRefType>()) {
+  if (auto memref_ty = mlir::dyn_cast<MemRefType>(ty)) {
     auto cast_ty = memref_ty.cloneWith(std::nullopt, b.getI8Type());
     return b.create<xla_cpu::MemRefElementCastOp>(cast_ty, in);
   }
diff --git a/third_party/xla/xla/mlir/backends/cpu/transforms/legalize_library_ops.cc b/third_party/xla/xla/mlir/backends/cpu/transforms/legalize_library_ops.cc
index c3231a92625385..e85b7b82849c68 100644
--- a/third_party/xla/xla/mlir/backends/cpu/transforms/legalize_library_ops.cc
+++ b/third_party/xla/xla/mlir/backends/cpu/transforms/legalize_library_ops.cc
@@ -30,6 +30,7 @@ limitations under the License.
 #include "mlir/IR/MLIRContext.h"  // from @llvm-project
 #include "mlir/IR/PatternMatch.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"  // from @llvm-project
 #include "xla/mlir/backends/cpu/transforms/passes.h"
 #include "xla/mlir/xla_cpu/ir/xla_cpu.h"
@@ -80,7 +81,8 @@ std::optional<xla_cpu::ReductionKind> MatchReductionComputation(
     return xla_cpu::ReductionKind::ALL_REDUCE_MAX;
   }
 
-  auto type = computation->getOperandTypes().front().dyn_cast<ShapedType>();
+  auto type =
+      mlir::dyn_cast<ShapedType>(computation->getOperandTypes().front());
   if (!type || !type.getElementType().isInteger(1)) {
     return std::nullopt;
   }
@@ -97,7 +99,7 @@ std::optional<xla_cpu::ReductionKind> MatchReductionComputation(
 
 // Returns a `tensor.empty` with the same shape as `tensor`.
 Value CreateEmptyLike(OpBuilder& b, Location loc, Value tensor) {
-  auto ty = tensor.getType().cast<ShapedType>();
+  auto ty = mlir::cast<ShapedType>(tensor.getType());
   auto sizes = tensor::getMixedSizes(b, loc, tensor);
   return b.create<tensor::EmptyOp>(loc, sizes, ty.getElementType());
 }
@@ -197,7 +199,7 @@ class AllToAllLowering : public OpRewritePattern<mhlo::AllToAllOp> {
 
       dsts.push_back(rewriter.create<tensor::EmptyOp>(
           op.getLoc(), getAsOpFoldResult(sizes),
-          op->getResultTypes()[0].cast<ShapedType>().getElementType()));
+          mlir::cast<ShapedType>(op->getResultTypes()[0]).getElementType()));
     }
 
     rewriter.replaceOpWithNewOp<xla_cpu::AllToAllOp>(
@@ -243,7 +245,7 @@ class InfeedLowering : public OpRewritePattern<mhlo::InfeedOp> {
 
     llvm::SmallVector<Value> dsts;
     for (const auto& type : op.getResultTypes()) {
-      if (auto ranked_type = type.dyn_cast<RankedTensorType>()) {
+      if (auto ranked_type = mlir::dyn_cast<RankedTensorType>(type)) {
         dsts.push_back(b.create<tensor::EmptyOp>(
             op.getLoc(), ranked_type.getShape(), ranked_type.getElementType()));
       } else {
@@ -266,8 +268,8 @@ class OutfeedLowering : public OpRewritePattern<mhlo::OutfeedOp> {
                                 PatternRewriter& rewriter) const override {
     SmallVector<Attribute> result_types;
     for (auto operand : op.getInputs()) {
-      result_types.push_back(
-          TypeAttr::get(operand.getType().cast<ShapedType>().getElementType()));
+      result_types.push_back(TypeAttr::get(
+          mlir::cast<ShapedType>(operand.getType()).getElementType()));
     }
     rewriter.create<xla_cpu::OutfeedOp>(
         op.getLoc(), std::nullopt, op.getInputs(), op.getOutfeedConfigAttr(),
@@ -327,9 +329,9 @@ class ConvolutionLowering : public OpRewritePattern<mhlo::ConvolutionOp> {
                                 PatternRewriter& rewriter) const override {
     ImplicitLocOpBuilder b(op.getLoc(), rewriter);
 
-    auto input_shape = op.getLhs().getType().dyn_cast<ShapedType>();
-    auto kernel_shape = op.getRhs().getType().dyn_cast<ShapedType>();
-    auto output_shape = op.getResult().getType().dyn_cast<ShapedType>();
+    auto input_shape = mlir::dyn_cast<ShapedType>(op.getLhs().getType());
+    auto kernel_shape = mlir::dyn_cast<ShapedType>(op.getRhs().getType());
+    auto output_shape = mlir::dyn_cast<ShapedType>(op.getResult().getType());
 
     auto dnums = op.getDimensionNumbers();
     auto reversals = op.getWindowReversal();
diff --git a/third_party/xla/xla/mlir/backends/cpu/transforms/xla_abi_legalization.cc b/third_party/xla/xla/mlir/backends/cpu/transforms/xla_abi_legalization.cc
index 03298f338e7980..145f7b41200e83 100644
--- a/third_party/xla/xla/mlir/backends/cpu/transforms/xla_abi_legalization.cc
+++ b/third_party/xla/xla/mlir/backends/cpu/transforms/xla_abi_legalization.cc
@@ -27,6 +27,7 @@ limitations under the License.
 #include "mlir/IR/MLIRContext.h"  // from @llvm-project
 #include "mlir/IR/PatternMatch.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"  // from @llvm-project
 #include "xla/mlir/backends/cpu/transforms/passes.h"
 #include "xla/mlir_hlo/mhlo/IR/hlo_ops.h"
@@ -78,7 +79,7 @@ Value NormalizeTensor(ImplicitLocOpBuilder& b, TypedValue<ShapedType> tensor,
 
 void NormalizeInputInPlace(ImplicitLocOpBuilder& b, Value tensor,
                            ArrayRef<int64_t> layout) {
-  auto typedTensor = tensor.dyn_cast<TypedValue<ShapedType>>();
+  auto typedTensor = mlir::dyn_cast<TypedValue<ShapedType>>(tensor);
   if (!typedTensor || IsDefaultLayout(layout)) {
     return;
   }
@@ -92,12 +93,13 @@ SmallVector<SmallVector<int64_t>> FlattenLayoutAttribute(Attribute attr) {
   SmallVector<SmallVector<int64_t>> layouts;
 
   auto visit_attr = [&](mlir::Attribute attr) {
-    if (attr.isa<DenseElementsAttr>()) {
-      layouts.emplace_back(attr.cast<DenseElementsAttr>().getValues<int64_t>());
+    if (mlir::isa<DenseElementsAttr>(attr)) {
+      layouts.emplace_back(
+          mlir::cast<DenseElementsAttr>(attr).getValues<int64_t>());
     }
   };
 
-  if (auto array = attr.dyn_cast<ArrayAttr>()) {
+  if (auto array = mlir::dyn_cast<ArrayAttr>(attr)) {
     for (int64_t i = 0; i < array.size(); ++i) {
       visit_attr(array[i]);
     }
@@ -164,7 +166,7 @@ struct RewriteReturnArgs : OpRewritePattern<func::ReturnOp> {
       results.push_back(
           IsDefaultLayout(layout)
               ? result
-              : NormalizeTensor(b, result.cast<TypedValue<ShapedType>>(),
+              : NormalizeTensor(b, mlir::cast<TypedValue<ShapedType>>(result),
                                 layout,
                                 /*isInput=*/false));
     }
@@ -176,8 +178,8 @@ struct RewriteReturnArgs : OpRewritePattern<func::ReturnOp> {
 };
 
 bool IsI1Tensor(Type ty) {
-  return ty.isa<ShapedType>() &&
-         ty.cast<ShapedType>().getElementType().isInteger(1);
+  return mlir::isa<ShapedType>(ty) &&
+         mlir::cast<ShapedType>(ty).getElementType().isInteger(1);
 }
 
 struct RewriteI1Results : OpRewritePattern<func::FuncOp> {
@@ -239,7 +241,8 @@ struct RewriteCustomCalls : OpRewritePattern<mhlo::CustomCallOp> {
         const auto& layout = operand_layouts[index];
         if (!IsDefaultLayout(layout)) {
           Value normalized = NormalizeTensor(
-              b, op.getOperand(index).cast<TypedValue<ShapedType>>(), layout,
+              b, mlir::cast<TypedValue<ShapedType>>(op.getOperand(index)),
+              layout,
               /*isInput=*/false);
           op.setOperand(index, normalized);
         }
diff --git a/third_party/xla/xla/mlir/backends/cpu/transforms/xla_cpu_memref_element_cast_to_llvm.cc b/third_party/xla/xla/mlir/backends/cpu/transforms/xla_cpu_memref_element_cast_to_llvm.cc
index 8bedb9be524aef..0b65d4ae477c1e 100644
--- a/third_party/xla/xla/mlir/backends/cpu/transforms/xla_cpu_memref_element_cast_to_llvm.cc
+++ b/third_party/xla/xla/mlir/backends/cpu/transforms/xla_cpu_memref_element_cast_to_llvm.cc
@@ -27,6 +27,7 @@ limitations under the License.
 #include "mlir/IR/MLIRContext.h"  // from @llvm-project
 #include "mlir/IR/PatternMatch.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "xla/mlir/backends/cpu/transforms/passes.h"
 #include "xla/mlir/xla_cpu/ir/xla_cpu.h"
 
@@ -47,11 +48,11 @@ struct MemRefElementCastOpLowering
   LogicalResult matchAndRewrite(
       xla_cpu::MemRefElementCastOp cast_op, OpAdaptor adaptor,
       ConversionPatternRewriter &rewriter) const override {
-    auto target_memref_ty = cast_op.getDst().getType().cast<MemRefType>();
+    auto target_memref_ty = mlir::cast<MemRefType>(cast_op.getDst().getType());
 
     const LLVMTypeConverter &type_converter = *getTypeConverter();
-    auto target_desc_ty = type_converter.convertType(target_memref_ty)
-                              .dyn_cast_or_null<LLVM::LLVMStructType>();
+    auto target_desc_ty = mlir::dyn_cast_or_null<LLVM::LLVMStructType>(
+        type_converter.convertType(target_memref_ty));
     if (!target_desc_ty) {
       return failure();
     }
@@ -62,7 +63,7 @@ struct MemRefElementCastOpLowering
 
     SmallVector<Value> desc_fields;
     MemRefDescriptor::unpack(rewriter, loc, adaptor.getSrc(),
-                             src_type.cast<MemRefType>(), desc_fields);
+                             mlir::cast<MemRefType>(src_type), desc_fields);
 
     // Create descriptor.
     auto dst_desc = MemRefDescriptor::pack(rewriter, loc, type_converter,
diff --git a/third_party/xla/xla/mlir/backends/cpu/transforms/xla_cpu_to_cpu_runtime.cc b/third_party/xla/xla/mlir/backends/cpu/transforms/xla_cpu_to_cpu_runtime.cc
index fb3bb71548c6f9..a4582aa29ec9f3 100644
--- a/third_party/xla/xla/mlir/backends/cpu/transforms/xla_cpu_to_cpu_runtime.cc
+++ b/third_party/xla/xla/mlir/backends/cpu/transforms/xla_cpu_to_cpu_runtime.cc
@@ -30,6 +30,7 @@ limitations under the License.
 #include "mlir/IR/PatternMatch.h"  // from @llvm-project
 #include "mlir/IR/SymbolTable.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"  // from @llvm-project
 #include "xla/mlir/backends/cpu/transforms/passes.h"
 #include "xla/mlir/runtime/transforms/type_converter.h"
@@ -71,7 +72,7 @@ SmallVector<Value> EnsureFlatMemrefs(ValueRange values,
                                      ImplicitLocOpBuilder& b) {
   SmallVector<Value> out;
   for (Value value : values) {
-    auto ty = value.getType().dyn_cast<MemRefType>();
+    auto ty = mlir::dyn_cast<MemRefType>(value.getType());
     if (!ty || ty.getLayout().isIdentity()) {
       out.push_back(value);
     } else {
@@ -148,7 +149,7 @@ class AllReduceLowering : public OpRewritePattern<xla_cpu::AllReduceOp> {
 
   LogicalResult matchAndRewrite(xla_cpu::AllReduceOp op,
                                 PatternRewriter& rewriter) const override {
-    if (!op.getOperandTypes().front().isa<MemRefType>()) {
+    if (!mlir::isa<MemRefType>(op.getOperandTypes().front())) {
       return failure();
     }
 
@@ -207,7 +208,7 @@ class CollectivePermuteLowering
 
   LogicalResult matchAndRewrite(xla_cpu::CollectivePermuteOp op,
                                 PatternRewriter& rewriter) const override {
-    if (!op.getOperandTypes().front().isa<MemRefType>()) {
+    if (!mlir::isa<MemRefType>(op.getOperandTypes().front())) {
       return failure();
     }
 
@@ -274,7 +275,7 @@ class RngBitGeneratorLowering
   LogicalResult matchAndRewrite(xla_cpu::RngBitGeneratorOp op,
                                 PatternRewriter& rewriter) const override {
     auto algorithm =
-        op.getRngAlgorithmAttr().cast<mhlo::RngAlgorithmAttr>().getValue();
+        mlir::cast<mhlo::RngAlgorithmAttr>(op.getRngAlgorithmAttr()).getValue();
     op->removeAttr("rng_algorithm");
 
     CreateCallForDpsCollectiveOp(op.getOperation(), custom_calls_,
@@ -308,7 +309,7 @@ class InfeedLowering : public OpRewritePattern<xla_cpu::InfeedOp> {
 
     // For infeed with empty tuples, bufferizer does not run, thus the token is
     // left as the only operand. Remove it.
-    if (operands.back().getType().isa<mlir::mhlo::TokenType>()) {
+    if (mlir::isa<mlir::mhlo::TokenType>(operands.back().getType())) {
       assert(operands.size() == 1 && "Expect token only with empty tuples");
       operands.pop_back();
     }
diff --git a/third_party/xla/xla/mlir/framework/transforms/outline_with_xla_framework.cc b/third_party/xla/xla/mlir/framework/transforms/outline_with_xla_framework.cc
index 8efd1726ed05cf..b13299d69a6149 100644
--- a/third_party/xla/xla/mlir/framework/transforms/outline_with_xla_framework.cc
+++ b/third_party/xla/xla/mlir/framework/transforms/outline_with_xla_framework.cc
@@ -79,7 +79,7 @@ struct OutlineXLAFunc : public RewritePattern {
     if (!func) return failure();
     if (func.getSymName() != "main") return failure();
     if (llvm::any_of(op->getOperandTypes(),
-                     [](Type t) { return !t.isa<MemRefType>(); }) ||
+                     [](Type t) { return !mlir::isa<MemRefType>(t); }) ||
         op->getNumResults() != 0)
       return failure();
     if (func->hasAttr("outlined")) return failure();
diff --git a/third_party/xla/xla/mlir/framework/transforms/xla_framework_to_llvm_pass.cc b/third_party/xla/xla/mlir/framework/transforms/xla_framework_to_llvm_pass.cc
index dc609381152f67..62ae86bce849ed 100644
--- a/third_party/xla/xla/mlir/framework/transforms/xla_framework_to_llvm_pass.cc
+++ b/third_party/xla/xla/mlir/framework/transforms/xla_framework_to_llvm_pass.cc
@@ -138,11 +138,11 @@ struct BarePtrFuncOpConversion : public ConvertOpToLLVMPattern<func::FuncOp> {
           Value inner_index = rewriter.create<LLVM::ConstantOp>(
               loc, typeConverter->convertType(rewriter.getIntegerType(32)),
               rewriter.getI32IntegerAttr(static_cast<int32_t>(
-                  funcOp
-                      ->getAttrOfType<mlir::ArrayAttr>(
-                          "xla_framework.result_inner_mapping")
-                      .getValue()[current_index]
-                      .cast<mlir::IntegerAttr>()
+                  mlir::cast<mlir::IntegerAttr>(
+                      funcOp
+                          ->getAttrOfType<mlir::ArrayAttr>(
+                              "xla_framework.result_inner_mapping")
+                          .getValue()[current_index])
                       .getValue()
                       .getSExtValue())));
 
@@ -227,10 +227,11 @@ class LegalizeXLAFrameworkToLLVMPass
     target.markUnknownOpDynamicallyLegal([](Operation *) { return true; });
     target.addIllegalDialect<xla_framework::XLAFrameworkDialect>();
     target.addDynamicallyLegalOp<func::FuncOp>([](func::FuncOp op) {
-      if (llvm::any_of(
-              llvm::concat<const Type>(op.getArgumentTypes(),
-                                       op.getResultTypes()),
-              [](Type type) { return type.isa<xla_framework::BufferType>(); }))
+      if (llvm::any_of(llvm::concat<const Type>(op.getArgumentTypes(),
+                                                op.getResultTypes()),
+                       [](Type type) {
+                         return mlir::isa<xla_framework::BufferType>(type);
+                       }))
         return false;
       return true;
     });
diff --git a/third_party/xla/xla/mlir/runtime/ir/BUILD b/third_party/xla/xla/mlir/runtime/ir/BUILD
index f044bf6f4b5d94..bf05a86d524deb 100644
--- a/third_party/xla/xla/mlir/runtime/ir/BUILD
+++ b/third_party/xla/xla/mlir/runtime/ir/BUILD
@@ -107,5 +107,6 @@ cc_library(
         "@llvm-project//mlir:FuncDialect",
         "@llvm-project//mlir:IR",
         "@llvm-project//mlir:SideEffectInterfaces",
+        "@llvm-project//mlir:Support",
     ],
 )
diff --git a/third_party/xla/xla/mlir/runtime/ir/rt_dialect.cc b/third_party/xla/xla/mlir/runtime/ir/rt_dialect.cc
index 45b52b3f7f0b18..85af7d69cf46e7 100644
--- a/third_party/xla/xla/mlir/runtime/ir/rt_dialect.cc
+++ b/third_party/xla/xla/mlir/runtime/ir/rt_dialect.cc
@@ -19,6 +19,7 @@ limitations under the License.
 #include "mlir/Dialect/Func/IR/FuncOps.h"  // from @llvm-project
 #include "mlir/IR/BuiltinAttributes.h"  // from @llvm-project
 #include "mlir/IR/DialectImplementation.h"  // from @llvm-project  // IWYU pragma: keep
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "xla/mlir/runtime/ir/rt_interfaces.h"
 #include "xla/mlir/runtime/ir/rt_ops.h"
 #include "xla/runtime/constraints.h"
@@ -35,7 +36,7 @@ namespace runtime {
 static bool IsRtConstraintAttr(mlir::Attribute attr) {
   // If attribute is not defined it means that there is no constraint
   if (!attr) return true;
-  auto str = attr.dyn_cast_or_null<mlir::StringAttr>();
+  auto str = mlir::dyn_cast_or_null<mlir::StringAttr>(attr);
   absl::StatusOr<ArgumentConstraint> constraint =
       ParseArgumentConstraint(str.getValue());
   return constraint.ok();
@@ -83,7 +84,7 @@ mlir::LogicalResult RuntimeDialect::verifyOperationAttribute(
 
   // Custom call attribute can be defined only on a function declaration.
   if (attribute.getName() == "rt.custom_call") {
-    if (!(attribute.getValue().isa<mlir::StringAttr>())) {
+    if (!(mlir::isa<mlir::StringAttr>(attribute.getValue()))) {
       return op->emitOpError() << "requires " << attribute.getName()
                                << " to only accept string value";
     }
@@ -111,7 +112,7 @@ mlir::LogicalResult RuntimeDialect::verifyOperationAttribute(
 
   // Trace annotation should implement an attribute interface.
   if (attribute.getName() == "rt.trace") {
-    if (!attribute.getValue().isa<TraceAnnotationAttrInterface>()) {
+    if (!mlir::isa<TraceAnnotationAttrInterface>(attribute.getValue())) {
       return op->emitOpError() << " requires " << attribute.getName()
                                << " to be a trace annotation attribute";
     }
diff --git a/third_party/xla/xla/mlir/runtime/transforms/BUILD b/third_party/xla/xla/mlir/runtime/transforms/BUILD
index 10fd62ad03d721..7be003f0f4ccec 100644
--- a/third_party/xla/xla/mlir/runtime/transforms/BUILD
+++ b/third_party/xla/xla/mlir/runtime/transforms/BUILD
@@ -96,6 +96,7 @@ xla_cc_test(
         "//xla/mlir/runtime/ir:rt",
         "@llvm-project//mlir:IR",
         "@llvm-project//mlir:MemRefDialect",
+        "@llvm-project//mlir:Support",
         "@llvm-project//mlir:TransformUtils",
         "@local_tsl//tsl/platform:test",
         "@local_tsl//tsl/platform:test_main",
diff --git a/third_party/xla/xla/mlir/runtime/transforms/calling_convention_test.cc b/third_party/xla/xla/mlir/runtime/transforms/calling_convention_test.cc
index 6d326264d3be15..9c586951c312ae 100644
--- a/third_party/xla/xla/mlir/runtime/transforms/calling_convention_test.cc
+++ b/third_party/xla/xla/mlir/runtime/transforms/calling_convention_test.cc
@@ -20,6 +20,7 @@
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/IR/MLIRContext.h"  // from @llvm-project
 #include "mlir/IR/TypeRange.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Transforms/DialectConversion.h"  // from @llvm-project
 #include "xla/mlir/runtime/ir/rt_dialect.h"
 #include "tsl/platform/test.h"
@@ -47,8 +48,8 @@ TEST(CallingConventionTest, DefaultCallingConvention) {
   auto converted = calling_convention(signature);
 
   EXPECT_EQ(converted.getNumInputs(), 2);
-  EXPECT_TRUE(converted.getInput(0).isa<ExecutionContextType>());
-  EXPECT_TRUE(converted.getInput(1).isa<IntegerType>());
+  EXPECT_TRUE(mlir::isa<ExecutionContextType>(converted.getInput(0)));
+  EXPECT_TRUE(mlir::isa<IntegerType>(converted.getInput(1)));
 }
 
 TEST(CallingConventionTest, DefaultCallingConventionWithTypeConverter) {
@@ -68,8 +69,8 @@ TEST(CallingConventionTest, DefaultCallingConventionWithTypeConverter) {
   auto converted = calling_convention(signature);
 
   EXPECT_EQ(converted.getNumInputs(), 2);
-  EXPECT_TRUE(converted.getInput(0).isa<ExecutionContextType>());
-  EXPECT_TRUE(converted.getInput(1).isa<MemRefType>());
+  EXPECT_TRUE(mlir::isa<ExecutionContextType>(converted.getInput(0)));
+  EXPECT_TRUE(mlir::isa<MemRefType>(converted.getInput(1)));
 }
 
 TEST(CallingConventionTest, ResultsToOutsCallingConvention) {
@@ -89,8 +90,8 @@ TEST(CallingConventionTest, ResultsToOutsCallingConvention) {
   auto converted = calling_convention(signature);
 
   EXPECT_EQ(converted.getNumInputs(), 2);
-  EXPECT_TRUE(converted.getInput(0).isa<ExecutionContextType>());
-  EXPECT_TRUE(converted.getInput(1).isa<MemRefType>());
+  EXPECT_TRUE(mlir::isa<ExecutionContextType>(converted.getInput(0)));
+  EXPECT_TRUE(mlir::isa<MemRefType>(converted.getInput(1)));
 
   EXPECT_EQ(converted.getNumResults(), 0);
 }
diff --git a/third_party/xla/xla/mlir/runtime/transforms/custom_call_encoding.cc b/third_party/xla/xla/mlir/runtime/transforms/custom_call_encoding.cc
index 7a97554822b193..2bba0cceb1e8dc 100644
--- a/third_party/xla/xla/mlir/runtime/transforms/custom_call_encoding.cc
+++ b/third_party/xla/xla/mlir/runtime/transforms/custom_call_encoding.cc
@@ -193,7 +193,7 @@ static LLVM::GlobalOp EncodeDenseElementsAttribute(
     Globals &g, ImplicitLocOpBuilder &b, Attribute value,
     std::string_view symbol_base) {
   MLIRContext *ctx = b.getContext();
-  DenseIntOrFPElementsAttr dense = value.cast<DenseIntOrFPElementsAttr>();
+  DenseIntOrFPElementsAttr dense = mlir::cast<DenseIntOrFPElementsAttr>(value);
 
   Type ptr = LLVM::LLVMPointerType::get(ctx);
 
@@ -362,7 +362,7 @@ static LLVM::GlobalOp EncodeDenseArrayAttribute(Globals &g,
                                                 std::string_view symbol_base) {
   MLIRContext *ctx = b.getContext();
 
-  DenseArrayAttr base_array = value.cast<DenseArrayAttr>();
+  DenseArrayAttr base_array = mlir::cast<DenseArrayAttr>(value);
   int64_t size = base_array.size();
 
   Type ptr = LLVM::LLVMPointerType::get(ctx);
@@ -593,20 +593,20 @@ static bool IsAnyOf(unsigned width, ArrayRef<unsigned> supported) {
 }
 
 static bool IsSupportedScalarType(Type type) {
-  if (auto idx = type.dyn_cast<mlir::IndexType>()) return true;
+  if (auto idx = mlir::dyn_cast<mlir::IndexType>(type)) return true;
 
-  if (auto i = type.dyn_cast<mlir::IntegerType>())
+  if (auto i = mlir::dyn_cast<mlir::IntegerType>(type))
     return i.isUnsigned() ? IsAnyOf(i.getWidth(), {8, 16, 32, 64})
                           : IsAnyOf(i.getWidth(), {1, 8, 16, 32, 64});
 
-  if (auto fp = type.dyn_cast<mlir::FloatType>())
+  if (auto fp = mlir::dyn_cast<mlir::FloatType>(type))
     return IsAnyOf(fp.getWidth(), {16, 32, 64});
 
   return false;
 }
 
 static bool IsSupportedScalarAttribute(Attribute attr) {
-  if (auto typed = attr.dyn_cast<TypedAttr>())
+  if (auto typed = mlir::dyn_cast<TypedAttr>(attr))
     return IsSupportedScalarType(typed.getType());
   return false;
 }
@@ -637,7 +637,7 @@ static TypeID ScalarRuntimeTypeId(Type type) {
 static PrimitiveType ScalarPrimitiveType(Type type) {
   // Integer types.
   if (type.isInteger(1)) return PrimitiveType::PRED;
-  if (auto int_type = type.dyn_cast<mlir::IntegerType>()) {
+  if (auto int_type = mlir::dyn_cast<mlir::IntegerType>(type)) {
     unsigned int width = int_type.getWidth();
     if (auto primitive_type =
             int_type.isUnsigned()
@@ -662,7 +662,7 @@ static PrimitiveType ScalarPrimitiveType(Type type) {
   if (type.isBF16()) return PrimitiveType::BF16;
 
   // Complex types.
-  if (auto complex = type.dyn_cast<ComplexType>()) {
+  if (auto complex = mlir::dyn_cast<ComplexType>(type)) {
     return primitive_util::ComplexType(
         ScalarPrimitiveType(complex.getElementType()));
   }
@@ -703,7 +703,7 @@ static TypeID AsyncValueRuntimeTypeId(Type elem_type) {
     return TypeID::get<Tagged<tsl::AsyncValueRef<float>>>();
   if (elem_type.isF64())
     return TypeID::get<Tagged<tsl::AsyncValueRef<double>>>();
-  if (elem_type.isa<MemRefType>())
+  if (mlir::isa<MemRefType>(elem_type))
     return TypeID::get<Tagged<tsl::AsyncValueRef<MemrefView>>>();
 
   assert(false && "unsupported type id");
@@ -731,7 +731,7 @@ static TypeID DenseElementsRuntimeTypeId(Type elem_type) {
 LogicalResult StringAttrEncoding::Match(mlir::SymbolTable &,
                                         std::string_view name,
                                         Attribute attr) const {
-  return success(attr.isa<StringAttr>());
+  return success(mlir::isa<StringAttr>(attr));
 }
 
 FailureOr<EncodedAttr> StringAttrEncoding::Encode(mlir::SymbolTable &,
@@ -739,7 +739,7 @@ FailureOr<EncodedAttr> StringAttrEncoding::Encode(mlir::SymbolTable &,
                                                   ImplicitLocOpBuilder &b,
                                                   std::string_view name,
                                                   Attribute attr) const {
-  auto str = attr.cast<StringAttr>();
+  auto str = mlir::cast<StringAttr>(attr);
 
   Encoded encoded;
   encoded.name = EncodeString(g, b, name, kAttrName);
@@ -761,7 +761,7 @@ FailureOr<EncodedAttr> ScalarAttrEncoding::Encode(mlir::SymbolTable &,
                                                   ImplicitLocOpBuilder &b,
                                                   std::string_view name,
                                                   Attribute attr) const {
-  Type type = attr.cast<TypedAttr>().getType();
+  Type type = mlir::cast<TypedAttr>(attr).getType();
 
   Encoded encoded;
   encoded.name = EncodeString(g, b, name, kAttrName);
@@ -776,7 +776,7 @@ FailureOr<EncodedAttr> ScalarAttrEncoding::Encode(mlir::SymbolTable &,
 LogicalResult DenseElementsAttrEncoding::Match(mlir::SymbolTable &,
                                                std::string_view name,
                                                Attribute attr) const {
-  if (auto dense = attr.dyn_cast<DenseIntOrFPElementsAttr>())
+  if (auto dense = mlir::dyn_cast<DenseIntOrFPElementsAttr>(attr))
     return success(IsSupportedScalarType(dense.getElementType()));
   return failure();
 }
@@ -784,7 +784,7 @@ LogicalResult DenseElementsAttrEncoding::Match(mlir::SymbolTable &,
 FailureOr<EncodedAttr> DenseElementsAttrEncoding::Encode(
     mlir::SymbolTable &, Globals &g, ImplicitLocOpBuilder &b,
     std::string_view name, Attribute attr) const {
-  auto dense = attr.cast<DenseIntOrFPElementsAttr>();
+  auto dense = mlir::cast<DenseIntOrFPElementsAttr>(attr);
   Type elem_type = dense.getType().getElementType();
 
   Encoded encoded;
@@ -800,8 +800,8 @@ FailureOr<EncodedAttr> DenseElementsAttrEncoding::Encode(
 LogicalResult ArrayAttrEncoding::Match(mlir::SymbolTable &,
                                        std::string_view name,
                                        Attribute attr) const {
-  if (auto array = attr.dyn_cast<ArrayAttr>();
-      array && !array.empty() && array[0].isa<TypedAttr>()) {
+  if (auto array = mlir::dyn_cast<ArrayAttr>(attr);
+      array && !array.empty() && mlir::isa<TypedAttr>(array[0])) {
     return success(IsSupportedScalarAttribute(array[0]));
   }
   return failure();
@@ -812,12 +812,12 @@ FailureOr<EncodedAttr> ArrayAttrEncoding::Encode(mlir::SymbolTable &,
                                                  ImplicitLocOpBuilder &b,
                                                  std::string_view name,
                                                  Attribute attr) const {
-  ArrayAttr array = attr.dyn_cast<ArrayAttr>();
-  Type elem_type = array[0].cast<TypedAttr>().getType();
+  ArrayAttr array = mlir::dyn_cast<ArrayAttr>(attr);
+  Type elem_type = mlir::cast<TypedAttr>(array[0]).getType();
 
   // We only support array attributes with elements of same type.
   bool all_of_same_type = llvm::all_of(array, [&](Attribute attr) {
-    auto typed = attr.dyn_cast<TypedAttr>();
+    auto typed = mlir::dyn_cast<TypedAttr>(attr);
     return typed && typed.getType() == elem_type;
   });
   if (!all_of_same_type) return failure();
@@ -835,7 +835,7 @@ FailureOr<EncodedAttr> ArrayAttrEncoding::Encode(mlir::SymbolTable &,
 LogicalResult DenseArrayAttrEncoding::Match(mlir::SymbolTable &,
                                             std::string_view name,
                                             Attribute attr) const {
-  if (auto array = attr.dyn_cast<DenseArrayAttr>()) {
+  if (auto array = mlir::dyn_cast<DenseArrayAttr>(attr)) {
     return success();
   }
   return failure();
@@ -846,7 +846,7 @@ FailureOr<EncodedAttr> DenseArrayAttrEncoding::Encode(mlir::SymbolTable &,
                                                       ImplicitLocOpBuilder &b,
                                                       std::string_view name,
                                                       Attribute attr) const {
-  Type elem_type = attr.cast<DenseArrayAttr>().getElementType();
+  Type elem_type = mlir::cast<DenseArrayAttr>(attr).getElementType();
 
   Encoded encoded;
   encoded.name = EncodeString(g, b, name, kAttrName);
@@ -861,7 +861,7 @@ FailureOr<EncodedAttr> DenseArrayAttrEncoding::Encode(mlir::SymbolTable &,
 LogicalResult EmptyArrayAttrEncoding::Match(mlir::SymbolTable &,
                                             std::string_view name,
                                             Attribute attr) const {
-  if (auto array = attr.dyn_cast<ArrayAttr>(); array && array.empty()) {
+  if (auto array = mlir::dyn_cast<ArrayAttr>(attr); array && array.empty()) {
     return success();
   }
   return failure();
@@ -885,7 +885,7 @@ FailureOr<EncodedAttr> EmptyArrayAttrEncoding::Encode(mlir::SymbolTable &,
 LogicalResult SymbolRefAttrEncoding::Match(mlir::SymbolTable &sym_table,
                                            std::string_view name,
                                            Attribute attr) const {
-  if (auto ref = attr.dyn_cast<FlatSymbolRefAttr>()) {
+  if (auto ref = mlir::dyn_cast<FlatSymbolRefAttr>(attr)) {
     auto exported = sym_table.lookup<func::FuncOp>(ref.getValue());
     return success(exported && exported->hasAttr(kExportedAttrName));
   }
@@ -896,7 +896,7 @@ FailureOr<EncodedAttr> SymbolRefAttrEncoding::Encode(
     mlir::SymbolTable &sym_table, Globals &g, ImplicitLocOpBuilder &b,
     std::string_view name, Attribute attr) const {
   // Get the exported function ordinal.
-  auto ref = attr.cast<FlatSymbolRefAttr>();
+  auto ref = mlir::cast<FlatSymbolRefAttr>(attr);
   auto func = sym_table.lookup<func::FuncOp>(ref.getValue());
   auto ordinal = func->getAttrOfType<IntegerAttr>(kExportedAttrName);
   assert(ordinal.getType().isSignlessInteger(32));
@@ -917,7 +917,7 @@ FailureOr<EncodedAttr> SymbolRefAttrEncoding::Encode(
 
 LogicalResult UnitAttrEncoding::Match(mlir::SymbolTable &, std::string_view,
                                       Attribute attr) const {
-  return success(attr.isa<UnitAttr>());
+  return success(mlir::isa<UnitAttr>(attr));
 }
 
 FailureOr<EncodedAttr> UnitAttrEncoding::Encode(mlir::SymbolTable &, Globals &g,
@@ -937,7 +937,7 @@ FailureOr<EncodedAttr> UnitAttrEncoding::Encode(mlir::SymbolTable &, Globals &g,
 LogicalResult DictionaryAttrEncoding::Match(mlir::SymbolTable &,
                                             std::string_view,
                                             Attribute attr) const {
-  return success(attr.isa<DictionaryAttr>());
+  return success(mlir::isa<DictionaryAttr>(attr));
 }
 
 FailureOr<EncodedAttr> DictionaryAttrEncoding::Encode(
@@ -1068,7 +1068,7 @@ FailureOr<EncodedArg> ScalarArgEncoding::Encode(Globals &g, Allocas &a,
 //===----------------------------------------------------------------------===//
 
 static bool IsOpaqueValue(Value value) {
-  return value.getType().isa<OpaqueType>();
+  return mlir::isa<OpaqueType>(value.getType());
 }
 
 OpaqueArgEncoding::OpaqueArgEncoding()
@@ -1079,7 +1079,7 @@ OpaqueArgEncoding::OpaqueArgEncoding(std::function<bool(Value)> match,
     : match_(std::move(match)), type_id_(type_id) {}
 
 LogicalResult OpaqueArgEncoding::Match(Value value, Value converted) const {
-  if (auto ptr = converted.getType().dyn_cast<LLVM::LLVMPointerType>())
+  if (auto ptr = mlir::dyn_cast<LLVM::LLVMPointerType>(converted.getType()))
     return success(match_(value));
   return failure();
 }
@@ -1190,14 +1190,14 @@ static Value EncodeMemRef(ImplicitLocOpBuilder &b, MemRefType memref_ty,
 }
 
 LogicalResult MemrefArgEncoding::Match(Value value, Value converted) const {
-  return success(value.getType().isa<MemRefType>());
+  return success(mlir::isa<MemRefType>(value.getType()));
 }
 
 FailureOr<EncodedArg> MemrefArgEncoding::Encode(Globals &g, Allocas &a,
                                                 ImplicitLocOpBuilder &b,
                                                 Value value,
                                                 Value converted) const {
-  auto memref_type = value.getType().cast<MemRefType>();
+  auto memref_type = mlir::cast<MemRefType>(value.getType());
 
   // If memref has non-identity layout we use `StridedMemrefView` to
   // distinguish it from the default row-major memref.
@@ -1242,7 +1242,7 @@ FailureOr<Value> ScalarRetEncoding::Decode(ImplicitLocOpBuilder &b, Type type,
 
 //===----------------------------------------------------------------------===//
 
-static bool IsOpaqueType(Type type) { return type.isa<OpaqueType>(); }
+static bool IsOpaqueType(Type type) { return mlir::isa<OpaqueType>(type); }
 
 OpaqueRetEncoding::OpaqueRetEncoding()
     : OpaqueRetEncoding(IsOpaqueType, TypeID::get<Tagged<void *>>()) {}
@@ -1252,7 +1252,7 @@ OpaqueRetEncoding::OpaqueRetEncoding(std::function<bool(Type)> match,
     : match_(std::move(match)), type_id_(type_id) {}
 
 LogicalResult OpaqueRetEncoding::Match(Type type, Type converted) const {
-  if (auto ptr = converted.dyn_cast<LLVM::LLVMPointerType>())
+  if (auto ptr = mlir::dyn_cast<LLVM::LLVMPointerType>(converted))
     return success(match_(type));
   return failure();
 }
@@ -1280,15 +1280,15 @@ FailureOr<Value> OpaqueRetEncoding::Decode(ImplicitLocOpBuilder &b, Type type,
 //===----------------------------------------------------------------------===//
 
 LogicalResult MemrefRetEncoding::Match(Type type, Type converted) const {
-  return success(type.isa<MemRefType>() &&
-                 converted.isa<LLVM::LLVMStructType>());
+  return success(mlir::isa<MemRefType>(type) &&
+                 mlir::isa<LLVM::LLVMStructType>(converted));
 }
 
 FailureOr<EncodedRet> MemrefRetEncoding::Encode(Globals &g, Allocas &a,
                                                 ImplicitLocOpBuilder &b,
                                                 Type type,
                                                 Type converted) const {
-  auto memref_ty = type.cast<MemRefType>();
+  auto memref_ty = mlir::cast<MemRefType>(type);
 
   // We assume custom calls can only return row-major memrefs, may need to add
   // PermutedMemref support in the future.
@@ -1353,9 +1353,9 @@ FailureOr<Value> MemrefRetEncoding::Decode(ImplicitLocOpBuilder &b, Type type,
 //===----------------------------------------------------------------------===//
 
 LogicalResult AsyncValueRetEncoding::Match(Type type, Type converted) const {
-  return success(
-      (type.isa<async::ValueType>() || type.isa<async::TokenType>()) &&
-      converted.isa<LLVM::LLVMPointerType>());
+  return success((mlir::isa<async::ValueType>(type) ||
+                  mlir::isa<async::TokenType>(type)) &&
+                 mlir::isa<LLVM::LLVMPointerType>(converted));
 }
 
 FailureOr<EncodedRet> AsyncValueRetEncoding::Encode(Globals &g, Allocas &a,
@@ -1365,9 +1365,9 @@ FailureOr<EncodedRet> AsyncValueRetEncoding::Encode(Globals &g, Allocas &a,
   Type ptr = LLVM::LLVMPointerType::get(b.getContext());
   Value one = b.create<ConstantOp>(b.getI32IntegerAttr(1));
 
-  auto type_id = type.isa<async::ValueType>()
+  auto type_id = mlir::isa<async::ValueType>(type)
                      ? AsyncValueRuntimeTypeId(
-                           type.cast<async::ValueType>().getValueType())
+                           mlir::cast<async::ValueType>(type).getValueType())
                      : TypeID::get<Tagged<tsl::AsyncValueRef<tsl::Chain>>>();
 
   Encoded encoded;
@@ -1375,8 +1375,8 @@ FailureOr<EncodedRet> AsyncValueRetEncoding::Encode(Globals &g, Allocas &a,
 
   // for !async.value<memref> encoding its dtype, rank and dims with
   // EncodedMemRef struct; we use its data field to store async value ptr.
-  if (auto value_ty = type.dyn_cast<async::ValueType>()) {
-    if (auto memref_ty = value_ty.getValueType().dyn_cast<MemRefType>()) {
+  if (auto value_ty = mlir::dyn_cast<async::ValueType>(type)) {
+    if (auto memref_ty = mlir::dyn_cast<MemRefType>(value_ty.getValueType())) {
       encoded.value =
           PackValue(b, a, EncodeMemRef(b, memref_ty, /*descriptor=*/nullptr));
       return encoded;
@@ -1391,8 +1391,8 @@ FailureOr<EncodedRet> AsyncValueRetEncoding::Encode(Globals &g, Allocas &a,
 FailureOr<Value> AsyncValueRetEncoding::Decode(ImplicitLocOpBuilder &b,
                                                Type type, Type converted,
                                                LLVM::AllocaOp alloca) const {
-  if (auto value_ty = type.dyn_cast<async::ValueType>()) {
-    if (auto memref_ty = value_ty.getValueType().dyn_cast<MemRefType>()) {
+  if (auto value_ty = mlir::dyn_cast<async::ValueType>(type)) {
+    if (auto memref_ty = mlir::dyn_cast<MemRefType>(value_ty.getValueType())) {
       // TODO(ezhulenev): Add support for returning dynamically shaped memref.
       if (!memref_ty.hasStaticShape()) return failure();
 
diff --git a/third_party/xla/xla/mlir/runtime/transforms/custom_call_encoding.h b/third_party/xla/xla/mlir/runtime/transforms/custom_call_encoding.h
index ea9fac26865ed5..7f1674d7542cf3 100644
--- a/third_party/xla/xla/mlir/runtime/transforms/custom_call_encoding.h
+++ b/third_party/xla/xla/mlir/runtime/transforms/custom_call_encoding.h
@@ -41,6 +41,7 @@ limitations under the License.
 #include "mlir/IR/SymbolTable.h"  // from @llvm-project
 #include "mlir/IR/Types.h"  // from @llvm-project
 #include "mlir/IR/Value.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Support/TypeID.h"  // from @llvm-project
 #include "xla/runtime/custom_call.h"
@@ -619,7 +620,7 @@ struct AggregateAttrEncoding : public CustomCallAttrEncoding {
 
   mlir::LogicalResult Match(mlir::SymbolTable &, std::string_view,
                             mlir::Attribute attr) const final {
-    return mlir::success(attr.isa<AttrType>());
+    return mlir::success(mlir::isa<AttrType>(attr));
   }
 
   mlir::FailureOr<Encoded> Encode(mlir::SymbolTable &sym_table, Globals &g,
@@ -629,7 +630,7 @@ struct AggregateAttrEncoding : public CustomCallAttrEncoding {
     // Extract aggregate attributes from the user-defined attributes.
     llvm::SmallVector<mlir::NamedAttribute> attrs;
     for (auto &bind : attrdef.bindings)
-      attrs.emplace_back(bind(attr.cast<AttrType>(), b));
+      attrs.emplace_back(bind(mlir::cast<AttrType>(attr), b));
 
     // Encode extracted attributes as an aggregate.
     auto type_id = TypeID::get<Tagged<RuntimeType>>();
diff --git a/third_party/xla/xla/mlir/runtime/transforms/rt_to_llvm.cc b/third_party/xla/xla/mlir/runtime/transforms/rt_to_llvm.cc
index 8af1cfda92803d..2f285e97698630 100644
--- a/third_party/xla/xla/mlir/runtime/transforms/rt_to_llvm.cc
+++ b/third_party/xla/xla/mlir/runtime/transforms/rt_to_llvm.cc
@@ -706,7 +706,7 @@ void ConvertRuntimeToLLVMPass::runOnOperation() {
 
   // Convert all async types to opaque pointers.
   llvm_converter.addConversion([&](Type type) -> std::optional<Type> {
-    if (type.isa<async::TokenType, async::GroupType, async::ValueType>())
+    if (mlir::isa<async::TokenType, async::GroupType, async::ValueType>(type))
       return LLVM::LLVMPointerType::get(ctx);
     return std::nullopt;
   });
diff --git a/third_party/xla/xla/mlir/runtime/transforms/specialization.cc b/third_party/xla/xla/mlir/runtime/transforms/specialization.cc
index 3109917e6fb2e1..fc96a2c1584a4e 100644
--- a/third_party/xla/xla/mlir/runtime/transforms/specialization.cc
+++ b/third_party/xla/xla/mlir/runtime/transforms/specialization.cc
@@ -40,6 +40,7 @@ limitations under the License.
 #include "mlir/IR/Value.h"  // from @llvm-project
 #include "mlir/Interfaces/FunctionInterfaces.h"  // from @llvm-project
 #include "mlir/Support/DebugStringHelper.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "xla/mlir/runtime/transforms/type_converter.h"
 #include "xla/mlir/runtime/utils/constraints.h"
 #include "xla/runtime/arguments.h"
@@ -102,19 +103,19 @@ static StatusOr<mlir::Type> SpecializeOperandType(
   // Replace all symbolic dimensions with dynamic dimension.
   auto shape = SymbolicShapesResolver::Normalize(symbolic_shape);
 
-  if (auto memref = type.dyn_cast<mlir::MemRefType>()) {
+  if (auto memref = mlir::dyn_cast<mlir::MemRefType>(type)) {
     if (auto st = VerifyMemrefOperand(index, memref, *memref_arg); !st.ok())
       return st;
     return mlir::MemRefType::get(shape, memref.getElementType());
   }
 
-  if (auto tensor = type.dyn_cast<mlir::RankedTensorType>()) {
+  if (auto tensor = mlir::dyn_cast<mlir::RankedTensorType>(type)) {
     if (auto st = VerifyMemrefOperand(index, tensor, *memref_arg); !st.ok())
       return st;
     return mlir::RankedTensorType::get(shape, tensor.getElementType());
   }
 
-  if (auto tensor = type.dyn_cast<mlir::UnrankedTensorType>()) {
+  if (auto tensor = mlir::dyn_cast<mlir::UnrankedTensorType>(type)) {
     if (auto st = VerifyMemrefOperand(index, tensor, *memref_arg); !st.ok())
       return st;
     return mlir::RankedTensorType::get(shape, tensor.getElementType());
@@ -236,7 +237,7 @@ Status SpecializeFunction(mlir::FunctionOpInterface func,
     // We only support sinking of Tensor arguments into the function body.
     mlir::Type input =
         llvm::cast<mlir::FunctionType>(func.getFunctionType()).getInput(i);
-    mlir::TensorType tensor = input.dyn_cast<mlir::TensorType>();
+    mlir::TensorType tensor = mlir::dyn_cast<mlir::TensorType>(input);
     if (!tensor || !SupportsValueSpecialization(tensor)) {
       return InvalidArgumentError(StrCat(
           "non-sinkable operand was marked for sinking: ", debugString(input)));
diff --git a/third_party/xla/xla/mlir/runtime/transforms/type_converter.cc b/third_party/xla/xla/mlir/runtime/transforms/type_converter.cc
index 0c0303bdf864c2..1d30f300f33397 100644
--- a/third_party/xla/xla/mlir/runtime/transforms/type_converter.cc
+++ b/third_party/xla/xla/mlir/runtime/transforms/type_converter.cc
@@ -30,6 +30,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/IR/Types.h"  // from @llvm-project
 #include "mlir/Support/DebugStringHelper.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "xla/mlir/runtime/ir/rt_dialect.h"
 #include "xla/primitive_util.h"
 #include "xla/runtime/types.h"
@@ -47,60 +48,60 @@ using absl::StrFormat;
 static std::unique_ptr<Type> ConvertCanonicalType(
     mlir::Type type, const TypeConverter& convert) {
   // ExecutionContextType -> ExecutionContextOperandType (both in xla::runtime).
-  if (auto ctx = type.dyn_cast<ExecutionContextType>())
+  if (auto ctx = mlir::dyn_cast<ExecutionContextType>(type))
     return std::make_unique<ExecutionContextOperandType>();
 
   // OpaqueType -> OpaqueOperandType (both in xla::runtime).
-  if (auto ctx = type.dyn_cast<OpaqueType>())
+  if (auto ctx = mlir::dyn_cast<OpaqueType>(type))
     return std::make_unique<OpaqueOperandType>();
 
   // mlir::async::TokenType -> xla::runtime::AsyncTokenType
-  if (type.isa<mlir::async::TokenType>())
+  if (mlir::isa<mlir::async::TokenType>(type))
     return std::make_unique<AsyncTokenType>();
 
   // mlir::async::ValueType -> xla::runtime::AsyncValueType
-  if (auto value = type.dyn_cast<mlir::async::ValueType>()) {
+  if (auto value = mlir::dyn_cast<mlir::async::ValueType>(type)) {
     if (auto value_type = convert.Convert(value.getValueType());
         value_type.ok())
       return std::make_unique<AsyncValueType>(std::move(*value_type));
   }
 
   // mlir::{IndexType, IntegerType, FloatType} -> xla::runtime::ScalarType
-  if (type.isa<mlir::IndexType, mlir::IntegerType, mlir::FloatType>()) {
+  if (mlir::isa<mlir::IndexType, mlir::IntegerType, mlir::FloatType>(type)) {
     if (auto dtype = TypeConverter::ConvertElementType(type); dtype.ok())
       return std::make_unique<ScalarType>(*dtype);
   }
 
   // mlir::RankedTensorType -> xla::runtime::RankedTensorType
-  if (auto tensor = type.dyn_cast<mlir::RankedTensorType>()) {
+  if (auto tensor = mlir::dyn_cast<mlir::RankedTensorType>(type)) {
     if (auto dtype = TypeConverter::ConvertElementType(tensor.getElementType());
         dtype.ok())
       return std::make_unique<RankedTensorType>(tensor.getShape(), *dtype);
   }
 
   // mlir::UnrankedTensorType -> xla::runtime::UnrankedTensorType
-  if (auto tensor = type.dyn_cast<mlir::UnrankedTensorType>()) {
+  if (auto tensor = mlir::dyn_cast<mlir::UnrankedTensorType>(type)) {
     if (auto dtype = TypeConverter::ConvertElementType(tensor.getElementType());
         dtype.ok())
       return std::make_unique<UnrankedTensorType>(*dtype);
   }
 
   // mlir::MemrefType -> xla::runtime::MemrefType
-  if (auto memref = type.dyn_cast<mlir::MemRefType>()) {
+  if (auto memref = mlir::dyn_cast<mlir::MemRefType>(type)) {
     if (auto dtype = TypeConverter::ConvertElementType(memref.getElementType());
         dtype.ok())
       return std::make_unique<MemrefType>(memref.getShape(), *dtype);
   }
 
   // mlir::UnrankedMemrefType -> xla::runtime::UnrankedMemrefType
-  if (auto memref = type.dyn_cast<mlir::UnrankedMemRefType>()) {
+  if (auto memref = mlir::dyn_cast<mlir::UnrankedMemRefType>(type)) {
     if (auto dtype = TypeConverter::ConvertElementType(memref.getElementType());
         dtype.ok())
       return std::make_unique<UnrankedMemrefType>(*dtype);
   }
 
   // mlir::TupleType -> xla::runtime::TupleType
-  if (auto tuple = type.dyn_cast<mlir::TupleType>()) {
+  if (auto tuple = mlir::dyn_cast<mlir::TupleType>(type)) {
     llvm::SmallVector<std::unique_ptr<Type>> conv_elems;
     llvm::transform(tuple, std::back_inserter(conv_elems),
                     [&convert](mlir::Type type) {
@@ -126,7 +127,7 @@ static std::unique_ptr<Type> ConvertCanonicalType(
   if (type.isF32()) return PrimitiveType::F32;
   if (type.isF64()) return PrimitiveType::F64;
   if (type.isInteger(1)) return PrimitiveType::PRED;
-  if (auto int_type = type.dyn_cast<mlir::IntegerType>()) {
+  if (auto int_type = mlir::dyn_cast<mlir::IntegerType>(type)) {
     unsigned int width = int_type.getWidth();
     if (auto primitive_type =
             int_type.isUnsigned()
@@ -136,7 +137,7 @@ static std::unique_ptr<Type> ConvertCanonicalType(
       return primitive_type;
     }
   }
-  if (auto complex_type = type.dyn_cast<mlir::ComplexType>()) {
+  if (auto complex_type = mlir::dyn_cast<mlir::ComplexType>(type)) {
     auto element_type = complex_type.getElementType();
     TF_ASSIGN_OR_RETURN(auto element_primitive_type,
                         ConvertElementType(element_type));
diff --git a/third_party/xla/xla/mlir/runtime/utils/constraints.cc b/third_party/xla/xla/mlir/runtime/utils/constraints.cc
index da0023ea62b4de..907225b813adaf 100644
--- a/third_party/xla/xla/mlir/runtime/utils/constraints.cc
+++ b/third_party/xla/xla/mlir/runtime/utils/constraints.cc
@@ -29,6 +29,7 @@ limitations under the License.
 #include "mlir/IR/Types.h"  // from @llvm-project
 #include "mlir/Interfaces/FunctionInterfaces.h"  // from @llvm-project
 #include "mlir/Support/DebugStringHelper.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "xla/runtime/constraints.h"
 
 namespace xla {
@@ -52,7 +53,7 @@ StatusOr<SmallVector<ArgumentConstraint>> GetArgumentsConstraints(
     if (!attr) return ArgumentConstraint::kResolved;
 
     // Otherwise try to parse constraint from the string attribute.
-    auto str = attr.dyn_cast_or_null<StringAttr>();
+    auto str = mlir::dyn_cast_or_null<StringAttr>(attr);
     if (!str)
       return InvalidArgumentError(
           StrCat("unexpected ", kArgumentConstraintAttrName, " attribute"));
@@ -81,7 +82,7 @@ StatusOr<ArgumentConstraint> ResolveArgumentConstraint(
   if (constraint == ArgumentConstraint::kResolved) return constraint;
 
   // Operand must be a shaped type: memref or tensor.
-  auto shaped = type.dyn_cast<ShapedType>();
+  auto shaped = mlir::dyn_cast<ShapedType>(type);
   if (!shaped)
     return InvalidArgumentError(
         StrCat("unsupported operand type: ", debugString(type)));
diff --git a/third_party/xla/xla/mlir/runtime/utils/constraints.h b/third_party/xla/xla/mlir/runtime/utils/constraints.h
index f88c3f267e0d38..29ea88c5145791 100644
--- a/third_party/xla/xla/mlir/runtime/utils/constraints.h
+++ b/third_party/xla/xla/mlir/runtime/utils/constraints.h
@@ -21,6 +21,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/IR/Types.h"  // from @llvm-project
 #include "mlir/Interfaces/FunctionInterfaces.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "xla/runtime/constraints.h"
 
 namespace xla {
@@ -39,7 +40,7 @@ absl::StatusOr<ArgumentConstraint> ResolveArgumentConstraint(
 inline bool SupportsValueSpecialization(mlir::Type type) {
   // TODO(ezhulenev): Add support for sinking `memref` values once the value
   // specialization will support it.
-  mlir::TensorType tensor = type.dyn_cast<mlir::TensorType>();
+  mlir::TensorType tensor = mlir::dyn_cast<mlir::TensorType>(type);
   return tensor && (tensor.getRank() == 0 || tensor.getRank() == 1) &&
          (tensor.getElementType().isInteger(32) ||
           tensor.getElementType().isInteger(64));
diff --git a/third_party/xla/xla/mlir/utils/BUILD b/third_party/xla/xla/mlir/utils/BUILD
index 9652b2fbf3dbb0..4267e525a8aaf1 100644
--- a/third_party/xla/xla/mlir/utils/BUILD
+++ b/third_party/xla/xla/mlir/utils/BUILD
@@ -51,6 +51,7 @@ cc_library(
         "//xla:xla_data_proto_cc",
         "@com_google_absl//absl/status:statusor",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
         "@local_tsl//tsl/platform:statusor",
     ],
 )
diff --git a/third_party/xla/xla/mlir/utils/type_util.cc b/third_party/xla/xla/mlir/utils/type_util.cc
index 873d9609083270..29072d09f79174 100644
--- a/third_party/xla/xla/mlir/utils/type_util.cc
+++ b/third_party/xla/xla/mlir/utils/type_util.cc
@@ -19,6 +19,7 @@ limitations under the License.
 #include "mlir/IR/Builders.h"  // from @llvm-project
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/IR/Types.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "xla/primitive_util.h"
 #include "xla/util.h"
 #include "xla/xla_data.pb.h"
@@ -91,11 +92,11 @@ xla::PrimitiveType ConvertMlirTypeToPrimitiveType(mlir::Type type) {
     return xla::PrimitiveType::F32;
   } else if (type.isF64()) {
     return xla::PrimitiveType::F64;
-  } else if (auto complex_type = type.dyn_cast<mlir::ComplexType>()) {
+  } else if (auto complex_type = mlir::dyn_cast<mlir::ComplexType>(type)) {
     mlir::Type element_ty = complex_type.getElementType();
     return xla::primitive_util::ComplexType(
         ConvertMlirTypeToPrimitiveType(element_ty));
-  } else if (auto integer_type = type.dyn_cast<mlir::IntegerType>()) {
+  } else if (auto integer_type = mlir::dyn_cast<mlir::IntegerType>(type)) {
     bool is_unsigned = integer_type.isUnsigned();
     if (integer_type.getWidth() == 1) {
       return xla::PrimitiveType::PRED;
diff --git a/third_party/xla/xla/mlir/xla_cpu/ir/BUILD b/third_party/xla/xla/mlir/xla_cpu/ir/BUILD
index b5933c23b96da4..776416c54ed095 100644
--- a/third_party/xla/xla/mlir/xla_cpu/ir/BUILD
+++ b/third_party/xla/xla/mlir/xla_cpu/ir/BUILD
@@ -107,5 +107,6 @@ cc_library(
         "@llvm-project//mlir:BufferizationInterfaces",
         "@llvm-project//mlir:IR",
         "@llvm-project//mlir:InferTypeOpInterface",
+        "@llvm-project//mlir:Support",
     ],
 )
diff --git a/third_party/xla/xla/mlir/xla_cpu/ir/xla_cpu.cc b/third_party/xla/xla/mlir/xla_cpu/ir/xla_cpu.cc
index 3e977dc7f2e7cc..49e13054573b81 100644
--- a/third_party/xla/xla/mlir/xla_cpu/ir/xla_cpu.cc
+++ b/third_party/xla/xla/mlir/xla_cpu/ir/xla_cpu.cc
@@ -25,6 +25,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/IR/PatternMatch.h"  // from @llvm-project
 #include "mlir/IR/TypeUtilities.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "xla/mlir/xla_cpu/ir/xla_cpu_dialect.cc.inc"
 #include "xla/mlir/xla_cpu/ir/xla_cpu_enums.cc.inc"
 #include "xla/mlir_hlo/mhlo/IR/hlo_ops.h"
@@ -48,13 +49,13 @@ template <typename Op>
 LogicalResult BufferizeOp(Op op, RewriterBase &rewriter,
                           const bufferization::BufferizationOptions &options,
                           int64_t num_inputs) {
-  if (op.getOperands().front().getType().template isa<MemRefType>()) {
+  if (mlir::isa<MemRefType>(op.getOperands().front().getType())) {
     return success();
   }
   SmallVector<Value> new_operands;
   std::optional<Value> token = std::nullopt;
   for (auto operand : op.getOperands()) {
-    if (operand.getType().template isa<TokenType>()) {
+    if (mlir::isa<TokenType>(operand.getType())) {
       assert(operand == op.getOperands().back() &&
              "Expect token type only for last operand");
       assert(!token && "Expect at most only one token-typed operand");
@@ -156,8 +157,8 @@ LogicalResult AddDependencyOp::bufferize(
 }
 
 LogicalResult MemRefElementCastOp::verify() {
-  auto src_memref_ty = getSrc().getType().cast<MemRefType>();
-  auto dst_memref_ty = getDst().getType().cast<MemRefType>();
+  auto src_memref_ty = mlir::cast<MemRefType>(getSrc().getType());
+  auto dst_memref_ty = mlir::cast<MemRefType>(getDst().getType());
   if (src_memref_ty.getShape() != dst_memref_ty.getShape()) {
     return emitOpError() << "expects matching shapes";
   }
diff --git a/third_party/xla/xla/mlir_hlo/BUILD b/third_party/xla/xla/mlir_hlo/BUILD
index 761446ff70f3e1..14dd88206dd29b 100644
--- a/third_party/xla/xla/mlir_hlo/BUILD
+++ b/third_party/xla/xla/mlir_hlo/BUILD
@@ -262,6 +262,7 @@ cc_library(
     deps = [
         "@llvm-project//llvm:Support",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
     ],
 )
 
@@ -404,6 +405,7 @@ cc_library(
     deps = [
         "@llvm-project//llvm:Support",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
     ],
 )
 
@@ -492,6 +494,7 @@ cc_library(
         "@llvm-project//mlir:LoopLikeInterface",
         "@llvm-project//mlir:MemRefDialect",
         "@llvm-project//mlir:SideEffectInterfaces",
+        "@llvm-project//mlir:Support",
         "@llvm-project//mlir:ViewLikeInterface",
         "@stablehlo//:stablehlo_type_inference",
     ],
@@ -641,6 +644,7 @@ cc_library(
         "@llvm-project//mlir:FuncDialect",
         "@llvm-project//mlir:FuncTransforms",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
         "@llvm-project//mlir:TensorDialect",
         "@llvm-project//mlir:TransformUtils",
         "@llvm-project//mlir:Transforms",
@@ -670,6 +674,7 @@ cc_library(
         "@llvm-project//mlir:IR",
         "@llvm-project//mlir:MathDialect",
         "@llvm-project//mlir:SCFDialect",
+        "@llvm-project//mlir:Support",
     ],
 )
 
@@ -764,6 +769,7 @@ cc_library(
         "@llvm-project//mlir:LLVMDialect",
         "@llvm-project//mlir:MemRefDialect",
         "@llvm-project//mlir:Pass",
+        "@llvm-project//mlir:Support",
     ],
 )
 
@@ -829,6 +835,7 @@ cc_library(
     deps = [
         ":mlir_hlo",
         "@llvm-project//mlir:DialectUtils",
+        "@llvm-project//mlir:Support",
         "@llvm-project//mlir:TensorDialect",
     ],
 )
@@ -883,6 +890,7 @@ cc_library(
         "@llvm-project//mlir:FuncDialect",
         "@llvm-project//mlir:IR",
         "@llvm-project//mlir:ShapeDialect",
+        "@llvm-project//mlir:Support",
         "@llvm-project//mlir:TensorDialect",
         "@llvm-project//mlir:TransformUtils",
         "@llvm-project//mlir:Transforms",
@@ -1209,6 +1217,7 @@ cc_library(
         ":all_passes",
         ":mlir_hlo",
         "@llvm-project//mlir:CAPIIR",
+        "@llvm-project//mlir:Support",
     ],
 )
 
@@ -1230,6 +1239,7 @@ cc_library(
         ":all_passes",
         ":mlir_hlo",
         "@llvm-project//mlir:CAPIIRObjects",
+        "@llvm-project//mlir:Support",
     ],
     alwayslink = True,
 )
diff --git a/third_party/xla/xla/mlir_hlo/bindings/c/Attributes.cc b/third_party/xla/xla/mlir_hlo/bindings/c/Attributes.cc
index d5183742094a3e..e5c3f4500efbb4 100644
--- a/third_party/xla/xla/mlir_hlo/bindings/c/Attributes.cc
+++ b/third_party/xla/xla/mlir_hlo/bindings/c/Attributes.cc
@@ -17,6 +17,7 @@ limitations under the License.
 #include "mhlo/IR/hlo_ops.h"
 #include "mlir/CAPI/IR.h"
 #include "mlir/CAPI/Support.h"
+#include "mlir/Support/LLVM.h"
 
 //
 // ScatterDimensionNumbersAttr.
@@ -35,57 +36,50 @@ MlirAttribute mlirMhloScatterDimensionNumbersGet(
 }
 
 bool mlirMhloAttributeIsAScatterDimensionNumbers(MlirAttribute attr) {
-  return unwrap(attr).isa<mlir::mhlo::ScatterDimensionNumbersAttr>();
+  return mlir::isa<mlir::mhlo::ScatterDimensionNumbersAttr>(unwrap(attr));
 }
 
 intptr_t mlirMhloScatterDimensionNumbersGetUpdateWindowDimsSize(
     MlirAttribute attr) {
-  return unwrap(attr)
-      .cast<mlir::mhlo::ScatterDimensionNumbersAttr>()
+  return mlir::cast<mlir::mhlo::ScatterDimensionNumbersAttr>(unwrap(attr))
       .getUpdateWindowDims()
       .size();
 }
 
 int64_t mlirMhloScatterDimensionNumbersGetUpdateWindowDimsElem(
     MlirAttribute attr, intptr_t pos) {
-  return unwrap(attr)
-      .cast<mlir::mhlo::ScatterDimensionNumbersAttr>()
+  return mlir::cast<mlir::mhlo::ScatterDimensionNumbersAttr>(unwrap(attr))
       .getUpdateWindowDims()[pos];
 }
 
 intptr_t mlirMhloScatterDimensionNumbersGetInsertedWindowDimsSize(
     MlirAttribute attr) {
-  return unwrap(attr)
-      .cast<mlir::mhlo::ScatterDimensionNumbersAttr>()
+  return mlir::cast<mlir::mhlo::ScatterDimensionNumbersAttr>(unwrap(attr))
       .getInsertedWindowDims()
       .size();
 }
 
 int64_t mlirMhloScatterDimensionNumbersGetInsertedWindowDimsElem(
     MlirAttribute attr, intptr_t pos) {
-  return unwrap(attr)
-      .cast<mlir::mhlo::ScatterDimensionNumbersAttr>()
+  return mlir::cast<mlir::mhlo::ScatterDimensionNumbersAttr>(unwrap(attr))
       .getInsertedWindowDims()[pos];
 }
 
 intptr_t mlirMhloScatterDimensionNumbersGetScatteredDimsToOperandDimsSize(
     MlirAttribute attr) {
-  return unwrap(attr)
-      .cast<mlir::mhlo::ScatterDimensionNumbersAttr>()
+  return mlir::cast<mlir::mhlo::ScatterDimensionNumbersAttr>(unwrap(attr))
       .getScatterDimsToOperandDims()
       .size();
 }
 
 int64_t mlirMhloScatterDimensionNumbersGetScatteredDimsToOperandDimsElem(
     MlirAttribute attr, intptr_t pos) {
-  return unwrap(attr)
-      .cast<mlir::mhlo::ScatterDimensionNumbersAttr>()
+  return mlir::cast<mlir::mhlo::ScatterDimensionNumbersAttr>(unwrap(attr))
       .getScatterDimsToOperandDims()[pos];
 }
 
 int64_t mlirMhloDimensionNumbersGetIndexVectorDim(MlirAttribute attr) {
-  return unwrap(attr)
-      .cast<mlir::mhlo::ScatterDimensionNumbersAttr>()
+  return mlir::cast<mlir::mhlo::ScatterDimensionNumbersAttr>(unwrap(attr))
       .getIndexVectorDim();
 }
 
@@ -105,56 +99,49 @@ MlirAttribute mlirMhloGatherDimensionNumbersGet(
 }
 
 bool mlirMhloAttributeIsAGatherDimensionNumbers(MlirAttribute attr) {
-  return unwrap(attr).isa<mlir::mhlo::GatherDimensionNumbersAttr>();
+  return mlir::isa<mlir::mhlo::GatherDimensionNumbersAttr>(unwrap(attr));
 }
 
 intptr_t mlirMhloGatherDimensionNumbersGetOffsetDimsSize(MlirAttribute attr) {
-  return unwrap(attr)
-      .cast<mlir::mhlo::GatherDimensionNumbersAttr>()
+  return mlir::cast<mlir::mhlo::GatherDimensionNumbersAttr>(unwrap(attr))
       .getOffsetDims()
       .size();
 }
 
 int64_t mlirMhloGatherDimensionNumbersGetOffsetDimsElem(MlirAttribute attr,
                                                         intptr_t pos) {
-  return unwrap(attr)
-      .cast<mlir::mhlo::GatherDimensionNumbersAttr>()
+  return mlir::cast<mlir::mhlo::GatherDimensionNumbersAttr>(unwrap(attr))
       .getOffsetDims()[pos];
 }
 
 intptr_t mlirMhloGatherDimensionNumbersGetCollapsedSliceDimsSize(
     MlirAttribute attr) {
-  return unwrap(attr)
-      .cast<mlir::mhlo::GatherDimensionNumbersAttr>()
+  return mlir::cast<mlir::mhlo::GatherDimensionNumbersAttr>(unwrap(attr))
       .getCollapsedSliceDims()
       .size();
 }
 
 int64_t mlirMhloGatherDimensionNumbersGetCollapsedSliceDimsElem(
     MlirAttribute attr, intptr_t pos) {
-  return unwrap(attr)
-      .cast<mlir::mhlo::GatherDimensionNumbersAttr>()
+  return mlir::cast<mlir::mhlo::GatherDimensionNumbersAttr>(unwrap(attr))
       .getCollapsedSliceDims()[pos];
 }
 
 intptr_t mlirMhloGatherDimensionNumbersGetStartIndexMapSize(
     MlirAttribute attr) {
-  return unwrap(attr)
-      .cast<mlir::mhlo::GatherDimensionNumbersAttr>()
+  return mlir::cast<mlir::mhlo::GatherDimensionNumbersAttr>(unwrap(attr))
       .getStartIndexMap()
       .size();
 }
 
 int64_t mlirMhloGatherDimensionNumbersGetStartIndexMapElem(MlirAttribute attr,
                                                            intptr_t pos) {
-  return unwrap(attr)
-      .cast<mlir::mhlo::GatherDimensionNumbersAttr>()
+  return mlir::cast<mlir::mhlo::GatherDimensionNumbersAttr>(unwrap(attr))
       .getStartIndexMap()[pos];
 }
 
 int64_t mlirMhloGatherDimensionNumbersGetIndexVectorDim(MlirAttribute attr) {
-  return unwrap(attr)
-      .cast<mlir::mhlo::GatherDimensionNumbersAttr>()
+  return mlir::cast<mlir::mhlo::GatherDimensionNumbersAttr>(unwrap(attr))
       .getIndexVectorDim();
 }
 
@@ -177,66 +164,58 @@ MlirAttribute mlirMhloDotDimensionNumbersGet(
 }
 
 bool mlirMhloAttributeIsADotDimensionNumbers(MlirAttribute attr) {
-  return unwrap(attr).isa<mlir::mhlo::DotDimensionNumbersAttr>();
+  return mlir::isa<mlir::mhlo::DotDimensionNumbersAttr>(unwrap(attr));
 }
 
 intptr_t mlirMhloDotDimensionNumbersGetLhsBatchingDimensionsSize(
     MlirAttribute attr) {
-  return unwrap(attr)
-      .cast<mlir::mhlo::DotDimensionNumbersAttr>()
+  return mlir::cast<mlir::mhlo::DotDimensionNumbersAttr>(unwrap(attr))
       .getLhsBatchingDimensions()
       .size();
 }
 
 int64_t mlirMhloDotDimensionNumbersGetLhsBatchingDimensionsElem(
     MlirAttribute attr, intptr_t pos) {
-  return unwrap(attr)
-      .cast<mlir::mhlo::DotDimensionNumbersAttr>()
+  return mlir::cast<mlir::mhlo::DotDimensionNumbersAttr>(unwrap(attr))
       .getLhsBatchingDimensions()[pos];
 }
 
 intptr_t mlirMhloDotDimensionNumbersGetRhsBatchingDimensionsSize(
     MlirAttribute attr) {
-  return unwrap(attr)
-      .cast<mlir::mhlo::DotDimensionNumbersAttr>()
+  return mlir::cast<mlir::mhlo::DotDimensionNumbersAttr>(unwrap(attr))
       .getRhsBatchingDimensions()
       .size();
 }
 
 int64_t mlirMhloDotDimensionNumbersGetRhsBatchingDimensionsElem(
     MlirAttribute attr, intptr_t pos) {
-  return unwrap(attr)
-      .cast<mlir::mhlo::DotDimensionNumbersAttr>()
+  return mlir::cast<mlir::mhlo::DotDimensionNumbersAttr>(unwrap(attr))
       .getRhsBatchingDimensions()[pos];
 }
 
 intptr_t mlirMhloDotDimensionNumbersGetLhsContractingDimensionsSize(
     MlirAttribute attr) {
-  return unwrap(attr)
-      .cast<mlir::mhlo::DotDimensionNumbersAttr>()
+  return mlir::cast<mlir::mhlo::DotDimensionNumbersAttr>(unwrap(attr))
       .getLhsContractingDimensions()
       .size();
 }
 
 int64_t mlirMhloDotDimensionNumbersGetLhsContractingDimensionsElem(
     MlirAttribute attr, intptr_t pos) {
-  return unwrap(attr)
-      .cast<mlir::mhlo::DotDimensionNumbersAttr>()
+  return mlir::cast<mlir::mhlo::DotDimensionNumbersAttr>(unwrap(attr))
       .getLhsContractingDimensions()[pos];
 }
 
 intptr_t mlirMhloDotDimensionNumbersGetRhsContractingDimensionsSize(
     MlirAttribute attr) {
-  return unwrap(attr)
-      .cast<mlir::mhlo::DotDimensionNumbersAttr>()
+  return mlir::cast<mlir::mhlo::DotDimensionNumbersAttr>(unwrap(attr))
       .getRhsContractingDimensions()
       .size();
 }
 
 int64_t mlirMhloDotDimensionNumbersGetRhsContractingDimensionsElem(
     MlirAttribute attr, intptr_t pos) {
-  return unwrap(attr)
-      .cast<mlir::mhlo::DotDimensionNumbersAttr>()
+  return mlir::cast<mlir::mhlo::DotDimensionNumbersAttr>(unwrap(attr))
       .getRhsContractingDimensions()[pos];
 }
 
@@ -261,92 +240,80 @@ MlirAttribute mlirMhloConvDimensionNumbersGet(
 }
 
 bool mlirMhloAttributeIsAConvDimensionNumbers(MlirAttribute attr) {
-  return unwrap(attr).isa<mlir::mhlo::ConvDimensionNumbersAttr>();
+  return mlir::isa<mlir::mhlo::ConvDimensionNumbersAttr>(unwrap(attr));
 }
 
 int64_t mlirMhloConvDimensionNumbersGetInputBatchDimension(MlirAttribute attr) {
-  return unwrap(attr)
-      .cast<mlir::mhlo::ConvDimensionNumbersAttr>()
+  return mlir::cast<mlir::mhlo::ConvDimensionNumbersAttr>(unwrap(attr))
       .getInputBatchDimension();
 }
 
 int64_t mlirMhloConvDimensionNumbersGetInputFeatureDimension(
     MlirAttribute attr) {
-  return unwrap(attr)
-      .cast<mlir::mhlo::ConvDimensionNumbersAttr>()
+  return mlir::cast<mlir::mhlo::ConvDimensionNumbersAttr>(unwrap(attr))
       .getInputFeatureDimension();
 }
 
 intptr_t mlirMhloConvDimensionNumbersGetInputSpatialDimensionsSize(
     MlirAttribute attr) {
-  return unwrap(attr)
-      .cast<mlir::mhlo::ConvDimensionNumbersAttr>()
+  return mlir::cast<mlir::mhlo::ConvDimensionNumbersAttr>(unwrap(attr))
       .getInputSpatialDimensions()
       .size();
 }
 
 int64_t mlirMhloConvDimensionNumbersGetInputSpatialDimensionsElem(
     MlirAttribute attr, intptr_t pos) {
-  return unwrap(attr)
-      .cast<mlir::mhlo::ConvDimensionNumbersAttr>()
+  return mlir::cast<mlir::mhlo::ConvDimensionNumbersAttr>(unwrap(attr))
       .getInputSpatialDimensions()[pos];
 }
 
 int64_t mlirMhloConvDimensionNumbersGetKernelInputFeatureDimension(
     MlirAttribute attr) {
-  return unwrap(attr)
-      .cast<mlir::mhlo::ConvDimensionNumbersAttr>()
+  return mlir::cast<mlir::mhlo::ConvDimensionNumbersAttr>(unwrap(attr))
       .getKernelInputFeatureDimension();
 }
 
 int64_t mlirMhloConvDimensionNumbersGetKernelOutputFeatureDimension(
     MlirAttribute attr) {
-  return unwrap(attr)
-      .cast<mlir::mhlo::ConvDimensionNumbersAttr>()
+  return mlir::cast<mlir::mhlo::ConvDimensionNumbersAttr>(unwrap(attr))
       .getKernelOutputFeatureDimension();
 }
 
 intptr_t mlirMhloConvDimensionNumbersGetKernelSpatialDimensionsSize(
     MlirAttribute attr) {
-  return unwrap(attr)
-      .cast<mlir::mhlo::ConvDimensionNumbersAttr>()
+  return mlir::cast<mlir::mhlo::ConvDimensionNumbersAttr>(unwrap(attr))
       .getKernelSpatialDimensions()
       .size();
 }
 
 int64_t mlirMhloConvDimensionNumbersGetKernelSpatialDimensionsElem(
     MlirAttribute attr, intptr_t pos) {
-  return unwrap(attr)
-      .cast<mlir::mhlo::ConvDimensionNumbersAttr>()
+  return mlir::cast<mlir::mhlo::ConvDimensionNumbersAttr>(unwrap(attr))
       .getKernelSpatialDimensions()[pos];
 }
 
 int64_t mlirMhloConvDimensionNumbersGetOutputBatchDimension(
     MlirAttribute attr) {
-  return unwrap(attr)
-      .cast<mlir::mhlo::ConvDimensionNumbersAttr>()
+  return mlir::cast<mlir::mhlo::ConvDimensionNumbersAttr>(unwrap(attr))
       .getOutputBatchDimension();
 }
 
 int64_t mlirMhloConvDimensionNumbersGetOutputFeatureDimension(
     MlirAttribute attr) {
-  return unwrap(attr)
-      .cast<mlir::mhlo::ConvDimensionNumbersAttr>()
+  return mlir::cast<mlir::mhlo::ConvDimensionNumbersAttr>(unwrap(attr))
       .getOutputFeatureDimension();
 }
 
 intptr_t mlirMhloConvDimensionNumbersGetOutputSpatialDimensionsSize(
     MlirAttribute attr) {
-  return unwrap(attr)
-      .cast<mlir::mhlo::ConvDimensionNumbersAttr>()
+  return mlir::cast<mlir::mhlo::ConvDimensionNumbersAttr>(unwrap(attr))
       .getOutputSpatialDimensions()
       .size();
 }
 
 int64_t mlirMhloConvDimensionNumbersGetOutputSpatialDimensionsElem(
     MlirAttribute attr, intptr_t pos) {
-  return unwrap(attr)
-      .cast<mlir::mhlo::ConvDimensionNumbersAttr>()
+  return mlir::cast<mlir::mhlo::ConvDimensionNumbersAttr>(unwrap(attr))
       .getOutputSpatialDimensions()[pos];
 }
 
@@ -364,42 +331,37 @@ MLIR_CAPI_EXPORTED MlirAttribute mlirMhloOutputOperandAliasGet(
 }
 
 bool mlirMhloAttributeIsAOutputOperandAlias(MlirAttribute attr) {
-  return unwrap(attr).isa<mlir::mhlo::OutputOperandAliasAttr>();
+  return mlir::isa<mlir::mhlo::OutputOperandAliasAttr>(unwrap(attr));
 }
 
 intptr_t mlirMhloOutputOperandAliasGetOutputTupleIndicesSize(
     MlirAttribute attr) {
-  return unwrap(attr)
-      .cast<mlir::mhlo::OutputOperandAliasAttr>()
+  return mlir::cast<mlir::mhlo::OutputOperandAliasAttr>(unwrap(attr))
       .getOutputTupleIndices()
       .size();
 }
 
 int64_t mlirMhloOutputOperandAliasGetOutputTupleIndicesElem(MlirAttribute attr,
                                                             intptr_t pos) {
-  return unwrap(attr)
-      .cast<mlir::mhlo::OutputOperandAliasAttr>()
+  return mlir::cast<mlir::mhlo::OutputOperandAliasAttr>(unwrap(attr))
       .getOutputTupleIndices()[pos];
 }
 
 int64_t mlirMhloOutputOperandAliasGetOperandIndex(MlirAttribute attr) {
-  return unwrap(attr)
-      .cast<mlir::mhlo::OutputOperandAliasAttr>()
+  return mlir::cast<mlir::mhlo::OutputOperandAliasAttr>(unwrap(attr))
       .getOperandIndex();
 }
 
 intptr_t mlirMhloOutputOperandAliasGetOperandTupleIndicesSize(
     MlirAttribute attr) {
-  return unwrap(attr)
-      .cast<mlir::mhlo::OutputOperandAliasAttr>()
+  return mlir::cast<mlir::mhlo::OutputOperandAliasAttr>(unwrap(attr))
       .getOperandTupleIndices()
       .size();
 }
 
 int64_t mlirMhloOutputOperandAliasGetOperandTupleIndicesElem(MlirAttribute attr,
                                                              intptr_t pos) {
-  return unwrap(attr)
-      .cast<mlir::mhlo::OutputOperandAliasAttr>()
+  return mlir::cast<mlir::mhlo::OutputOperandAliasAttr>(unwrap(attr))
       .getOperandTupleIndices()[pos];
 }
 
@@ -416,12 +378,13 @@ MlirAttribute mlirMhloComparisonDirectionAttrGet(MlirContext ctx,
 }
 
 bool mlirMhloAttributeIsAComparisonDirectionAttr(MlirAttribute attr) {
-  return unwrap(attr).isa<mlir::mhlo::ComparisonDirectionAttr>();
+  return mlir::isa<mlir::mhlo::ComparisonDirectionAttr>(unwrap(attr));
 }
 
 MlirStringRef mlirMhloComparisonDirectionAttrGetValue(MlirAttribute attr) {
   return wrap(mlir::mhlo::stringifyComparisonDirection(
-      unwrap(attr).cast<mlir::mhlo::ComparisonDirectionAttr>().getValue()));
+      mlir::cast<mlir::mhlo::ComparisonDirectionAttr>(unwrap(attr))
+          .getValue()));
 }
 
 //
@@ -438,12 +401,12 @@ MlirAttribute mlirMhloComparisonTypeAttrGet(MlirContext ctx,
 }
 
 bool mlirMhloAttributeIsAComparisonTypeAttr(MlirAttribute attr) {
-  return unwrap(attr).isa<mlir::mhlo::ComparisonTypeAttr>();
+  return mlir::isa<mlir::mhlo::ComparisonTypeAttr>(unwrap(attr));
 }
 
 MlirStringRef mlirMhloComparisonTypeAttrGetValue(MlirAttribute attr) {
   return wrap(mlir::mhlo::stringifyComparisonType(
-      unwrap(attr).cast<mlir::mhlo::ComparisonTypeAttr>().getValue()));
+      mlir::cast<mlir::mhlo::ComparisonTypeAttr>(unwrap(attr)).getValue()));
 }
 
 //
@@ -458,12 +421,12 @@ MlirAttribute mlirMhloDomainKindAttrGet(MlirContext ctx, MlirStringRef value) {
 }
 
 bool mlirMhloAttributeIsADomainKindAttr(MlirAttribute attr) {
-  return unwrap(attr).isa<mlir::mhlo::DomainKindAttr>();
+  return mlir::isa<mlir::mhlo::DomainKindAttr>(unwrap(attr));
 }
 
 MlirStringRef mlirMhloDomainKindAttrGetValue(MlirAttribute attr) {
   return wrap(mlir::mhlo::stringifyDomainKind(
-      unwrap(attr).cast<mlir::mhlo::DomainKindAttr>().getValue()));
+      mlir::cast<mlir::mhlo::DomainKindAttr>(unwrap(attr)).getValue()));
 }
 
 //
@@ -478,12 +441,12 @@ MlirAttribute mlirMhloPrecisionAttrGet(MlirContext ctx, MlirStringRef value) {
 }
 
 bool mlirMhloAttributeIsAPrecisionAttr(MlirAttribute attr) {
-  return unwrap(attr).isa<mlir::mhlo::PrecisionAttr>();
+  return mlir::isa<mlir::mhlo::PrecisionAttr>(unwrap(attr));
 }
 
 MlirStringRef mlirMhloPrecisionAttrGetValue(MlirAttribute attr) {
   return wrap(mlir::mhlo::stringifyPrecision(
-      unwrap(attr).cast<mlir::mhlo::PrecisionAttr>().getValue()));
+      mlir::cast<mlir::mhlo::PrecisionAttr>(unwrap(attr)).getValue()));
 }
 
 //
@@ -498,12 +461,12 @@ MlirAttribute mlirMhloFftTypeAttrGet(MlirContext ctx, MlirStringRef value) {
 }
 
 bool mlirMhloAttributeIsAFftTypeAttr(MlirAttribute attr) {
-  return unwrap(attr).isa<mlir::mhlo::FftTypeAttr>();
+  return mlir::isa<mlir::mhlo::FftTypeAttr>(unwrap(attr));
 }
 
 MlirStringRef mlirMhloFftTypeAttrGetValue(MlirAttribute attr) {
   return wrap(mlir::mhlo::stringifyFftType(
-      unwrap(attr).cast<mlir::mhlo::FftTypeAttr>().getValue()));
+      mlir::cast<mlir::mhlo::FftTypeAttr>(unwrap(attr)).getValue()));
 }
 
 //
@@ -520,12 +483,12 @@ MlirAttribute mlirMhloDequantizeModeAttrGet(MlirContext ctx,
 }
 
 bool mlirMhloAttributeIsADequantizeModeAttr(MlirAttribute attr) {
-  return unwrap(attr).isa<mlir::mhlo::DequantizeModeAttr>();
+  return mlir::isa<mlir::mhlo::DequantizeModeAttr>(unwrap(attr));
 }
 
 MlirStringRef mlirMhloDequantizeModeAttrGetValue(MlirAttribute attr) {
   return wrap(mlir::mhlo::stringifyDequantizeMode(
-      unwrap(attr).cast<mlir::mhlo::DequantizeModeAttr>().getValue()));
+      mlir::cast<mlir::mhlo::DequantizeModeAttr>(unwrap(attr)).getValue()));
 }
 
 //
@@ -540,12 +503,12 @@ MlirAttribute mlirMhloTransposeAttrGet(MlirContext ctx, MlirStringRef value) {
 }
 
 bool mlirMhloAttributeIsATransposeAttr(MlirAttribute attr) {
-  return unwrap(attr).isa<mlir::mhlo::TransposeAttr>();
+  return mlir::isa<mlir::mhlo::TransposeAttr>(unwrap(attr));
 }
 
 MlirStringRef mlirMhloTransposeAttrGetValue(MlirAttribute attr) {
   return wrap(mlir::mhlo::stringifyTranspose(
-      unwrap(attr).cast<mlir::mhlo::TransposeAttr>().getValue()));
+      mlir::cast<mlir::mhlo::TransposeAttr>(unwrap(attr)).getValue()));
 }
 
 //
@@ -560,12 +523,12 @@ MlirAttribute mlirMhloFusionKindAttrGet(MlirContext ctx, MlirStringRef value) {
 }
 
 bool mlirMhloAttributeIsAFusionKindAttr(MlirAttribute attr) {
-  return unwrap(attr).isa<mlir::mhlo::FusionKindAttr>();
+  return mlir::isa<mlir::mhlo::FusionKindAttr>(unwrap(attr));
 }
 
 MlirStringRef mlirMhloFusionKindAttrGetValue(MlirAttribute attr) {
   return wrap(mlir::mhlo::stringifyFusionKind(
-      unwrap(attr).cast<mlir::mhlo::FusionKindAttr>().getValue()));
+      mlir::cast<mlir::mhlo::FusionKindAttr>(unwrap(attr)).getValue()));
 }
 
 //
@@ -582,12 +545,12 @@ MlirAttribute mlirMhloRngDistributionAttrGet(MlirContext ctx,
 }
 
 bool mlirMhloAttributeIsARngDistributionAttr(MlirAttribute attr) {
-  return unwrap(attr).isa<mlir::mhlo::RngDistributionAttr>();
+  return mlir::isa<mlir::mhlo::RngDistributionAttr>(unwrap(attr));
 }
 
 MlirStringRef mlirMhloRngDistributionAttrGetValue(MlirAttribute attr) {
   return wrap(mlir::mhlo::stringifyRngDistribution(
-      unwrap(attr).cast<mlir::mhlo::RngDistributionAttr>().getValue()));
+      mlir::cast<mlir::mhlo::RngDistributionAttr>(unwrap(attr)).getValue()));
 }
 
 //
@@ -604,12 +567,12 @@ MlirAttribute mlirMhloRngAlgorithmAttrGet(MlirContext ctx,
 }
 
 bool mlirMhloAttributeIsARngAlgorithmAttr(MlirAttribute attr) {
-  return unwrap(attr).isa<mlir::mhlo::RngAlgorithmAttr>();
+  return mlir::isa<mlir::mhlo::RngAlgorithmAttr>(unwrap(attr));
 }
 
 MlirStringRef mlirMhloRngAlgorithmAttrGetValue(MlirAttribute attr) {
   return wrap(mlir::mhlo::stringifyRngAlgorithm(
-      unwrap(attr).cast<mlir::mhlo::RngAlgorithmAttr>().getValue()));
+      mlir::cast<mlir::mhlo::RngAlgorithmAttr>(unwrap(attr)).getValue()));
 }
 
 //
@@ -622,15 +585,15 @@ MlirAttribute mlirMhloChannelHandleGet(MlirContext ctx, int64_t handle,
 }
 
 bool mlirMhloAttributeIsChannelHandle(MlirAttribute attr) {
-  return unwrap(attr).isa<mlir::mhlo::ChannelHandleAttr>();
+  return mlir::isa<mlir::mhlo::ChannelHandleAttr>(unwrap(attr));
 }
 
 int64_t mlirMhloChannelHandleGetHandle(MlirAttribute attr) {
-  return unwrap(attr).cast<mlir::mhlo::ChannelHandleAttr>().getHandle();
+  return mlir::cast<mlir::mhlo::ChannelHandleAttr>(unwrap(attr)).getHandle();
 }
 
 int64_t mlirMhloChannelHandleGetType(MlirAttribute attr) {
-  return unwrap(attr).cast<mlir::mhlo::ChannelHandleAttr>().getType();
+  return mlir::cast<mlir::mhlo::ChannelHandleAttr>(unwrap(attr)).getType();
 }
 
 //
@@ -644,15 +607,18 @@ MlirAttribute mlirMhloTypeExtensionsGet(MlirContext ctx, intptr_t nBounds,
 }
 
 bool mlirMhloAttributeIsTypeExtensions(MlirAttribute attr) {
-  return unwrap(attr).isa<mlir::mhlo::TypeExtensionsAttr>();
+  return mlir::isa<mlir::mhlo::TypeExtensionsAttr>(unwrap(attr));
 }
 
 intptr_t mlirMhloTypeExtensionsGetBoundsSize(MlirAttribute attr) {
-  return unwrap(attr).cast<mlir::mhlo::TypeExtensionsAttr>().getBounds().size();
+  return mlir::cast<mlir::mhlo::TypeExtensionsAttr>(unwrap(attr))
+      .getBounds()
+      .size();
 }
 
 int64_t mlirMhloTypeExtensionsGetBoundsElem(MlirAttribute attr, intptr_t pos) {
-  return unwrap(attr).cast<mlir::mhlo::TypeExtensionsAttr>().getBounds()[pos];
+  return mlir::cast<mlir::mhlo::TypeExtensionsAttr>(unwrap(attr))
+      .getBounds()[pos];
 }
 
 //
@@ -666,17 +632,18 @@ MlirAttribute mlirMhloSparsityDescriptorGet(MlirContext ctx, int64_t dimension,
 }
 
 bool mlirMhloAttributeIsASparsityDescriptor(MlirAttribute attr) {
-  return unwrap(attr).isa<mlir::mhlo::SparsityDescriptorAttr>();
+  return mlir::isa<mlir::mhlo::SparsityDescriptorAttr>(unwrap(attr));
 }
 
 int64_t mlirMhloSparsityDescriptorGetDimension(MlirAttribute attr) {
-  return unwrap(attr).cast<mlir::mhlo::SparsityDescriptorAttr>().getDimension();
+  return mlir::cast<mlir::mhlo::SparsityDescriptorAttr>(unwrap(attr))
+      .getDimension();
 }
 
 int64_t mlirMhloSparsityDescriptorGetN(MlirAttribute attr) {
-  return unwrap(attr).cast<mlir::mhlo::SparsityDescriptorAttr>().getN();
+  return mlir::cast<mlir::mhlo::SparsityDescriptorAttr>(unwrap(attr)).getN();
 }
 
 int64_t mlirMhloSparsityDescriptorGetM(MlirAttribute attr) {
-  return unwrap(attr).cast<mlir::mhlo::SparsityDescriptorAttr>().getM();
+  return mlir::cast<mlir::mhlo::SparsityDescriptorAttr>(unwrap(attr)).getM();
 }
diff --git a/third_party/xla/xla/mlir_hlo/bindings/c/Types.cc b/third_party/xla/xla/mlir_hlo/bindings/c/Types.cc
index 0be0e34c02069e..4ac9bdd75c1825 100644
--- a/third_party/xla/xla/mlir_hlo/bindings/c/Types.cc
+++ b/third_party/xla/xla/mlir_hlo/bindings/c/Types.cc
@@ -14,11 +14,12 @@ limitations under the License.
 
 #include "mhlo/IR/hlo_ops.h"
 #include "mlir/CAPI/IR.h"
+#include "mlir/Support/LLVM.h"
 
 MlirType mlirMhloTokenTypeGet(MlirContext ctx) {
   return wrap(mlir::mhlo::TokenType::get(unwrap(ctx)));
 }
 
 bool mlirMhloTypeIsAToken(MlirType type) {
-  return unwrap(type).isa<mlir::mhlo::TokenType>();
+  return mlir::isa<mlir::mhlo::TokenType>(unwrap(type));
 }
diff --git a/third_party/xla/xla/mlir_hlo/deallocation/transforms/buffer_reuse.cc b/third_party/xla/xla/mlir_hlo/deallocation/transforms/buffer_reuse.cc
index 951dc240e9b53a..4b8930edc961bf 100644
--- a/third_party/xla/xla/mlir_hlo/deallocation/transforms/buffer_reuse.cc
+++ b/third_party/xla/xla/mlir_hlo/deallocation/transforms/buffer_reuse.cc
@@ -33,6 +33,7 @@ limitations under the License.
 #include "mlir/IR/Value.h"
 #include "mlir/Interfaces/ControlFlowInterfaces.h"
 #include "mlir/Pass/Pass.h"
+#include "mlir/Support/LLVM.h"
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"
 
 namespace mlir {
@@ -372,7 +373,7 @@ void promoteToStack(memref::DeallocOp dealloc) {
   auto alloc = dealloc.getMemref().getDefiningOp<memref::AllocOp>();
   OpBuilder b(alloc);
   auto alloca = b.create<memref::AllocaOp>(
-      alloc->getLoc(), alloc->getResultTypes()[0].cast<MemRefType>(),
+      alloc->getLoc(), mlir::cast<MemRefType>(alloc->getResultTypes()[0]),
       alloc.getAlignmentAttr());
   alloc->replaceAllUsesWith(ValueRange{alloca.getResult()});
   alloc->erase();
diff --git a/third_party/xla/xla/mlir_hlo/deallocation/utils/util.h b/third_party/xla/xla/mlir_hlo/deallocation/utils/util.h
index ce6be44f99d962..c18c8f9dcd2485 100644
--- a/third_party/xla/xla/mlir_hlo/deallocation/utils/util.h
+++ b/third_party/xla/xla/mlir_hlo/deallocation/utils/util.h
@@ -81,8 +81,8 @@ struct ValueComparator {
     if (lhs == rhs) return false;
 
     // Block arguments are less than results.
-    bool lhsIsBBArg = lhs.isa<BlockArgument>();
-    if (lhsIsBBArg != rhs.isa<BlockArgument>()) {
+    bool lhsIsBBArg = isa<BlockArgument>(lhs);
+    if (lhsIsBBArg != isa<BlockArgument>(rhs)) {
       return lhsIsBBArg;
     }
 
diff --git a/third_party/xla/xla/mlir_hlo/lhlo/IR/lhlo_ops.cc b/third_party/xla/xla/mlir_hlo/lhlo/IR/lhlo_ops.cc
index 952e3c94751d3b..6adc93683fedf9 100644
--- a/third_party/xla/xla/mlir_hlo/lhlo/IR/lhlo_ops.cc
+++ b/third_party/xla/xla/mlir_hlo/lhlo/IR/lhlo_ops.cc
@@ -54,6 +54,7 @@ limitations under the License.
 #include "mlir/IR/TypeUtilities.h"
 #include "mlir/IR/Types.h"
 #include "mlir/IR/Value.h"
+#include "mlir/Support/LLVM.h"
 
 #define GET_ATTRDEF_CLASSES
 #include "lhlo/IR/lhlo_ops_structs.cc.inc"
@@ -104,7 +105,7 @@ LogicalResult AbsOp::verify() {
   AbsOp op = *this;
   auto operandType = getElementTypeOrSelf(op.getInput().getType());
   auto outputType = getElementTypeOrSelf(op.getOutput().getType());
-  if (auto complexType = operandType.dyn_cast<ComplexType>()) {
+  if (auto complexType = mlir::dyn_cast<ComplexType>(operandType)) {
     if (complexType.getElementType() != outputType) {
       return op.emitOpError(
           "requires output type to be the same as the element type of the "
@@ -225,8 +226,8 @@ LogicalResult CustomCallOp::verify() {
 //     configurations are applied to the operand.
 LogicalResult PadOp::verify() {
   PadOp op = *this;
-  auto operandType = op.getOperand().getType().dyn_cast<ShapedType>();
-  auto outputType = op.getOutput().getType().dyn_cast<ShapedType>();
+  auto operandType = mlir::dyn_cast<ShapedType>(op.getOperand().getType());
+  auto outputType = mlir::dyn_cast<ShapedType>(op.getOutput().getType());
   if (!(operandType && outputType && operandType.hasRank() &&
         outputType.hasRank())) {
     return success();
diff --git a/third_party/xla/xla/mlir_hlo/lhlo/transforms/lhlo_legalize_to_affine/lhlo_legalize_to_affine.cc b/third_party/xla/xla/mlir_hlo/lhlo/transforms/lhlo_legalize_to_affine/lhlo_legalize_to_affine.cc
index 45e44cc1161827..1a5c5099924a00 100644
--- a/third_party/xla/xla/mlir_hlo/lhlo/transforms/lhlo_legalize_to_affine/lhlo_legalize_to_affine.cc
+++ b/third_party/xla/xla/mlir_hlo/lhlo/transforms/lhlo_legalize_to_affine/lhlo_legalize_to_affine.cc
@@ -26,6 +26,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinTypes.h"
 #include "mlir/IR/Location.h"
 #include "mlir/Pass/Pass.h"
+#include "mlir/Support/LLVM.h"
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"
 
 namespace mlir {
@@ -55,8 +56,8 @@ struct DotOpConverter : public OpRewritePattern<DotOp> {
                                 PatternRewriter& rewriter) const override {
     Value lhs = op.getLhs();
     Value rhs = op.getRhs();
-    MemRefType lhsType = lhs.getType().cast<MemRefType>();
-    MemRefType rhsType = rhs.getType().cast<MemRefType>();
+    MemRefType lhsType = mlir::cast<MemRefType>(lhs.getType());
+    MemRefType rhsType = mlir::cast<MemRefType>(rhs.getType());
     Type elementType = lhsType.getElementType();
     ArrayRef<int64_t> shapeLhs = lhsType.getShape();
     ArrayRef<int64_t> shapeRhs = rhsType.getShape();
@@ -130,7 +131,7 @@ struct ConcatOpConverter : public OpRewritePattern<ConcatenateOp> {
                                 PatternRewriter& rewriter) const override {
     Location loc = op.getLoc();
     Value output = op.getOutput();
-    MemRefType outputType = output.getType().cast<MemRefType>();
+    MemRefType outputType = mlir::cast<MemRefType>(output.getType());
     unsigned outputRank = outputType.getRank();
     ArrayRef<int64_t> outputShape = outputType.getShape();
 
@@ -139,7 +140,7 @@ struct ConcatOpConverter : public OpRewritePattern<ConcatenateOp> {
     int64_t prevBound = 0;
 
     for (Value operand : operands) {
-      MemRefType operandType = operand.getType().cast<MemRefType>();
+      MemRefType operandType = mlir::cast<MemRefType>(operand.getType());
       ArrayRef<int64_t> operandShape = operandType.getShape();
 
       // TODO(pashu123): Extend support for dynamic dimensions.
@@ -189,11 +190,11 @@ struct ConcatOpConverter : public OpRewritePattern<ConcatenateOp> {
 static Value getZeroValue(Type type, Location loc, PatternRewriter& rewriter) {
   assert(type.isIntOrFloat() && "Expected int or float");
 
-  if (IntegerType intType = type.dyn_cast<IntegerType>())
+  if (IntegerType intType = mlir::dyn_cast<IntegerType>(type))
     return rewriter.create<mlir::arith::ConstantIntOp>(loc, 0,
                                                        intType.getWidth());
 
-  FloatType floatType = type.cast<FloatType>();
+  FloatType floatType = mlir::cast<FloatType>(type);
   return rewriter.create<mlir::arith::ConstantFloatOp>(
       loc, APFloat::getZero(floatType.getFloatSemantics()), floatType);
 }
@@ -202,7 +203,7 @@ static Value getZeroValue(Type type, Location loc, PatternRewriter& rewriter) {
 static void fillBuffer(Location loc, Value buffer, Value fillValue,
                        PatternRewriter& builder) {
   OpBuilder::InsertionGuard guard(builder);
-  MemRefType bufType = buffer.getType().cast<MemRefType>();
+  MemRefType bufType = mlir::cast<MemRefType>(buffer.getType());
   unsigned rank = bufType.getRank();
   SmallVector<Value, 4> dimSizes;
   dimSizes.reserve(rank);
@@ -220,7 +221,7 @@ static void fillBuffer(Location loc, Value buffer, Value fillValue,
     ivs[i] = forOp.getInductionVar();
   }
   Type fillValueType = fillValue.getType();
-  auto fillMemRefType = fillValueType.dyn_cast<MemRefType>();
+  auto fillMemRefType = mlir::dyn_cast<MemRefType>(fillValueType);
   assert(((fillMemRefType && fillMemRefType.getRank() == 0) ||
           fillValueType.isIntOrFloat()) &&
          "init value has to be a 0-d memref or int or fp");
@@ -252,19 +253,20 @@ class GatherOpConverter : public OpRewritePattern<GatherOp> {
 
     // Operand array.
     Value operand = op.getOperand();
-    MemRefType operandType = operand.getType().cast<MemRefType>();
+    MemRefType operandType = mlir::cast<MemRefType>(operand.getType());
     unsigned operandRank = operandType.getRank();
     ArrayRef<int64_t> operandShape = operandType.getShape();
 
     // Start_indices array.
     Value startIndices = op.getStartIndices();
-    MemRefType startIndicesType = startIndices.getType().cast<MemRefType>();
+    MemRefType startIndicesType =
+        mlir::cast<MemRefType>(startIndices.getType());
     unsigned startIndicesRank = startIndicesType.getRank();
     ArrayRef<int64_t> startIndicesShape = startIndicesType.getShape();
 
     // Output array.
     Value output = op.getOutput();
-    MemRefType outputType = output.getType().cast<MemRefType>();
+    MemRefType outputType = mlir::cast<MemRefType>(output.getType());
     ArrayRef<int64_t> outputShape = outputType.getShape();
 
     if (!operandType.hasStaticShape() || !startIndicesType.hasStaticShape() ||
@@ -450,7 +452,7 @@ class GatherOpConverter : public OpRewritePattern<GatherOp> {
         rewriter.create<affine::AffineLoadOp>(loc, output, outputInductionVars);
 
     // The selected value is added to the previous value stored in output array.
-    if (elementType.isa<FloatType>())
+    if (mlir::isa<FloatType>(elementType))
       outputValue = rewriter.create<arith::AddFOp>(loc, elementType, selectLoad,
                                                    outputValue);
     else
@@ -486,8 +488,8 @@ struct PadOpConverter : public OpRewritePattern<PadOp> {
     Value paddingValue = op.getPaddingValue();
     Value output = op.getOutput();
 
-    auto operandType = operand.getType().dyn_cast<ShapedType>();
-    auto outputType = output.getType().dyn_cast<ShapedType>();
+    auto operandType = mlir::dyn_cast<ShapedType>(operand.getType());
+    auto outputType = mlir::dyn_cast<ShapedType>(output.getType());
     // We allow lowering for only ranked input/output.
     if (!(operandType && outputType && operandType.hasRank() &&
           outputType.hasRank()))
@@ -574,8 +576,8 @@ struct BinaryOpConverter : public OpRewritePattern<LhloOpTy> {
                                 PatternRewriter& rewriter) const override {
     Value lhs = op.getLhs();
     Value rhs = op.getRhs();
-    const auto& lhsType = lhs.getType().template cast<MemRefType>();
-    const auto& rhsType = rhs.getType().template cast<MemRefType>();
+    const auto& lhsType = mlir::cast<MemRefType>(lhs.getType());
+    const auto& rhsType = mlir::cast<MemRefType>(rhs.getType());
     const auto& elementType = lhsType.getElementType();
 
     if (lhsType.getShape() != rhsType.getShape()) {
@@ -611,7 +613,7 @@ struct UnaryOpConverter : public OpRewritePattern<LhloOpTy> {
   LogicalResult matchAndRewrite(LhloOpTy op,
                                 PatternRewriter& rewriter) const override {
     Value input = op.getInput();
-    auto inputType = input.getType().cast<MemRefType>();
+    auto inputType = mlir::cast<MemRefType>(input.getType());
     auto elementType = inputType.getElementType();
     ArrayRef<int64_t> shape = inputType.getShape();
 
diff --git a/third_party/xla/xla/mlir_hlo/lhlo/transforms/lhlo_legalize_to_gpu/lhlo_legalize_to_gpu.cc b/third_party/xla/xla/mlir_hlo/lhlo/transforms/lhlo_legalize_to_gpu/lhlo_legalize_to_gpu.cc
index 7572655977e21d..492f75011e5da0 100644
--- a/third_party/xla/xla/mlir_hlo/lhlo/transforms/lhlo_legalize_to_gpu/lhlo_legalize_to_gpu.cc
+++ b/third_party/xla/xla/mlir_hlo/lhlo/transforms/lhlo_legalize_to_gpu/lhlo_legalize_to_gpu.cc
@@ -40,6 +40,7 @@ limitations under the License.
 #include "mlir/IR/Operation.h"
 #include "mlir/IR/PatternMatch.h"
 #include "mlir/Pass/Pass.h"
+#include "mlir/Support/LLVM.h"
 #include "mlir/Transforms/DialectConversion.h"
 
 namespace mlir {
@@ -64,7 +65,7 @@ class LhloReduceToGPULaunchConverter : public OpConversionPattern<ReduceOp> {
     // Only support 1d reductions for now.
     int64_t size = 0;
     for (auto result : reduceOp.getOut()) {
-      auto shapedType = result.getType().dyn_cast<ShapedType>();
+      auto shapedType = mlir::dyn_cast<ShapedType>(result.getType());
       if (!shapedType || shapedType.getRank() != 1) {
         return failure();
       }
@@ -80,7 +81,7 @@ class LhloReduceToGPULaunchConverter : public OpConversionPattern<ReduceOp> {
     // Require all inputs to have the same shape.
     int64_t reduceDimSize = 0;
     for (auto input : reduceOp.getInputs()) {
-      auto shapedType = input.getType().dyn_cast<ShapedType>();
+      auto shapedType = mlir::dyn_cast<ShapedType>(input.getType());
       if (!shapedType || !shapedType.hasStaticShape()) {
         return failure();
       }
@@ -139,7 +140,8 @@ class LhloReduceToGPULaunchConverter : public OpConversionPattern<ReduceOp> {
           loc, resType, output, offset, size, stride);
       llvm::SmallVector<Value, 4> indexings;
       Value inputBuffer = reduceOp.getInputs().front();
-      auto inputTypeRank = inputBuffer.getType().cast<MemRefType>().getRank();
+      auto inputTypeRank =
+          mlir::cast<MemRefType>(inputBuffer.getType()).getRank();
 
       Value input = *reduceOp.operand_begin();
       SmallVector<OpFoldResult> offsets = llvm::to_vector<4>(llvm::map_range(
diff --git a/third_party/xla/xla/mlir_hlo/lhlo/transforms/lhlo_legalize_to_parallel_loops/lhlo_legalize_to_parallel_loops.cc b/third_party/xla/xla/mlir_hlo/lhlo/transforms/lhlo_legalize_to_parallel_loops/lhlo_legalize_to_parallel_loops.cc
index f3c6b3940aced5..3b4568c16d8206 100644
--- a/third_party/xla/xla/mlir_hlo/lhlo/transforms/lhlo_legalize_to_parallel_loops/lhlo_legalize_to_parallel_loops.cc
+++ b/third_party/xla/xla/mlir_hlo/lhlo/transforms/lhlo_legalize_to_parallel_loops/lhlo_legalize_to_parallel_loops.cc
@@ -29,6 +29,7 @@ limitations under the License.
 #include "mlir/Dialect/SCF/IR/SCF.h"
 #include "mlir/IR/BuiltinTypes.h"
 #include "mlir/Pass/Pass.h"
+#include "mlir/Support/LLVM.h"
 #include "mlir/Transforms/DialectConversion.h"
 
 namespace mlir {
@@ -55,7 +56,7 @@ Value applySingleResultLhloCode(Location loc, ValueRange operands,
   SmallVector<Value, 2> argBufs;
   for (auto argType : lhloBlock->getArgumentTypes()) {
     argBufs.push_back(
-        b->create<memref::AllocOp>(loc, argType.cast<MemRefType>()));
+        b->create<memref::AllocOp>(loc, mlir::cast<MemRefType>(argType)));
   }
   for (const auto& operand : llvm::enumerate(operands)) {
     b->create<memref::StoreOp>(loc, operand.value(), argBufs[operand.index()]);
@@ -116,7 +117,7 @@ MappedIvs mapWindowIvsToInput(OpTy op, Value operand, ValueRange ivs,
   auto padding = op.getPadding().value();
 
   auto loc = op.getLoc();
-  auto operandShape = operand.getType().template cast<MemRefType>().getShape();
+  auto operandShape = mlir::cast<MemRefType>(operand.getType()).getShape();
 
   // `in_bounds` is false when the mapped indices are in the padding area.
   mappedIvs.inBounds = b->create<mlir::arith::ConstantOp>(
@@ -154,7 +155,8 @@ scf::ParallelOp makeLoopOverShape(Location loc, Value shapedValue,
   Value zero = b->create<arith::ConstantIndexOp>(loc, 0);
   Value one = b->create<arith::ConstantIndexOp>(loc, 1);
 
-  ArrayRef<int64_t> shape = shapedValue.getType().cast<ShapedType>().getShape();
+  ArrayRef<int64_t> shape =
+      mlir::cast<ShapedType>(shapedValue.getType()).getShape();
   SmallVector<Value, 2> lower, upper, step;
   for (const auto& dim : llvm::enumerate(shape)) {
     upper.push_back(
@@ -249,7 +251,7 @@ class ReduceOpConverter : public OpConversionPattern<lmhlo::ReduceOp> {
     Value out = reduceOp.getOut().front();
     SmallVector<Value, 2> parallelLower, parallelUpper, parallelStep;
     SmallVector<Value, 2> reduceLower, reduceUpper, reduceStep;
-    auto operandShape = operand.getType().cast<MemRefType>().getShape();
+    auto operandShape = mlir::cast<MemRefType>(operand.getType()).getShape();
     for (const auto& dim : llvm::enumerate(operandShape)) {
       const bool isReducingDim = reducingDims.count(dim.index());
 
@@ -442,7 +444,7 @@ class ReduceWindowOpConverter
     }
 
     Value input = reduceWindowOp.getInputs()[0];
-    auto inputType = input.getType().cast<MemRefType>();
+    auto inputType = mlir::cast<MemRefType>(input.getType());
 
     // Compute ivs in 'arg' buffer and whether these ivs are in pad area or not.
     MappedIvs mappedIvs = mapWindowIvsToInput(
@@ -555,7 +557,7 @@ class SelectAndScatterOpConverter
     Value one = b->create<arith::ConstantIndexOp>(loc, 1);
 
     auto elementType =
-        sAndSOp.getOut().getType().cast<MemRefType>().getElementType();
+        mlir::cast<MemRefType>(sAndSOp.getOut().getType()).getElementType();
     auto rank = loopOverSrc.getNumLoops();
 
     // `iter_args` = [iv_1, ..., iv_N, selected_value, is_initialized]
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/IR/hlo_ops.cc b/third_party/xla/xla/mlir_hlo/mhlo/IR/hlo_ops.cc
index a6a38886841a76..e42f21fc0dfb62 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/IR/hlo_ops.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/IR/hlo_ops.cc
@@ -3350,8 +3350,8 @@ Operation* ReduceWindowOp::getReductionOp(int resultIndex) {
   auto returnOp = cast<ReturnOp>(getBody().front().getTerminator());
   Operation* computeOp = returnOp.getResults()[resultIndex].getDefiningOp();
   if (computeOp->getNumOperands() != 2) return nullptr;
-  auto arg0 = computeOp->getOperand(0).dyn_cast<BlockArgument>();
-  auto arg1 = computeOp->getOperand(1).dyn_cast<BlockArgument>();
+  auto arg0 = dyn_cast<BlockArgument>(computeOp->getOperand(0));
+  auto arg1 = dyn_cast<BlockArgument>(computeOp->getOperand(1));
   if (!arg0 || !arg1) return nullptr;
   int64_t arg0Num = arg0.getArgNumber();
   int64_t arg1Num = arg1.getArgNumber();
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/IR/hlo_ops_common.cc b/third_party/xla/xla/mlir_hlo/mhlo/IR/hlo_ops_common.cc
index ff69d84d08879f..073707b75c093b 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/IR/hlo_ops_common.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/IR/hlo_ops_common.cc
@@ -25,13 +25,14 @@ limitations under the License.
 #include "mlir/IR/Builders.h"
 #include "mlir/IR/BuiltinAttributes.h"
 #include "mlir/IR/BuiltinTypes.h"
+#include "mlir/Support/LLVM.h"
 
 namespace mlir {
 namespace hlo {
 // Verifies the source target pairs attached to collective permute.
 LogicalResult verifyCollectivePermuteSourceTargetPairs(
     Operation *op, DenseIntElementsAttr attr) {
-  auto type = attr.getType().cast<RankedTensorType>();
+  auto type = mlir::cast<RankedTensorType>(attr.getType());
   if (type.getRank() != 2)
     return op->emitError() << "expect source_target_pairs attribute to be of "
                               "rank 2, but got rank "
@@ -73,8 +74,8 @@ LogicalResult verifyReduceScatter(Operation *op, TypeRange operandTypes,
   }
 
   for (auto it : llvm::zip(operandTypes, resultTypes)) {
-    auto operandType = std::get<0>(it).cast<ShapedType>();
-    auto resultType = std::get<1>(it).cast<ShapedType>();
+    auto operandType = mlir::cast<ShapedType>(std::get<0>(it));
+    auto resultType = mlir::cast<ShapedType>(std::get<1>(it));
     if (!operandType.hasRank() || !resultType.hasRank()) continue;
     if (operandType.getRank() != resultType.getRank())
       return op->emitOpError() << "operand and result should have same rank";
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/analysis/shape_component_analysis.cc b/third_party/xla/xla/mlir_hlo/mhlo/analysis/shape_component_analysis.cc
index 4d21d8aecf6b0d..94eee2a46d644d 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/analysis/shape_component_analysis.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/analysis/shape_component_analysis.cc
@@ -83,7 +83,8 @@ struct ShapeVisitor {
       // Skip irrelevant cases early.
       Value value = transitivelyRequestedInfo.value();
       Type ty = value.getType();
-      if (!ty.isIntOrIndexOrFloat() && !ty.isa<RankedTensorType>()) continue;
+      if (!ty.isIntOrIndexOrFloat() && !mlir::isa<RankedTensorType>(ty))
+        continue;
 
       // Handle shapes.
       if (transitivelyRequestedInfo.isShapeInfo()) {
@@ -101,7 +102,7 @@ struct ShapeVisitor {
           backwardTransposeShape(transpose);
         } else if (auto select = value.getDefiningOp<mhlo::SelectOp>()) {
           backwardSelectShape(select);
-        } else if (auto arg = value.dyn_cast<BlockArgument>()) {
+        } else if (auto arg = mlir::dyn_cast<BlockArgument>(value)) {
           backwardBlockArgumentShape(arg);
         } else if (value.getDefiningOp() &&
                    value.getDefiningOp()
@@ -114,7 +115,7 @@ struct ShapeVisitor {
       }
 
       // Skip irrelevant cases early.
-      auto rankedTy = ty.dyn_cast<RankedTensorType>();
+      auto rankedTy = mlir::dyn_cast<RankedTensorType>(ty);
       bool isPossiblyInterestingScalar = ty.isIntOrIndex();
       bool isPossiblyInterestingTensor =
           rankedTy && rankedTy.getRank() <= 1 && rankedTy.hasStaticShape();
@@ -245,7 +246,7 @@ struct ShapeVisitor {
 
   void backwardAssumingShape(Value op) {
     auto assumingOp = op.getDefiningOp<shape::AssumingOp>();
-    auto number = op.cast<OpResult>().getResultNumber();
+    auto number = mlir::cast<OpResult>(op).getResultNumber();
     forwardsWorklist.push_back(ShapeOrValueInfo::getShapeInfoOf(op));
     backwardsWorklist.push_back(ShapeOrValueInfo::getShapeInfoOf(
         cast<shape::AssumingYieldOp>(
@@ -254,7 +255,7 @@ struct ShapeVisitor {
   }
   void forwardAssumingShape(Value op) {
     auto assumingOp = op.getDefiningOp<shape::AssumingOp>();
-    auto number = op.cast<OpResult>().getResultNumber();
+    auto number = mlir::cast<OpResult>(op).getResultNumber();
     auto &dims = insert(ShapeOrValueInfo::getShapeInfoOf(op));
     dims = lookup(ShapeOrValueInfo::getShapeInfoOf(
         cast<shape::AssumingYieldOp>(
@@ -338,7 +339,7 @@ struct ShapeVisitor {
         ShapeOrValueInfo::getValueInfoOf(op.getOutputShape()));
   }
   void forwardDynamicReshapeShape(mhlo::DynamicReshapeOp op) {
-    auto rankedTy = op.getResult().getType().cast<RankedTensorType>();
+    auto rankedTy = mlir::cast<RankedTensorType>(op.getResult().getType());
     auto shapeDims =
         lookup(ShapeOrValueInfo::getValueInfoOf(op.getOutputShape()));
     auto &dims = insert(ShapeOrValueInfo::getShapeInfoOf(op));
@@ -370,7 +371,7 @@ struct ShapeVisitor {
   void forwardTransposeShape(mhlo::TransposeOp op) {
     auto &dims = insert(ShapeOrValueInfo::getShapeInfoOf(op));
     auto in = lookup(ShapeOrValueInfo::getShapeInfoOf(op.getOperand()));
-    auto elem = op.getPermutation().cast<DenseIntElementsAttr>();
+    auto elem = mlir::cast<DenseIntElementsAttr>(op.getPermutation());
     for (const auto &val : elem) dims.push_back(in[val.getZExtValue()]);
   }
   void backwardSelectShape(mhlo::SelectOp op) {
@@ -440,7 +441,7 @@ struct ShapeVisitor {
     forwardsWorklist.push_back(ShapeOrValueInfo::getShapeInfoOf(v));
   }
   void forwardUnknownShape(Value v) {
-    auto rankedTy = v.getType().dyn_cast<RankedTensorType>();
+    auto rankedTy = mlir::dyn_cast<RankedTensorType>(v.getType());
     if (!rankedTy) return;
     auto id = getAffineSymbolExpr(0, v.getContext());
     auto &dims = insert(ShapeOrValueInfo::getShapeInfoOf(v));
@@ -465,7 +466,7 @@ struct ShapeVisitor {
     backwardsWorklist.push_back(ShapeOrValueInfo::getShapeInfoOf(op.getArg()));
   }
   void forwardShapeOf(shape::ShapeOfOp op) {
-    auto rankedTy = op.getArg().getType().cast<RankedTensorType>();
+    auto rankedTy = mlir::cast<RankedTensorType>(op.getArg().getType());
     auto arg = lookup(ShapeOrValueInfo::getShapeInfoOf(op.getArg()));
     auto &dims = insert(ShapeOrValueInfo::getValueInfoOf(op));
     return dimsFromStaticShape(rankedTy, arg, &dims);
@@ -521,7 +522,7 @@ struct ShapeVisitor {
   void forwardDim(tensor::DimOp op) {
     auto &dims = insert(ShapeOrValueInfo::getValueInfoOf(op));
     if (auto index = op.getIndex().getDefiningOp<arith::ConstantOp>()) {
-      int64_t i = index.getValue().cast<IntegerAttr>().getInt();
+      int64_t i = mlir::cast<IntegerAttr>(index.getValue()).getInt();
       auto in = lookup(ShapeOrValueInfo::getShapeInfoOf(op.getSource()));
       if (i >= static_cast<int64_t>(in.size()) || i < 0)
         llvm::report_fatal_error("tensor dim out of bounds");
@@ -591,7 +592,7 @@ struct ShapeVisitor {
     assert(op.getIndices().size() == 1);
     if (auto index =
             op.getIndices().front().getDefiningOp<arith::ConstantOp>()) {
-      int64_t i = index.getValue().cast<IntegerAttr>().getInt();
+      int64_t i = mlir::cast<IntegerAttr>(index.getValue()).getInt();
       // We asssume this is in bounds.
       auto in = lookup(ShapeOrValueInfo::getValueInfoOf(op.getTensor()));
       dims.push_back({in[i].symbols, in[i].expr});
@@ -661,7 +662,7 @@ struct ShapeVisitor {
     }
     auto &dims = insert(ShapeOrValueInfo::getValueInfoOf(op));
     auto in = lookup(ShapeOrValueInfo::getValueInfoOf(op.getOperand()));
-    auto elem = op.getStartIndices().cast<DenseIntElementsAttr>();
+    auto elem = mlir::cast<DenseIntElementsAttr>(op.getStartIndices());
     auto i = (*elem.begin()).getZExtValue();
     if (i >= in.size()) {  // Bounds check.
       return forwardUnknown(op);
@@ -711,7 +712,7 @@ struct ShapeVisitor {
 
   // Return the size of the first dimension. Returns 1 for scalars.
   static int64_t dim0size(Type type) {
-    if (auto rankedType = type.dyn_cast<RankedTensorType>())
+    if (auto rankedType = mlir::dyn_cast<RankedTensorType>(type))
       return rankedType.getRank() == 0 ? 1 : rankedType.getDimSize(0);
     return 1;
   }
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/transforms/broadcast_propagation/broadcast_propagation.cc b/third_party/xla/xla/mlir_hlo/mhlo/transforms/broadcast_propagation/broadcast_propagation.cc
index 56ea0a42e79c19..da27173913f81e 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/transforms/broadcast_propagation/broadcast_propagation.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/transforms/broadcast_propagation/broadcast_propagation.cc
@@ -33,6 +33,7 @@ limitations under the License.
 #include "mlir/IR/Operation.h"
 #include "mlir/IR/Value.h"
 #include "mlir/Pass/Pass.h"
+#include "mlir/Support/LLVM.h"
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"
 
 namespace mlir {
@@ -152,7 +153,7 @@ void findBroadcastIntents(
 
   // Derive the broadcast intent associated with the root broadcast operation.
   // Add it to the worklist to seed the analysis.
-  rootBcastIntent = {root.getResult().getType().cast<RankedTensorType>(),
+  rootBcastIntent = {mlir::cast<RankedTensorType>(root.getResult().getType()),
                      root.getOperand(), root.getOutputDimensions(),
                      root.getBroadcastDimensions()};
   addToWorklistIfNew(rootBcastIntent);
@@ -177,7 +178,7 @@ void findBroadcastIntents(
             llvm::dyn_cast<DynamicBroadcastInDimOp>(producerOp)) {
       DenseIntElementsAttr composedBcastDims = composeBroadcastDimensionsAttr(
           builder, producerBcastOp.getBroadcastDimensions(),
-          it.broadcastDimensions.cast<DenseIntElementsAttr>());
+          mlir::cast<DenseIntElementsAttr>(it.broadcastDimensions));
       BroadcastIntent bcastedOperandIntent = {
           it.resultType, producerBcastOp.getOperand(), it.outputDimensions,
           composedBcastDims};
@@ -194,7 +195,7 @@ void findBroadcastIntents(
     assert(allowsForElementwiseBroadcastPropagation(producerOp));
     bcastIntentDependencies[it] = {};
     for (auto operand : producerOp->getOperands()) {
-      auto operandTy = operand.getType().cast<RankedTensorType>();
+      auto operandTy = mlir::cast<RankedTensorType>(operand.getType());
       auto operandBcastDims = operandTy.getRank() == 0
                                   ? builder.getI64TensorAttr({})
                                   : it.broadcastDimensions;
@@ -272,7 +273,7 @@ DenseMap<BroadcastIntent, Value> realizeBroadcastIntents(
       realizations[it] = rewriter.create<DynamicBroadcastInDimOp>(
           it.targetValue.getLoc(), it.resultType, it.targetValue,
           it.outputDimensions,
-          it.broadcastDimensions.cast<DenseIntElementsAttr>());
+          mlir::cast<DenseIntElementsAttr>(it.broadcastDimensions));
       continue;
     }
 
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/transforms/collapse_elementwise_map/collapse_elementwise_map.cc b/third_party/xla/xla/mlir_hlo/mhlo/transforms/collapse_elementwise_map/collapse_elementwise_map.cc
index 7f1e7de597b535..60fcd198853911 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/transforms/collapse_elementwise_map/collapse_elementwise_map.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/transforms/collapse_elementwise_map/collapse_elementwise_map.cc
@@ -23,6 +23,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinOps.h"
 #include "mlir/IR/IRMapping.h"
 #include "mlir/Pass/Pass.h"
+#include "mlir/Support/LLVM.h"
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"
 
 namespace mlir {
@@ -73,7 +74,7 @@ struct ConvertMapOfElementwiseOps : public OpRewritePattern<MapOp> {
         operands.push_back(blockAndValueMap.lookup(value));
       auto *newOp = rewriter.create(
           op.getLoc(), op.getName().getIdentifier(), operands,
-          op.getResultTypes()[0].cast<TensorType>().clone(shape));
+          mlir::cast<TensorType>(op.getResultTypes()[0]).clone(shape));
       // Maps the result.
       blockAndValueMap.map(op.getResult(0), newOp->getResult(0));
     }
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/transforms/constraint_fusion/constraint_fusion_pass.cc b/third_party/xla/xla/mlir_hlo/mhlo/transforms/constraint_fusion/constraint_fusion_pass.cc
index 7dc6080c07ccb4..f0d9b2442619dc 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/transforms/constraint_fusion/constraint_fusion_pass.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/transforms/constraint_fusion/constraint_fusion_pass.cc
@@ -25,6 +25,7 @@ limitations under the License.
 #include "mlir/Dialect/Func/IR/FuncOps.h"
 #include "mlir/Dialect/Shape/IR/Shape.h"
 #include "mlir/Pass/Pass.h"
+#include "mlir/Support/LLVM.h"
 
 namespace mlir {
 namespace mhlo {
@@ -286,7 +287,7 @@ LogicalResult analyzeBroadcastableConstraint(
     // For shapes without a definition, expect them to be an argument of the
     // regarded block.
     if (def == nullptr) {
-      auto barg = shape.dyn_cast<BlockArgument>();
+      auto barg = mlir::dyn_cast<BlockArgument>(shape);
       if (!barg || barg.getParentBlock() != theBlock) return failure();
       transitiveBcastableCstrOperands.push_back(
           CstrBroadcastableOperand::valueOf(barg));
@@ -299,7 +300,7 @@ LogicalResult analyzeBroadcastableConstraint(
     if (auto sof = llvm::dyn_cast<shape::ShapeOfOp>(def)) {
       if (!isWithinBlock(sof, theBlock)) return failure();
       tryFlagForErase(theBlock, def, toBeErased);
-      auto barg = sof.getArg().dyn_cast<BlockArgument>();
+      auto barg = mlir::dyn_cast<BlockArgument>(sof.getArg());
       if (!barg) return failure();
       transitiveBcastableCstrOperands.push_back(
           CstrBroadcastableOperand::shapeOf(barg));
@@ -351,7 +352,7 @@ LogicalResult analyzeBlockGlobalConstraints(
     // For witnesses without a definition, expect it to be an argument of the
     // regarded block.
     if (def == nullptr) {
-      auto barg = cstr.dyn_cast<BlockArgument>();
+      auto barg = mlir::dyn_cast<BlockArgument>(cstr);
       if (!barg || barg.getParentBlock() != theBlock) return failure();
       argumentCstrs.push_back(barg);
       continue;
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/transforms/convert_to_signless/convert_to_signless_pass.cc b/third_party/xla/xla/mlir_hlo/mhlo/transforms/convert_to_signless/convert_to_signless_pass.cc
index c95ea747ea1362..dffab945389ee1 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/transforms/convert_to_signless/convert_to_signless_pass.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/transforms/convert_to_signless/convert_to_signless_pass.cc
@@ -33,6 +33,7 @@ limitations under the License.
 #include "mlir/IR/Operation.h"
 #include "mlir/IR/PatternMatch.h"
 #include "mlir/Pass/Pass.h"
+#include "mlir/Support/LLVM.h"
 #include "mlir/Support/LogicalResult.h"
 #include "mlir/Transforms/DialectConversion.h"
 
@@ -86,12 +87,13 @@ class ConvertConstantToSignless
       arith::ConstantOp constantOp, arith::ConstantOpAdaptor adaptor,
       ConversionPatternRewriter& rewriter) const override {
     // We only care about unsigned integers
-    if (!adaptor.getValue().isa<DenseIntElementsAttr>()) return failure();
+    if (!mlir::isa<DenseIntElementsAttr>(adaptor.getValue())) return failure();
 
-    auto values = llvm::to_vector(
-        adaptor.getValue().cast<DenseIntElementsAttr>().getValues<APInt>());
+    auto values =
+        llvm::to_vector(mlir::cast<DenseIntElementsAttr>(adaptor.getValue())
+                            .getValues<APInt>());
     Type type = typeConverter->convertType(constantOp.getType());
-    auto shapedType = type.dyn_cast<ShapedType>();
+    auto shapedType = mlir::dyn_cast<ShapedType>(type);
     auto newValues = DenseIntElementsAttr::get(
         shapedType, values);
 
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/transforms/expand_hlo_tuples/expand_hlo_tuples.cc b/third_party/xla/xla/mlir_hlo/mhlo/transforms/expand_hlo_tuples/expand_hlo_tuples.cc
index 6b514e720fc53b..7b4426d94704d2 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/transforms/expand_hlo_tuples/expand_hlo_tuples.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/transforms/expand_hlo_tuples/expand_hlo_tuples.cc
@@ -32,6 +32,7 @@ limitations under the License.
 #include "mlir/IR/Value.h"
 #include "mlir/Pass/Pass.h"
 #include "mlir/Pass/PassRegistry.h"
+#include "mlir/Support/LLVM.h"
 
 namespace mlir {
 namespace mhlo {
@@ -69,7 +70,7 @@ class ExpandHloTuplesPass
                                                  func.getArguments().end());
     for (auto argument : funcArguments) {
       auto type = argument.getType();
-      auto tupleType = type.dyn_cast_or_null<TupleType>();
+      auto tupleType = mlir::dyn_cast_or_null<TupleType>(type);
       if (!tupleType) {
         expandedInputTypes.push_back(type);
       } else {
@@ -109,7 +110,7 @@ class ExpandHloTuplesPass
     SmallVector<Value, 4> expandedReturnOperands;
     SmallVector<Type, 4> expandedResultTypes;
     for (auto value : returnOp.getOperands()) {
-      if (auto tupleTy = value.getType().dyn_cast<TupleType>()) {
+      if (auto tupleTy = mlir::dyn_cast<TupleType>(value.getType())) {
         llvm::copy(tupleTy.getTypes(), std::back_inserter(expandedResultTypes));
         for (auto [index, ty] : llvm::enumerate(tupleTy.getTypes())) {
           expandedReturnOperands.push_back(
@@ -145,7 +146,7 @@ class ExpandHloTuplesPass
     while (
         llvm::any_of(llvm::concat<const Type>(entryFunction.getArgumentTypes(),
                                               entryFunction.getResultTypes()),
-                     [](Type type) { return type.isa<TupleType>(); })) {
+                     [](Type type) { return mlir::isa<TupleType>(type); })) {
       expandTupledTensorInReturnOp(entryFunction);
     }
   }
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/transforms/expand_ops_simplifier/expand_ops_simplifier.cc b/third_party/xla/xla/mlir_hlo/mhlo/transforms/expand_ops_simplifier/expand_ops_simplifier.cc
index 5113736c0b3bba..b75f13e5c8417b 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/transforms/expand_ops_simplifier/expand_ops_simplifier.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/transforms/expand_ops_simplifier/expand_ops_simplifier.cc
@@ -31,6 +31,7 @@ limitations under the License.
 #include "mlir/IR/PatternMatch.h"
 #include "mlir/IR/Value.h"
 #include "mlir/Pass/Pass.h"
+#include "mlir/Support/LLVM.h"
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"
 
 namespace mlir {
@@ -162,7 +163,7 @@ struct SelectAndScatterExpanderPattern
 
     llvm::SmallVector<int64_t> concatenatedIotasDims;
     concatenatedIotasDims.reserve(
-        iotaIndices.front().getType().cast<ShapedType>().getRank());
+        mlir::cast<ShapedType>(iotaIndices.front().getType()).getRank());
     concatenatedIotasDims.insert(concatenatedIotasDims.end(),
                                  broadcastedIotaDims.begin(),
                                  broadcastedIotaDims.end());
@@ -189,8 +190,8 @@ struct SelectAndScatterExpanderPattern
     llvm::SmallVector<Type> scatterIns;
     llvm::SmallVector<Location> scatterLocs;
     scatterIns.push_back(RankedTensorType::get(
-        {},
-        broadcastedInitValue.getType().cast<ShapedType>().getElementType()));
+        {}, mlir::cast<ShapedType>(broadcastedInitValue.getType())
+                .getElementType()));
     scatterIns.push_back(
         RankedTensorType::get({}, source.getType().getElementType()));
     scatterLocs.push_back(broadcastedInitValue.getLoc());
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/transforms/group_reduction_dimensions/group_reduction_dimensions.cc b/third_party/xla/xla/mlir_hlo/mhlo/transforms/group_reduction_dimensions/group_reduction_dimensions.cc
index d2058c0e23254f..7bbc78cd0dc598 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/transforms/group_reduction_dimensions/group_reduction_dimensions.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/transforms/group_reduction_dimensions/group_reduction_dimensions.cc
@@ -31,6 +31,7 @@ limitations under the License.
 #include "mlir/IR/MLIRContext.h"
 #include "mlir/IR/Types.h"
 #include "mlir/Pass/Pass.h"
+#include "mlir/Support/LLVM.h"
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"
 
 namespace mlir {
@@ -226,8 +227,9 @@ LogicalResult tryLowerTo1DOr2DReduction(
   auto reductionDimAttr = rewriter.getI64VectorAttr({reductionDim});
   Value initVal = op.getInitValues().front();
   SmallVector<Type> elementTypes{llvm::map_range(
-      op.getBody().front().getTerminator()->getOperands(),
-      [](Value v) { return v.getType().cast<ShapedType>().getElementType(); })};
+      op.getBody().front().getTerminator()->getOperands(), [](Value v) {
+        return mlir::cast<ShapedType>(v.getType()).getElementType();
+      })};
   auto reductionOp = rewriter.create<ReduceOp>(loc, intermResult, initVal,
                                                reductionDimAttr, elementTypes);
   rewriter.inlineRegionBefore(op.getBody(), reductionOp.getBody(),
@@ -235,7 +237,7 @@ LogicalResult tryLowerTo1DOr2DReduction(
   intermResult = reductionOp->getResults().front();
 
   // Restore the expected shape by dynamic reshape, if required.
-  auto resultTy = op->getResultTypes().front().cast<RankedTensorType>();
+  auto resultTy = mlir::cast<RankedTensorType>(op->getResultTypes().front());
   if (requiresDynamicReshape) {
     assert(resultShape && "expect to have reified the result shape");
     intermResult = rewriter.create<DynamicReshapeOp>(
@@ -245,7 +247,7 @@ LogicalResult tryLowerTo1DOr2DReduction(
   // Othwerise, restore the expected shape by shape expansion, if required.
   int64_t resultRank = resultTy.getRank();
   int64_t intermResultRank =
-      intermResult.getType().cast<RankedTensorType>().getRank();
+      mlir::cast<RankedTensorType>(intermResult.getType()).getRank();
   bool requiresExpand =
       !requiresDynamicReshape && resultRank != intermResultRank;
   if (requiresExpand) {
@@ -276,11 +278,11 @@ struct GroupReductionDimensionsPattern : public OpRewritePattern<ReduceOp> {
       return failure();
     Value arg = op.getInputs().front();
     // Only apply to non-sparse tensors.
-    if (auto rtp = arg.getType().cast<RankedTensorType>();
+    if (auto rtp = mlir::cast<RankedTensorType>(arg.getType());
         rtp.getEncoding() != nullptr)
       return failure();
 
-    auto argTy = arg.getType().cast<RankedTensorType>();
+    auto argTy = mlir::cast<RankedTensorType>(arg.getType());
 
     // Sort reduction dimensions, which is not an invariant of the op.
     SmallVector<int64_t> orderedReductionDims =
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/transforms/hlo_legalize_shape_ops_to_standard/hlo_legalize_shape_ops_to_standard.cc b/third_party/xla/xla/mlir_hlo/mhlo/transforms/hlo_legalize_shape_ops_to_standard/hlo_legalize_shape_ops_to_standard.cc
index 702deddaa0a51b..31a5d7592ce9b7 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/transforms/hlo_legalize_shape_ops_to_standard/hlo_legalize_shape_ops_to_standard.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/transforms/hlo_legalize_shape_ops_to_standard/hlo_legalize_shape_ops_to_standard.cc
@@ -38,6 +38,7 @@ limitations under the License.
 #include "mlir/IR/MLIRContext.h"
 #include "mlir/Pass/Pass.h"
 #include "mlir/Pass/PassManager.h"
+#include "mlir/Support/LLVM.h"
 #include "mlir/Support/LogicalResult.h"
 #include "mlir/Transforms/DialectConversion.h"
 
@@ -61,7 +62,7 @@ struct ComputeReshapeShapeConversion
     auto indexType = rewriter.getIndexType();
     auto numElements = adaptor.getOperands()[0];
     auto targetShapeType =
-        adaptor.getOperands()[1].getType().cast<ShapedType>();
+        mlir::cast<ShapedType>(adaptor.getOperands()[1].getType());
     auto extentType =
         shape::getExtentTensorType(ctx, targetShapeType.getDimSize(0));
 
@@ -128,7 +129,7 @@ struct CstrReshapableConversion
     Value one = rewriter.create<arith::ConstantIndexOp>(loc, 1);
     auto numElements = adaptor.getOperands()[0];
     auto targetShapeType =
-        adaptor.getOperands()[1].getType().cast<ShapedType>();
+        mlir::cast<ShapedType>(adaptor.getOperands()[1].getType());
     auto extentType =
         shape::getExtentTensorType(ctx, targetShapeType.getDimSize(0));
 
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/transforms/hlo_legalize_to_arithmetic/hlo_legalize_to_arithmetic.cc b/third_party/xla/xla/mlir_hlo/mhlo/transforms/hlo_legalize_to_arithmetic/hlo_legalize_to_arithmetic.cc
index fead7be62bf1c2..a3a9f6664f9544 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/transforms/hlo_legalize_to_arithmetic/hlo_legalize_to_arithmetic.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/transforms/hlo_legalize_to_arithmetic/hlo_legalize_to_arithmetic.cc
@@ -28,6 +28,7 @@ limitations under the License.
 #include "mlir/Dialect/Tensor/IR/Tensor.h"
 #include "mlir/IR/BuiltinDialect.h"
 #include "mlir/Pass/Pass.h"
+#include "mlir/Support/LLVM.h"
 #include "mlir/Transforms/DialectConversion.h"
 
 namespace mlir {
@@ -125,7 +126,7 @@ struct ScalarHloToArithmeticPattern : public OpConversionPattern<OpTy> {
     if (filterFn && !filterFn(op)) return failure();
 
     auto isScalar = [&](Value v) {
-      return v.getType().cast<ShapedType>().getRank() == 0;
+      return mlir::cast<ShapedType>(v.getType()).getRank() == 0;
     };
 
     if (!llvm::all_of(adaptor.getOperands(), isScalar))
@@ -134,8 +135,8 @@ struct ScalarHloToArithmeticPattern : public OpConversionPattern<OpTy> {
     auto loc = op.getLoc();
 
     std::optional<ShapedType> resultTy;
-    resultTy = this->typeConverter->convertType(op->getResultTypes().front())
-                   .template dyn_cast<ShapedType>();
+    resultTy = mlir::dyn_cast<ShapedType>(
+        this->typeConverter->convertType(op->getResultTypes().front()));
 
     SmallVector<Value> operands;
     for (auto operand : adaptor.getOperands()) {
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/transforms/hlo_legalize_to_memref/hlo_legalize_to_memref.cc b/third_party/xla/xla/mlir_hlo/mhlo/transforms/hlo_legalize_to_memref/hlo_legalize_to_memref.cc
index 1df0035b53e6fe..a27a4d683625bf 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/transforms/hlo_legalize_to_memref/hlo_legalize_to_memref.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/transforms/hlo_legalize_to_memref/hlo_legalize_to_memref.cc
@@ -33,6 +33,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinTypes.h"
 #include "mlir/IR/Value.h"
 #include "mlir/Pass/Pass.h"
+#include "mlir/Support/LLVM.h"
 
 namespace mlir {
 namespace mhlo {
@@ -76,14 +77,14 @@ struct CustomCallOpInterface
     SmallVector<Value> bufferArgs;
     for (OpOperand &operand : customCallOp->getOpOperands()) {
       auto &newBuffer = bufferArgs.emplace_back();
-      if (operand.get().getType().isa<mhlo::TokenType>()) {
+      if (mlir::isa<mhlo::TokenType>(operand.get().getType())) {
         // Remember the token for later. We need it for the return value but
         // it's not getting passed to LMHLO.
         if (tokenArgument) return failure();
         tokenArgument = operand.get();
         continue;
       }
-      if (!operand.get().getType().isa<TensorType>()) return failure();
+      if (!mlir::isa<TensorType>(operand.get().getType())) return failure();
       FailureOr<Value> operandBuffer =
           getBuffer(rewriter, operand.get(), options);
       if (failed(operandBuffer)) return failure();
@@ -93,10 +94,10 @@ struct CustomCallOpInterface
     // Allocate outputs.
     for (OpResult result : customCallOp->getOpResults()) {
       auto &newBuffer = bufferArgs.emplace_back();
-      if (result.getType().isa<mhlo::TokenType>()) {
+      if (mlir::isa<mhlo::TokenType>(result.getType())) {
         continue;
       }
-      auto tensorType = result.getType().dyn_cast<RankedTensorType>();
+      auto tensorType = mlir::dyn_cast<RankedTensorType>(result.getType());
       if (!tensorType) return failure();
       // TODO(springerm): Create alloc_tensor ops during TensorCopyInsertion.
       AnalysisState analysisState(options);
@@ -185,7 +186,7 @@ struct ReshapeOpInterface
                           const BufferizationOptions &options) const {
     auto reshapeOp = cast<mhlo::ReshapeOp>(op);
     auto unrankedOperandType =
-        reshapeOp.getOperand().getType().dyn_cast<UnrankedTensorType>();
+        mlir::dyn_cast<UnrankedTensorType>(reshapeOp.getOperand().getType());
     if (unrankedOperandType == nullptr) return success();
 
     // The buffer still has the old (pre-reshape) type.
@@ -193,7 +194,7 @@ struct ReshapeOpInterface
         getBuffer(rewriter, reshapeOp.getOperand(), options);
     if (failed(operandBuffer)) return failure();
 
-    auto resultType = reshapeOp.getType().cast<RankedTensorType>();
+    auto resultType = mlir::cast<RankedTensorType>(reshapeOp.getType());
     auto destType =
         MemRefType::get(resultType.getShape(), resultType.getElementType());
     replaceOpWithNewBufferizedOp<memref::CastOp>(rewriter, op, destType,
@@ -233,16 +234,16 @@ struct DynamicReshapeOpInterface
 
     ShapedType resultType;
     TensorType opResultType = reshapeOp.getType();
-    if (auto rankedType = opResultType.dyn_cast<RankedTensorType>()) {
+    if (auto rankedType = mlir::dyn_cast<RankedTensorType>(opResultType)) {
       resultType =
           MemRefType::get(rankedType.getShape(), rankedType.getElementType());
     } else if (auto unrankedType =
-                   opResultType.dyn_cast<UnrankedTensorType>()) {
+                   mlir::dyn_cast<UnrankedTensorType>(opResultType)) {
       resultType = UnrankedMemRefType::get(unrankedType.getElementType(), 0);
     }
     auto operand = *operandBuffer;
     // If the operand has a non-identity affine map, we will have to add a copy.
-    auto bufferType = operandBuffer->getType().dyn_cast<MemRefType>();
+    auto bufferType = mlir::dyn_cast<MemRefType>(operandBuffer->getType());
     if (bufferType && !bufferType.getLayout().isIdentity()) {
       // TODO(springerm): Create alloc_tensor ops during TensorCopyInsertion.
       AnalysisState analysisState(options);
@@ -268,11 +269,11 @@ FailureOr<Value> insertDynamicMemrefCastOp(
     mhlo::DynamicBroadcastInDimOp op, Value operand, RewriterBase &rewriter,
     const BufferizationOptions &options) {
   auto loc = op.getLoc();
-  auto operandType = operand.getType().cast<MemRefType>();
+  auto operandType = mlir::cast<MemRefType>(operand.getType());
   auto operandShape = operandType.getShape();
   auto operandRank = operandType.getRank();
 
-  auto resultType = op.getType().cast<RankedTensorType>();
+  auto resultType = mlir::cast<RankedTensorType>(op.getType());
   auto resultRank = resultType.getRank();
 
   Value zero = rewriter.create<arith::ConstantIndexOp>(loc, 0);
@@ -380,7 +381,8 @@ struct DynamicBroadcastInDimOpInterface
   LogicalResult bufferize(Operation *op, RewriterBase &rewriter,
                           const BufferizationOptions &options) const {
     auto broadcastInDimOp = cast<mhlo::DynamicBroadcastInDimOp>(op);
-    auto resultType = broadcastInDimOp.getType().dyn_cast<RankedTensorType>();
+    auto resultType =
+        mlir::dyn_cast<RankedTensorType>(broadcastInDimOp.getType());
     if (!resultType) return success();
 
     // The buffer still has the old (pre-reshape) type.
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/transforms/hlo_legalize_to_stablehlo/hlo_legalize_to_stablehlo.cc b/third_party/xla/xla/mlir_hlo/mhlo/transforms/hlo_legalize_to_stablehlo/hlo_legalize_to_stablehlo.cc
index a7ef5e93d1585b..5dc68ffc7762a8 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/transforms/hlo_legalize_to_stablehlo/hlo_legalize_to_stablehlo.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/transforms/hlo_legalize_to_stablehlo/hlo_legalize_to_stablehlo.cc
@@ -34,6 +34,7 @@ limitations under the License.
 #include "mlir/IR/SymbolTable.h"
 #include "mlir/IR/Types.h"
 #include "mlir/Support/DebugStringHelper.h"
+#include "mlir/Support/LLVM.h"
 #include "mlir/Support/LogicalResult.h"
 #include "mlir/Transforms/DialectConversion.h"
 #include "mlir/Transforms/RegionUtils.h"
@@ -81,7 +82,7 @@ bool hasPrivateFeaturesNotInStablehlo(HloOpTy hloOp) {
 bool hasPackedNibble(std::optional<ArrayAttr> precisionConfigAttr) {
   if (!precisionConfigAttr) return false;
   return llvm::any_of(*precisionConfigAttr, [&](Attribute attr) {
-    auto precisionAttr = attr.cast<mhlo::PrecisionAttr>();
+    auto precisionAttr = mlir::cast<mhlo::PrecisionAttr>(attr);
     return precisionAttr.getValue() == mhlo::Precision::PACKED_NIBBLE;
   });
 }
@@ -214,7 +215,7 @@ bool isDenseI64Array(mlir::StringAttr hloName) {
 
 template <typename StablehloOpTy>
 Attribute convertDenseArray(mlir::StringAttr hloName, Attribute hloAttr) {
-  auto denseInts = hloAttr.dyn_cast<DenseIntElementsAttr>();
+  auto denseInts = mlir::dyn_cast<DenseIntElementsAttr>(hloAttr);
   if (!denseInts) return {};
 
   if ((std::is_same<StablehloOpTy, stablehlo::ConvolutionOp>::value ||
@@ -243,17 +244,17 @@ Attribute convertAttr(Attribute hloAttr) {
   // Handle MHLO attributes.
   // The logic that handles attributes from other dialects (e.g. builtin
   // attributes) lives below.
-  if (auto attr = hloAttr.dyn_cast<mhlo::ChannelHandleAttr>()) {
+  if (auto attr = mlir::dyn_cast<mhlo::ChannelHandleAttr>(hloAttr)) {
     return stablehlo::ChannelHandleAttr::get(attr.getContext(),
                                              attr.getHandle(), attr.getType());
   }
-  if (auto attr = hloAttr.dyn_cast<mhlo::ComparisonDirectionAttr>()) {
+  if (auto attr = mlir::dyn_cast<mhlo::ComparisonDirectionAttr>(hloAttr)) {
     RETURN_CONVERTED_ENUM_ATTR(ComparisonDirection);
   }
-  if (auto attr = hloAttr.dyn_cast<mhlo::ComparisonTypeAttr>()) {
+  if (auto attr = mlir::dyn_cast<mhlo::ComparisonTypeAttr>(hloAttr)) {
     RETURN_CONVERTED_ENUM_ATTR(ComparisonType);
   }
-  if (auto attr = hloAttr.dyn_cast<mhlo::ConvDimensionNumbersAttr>()) {
+  if (auto attr = mlir::dyn_cast<mhlo::ConvDimensionNumbersAttr>(hloAttr)) {
     return stablehlo::ConvDimensionNumbersAttr::get(
         attr.getContext(), attr.getInputBatchDimension(),
         attr.getInputFeatureDimension(), attr.getInputSpatialDimensions(),
@@ -264,44 +265,44 @@ Attribute convertAttr(Attribute hloAttr) {
   }
   // NOTE: We cannot process CustomCallApiVersionAttr here because
   // `dyn_cast<mhlo::CustomCallApiVersionAttr>()` succeeds for IntegerAttr too.
-  if (auto attr = hloAttr.dyn_cast<mhlo::DotDimensionNumbersAttr>()) {
+  if (auto attr = mlir::dyn_cast<mhlo::DotDimensionNumbersAttr>(hloAttr)) {
     return stablehlo::DotDimensionNumbersAttr::get(
         attr.getContext(), attr.getLhsBatchingDimensions(),
         attr.getRhsBatchingDimensions(), attr.getLhsContractingDimensions(),
         attr.getRhsContractingDimensions());
   }
-  if (auto attr = hloAttr.dyn_cast<mhlo::FftTypeAttr>()) {
+  if (auto attr = mlir::dyn_cast<mhlo::FftTypeAttr>(hloAttr)) {
     RETURN_CONVERTED_ENUM_ATTR(FftType);
   }
-  if (auto attr = hloAttr.dyn_cast<mhlo::GatherDimensionNumbersAttr>()) {
+  if (auto attr = mlir::dyn_cast<mhlo::GatherDimensionNumbersAttr>(hloAttr)) {
     return stablehlo::GatherDimensionNumbersAttr::get(
         attr.getContext(), attr.getOffsetDims(), attr.getCollapsedSliceDims(),
         attr.getStartIndexMap(), attr.getIndexVectorDim());
   }
-  if (auto attr = hloAttr.dyn_cast<mhlo::OutputOperandAliasAttr>()) {
+  if (auto attr = mlir::dyn_cast<mhlo::OutputOperandAliasAttr>(hloAttr)) {
     return stablehlo::OutputOperandAliasAttr::get(
         attr.getContext(), attr.getOutputTupleIndices(), attr.getOperandIndex(),
         attr.getOperandTupleIndices());
   }
-  if (auto attr = hloAttr.dyn_cast<mhlo::PrecisionAttr>()) {
+  if (auto attr = mlir::dyn_cast<mhlo::PrecisionAttr>(hloAttr)) {
     // StableHLO Precision doesn't support PACKED_NIBBLE yet.
     // Proposal: https://github.com/openxla/stablehlo/issues/742.
     if (attr.getValue() == mhlo::Precision::PACKED_NIBBLE) return {};
     RETURN_CONVERTED_ENUM_ATTR(Precision);
   }
-  if (auto attr = hloAttr.dyn_cast<mhlo::RngAlgorithmAttr>()) {
+  if (auto attr = mlir::dyn_cast<mhlo::RngAlgorithmAttr>(hloAttr)) {
     RETURN_CONVERTED_ENUM_ATTR(RngAlgorithm);
   }
-  if (auto attr = hloAttr.dyn_cast<mhlo::RngDistributionAttr>()) {
+  if (auto attr = mlir::dyn_cast<mhlo::RngDistributionAttr>(hloAttr)) {
     RETURN_CONVERTED_ENUM_ATTR(RngDistribution);
   }
-  if (auto attr = hloAttr.dyn_cast<mhlo::ScatterDimensionNumbersAttr>()) {
+  if (auto attr = mlir::dyn_cast<mhlo::ScatterDimensionNumbersAttr>(hloAttr)) {
     return stablehlo::ScatterDimensionNumbersAttr::get(
         attr.getContext(), attr.getUpdateWindowDims(),
         attr.getInsertedWindowDims(), attr.getScatterDimsToOperandDims(),
         attr.getIndexVectorDim());
   }
-  if (auto attr = hloAttr.dyn_cast<mhlo::TransposeAttr>()) {
+  if (auto attr = mlir::dyn_cast<mhlo::TransposeAttr>(hloAttr)) {
     RETURN_CONVERTED_ENUM_ATTR(Transpose);
   }
   if (hloAttr.getDialect().getNamespace() ==
@@ -316,7 +317,7 @@ Attribute convertAttr(Attribute hloAttr) {
   // Handle non-MHLO attributes.
   // If an attribute is not defined in MHLO, then it is unchanged,
   // with the exception of ArrayAttr which is converted recursively.
-  if (auto hloAttrs = hloAttr.dyn_cast<ArrayAttr>()) {
+  if (auto hloAttrs = mlir::dyn_cast<ArrayAttr>(hloAttr)) {
     SmallVector<Attribute> stablehloAttrs;
     for (auto hloAttr : hloAttrs) {
       auto stablehloAttr = convertAttr(hloAttr);
@@ -338,11 +339,11 @@ Attribute convertAttr(Attribute hloAttr) {
 // we can fork and  modify the code of `stringifyPrecision` as needed for
 // compatibility.
 Attribute encodePrecisionConfig(Attribute hloAttrs) {
-  auto hloArrayAttr = hloAttrs.dyn_cast<ArrayAttr>();
+  auto hloArrayAttr = mlir::dyn_cast<ArrayAttr>(hloAttrs);
   if (!hloArrayAttr) return {};
   SmallVector<Attribute> stablehloAttrs;
   for (auto hloAttr : hloArrayAttr) {
-    auto precisionAttr = hloAttr.dyn_cast<mhlo::PrecisionAttr>();
+    auto precisionAttr = mlir::dyn_cast<mhlo::PrecisionAttr>(hloAttr);
     if (!precisionAttr) return {};
     StringRef precisionStr = mhlo::stringifyPrecision(precisionAttr.getValue());
     if (precisionStr.empty()) return {};
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_control_flow/legalize_control_flow.cc b/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_control_flow/legalize_control_flow.cc
index d56a1da7591094..9d473b9a058936 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_control_flow/legalize_control_flow.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_control_flow/legalize_control_flow.cc
@@ -64,8 +64,8 @@ void inlineMhloRegionIntoSCFRegion(PatternRewriter& rewriter, Region& mhlo,
 // scalar value when necessary.
 Value extractTensorValue(OpBuilder& b, Value tensor) {
   auto loc = tensor.getLoc();
-  if (tensor.getType().cast<TensorType>().hasRank() &&
-      tensor.getType().cast<TensorType>().getRank() != 0) {
+  if (mlir::cast<TensorType>(tensor.getType()).hasRank() &&
+      mlir::cast<TensorType>(tensor.getType()).getRank() != 0) {
     tensor = b.create<tensor::CollapseShapeOp>(
         loc, tensor, SmallVector<ReassociationIndices>());
   }
@@ -85,9 +85,9 @@ std::optional<ScfForBounds> extractForBounds(mhlo::WhileOp op) {
   if (cond.getOperations().size() != 2) return std::nullopt;
 
   auto matchBbArg = [](Value v, Block& block) -> std::optional<unsigned> {
-    if (!v.isa<BlockArgument>() || v.getParentBlock() != &block)
+    if (!mlir::isa<BlockArgument>(v) || v.getParentBlock() != &block)
       return std::nullopt;
-    return v.cast<BlockArgument>().getArgNumber();
+    return mlir::cast<BlockArgument>(v).getArgNumber();
   };
 
   auto compare = llvm::dyn_cast<mhlo::CompareOp>(cond.front());
@@ -207,10 +207,10 @@ struct CaseOpPattern : public OpConversionPattern<mhlo::CaseOp> {
 
     // Determine if the current index matches the case index.
     auto scalarType = idxValue.getType();
-    auto shapedType = scalarType.cast<ShapedType>();
+    auto shapedType = mlir::cast<ShapedType>(scalarType);
     auto constAttr = DenseElementsAttr::get(
-        shapedType,
-        {outerBuilder.getI32IntegerAttr(currentIdx).cast<mlir::Attribute>()});
+        shapedType, {mlir::cast<mlir::Attribute>(
+                        outerBuilder.getI32IntegerAttr(currentIdx))});
     Value currentIdxVal = outerBuilder.create<mhlo::ConstantOp>(
         loc, idxValue.getType(), constAttr);
 
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_cross_replica_sum_to_all_reduce/legalize_cross_replica_sum_to_all_reduce.cc b/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_cross_replica_sum_to_all_reduce/legalize_cross_replica_sum_to_all_reduce.cc
index dfc541c591a4da..0ddd409bf3f583 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_cross_replica_sum_to_all_reduce/legalize_cross_replica_sum_to_all_reduce.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_cross_replica_sum_to_all_reduce/legalize_cross_replica_sum_to_all_reduce.cc
@@ -25,6 +25,7 @@ limitations under the License.
 #include "mlir/IR/PatternMatch.h"
 #include "mlir/IR/Value.h"
 #include "mlir/Pass/Pass.h"
+#include "mlir/Support/LLVM.h"
 #include "mlir/Support/LogicalResult.h"
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"
 
@@ -49,11 +50,10 @@ struct CrossReplicaSumToAllReducePattern
         /*use_global_device_ids=*/false);
 
     auto *block = rewriter.createBlock(&allReduceOp.getComputation());
-    auto elementType = RankedTensorType::get({}, allReduceOp.getResults()
-                                                     .front()
-                                                     .getType()
-                                                     .dyn_cast<TensorType>()
-                                                     .getElementType());
+    auto elementType = RankedTensorType::get(
+        {},
+        mlir::dyn_cast<TensorType>(allReduceOp.getResults().front().getType())
+            .getElementType());
     auto location = allReduceOp.getComputation().getLoc();
     block->addArguments({elementType, elementType}, {location, location});
 
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_dot_general_to_dot/legalize_dot_general_to_dot.cc b/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_dot_general_to_dot/legalize_dot_general_to_dot.cc
index ea37c6104e62cd..6c2c26e3d28bf5 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_dot_general_to_dot/legalize_dot_general_to_dot.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_dot_general_to_dot/legalize_dot_general_to_dot.cc
@@ -24,6 +24,7 @@ limitations under the License.
 #include "mlir/IR/MLIRContext.h"
 #include "mlir/IR/PatternMatch.h"
 #include "mlir/Pass/Pass.h"
+#include "mlir/Support/LLVM.h"
 #include "mlir/Support/LogicalResult.h"
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"
 
@@ -44,8 +45,8 @@ struct DotGeneralToDot : public OpRewritePattern<DotGeneralOp> {
                                 PatternRewriter& rewriter) const override {
     auto lhs = dot.getLhs();
     auto rhs = dot.getRhs();
-    auto lhsTy = lhs.getType().cast<ShapedType>();
-    auto rhsTy = rhs.getType().cast<ShapedType>();
+    auto lhsTy = mlir::cast<ShapedType>(lhs.getType());
+    auto rhsTy = mlir::cast<ShapedType>(rhs.getType());
 
     int64_t lhsRank = lhsTy.getRank();
     int64_t rhsRank = rhsTy.getRank();
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_einsum_to_dot_general/legalize_einsum_to_dot_general.cc b/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_einsum_to_dot_general/legalize_einsum_to_dot_general.cc
index 0dc4495cdbbc6c..f8c0f9eafd7c83 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_einsum_to_dot_general/legalize_einsum_to_dot_general.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_einsum_to_dot_general/legalize_einsum_to_dot_general.cc
@@ -25,6 +25,7 @@ limitations under the License.
 #include "mlir/Dialect/Func/IR/FuncOps.h"
 #include "mlir/IR/BuiltinOps.h"
 #include "mlir/Pass/Pass.h"
+#include "mlir/Support/LLVM.h"
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"
 
 namespace mlir {
@@ -68,8 +69,8 @@ struct EinsumToDotGeneralPattern : public OpRewritePattern<EinsumOp> {
       index++;
     }
 
-    auto lhsType = einsum.getLhs().getType().cast<RankedTensorType>();
-    auto rhsType = einsum.getRhs().getType().cast<RankedTensorType>();
+    auto lhsType = mlir::cast<RankedTensorType>(einsum.getLhs().getType());
+    auto rhsType = mlir::cast<RankedTensorType>(einsum.getRhs().getType());
     assert(static_cast<int64_t>(lhsTokens.size()) == lhsType.getRank());
     assert(static_cast<int64_t>(rhsTokens.size()) == rhsType.getRank());
 
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_gather_to_torch_index_select/legalize_gather_to_torch_index_select.cc b/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_gather_to_torch_index_select/legalize_gather_to_torch_index_select.cc
index aba642b45cdf09..34837951b24eef 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_gather_to_torch_index_select/legalize_gather_to_torch_index_select.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_gather_to_torch_index_select/legalize_gather_to_torch_index_select.cc
@@ -23,6 +23,7 @@ limitations under the License.
 #include "mlir/Dialect/Func/IR/FuncOps.h"
 #include "mlir/IR/BuiltinOps.h"
 #include "mlir/Pass/Pass.h"
+#include "mlir/Support/LLVM.h"
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"
 
 namespace mlir {
@@ -39,13 +40,13 @@ struct GatherIsTorchIndexSelect : public OpRewritePattern<GatherOp> {
   LogicalResult matchAndRewrite(GatherOp gather,
                                 PatternRewriter &rewriter) const override {
     auto startIndices = gather.getStartIndices();
-    auto startIndicesTy = startIndices.getType().cast<ShapedType>();
+    auto startIndicesTy = mlir::cast<ShapedType>(startIndices.getType());
     if (!startIndicesTy.hasRank()) {
       return rewriter.notifyMatchFailure(gather, "unranked start_indices");
     }
 
     auto operand = gather.getOperand();
-    auto operandTy = operand.getType().cast<ShapedType>();
+    auto operandTy = mlir::cast<ShapedType>(operand.getType());
     if (!operandTy.hasRank()) {
       return rewriter.notifyMatchFailure(gather, "unranked operand");
     }
@@ -73,7 +74,8 @@ struct GatherIsTorchIndexSelect : public OpRewritePattern<GatherOp> {
       return rewriter.notifyMatchFailure(gather, "start_index_map != [0]");
     }
 
-    auto resultTy = gather.getResult().getType().dyn_cast<RankedTensorType>();
+    auto resultTy =
+        mlir::dyn_cast<RankedTensorType>(gather.getResult().getType());
     if (!resultTy) {
       return rewriter.notifyMatchFailure(gather, "unranked result");
     }
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_shape_computations/legalize_shape_computations.cc b/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_shape_computations/legalize_shape_computations.cc
index 7a8feb69caf9cb..935465d2dabaa6 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_shape_computations/legalize_shape_computations.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_shape_computations/legalize_shape_computations.cc
@@ -46,6 +46,7 @@ limitations under the License.
 #include "mlir/IR/TypeUtilities.h"
 #include "mlir/Pass/Pass.h"
 #include "mlir/Pass/PassManager.h"
+#include "mlir/Support/LLVM.h"
 #include "mlir/Support/LogicalResult.h"
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"
 
@@ -62,7 +63,7 @@ namespace {
 bool opIsShapeComputation(Operation *op) {
   bool foundFromElements = false;
   for (auto operand : op->getOperands()) {
-    auto shapedTy = operand.getType().template cast<ShapedType>();
+    auto shapedTy = mlir::cast<ShapedType>(operand.getType());
     if (!shapedTy.hasRank() || shapedTy.getRank() > 1) return false;
     if (auto fromElements =
             operand.template getDefiningOp<tensor::FromElementsOp>()) {
@@ -82,14 +83,14 @@ class MhloElementwiseConverter : public OpRewritePattern<OpTy> {
                                 PatternRewriter &rewriter) const final {
     if (!opIsShapeComputation(op)) return failure();
 
-    auto resultTy = op.getType().template cast<ShapedType>();
+    auto resultTy = mlir::cast<ShapedType>(op.getType());
 
     Location loc = op.getLoc();
     SmallVector<Value> operands;
     for (int i = 0, s = resultTy.getNumElements(); i < s; i++) {
       SmallVector<Value> extracts;
       for (auto operand : op->getOperands()) {
-        ShapedType operandTy = operand.getType().template cast<ShapedType>();
+        ShapedType operandTy = mlir::cast<ShapedType>(operand.getType());
         if (operandTy.getRank() == 0) {
           Value extract =
               rewriter.create<tensor::ExtractOp>(loc, operand, ValueRange({}));
@@ -121,12 +122,12 @@ class ConcatenateConverter : public OpRewritePattern<mhlo::ConcatenateOp> {
     if (!opIsShapeComputation(op)) return failure();
 
     Location loc = op.getLoc();
-    auto resultTy = op.getType().cast<ShapedType>();
+    auto resultTy = mlir::cast<ShapedType>(op.getType());
     llvm::SmallVector<Value> elements;
     elements.reserve(resultTy.getNumElements());
 
     for (auto operand : op->getOperands()) {
-      ShapedType operandTy = operand.getType().template cast<ShapedType>();
+      ShapedType operandTy = mlir::cast<ShapedType>(operand.getType());
       if (operandTy.getRank() == 0) {
         Value extract =
             rewriter.create<tensor::ExtractOp>(loc, operand, ValueRange({}));
@@ -174,10 +175,10 @@ class ReshapeConverter : public OpRewritePattern<mhlo::ReshapeOp> {
   LogicalResult matchAndRewrite(mhlo::ReshapeOp op,
                                 PatternRewriter &rewriter) const final {
     auto operand = op.getOperand();
-    auto shapedTy = operand.getType().template cast<ShapedType>();
+    auto shapedTy = mlir::cast<ShapedType>(operand.getType());
     if (!shapedTy.hasRank() || shapedTy.getRank() > 1) return failure();
 
-    auto resultTy = op.getType().cast<ShapedType>();
+    auto resultTy = mlir::cast<ShapedType>(op.getType());
 
     auto fromElements = op.getOperand().getDefiningOp<tensor::FromElementsOp>();
     if (!fromElements) return failure();
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_sort/legalize_sort.cc b/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_sort/legalize_sort.cc
index 6446995a7e91fb..8ba9de9a1a10f4 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_sort/legalize_sort.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_sort/legalize_sort.cc
@@ -139,7 +139,7 @@ SmallVector<Value> loadTensorElements(ImplicitLocOpBuilder& b,
 SmallVector<Value> loadMemrefElements(ImplicitLocOpBuilder& b,
                                       ValueRange memrefs, Value index) {
   return llvm::to_vector(llvm::map_range(memrefs, [&](Value memref) -> Value {
-    Type type = memref.getType().cast<MemRefType>().getElementType();
+    Type type = mlir::cast<MemRefType>(memref.getType()).getElementType();
     return b.create<memref::LoadOp>(type, memref, index);
   }));
 }
@@ -414,25 +414,24 @@ struct Slicer {
   }
 
   MemRefType toSlicedType(MemRefType sourceType) {
-    return memref::SubViewOp::inferRankReducedResultType(
-               {ShapedType::kDynamic} /*1D output*/, sourceType, offsets, sizes,
-               strides)
-        .cast<MemRefType>();
+    return mlir::cast<MemRefType>(memref::SubViewOp::inferRankReducedResultType(
+        {ShapedType::kDynamic} /*1D output*/, sourceType, offsets, sizes,
+        strides));
   }
 
   template <typename Op, typename Ty>
   Value slice(ImplicitLocOpBuilder& b, Value input) {
-    Ty ty = input.getType().cast<Ty>();
+    Ty ty = mlir::cast<Ty>(input.getType());
     return b.create<Op>(toSlicedType(ty), input, offsets, sizes, strides)
         .getResult();
   }
 
   Value apply(ImplicitLocOpBuilder& b, Value input) {
     Type inTy = input.getType();
-    if (inTy.isa<RankedTensorType>()) {
+    if (mlir::isa<RankedTensorType>(inTy)) {
       return slice<tensor::ExtractSliceOp, RankedTensorType>(b, input);
     }
-    assert(inTy.isa<MemRefType>());
+    assert(mlir::isa<MemRefType>(inTy));
     return slice<memref::SubViewOp, MemRefType>(b, input);
   }
 
@@ -470,7 +469,7 @@ struct SortOpPattern : public OpRewritePattern<SortOp> {
     SmallVector<Value> scratchMemrefs;
 
     Value firstOperand = op.getOperands().front();
-    auto firstOperandType = firstOperand.getType().cast<ShapedType>();
+    auto firstOperandType = mlir::cast<ShapedType>(firstOperand.getType());
     int64_t inputRank = firstOperandType.getRank();
 
     Value sortDimSize = b.createOrFold<tensor::DimOp>(
@@ -489,7 +488,7 @@ struct SortOpPattern : public OpRewritePattern<SortOp> {
     // statically known to be <= kInsertionSortSize, `scratchMemrefs` are unused
     // and will be cleaned up later.
     for (auto input : op.getOperands()) {
-      auto inputType = input.getType().cast<ShapedType>();
+      auto inputType = mlir::cast<ShapedType>(input.getType());
       auto memRefType =
           MemRefType::get(inputType.getShape(), inputType.getElementType());
 
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_to_linalg/legalize_to_linalg.cc b/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_to_linalg/legalize_to_linalg.cc
index 2c470ccf66d48d..7c373cbdb2fbb7 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_to_linalg/legalize_to_linalg.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_to_linalg/legalize_to_linalg.cc
@@ -73,22 +73,22 @@ namespace {
 Value getResultValue(Operation* op) { return op->getResult(0); }
 
 ShapedType getHloOpResultType(Operation* op) {
-  return getResultValue(op).getType().cast<ShapedType>();
+  return mlir::cast<ShapedType>(getResultValue(op).getType());
 }
 
 bool verifyHloOpBufferOrTensorSemantics(Operation* op) {
   auto verifyType = [&](Value val) -> bool {
-    return val.getType().isa<RankedTensorType>();
+    return mlir::isa<RankedTensorType>(val.getType());
   };
   if (!llvm::all_of(op->getOperands(), verifyType)) return false;
   return llvm::all_of(op->getResults(), verifyType);
 }
 
 Value fillTensorWithZeros(OpBuilder& builder, Location loc, Value tensor) {
-  auto type = tensor.getType().cast<ShapedType>();
+  auto type = mlir::cast<ShapedType>(tensor.getType());
   Value zero;
   // Complex numbers are a special case.
-  if (auto complexType = type.getElementType().dyn_cast<ComplexType>()) {
+  if (auto complexType = mlir::dyn_cast<ComplexType>(type.getElementType())) {
     auto zeroElement = builder.getZeroAttr(complexType.getElementType());
     auto zeroAttr = builder.getArrayAttr({zeroElement, zeroElement});
     zero = builder.create<complex::ConstantOp>(loc, complexType, zeroAttr);
@@ -233,15 +233,15 @@ struct RngUniformConversion : public OpConversionPattern<mhlo::RngOp> {
       return failure();
     }
     // TODO(raikonenfnu): Handle other element types as well.
-    auto minTy = adaptor.getOperands()[0].getType().dyn_cast<ShapedType>();
-    auto maxTy = adaptor.getOperands()[0].getType().dyn_cast<ShapedType>();
-    if (!minTy.getElementType().dyn_cast<FloatType>() ||
-        !maxTy.getElementType().dyn_cast<FloatType>()) {
+    auto minTy = mlir::dyn_cast<ShapedType>(adaptor.getOperands()[0].getType());
+    auto maxTy = mlir::dyn_cast<ShapedType>(adaptor.getOperands()[0].getType());
+    if (!mlir::dyn_cast<FloatType>(minTy.getElementType()) ||
+        !mlir::dyn_cast<FloatType>(maxTy.getElementType())) {
       return rewriter.notifyMatchFailure(
           op, "expected min/max for rng op to be FloatType");
     }
-    auto targetTy = this->typeConverter->convertType(op.getResult().getType())
-                        .cast<ShapedType>();
+    auto targetTy = mlir::cast<ShapedType>(
+        this->typeConverter->convertType(op.getResult().getType()));
     if (!targetTy) {
       return rewriter.notifyMatchFailure(
           op, "expected target shape of rng op to be ShapedType");
@@ -339,14 +339,16 @@ SmallVector<Value, 2> extractDynamicEinsumSizes(
     if (dimIndIt != lhsLoopVec.end()) {
       // Query from lhs vars.
       auto dimIndPos = dimIndIt - lhsLoopVec.begin();
-      auto lhsShape = lhs.getType().dyn_cast<RankedTensorType>().getShape();
+      auto lhsShape =
+          mlir::dyn_cast<RankedTensorType>(lhs.getType()).getShape();
       if (lhsShape[dimIndPos] != ShapedType::kDynamic) continue;
       dimSize = b.create<tensor::DimOp>(loc, lhs, dimIndPos);
     } else {
       // query from rhs vars.
       dimIndIt = std::find(rhsLoopVec.begin(), rhsLoopVec.end(), dimInd);
       auto dimIndPos = dimIndIt - rhsLoopVec.begin();
-      auto rhsShape = rhs.getType().dyn_cast<RankedTensorType>().getShape();
+      auto rhsShape =
+          mlir::dyn_cast<RankedTensorType>(rhs.getType()).getShape();
       if (rhsShape[dimIndPos] != ShapedType::kDynamic) continue;
       dimSize = b.create<tensor::DimOp>(loc, rhs, dimIndPos);
     }
@@ -407,7 +409,7 @@ class EinsumToLinalgConverter : public OpConversionPattern<mhlo::EinsumOp> {
       mhlo::EinsumOp op, OpAdaptor adaptor,
       ConversionPatternRewriter& rewriter) const final {
     auto getRank = [](Value v) {
-      return v.getType().cast<ShapedType>().getRank();
+      return mlir::cast<ShapedType>(v.getType()).getRank();
     };
     auto einsumConfig = op.getEinsumConfig();
 
@@ -433,8 +435,8 @@ class EinsumToLinalgConverter : public OpConversionPattern<mhlo::EinsumOp> {
     }
 
     // Find result type, if on tensors.
-    auto resultTy = this->typeConverter->convertType(getHloOpResultType(op))
-                        .dyn_cast<RankedTensorType>();
+    auto resultTy = mlir::dyn_cast<RankedTensorType>(
+        this->typeConverter->convertType(getHloOpResultType(op)));
 
     // Check result type compatibility.
     if (!resultTy || !(resultTy.getElementType().isSignlessIntOrFloat())) {
@@ -632,8 +634,8 @@ class DataMovementOpConverter : public OpConversionPattern<OpTy> {
       ConversionPatternRewriter& rewriter) const final {
     if (!verifyHloOpBufferOrTensorSemantics(op)) return failure();
     auto resultType = getHloOpResultType(op);
-    resultType = this->typeConverter->convertType(resultType)
-                     .template cast<ShapedType>();
+    resultType =
+        mlir::cast<ShapedType>(this->typeConverter->convertType(resultType));
 
     SmallVector<AffineMap, 2> indexingMaps =
         Derived::getIndexingMaps(op, &rewriter);
@@ -671,7 +673,7 @@ class BroadcastConverter
   static SmallVector<AffineMap, 2> getIndexingMaps(OpTy broadcastOp,
                                                    Builder* b) {
     ShapedType inputType =
-        broadcastOp.getOperand().getType().template cast<ShapedType>();
+        mlir::cast<ShapedType>(broadcastOp.getOperand().getType());
     unsigned inputRank = inputType.getRank();
     unsigned nloops = getHloOpResultType(broadcastOp).getRank();
 
@@ -704,7 +706,8 @@ class BroadcastOpToBroadcastConverter
   LogicalResult matchAndRewrite(
       mhlo::BroadcastOp op, OpAdaptor adaptor,
       ConversionPatternRewriter& rewriter) const override {
-    auto resultTy = typeConverter->convertType(op.getType()).cast<ShapedType>();
+    auto resultTy =
+        mlir::cast<ShapedType>(typeConverter->convertType(op.getType()));
 
     int64_t numPrependedDims = op.getBroadcastSizes().size();
     SmallVector<int64_t> dimensions =
@@ -733,7 +736,7 @@ class HloBroadcastInDimConverter
       mhlo::BroadcastInDimOp broadcastOp, Builder* b) {
     auto resultType = getHloOpResultType(broadcastOp);
     auto operandType =
-        broadcastOp.getOperand().getType().template cast<ShapedType>();
+        mlir::cast<ShapedType>(broadcastOp.getOperand().getType());
     unsigned nloops = resultType.getRank();
 
     // The input is a scalar, i.e. this is a scalar broadcast op.
@@ -765,7 +768,7 @@ class HloBroadcastInDimConverter
 Value collapseExpandingDims(PatternRewriter& rewriter, Location loc,
                             Value operand, SmallVector<int64_t>& dimensions,
                             llvm::function_ref<bool(int64_t)> isExpandingDim) {
-  auto operandTy = operand.getType().cast<RankedTensorType>();
+  auto operandTy = mlir::cast<RankedTensorType>(operand.getType());
 
   SmallVector<ReassociationIndices> reassociationMap;
   ReassociationIndices currentIndices;
@@ -816,7 +819,7 @@ Value transposeBroadcastOperand(PatternRewriter& rewriter, Location loc,
     return dimensions[lhs] < dimensions[rhs];
   });
 
-  auto operandTy = operand.getType().cast<ShapedType>();
+  auto operandTy = mlir::cast<ShapedType>(operand.getType());
   ArrayRef<int64_t> operandShape = operandTy.getShape();
   SmallVector<int64_t> transposedOperandShape, transposedDimensions;
 
@@ -846,8 +849,9 @@ class BroadcastInDimOpToBroadcastConverter
         llvm::to_vector(op.getBroadcastDimensions().getValues<int64_t>());
 
     Value operand = adaptor.getOperand();
-    auto operandTy = operand.getType().cast<ShapedType>();
-    auto resultTy = typeConverter->convertType(op.getType()).cast<ShapedType>();
+    auto operandTy = mlir::cast<ShapedType>(operand.getType());
+    auto resultTy =
+        mlir::cast<ShapedType>(typeConverter->convertType(op.getType()));
 
     ArrayRef<int64_t> operandShape = operandTy.getShape();
     ArrayRef<int64_t> resultShape = resultTy.getShape();
@@ -895,10 +899,10 @@ class HloDynamicBroadcastInDimConverter
       mhlo::DynamicBroadcastInDimOp op, OpAdaptor adaptor,
       ConversionPatternRewriter& rewriter) const final {
     Value operand = adaptor.getOperand();
-    auto operandType = operand.getType().dyn_cast<RankedTensorType>();
+    auto operandType = mlir::dyn_cast<RankedTensorType>(operand.getType());
     if (!operandType) return failure();
-    auto resultType =
-        typeConverter->convertType(op.getType()).dyn_cast<RankedTensorType>();
+    auto resultType = mlir::dyn_cast<RankedTensorType>(
+        typeConverter->convertType(op.getType()));
     if (!resultType) return failure();
 
     // Determine dimension expressions based on whether the dimension is
@@ -971,10 +975,10 @@ class DynamicBroadcastInDimOpToBroadcastConverter
     Location loc = op.getLoc();
 
     Value operand = adaptor.getOperand();
-    auto operandTy = operand.getType().dyn_cast<RankedTensorType>();
+    auto operandTy = mlir::dyn_cast<RankedTensorType>(operand.getType());
     if (!operandTy) return failure();
-    auto resultTy =
-        typeConverter->convertType(op.getType()).dyn_cast<RankedTensorType>();
+    auto resultTy = mlir::dyn_cast<RankedTensorType>(
+        typeConverter->convertType(op.getType()));
     if (!resultTy) return failure();
 
     SmallVector<int64_t> broadcastDimensions =
@@ -1049,7 +1053,7 @@ class DynamicBroadcastInDimOpToBroadcastConverter
   static Value getBroadcastOperand(
       PatternRewriter& rewriter, Location loc, Value operand,
       llvm::function_ref<bool(int64_t)> isExpandingDim) {
-    auto operandTy = operand.getType().dyn_cast<RankedTensorType>();
+    auto operandTy = mlir::dyn_cast<RankedTensorType>(operand.getType());
 
     SmallVector<int64_t> updatedOperandShape =
         llvm::to_vector(operandTy.getShape());
@@ -1070,7 +1074,8 @@ class DynamicBroadcastInDimOpToBroadcastConverter
   static ShapedType getBroadcastResultType(
       Value operand, RankedTensorType resultTy, ArrayRef<int64_t> dimensions,
       llvm::function_ref<bool(int64_t)> isExpandingDim) {
-    auto operandShape = operand.getType().cast<RankedTensorType>().getShape();
+    auto operandShape =
+        mlir::cast<RankedTensorType>(operand.getType()).getShape();
     auto broadcastResultShape = llvm::to_vector(resultTy.getShape());
 
     for (const auto& [operandIndex, resultIndex] :
@@ -1091,7 +1096,7 @@ class TransposeConverter
   using DataMovementOpConverter<TransposeConverter<OpTy>,
                                 OpTy>::DataMovementOpConverter;
   static SmallVector<AffineMap, 2> getIndexingMaps(OpTy op, Builder* b) {
-    auto resultType = getHloOpResultType(op).template cast<ShapedType>();
+    auto resultType = mlir::cast<ShapedType>(getHloOpResultType(op));
     auto nloops = resultType.getRank();
     SmallVector<AffineExpr, 2> inputExprs;
     inputExprs.resize(resultType.getRank());
@@ -1112,7 +1117,8 @@ class TransposeOpToTransposeConverter
   LogicalResult matchAndRewrite(
       mhlo::TransposeOp op, OpAdaptor adaptor,
       ConversionPatternRewriter& rewriter) const override {
-    auto resultTy = typeConverter->convertType(op.getType()).cast<ShapedType>();
+    auto resultTy =
+        mlir::cast<ShapedType>(typeConverter->convertType(op.getType()));
 
     auto loc = op.getLoc();
     Value emptyTensor =
@@ -1137,9 +1143,10 @@ class BitcastConvertConverter
       ConversionPatternRewriter& rewriter) const final {
     if (!verifyHloOpBufferOrTensorSemantics(op)) return failure();
 
-    auto inputType = adaptor.getOperand().getType().cast<RankedTensorType>();
+    auto inputType =
+        mlir::cast<RankedTensorType>(adaptor.getOperand().getType());
     auto outputType =
-        typeConverter->convertType(op.getType()).cast<RankedTensorType>();
+        mlir::cast<RankedTensorType>(typeConverter->convertType(op.getType()));
     auto loc = op.getLoc();
 
     // Fallback to pointwise conversion if the tensor dimensions are not
@@ -1251,7 +1258,7 @@ class RealDynamicSliceConverter
       mhlo::RealDynamicSliceOp realDynamicSliceOp, OpAdaptor adaptor,
       ConversionPatternRewriter& rewriter) const final {
     Location loc = realDynamicSliceOp.getLoc();
-    auto argType = adaptor.getOperand().getType().dyn_cast<ShapedType>();
+    auto argType = mlir::dyn_cast<ShapedType>(adaptor.getOperand().getType());
     if (!argType || !argType.hasRank()) {
       return rewriter.notifyMatchFailure(realDynamicSliceOp,
                                          "require known-rank args");
@@ -1268,9 +1275,8 @@ class RealDynamicSliceConverter
         dimElementType.isIndex() ? rewriter.getI64Type() : dimElementType;
     Type indexType = rewriter.getIndexType();
 
-    auto resultType =
-        this->typeConverter->convertType(realDynamicSliceOp.getType())
-            .cast<RankedTensorType>();
+    auto resultType = mlir::cast<RankedTensorType>(
+        this->typeConverter->convertType(realDynamicSliceOp.getType()));
     Value zero = rewriter.create<arith::ConstantIndexOp>(loc, 0);
     SmallVector<OpFoldResult, 4> offsets, sizes, strides;
     SmallVector<Type, 3> clampType(3, arithType);
@@ -1340,9 +1346,9 @@ class ReshapeOpConverter : public OpConversionPattern<mhlo::ReshapeOp> {
       ConversionPatternRewriter& rewriter) const final {
     if (!verifyHloOpBufferOrTensorSemantics(reshapeOp)) return failure();
     auto operand = adaptor.getOperand();
-    auto operandType = operand.getType().cast<ShapedType>();
+    auto operandType = mlir::cast<ShapedType>(operand.getType());
     auto elemType = operandType.getElementType();
-    auto resultType = reshapeOp.getType().cast<ShapedType>();
+    auto resultType = mlir::cast<ShapedType>(reshapeOp.getType());
 
     if (!resultType.hasStaticShape()) return failure();
 
@@ -1354,7 +1360,7 @@ class ReshapeOpConverter : public OpConversionPattern<mhlo::ReshapeOp> {
       return success();
     }
 
-    resultType = typeConverter->convertType(resultType).cast<ShapedType>();
+    resultType = mlir::cast<ShapedType>(typeConverter->convertType(resultType));
 
     // Special case where the result is a scalar.
     if (resultType.getRank() == 0 && !operandType.hasStaticShape()) {
@@ -1472,8 +1478,8 @@ class IotaConverter : public OpConversionPattern<OpTy> {
     ShapedType resultShapedType = getHloOpResultType(iotaOp);
     if (!resultShapedType) return failure();
     Type targetElementType = resultShapedType.getElementType();
-    resultShapedType = this->typeConverter->convertType(resultShapedType)
-                           .template dyn_cast<ShapedType>();
+    resultShapedType = mlir::dyn_cast<ShapedType>(
+        this->typeConverter->convertType(resultShapedType));
 
     Type resultElementType = resultShapedType.getElementType();
 
@@ -1497,7 +1503,7 @@ class IotaConverter : public OpConversionPattern<OpTy> {
               nestedLoc, iotaOp.getIotaDimension());
           Type unwrappedResultElementType = resultElementType;
           if (auto complexType =
-                  unwrappedResultElementType.dyn_cast<ComplexType>())
+                  mlir::dyn_cast<ComplexType>(unwrappedResultElementType))
             unwrappedResultElementType = complexType.getElementType();
           Value castOp = nestedBuilder.create<arith::IndexCastOp>(
               nestedLoc,
@@ -1526,8 +1532,8 @@ class IotaToMapConverter : public OpConversionPattern<OpTy> {
     ShapedType resultTy = getHloOpResultType(iotaOp);
     if (!resultTy) return failure();
     Type targetElementType = resultTy.getElementType();
-    resultTy = this->typeConverter->convertType(resultTy)
-                   .template dyn_cast<ShapedType>();
+    resultTy =
+        mlir::dyn_cast<ShapedType>(this->typeConverter->convertType(resultTy));
 
     Location loc = iotaOp.getLoc();
     Value empty = getEmptyTensorFor(rewriter, loc, resultTy, iotaOp,
@@ -1564,8 +1570,8 @@ struct ConcatenateConverter : public OpConversionPattern<mhlo::ConcatenateOp> {
       return success();
     }
 
-    auto resultType = this->typeConverter->convertType(op.getResult().getType())
-                          .dyn_cast<RankedTensorType>();
+    auto resultType = mlir::dyn_cast<RankedTensorType>(
+        this->typeConverter->convertType(op.getResult().getType()));
     if (!resultType) return failure();
 
     uint64_t dim = op.getDimension();
@@ -1647,9 +1653,9 @@ class ConstConverterTensor : public OpConversionPattern<mhlo::ConstantOp> {
   LogicalResult matchAndRewrite(
       mhlo::ConstantOp constOp, OpAdaptor /*adaptor*/,
       ConversionPatternRewriter& rewriter) const final {
-    auto valueAttr = constOp.getValue().cast<DenseElementsAttr>();
+    auto valueAttr = mlir::cast<DenseElementsAttr>(constOp.getValue());
     auto type =
-        typeConverter->convertType(constOp.getType()).cast<ShapedType>();
+        mlir::cast<ShapedType>(typeConverter->convertType(constOp.getType()));
     if (type != constOp.getType()) {
       // Signedness conversion.
       valueAttr = valueAttr.mapValues(type.getElementType(),
@@ -1668,7 +1674,7 @@ class ReverseConverter
                                 mhlo::ReverseOp>::DataMovementOpConverter;
   static SmallVector<AffineMap, 2> getIndexingMaps(mhlo::ReverseOp op,
                                                    Builder* b) {
-    auto resultType = getHloOpResultType(op).cast<ShapedType>();
+    auto resultType = mlir::cast<ShapedType>(getHloOpResultType(op));
     auto nloops = resultType.getRank();
     SmallVector<AffineExpr, 2> inputExprs;
     inputExprs.reserve(nloops);
@@ -1693,7 +1699,8 @@ class SliceConverter : public OpConversionPattern<mhlo::SliceOp> {
   LogicalResult matchAndRewrite(
       mhlo::SliceOp sliceOp, typename mhlo::SliceOp::Adaptor adaptor,
       ConversionPatternRewriter& rewriter) const final {
-    auto argType = adaptor.getOperands()[0].getType().dyn_cast<ShapedType>();
+    auto argType =
+        mlir::dyn_cast<ShapedType>(adaptor.getOperands()[0].getType());
     if (!argType || !argType.hasRank()) {
       return rewriter.notifyMatchFailure(sliceOp, "expects known-rank args");
     }
@@ -1726,7 +1733,7 @@ class DynamicSliceConverter : public OpConversionPattern<mhlo::DynamicSliceOp> {
       mhlo::DynamicSliceOp dynamicSliceOp, OpAdaptor adaptor,
       ConversionPatternRewriter& rewriter) const final {
     auto loc = dynamicSliceOp.getLoc();
-    auto argType = adaptor.getOperand().getType().dyn_cast<ShapedType>();
+    auto argType = mlir::dyn_cast<ShapedType>(adaptor.getOperand().getType());
     if (!argType || !argType.hasRank()) {
       return rewriter.notifyMatchFailure(dynamicSliceOp,
                                          "require known-rank args");
@@ -1764,8 +1771,8 @@ class DynamicSliceConverter : public OpConversionPattern<mhlo::DynamicSliceOp> {
     int64_t rank = argType.getRank();
     SmallVector<OpFoldResult, 3> strides(rank, rewriter.getI64IntegerAttr(1));
 
-    auto resultType = this->typeConverter->convertType(dynamicSliceOp.getType())
-                          .cast<RankedTensorType>();
+    auto resultType = mlir::cast<RankedTensorType>(
+        this->typeConverter->convertType(dynamicSliceOp.getType()));
 
     rewriter.replaceOpWithNewOp<tensor::ExtractSliceOp>(
         dynamicSliceOp, resultType, adaptor.getOperand(), startIndices, sizes,
@@ -1784,14 +1791,14 @@ class DynamicUpdateSliceConverter
       ConversionPatternRewriter& rewriter) const final {
     auto loc = op.getLoc();
     auto operandType =
-        adaptor.getOperand().getType().dyn_cast<RankedTensorType>();
+        mlir::dyn_cast<RankedTensorType>(adaptor.getOperand().getType());
     if (!operandType || !operandType.hasStaticShape()) {
       return rewriter.notifyMatchFailure(
           op, "require static ranked type for operand");
     }
 
     auto updateType =
-        adaptor.getUpdate().getType().dyn_cast<RankedTensorType>();
+        mlir::dyn_cast<RankedTensorType>(adaptor.getUpdate().getType());
     if (!updateType || !updateType.hasStaticShape()) {
       return rewriter.notifyMatchFailure(
           op, "require static ranked type for operand");
@@ -1842,9 +1849,9 @@ enum class DotOperationType {
 
 DotOperationType getDotOperationType(mhlo::DotOp dotOp) {
   ArrayRef<int64_t> lhsShape =
-      dotOp.getLhs().getType().cast<ShapedType>().getShape();
+      mlir::cast<ShapedType>(dotOp.getLhs().getType()).getShape();
   ArrayRef<int64_t> rhsShape =
-      dotOp.getRhs().getType().cast<ShapedType>().getShape();
+      mlir::cast<ShapedType>(dotOp.getRhs().getType()).getShape();
   auto shapeMatches = [](int64_t a, int64_t b) {
     return a == ShapedType::kDynamic || b == ShapedType::kDynamic || a == b;
   };
@@ -1873,19 +1880,19 @@ SmallVector<Value, 2> getDotOpEmptyTensorDynSizes(OpBuilder& b, Location loc,
   SmallVector<Value, 2> dynShape;
   switch (type) {
     case DotOperationType::kMatrixMatrix: {
-      if (lhs.getType().cast<ShapedType>().isDynamicDim(0))
+      if (mlir::cast<ShapedType>(lhs.getType()).isDynamicDim(0))
         dynShape.push_back(b.create<tensor::DimOp>(loc, lhs, 0));
-      if (rhs.getType().cast<ShapedType>().isDynamicDim(1))
+      if (mlir::cast<ShapedType>(rhs.getType()).isDynamicDim(1))
         dynShape.push_back(b.create<tensor::DimOp>(loc, rhs, 1));
       break;
     }
     case DotOperationType::kMatrixVector: {
-      if (lhs.getType().cast<ShapedType>().isDynamicDim(0))
+      if (mlir::cast<ShapedType>(lhs.getType()).isDynamicDim(0))
         dynShape.push_back(b.create<tensor::DimOp>(loc, lhs, 0));
       break;
     }
     case DotOperationType::kVectorMatrix: {
-      if (rhs.getType().cast<ShapedType>().isDynamicDim(1))
+      if (mlir::cast<ShapedType>(rhs.getType()).isDynamicDim(1))
         dynShape.push_back(b.create<tensor::DimOp>(loc, rhs, 1));
       break;
     }
@@ -1912,7 +1919,7 @@ class DotOpConversion : public OpConversionPattern<mhlo::DotOp> {
     // Convert unsigned to signed. This works because signed and unsigned
     // integer matmul is the same operation in two's complement.
     auto outputType =
-        typeConverter->convertType(op.getType()).cast<ShapedType>();
+        mlir::cast<ShapedType>(typeConverter->convertType(op.getType()));
     SmallVector<Value, 2> dynShape = getDotOpEmptyTensorDynSizes(
         rewriter, loc, adaptor.getLhs(), adaptor.getRhs(), op_type);
     auto emptyTensor =
@@ -1938,7 +1945,7 @@ class DotGeneralBatchMatMulOpConversion
     if (!verifyHloOpBufferOrTensorSemantics(op)) {
       return failure();
     }
-    if (op.getType().cast<RankedTensorType>().getRank() != 3) {
+    if (mlir::cast<RankedTensorType>(op.getType()).getRank() != 3) {
       return rewriter.notifyMatchFailure(op, "expected a batch matmul");
     }
 
@@ -1968,7 +1975,7 @@ class DotGeneralBatchMatMulOpConversion
     // Convert unsigned to signed. This works because signed and unsigned
     // integer matmul is the same operation in two's complement.
     auto outputType =
-        typeConverter->convertType(op.getType()).cast<ShapedType>();
+        mlir::cast<ShapedType>(typeConverter->convertType(op.getType()));
     auto emptyTensor =
         getEmptyTensorFor(rewriter, loc, outputType, op, adaptor.getOperands());
     Value zeroTensor = fillTensorWithZeros(rewriter, loc, emptyTensor);
@@ -1992,7 +1999,7 @@ class MapOpToGenericConverter : public OpConversionPattern<mhlo::MapOp> {
     if (!verifyHloOpBufferOrTensorSemantics(op)) return failure();
 
     auto resultType =
-        typeConverter->convertType(op.getType()).cast<ShapedType>();
+        mlir::cast<ShapedType>(typeConverter->convertType(op.getType()));
     assert(op.getDimensions().size() == resultType.getRank() &&
            "Expected a pointwise map");
 
@@ -2019,7 +2026,7 @@ class MapOpToGenericConverter : public OpConversionPattern<mhlo::MapOp> {
       signatureConverter.addInputs(
           it.index(),
           typeConverter->convertType(
-              it.value().getType().cast<ShapedType>().getElementType()));
+              mlir::cast<ShapedType>(it.value().getType()).getElementType()));
     }
     signatureConverter.addInputs(resultType.getElementType());
 
@@ -2039,7 +2046,7 @@ class MapOpToMapConverter : public OpConversionPattern<mhlo::MapOp> {
     if (!verifyHloOpBufferOrTensorSemantics(op)) return failure();
 
     auto resultType =
-        typeConverter->convertType(op.getType()).cast<ShapedType>();
+        mlir::cast<ShapedType>(typeConverter->convertType(op.getType()));
     assert(op.getDimensions().size() == resultType.getRank() &&
            "Expected a pointwise map");
 
@@ -2069,7 +2076,7 @@ class MapOpToMapConverter : public OpConversionPattern<mhlo::MapOp> {
       signatureConverter.addInputs(
           it.index(),
           typeConverter->convertType(
-              it.value().getType().cast<ShapedType>().getElementType()));
+              mlir::cast<ShapedType>(it.value().getType()).getElementType()));
     }
 
     rewriter.applySignatureConversion(&region, signatureConverter,
@@ -2089,7 +2096,7 @@ SmallVector<Value, 8> getReduceOpEmptyTensorDynSizes(
 
   SmallVector<unsigned, 4> parallelDims;
   SmallVector<Value, 8> dynShape;
-  int rank = arg.getType().cast<RankedTensorType>().getRank();
+  int rank = mlir::cast<RankedTensorType>(arg.getType()).getRank();
   for (int i = 0, j = 0; i < rank; ++i) {
     if (s.count(i)) continue;
     if (!resultType.isDynamicDim(j++)) continue;
@@ -2111,7 +2118,7 @@ class ReduceRegionReturnOpConversion
     }
     SmallVector<Value, 4> operands(adaptor.getOperands());
     for (size_t i = 0; i < operands.size(); ++i) {
-      if (operands[i].getType().isa<ShapedType>()) {
+      if (mlir::isa<ShapedType>(operands[i].getType())) {
         auto loc = operands[i].getLoc();
         operands[i] = rewriter.create<tensor::ExtractOp>(loc, operands[i]);
       }
@@ -2132,12 +2139,12 @@ class ReduceOpToGenericConverter : public OpConversionPattern<mhlo::ReduceOp> {
     int numOperands = static_cast<int>(adaptor.getInputs().size());
 
     if (llvm::any_of(adaptor.getInputs(), [](Value v) {
-          return !v.getType().isa<RankedTensorType>();
+          return !mlir::isa<RankedTensorType>(v.getType());
         })) {
       return rewriter.notifyMatchFailure(op, "expects known-rank args");
     }
     auto srcRank =
-        adaptor.getInputs()[0].getType().cast<ShapedType>().getRank();
+        mlir::cast<ShapedType>(adaptor.getInputs()[0].getType()).getRank();
 
     SmallVector<int64_t, 4> reductionDims = extract1DVector(op.getDimensions());
 
@@ -2205,14 +2212,14 @@ class ReduceOpToGenericConverter : public OpConversionPattern<mhlo::ReduceOp> {
           /*origInputNo=*/idx + numOperands,
           // type for the new operand number 'idx'.
           typeConverter->convertType(
-              val.getType().cast<ShapedType>().getElementType()));
+              mlir::cast<ShapedType>(val.getType()).getElementType()));
     }
     for (const auto& [idx, val] : llvm::enumerate(op.getInitValues())) {
       signatureConverter.addInputs(
           /*origInputNo=*/idx,
           // type for the new operand number 'idx' + 'numOperands'.
           typeConverter->convertType(
-              val.getType().cast<ShapedType>().getElementType()));
+              mlir::cast<ShapedType>(val.getType()).getElementType()));
     }
 
     rewriter.applySignatureConversion(&region, signatureConverter,
@@ -2234,7 +2241,7 @@ struct ReduceOpToReduceConverter : public OpConversionPattern<mhlo::ReduceOp> {
     llvm::sort(reductionDims);
 
     auto toRankedTensor = [](Value v) -> RankedTensorType {
-      return v.getType().dyn_cast<RankedTensorType>();
+      return mlir::dyn_cast<RankedTensorType>(v.getType());
     };
 
     SmallVector<Value> outputs;
@@ -2256,14 +2263,14 @@ struct ReduceOpToReduceConverter : public OpConversionPattern<mhlo::ReduceOp> {
         return rewriter.notifyMatchFailure(op, "expects known-rank operands");
       operandTypes.push_back(operandType);
       initValue = rewriter.createOrFold<tensor::ExtractOp>(loc, initValue);
-      auto tensorResultType = resultType.cast<RankedTensorType>();
+      auto tensorResultType = mlir::cast<RankedTensorType>(resultType);
       // For linalg.reduce, the result type's dimensions must match the input's
       // dimensions, whereas MHLO allows replacing static dimensions with
       // dynamic ones.
       SmallVector<int64_t> resultShape;
       SmallVector<Value, 8> dynShape;
-      for (const auto& [index, dim] :
-           llvm::enumerate(operand.getType().cast<ShapedType>().getShape())) {
+      for (const auto& [index, dim] : llvm::enumerate(
+               mlir::cast<ShapedType>(operand.getType()).getShape())) {
         if (!llvm::is_contained(reductionDims, index)) {
           resultShape.push_back(dim);
           if (ShapedType::isDynamic(dim)) {
@@ -2334,9 +2341,8 @@ class RngBitGeneratorConverter
       ConversionPatternRewriter& rewriter) const final {
     Location loc = op.getLoc();
     Value state = adaptor.getInitialState();
-    ShapedType resultTy =
-        this->typeConverter->convertType(op.getResult(1).getType())
-            .cast<ShapedType>();
+    ShapedType resultTy = mlir::cast<ShapedType>(
+        this->typeConverter->convertType(op.getResult(1).getType()));
 
     if (op.getRngAlgorithm() == mhlo::RngAlgorithm::THREE_FRY) {
       Value random;
@@ -2376,10 +2382,10 @@ struct SelectAndScatterNoOverlapConverter
     Value operand = op.getOperand();
     Value init = op.getInitValue();
 
-    auto sourceTy = source.getType().dyn_cast<RankedTensorType>();
-    auto operandTy = operand.getType().dyn_cast<RankedTensorType>();
-    auto initTy = init.getType().dyn_cast<RankedTensorType>();
-    auto resultTy = op.getResult().getType().dyn_cast<RankedTensorType>();
+    auto sourceTy = mlir::dyn_cast<RankedTensorType>(source.getType());
+    auto operandTy = mlir::dyn_cast<RankedTensorType>(operand.getType());
+    auto initTy = mlir::dyn_cast<RankedTensorType>(init.getType());
+    auto resultTy = mlir::dyn_cast<RankedTensorType>(op.getResult().getType());
     if (!sourceTy || !operandTy || !initTy || !resultTy)
       return rewriter.notifyMatchFailure(op, "inputs/outputs must be ranked");
 
@@ -2563,7 +2569,7 @@ struct SelectAndScatterNoOverlapConverter
     b.setInsertionPoint(op);
 
     Value reduceIndex = reduceGeneric.getResult(1);
-    ShapedType reduceIndexTy = reduceIndex.getType().cast<ShapedType>();
+    ShapedType reduceIndexTy = mlir::cast<ShapedType>(reduceIndex.getType());
 
     // For the second generic we restricted to only cases where there are
     // no window overlaps. This guarantees that each source value is scattered
@@ -2674,7 +2680,7 @@ struct SelectAndScatterNoOverlapConverter
 
     Value collapse = b.create<tensor::CollapseShapeOp>(
         scatterGeneric.getResult(0), reassociationMap);
-    auto collapseTy = collapse.getType().cast<ShapedType>();
+    auto collapseTy = mlir::cast<ShapedType>(collapse.getType());
 
     // After collapsing it it possible that the target may need to be padded.
     auto zero = b.createOrFold<arith::ConstantIndexOp>(0);
@@ -2817,7 +2823,7 @@ struct PadOpConversion : public OpConversionPattern<mhlo::PadOp> {
         rewriter.create<linalg::FillOp>(loc, paddingVal, emptyTensor).result();
 
     // Get sizes of the original operand.
-    auto operandType = adaptor.getOperand().getType().cast<ShapedType>();
+    auto operandType = mlir::cast<ShapedType>(adaptor.getOperand().getType());
     auto sizes = llvm::to_vector<4>(llvm::map_range(
         llvm::seq<int64_t>(0, operandType.getRank()),
         [&](int64_t dim) -> OpFoldResult {
@@ -2850,7 +2856,7 @@ Value applyConvolutionPadding(Location loc, Value input,
       (!lhsDilation || isSplatValue(lhsDilation, 1)))
     return input;
 
-  auto inputType = input.getType().cast<ShapedType>();
+  auto inputType = mlir::cast<ShapedType>(input.getType());
   auto rank = inputType.getRank();
 
   // Translate window padding into low/high padding.
@@ -2931,8 +2937,8 @@ struct NormalConvolutionOpConversion
     Value input = adaptor.getLhs();
     Value filter = adaptor.getRhs();
     filter = applyConvolutionReversal(loc, rewriter, op, filter);
-    auto resultType =
-        typeConverter->convertType(op.getResult().getType()).cast<ShapedType>();
+    auto resultType = mlir::cast<ShapedType>(
+        typeConverter->convertType(op.getResult().getType()));
     int64_t rank = resultType.getRank();
 
     // Immediately emit an EmptyOp for output tensors with zero dimension.
@@ -3039,8 +3045,8 @@ struct ConvolutionOpGeneralConversion
     auto loc = op.getLoc();
     auto* ctx = op.getContext();
 
-    auto resultType =
-        typeConverter->convertType(op.getResult().getType()).cast<ShapedType>();
+    auto resultType = mlir::cast<ShapedType>(
+        typeConverter->convertType(op.getResult().getType()));
     auto reshapedResultShape = resultType.getShape().vec();
     if (!resultType.hasStaticShape()) return failure();
 
@@ -3089,8 +3095,8 @@ struct ConvolutionOpGeneralConversion
     // Non-one values for feature or batch group counts will result in reshaped
     // inputs and outputs. These mappings are used to keep track of the the new
     // index after reshaping has possibly inserted new dimensions.
-    auto paddedLhsType = modifiedLhs.getType().cast<ShapedType>();
-    auto paddedRhsType = modifiedRhs.getType().cast<ShapedType>();
+    auto paddedLhsType = mlir::cast<ShapedType>(modifiedLhs.getType());
+    auto paddedRhsType = mlir::cast<ShapedType>(modifiedRhs.getType());
     SmallVector<int64_t> lhsIndexMapping(paddedLhsType.getRank());
     std::iota(lhsIndexMapping.begin(), lhsIndexMapping.end(), 0);
     SmallVector<int64_t> rhsIndexMapping(paddedRhsType.getRank());
@@ -3318,8 +3324,8 @@ struct DepthwiseConvolutionOpConversion
 
     // Make sure that this is depthwise convolution.
     int64_t inputFeatureDim = dimensionNumbers.getInputFeatureDimension();
-    int64_t inputFeatureCount =
-        op.getLhs().getType().cast<ShapedType>().getDimSize(inputFeatureDim);
+    int64_t inputFeatureCount = mlir::cast<ShapedType>(op.getLhs().getType())
+                                    .getDimSize(inputFeatureDim);
     if (static_cast<int64_t>(op.getFeatureGroupCount()) != inputFeatureCount) {
       return rewriter.notifyMatchFailure(op, "not depth-wise convolution");
     }
@@ -3350,8 +3356,8 @@ struct DepthwiseConvolutionOpConversion
     Location loc = op.getLoc();
     Value input = adaptor.getLhs();
     Value filter = adaptor.getRhs();
-    auto resultType = typeConverter->convertType(op.getResult().getType())
-                          .cast<RankedTensorType>();
+    auto resultType = mlir::cast<RankedTensorType>(
+        typeConverter->convertType(op.getResult().getType()));
     if (!resultType.hasStaticShape()) {
       return rewriter.notifyMatchFailure(op,
                                          "expected output has static shapes");
@@ -3371,12 +3377,12 @@ struct DepthwiseConvolutionOpConversion
                                     op.getLhsDilationAttr(), spatialDimMapping,
                                     rewriter);
 
-    auto filterDims =
-        llvm::to_vector<4>(op.getRhs().getType().cast<ShapedType>().getShape());
+    auto filterDims = llvm::to_vector<4>(
+        mlir::cast<ShapedType>(op.getRhs().getType()).getShape());
 
     auto getReassociationIndicesToCollapseLastTwoDims = [](Value v) {
       SmallVector<ReassociationIndices> reassociations;
-      int64_t rank = v.getType().cast<ShapedType>().getRank();
+      int64_t rank = mlir::cast<ShapedType>(v.getType()).getRank();
       for (int64_t i = 0; i < rank - 1; ++i) reassociations.emplace_back(1, i);
       reassociations.back().push_back(rank - 1);
       return reassociations;
@@ -3406,7 +3412,8 @@ struct DepthwiseConvolutionOpConversion
             op.getFeatureGroupCount();
         auto reshapedFilterType = RankedTensorType::get(
             reshapedFilterDims,
-            op.getRhs().getType().cast<RankedTensorType>().getElementType());
+            mlir::cast<RankedTensorType>(op.getRhs().getType())
+                .getElementType());
 
         reshapedFilter =
             rewriter.create<mhlo::ReshapeOp>(loc, reshapedFilterType, filter);
@@ -3591,7 +3598,7 @@ struct ReduceWindowOpOnTensorsGenericConversion
     llvm::SmallVector<Value> broadcastValues;
     for (uint64_t i = 0, s = initValues.size(); i < s; i++) {
       Value initValue = initValues[i];
-      auto resultTy = resultTypes[i].cast<ShapedType>();
+      auto resultTy = mlir::cast<ShapedType>(resultTypes[i]);
       if (!resultTy.hasStaticShape()) return failure();
 
       auto broadcastSizes = rewriter.getI64TensorAttr(resultTy.getShape());
@@ -3658,17 +3665,17 @@ struct ReduceWindowOpOnTensorsGenericConversion
     // args will correlate with the LHS and the inputs correlate with the RHS.
     for (const auto& [i, type] : llvm::enumerate(resultTypes)) {
       auto idx = inputs.size() + i - 1;
-      signatureConverter.addInputs(idx,
-                                   type.cast<ShapedType>().getElementType());
+      signatureConverter.addInputs(
+          idx, mlir::cast<ShapedType>(type).getElementType());
     }
 
     signatureConverter.addInputs(
-        inputs.back().getType().cast<ShapedType>().getElementType());
+        mlir::cast<ShapedType>(inputs.back().getType()).getElementType());
 
     for (const auto& [i, input] :
          llvm::enumerate(ArrayRef<Value>(inputs).drop_back())) {
       signatureConverter.addInputs(
-          i, input.getType().cast<ShapedType>().getElementType());
+          i, mlir::cast<ShapedType>(input.getType()).getElementType());
     }
 
     rewriter.applySignatureConversion(&region, signatureConverter,
@@ -3697,8 +3704,8 @@ struct ReduceWindowOpConversion
 
   static PoolingType getPoolingType(mhlo::ReduceWindowOp reduceOp,
                                     int resultIndex) {
-    auto rank =
-        reduceOp.getResultTypes()[resultIndex].cast<ShapedType>().getRank();
+    auto rank = mlir::cast<ShapedType>(reduceOp.getResultTypes()[resultIndex])
+                    .getRank();
     if (Operation* op = reduceOp.getReductionOp(resultIndex)) {
       if (isa<mhlo::MinOp>(*op) && rank == 4) return PoolingType::k2DMin;
       if (isa<mhlo::MinOp>(*op) && rank == 5) return PoolingType::k3DMin;
@@ -3714,7 +3721,7 @@ struct ReduceWindowOpConversion
       mhlo::ReduceWindowOp op, OpAdaptor adaptor,
       ConversionPatternRewriter& rewriter) const override {
     auto loc = op.getLoc();
-    int rank = op.getResultTypes()[0].cast<ShapedType>().getRank();
+    int rank = mlir::cast<ShapedType>(op.getResultTypes()[0]).getRank();
     if (rank != 4 && rank != 5) {
       return rewriter.notifyMatchFailure(
           op, "expected NHWC/NDHWC pooling-based op");
@@ -3778,8 +3785,8 @@ struct ReduceWindowOpConversion
       OpResult result = std::get<0>(it);
       Value input = std::get<1>(it);
       Value initValue = std::get<2>(it);
-      auto resultType = result.getType().cast<ShapedType>();
-      if (!input.getType().cast<ShapedType>().getElementType().isF32()) {
+      auto resultType = mlir::cast<ShapedType>(result.getType());
+      if (!mlir::cast<ShapedType>(input.getType()).getElementType().isF32()) {
         return rewriter.notifyMatchFailure(op,
                                            "expected element type to be f32");
       }
@@ -3799,9 +3806,9 @@ struct ReduceWindowOpConversion
         } else {
           auto i = en.index() - 1;
           auto stride =
-              strides.cast<DenseIntElementsAttr>().getValues<int64_t>()[i];
-          auto dilation =
-              dilations.cast<DenseIntElementsAttr>().getValues<int64_t>()[i];
+              mlir::cast<DenseIntElementsAttr>(strides).getValues<int64_t>()[i];
+          auto dilation = mlir::cast<DenseIntElementsAttr>(dilations)
+                              .getValues<int64_t>()[i];
           // let j = i * stride
           // output[i] = reduce( input[j, j + window_size * dilation) )
           Value offset = rewriter.create<arith::ConstantIndexOp>(
@@ -3883,15 +3890,16 @@ struct TorchIndexSelectOpConversion
       ConversionPatternRewriter& rewriter) const final {
     int axis = static_cast<int>(op.getDim());
     int batch = static_cast<int>(op.getBatchDims());
-    auto indexShapedType = adaptor.getIndex().getType().cast<ShapedType>();
+    auto indexShapedType = mlir::cast<ShapedType>(adaptor.getIndex().getType());
     int numIndices = static_cast<int>(indexShapedType.getRank());
-    auto operandShapedType = adaptor.getOperand().getType().cast<ShapedType>();
+    auto operandShapedType =
+        mlir::cast<ShapedType>(adaptor.getOperand().getType());
     if (axis < 0) axis += static_cast<int>(operandShapedType.getRank());
     if (batch < 0) batch += numIndices;
 
     Location loc = op.getLoc();
-    auto resultType = this->typeConverter->convertType(op.getResult().getType())
-                          .cast<ShapedType>();
+    auto resultType = mlir::cast<ShapedType>(
+        this->typeConverter->convertType(op.getResult().getType()));
     int rank = static_cast<int>(resultType.getRank());
 
     // The output shape is
@@ -3968,7 +3976,7 @@ struct TorchIndexSelectOpConversion
     auto* block = rewriter.createBlock(region, region->end());
     for (auto blockArgs : linalgOpArgs) {
       bodyArgTypes.push_back(
-          blockArgs.getType().cast<ShapedType>().getElementType());
+          mlir::cast<ShapedType>(blockArgs.getType()).getElementType());
     }
     block->addArguments(bodyArgTypes,
                         SmallVector<Location>(bodyArgTypes.size(), loc));
@@ -4015,10 +4023,10 @@ struct GatherConversion : public OpConversionPattern<mhlo::GatherOp> {
     Value startIndices = adaptor.getStartIndices();
     Value operand = adaptor.getOperand();
 
-    auto resultType = typeConverter->convertType(gatherOp.getType())
-                          .dyn_cast<RankedTensorType>();
+    auto resultType = mlir::dyn_cast<RankedTensorType>(
+        typeConverter->convertType(gatherOp.getType()));
     RankedTensorType startIndicesType =
-        startIndices.getType().dyn_cast<RankedTensorType>();
+        mlir::dyn_cast<RankedTensorType>(startIndices.getType());
     // We could actually deal with an unranked result by inferring the result
     // rank, but the current reifyReturnTypes doesn't support unranked either.
     if (!resultType || !startIndicesType)
@@ -4168,13 +4176,13 @@ struct GatherConversion : public OpConversionPattern<mhlo::GatherOp> {
           indexFromOffset[i]));
 
     Value extractOperand;
-    if (operand.getType().isa<RankedTensorType>()) {
+    if (mlir::isa<RankedTensorType>(operand.getType())) {
       extractOperand = operand;
     } else {
       // Cannot extract from unranked tensors, cast to ranked first.
       SmallVector<int64_t> dims(operandRank, ShapedType::kDynamic);
       auto type = RankedTensorType::get(
-          dims, operand.getType().cast<TensorType>().getElementType());
+          dims, mlir::cast<TensorType>(operand.getType()).getElementType());
       extractOperand = rewriter.create<tensor::CastOp>(loc, type, operand);
     }
     Value element =
@@ -4211,14 +4219,14 @@ class DotGeneralOpConversion : public OpConversionPattern<mhlo::DotGeneralOp> {
     // Convert unsigned to signed. This works because signed and unsigned
     // integer matmul is the same operation in two's complement.
     auto outputType =
-        typeConverter->convertType(op.getType()).cast<ShapedType>();
+        mlir::cast<ShapedType>(typeConverter->convertType(op.getType()));
     auto targetRank = outputType.getRank();
     auto totalLoopCount = numContracting + targetRank;
 
-    auto lhsRank = adaptor.getLhs().getType().cast<ShapedType>().getRank();
+    auto lhsRank = mlir::cast<ShapedType>(adaptor.getLhs().getType()).getRank();
     auto lhsExtraDims =
         lhsRank - lhsBatchingDims.size() - lhsContractingDims.size();
-    auto rhsRank = adaptor.getRhs().getType().cast<ShapedType>().getRank();
+    auto rhsRank = mlir::cast<ShapedType>(adaptor.getRhs().getType()).getRank();
 
     Location loc = op.getLoc();
     auto emptyTensor =
@@ -4302,13 +4310,13 @@ class PointwiseToLinalgMapConverter : public OpConversionPattern<OpTy> {
 
     // Find result type, if on tensors.
     std::optional<ShapedType> resultTy;
-    resultTy = this->typeConverter->convertType(op->getResultTypes().front())
-                   .template dyn_cast<ShapedType>();
+    resultTy = mlir::dyn_cast<ShapedType>(
+        this->typeConverter->convertType(op->getResultTypes().front()));
 
     // Check result type compatibility.
     if (!resultTy || !resultTy->hasRank() || resultTy->getRank() != maxRank ||
         !(resultTy->getElementType().isSignlessIntOrFloat() ||
-          resultTy->getElementType().isa<ComplexType>())) {
+          mlir::isa<ComplexType>(resultTy->getElementType()))) {
       return rewriter.notifyMatchFailure(
           op, "mismatched operand/result types or iterator count");
     }
@@ -4352,7 +4360,7 @@ class PointwiseToLinalgMapConverter : public OpConversionPattern<OpTy> {
 
  protected:
   int64_t getRank(Value v) const {
-    return v.getType().cast<ShapedType>().getRank();
+    return mlir::cast<ShapedType>(v.getType()).getRank();
   }
 
   int64_t getMaxRank(typename OpTy::Adaptor adaptor) const {
@@ -4392,7 +4400,8 @@ class SetDimensionSizeConverter
     // regular dynamic shape. Note that the bounds annotation is still around
     // but may be no longer valid depending on choices made by bufferization.
     Location loc = setDimensionSizeOp.getLoc();
-    auto resultType = setDimensionSizeOp.getType().cast<RankedTensorType>();
+    auto resultType =
+        mlir::cast<RankedTensorType>(setDimensionSizeOp.getType());
 
     SmallVector<OpFoldResult> offsets(resultType.getRank(),
                                       rewriter.getIndexAttr(0));
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_to_standard/legalize_to_standard.cc b/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_to_standard/legalize_to_standard.cc
index 2b8b4a051ffa53..be752397f72fcb 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_to_standard/legalize_to_standard.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_to_standard/legalize_to_standard.cc
@@ -27,6 +27,7 @@ limitations under the License.
 #include "mlir/Dialect/Math/IR/Math.h"
 #include "mlir/IR/BuiltinOps.h"
 #include "mlir/Pass/Pass.h"
+#include "mlir/Support/LLVM.h"
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"
 
 namespace mlir {
@@ -48,8 +49,8 @@ class CompareIConvert : public OpRewritePattern<mhlo::CompareOp> {
                                 PatternRewriter &rewriter) const override {
     auto lhs = op.getLhs();
     auto rhs = op.getRhs();
-    auto lhsType = lhs.getType().cast<TensorType>();
-    auto rhsType = rhs.getType().cast<TensorType>();
+    auto lhsType = mlir::cast<TensorType>(lhs.getType());
+    auto rhsType = mlir::cast<TensorType>(rhs.getType());
 
     // Broadcasting not supported by this rewrite.
     if (lhsType.getShape() != rhsType.getShape()) return failure();
@@ -96,14 +97,14 @@ class CompareFConvert : public OpRewritePattern<mhlo::CompareOp> {
                                 PatternRewriter &rewriter) const override {
     auto lhs = op.getLhs();
     auto rhs = op.getRhs();
-    auto lhsType = lhs.getType().cast<TensorType>();
-    auto rhsType = rhs.getType().cast<TensorType>();
+    auto lhsType = mlir::cast<TensorType>(lhs.getType());
+    auto rhsType = mlir::cast<TensorType>(rhs.getType());
 
     // Broadcasting not supported by this rewrite.
     if (lhsType.getShape() != rhsType.getShape()) return failure();
 
-    if (!lhsType.getElementType().isa<FloatType>() ||
-        !rhsType.getElementType().isa<FloatType>())
+    if (!mlir::isa<FloatType>(lhsType.getElementType()) ||
+        !mlir::isa<FloatType>(rhsType.getElementType()))
       return failure();
 
     std::optional<arith::CmpFPredicate> comparePredicate = std::nullopt;
@@ -146,7 +147,7 @@ class ConvertIotaOp : public OpRewritePattern<mhlo::IotaOp> {
 
   LogicalResult matchAndRewrite(mhlo::IotaOp op,
                                 PatternRewriter &rewriter) const override {
-    auto outputType = op.getType().cast<ShapedType>();
+    auto outputType = mlir::cast<ShapedType>(op.getType());
     auto outputSize = outputType.getNumElements();
     auto dimension = op.getIotaDimension();
     auto maxDimSize = outputType.getDimSize(dimension);
@@ -154,7 +155,7 @@ class ConvertIotaOp : public OpRewritePattern<mhlo::IotaOp> {
     auto elementType = outputType.getElementType();
     int bitwidth;
 
-    auto complexTy = elementType.dyn_cast<ComplexType>();
+    auto complexTy = mlir::dyn_cast<ComplexType>(elementType);
     Type intOrFloatTy = elementType;
     if (complexTy) intOrFloatTy = complexTy.getElementType();
 
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_torch_index_select_to_gather/legalize_torch_index_select_to_gather.cc b/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_torch_index_select_to_gather/legalize_torch_index_select_to_gather.cc
index 432c7733544772..3fa7e61dd7096b 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_torch_index_select_to_gather/legalize_torch_index_select_to_gather.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/transforms/legalize_torch_index_select_to_gather/legalize_torch_index_select_to_gather.cc
@@ -30,6 +30,7 @@ limitations under the License.
 #include "mlir/IR/Value.h"
 #include "mlir/IR/ValueRange.h"
 #include "mlir/Pass/Pass.h"
+#include "mlir/Support/LLVM.h"
 #include "mlir/Support/LogicalResult.h"
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"
 
@@ -68,7 +69,7 @@ struct TorchIndexSelectIsGather : public OpRewritePattern<TorchIndexSelectOp> {
 
     int64_t indexVectorDim = index.getType().getRank();
     auto indexTy = index.getType();
-    auto indexElementTy = indexTy.getElementType().dyn_cast<IntegerType>();
+    auto indexElementTy = mlir::dyn_cast<IntegerType>(indexTy.getElementType());
     if (!indexElementTy) {
       return rewriter.notifyMatchFailure(
           op, "index must have integer element type");
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/transforms/lower_general_dot/lower_general_dot.cc b/third_party/xla/xla/mlir_hlo/mhlo/transforms/lower_general_dot/lower_general_dot.cc
index ee672671a68592..f4141c5dbcbaa1 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/transforms/lower_general_dot/lower_general_dot.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/transforms/lower_general_dot/lower_general_dot.cc
@@ -35,6 +35,7 @@ limitations under the License.
 #include "mlir/IR/TypeUtilities.h"
 #include "mlir/IR/Value.h"
 #include "mlir/Pass/Pass.h"
+#include "mlir/Support/LLVM.h"
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"
 
 namespace mlir {
@@ -76,9 +77,8 @@ Value transposeReshape(Value arg, Location loc,
                             rewriter.getIntegerType(64));
 
   auto transposePermutationAttr =
-      DenseIntElementsAttr::get(transposePermutationType,
-                                llvm::ArrayRef(transposePermutation))
-          .cast<DenseIntElementsAttr>();
+      mlir::cast<DenseIntElementsAttr>(DenseIntElementsAttr::get(
+          transposePermutationType, llvm::ArrayRef(transposePermutation)));
 
   // Compute the resulting shape.
   llvm::SmallVector<int64_t, 5> transposedShape;
@@ -144,7 +144,7 @@ Value transposeReshape(Value arg, Location loc,
 
 Value processDotArg(Value arg, Location loc, ArrayRef<int64_t> contractDimsAttr,
                     bool outerDimsFirst, PatternRewriter &rewriter) {
-  auto shape = arg.getType().cast<ShapedType>().getShape();
+  auto shape = mlir::cast<ShapedType>(arg.getType()).getShape();
 
   llvm::SmallVector<bool, 5> isOuterDim;
   isOuterDim.resize(shape.size(), true);
@@ -197,7 +197,7 @@ struct GeneralDotConvert : public OpRewritePattern<DotGeneralOp> {
     auto opPrecisionConfig = op.getPrecisionConfig();
     if (opPrecisionConfig.has_value()) precisionConfig = *opPrecisionConfig;
 
-    auto resultTy = op.getType().cast<ShapedType>();
+    auto resultTy = mlir::cast<ShapedType>(op.getType());
 
     auto lhsContractingDims = dotNumbers.getLhsContractingDimensions();
     auto rhsContractingDims = dotNumbers.getRhsContractingDimensions();
@@ -205,8 +205,8 @@ struct GeneralDotConvert : public OpRewritePattern<DotGeneralOp> {
     auto lhs = op.getLhs();
     auto rhs = op.getRhs();
 
-    RankedTensorType lhsTy = lhs.getType().dyn_cast<RankedTensorType>();
-    RankedTensorType rhsTy = rhs.getType().dyn_cast<RankedTensorType>();
+    RankedTensorType lhsTy = mlir::dyn_cast<RankedTensorType>(lhs.getType());
+    RankedTensorType rhsTy = mlir::dyn_cast<RankedTensorType>(rhs.getType());
     if (!lhsTy || !rhsTy) return failure();
 
     // The MHLO dot operator directly supports a vector dot product
@@ -264,8 +264,8 @@ struct GeneralDotConvert : public OpRewritePattern<DotGeneralOp> {
         rhs, loc, rhsContractingDims, /*outerDimsFirst=*/false, rewriter));
 
     // Accept only static shaped types.
-    auto lhsShapeType = lhs.getType().dyn_cast_or_null<ShapedType>();
-    auto rhsShapeType = rhs.getType().dyn_cast_or_null<ShapedType>();
+    auto lhsShapeType = mlir::dyn_cast_or_null<ShapedType>(lhs.getType());
+    auto rhsShapeType = mlir::dyn_cast_or_null<ShapedType>(rhs.getType());
     if (!lhsShapeType || !rhsShapeType) return failure();
 
     // Generate new dot operator on expanded types.
@@ -293,7 +293,7 @@ struct GeneralDotConvert : public OpRewritePattern<DotGeneralOp> {
 
     auto getDynamicDims = [&](Value arg,
                               llvm::ArrayRef<int64_t> contractingDims) {
-      RankedTensorType ty = arg.getType().cast<RankedTensorType>();
+      RankedTensorType ty = mlir::cast<RankedTensorType>(arg.getType());
       int index = 0;
       for (auto contractingDim : contractingDims) {
         for (; index < contractingDim; index++) {
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/transforms/map_mhlo_to_scalar_op.h b/third_party/xla/xla/mlir_hlo/mhlo/transforms/map_mhlo_to_scalar_op.h
index 03eec3cd8312a6..d7d94a7659048c 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/transforms/map_mhlo_to_scalar_op.h
+++ b/third_party/xla/xla/mlir_hlo/mhlo/transforms/map_mhlo_to_scalar_op.h
@@ -29,6 +29,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinTypes.h"
 #include "mlir/IR/ImplicitLocOpBuilder.h"
 #include "mlir/IR/TypeUtilities.h"
+#include "mlir/Support/LLVM.h"
 
 namespace mlir {
 namespace mhlo {
@@ -231,13 +232,13 @@ struct MapMhloOpToScalarOpImpl<SupportedType, void, Args...> {
 };
 
 struct IsAnyIntegerType {
-  bool operator()(Type t) { return t.isa<IntegerType>(); }
+  bool operator()(Type t) { return mlir::isa<IntegerType>(t); }
 };
 
 struct IsSignedIntegerType {
   bool operator()(Type t) {
     // Pretend that signless is signed. This will change eventually.
-    return t.isa<IntegerType>() && !t.isUnsignedInteger() &&
+    return mlir::isa<IntegerType>(t) && !t.isUnsignedInteger() &&
            !t.isSignlessInteger(1);
   }
 };
@@ -249,11 +250,11 @@ struct IsUnsignedIntegerType {
 };
 
 struct IsFloatType {
-  bool operator()(Type t) { return t.isa<FloatType>(); }
+  bool operator()(Type t) { return mlir::isa<FloatType>(t); }
 };
 
 struct IsComplexType {
-  bool operator()(Type t) { return t.isa<ComplexType>(); }
+  bool operator()(Type t) { return mlir::isa<ComplexType>(t); }
 };
 
 template <template <typename T> class MapTy, typename OpTy,
@@ -291,11 +292,11 @@ inline Value mapMhloOpToStdScalarOp<mhlo::AbsOp>(Location loc,
                                                  mhlo::AbsOp::Adaptor adaptor,
                                                  OpBuilder* b) {
   Type elementType = getElementTypeOrSelf(argTypes.front());
-  if (elementType.isa<FloatType>()) {
+  if (mlir::isa<FloatType>(elementType)) {
     return MapMhloOpToScalarOpImpl<IsFloatType, ::mlir::math::AbsFOp>{}(
         loc, resultTypes, argTypes, adaptor.getOperands(), b);
   }
-  if (elementType.isa<ComplexType>()) {
+  if (mlir::isa<ComplexType>(elementType)) {
     return MapMhloOpToScalarOpImpl<IsComplexType, ::mlir::complex::AbsOp>{}(
         loc, resultTypes, argTypes, adaptor.getOperands(), b);
   }
@@ -315,7 +316,7 @@ inline Value mapMhloOpToStdScalarOp<mhlo::AbsOp>(Location loc,
 // Return a constant for v of type t, splat if t is a vector type.
 inline Value getConstantOrSplat(OpBuilder* b, Location loc, Type t,
                                 Attribute v) {
-  if (VectorType vecType = t.dyn_cast<VectorType>()) {
+  if (VectorType vecType = mlir::dyn_cast<VectorType>(t)) {
     v = SplatElementsAttr::get(vecType, v);
   }
   return b->create<arith::ConstantOp>(loc, t, cast<TypedAttr>(v));
@@ -364,8 +365,8 @@ getCmpPredicate<arith::CmpIPredicate>(
 
 inline Value cmpComplex(Location loc, Value lhs, Value rhs,
                         ComparisonDirection comparisonDirection, OpBuilder* b) {
-  auto complexType = lhs.getType().cast<ComplexType>();
-  if (complexType.getElementType().isa<FloatType>()) {
+  auto complexType = mlir::cast<ComplexType>(lhs.getType());
+  if (mlir::isa<FloatType>(complexType.getElementType())) {
     if (comparisonDirection == ComparisonDirection::EQ) {
       return b->create<complex::EqualOp>(loc, lhs, rhs);
     }
@@ -409,7 +410,7 @@ inline Value mapMhloOpToStdScalarOp<mhlo::CompareOp>(
   const auto& lhs = adaptor.getLhs();
   const auto& rhs = adaptor.getRhs();
   Type elementType = getElementTypeOrSelf(argTypes.front());
-  if (elementType.isa<IntegerType>()) {
+  if (mlir::isa<IntegerType>(elementType)) {
     bool isUnsigned = IsUnsignedIntegerType{}(elementType);
     std::optional<arith::CmpIPredicate> predicate =
         getCmpPredicate<arith::CmpIPredicate>(comparisonDirection, !isUnsigned);
@@ -417,7 +418,7 @@ inline Value mapMhloOpToStdScalarOp<mhlo::CompareOp>(
     return b->create<ScalarIOp<mhlo::CompareOp>>(loc, predicate.value(), lhs,
                                                  rhs);
   }
-  if (auto floatType = elementType.dyn_cast<FloatType>()) {
+  if (auto floatType = mlir::dyn_cast<FloatType>(elementType)) {
     if (adaptor.getCompareType() &&
         *adaptor.getCompareType() == mhlo::ComparisonType::TOTALORDER) {
       // The semantics of totalorder fp compare are
@@ -461,7 +462,7 @@ inline Value mapMhloOpToStdScalarOp<mhlo::CompareOp>(
     return b->create<ScalarFOp<mhlo::CompareOp>>(loc, predicate.value(), lhs,
                                                  rhs);
   }
-  if (auto complexType = elementType.dyn_cast<ComplexType>())
+  if (auto complexType = mlir::dyn_cast<ComplexType>(elementType))
     return cmpComplex(loc, lhs, rhs, comparisonDirection, b);
   return nullptr;
 }
@@ -474,7 +475,8 @@ inline Value mapMhloOpToStdScalarOp<mhlo::ReducePrecisionOp>(
   mlir::ImplicitLocOpBuilder b(loc, *builder);
 
   // Integer and float types for casting and constant generation.
-  auto floatType = getElementTypeOrSelf(argTypes.front()).cast<FloatType>();
+  auto floatType =
+      mlir::cast<FloatType>(getElementTypeOrSelf(argTypes.front()));
   int64_t nbits = floatType.getWidth();
   auto intType = mlir::IntegerType::get(loc.getContext(), nbits);
 
@@ -606,7 +608,7 @@ inline Value mapMhloOpToStdScalarOp<mhlo::MaxOp>(Location loc,
   Value lhs = operands.front();
   Type complexTy = lhs.getType();
 
-  if (!complexTy.isa<ComplexType>())
+  if (!mlir::isa<ComplexType>(complexTy))
     return MapMhloOpToScalarOpImpl<IsFloatType, arith::MaximumFOp,
                                    IsSignedIntegerType, arith::MaxSIOp,
                                    IsUnsignedIntegerType, arith::MaxUIOp>{}(
@@ -632,7 +634,7 @@ inline Value mapMhloOpToStdScalarOp<mhlo::MinOp>(Location loc,
   Value lhs = operands.front();
   Type complexTy = lhs.getType();
 
-  if (!complexTy.isa<ComplexType>())
+  if (!mlir::isa<ComplexType>(complexTy))
     return MapMhloOpToScalarOpImpl<IsFloatType, arith::MinimumFOp,
                                    IsSignedIntegerType, arith::MinSIOp,
                                    IsUnsignedIntegerType, arith::MinUIOp>{}(
@@ -654,7 +656,7 @@ inline Value mapMhloOpToStdScalarOp<mhlo::RealOp>(Location loc,
                                                   ArrayRef<Type> argTypes,
                                                   mhlo::RealOp::Adaptor adaptor,
                                                   OpBuilder* b) {
-  if (!adaptor.getOperand().getType().isa<ComplexType>())
+  if (!mlir::isa<ComplexType>(adaptor.getOperand().getType()))
     return adaptor.getOperand();
   return MapMhloOpToScalarOpImpl<complex::ReOp>{}(loc, resultTypes, argTypes,
                                                   adaptor.getOperands(), b);
@@ -666,7 +668,7 @@ inline Value mapMhloOpToStdScalarOp<mhlo::ImagOp>(Location loc,
                                                   ArrayRef<Type> argTypes,
                                                   mhlo::ImagOp::Adaptor adaptor,
                                                   OpBuilder* b) {
-  if (!adaptor.getOperand().getType().isa<ComplexType>())
+  if (!mlir::isa<ComplexType>(adaptor.getOperand().getType()))
     return b->create<arith::ConstantOp>(
         loc, b->getZeroAttr(adaptor.getOperand().getType()));
   return MapMhloOpToScalarOpImpl<complex::ImOp>{}(loc, resultTypes, argTypes,
@@ -700,13 +702,13 @@ inline Value mapConvertOpToStdScalarOp(Location loc, ArrayRef<Type> targetTypes,
     return b->create<mlir::arith::SIToFPOp>(loc, resultTypes, args,
                                             std::nullopt);
   }
-  if (sourceType.isa<FloatType>() && targetType.isa<FloatType>()) {
+  if (mlir::isa<FloatType>(sourceType) && mlir::isa<FloatType>(targetType)) {
     if (sourceType == targetType) {
       return args.front();
     }
 
     mlir::Value src = args.front();
-    auto dst = targetType.cast<FloatType>();
+    auto dst = mlir::cast<FloatType>(targetType);
     if (sourceType.getIntOrFloatBitWidth() == dst.getWidth()) {
       // There are no ops for conversions between floats of equal width, so we
       // go through the next-larger standard type.
@@ -730,16 +732,17 @@ inline Value mapConvertOpToStdScalarOp(Location loc, ArrayRef<Type> targetTypes,
       return b->create<mlir::arith::CmpIOp>(loc, arith::CmpIPredicate::ne,
                                             args.front(), zeroIntval);
     }
-    if (sourceType.isa<FloatType>()) {
+    if (mlir::isa<FloatType>(sourceType)) {
       Value zero = b->create<arith::ConstantOp>(
           loc, b->getZeroAttr(args.front().getType()));
       return b->create<mlir::arith::CmpFOp>(loc, arith::CmpFPredicate::UNE,
                                             args.front(), zero);
     }
   }
-  if (sourceType.isa<IntegerType>() && targetType.isa<IntegerType>()) {
-    auto src = sourceType.cast<IntegerType>();
-    auto res = targetType.cast<IntegerType>();
+  if (mlir::isa<IntegerType>(sourceType) &&
+      mlir::isa<IntegerType>(targetType)) {
+    auto src = mlir::cast<IntegerType>(sourceType);
+    auto res = mlir::cast<IntegerType>(targetType);
     if (src.getWidth() > res.getWidth()) {
       return b->create<mlir::arith::TruncIOp>(loc, resultTypes, args,
                                               std::nullopt);
@@ -767,17 +770,19 @@ inline Value mapConvertOpToStdScalarOp(Location loc, ArrayRef<Type> targetTypes,
     return b->create<mlir::arith::FPToSIOp>(loc, resultTypes, args,
                                             std::nullopt);
   }
-  if (targetType.isa<ComplexType>()) {
-    Type targetElementType = targetType.cast<ComplexType>().getElementType();
-    assert(!targetElementType.isa<ComplexType>() &&
+  if (mlir::isa<ComplexType>(targetType)) {
+    Type targetElementType =
+        mlir::cast<ComplexType>(targetType).getElementType();
+    assert(!mlir::isa<ComplexType>(targetElementType) &&
            "elements of complex numbers should not be complex");
     Value targetReal;
     Value targetImag;
-    if (sourceType.isa<ComplexType>()) {
+    if (mlir::isa<ComplexType>(sourceType)) {
       // We are converting from complex type: convert real and imaginary parts
       // separately.
-      Type sourceElementType = sourceType.cast<ComplexType>().getElementType();
-      assert(!sourceElementType.isa<ComplexType>() &&
+      Type sourceElementType =
+          mlir::cast<ComplexType>(sourceType).getElementType();
+      assert(!mlir::isa<ComplexType>(sourceElementType) &&
              "elements of complex numbers should not be complex");
       Value sourceReal =
           b->create<mlir::complex::ReOp>(loc, sourceElementType, args.front());
@@ -800,7 +805,7 @@ inline Value mapConvertOpToStdScalarOp(Location loc, ArrayRef<Type> targetTypes,
     return b->create<mlir::complex::CreateOp>(loc, targetType, targetReal,
                                               targetImag);
   }
-  if (auto sourceComplexType = sourceType.dyn_cast<ComplexType>()) {
+  if (auto sourceComplexType = mlir::dyn_cast<ComplexType>(sourceType)) {
     auto sourceElementType = sourceComplexType.getElementType();
     // When converting from complex to a non-complex type, we take just the real
     // part of the complex number.
@@ -840,14 +845,14 @@ inline Value mapMhloOpToStdScalarOp<mhlo::DotOp>(Location loc,
   const auto& rhs = adaptor.getOperands()[1];
   const auto& result = adaptor.getOperands()[2];
   Type elementType = lhs.getType();
-  if (elementType.isa<FloatType>()) {
+  if (mlir::isa<FloatType>(elementType)) {
     Value floatMul =
         MapMhloOpToScalarOpImpl<IsFloatType, ::mlir::arith::MulFOp>{}(
             loc, resultTypes, argTypes, {lhs, rhs}, b);
     return MapMhloOpToScalarOpImpl<IsFloatType, ::mlir::arith::AddFOp>{}(
         loc, resultTypes, argTypes, {floatMul, result}, b);
   }
-  if (elementType.isa<IntegerType>()) {
+  if (mlir::isa<IntegerType>(elementType)) {
     Value intMul =
         MapMhloOpToScalarOpImpl<IsAnyIntegerType, ::mlir::arith::MulIOp>{}(
             loc, resultTypes, argTypes, {lhs, rhs}, b);
@@ -861,9 +866,9 @@ template <>
 inline Value mapMhloOpToStdScalarOp<mhlo::IsFiniteOp>(
     Location loc, ArrayRef<Type> /*ResultTypes*/, ArrayRef<Type> /*argTypes*/,
     mhlo::IsFiniteOp::Adaptor adaptor, OpBuilder* b) {
-  if (adaptor.getX().getType().isa<FloatType>()) {
+  if (mlir::isa<FloatType>(adaptor.getX().getType())) {
     auto posInf = APFloat::getInf(
-        adaptor.getX().getType().cast<FloatType>().getFloatSemantics());
+        mlir::cast<FloatType>(adaptor.getX().getType()).getFloatSemantics());
     auto constPosInf = b->create<arith::ConstantOp>(
         loc, b->getFloatAttr(adaptor.getX().getType(), posInf));
     Value absX = b->create<::mlir::math::AbsFOp>(loc, adaptor.getX());
@@ -911,7 +916,7 @@ struct CompareSelectOpToStdScalarOp<SupportedType, StdCompareOp, Predicate,
 inline Value mhloAlwaysPropagateNaN(Value v, ValueRange args, Location loc,
                                     OpBuilder* b) {
   Type elementType = getElementTypeOrSelf(args.front().getType());
-  if (auto floatType = elementType.dyn_cast<FloatType>()) {
+  if (auto floatType = mlir::dyn_cast<FloatType>(elementType)) {
     Value isnan = b->create<mlir::arith::CmpFOp>(loc, arith::CmpFPredicate::UNO,
                                                  args[0], args[1]);
 
@@ -941,7 +946,7 @@ inline Value makeSafeIntDiv(ImplicitLocOpBuilder& lb, Type originalType,
                             Value lhs, Value rhs, Value returnedOnZero,
                             Value returnedOnSignedOverflow) {
   Type type = lhs.getType();
-  auto elementType = getElementTypeOrSelf(type).cast<IntegerType>();
+  auto elementType = mlir::cast<IntegerType>(getElementTypeOrSelf(type));
   Value zero = lb.create<arith::ConstantOp>(lb.getZeroAttr(type));
   auto makeConstant = [&](const APInt& i) {
     return getConstantOrSplat(&lb, lb.getLoc(), type,
@@ -981,7 +986,7 @@ inline Value mapMhloOpToStdScalarOp<mhlo::DivOp>(Location loc,
                                                  mhlo::DivOp::Adaptor adaptor,
                                                  OpBuilder* b) {
   Type originalType = getElementTypeOrSelf(argTypes.front());
-  if (originalType.isa<ComplexType, FloatType>()) {
+  if (mlir::isa<ComplexType, FloatType>(originalType)) {
     return MapMhloOpToScalarOpImpl<IsFloatType, arith::DivFOp, IsComplexType,
                                    complex::DivOp>{}(loc, resultTypes, argTypes,
                                                      adaptor.getOperands(), b);
@@ -993,7 +998,7 @@ inline Value mapMhloOpToStdScalarOp<mhlo::DivOp>(Location loc,
   // INT_SMIN /s -1 = INT_SMIN
   ImplicitLocOpBuilder lb(loc, *b);
   Type type = adaptor.getLhs().getType();
-  auto elementType = getElementTypeOrSelf(type).cast<IntegerType>();
+  auto elementType = mlir::cast<IntegerType>(getElementTypeOrSelf(type));
   auto makeConstant = [&](const APInt& i) {
     return getConstantOrSplat(&lb, lb.getLoc(), type,
                               lb.getIntegerAttr(elementType, i));
@@ -1013,7 +1018,7 @@ inline Value mapMhloOpToStdScalarOp<mhlo::RemOp>(Location loc,
                                                  mhlo::RemOp::Adaptor adaptor,
                                                  OpBuilder* b) {
   Type originalType = getElementTypeOrSelf(argTypes.front());
-  if (originalType.isa<ComplexType, FloatType>()) {
+  if (mlir::isa<ComplexType, FloatType>(originalType)) {
     return MapMhloOpToScalarOpImpl<IsFloatType, arith::RemFOp>{}(
         loc, resultTypes, argTypes, adaptor.getOperands(), b);
   }
@@ -1038,12 +1043,12 @@ inline Value mapMhloOpToStdScalarOp<mhlo::NegOp>(Location loc,
                                                  mhlo::NegOp::Adaptor adaptor,
                                                  OpBuilder* b) {
   Type elementType = getElementTypeOrSelf(adaptor.getOperand().getType());
-  if (elementType.isa<ComplexType, FloatType>()) {
+  if (mlir::isa<ComplexType, FloatType>(elementType)) {
     return MapMhloOpToScalarOpImpl<IsFloatType, ::mlir::arith::NegFOp,
                                    IsComplexType, ::mlir::complex::NegOp>{}(
         loc, resultTypes, argTypes, adaptor.getOperands(), b);
   }
-  if (elementType.isa<IntegerType>()) {
+  if (mlir::isa<IntegerType>(elementType)) {
     // lmhlo.neg(x, result) -> result = sub(0, x)
     Value lhs = adaptor.getOperand();
     Value zeroIntval =
@@ -1060,7 +1065,7 @@ inline Value mapMhloOpToStdScalarOp<mhlo::NotOp>(Location loc,
                                                  mhlo::NotOp::Adaptor adaptor,
                                                  OpBuilder* b) {
   Type elementType = getElementTypeOrSelf(adaptor.getOperand().getType());
-  if (auto integerType = elementType.dyn_cast<IntegerType>()) {
+  if (auto integerType = mlir::dyn_cast<IntegerType>(elementType)) {
     // lmhlo.not(x) -> x ^ -1
     Value allOnes = getConstantOrSplat(
         b, loc, adaptor.getOperand().getType(),
@@ -1083,7 +1088,7 @@ inline Value mapMhloOpToStdScalarOp<mhlo::LogisticOp>(
 
   Type type = getElementTypeOrSelf(resultTypes[0]);
   Value oneFloat =
-      type.isa<ComplexType>()
+      mlir::isa<ComplexType>(type)
           ? b->create<arith::ConstantOp>(loc, b->getF32FloatAttr(1.0))
           : getConstantOrSplat(b, loc, resultTypes[0],
                                FloatAttr::get(type, 1.0f));
@@ -1105,7 +1110,7 @@ inline Value mapMhloOpToStdScalarOp<mhlo::PowOp>(Location loc,
   // TODO: b/315868720 Consider alternate lowerings of mhlo::PowOp with integer
   // operands. Floating point can use std::powf
   auto resultType = getElementTypeOrSelf(resultTypes.front());
-  if (resultType.isa<ComplexType, FloatType>()) {
+  if (mlir::isa<ComplexType, FloatType>(resultType)) {
     return MapMhloOpToScalarOpImpl<IsFloatType, math::PowFOp, IsComplexType,
                                    complex::PowOp>{}(loc, resultTypes, argTypes,
                                                      adaptor.getOperands(), b);
@@ -1193,7 +1198,7 @@ inline Value mapMhloOpToStdScalarOp<mhlo::SignOp>(Location loc,
                                                   OpBuilder* b) {
   Value operand = adaptor.getOperand();
   Type elementType = getElementTypeOrSelf(operand.getType());
-  if (auto floatType = elementType.dyn_cast<FloatType>()) {
+  if (auto floatType = mlir::dyn_cast<FloatType>(elementType)) {
     Value zero =
         b->create<arith::ConstantOp>(loc, b->getZeroAttr(operand.getType()));
     Value ne0I1 = b->create<::mlir::arith::CmpFOp>(
@@ -1206,7 +1211,7 @@ inline Value mapMhloOpToStdScalarOp<mhlo::SignOp>(Location loc,
         loc, arith::CmpFPredicate::UNO, operand, operand);
     return b->create<::mlir::arith::SelectOp>(loc, isNan, operand, copySign);
   }
-  if (auto integerType = elementType.dyn_cast<IntegerType>()) {
+  if (auto integerType = mlir::dyn_cast<IntegerType>(elementType)) {
     // sign(x) = x == 0 ? 0 : ((x s>> 31) | 1)
     Value zero =
         b->create<arith::ConstantOp>(loc, b->getZeroAttr(operand.getType()));
@@ -1222,7 +1227,7 @@ inline Value mapMhloOpToStdScalarOp<mhlo::SignOp>(Location loc,
     Value orOp = b->create<::mlir::arith::OrIOp>(loc, ashr, one);
     return b->create<::mlir::arith::SelectOp>(loc, cmp, zero, orOp);
   }
-  if (elementType.isa<ComplexType>()) {
+  if (mlir::isa<ComplexType>(elementType)) {
     return b->create<::mlir::complex::SignOp>(loc, elementType, operand);
   }
   return nullptr;
@@ -1233,8 +1238,9 @@ inline Value mapMhloOpToStdScalarOp<mhlo::SignOp>(Location loc,
 inline Value selectShiftedOrSaturated(ImplicitLocOpBuilder& lb, Value rhs,
                                       Value shifted, Value saturated,
                                       Type type) {
-  Type etype =
-      type.isa<ShapedType>() ? type.cast<ShapedType>().getElementType() : type;
+  Type etype = mlir::isa<ShapedType>(type)
+                   ? mlir::cast<ShapedType>(type).getElementType()
+                   : type;
   auto bitWidthInt = etype.getIntOrFloatBitWidth();
   Value bitWidth = getConstantOrSplat(&lb, lb.getLoc(), type,
                                       lb.getIntegerAttr(etype, bitWidthInt));
@@ -1283,8 +1289,9 @@ inline Value mapMhloOpToStdScalarOp<mhlo::ShiftRightArithmeticOp>(
   Value lhs = adaptor.getLhs();
   Value rhs = adaptor.getRhs();
   Type type = lhs.getType();
-  Type etype =
-      type.isa<ShapedType>() ? type.cast<ShapedType>().getElementType() : type;
+  Type etype = mlir::isa<ShapedType>(type)
+                   ? mlir::cast<ShapedType>(type).getElementType()
+                   : type;
   auto bitWidthInt = etype.getIntOrFloatBitWidth();
 
   // "Saturate" if the shift is greater than the bitwidth of the type
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/transforms/materialize_broadcasts/materialize_broadcasts.cc b/third_party/xla/xla/mlir_hlo/mhlo/transforms/materialize_broadcasts/materialize_broadcasts.cc
index 32538f4a8c37f0..e92f5288c591e0 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/transforms/materialize_broadcasts/materialize_broadcasts.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/transforms/materialize_broadcasts/materialize_broadcasts.cc
@@ -20,6 +20,7 @@ limitations under the License.
 #include "mlir/IR/MLIRContext.h"
 #include "mlir/IR/Operation.h"
 #include "mlir/IR/PatternMatch.h"
+#include "mlir/Support/LLVM.h"
 #include "mlir/Transforms/DialectConversion.h"
 
 namespace mlir {
@@ -36,9 +37,10 @@ struct ClampWithBroadcastConvert : public OpRewritePattern<ClampOp> {
 
   LogicalResult matchAndRewrite(ClampOp op,
                                 PatternRewriter &rewriter) const override {
-    auto operandType = op.getOperand().getType().dyn_cast<RankedTensorType>();
-    auto maxType = op.getMax().getType().dyn_cast<RankedTensorType>();
-    auto minType = op.getMin().getType().dyn_cast<RankedTensorType>();
+    auto operandType =
+        mlir::dyn_cast<RankedTensorType>(op.getOperand().getType());
+    auto maxType = mlir::dyn_cast<RankedTensorType>(op.getMax().getType());
+    auto minType = mlir::dyn_cast<RankedTensorType>(op.getMin().getType());
     // Unrancked types are not supported.
     if (!operandType || !maxType || !minType) return failure();
     // Does not support operand with dynamic dimensions for now.
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/transforms/mhlo_canonicalize_dot/mhlo_canonicalize_dot.cc b/third_party/xla/xla/mlir_hlo/mhlo/transforms/mhlo_canonicalize_dot/mhlo_canonicalize_dot.cc
index 959c82837be8b3..11fe1151407ce1 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/transforms/mhlo_canonicalize_dot/mhlo_canonicalize_dot.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/transforms/mhlo_canonicalize_dot/mhlo_canonicalize_dot.cc
@@ -23,6 +23,7 @@ limitations under the License.
 #include "mlir/Dialect/Func/IR/FuncOps.h"
 #include "mlir/Dialect/Tensor/IR/Tensor.h"
 #include "mlir/Pass/Pass.h"
+#include "mlir/Support/LLVM.h"
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"
 
 namespace mlir {
@@ -42,7 +43,7 @@ LogicalResult canonicalizeDot(DotOp dotOp, PatternRewriter& rewriter) {
   SmallVector<ReassociationIndices> reassociationMap = {{0, 1}};
   auto collapseUnitParallelDim = [&](Value orig,
                                      unsigned parallelDimIdx) -> Value {
-    auto type = orig.getType().dyn_cast<RankedTensorType>();
+    auto type = mlir::dyn_cast<RankedTensorType>(orig.getType());
     if (!type || type.getRank() == 1 || type.getDimSize(parallelDimIdx) != 1)
       return orig;
 
@@ -62,12 +63,12 @@ LogicalResult canonicalizeDot(DotOp dotOp, PatternRewriter& rewriter) {
   SmallVector<int64_t> newShape;
   if (!matvec != !vecmat) {
     newShape.push_back(
-        vecmat ? rhs.getType().cast<ShapedType>().getShape().back()
-               : lhs.getType().cast<ShapedType>().getShape().front());
+        vecmat ? mlir::cast<ShapedType>(rhs.getType()).getShape().back()
+               : mlir::cast<ShapedType>(lhs.getType()).getShape().front());
   }
 
   auto newTy = RankedTensorType::get(
-      newShape, dotOp.getType().cast<ShapedType>().getElementType());
+      newShape, mlir::cast<ShapedType>(dotOp.getType()).getElementType());
 
   auto newOp = rewriter.create<DotOp>(
       loc, newTy, newLhs, newRhs, dotOp.getPrecisionConfig().value_or(nullptr));
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/transforms/mhlo_canonicalize_reduction/mhlo_canonicalize_reduction.cc b/third_party/xla/xla/mlir_hlo/mhlo/transforms/mhlo_canonicalize_reduction/mhlo_canonicalize_reduction.cc
index bb68ec22fbac90..ed3d62446cc2a9 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/transforms/mhlo_canonicalize_reduction/mhlo_canonicalize_reduction.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/transforms/mhlo_canonicalize_reduction/mhlo_canonicalize_reduction.cc
@@ -24,6 +24,7 @@ limitations under the License.
 #include "mlir/Dialect/Func/IR/FuncOps.h"
 #include "mlir/Dialect/Tensor/IR/Tensor.h"
 #include "mlir/Pass/Pass.h"
+#include "mlir/Support/LLVM.h"
 
 namespace mlir {
 namespace mhlo {
@@ -136,7 +137,7 @@ struct HloCanonicalizeReductionPass
       if (dimsToReduce.empty()) return;
 
       // suppose reduce input is a ranked tensor
-      auto ty = op.getOperand(0).getType().dyn_cast<RankedTensorType>();
+      auto ty = mlir::dyn_cast<RankedTensorType>(op.getOperand(0).getType());
       if (!ty) return signalPassFailure();
       int rank = ty.getRank();
       int ndimsToReduce = dimsToReduce.size();
@@ -222,7 +223,7 @@ struct HloCanonicalizeReductionPass
       }
       SmallVector<Type> elementTypes{llvm::map_range(
           op.getBody().front().getTerminator()->getOperands(), [](Value v) {
-            return v.getType().cast<ShapedType>().getElementType();
+            return mlir::cast<ShapedType>(v.getType()).getElementType();
           })};
       auto newOp = b.create<ReduceOp>(loc, newOperands, op.getInitValues(),
                                       attr, elementTypes);
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/transforms/mhlo_canonicalize_scatter/mhlo_canonicalize_scatter.cc b/third_party/xla/xla/mlir_hlo/mhlo/transforms/mhlo_canonicalize_scatter/mhlo_canonicalize_scatter.cc
index 30b0c6f1848bdd..e3ef577d66ec53 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/transforms/mhlo_canonicalize_scatter/mhlo_canonicalize_scatter.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/transforms/mhlo_canonicalize_scatter/mhlo_canonicalize_scatter.cc
@@ -27,6 +27,7 @@ limitations under the License.
 #include "mlir/Dialect/Func/IR/FuncOps.h"
 #include "mlir/Dialect/Tensor/IR/Tensor.h"
 #include "mlir/Pass/Pass.h"
+#include "mlir/Support/LLVM.h"
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"
 
 namespace mlir {
@@ -67,7 +68,7 @@ SmallVector<Value> transposeTensors(OpBuilder& b, Location loc,
 SmallVector<Value> transposeUpdatesAccordingToScatterDimsMap(
     OpBuilder& b, Location loc, SmallVector<Value> updates,
     ArrayRef<int64_t> scatterDimsToOperandDims) {
-  auto updatesType = updates.front().getType().cast<RankedTensorType>();
+  auto updatesType = mlir::cast<RankedTensorType>(updates.front().getType());
   int64_t updatesRank = updatesType.getRank();
   int64_t operandRank = updatesRank - 1;
 
@@ -87,7 +88,7 @@ SmallVector<Value> transposeUpdatesAccordingToScatterDimsMap(
 SmallVector<Value> transposeUpdatesToMoveWindowDimensionsInside(
     OpBuilder& b, Location loc, SmallVector<Value> updates,
     ArrayRef<int64_t> updateWindowDims) {
-  auto updatesType = updates.front().getType().cast<RankedTensorType>();
+  auto updatesType = mlir::cast<RankedTensorType>(updates.front().getType());
   int64_t updatesRank = updatesType.getRank();
 
   // Move update dimensions to the back
@@ -102,7 +103,7 @@ SmallVector<Value> transposeUpdatesToMoveWindowDimensionsInside(
 SmallVector<Value> reshapeUpdatesToEnsureSingleScatterDimension(
     OpBuilder& b, Location loc, ValueRange updates,
     ArrayRef<int64_t> updateWindowDims) {
-  auto updatesType = updates.front().getType().cast<RankedTensorType>();
+  auto updatesType = mlir::cast<RankedTensorType>(updates.front().getType());
   int64_t updatesRank = updatesType.getRank();
 
   // Collapse scatter dimensions to 1D if there are more than 1 or prepend a
@@ -186,7 +187,7 @@ struct CanonicalizeScatterPattern : public OpRewritePattern<ScatterOp> {
         scatterOp.getScatterDimensionNumbers();
 
     auto operandType =
-        scatterOp.getInputs().front().getType().cast<RankedTensorType>();
+        mlir::cast<RankedTensorType>(scatterOp.getInputs().front().getType());
     int64_t operandRank = operandType.getRank();
     auto [operandPermutation, operandPermutationInverse] =
         makeOperandStartIndexPermutations(
@@ -205,7 +206,7 @@ struct CanonicalizeScatterPattern : public OpRewritePattern<ScatterOp> {
         dimsAttrs.getUpdateWindowDims(), dimsAttrs.getInsertedWindowDims());
 
     int64_t scatterIndicesVectorSize =
-        canonicalIndices.getType().cast<TensorType>().getDimSize(1);
+        mlir::cast<TensorType>(canonicalIndices.getType()).getDimSize(1);
     auto canonicalDimsAttrs = ScatterDimensionNumbersAttr::get(
         rewriter.getContext(),
         /*updateWindowDims=*/
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/transforms/mhlo_flatten_tuple/mhlo_flatten_tuple.cc b/third_party/xla/xla/mlir_hlo/mhlo/transforms/mhlo_flatten_tuple/mhlo_flatten_tuple.cc
index f55bb8e85973dc..b2086947066188 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/transforms/mhlo_flatten_tuple/mhlo_flatten_tuple.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/transforms/mhlo_flatten_tuple/mhlo_flatten_tuple.cc
@@ -32,6 +32,7 @@ limitations under the License.
 #include "mlir/IR/Operation.h"
 #include "mlir/IR/Value.h"
 #include "mlir/Pass/Pass.h"
+#include "mlir/Support/LLVM.h"
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"
 
 namespace mlir {
@@ -44,13 +45,13 @@ namespace {
 
 // Calculates the flatten types of a value.
 void flattenTupleType(Value value, llvm::SmallVectorImpl<Type> &types) {
-  if (!value.getType().isa<TupleType>()) {
+  if (!mlir::isa<TupleType>(value.getType())) {
     types.push_back(value.getType());
     return;
   }
 
   // This function doesn't handle nested tuple.
-  auto tupleType = value.getType().cast<TupleType>();
+  auto tupleType = mlir::cast<TupleType>(value.getType());
   types.append(tupleType.begin(), tupleType.end());
 }
 
@@ -59,18 +60,19 @@ void flattenTupleType(Value value, llvm::SmallVectorImpl<Type> &types) {
 // of the root TupleOp or given value if the type is not TupleType.
 Value createTupleValue(OpBuilder &builder, Location loc,
                        ValueRange flattenValues, Type tupleType) {
-  if (!tupleType.isa<TupleType>()) {
+  if (!mlir::isa<TupleType>(tupleType)) {
     assert(flattenValues.size() == 1);
     return flattenValues[0];
   }
 
-  assert(tupleType.cast<TupleType>().getTypes().size() == flattenValues.size());
+  assert(mlir::cast<TupleType>(tupleType).getTypes().size() ==
+         flattenValues.size());
   return builder.create<mhlo::TupleOp>(loc, flattenValues);
 }
 
 void flattenTupleValue(OpBuilder &builder, Location loc, Value value,
                        llvm::SmallVectorImpl<Value> &flattenedValues) {
-  auto tupleType = value.getType().dyn_cast<TupleType>();
+  auto tupleType = mlir::dyn_cast<TupleType>(value.getType());
   if (!tupleType) {
     flattenedValues.push_back(value);
     return;
@@ -88,10 +90,10 @@ struct FlattenCustomCallOp : public OpRewritePattern<CustomCallOp> {
 
   LogicalResult matchAndRewrite(CustomCallOp op,
                                 PatternRewriter &rewriter) const override {
-    bool flattenResult =
-        op->getNumResults() == 1 && op->getResult(0).getType().isa<TupleType>();
+    bool flattenResult = op->getNumResults() == 1 &&
+                         mlir::isa<TupleType>(op->getResult(0).getType());
     bool flattenOperands = llvm::any_of(op.getInputs(), [](Value operand) {
-      return operand.getType().isa<TupleType>();
+      return mlir::isa<TupleType>(operand.getType());
     });
 
     if (!flattenResult && !flattenOperands) return failure();
@@ -106,8 +108,8 @@ struct FlattenCustomCallOp : public OpRewritePattern<CustomCallOp> {
     } else {
       // Check for nested tuples.
       for (Type innerType :
-           op->getResult(0).getType().cast<TupleType>().getTypes())
-        if (innerType.isa<TupleType>()) return failure();
+           mlir::cast<TupleType>(op->getResult(0).getType()).getTypes())
+        if (mlir::isa<TupleType>(innerType)) return failure();
 
       for (auto result : op->getResults())
         flattenTupleType(result, flattenedResultTypes);
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/transforms/mhlo_quant_legalize_to_int/mhlo_quant_legalize_to_int.cc b/third_party/xla/xla/mlir_hlo/mhlo/transforms/mhlo_quant_legalize_to_int/mhlo_quant_legalize_to_int.cc
index 4d44b97db4fde8..e6b0b132863938 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/transforms/mhlo_quant_legalize_to_int/mhlo_quant_legalize_to_int.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/transforms/mhlo_quant_legalize_to_int/mhlo_quant_legalize_to_int.cc
@@ -54,12 +54,12 @@ namespace {
 using QuantType = std::variant<quant::UniformQuantizedType,
                                quant::UniformQuantizedPerAxisType>;
 FailureOr<QuantType> getQuantType(Type type) {
-  if (auto quantType =
-          getElementTypeOrSelf(type).dyn_cast<quant::UniformQuantizedType>()) {
+  if (auto quantType = mlir::dyn_cast<quant::UniformQuantizedType>(
+          getElementTypeOrSelf(type))) {
     return QuantType(quantType);
   }
-  if (auto quantType = getElementTypeOrSelf(type)
-                           .dyn_cast<quant::UniformQuantizedPerAxisType>()) {
+  if (auto quantType = mlir::dyn_cast<quant::UniformQuantizedPerAxisType>(
+          getElementTypeOrSelf(type))) {
     return QuantType(quantType);
   }
   return failure();
@@ -168,16 +168,16 @@ void getQuantizationStorageInfo(OpBuilder &builder, Location loc,
 
 // Extracts storage type of a UQ type. Return original type if it is no UQ type.
 Type getQuantStorageType(Type type) {
-  if (auto shaped = type.dyn_cast<ShapedType>()) {
+  if (auto shaped = mlir::dyn_cast<ShapedType>(type)) {
     return shaped.clone(getQuantStorageType(shaped.getElementType()));
   }
 
-  if (auto elementType =
-          getElementTypeOrSelf(type).dyn_cast<quant::UniformQuantizedType>()) {
+  if (auto elementType = mlir::dyn_cast<quant::UniformQuantizedType>(
+          getElementTypeOrSelf(type))) {
     return elementType.getStorageType();
   }
-  if (auto elementType = getElementTypeOrSelf(type)
-                             .dyn_cast<quant::UniformQuantizedPerAxisType>()) {
+  if (auto elementType = mlir::dyn_cast<quant::UniformQuantizedPerAxisType>(
+          getElementTypeOrSelf(type))) {
     return elementType.getStorageType();
   }
   return type;
@@ -305,7 +305,8 @@ Value requantize(mlir::OpState op, Value input, QuantType inputQuantType,
                                         outputQuantType, outputFloat);
 
   // Clamp output if the output integer bit-width <32.
-  if (outputTensorType.getElementType().cast<IntegerType>().getWidth() < 32) {
+  if (mlir::cast<IntegerType>(outputTensorType.getElementType()).getWidth() <
+      32) {
     Value quantizationMin, quantizationMax;
     getQuantizationStorageInfo(rewriter, op->getLoc(), outputQuantType,
                                quantizationMin, quantizationMax);
@@ -334,8 +335,9 @@ class ConvertUniformQuantizeOp
       if (succeeded(quantType)) {
         return matchAndRewriteQuantize(op, adaptor, rewriter, *quantType);
       }
-    } else if (inputElementType.isa<quant::UniformQuantizedType,
-                                    quant::UniformQuantizedPerAxisType>()) {
+    } else if (mlir::isa<quant::UniformQuantizedType,
+                         quant::UniformQuantizedPerAxisType>(
+                   inputElementType)) {
       auto inputQuantType = getQuantType(inputElementType);
       auto outputQuantType = getQuantType(op.getResult().getType());
       if (succeeded(inputQuantType) && succeeded(outputQuantType)) {
@@ -395,8 +397,8 @@ class ConvertUniformQuantizeOp
         op,
         requantize(op, adaptor.getOperand(), inputQuantType, outputQuantType,
                    /*outputTensorType=*/
-                   op.getResult().getType().cast<TensorType>().clone(
-                       getQuantStorageType(outputQuantType)),
+                   mlir::cast<TensorType>(op.getResult().getType())
+                       .clone(getQuantStorageType(outputQuantType)),
                    rewriter));
     return success();
   }
@@ -423,13 +425,13 @@ class ConvertUniformDequantizeOp
     Value input = adaptor.getOperand();
     // TODO: b/260280919 - Consider avoiding conversion to int32.
     auto resInt32TensorType =
-        input.getType().cast<TensorType>().clone(rewriter.getI32Type());
+        mlir::cast<TensorType>(input.getType()).clone(rewriter.getI32Type());
     Value resInt32 = rewriter.create<mhlo::ConvertOp>(
         op->getLoc(), resInt32TensorType, input);
     resInt32 = rewriter.create<chlo::BroadcastSubOp>(
         op->getLoc(), resInt32TensorType, resInt32, zeroPoints, broadcastDims);
     auto resFloatTensorType =
-        resInt32.getType().cast<TensorType>().clone(rewriter.getF32Type());
+        mlir::cast<TensorType>(resInt32.getType()).clone(rewriter.getF32Type());
     Value resFloat = rewriter.create<mhlo::ConvertOp>(
         op->getLoc(), resFloatTensorType, resInt32);
     resFloat = rewriter.replaceOpWithNewOp<chlo::BroadcastMulOp>(
@@ -628,11 +630,9 @@ LogicalResult matchAndRewriteDotLikeHybridOp(
   if (failed(rhsElementQuantType)) {
     return failure();
   }
-  auto resFloat32TensorType =
-      op.getResult().getType().template cast<TensorType>();
-  auto rhsFloat32TensorType =
-      op.getRhs().getType().template cast<TensorType>().clone(
-          rewriter.getF32Type());
+  auto resFloat32TensorType = mlir::cast<TensorType>(op.getResult().getType());
+  auto rhsFloat32TensorType = mlir::cast<TensorType>(op.getRhs().getType())
+                                  .clone(rewriter.getF32Type());
 
   // Get scales and zero points for rhs.
   Value rhsScale, rhsZeroPoint;
@@ -672,7 +672,7 @@ Value createZeroPointPartialOffset(OpBuilder &builder, Location loc,
 
   // Calculate the output tensor shape. This is input tensor dims minus
   // contracting dims.
-  auto rankedTensor = tensor.getType().cast<RankedTensorType>();
+  auto rankedTensor = mlir::cast<RankedTensorType>(tensor.getType());
   SmallVector<int64_t> outputDims;
   for (int64_t i = 0; i < rankedTensor.getRank(); ++i) {
     if (llvm::count(reductionDims, i) == 0) {
@@ -683,7 +683,7 @@ Value createZeroPointPartialOffset(OpBuilder &builder, Location loc,
   // Convert input tensor to output type since mhlo::Reduce only supports same
   // element type for input/output.
   tensor = builder.create<mhlo::ConvertOp>(
-      loc, tensor.getType().cast<TensorType>().clone(outputElementType),
+      loc, mlir::cast<TensorType>(tensor.getType()).clone(outputElementType),
       tensor);
   auto reducerTensorType = RankedTensorType::get({}, outputElementType);
 
@@ -756,7 +756,7 @@ Value broadcastZpContribution(OpBuilder &builder, Location loc,
   // zero-point-offset tensor to the final output tensor, and then do the
   // broadcast.
   auto zpContributionRank =
-      zpContribution.getType().cast<ShapedType>().getRank();
+      mlir::cast<ShapedType>(zpContribution.getType()).getRank();
   SmallVector<int64_t> broadcastDims;
   broadcastDims.resize(zpContributionRank, 0);
   // Result tensor will have batching dims first, then LHS result dims, then
@@ -779,7 +779,7 @@ Value broadcastZpContribution(OpBuilder &builder, Location loc,
   }
   // Use broadcast_in_dim or dyanmic_broadcast_in_dim based on output shape
   // dynamism.
-  if (outputTensorType.cast<ShapedType>().hasStaticShape()) {
+  if (mlir::cast<ShapedType>(outputTensorType).hasStaticShape()) {
     zpContribution = builder.create<mhlo::BroadcastInDimOp>(
         loc, outputTensorType, zpContribution,
         DenseIntElementsAttr::get(
@@ -805,8 +805,8 @@ Value calculateZeroPointOffset(OpBuilder &builder, Location loc, Value lhs,
                                Value rhs, Value output, int64_t lhsZp,
                                int64_t rhsZp, TensorType outputTensorType,
                                const DotLikeDimensionNumbers &dims) {
-  mlir::ShapedType lhsShape = lhs.getType().cast<mlir::ShapedType>();
-  mlir::ShapedType rhsShape = rhs.getType().cast<mlir::ShapedType>();
+  mlir::ShapedType lhsShape = mlir::cast<mlir::ShapedType>(lhs.getType());
+  mlir::ShapedType rhsShape = mlir::cast<mlir::ShapedType>(rhs.getType());
   Value result = nullptr;
   Value outputDimsValue = nullptr;
   // Calculate LHS contribution when RHS zp is non-zero.
@@ -900,17 +900,17 @@ Value createDotLikeKernel<mhlo::ConvolutionOp>(OpBuilder &builder, Location loc,
     auto originalPadding = op.getPaddingAttr().getValues<int64_t>();
 
     Value zp = builder.create<mhlo::ConstantOp>(
-        loc,
-        DenseIntElementsAttr::get(
-            RankedTensorType::get({}, builder.getI8Type()),
-            {static_cast<int8_t>(getElementTypeOrSelf(op.getLhs().getType())
-                                     .cast<quant::UniformQuantizedType>()
-                                     .getZeroPoint())}));
+        loc, DenseIntElementsAttr::get(
+                 RankedTensorType::get({}, builder.getI8Type()),
+                 {static_cast<int8_t>(
+                     mlir::cast<quant::UniformQuantizedType>(
+                         getElementTypeOrSelf(op.getLhs().getType()))
+                         .getZeroPoint())}));
     // Convert Padding attributes from mhlo::Convolution to mhlo::Pad. Note that
     // Padding is applied for spatial dimensions [1...rank-1) only for
     // mhlo::Convolution. But mhlo::Pad require those for all dimensions. Hence
     // we add 0 to the beginning and end of the padding vectors.
-    int64_t rank = lhs.getType().cast<TensorType>().getRank();
+    int64_t rank = mlir::cast<TensorType>(lhs.getType()).getRank();
     SmallVector<int64_t> paddingLow(rank, 0), paddingHigh(rank, 0),
         paddingInterior(rank, 0);
     for (int64_t i = 1; i < rank - 1; ++i) {
@@ -965,20 +965,18 @@ LogicalResult matchAndRewriteDotLikeOp(DotLikeOp op, DotLikeOpAdaptor adaptor,
   Value resI32 = createDotLikeKernel(rewriter, op->getLoc(), op,
                                      resInt32TensorType, lhs, rhs, attrs);
 
-  auto lhsElementQuantType = getElementTypeOrSelf(op.getLhs().getType())
-                                 .template cast<quant::UniformQuantizedType>();
-  auto rhsElementQuantType =
-      getElementTypeOrSelf(op.getRhs().getType())
-          .template dyn_cast<quant::UniformQuantizedType>();
+  auto lhsElementQuantType = mlir::cast<quant::UniformQuantizedType>(
+      getElementTypeOrSelf(op.getLhs().getType()));
+  auto rhsElementQuantType = mlir::dyn_cast<quant::UniformQuantizedType>(
+      getElementTypeOrSelf(op.getRhs().getType()));
   auto rhsElementQuantPerChannelType =
-      getElementTypeOrSelf(op.getRhs().getType())
-          .template dyn_cast<quant::UniformQuantizedPerAxisType>();
-  auto resElementQuantType =
-      getElementTypeOrSelf(op.getResult())
-          .template dyn_cast<quant::UniformQuantizedType>();
+      mlir::dyn_cast<quant::UniformQuantizedPerAxisType>(
+          getElementTypeOrSelf(op.getRhs().getType()));
+  auto resElementQuantType = mlir::dyn_cast<quant::UniformQuantizedType>(
+      getElementTypeOrSelf(op.getResult()));
   auto resElementQuantPerChannelType =
-      getElementTypeOrSelf(op.getResult())
-          .template dyn_cast<quant::UniformQuantizedPerAxisType>();
+      mlir::dyn_cast<quant::UniformQuantizedPerAxisType>(
+          getElementTypeOrSelf(op.getResult()));
 
   // Here we assume LHS must be per-tensor quantized.
   // If RHS is per-channel quantized, it must has 0 zp.
@@ -1015,7 +1013,8 @@ LogicalResult matchAndRewriteDotLikeOp(DotLikeOp op, DotLikeOpAdaptor adaptor,
     // Skip zp_offset if it is 0.
     if (zpOffset) {
       auto zpOffsetFloat32TensorType =
-          zpOffset.getType().cast<TensorType>().clone(rewriter.getF32Type());
+          mlir::cast<TensorType>(zpOffset.getType())
+              .clone(rewriter.getF32Type());
       zpOffset = rewriter.create<mhlo::ConvertOp>(
           op->getLoc(), zpOffsetFloat32TensorType, zpOffset);
       zpOffset = rewriter.create<chlo::BroadcastMulOp>(
@@ -1197,8 +1196,8 @@ FailureOr<DotLikeDimensionNumbers> verifyAndConstructDims(
                              std::get<quant::UniformQuantizedPerAxisType>(
                                  rhsElementQuantType)
                                  .getZeroPoints(),
-                             getElementTypeOrSelf(op.getResult())
-                                 .cast<quant::UniformQuantizedPerAxisType>()
+                             mlir::cast<quant::UniformQuantizedPerAxisType>(
+                                 getElementTypeOrSelf(op.getResult()))
                                  .getZeroPoints()),
                          [](int64_t zp) { return zp != 0; })) {
     op->emitError("RHS/result UQ type must have zero zp.");
@@ -1208,7 +1207,7 @@ FailureOr<DotLikeDimensionNumbers> verifyAndConstructDims(
   if (!isRhsQuantPerTensor &&
       (std::get<quant::UniformQuantizedPerAxisType>(rhsElementQuantType)
            .getQuantizedDimension() !=
-       op.getRhs().getType().cast<TensorType>().getRank() - 1)) {
+       mlir::cast<TensorType>(op.getRhs().getType()).getRank() - 1)) {
     op->emitError("Conv quantized axis must be out channel axis");
     return failure();
   }
@@ -1216,8 +1215,8 @@ FailureOr<DotLikeDimensionNumbers> verifyAndConstructDims(
   // the same for each channel.
   if (!isRhsQuantPerTensor) {
     auto resElementQuantPerChannelType =
-        getElementTypeOrSelf(op.getResult())
-            .cast<quant::UniformQuantizedPerAxisType>();
+        mlir::cast<quant::UniformQuantizedPerAxisType>(
+            getElementTypeOrSelf(op.getResult()));
     SmallVector<double> scaleRatios(
         resElementQuantPerChannelType.getScales().size());
     for (size_t i = 0; i < scaleRatios.size(); ++i) {
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/transforms/optimize_mhlo/optimize_mhlo.cc b/third_party/xla/xla/mlir_hlo/mhlo/transforms/optimize_mhlo/optimize_mhlo.cc
index 48d30f88e1a23f..10634e2928304a 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/transforms/optimize_mhlo/optimize_mhlo.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/transforms/optimize_mhlo/optimize_mhlo.cc
@@ -32,6 +32,7 @@ limitations under the License.
 #include "mlir/IR/Types.h"
 #include "mlir/Pass/Pass.h"
 #include "mlir/Pass/PassRegistry.h"
+#include "mlir/Support/LLVM.h"
 #include "utils/hlo_utils.h"
 
 namespace mlir {
@@ -57,12 +58,11 @@ class GatherIsSlice : public OpRewritePattern<GatherOp> {
     auto dimensionNumbers = gather.getDimensionNumbers();
 
     // Inputs need to be ranked to lower.
-    if (!gather.getOperand().getType().cast<ShapedType>().hasRank() ||
-        !gather.getOperand().getType().cast<ShapedType>().hasStaticShape() ||
-        !gather.getStartIndices().getType().cast<ShapedType>().hasRank() ||
-        !gather.getStartIndices()
-             .getType()
-             .cast<ShapedType>()
+    if (!mlir::cast<ShapedType>(gather.getOperand().getType()).hasRank() ||
+        !mlir::cast<ShapedType>(gather.getOperand().getType())
+             .hasStaticShape() ||
+        !mlir::cast<ShapedType>(gather.getStartIndices().getType()).hasRank() ||
+        !mlir::cast<ShapedType>(gather.getStartIndices().getType())
              .hasStaticShape()) {
       return rewriter.notifyMatchFailure(gather,
                                          "non-static operand or start_indices");
@@ -80,7 +80,8 @@ class GatherIsSlice : public OpRewritePattern<GatherOp> {
                                          "start_index_map not empty or [0]");
     }
 
-    auto resultTy = gather.getResult().getType().dyn_cast<RankedTensorType>();
+    auto resultTy =
+        mlir::dyn_cast<RankedTensorType>(gather.getResult().getType());
 
     if (!resultTy) {
       return rewriter.notifyMatchFailure(gather, "unranked result");
@@ -110,7 +111,8 @@ class GatherIsSlice : public OpRewritePattern<GatherOp> {
     }
 
     auto gatherStartIndices = gather.getStartIndices();
-    auto gatherStartIndicesTy = gatherStartIndices.getType().cast<ShapedType>();
+    auto gatherStartIndicesTy =
+        mlir::cast<ShapedType>(gatherStartIndices.getType());
 
     llvm::SmallVector<Value, 4> sliceStartIndices;
 
@@ -125,8 +127,9 @@ class GatherIsSlice : public OpRewritePattern<GatherOp> {
             gather.getLoc(), gatherStartIndices, start, limit, stride);
         auto reshaped = rewriter.create<ReshapeOp>(
             gather.getLoc(),
-            RankedTensorType::get(
-                {}, indicesSlice.getType().cast<ShapedType>().getElementType()),
+            RankedTensorType::get({},
+                                  mlir::cast<ShapedType>(indicesSlice.getType())
+                                      .getElementType()),
             indicesSlice);
         sliceStartIndices.push_back(reshaped);
       }
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/transforms/prepare_for_export/prepare_for_export.cc b/third_party/xla/xla/mlir_hlo/mhlo/transforms/prepare_for_export/prepare_for_export.cc
index f03bd96b273ed8..0397018add2b28 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/transforms/prepare_for_export/prepare_for_export.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/transforms/prepare_for_export/prepare_for_export.cc
@@ -64,12 +64,13 @@ void prepareConstantOp(Operation *op, SplatElementsAttr attr) {
   // Arbitrarily chosen "small" number. This could be chosen based on the proto
   // size too.
   if (attr.getNumElements() < 32) return;
-  ShapedType returnType = op->getResultTypes().front().cast<ShapedType>();
+  ShapedType returnType = mlir::cast<ShapedType>(op->getResultTypes().front());
   ImplicitLocOpBuilder b(op->getLoc(), op);
   ConstantOp cst;
-  if (auto complexTy = returnType.getElementType().dyn_cast<ComplexType>()) {
+  if (auto complexTy =
+          mlir::dyn_cast<ComplexType>(returnType.getElementType())) {
     auto tensorType = RankedTensorType::get({}, returnType.getElementType());
-    assert(complexTy.getElementType().isa<FloatType>() &&
+    assert(mlir::isa<FloatType>(complexTy.getElementType()) &&
            "unexpected int complex in MHLO");
     auto complexVal = attr.getSplatValue<std::complex<APFloat>>();
     cst = b.create<ConstantOp>(DenseElementsAttr::get(tensorType, complexVal));
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/transforms/restrict_max_rank/restrict_max_rank.cc b/third_party/xla/xla/mlir_hlo/mhlo/transforms/restrict_max_rank/restrict_max_rank.cc
index fcaf6acf2e88eb..55200ab2c24227 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/transforms/restrict_max_rank/restrict_max_rank.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/transforms/restrict_max_rank/restrict_max_rank.cc
@@ -29,6 +29,7 @@ limitations under the License.
 #include "mlir/IR/Operation.h"
 #include "mlir/IR/Value.h"
 #include "mlir/Pass/Pass.h"
+#include "mlir/Support/LLVM.h"
 #include "mlir/Support/LogicalResult.h"
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"
 
@@ -66,9 +67,9 @@ struct RewriteReshapeTransposeReshape : public OpRewritePattern<TransposeOp> {
   LogicalResult matchAndRewrite(TransposeOp op,
                                 PatternRewriter &rewriter) const override {
     Value result = op.getResult();
-    TensorType resultTy = result.getType().cast<TensorType>();
+    TensorType resultTy = mlir::cast<TensorType>(result.getType());
     Value operand = op.getOperand();
-    TensorType operandTy = operand.getType().cast<TensorType>();
+    TensorType operandTy = mlir::cast<TensorType>(operand.getType());
     if (!operandTy.hasStaticShape() || !resultTy.hasStaticShape())
       return rewriter.notifyMatchFailure(op,
                                          "transpose op has non-static types");
@@ -92,7 +93,7 @@ struct RewriteReshapeTransposeReshape : public OpRewritePattern<TransposeOp> {
                                          "user of the result is not reshape");
 
     Value input = defOp.getOperand();
-    auto inputTy = input.getType().cast<TensorType>();
+    auto inputTy = mlir::cast<TensorType>(input.getType());
     auto outputTy = userOp.getType();
     if (!inputTy.hasStaticShape() || !outputTy.hasStaticShape())
       return rewriter.notifyMatchFailure(
@@ -151,7 +152,7 @@ struct RewriteReshapeTransposeReshape : public OpRewritePattern<TransposeOp> {
     // first dimension.
     for (int dim = spatialDims - 1; dim >= 0; dim--) {
       // 1) Reshape to split the particular spatial dimension.
-      auto inputTy = input.getType().cast<TensorType>();
+      auto inputTy = mlir::cast<TensorType>(input.getType());
       auto intermediateShape = llvm::to_vector<4>(inputTy.getShape());
       int64_t dimIdx = 1 + dim;
       intermediateShape[dimIdx] /= blockSizes[dim];
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/transforms/shape_legalize_to_hlo/shape_legalize_to_hlo.cc b/third_party/xla/xla/mlir_hlo/mhlo/transforms/shape_legalize_to_hlo/shape_legalize_to_hlo.cc
index 9a45db31ef3ae4..ea59906e46bb9b 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/transforms/shape_legalize_to_hlo/shape_legalize_to_hlo.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/transforms/shape_legalize_to_hlo/shape_legalize_to_hlo.cc
@@ -52,7 +52,7 @@ namespace mhlo {
 namespace {
 
 bool hasI32Style(Value value) {
-  auto type = value.getType().dyn_cast<ShapedType>();
+  auto type = mlir::dyn_cast<ShapedType>(value.getType());
   return type && type.getElementType().isInteger(32);
 }
 
@@ -68,7 +68,7 @@ Value castToI32(PatternRewriter& rewriter, Location loc, Value value) {
   Type resultType;
   if (value.getType().isIndex())
     resultType = RankedTensorType::get({}, rewriter.getI32Type());
-  if (auto valueType = value.getType().dyn_cast<ShapedType>()) {
+  if (auto valueType = mlir::dyn_cast<ShapedType>(value.getType())) {
     if (!valueType.hasStaticShape()) return {};
     if (valueType.getElementType().isInteger(32)) return value;
     if (valueType.getElementType().isIndex())
@@ -83,7 +83,7 @@ Value castToI32(PatternRewriter& rewriter, Location loc, Value value) {
 
 bool hasIndexStyle(Value value) {
   if (value.getType().isIndex()) return true;
-  auto type = value.getType().dyn_cast<ShapedType>();
+  auto type = mlir::dyn_cast<ShapedType>(value.getType());
   return type && type.getElementType().isIndex();
 }
 
@@ -98,7 +98,7 @@ bool hasIndexStyle(Value value) {
 Value castToIndex(PatternRewriter& rewriter, Location loc, Value value) {
   Type resultType;
   if (value.getType().isIndex()) return value;
-  if (auto valueType = value.getType().dyn_cast<ShapedType>()) {
+  if (auto valueType = mlir::dyn_cast<ShapedType>(value.getType())) {
     if (!valueType.hasStaticShape()) return {};
     if (valueType.getElementType().isInteger(32)) {
       if (valueType.getRank() == 0) {
@@ -141,7 +141,8 @@ struct ConvertComputeReshapeShapeOpPattern
         castToI32(rewriter, op.getLoc(), op.getDynamicShape());
     if (!numElementsI32 || !dynamicShapeI32x1)
       return rewriter.notifyMatchFailure(op, "cast to i32 failed");
-    auto rank = dynamicShapeI32x1.getType().cast<ShapedType>().getNumElements();
+    auto rank =
+        mlir::cast<ShapedType>(dynamicShapeI32x1.getType()).getNumElements();
 
     // Obtain individual input dimension sizes and also compute the product of
     // all these dimension sizes.
@@ -208,7 +209,7 @@ struct ConvertNumElementsOpPattern
     // This will error out if shape is !shape.shape.
     auto shapeI32 = castToI32(rewriter, op.getLoc(), op.getShape());
     if (!shapeI32) return rewriter.notifyMatchFailure(op, "cast to i32 failed");
-    auto rank = shapeI32.getType().cast<ShapedType>().getNumElements();
+    auto rank = mlir::cast<ShapedType>(shapeI32.getType()).getNumElements();
 
     // Compute the product of the individual dimension sizes.
     // Using this representation instead of mhlo::ReduceOp because it is more
@@ -241,7 +242,7 @@ struct ConvertShapeOfOpPattern : public OpRewritePattern<shape::ShapeOfOp> {
   using OpRewritePattern::OpRewritePattern;
   LogicalResult matchAndRewrite(shape::ShapeOfOp op,
                                 PatternRewriter& rewriter) const override {
-    auto operandType = op.getArg().getType().dyn_cast<RankedTensorType>();
+    auto operandType = mlir::dyn_cast<RankedTensorType>(op.getArg().getType());
     if (!operandType)
       return rewriter.notifyMatchFailure(op, "expected ranked operand");
 
@@ -276,7 +277,8 @@ struct ConvertConstShapeOpPattern
   using OpRewritePattern::OpRewritePattern;
   LogicalResult matchAndRewrite(shape::ConstShapeOp op,
                                 PatternRewriter& rewriter) const override {
-    auto operandType = op.getResult().getType().dyn_cast<RankedTensorType>();
+    auto operandType =
+        mlir::dyn_cast<RankedTensorType>(op.getResult().getType());
     if (!operandType)
       return rewriter.notifyMatchFailure(op, "expected ranked operand");
 
@@ -300,7 +302,8 @@ struct ConvertIndexCastOpPattern : public OpRewritePattern<arith::IndexCastOp> {
   LogicalResult matchAndRewrite(arith::IndexCastOp op,
                                 PatternRewriter& rewriter) const override {
     Value result = op.getIn();
-    if (hasIndexStyle(op.getIn()) && !op.getIn().getType().isa<ShapedType>()) {
+    if (hasIndexStyle(op.getIn()) &&
+        !mlir::isa<ShapedType>(op.getIn().getType())) {
       // Handle a special case of index -> i64.
       // This is converted to the following sequence:
       //   unrealized_conversion_cast index -> tensor<i32>
@@ -315,7 +318,8 @@ struct ConvertIndexCastOpPattern : public OpRewritePattern<arith::IndexCastOp> {
                                  op.getLoc(), op.getOut().getType(), result));
       return success();
     }
-    if (!op.getIn().getType().isa<ShapedType>() && hasIndexStyle(op.getOut())) {
+    if (!mlir::isa<ShapedType>(op.getIn().getType()) &&
+        hasIndexStyle(op.getOut())) {
       // Handle a special case of i32 -> index.
       // This is converted to the following sequence:
       //   unrealized_conversion_cast i32 -> tensor<i32>
@@ -406,8 +410,8 @@ struct ConvertShapeBroadcastOpPattern
     auto shape1 = castToI32(rewriter, op.getLoc(), op.getShapes().front());
     auto shape2 = castToI32(rewriter, op.getLoc(), op.getShapes().back());
     if (!shape1 || !shape2) return failure();
-    auto tensorType1 = shape1.getType().dyn_cast<RankedTensorType>();
-    auto tensorType2 = shape2.getType().dyn_cast<RankedTensorType>();
+    auto tensorType1 = mlir::dyn_cast<RankedTensorType>(shape1.getType());
+    auto tensorType2 = mlir::dyn_cast<RankedTensorType>(shape2.getType());
     if (!tensorType1 || !tensorType2) return failure();
 
     // If the two operand shapes are of different sizes, the smaller one is
@@ -530,7 +534,7 @@ struct ConvertTensorFromElementsPattern
   LogicalResult matchAndRewrite(tensor::FromElementsOp op,
                                 PatternRewriter& rewriter) const override {
     auto tensorType =
-        op.getResult().getType().dyn_cast_or_null<RankedTensorType>();
+        mlir::dyn_cast_or_null<RankedTensorType>(op.getResult().getType());
     if (!tensorType) {
       return failure();
     }
@@ -588,8 +592,8 @@ struct ConvertCstrBroadcastableOp
     auto shape1 = castToI32(rewriter, op.getLoc(), op.getShapes().front());
     auto shape2 = castToI32(rewriter, op.getLoc(), op.getShapes().back());
     if (!shape1 || !shape2) return failure();
-    auto tensorType1 = shape1.getType().dyn_cast<RankedTensorType>();
-    auto tensorType2 = shape2.getType().dyn_cast<RankedTensorType>();
+    auto tensorType1 = mlir::dyn_cast<RankedTensorType>(shape1.getType());
+    auto tensorType2 = mlir::dyn_cast<RankedTensorType>(shape2.getType());
     if (!tensorType1 || !tensorType2) return failure();
 
     // If the two operand shapes are of different sizes, the smaller one is
@@ -669,7 +673,7 @@ struct ConvertCstrReshapableOp
         castToI32(rewriter, op->getLoc(), op.getDynamicShape());
     if (!dyanmicShape || !numElements) return failure();
     auto dyanmicShapeType =
-        dyanmicShape.getType().dyn_cast_or_null<RankedTensorType>();
+        mlir::dyn_cast_or_null<RankedTensorType>(dyanmicShape.getType());
     if (!dyanmicShapeType || dyanmicShapeType.getRank() != 1) return failure();
 
     auto i32Type = RankedTensorType::get({}, rewriter.getI32Type());
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/transforms/shape_reification/shape_reification_pass.cc b/third_party/xla/xla/mlir_hlo/mhlo/transforms/shape_reification/shape_reification_pass.cc
index af1738fe3c532c..054544274eb08d 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/transforms/shape_reification/shape_reification_pass.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/transforms/shape_reification/shape_reification_pass.cc
@@ -26,6 +26,7 @@ limitations under the License.
 #include "mlir/Dialect/Tensor/IR/Tensor.h"
 #include "mlir/Interfaces/InferTypeOpInterface.h"
 #include "mlir/Pass/Pass.h"
+#include "mlir/Support/LLVM.h"
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"
 
 namespace mlir {
@@ -52,7 +53,8 @@ struct ShapeReificationPattern : public OpRewritePattern<shape::ShapeOfOp> {
                                             reifications))) {
       return failure();
     }
-    Value shape = reifications[op.getArg().cast<OpResult>().getResultNumber()];
+    Value shape =
+        reifications[mlir::cast<OpResult>(op.getArg()).getResultNumber()];
 
     // Insert cast, if needed.
     if (shape.getType() != op.getType()) {
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/transforms/shape_simplification/shape_simplification.cc b/third_party/xla/xla/mlir_hlo/mhlo/transforms/shape_simplification/shape_simplification.cc
index 22e980e96e0741..b96370f71cf23c 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/transforms/shape_simplification/shape_simplification.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/transforms/shape_simplification/shape_simplification.cc
@@ -27,6 +27,7 @@ limitations under the License.
 #include "mlir/Dialect/Tensor/IR/Tensor.h"
 #include "mlir/IR/BuiltinTypes.h"
 #include "mlir/IR/PatternMatch.h"
+#include "mlir/Support/LLVM.h"
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"
 
 namespace mlir {
@@ -183,7 +184,8 @@ struct ExtractFromBroadcastedTensorCanonicalizationPattern
     for (auto shape : broadcastOp.getShapes()) {
       auto shapeOfOp = shape.getDefiningOp<ShapeOfOp>();
       if (!shapeOfOp) return failure();
-      auto shapedType = shapeOfOp->getOperandTypes().front().cast<ShapedType>();
+      auto shapedType =
+          mlir::cast<ShapedType>(shapeOfOp->getOperandTypes().front());
 
       // Abort on the existence of unranked shapes as they require more logic.
       if (!shapedType.hasRank()) return failure();
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/transforms/stablehlo_legalize_to_hlo/stablehlo_legalize_to_hlo.cc b/third_party/xla/xla/mlir_hlo/mhlo/transforms/stablehlo_legalize_to_hlo/stablehlo_legalize_to_hlo.cc
index 81153b92ecd06f..a7adb9c987368b 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/transforms/stablehlo_legalize_to_hlo/stablehlo_legalize_to_hlo.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/transforms/stablehlo_legalize_to_hlo/stablehlo_legalize_to_hlo.cc
@@ -29,6 +29,7 @@ limitations under the License.
 #include "mlir/IR/Operation.h"
 #include "mlir/IR/PatternMatch.h"
 #include "mlir/IR/Types.h"
+#include "mlir/Support/LLVM.h"
 #include "mlir/Support/LogicalResult.h"
 #include "mlir/Transforms/DialectConversion.h"
 #include "stablehlo/dialect/StablehloOps.h"
@@ -47,12 +48,12 @@ Attribute convertAttr(Attribute stablehloAttr) {
   // StableHLO uses DenseArray for some attributes, MHLO is in the process
   // of integrating this change. In the meantime, convert DenseArray to
   // DenseElementsAttr.
-  if (auto attr = stablehloAttr.dyn_cast<DenseI64ArrayAttr>()) {
+  if (auto attr = mlir::dyn_cast<DenseI64ArrayAttr>(stablehloAttr)) {
     return DenseIntElementsAttr::get(
         RankedTensorType::get(attr.getSize(), attr.getElementType()),
         attr.asArrayRef());
   }
-  if (auto attr = stablehloAttr.dyn_cast<DenseBoolArrayAttr>()) {
+  if (auto attr = mlir::dyn_cast<DenseBoolArrayAttr>(stablehloAttr)) {
     return DenseIntElementsAttr::get(
         RankedTensorType::get(attr.getSize(), attr.getElementType()),
         attr.asArrayRef());
@@ -61,19 +62,20 @@ Attribute convertAttr(Attribute stablehloAttr) {
   // Handle StableHLO attributes.
   // The logic that handles attributes from other dialects (e.g. builtin
   // attributes) lives below.
-  if (auto attr = stablehloAttr.dyn_cast<stablehlo::ChannelHandleAttr>()) {
+  if (auto attr = mlir::dyn_cast<stablehlo::ChannelHandleAttr>(stablehloAttr)) {
     return mhlo::ChannelHandleAttr::get(attr.getContext(), attr.getHandle(),
                                         attr.getType());
   }
   if (auto attr =
-          stablehloAttr.dyn_cast<stablehlo::ComparisonDirectionAttr>()) {
+          mlir::dyn_cast<stablehlo::ComparisonDirectionAttr>(stablehloAttr)) {
     RETURN_CONVERTED_ENUM_ATTR(ComparisonDirection);
   }
-  if (auto attr = stablehloAttr.dyn_cast<stablehlo::ComparisonTypeAttr>()) {
+  if (auto attr =
+          mlir::dyn_cast<stablehlo::ComparisonTypeAttr>(stablehloAttr)) {
     RETURN_CONVERTED_ENUM_ATTR(ComparisonType);
   }
   if (auto attr =
-          stablehloAttr.dyn_cast<stablehlo::ConvDimensionNumbersAttr>()) {
+          mlir::dyn_cast<stablehlo::ConvDimensionNumbersAttr>(stablehloAttr)) {
     return mhlo::ConvDimensionNumbersAttr::get(
         attr.getContext(), attr.getInputBatchDimension(),
         attr.getInputFeatureDimension(), attr.getInputSpatialDimensions(),
@@ -83,47 +85,49 @@ Attribute convertAttr(Attribute stablehloAttr) {
         attr.getOutputFeatureDimension(), attr.getOutputSpatialDimensions());
   }
   if (auto attr =
-          stablehloAttr.dyn_cast<stablehlo::CustomCallApiVersionAttr>()) {
+          mlir::dyn_cast<stablehlo::CustomCallApiVersionAttr>(stablehloAttr)) {
     RETURN_CONVERTED_ENUM_ATTR(CustomCallApiVersion);
   }
   if (auto attr =
-          stablehloAttr.dyn_cast<stablehlo::DotDimensionNumbersAttr>()) {
+          mlir::dyn_cast<stablehlo::DotDimensionNumbersAttr>(stablehloAttr)) {
     return mhlo::DotDimensionNumbersAttr::get(
         attr.getContext(), attr.getLhsBatchingDimensions(),
         attr.getRhsBatchingDimensions(), attr.getLhsContractingDimensions(),
         attr.getRhsContractingDimensions());
   }
-  if (auto attr = stablehloAttr.dyn_cast<stablehlo::FftTypeAttr>()) {
+  if (auto attr = mlir::dyn_cast<stablehlo::FftTypeAttr>(stablehloAttr)) {
     RETURN_CONVERTED_ENUM_ATTR(FftType);
   }
-  if (auto attr =
-          stablehloAttr.dyn_cast<stablehlo::GatherDimensionNumbersAttr>()) {
+  if (auto attr = mlir::dyn_cast<stablehlo::GatherDimensionNumbersAttr>(
+          stablehloAttr)) {
     return mhlo::GatherDimensionNumbersAttr::get(
         attr.getContext(), attr.getOffsetDims(), attr.getCollapsedSliceDims(),
         attr.getStartIndexMap(), attr.getIndexVectorDim());
   }
-  if (auto attr = stablehloAttr.dyn_cast<stablehlo::OutputOperandAliasAttr>()) {
+  if (auto attr =
+          mlir::dyn_cast<stablehlo::OutputOperandAliasAttr>(stablehloAttr)) {
     return mhlo::OutputOperandAliasAttr::get(
         attr.getContext(), attr.getOutputTupleIndices(), attr.getOperandIndex(),
         attr.getOperandTupleIndices());
   }
-  if (auto attr = stablehloAttr.dyn_cast<stablehlo::PrecisionAttr>()) {
+  if (auto attr = mlir::dyn_cast<stablehlo::PrecisionAttr>(stablehloAttr)) {
     RETURN_CONVERTED_ENUM_ATTR(Precision);
   }
-  if (auto attr = stablehloAttr.dyn_cast<stablehlo::RngAlgorithmAttr>()) {
+  if (auto attr = mlir::dyn_cast<stablehlo::RngAlgorithmAttr>(stablehloAttr)) {
     RETURN_CONVERTED_ENUM_ATTR(RngAlgorithm);
   }
-  if (auto attr = stablehloAttr.dyn_cast<stablehlo::RngDistributionAttr>()) {
+  if (auto attr =
+          mlir::dyn_cast<stablehlo::RngDistributionAttr>(stablehloAttr)) {
     RETURN_CONVERTED_ENUM_ATTR(RngDistribution);
   }
-  if (auto attr =
-          stablehloAttr.dyn_cast<stablehlo::ScatterDimensionNumbersAttr>()) {
+  if (auto attr = mlir::dyn_cast<stablehlo::ScatterDimensionNumbersAttr>(
+          stablehloAttr)) {
     return mhlo::ScatterDimensionNumbersAttr::get(
         attr.getContext(), attr.getUpdateWindowDims(),
         attr.getInsertedWindowDims(), attr.getScatterDimsToOperandDims(),
         attr.getIndexVectorDim());
   }
-  if (auto attr = stablehloAttr.dyn_cast<stablehlo::TransposeAttr>()) {
+  if (auto attr = mlir::dyn_cast<stablehlo::TransposeAttr>(stablehloAttr)) {
     RETURN_CONVERTED_ENUM_ATTR(Transpose);
   }
   if (stablehloAttr.getDialect().getNamespace() ==
@@ -137,7 +141,7 @@ Attribute convertAttr(Attribute stablehloAttr) {
   // Handle non-StableHLO attributes.
   // If an attribute is not defined in StableHLO, then it is unchanged,
   // with the exception of ArrayAttr which is converted recursively.
-  if (auto stablehloAttrs = stablehloAttr.dyn_cast<ArrayAttr>()) {
+  if (auto stablehloAttrs = mlir::dyn_cast<ArrayAttr>(stablehloAttr)) {
     SmallVector<Attribute> hloAttrs;
     for (auto stablehloAttr : stablehloAttrs) {
       auto hloAttr = convertAttr(stablehloAttr);
@@ -154,11 +158,11 @@ Attribute convertAttr(Attribute stablehloAttr) {
 // Convert array of enum strings to array of enum attrs
 //   ["PACKED_NIBBLE"] --> [#mhlo<precision PACKED_NIBBLE>]
 Attribute decodePrecisionConfig(Attribute stablehloAttr) {
-  auto arrayAttr = stablehloAttr.dyn_cast<ArrayAttr>();
+  auto arrayAttr = mlir::dyn_cast<ArrayAttr>(stablehloAttr);
   if (!arrayAttr) return {};
   SmallVector<Attribute> hloAttrs;
   for (auto attr : arrayAttr) {
-    auto precisionStr = attr.dyn_cast<StringAttr>();
+    auto precisionStr = mlir::dyn_cast<StringAttr>(attr);
     if (!precisionStr) return {};
     auto precisionOpt = mhlo::symbolizePrecision(precisionStr.getValue());
     if (!precisionOpt.has_value()) return {};
@@ -229,8 +233,8 @@ LogicalResult rewriteCustomCallAsMhloOp(stablehlo::CustomCallOp stablehloOp,
     return failure();
   }
 
-  auto stablehloConvertedAttrs = stablehloOp->getAttr("mhlo.attributes")
-                                     .dyn_cast_or_null<DictionaryAttr>();
+  auto stablehloConvertedAttrs = mlir::dyn_cast_or_null<DictionaryAttr>(
+      stablehloOp->getAttr("mhlo.attributes"));
   if (!stablehloConvertedAttrs) {
     return failure();
   }
@@ -268,7 +272,7 @@ LogicalResult rewriteCustomCallAsMhloOp(stablehlo::CustomCallOp stablehloOp,
   if (stablehloHasRegion) {
     auto stablehloRegionOp =
         stablehloOp->getParentOfType<ModuleOp>().lookupSymbol<func::FuncOp>(
-            stablehloCalledComputations[0].cast<FlatSymbolRefAttr>());
+            mlir::cast<FlatSymbolRefAttr>(stablehloCalledComputations[0]));
     if (failed(convertFuncToStablehloRegion(hloOp, stablehloRegionOp, rewriter,
                                             typeConverter)))
       return failure();
@@ -289,8 +293,7 @@ LogicalResult fixupMhloBackendConfig(stablehlo::CustomCallOp stablehloOp,
   auto stablehloBackendConfig = stablehloOp->getAttr("mhlo.backend_config");
   if (stablehloBackendConfig) {
     if (auto oldHloBackendConfig =
-            hloOp.getBackendConfigAttr()
-                .template dyn_cast_or_null<StringAttr>()) {
+            mlir::dyn_cast_or_null<StringAttr>(hloOp.getBackendConfigAttr())) {
       if (!oldHloBackendConfig.empty()) return failure();
     } else {
       return failure();
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/transforms/symbolic_shape_optimization/symbolic_shape_optimization.cc b/third_party/xla/xla/mlir_hlo/mhlo/transforms/symbolic_shape_optimization/symbolic_shape_optimization.cc
index 402bf827c6393c..7cc55f6a068500 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/transforms/symbolic_shape_optimization/symbolic_shape_optimization.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/transforms/symbolic_shape_optimization/symbolic_shape_optimization.cc
@@ -719,9 +719,10 @@ struct DynamicReshapeToExpandAndCollapseShape final
   using OpRewritePattern::OpRewritePattern;
   LogicalResult matchAndRewrite(mhlo::DynamicReshapeOp op,
                                 PatternRewriter &rewriter) const override {
-    auto operandTy = op.getOperand().getType().dyn_cast<RankedTensorType>();
+    auto operandTy =
+        mlir::dyn_cast<RankedTensorType>(op.getOperand().getType());
     if (!operandTy) return failure();
-    auto resultTy = op.getType().dyn_cast<RankedTensorType>();
+    auto resultTy = mlir::dyn_cast<RankedTensorType>(op.getType());
     if (!resultTy) return failure();
 
     // Handle degenerate scalar expand case.
@@ -838,7 +839,8 @@ std::optional<Value> simplifyBroadcast(ShapeComponentAnalysis &analysis,
     // 1 dimensions are filtered above, recreate the constant.
     if (!shapeAndRankForDim[i].first) {
       auto one = builder->getIntegerAttr(
-          shapes[0].getType().cast<RankedTensorType>().getElementType(), 1);
+          mlir::cast<RankedTensorType>(shapes[0].getType()).getElementType(),
+          1);
       elements.push_back(builder->create<arith::ConstantOp>(loc, one));
       continue;
     }
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/transforms/unfuse_batch_norm/unfuse_batch_norm.cc b/third_party/xla/xla/mlir_hlo/mhlo/transforms/unfuse_batch_norm/unfuse_batch_norm.cc
index c59722ded20ad7..f2ad3562a9f3fd 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/transforms/unfuse_batch_norm/unfuse_batch_norm.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/transforms/unfuse_batch_norm/unfuse_batch_norm.cc
@@ -26,6 +26,7 @@ limitations under the License.
 #include "mlir/IR/MLIRContext.h"
 #include "mlir/IR/PatternMatch.h"
 #include "mlir/IR/Types.h"
+#include "mlir/Support/LLVM.h"
 #include "mlir/Transforms/DialectConversion.h"
 
 namespace mlir {
@@ -53,7 +54,8 @@ Value broadcastToFeatureDim(Location loc, RankedTensorType resultType,
 // Get the shape of operand, assuming it is a dynamic shape with static rank.
 Value getShapeValue(Location loc, Value operand,
                     PatternRewriter &rewriter) {  // NOLINT
-  RankedTensorType resultType = operand.getType().dyn_cast<RankedTensorType>();
+  RankedTensorType resultType =
+      mlir::dyn_cast<RankedTensorType>(operand.getType());
   return rewriter.create<mlir::shape::ShapeOfOp>(
       loc,
       RankedTensorType::get({resultType.getRank()}, rewriter.getIndexType()),
@@ -84,7 +86,7 @@ Value materializeEpsilon(Operation *op, FloatAttr epsilonAttr, FloatType fpType,
 
   auto scalarType = RankedTensorType::get({}, fpType);
   auto epsilonTensorAttr =
-      DenseElementsAttr::get(scalarType, {epsilonAttr.cast<Attribute>()});
+      DenseElementsAttr::get(scalarType, {mlir::cast<Attribute>(epsilonAttr)});
   Value epsilon = b.create<mhlo::ConstantOp>(epsilonTensorAttr);
   auto dimsType = RankedTensorType::get({0}, b.getIntegerType(64));
   auto dims = DenseIntElementsAttr::get(dimsType, SmallVector<int64_t, 1>{});
@@ -108,13 +110,14 @@ class UnfuseBatchNormInferencePattern
     // Enforce type invariants.
     // Note that we deduce the actual element type from the variance,
     // which should not be subject to quantization at a higher level.
-    auto inputType = bnOp.getOperand().getType().dyn_cast<RankedTensorType>();
+    auto inputType =
+        mlir::dyn_cast<RankedTensorType>(bnOp.getOperand().getType());
     auto varianceType =
-        bnOp.getVariance().getType().dyn_cast<RankedTensorType>();
+        mlir::dyn_cast<RankedTensorType>(bnOp.getVariance().getType());
     if (!inputType || !varianceType) {
       return failure();
     }
-    auto fpType = varianceType.getElementType().dyn_cast<FloatType>();
+    auto fpType = mlir::dyn_cast<FloatType>(varianceType.getElementType());
     if (!fpType) {
       return failure();
     }
@@ -168,7 +171,7 @@ class UnfuseBatchNormInferencePattern
 Value createReduce(Location loc, Value operand, Value zero,
                    SmallVector<int64_t>& reduceDims, int64_t featureIndex,
                    PatternRewriter& rewriter) {
-  auto operandType = operand.getType().cast<RankedTensorType>();
+  auto operandType = mlir::cast<RankedTensorType>(operand.getType());
   Type reduceResultType = RankedTensorType::get(
       {operandType.getDimSize(featureIndex)}, operandType.getElementType());
   mhlo::ReduceOp reduce =
@@ -233,7 +236,7 @@ Value calculateReduceSize(Operation *op, Value operand,
   llvm::APFloat floatValue(static_cast<double>(reduceDimsSize));
   bool losesInfo;
   floatValue.convert(
-      scaleType.getElementType().cast<FloatType>().getFloatSemantics(),
+      mlir::cast<FloatType>(scaleType.getElementType()).getFloatSemantics(),
       APFloat::rmNearestTiesToEven, &losesInfo);
   if (losesInfo) {
     op->emitWarning("Conversion of reduce_dims_size loses precision");
@@ -252,12 +255,14 @@ class UnfuseBatchNormTrainingPattern
 
   LogicalResult matchAndRewrite(mhlo::BatchNormTrainingOp bnOp,
                                 PatternRewriter& rewriter) const override {
-    auto operandType = bnOp.getOperand().getType().dyn_cast<RankedTensorType>();
-    auto scaleType = bnOp.getScale().getType().dyn_cast<RankedTensorType>();
+    auto operandType =
+        mlir::dyn_cast<RankedTensorType>(bnOp.getOperand().getType());
+    auto scaleType =
+        mlir::dyn_cast<RankedTensorType>(bnOp.getScale().getType());
     if (!operandType || !scaleType) {
       return failure();
     }
-    auto fpType = operandType.getElementType().dyn_cast<FloatType>();
+    auto fpType = mlir::dyn_cast<FloatType>(operandType.getElementType());
     if (!fpType) {
       return failure();
     }
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/utils/legalize_to_linalg_utils.cc b/third_party/xla/xla/mlir_hlo/mhlo/utils/legalize_to_linalg_utils.cc
index 2d1a5009f83540..31cd49c45db880 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/utils/legalize_to_linalg_utils.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/utils/legalize_to_linalg_utils.cc
@@ -26,6 +26,7 @@ limitations under the License.
 #include "mlir/Dialect/Bufferization/IR/Bufferization.h"
 #include "mlir/Dialect/SparseTensor/IR/SparseTensor.h"
 #include "mlir/Dialect/Tensor/IR/Tensor.h"
+#include "mlir/Support/LLVM.h"
 #include "stablehlo/dialect/ChloOps.h"
 
 namespace mlir {
@@ -33,7 +34,7 @@ namespace mhlo {
 namespace {
 
 bool hasIntegralShapeType(Operation* op) {
-  auto stp = op->getOperand(0).getType().dyn_cast<ShapedType>();
+  auto stp = mlir::dyn_cast<ShapedType>(op->getOperand(0).getType());
   return stp && stp.getElementType().isIntOrIndex();
 }
 
@@ -54,17 +55,17 @@ SmallVector<utils::IteratorType, 3> getNParallelLoopsAttrs(
 
 Value getEmptySparseTensor(OpBuilder& b, Location loc, ShapedType type,
                            ArrayRef<Value> dynSizes) {
-  return b.create<bufferization::AllocTensorOp>(loc, type.cast<TensorType>(),
-                                                dynSizes,
-                                                /*copy=*/Value(),
-                                                /*memory_space=*/IntegerAttr());
+  return b.create<bufferization::AllocTensorOp>(
+      loc, mlir::cast<TensorType>(type), dynSizes,
+      /*copy=*/Value(),
+      /*memory_space=*/IntegerAttr());
 }
 
 Value getEmptyTensor(OpBuilder& b, Location loc, ShapedType type,
                      ArrayRef<Value> dynSizes) {
-  return b.create<tensor::EmptyOp>(loc, type.getShape(), type.getElementType(),
-                                   dynSizes,
-                                   type.cast<RankedTensorType>().getEncoding());
+  return b.create<tensor::EmptyOp>(
+      loc, type.getShape(), type.getElementType(), dynSizes,
+      mlir::cast<RankedTensorType>(type).getEncoding());
 }
 
 Value getEmptyTensorFor(OpBuilder& b, Location loc, ShapedType resultType,
@@ -129,7 +130,7 @@ Value postSparsify(Operation* op, Value semiring, Value result, OpBuilder* b) {
 
 bool allOperandsAreScalarTensors(Operation* op) {
   return llvm::all_of(op->getOperands(), [](Value operand) {
-    auto operandTy = operand.getType().dyn_cast<ShapedType>();
+    auto operandTy = mlir::dyn_cast<ShapedType>(operand.getType());
     return operandTy && operandTy.getRank() == 0;
   });
 }
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/utils/mhlo_rng_utils.cc b/third_party/xla/xla/mlir_hlo/mhlo/utils/mhlo_rng_utils.cc
index ac34bea9cc222a..559553889cf615 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/utils/mhlo_rng_utils.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/utils/mhlo_rng_utils.cc
@@ -32,6 +32,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinTypes.h"
 #include "mlir/IR/Location.h"
 #include "mlir/IR/Types.h"
+#include "mlir/Support/LLVM.h"
 
 namespace mlir {
 namespace mhlo {
@@ -69,7 +70,7 @@ class ArithOp {
   }
 
   ArithOp indexCast(int32_t bitwidth) {
-    if (value.getType().isa<IntegerType>()) {
+    if (mlir::isa<IntegerType>(value.getType())) {
       Value cast = builder.create<arith::IndexCastOp>(
           loc, builder.getIndexType(), value);
       return ArithOp(builder, loc, cast);
@@ -187,7 +188,7 @@ std::pair<ArithOp, ArithOp> runThreeFry2xi32(ArithOp key0, ArithOp key1,
 // Extract and potentially reconstruct the i32 key-pair as necessary.
 std::pair<Value, Value> extractKey32(OpBuilder &builder, Location loc,
                                      Value store) {
-  ShapedType storeTy = store.getType().cast<ShapedType>();
+  ShapedType storeTy = mlir::cast<ShapedType>(store.getType());
   if (storeTy.getRank() != 1) return {nullptr, nullptr};
 
   Type storeETy = storeTy.getElementType();
@@ -217,7 +218,7 @@ std::pair<Value, Value> extractKey32(OpBuilder &builder, Location loc,
 
 // Extract and potentially reconstruct the i64 state as necessary.
 Value extractState64(OpBuilder &builder, Location loc, Value store) {
-  ShapedType storeTy = store.getType().cast<ShapedType>();
+  ShapedType storeTy = mlir::cast<ShapedType>(store.getType());
   if (storeTy.getRank() != 1) return nullptr;
 
   Type storeETy = storeTy.getElementType();
@@ -246,7 +247,7 @@ Value extractState64(OpBuilder &builder, Location loc, Value store) {
 }
 
 Value setState64(OpBuilder &b, Location loc, Value store, Value state) {
-  ShapedType storeTy = store.getType().cast<ShapedType>();
+  ShapedType storeTy = mlir::cast<ShapedType>(store.getType());
   if (storeTy.getRank() != 1) return nullptr;
 
   Type storeETy = storeTy.getElementType();
@@ -278,7 +279,7 @@ Value setState64(OpBuilder &b, Location loc, Value store, Value state) {
 
 Value reshapeToTarget(OpBuilder &builder, Location loc, ShapedType destTy,
                       Value src) {
-  auto srcTy = src.getType().cast<ShapedType>();
+  auto srcTy = mlir::cast<ShapedType>(src.getType());
   // Expand out to the target shape.
 
   auto reassociationIndices =
@@ -365,7 +366,7 @@ LogicalResult generateLinalgThreeFry32(OpBuilder &builder, Location loc,
   Value destRight = builder.create<tensor::EmptyOp>(
       loc, ArrayRef<int64_t>({count}), resultETy);
 
-  ShapedType destTy = destLeft.getType().cast<ShapedType>();
+  ShapedType destTy = mlir::cast<ShapedType>(destLeft.getType());
 
   SmallVector<AffineMap> indexingMaps(2, builder.getMultiDimIdentityMap(1));
   SmallVector<utils::IteratorType> iterators(1, utils::IteratorType::parallel);
@@ -446,7 +447,7 @@ LogicalResult generateLinalgThreeFry64(OpBuilder &builder, Location loc,
   // Generate a 1D tensor with for the random values.
   Value dest = builder.create<tensor::EmptyOp>(loc, ArrayRef<int64_t>({count}),
                                                resultETy);
-  ShapedType destTy = dest.getType().cast<ShapedType>();
+  ShapedType destTy = mlir::cast<ShapedType>(dest.getType());
 
   SmallVector<AffineMap> indexingMaps(1, builder.getMultiDimIdentityMap(1));
   SmallVector<utils::IteratorType> iterators(1, utils::IteratorType::parallel);
@@ -565,7 +566,7 @@ LogicalResult generateLinalgPhilox32(OpBuilder &builder, Location loc,
   Value dest3 = builder.create<tensor::EmptyOp>(loc, ArrayRef<int64_t>({count}),
                                                 resultETy);
 
-  ShapedType destTy = dest0.getType().cast<ShapedType>();
+  ShapedType destTy = mlir::cast<ShapedType>(dest0.getType());
 
   SmallVector<AffineMap> indexingMaps(4, builder.getMultiDimIdentityMap(1));
   SmallVector<utils::IteratorType> iterators(1, utils::IteratorType::parallel);
@@ -657,7 +658,7 @@ LogicalResult generateLinalgPhilox64(OpBuilder &builder, Location loc,
                                                 resultETy);
   Value dest1 = builder.create<tensor::EmptyOp>(loc, ArrayRef<int64_t>({count}),
                                                 resultETy);
-  ShapedType destTy = dest0.getType().cast<ShapedType>();
+  ShapedType destTy = mlir::cast<ShapedType>(dest0.getType());
 
   SmallVector<AffineMap> indexingMaps(2, builder.getMultiDimIdentityMap(1));
   SmallVector<utils::IteratorType> iterators(1, utils::IteratorType::parallel);
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/utils/mhlo_scatter_gather_utils.cc b/third_party/xla/xla/mlir_hlo/mhlo/utils/mhlo_scatter_gather_utils.cc
index 91db4969a88ad2..d70c06ddf65f14 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/utils/mhlo_scatter_gather_utils.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/utils/mhlo_scatter_gather_utils.cc
@@ -22,6 +22,7 @@ limitations under the License.
 
 #include "mlir/Dialect/Tensor/IR/Tensor.h"
 #include "mlir/Dialect/Utils/ReshapeOpsUtils.h"
+#include "mlir/Support/LLVM.h"
 
 namespace mlir {
 namespace mhlo {
@@ -41,16 +42,16 @@ static SmallVector<int64_t> getInversePermutation(
 
 bool isCanonicalScatter(ScatterOp scatterOp) {
   if (llvm::any_of(scatterOp.getOperandTypes(), [](Type operandType) {
-        return !operandType.isa<RankedTensorType>();
+        return !mlir::isa<RankedTensorType>(operandType);
       }))
     return false;
 
   ScatterDimensionNumbersAttr dimsAttrs =
       scatterOp.getScatterDimensionNumbers();
   auto indicesType =
-      scatterOp.getScatterIndices().getType().cast<RankedTensorType>();
+      mlir::cast<RankedTensorType>(scatterOp.getScatterIndices().getType());
   auto operandType =
-      scatterOp.getOperands().front().getType().cast<RankedTensorType>();
+      mlir::cast<RankedTensorType>(scatterOp.getOperands().front().getType());
 
   return indicesType.getRank() == 2 && dimsAttrs.getIndexVectorDim() == 1 &&
          dimsAttrs.getInsertedWindowDims().empty() &&
@@ -86,7 +87,7 @@ Value insertDegenerateDimensions(OpBuilder& b, Location loc, Value tensor,
                                  ArrayRef<int64_t> dimsToInsert) {
   assert(llvm::is_sorted(dimsToInsert) && "dimsToInsert must be sorted");
   if (dimsToInsert.empty()) return tensor;
-  TensorType type = tensor.getType().cast<TensorType>();
+  TensorType type = mlir::cast<TensorType>(tensor.getType());
   SmallVector<int64_t> newShape{type.getShape()};
   for (int64_t dim : dimsToInsert) newShape.insert(newShape.begin() + dim, 1);
   auto newType = RankedTensorType::get(newShape, type.getElementType());
@@ -104,7 +105,7 @@ Value insertDegenerateDimensions(OpBuilder& b, Location loc, Value tensor,
 static Value ensureIndexVectorDimPosition(OpBuilder& b, Location loc,
                                           Value indices,
                                           int64_t indexVectorDim) {
-  int64_t indicesRank = indices.getType().cast<TensorType>().getRank();
+  int64_t indicesRank = mlir::cast<TensorType>(indices.getType()).getRank();
   if (indexVectorDim == indicesRank - 1) return indices;
   if (indexVectorDim == indicesRank)
     return insertDegenerateDimensions(b, loc, indices, {indicesRank});
@@ -121,7 +122,7 @@ Value canonicalizeStartIndices(OpBuilder& b, Location loc, Value indices,
                                int64_t indexVectorDim) {
   indices = ensureIndexVectorDimPosition(b, loc, indices, indexVectorDim);
 
-  int64_t indicesRank = indices.getType().cast<TensorType>().getRank();
+  int64_t indicesRank = mlir::cast<TensorType>(indices.getType()).getRank();
 
   if (indicesRank == 2) return indices;
   if (indicesRank == 1) return insertDegenerateDimensions(b, loc, indices, {0});
diff --git a/third_party/xla/xla/mlir_hlo/mhlo/utils/type_conversion.cc b/third_party/xla/xla/mlir_hlo/mhlo/utils/type_conversion.cc
index 42a5a542283697..50a8d01313ec6f 100644
--- a/third_party/xla/xla/mlir_hlo/mhlo/utils/type_conversion.cc
+++ b/third_party/xla/xla/mlir_hlo/mhlo/utils/type_conversion.cc
@@ -27,6 +27,7 @@ limitations under the License.
 #include "mlir/IR/TypeUtilities.h"
 #include "mlir/IR/Types.h"
 #include "mlir/IR/Value.h"
+#include "mlir/Support/LLVM.h"
 #include "stablehlo/dialect/StablehloOps.h"
 
 namespace mlir {
@@ -43,7 +44,7 @@ Type convertInteger(IntegerType intType) {
 }
 
 Type convertShapedType(ShapedType shapedType) {
-  if (auto intType = shapedType.getElementType().dyn_cast<IntegerType>())
+  if (auto intType = mlir::dyn_cast<IntegerType>(shapedType.getElementType()))
     return shapedType.clone(convertInteger(intType));
   return shapedType;
 }
@@ -76,7 +77,7 @@ std::optional<Value> materializeCastToIllegal(OpBuilder& builder, Type type,
 std::optional<Value> scalarToTensor(OpBuilder& builder, Type /*type*/,
                                     ValueRange inputs, Location loc) {
   assert(inputs.size() == 1);
-  if (inputs.front().getType().isa<ShapedType>()) {
+  if (mlir::isa<ShapedType>(inputs.front().getType())) {
     return std::nullopt;
   }
   return builder
@@ -160,7 +161,7 @@ bool HloToStablehloTypeConverter::isSourceDialect(Dialect& dialect) {
 
 Attribute HloToStablehloTypeConverter::convertSourceDialectEncoding(
     Attribute attr) {
-  if (auto hloAttr = attr.dyn_cast_or_null<mhlo::TypeExtensionsAttr>()) {
+  if (auto hloAttr = mlir::dyn_cast_or_null<mhlo::TypeExtensionsAttr>(attr)) {
     return stablehlo::TypeExtensionsAttr::get(hloAttr.getContext(),
                                               hloAttr.getBounds());
   }
@@ -185,7 +186,7 @@ bool StablehloToHloTypeConverter::isSourceDialect(Dialect& dialect) {
 Attribute StablehloToHloTypeConverter::convertSourceDialectEncoding(
     Attribute attr) {
   if (auto stablehloAttr =
-          attr.dyn_cast_or_null<stablehlo::TypeExtensionsAttr>()) {
+          mlir::dyn_cast_or_null<stablehlo::TypeExtensionsAttr>(attr)) {
     return mhlo::TypeExtensionsAttr::get(stablehloAttr.getContext(),
                                          stablehloAttr.getBounds());
   }
diff --git a/third_party/xla/xla/mlir_hlo/transforms/bufferize.cc b/third_party/xla/xla/mlir_hlo/transforms/bufferize.cc
index 93063d24190f66..33efc2b593b81e 100644
--- a/third_party/xla/xla/mlir_hlo/transforms/bufferize.cc
+++ b/third_party/xla/xla/mlir_hlo/transforms/bufferize.cc
@@ -23,9 +23,10 @@ limitations under the License.
 #include "mlir/Dialect/MemRef/IR/MemRef.h"
 #include "mlir/Dialect/SCF/IR/SCF.h"
 #include "mlir/IR/Attributes.h"
-#include "mlir/IR/IRMapping.h"
 #include "mlir/IR/BuiltinTypes.h"
+#include "mlir/IR/IRMapping.h"
 #include "mlir/IR/ImplicitLocOpBuilder.h"
+#include "mlir/Support/LLVM.h"
 #include "mlir/Transforms/DialectConversion.h"
 #include "stablehlo/dialect/ChloOps.h"
 #include "transforms/rewriters.h"
@@ -41,21 +42,21 @@ struct BufferizeConstantOp : public OpConversionPattern<arith::ConstantOp> {
       ConversionPatternRewriter &rewriter) const final {
     // We only need to bufferize tensor constants.
     Location loc = op.getLoc();
-    auto resultType = op.getType().dyn_cast<RankedTensorType>();
+    auto resultType = mlir::dyn_cast<RankedTensorType>(op.getType());
     int64_t resultRank = resultType.getRank();
     if (!resultType || !resultType.hasStaticShape() || resultRank > 1)
       return failure();
 
     auto elementType = resultType.getElementType();
     auto memrefType = MemRefType::get(resultType.getShape(), elementType);
-    auto elementsAttr = op.getValue().cast<DenseElementsAttr>();
+    auto elementsAttr = mlir::cast<DenseElementsAttr>(op.getValue());
 
     // arith.constant doesn't handle scalar complex types.
     // TODO(kramerb): Should this use materializeConstant instead?
     auto makeConstant = [&](Attribute attr, Type type) -> Value {
       if (complex::ConstantOp::isBuildableWith(attr, type))
-        return rewriter.create<complex::ConstantOp>(loc, type,
-                                                    attr.cast<ArrayAttr>());
+        return rewriter.create<complex::ConstantOp>(
+            loc, type, mlir::cast<ArrayAttr>(attr));
       return rewriter.create<arith::ConstantOp>(loc, cast<TypedAttr>(attr));
     };
 
diff --git a/third_party/xla/xla/mlir_hlo/transforms/bufferize_pass.cc b/third_party/xla/xla/mlir_hlo/transforms/bufferize_pass.cc
index 93756798df52b1..febe5e92390788 100644
--- a/third_party/xla/xla/mlir_hlo/transforms/bufferize_pass.cc
+++ b/third_party/xla/xla/mlir_hlo/transforms/bufferize_pass.cc
@@ -67,6 +67,7 @@ limitations under the License.
 #include "mlir/IR/Operation.h"
 #include "mlir/IR/PatternMatch.h"
 #include "mlir/IR/Visitors.h"
+#include "mlir/Support/LLVM.h"
 #include "mlir/Transforms/DialectConversion.h"
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"
 #include "stablehlo/dialect/ChloOps.h"
@@ -91,7 +92,7 @@ static constexpr char kFusionFunctionLabel[] = "fusion";
 static Value materializeToTensor(OpBuilder& builder, TensorType type,
                                  ValueRange inputs, Location loc) {
   assert(inputs.size() == 1);
-  assert(inputs[0].getType().isa<BaseMemRefType>());
+  assert(mlir::isa<BaseMemRefType>(inputs[0].getType()));
   return builder.create<bufferization::ToTensorOp>(loc, type, inputs[0]);
 }
 
@@ -120,11 +121,11 @@ class CustomBufferizeTypeConverter
       // a memref with a specified layout, i.e. non-empty affine map.
       // TODO(pifon) : Change how target materialization is invoked in dialect
       // conversion.
-      if (auto memrefType = inputs[0].getType().dyn_cast<MemRefType>()) {
+      if (auto memrefType = mlir::dyn_cast<MemRefType>(inputs[0].getType())) {
         assert(!memrefType.getLayout().isIdentity());
         return inputs[0];
       }
-      assert(inputs[0].getType().isa<TensorType>());
+      assert(mlir::isa<TensorType>(inputs[0].getType()));
       return builder.create<bufferization::ToMemrefOp>(loc, type, inputs[0]);
     });
   }
diff --git a/third_party/xla/xla/mlir_hlo/transforms/detensorize_scf_ops.cc b/third_party/xla/xla/mlir_hlo/transforms/detensorize_scf_ops.cc
index 196a394ece577d..2a8be4e6b09ae0 100644
--- a/third_party/xla/xla/mlir_hlo/transforms/detensorize_scf_ops.cc
+++ b/third_party/xla/xla/mlir_hlo/transforms/detensorize_scf_ops.cc
@@ -22,6 +22,7 @@ limitations under the License.
 #include "mlir/IR/ImplicitLocOpBuilder.h"
 #include "mlir/IR/PatternMatch.h"
 #include "mlir/Pass/Pass.h"
+#include "mlir/Support/LLVM.h"
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"
 #include "transforms/passes.h"
 
@@ -33,7 +34,7 @@ namespace mlir {
 namespace {
 
 bool isUnitTensor(Value value) {
-  if (auto tensorTy = value.getType().dyn_cast<RankedTensorType>()) {
+  if (auto tensorTy = mlir::dyn_cast<RankedTensorType>(value.getType())) {
     return tensorTy.getRank() == 0;
   }
   return false;
@@ -74,7 +75,7 @@ struct RegionOpPattern : public OpRewritePattern<T> {
           b.setInsertionPointToStart(&block);
           // Change the argument type to a scalar, but repack it into a tensor.
           arg.setType(
-              arg.getType().template cast<RankedTensorType>().getElementType());
+              mlir::cast<RankedTensorType>(arg.getType()).getElementType());
           auto converted = b.create<tensor::FromElementsOp>(
               RankedTensorType::get({}, arg.getType()), arg);
           arg.replaceAllUsesExcept(converted, converted.getOperation());
@@ -94,7 +95,7 @@ struct RegionOpPattern : public OpRewritePattern<T> {
     llvm::SmallVector<Value> results = result->getResults();
     for (auto [index, opResult] : unitTensors(results)) {
       // Fix the result type in the SCF op (it's actually a scalar now).
-      auto oldType = opResult.getType().template cast<RankedTensorType>();
+      auto oldType = mlir::cast<RankedTensorType>(opResult.getType());
       opResult.setType(oldType.getElementType());
 
       // Convert the scalar back to a tensor in the output.
diff --git a/third_party/xla/xla/mlir_hlo/transforms/lower_index_cast_pass.cc b/third_party/xla/xla/mlir_hlo/transforms/lower_index_cast_pass.cc
index 6d67f53ca1df3c..489d8fb4cb811e 100644
--- a/third_party/xla/xla/mlir_hlo/transforms/lower_index_cast_pass.cc
+++ b/third_party/xla/xla/mlir_hlo/transforms/lower_index_cast_pass.cc
@@ -24,6 +24,7 @@ limitations under the License.
 #include "mlir/Dialect/Tensor/IR/Tensor.h"
 #include "mlir/Dialect/Tensor/Utils/Utils.h"
 #include "mlir/IR/PatternMatch.h"
+#include "mlir/Support/LLVM.h"
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"
 #include "transforms/passes.h"
 
@@ -40,7 +41,7 @@ struct IndexCastConverter : public OpRewritePattern<T> {
  public:
   using OpRewritePattern<T>::OpRewritePattern;
   LogicalResult matchAndRewrite(T op, PatternRewriter &rewriter) const final {
-    auto resultTy = op.getType().template dyn_cast<RankedTensorType>();
+    auto resultTy = mlir::dyn_cast<RankedTensorType>(op.getType());
     if (!resultTy) return failure();
 
     SmallVector<Value> dynamicExtents =
diff --git a/third_party/xla/xla/mlir_hlo/transforms/propagate_static_shapes_to_kernel.cc b/third_party/xla/xla/mlir_hlo/transforms/propagate_static_shapes_to_kernel.cc
index aa1873478a0e7b..26f4412a29ebcd 100644
--- a/third_party/xla/xla/mlir_hlo/transforms/propagate_static_shapes_to_kernel.cc
+++ b/third_party/xla/xla/mlir_hlo/transforms/propagate_static_shapes_to_kernel.cc
@@ -166,7 +166,7 @@ LogicalResult PropagateStaticShapesPattern::matchAndRewrite(
   // corresponding to the flattened memref with just the 'base' pointer.
   for (auto arguments = funcOp.getArguments(); !arguments.empty();
        operands = operands.drop_front()) {
-    auto memref = operands.getTypes().front().dyn_cast<MemRefType>();
+    auto memref = mlir::dyn_cast<MemRefType>(operands.getTypes().front());
     if (!memref) {
       // Scalar argument, advance by one.
       arguments = arguments.drop_front();
@@ -176,10 +176,10 @@ LogicalResult PropagateStaticShapesPattern::matchAndRewrite(
     // memref is flattened to base, align, offset, strides and sizes.
     int64_t numArgs = 3 + memref.getRank() * 2;
     auto isPtr = [](BlockArgument arg) {
-      return arg.getType().isa<LLVM::LLVMPointerType>();
+      return mlir::isa<LLVM::LLVMPointerType>(arg.getType());
     };
     auto isInt = [](BlockArgument arg) {
-      return arg.getType().isa<IntegerType>();
+      return mlir::isa<IntegerType>(arg.getType());
     };
     // Bail out if the next num_args are not the expected type.
     if (static_cast<int64_t>(arguments.size()) < numArgs) break;
diff --git a/third_party/xla/xla/mlir_hlo/transforms/unbufferize_pass.cc b/third_party/xla/xla/mlir_hlo/transforms/unbufferize_pass.cc
index 9b936bd759b58d..30932490b98970 100644
--- a/third_party/xla/xla/mlir_hlo/transforms/unbufferize_pass.cc
+++ b/third_party/xla/xla/mlir_hlo/transforms/unbufferize_pass.cc
@@ -28,6 +28,7 @@ limitations under the License.
 #include "mlir/Dialect/MemRef/IR/MemRef.h"
 #include "mlir/IR/IRMapping.h"
 #include "mlir/IR/Value.h"
+#include "mlir/Support/LLVM.h"
 #include "transforms/passes.h"
 
 namespace mlir {
@@ -54,7 +55,7 @@ void UnbufferizePass::runOnOperation() {
   IRMapping mapping;
   llvm::SmallDenseSet<BlockArgument> insertedArgs;
   funcOp->walk([&](bufferization::ToTensorOp op) {
-    auto arg = op.getMemref().dyn_cast<BlockArgument>();
+    auto arg = mlir::dyn_cast<BlockArgument>(op.getMemref());
     if (!arg) return;
     Value newValue = mapping.lookupOrNull(arg);
     if (newValue == nullptr) {
@@ -70,7 +71,7 @@ void UnbufferizePass::runOnOperation() {
   SmallVector<Value> results;
   SmallVector<DictionaryAttr> resultAttrs;
   funcOp->walk([&](bufferization::MaterializeInDestinationOp op) {
-    auto arg = op.getDest().dyn_cast<BlockArgument>();
+    auto arg = mlir::dyn_cast<BlockArgument>(op.getDest());
     if (!arg) return;
     argsToErase.set(arg.getArgNumber());
     results.push_back(op.getSource());
diff --git a/third_party/xla/xla/mlir_hlo/utils/codegen_utils.cc b/third_party/xla/xla/mlir_hlo/utils/codegen_utils.cc
index fc0622ae04627d..2562c060e82f9b 100644
--- a/third_party/xla/xla/mlir_hlo/utils/codegen_utils.cc
+++ b/third_party/xla/xla/mlir_hlo/utils/codegen_utils.cc
@@ -21,6 +21,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinTypes.h"
 #include "mlir/IR/Location.h"
 #include "mlir/Pass/Pass.h"
+#include "mlir/Support/LLVM.h"
 
 using llvm::SmallVector;
 
@@ -28,7 +29,7 @@ namespace mlir {
 namespace codegen_utils {
 
 Value emitNumElementsComputation(OpBuilder& b, Location loc, Value memref) {
-  int rank = memref.getType().cast<MemRefType>().getRank();
+  int rank = mlir::cast<MemRefType>(memref.getType()).getRank();
   Value numElements;
   numElements = b.create<mlir::arith::ConstantOp>(
       loc, b.getIndexType(), b.getIntegerAttr(b.getIndexType(), 1));
@@ -83,7 +84,7 @@ SmallVector<Value> calcMultiDimIndex(OpBuilder& b, Location loc,
 
 SmallVector<Value> calcMultiDimIndex(OpBuilder& b, Location loc,
                                      Value linearIndex, Value memref) {
-  int rank = memref.getType().cast<MemRefType>().getRank();
+  int rank = mlir::cast<MemRefType>(memref.getType()).getRank();
   SmallVector<Value> result;
   if (rank == 0) return result;
   if (rank == 1) {
diff --git a/third_party/xla/xla/mlir_hlo/utils/convert_op_folder.cc b/third_party/xla/xla/mlir_hlo/utils/convert_op_folder.cc
index 2468da81bfab99..bdfa26f54eed9d 100644
--- a/third_party/xla/xla/mlir_hlo/utils/convert_op_folder.cc
+++ b/third_party/xla/xla/mlir_hlo/utils/convert_op_folder.cc
@@ -23,6 +23,7 @@ limitations under the License.
 #include "mlir/IR/Attributes.h"
 #include "mlir/IR/BuiltinTypes.h"
 #include "mlir/IR/TypeUtilities.h"
+#include "mlir/Support/LLVM.h"
 
 namespace mlir {
 namespace hlo {
@@ -31,8 +32,8 @@ mlir::ElementsAttr convertElementsAttr(const mlir::ElementsAttr& elements,
                                        mlir::Type newType) {
   auto oldType = getElementTypeOrSelf(elements);
   // TODO(kramerb): Add support when MLIR can represent const complex tensors.
-  if (!oldType.isa<mlir::IntegerType, mlir::FloatType>() ||
-      !newType.isa<mlir::IntegerType, mlir::FloatType>()) {
+  if (!mlir::isa<mlir::IntegerType, mlir::FloatType>(oldType) ||
+      !mlir::isa<mlir::IntegerType, mlir::FloatType>(newType)) {
     return {};
   }
 
@@ -41,10 +42,10 @@ mlir::ElementsAttr convertElementsAttr(const mlir::ElementsAttr& elements,
   bool isOldTypeUnsigned = oldType.isInteger(1) || oldType.isUnsignedInteger();
   bool isNewTypeUnsigned = newType.isInteger(1) || newType.isUnsignedInteger();
 
-  if (oldType.isa<mlir::FloatType>()) {
-    if (auto newFloatType = newType.dyn_cast<mlir::FloatType>()) {
+  if (mlir::isa<mlir::FloatType>(oldType)) {
+    if (auto newFloatType = mlir::dyn_cast<mlir::FloatType>(newType)) {
       // Float -> Float
-      return elements.cast<DenseIntOrFPElementsAttr>().mapValues(
+      return mlir::cast<DenseIntOrFPElementsAttr>(elements).mapValues(
           newType, [&](const APFloat& floatVal) -> APInt {
             APFloat convertedFloat = floatVal;
             bool losesInfo = false;
@@ -54,7 +55,7 @@ mlir::ElementsAttr convertElementsAttr(const mlir::ElementsAttr& elements,
           });
     }
     // Float -> Int
-    return elements.cast<DenseIntOrFPElementsAttr>().mapValues(
+    return mlir::cast<DenseIntOrFPElementsAttr>(elements).mapValues(
         newType, [&](const APFloat& floatVal) -> APInt {
           bool ignored;
           APSInt intVal(bitWidth, isNewTypeUnsigned);
@@ -64,9 +65,9 @@ mlir::ElementsAttr convertElementsAttr(const mlir::ElementsAttr& elements,
   }
 
   // old_type is Integer
-  if (auto newFloatType = newType.dyn_cast<mlir::FloatType>()) {
+  if (auto newFloatType = mlir::dyn_cast<mlir::FloatType>(newType)) {
     // Int -> Float
-    return elements.cast<DenseIntOrFPElementsAttr>().mapValues(
+    return mlir::cast<DenseIntOrFPElementsAttr>(elements).mapValues(
         newType, [&](const APInt& intVal) -> APInt {
           APFloat floatVal(newFloatType.getFloatSemantics(),
                            APInt::getZero(newFloatType.getWidth()));
@@ -78,7 +79,7 @@ mlir::ElementsAttr convertElementsAttr(const mlir::ElementsAttr& elements,
   }
   // new_type is Integer
   // Int -> Int
-  return elements.cast<DenseIntOrFPElementsAttr>().mapValues(
+  return mlir::cast<DenseIntOrFPElementsAttr>(elements).mapValues(
       newType, [&](const APInt& intVal) -> APInt {
         return APSInt(intVal, isOldTypeUnsigned).extOrTrunc(bitWidth);
       });
diff --git a/third_party/xla/xla/mlir_hlo/utils/hlo_utils.cc b/third_party/xla/xla/mlir_hlo/utils/hlo_utils.cc
index fc02ada8840de2..a793e61a7fb367 100644
--- a/third_party/xla/xla/mlir_hlo/utils/hlo_utils.cc
+++ b/third_party/xla/xla/mlir_hlo/utils/hlo_utils.cc
@@ -37,8 +37,8 @@ static constexpr size_t kPaddingSize = 64;
 
 DenseI64ArrayAttr getBroadcastDimensionsAttr(Builder* b, Value x, Value y,
                                              bool allowEmpty) {
-  TensorType xType = x.getType().dyn_cast<RankedTensorType>();
-  TensorType yType = y.getType().dyn_cast<RankedTensorType>();
+  TensorType xType = mlir::dyn_cast<RankedTensorType>(x.getType());
+  TensorType yType = mlir::dyn_cast<RankedTensorType>(y.getType());
   if (!xType || !yType) return {};
   if (allowEmpty && xType == yType) return {};
 
@@ -68,17 +68,17 @@ DenseI64ArrayAttr getBroadcastDimensionsAttr(Builder* b, Value x, Value y,
 DenseElementsAttr getScalarOfType(Type ty, int64_t rawValue) {
   RankedTensorType scalarTy = RankedTensorType::get({}, ty);
 
-  if (auto floatTy = ty.dyn_cast<FloatType>()) {
+  if (auto floatTy = mlir::dyn_cast<FloatType>(ty)) {
     APFloat value(floatTy.getFloatSemantics(), rawValue);
     return DenseElementsAttr::get(scalarTy, value);
   }
-  if (auto intTy = ty.dyn_cast<IntegerType>()) {
+  if (auto intTy = mlir::dyn_cast<IntegerType>(ty)) {
     APInt value(intTy.getWidth(), static_cast<int64_t>(rawValue),
                 /*isSigned=*/true);
     return DenseElementsAttr::get(scalarTy, value);
   }
-  if (auto complexTy = ty.dyn_cast<ComplexType>()) {
-    if (auto floatTy = complexTy.getElementType().cast<FloatType>()) {
+  if (auto complexTy = mlir::dyn_cast<ComplexType>(ty)) {
+    if (auto floatTy = mlir::cast<FloatType>(complexTy.getElementType())) {
       APFloat real(floatTy.getFloatSemantics(), rawValue);
       APFloat imag = APFloat::getZero(floatTy.getFloatSemantics());
       return DenseElementsAttr::get(scalarTy,
@@ -91,16 +91,16 @@ DenseElementsAttr getScalarOfType(Type ty, int64_t rawValue) {
 DenseElementsAttr getScalarNegZeroOfType(Type ty) {
   RankedTensorType scalarTy = RankedTensorType::get({}, ty);
 
-  if (auto floatTy = ty.dyn_cast<FloatType>()) {
+  if (auto floatTy = mlir::dyn_cast<FloatType>(ty)) {
     APFloat negZero =
         APFloat::getZero(floatTy.getFloatSemantics(), /*Negative=*/true);
     return DenseElementsAttr::get(scalarTy, negZero);
   }
-  if (auto intTy = ty.dyn_cast<IntegerType>()) {
+  if (auto intTy = mlir::dyn_cast<IntegerType>(ty)) {
     return DenseElementsAttr::get(scalarTy, APInt::getZero(intTy.getWidth()));
   }
-  if (auto complexTy = ty.dyn_cast<ComplexType>()) {
-    if (auto floatTy = complexTy.getElementType().cast<FloatType>()) {
+  if (auto complexTy = mlir::dyn_cast<ComplexType>(ty)) {
+    if (auto floatTy = mlir::cast<FloatType>(complexTy.getElementType())) {
       APFloat negZero =
           APFloat::getZero(floatTy.getFloatSemantics(), /*Negative=*/true);
       return DenseElementsAttr::get(scalarTy,
@@ -156,11 +156,11 @@ static APInt getScalarLimitOfIntegerType(IntegerType integerTy,
 
 DenseElementsAttr getScalarLimitOfType(Type ty, ScalarLimit limit) {
   RankedTensorType scalarTy = RankedTensorType::get({}, ty);
-  if (auto floatTy = ty.dyn_cast<FloatType>()) {
+  if (auto floatTy = mlir::dyn_cast<FloatType>(ty)) {
     return DenseElementsAttr::get(scalarTy,
                                   getScalarLimitOfFloatType(floatTy, limit));
   }
-  if (auto integerTy = ty.dyn_cast<IntegerType>()) {
+  if (auto integerTy = mlir::dyn_cast<IntegerType>(ty)) {
     return DenseElementsAttr::get(
         scalarTy, getScalarLimitOfIntegerType(integerTy, limit));
   }
@@ -185,14 +185,14 @@ std::string lmhloToMhloOpName(llvm::StringRef opName,
 }
 
 bool isSequenceStartingWith0(Attribute attr) {
-  DenseIntElementsAttr denseAttr = attr.dyn_cast<DenseIntElementsAttr>();
+  DenseIntElementsAttr denseAttr = mlir::dyn_cast<DenseIntElementsAttr>(attr);
   for (int64_t i = 0, e = denseAttr.getNumElements(); i < e; ++i)
     if (denseAttr.getValues<APInt>()[i].getSExtValue() != i) return false;
   return true;
 }
 
 int64_t getArgumentIndex(mlir::func::FuncOp op, Value value) {
-  BlockArgument arg = value.dyn_cast<BlockArgument>();
+  BlockArgument arg = mlir::dyn_cast<BlockArgument>(value);
   if (!arg || arg.getOwner() != &op.front()) return -1;
   return arg.getArgNumber();
 }
@@ -202,7 +202,7 @@ std::pair<size_t, size_t> computeMemory(const std::vector<Value>& allocs) {
   size_t totalSize = 0;
   size_t allocCounter = 0;
   for (const Value alloc : allocs) {
-    auto shape = alloc.getType().cast<ShapedType>();
+    auto shape = mlir::cast<ShapedType>(alloc.getType());
     size_t shapeBytes = llvm::divideCeil(
         shape.getNumElements() * shape.getElementTypeBitWidth(), 8);
     size_t alignFactor = llvm::divideCeil(shapeBytes, kPaddingSize);
@@ -220,21 +220,21 @@ namespace mlir {
 namespace chlo {
 
 Value getConstantLikeMaxFiniteValue(OpBuilder& b, Location loc, Value val) {
-  auto ty = getElementTypeOrSelf(val.getType()).cast<FloatType>();
+  auto ty = mlir::cast<FloatType>(getElementTypeOrSelf(val.getType()));
   return getConstantLike(
       b, loc, llvm::APFloat::getLargest(ty.getFloatSemantics()), val);
 }
 
 Value getConstantLikeInfValue(OpBuilder& b, Location loc, Value val,
                               bool negative) {
-  auto ty = getElementTypeOrSelf(val.getType()).cast<FloatType>();
+  auto ty = mlir::cast<FloatType>(getElementTypeOrSelf(val.getType()));
   return getConstantLike(
       b, loc, llvm::APFloat::getInf(ty.getFloatSemantics(), negative), val);
 }
 
 Value getConstantLikeSmallestFiniteValue(OpBuilder& b, Location loc,
                                          Value val) {
-  auto ty = getElementTypeOrSelf(val.getType()).cast<FloatType>();
+  auto ty = mlir::cast<FloatType>(getElementTypeOrSelf(val.getType()));
   return getConstantLike(
       b, loc, llvm::APFloat::getSmallest(ty.getFloatSemantics()), val);
 }
diff --git a/third_party/xla/xla/mlir_hlo/utils/hlo_utils.h b/third_party/xla/xla/mlir_hlo/utils/hlo_utils.h
index 72f22992b4a944..74dfa37326213e 100644
--- a/third_party/xla/xla/mlir_hlo/utils/hlo_utils.h
+++ b/third_party/xla/xla/mlir_hlo/utils/hlo_utils.h
@@ -28,6 +28,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinTypes.h"
 #include "mlir/IR/PatternMatch.h"
 #include "mlir/IR/TypeUtilities.h"
+#include "mlir/Support/LLVM.h"
 #include "stablehlo/dialect/ChloOps.h"
 
 namespace mlir {
@@ -49,10 +50,10 @@ static ElementsAttr getSplat(Builder* b, RankedTensorType ty, T constant) {
   if (elementTy.isSignlessInteger())
     return DenseElementsAttr::get(ty, b->getIntegerAttr(elementTy, constant));
 
-  if (elementTy.isa<FloatType>())
+  if (mlir::isa<FloatType>(elementTy))
     return DenseElementsAttr::get(ty, b->getFloatAttr(elementTy, constant));
 
-  if (auto complexTy = elementTy.dyn_cast<ComplexType>()) {
+  if (auto complexTy = mlir::dyn_cast<ComplexType>(elementTy)) {
     auto complexElementTy = complexTy.getElementType();
     if (complexElementTy.isF32())
       return DenseElementsAttr::get(ty,
@@ -66,7 +67,7 @@ static ElementsAttr getSplat(Builder* b, RankedTensorType ty, T constant) {
 
 template <typename T>
 static ElementsAttr getSplat(Builder* b, Value val, T constant) {
-  return getSplat(b, val.getType().cast<RankedTensorType>(), constant);
+  return getSplat(b, mlir::cast<RankedTensorType>(val.getType()), constant);
 }
 
 // Returns DenseElementsAttr of rank zero with the given element type and the
@@ -119,9 +120,9 @@ static Value getConstantLike(OpBuilder& b, Location loc, T constant,
                              Value val) {
   Type ty = getElementTypeOrSelf(val.getType());
   auto getAttr = [&]() -> Attribute {
-    if (ty.isa<IntegerType>()) return b.getIntegerAttr(ty, constant);
-    if (ty.isa<FloatType>()) return b.getFloatAttr(ty, constant);
-    if (auto complexTy = ty.dyn_cast<ComplexType>())
+    if (mlir::isa<IntegerType>(ty)) return b.getIntegerAttr(ty, constant);
+    if (mlir::isa<FloatType>(ty)) return b.getFloatAttr(ty, constant);
+    if (auto complexTy = mlir::dyn_cast<ComplexType>(ty))
       return complex::NumberAttr::get(complexTy, constant, 0);
     llvm_unreachable("unhandled element type");
   };
diff --git a/third_party/xla/xla/pjrt/BUILD b/third_party/xla/xla/pjrt/BUILD
index 7c474f09e52fdd..adb7c727cb9de7 100644
--- a/third_party/xla/xla/pjrt/BUILD
+++ b/third_party/xla/xla/pjrt/BUILD
@@ -360,6 +360,7 @@ cc_library(
         "@com_google_absl//absl/types:span",
         "@llvm-project//mlir:FuncDialect",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
         "@local_tsl//tsl/platform:errors",
         "@local_tsl//tsl/platform:logging",
         "@local_tsl//tsl/platform:platform_port",
diff --git a/third_party/xla/xla/pjrt/mlir_to_hlo.cc b/third_party/xla/xla/pjrt/mlir_to_hlo.cc
index 664012f46b9780..2c27c5daa65d5d 100644
--- a/third_party/xla/xla/pjrt/mlir_to_hlo.cc
+++ b/third_party/xla/xla/pjrt/mlir_to_hlo.cc
@@ -39,6 +39,7 @@ limitations under the License.
 #include "mlir/IR/BuiltinTypes.h"  // from @llvm-project
 #include "mlir/Parser/Parser.h"  // from @llvm-project
 #include "mlir/Pass/PassManager.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Transforms/Passes.h"  // from @llvm-project
 #include "stablehlo/dialect/Register.h"  // from @stablehlo
@@ -58,12 +59,12 @@ namespace xla {
 namespace {
 
 static mlir::Attribute ArrayToElements(mlir::Attribute attr) {
-  if (auto array = attr.dyn_cast<mlir::DenseI64ArrayAttr>()) {
+  if (auto array = mlir::dyn_cast<mlir::DenseI64ArrayAttr>(attr)) {
     return mlir::DenseIntElementsAttr::get(
         mlir::RankedTensorType::get(array.size(), array.getElementType()),
         array.asArrayRef());
   }
-  if (auto array = attr.dyn_cast<mlir::DenseBoolArrayAttr>()) {
+  if (auto array = mlir::dyn_cast<mlir::DenseBoolArrayAttr>(attr)) {
     return mlir::DenseIntElementsAttr::get(
         mlir::RankedTensorType::get(array.size(), array.getElementType()),
         array.asArrayRef());
diff --git a/third_party/xla/xla/pjrt/utils.cc b/third_party/xla/xla/pjrt/utils.cc
index c5a0f6016c5ad8..9bcbcfc89be21d 100644
--- a/third_party/xla/xla/pjrt/utils.cc
+++ b/third_party/xla/xla/pjrt/utils.cc
@@ -35,6 +35,7 @@ limitations under the License.
 #include "mlir/Dialect/Func/IR/FuncOps.h"  // from @llvm-project
 #include "mlir/IR/Attributes.h"  // from @llvm-project
 #include "mlir/IR/BuiltinAttributes.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "xla/client/executable_build_options.h"
 #include "xla/client/xla_computation.h"
 #include "xla/hlo/ir/hlo_computation.h"
@@ -194,7 +195,7 @@ static StatusOr<std::vector<LayoutMode>> MlirAttrsToLayoutModes(
   result.reserve(all_attrs.size());
   for (const mlir::Attribute& dict_attr : all_attrs) {
     mlir::StringAttr attr =
-        dict_attr.cast<mlir::DictionaryAttr>().getAs<mlir::StringAttr>(
+        mlir::cast<mlir::DictionaryAttr>(dict_attr).getAs<mlir::StringAttr>(
             "mhlo.layout_mode");
     if (attr != nullptr) {
       TF_ASSIGN_OR_RETURN(LayoutMode mode,
@@ -242,7 +243,7 @@ static absl::StatusOr<std::vector<MemorySpaceColor>> MlirAttrsToMemoryKinds(
   result.reserve(all_attrs.size());
   for (const mlir::Attribute& dict_attr : all_attrs) {
     mlir::StringAttr attr =
-        dict_attr.cast<mlir::DictionaryAttr>().getAs<mlir::StringAttr>(
+        mlir::cast<mlir::DictionaryAttr>(dict_attr).getAs<mlir::StringAttr>(
             "mhlo.memory_kind");
     if (attr != nullptr) {
       TF_ASSIGN_OR_RETURN(MemorySpaceColor memory_space,
@@ -269,15 +270,14 @@ static StatusOr<std::optional<std::vector<LayoutMode>>> GetTupleLayoutModes(
           "GetTupleLayoutModes expected single tuple attr, got %d attrs",
           all_attrs.size());
     }
-    mlir::StringAttr attr =
-        all_attrs.begin()->cast<mlir::DictionaryAttr>().getAs<mlir::StringAttr>(
-            "mhlo.layout_mode");
+    mlir::StringAttr attr = mlir::cast<mlir::DictionaryAttr>(*all_attrs.begin())
+                                .getAs<mlir::StringAttr>("mhlo.layout_mode");
     if (attr != nullptr) {
       return Unimplemented("mhlo.layout_mode not supported with tupled values");
     }
   }
   // Use default layout for all outputs.
-  return std::vector<LayoutMode>(types[0].cast<mlir::TupleType>().size());
+  return std::vector<LayoutMode>(mlir::cast<mlir::TupleType>(types[0]).size());
 }
 
 // Helper function for getting default LayoutModes for tupled arguments or
@@ -295,16 +295,16 @@ GetTupleMemoryKinds(mlir::ArrayRef<mlir::Type> types,
           "GetTupleMemoryKinds expected single tuple attr, got %d attrs",
           all_attrs.size());
     }
-    mlir::StringAttr attr =
-        all_attrs.begin()->cast<mlir::DictionaryAttr>().getAs<mlir::StringAttr>(
-            "mhlo.memory_kind");
+    mlir::StringAttr attr = mlir::cast<mlir::DictionaryAttr>(*all_attrs.begin())
+                                .getAs<mlir::StringAttr>("mhlo.memory_kind");
     if (attr != nullptr) {
       return Unimplemented("mhlo.memory_kind not supported with tupled values");
     }
   }
   // Use default layout for all outputs.
-  return std::vector<MemorySpaceColor>(types[0].cast<mlir::TupleType>().size(),
-                                       xla::Layout::kDefaultMemorySpace);
+  return std::vector<MemorySpaceColor>(
+      mlir::cast<mlir::TupleType>(types[0]).size(),
+      xla::Layout::kDefaultMemorySpace);
 }
 
 StatusOr<std::vector<LayoutMode>> GetArgLayoutModes(mlir::ModuleOp module) {
diff --git a/third_party/xla/xla/python/refine_polymorphic_shapes.cc b/third_party/xla/xla/python/refine_polymorphic_shapes.cc
index 58873b9de65cd7..6b74f8ce3777f8 100644
--- a/third_party/xla/xla/python/refine_polymorphic_shapes.cc
+++ b/third_party/xla/xla/python/refine_polymorphic_shapes.cc
@@ -154,7 +154,7 @@ struct CheckShapeAssertionsPass
 
     // input[0] (assert_what) : tensor<i1>
     auto assertWhatType =
-        op.getInputs()[0].getType().dyn_cast<mlir::ShapedType>();
+        mlir::dyn_cast<mlir::ShapedType>(op.getInputs()[0].getType());
     if (!assertWhatType || !assertWhatType.hasRank() ||
         assertWhatType.getRank() != 0 ||
         !assertWhatType.getElementType().isSignlessInteger() ||
@@ -165,7 +165,7 @@ struct CheckShapeAssertionsPass
     // input[1:] (error_message_inputs) : tensor<i32> or tensor<i64>
     for (int i = 0; i < nrErrorMessageInputs; ++i) {
       auto errorMessageInputType =
-          op.getInputs()[i + 1].getType().dyn_cast<mlir::ShapedType>();
+          mlir::dyn_cast<mlir::ShapedType>(op.getInputs()[i + 1].getType());
       if (!errorMessageInputType || !errorMessageInputType.hasRank() ||
           errorMessageInputType.getRank() != 0 ||
           !errorMessageInputType.getElementType().isSignlessInteger() ||
@@ -202,8 +202,7 @@ struct CheckShapeAssertionsPass
   }
 
   llvm::StringRef getErrorMessage(mlir::stablehlo::CustomCallOp op) const {
-    return op->getAttr(errorMessageAttrName)
-        .cast<mlir::StringAttr>()
+    return mlir::cast<mlir::StringAttr>(op->getAttr(errorMessageAttrName))
         .getValue();
   }
 
@@ -320,7 +319,7 @@ absl::Status ValidateStaticShapes(mlir::ModuleOp module) {
     // It's sufficient to only check results because operands either come from
     // results or from block arguments which are checked below.
     auto hasDynamicShape = [](mlir::Value value) {
-      auto shaped_type = value.getType().dyn_cast<mlir::ShapedType>();
+      auto shaped_type = mlir::dyn_cast<mlir::ShapedType>(value.getType());
       return shaped_type ? !shaped_type.hasStaticShape() : false;
     };
     bool opHasDynamicShapes = false;
diff --git a/third_party/xla/xla/service/cpu/cpu_compiler.cc b/third_party/xla/xla/service/cpu/cpu_compiler.cc
index a9d87bd5b12919..ed21241ea42621 100644
--- a/third_party/xla/xla/service/cpu/cpu_compiler.cc
+++ b/third_party/xla/xla/service/cpu/cpu_compiler.cc
@@ -370,7 +370,7 @@ class FlattenTuplesAndBufferizeTypeConverter : public mlir::TypeConverter {
         [](mlir::Type type, mlir::SmallVectorImpl<mlir::Type>& converted)
             -> mlir::LogicalResult {
           mlir::bufferization::BufferizeTypeConverter bufferize;
-          auto tuple_type = type.dyn_cast<mlir::TupleType>();
+          auto tuple_type = mlir::dyn_cast<mlir::TupleType>(type);
           if (!tuple_type) {
             converted.push_back(bufferize.convertType(type));
             return mlir::success();
@@ -1235,7 +1235,7 @@ absl::StatusOr<mlir::OwningOpRef<mlir::ModuleOp>> createMLIRModule(
       for (const auto& p : llvm::enumerate(operand_mapping)) {
         f.setArgAttr(p.index(), "xla_framework.input_mapping", p.value().first);
         if (export_mapping != nullptr) {
-          auto index_attr = p.value().first.dyn_cast<mlir::IntegerAttr>();
+          auto index_attr = mlir::dyn_cast<mlir::IntegerAttr>(p.value().first);
           if (index_attr) {
             export_mapping->inputs.push_back(index_attr.getInt());
           }
diff --git a/third_party/xla/xla/service/cpu/hlo_xla_runtime_pipeline.cc b/third_party/xla/xla/service/cpu/hlo_xla_runtime_pipeline.cc
index 331f5d933671a5..c13f9c20bb7e56 100644
--- a/third_party/xla/xla/service/cpu/hlo_xla_runtime_pipeline.cc
+++ b/third_party/xla/xla/service/cpu/hlo_xla_runtime_pipeline.cc
@@ -81,7 +81,7 @@ mlir::bufferization::OneShotBufferizationOptions GetBufferizationOptions(
                                       mlir::Attribute memorySpace,
                                       const BufferizationOptions& options) {
     return mlir::bufferization::getMemRefTypeWithStaticIdentityLayout(
-        value.getType().cast<mlir::TensorType>(), memorySpace);
+        mlir::cast<mlir::TensorType>(value.getType()), memorySpace);
   };
   return options;
 }
diff --git a/third_party/xla/xla/service/gpu/BUILD b/third_party/xla/xla/service/gpu/BUILD
index 7b5b1e62356586..d790a876786484 100644
--- a/third_party/xla/xla/service/gpu/BUILD
+++ b/third_party/xla/xla/service/gpu/BUILD
@@ -983,6 +983,7 @@ cc_library(
         "@llvm-project//mlir:FuncDialect",
         "@llvm-project//mlir:IR",
         "@llvm-project//mlir:Parser",
+        "@llvm-project//mlir:Support",
         "@local_tsl//tsl/platform:env",
         "@local_tsl//tsl/platform:errors",
         "@local_tsl//tsl/platform:logging",
diff --git a/third_party/xla/xla/service/gpu/fusions/BUILD b/third_party/xla/xla/service/gpu/fusions/BUILD
index bee7291264ce01..66adb638abd213 100644
--- a/third_party/xla/xla/service/gpu/fusions/BUILD
+++ b/third_party/xla/xla/service/gpu/fusions/BUILD
@@ -157,6 +157,7 @@ cc_library(
         "@llvm-project//llvm:Support",
         "@llvm-project//mlir:AsmParser",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
         "@local_tsl//tsl/platform:errors",
         "@local_tsl//tsl/platform:statusor",
     ],
diff --git a/third_party/xla/xla/service/gpu/fusions/custom.cc b/third_party/xla/xla/service/gpu/fusions/custom.cc
index 8f619ff54f29a3..75f3cf74f46ab3 100644
--- a/third_party/xla/xla/service/gpu/fusions/custom.cc
+++ b/third_party/xla/xla/service/gpu/fusions/custom.cc
@@ -33,6 +33,7 @@ limitations under the License.
 #include "mlir/AsmParser/AsmParser.h"  // from @llvm-project
 #include "mlir/IR/Attributes.h"  // from @llvm-project
 #include "mlir/IR/BuiltinAttributes.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "xla/ffi/ffi_api.h"
 #include "xla/hlo/ir/hlo_casting_utils.h"
 #include "xla/hlo/ir/hlo_instruction.h"
@@ -559,7 +560,7 @@ absl::StatusOr<FusionEmissionResult> EmitCustomCall(
       if (!backend_config_str.empty()) {
         mlir::Attribute attr = mlir::parseAttribute(
             backend_config_str, ir_emitter_context.mlir_context());
-        if (auto dict = attr.dyn_cast_or_null<mlir::DictionaryAttr>()) {
+        if (auto dict = mlir::dyn_cast_or_null<mlir::DictionaryAttr>(attr)) {
           TF_ASSIGN_OR_RETURN(attributes, BuildAttributesMap(dict));
           break;
         }
diff --git a/third_party/xla/xla/service/gpu/fusions/mlir/elemental_hlo_to_mlir.cc b/third_party/xla/xla/service/gpu/fusions/mlir/elemental_hlo_to_mlir.cc
index 35e6bf96def20e..35da6c2588adfa 100644
--- a/third_party/xla/xla/service/gpu/fusions/mlir/elemental_hlo_to_mlir.cc
+++ b/third_party/xla/xla/service/gpu/fusions/mlir/elemental_hlo_to_mlir.cc
@@ -550,7 +550,7 @@ absl::StatusOr<Value> EmitMulAdd(Value lhs, Value rhs, Value accumulator,
                                  mlir::Type result_element_type,
                                  mlir::Type accumulator_type,
                                  ImplicitLocOpBuilder& b) {
-  if (result_element_type.isa<FloatType>()) {
+  if (mlir::isa<FloatType>(result_element_type)) {
     if (result_element_type.isBF16()) {
       lhs = b.create<arith::ExtFOp>(b.getF32Type(), lhs);
       rhs = b.create<arith::ExtFOp>(b.getF32Type(), rhs);
@@ -657,7 +657,7 @@ absl::StatusOr<SmallVector<Value>> EmitParameter(const HloInstruction* instr,
                                                  ValueRange indices,
                                                  ImplicitLocOpBuilder& b) {
   Value value = this_fn.getArgument(instr->parameter_number());
-  if (value.getType().isa<mlir::TensorType>()) {
+  if (mlir::isa<mlir::TensorType>(value.getType())) {
     value = b.create<mlir::tensor::ExtractOp>(value, indices);
   } else {
     TF_RET_CHECK(indices.empty());
diff --git a/third_party/xla/xla/service/gpu/fusions/mlir/expand_float_ops.cc b/third_party/xla/xla/service/gpu/fusions/mlir/expand_float_ops.cc
index 630bb2270fee7a..52aa26edf1f57b 100644
--- a/third_party/xla/xla/service/gpu/fusions/mlir/expand_float_ops.cc
+++ b/third_party/xla/xla/service/gpu/fusions/mlir/expand_float_ops.cc
@@ -35,6 +35,7 @@ limitations under the License.
 #include "mlir/IR/Types.h"  // from @llvm-project
 #include "mlir/IR/Value.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"  // from @llvm-project
 #include "xla/mlir_hlo/mhlo/IR/hlo_ops.h"
@@ -199,7 +200,7 @@ int GetExponentBias(mlir::FloatType ty) {
 }
 
 Value IsInf(Value value, mlir::ImplicitLocOpBuilder& b) {
-  auto ty = value.getType().cast<mlir::FloatType>();
+  auto ty = mlir::cast<mlir::FloatType>(value.getType());
   if (mlir::LLVM::isCompatibleOuterType(ty)) {
     value = b.create<mlir::math::AbsFOp>(value);
     Value inf = b.create<ma::ConstantFloatOp>(
@@ -265,7 +266,7 @@ Value EmitFloatConversion(Value value, mlir::FloatType to_ty,
 
   // This is a port of ConvertImpl in
   // https://github.com/jax-ml/ml_dtypes/blob/main/ml_dtypes/include/float8.h
-  auto from_ty = value.getType().cast<mlir::FloatType>();
+  auto from_ty = mlir::cast<mlir::FloatType>(value.getType());
   if (to_ty == b.getFloat8E5M2Type() && from_ty == b.getF16Type()) {
     return EmitF16ToF8e5m2(value, b);
   }
@@ -510,8 +511,8 @@ struct RewriteTruncFPattern : public mlir::OpRewritePattern<ma::TruncFOp> {
   mlir::LogicalResult matchAndRewrite(
       ma::TruncFOp op, mlir::PatternRewriter& rewriter) const override {
     using FloatValue = mlir::TypedValue<mlir::FloatType>;
-    auto src = op.getOperand().cast<FloatValue>();
-    auto dst_ty = op.getType().cast<mlir::FloatType>();
+    auto src = mlir::cast<FloatValue>(op.getOperand());
+    auto dst_ty = mlir::cast<mlir::FloatType>(op.getType());
     if (dst_ty.getWidth() != 8) {
       return rewriter.notifyMatchFailure(op, "not an 8 bit truncf");
     }
@@ -528,8 +529,8 @@ struct RewriteExtFPattern : public mlir::OpRewritePattern<ma::ExtFOp> {
   mlir::LogicalResult matchAndRewrite(
       ma::ExtFOp op, mlir::PatternRewriter& rewriter) const override {
     using FloatValue = mlir::TypedValue<mlir::FloatType>;
-    auto src = op.getOperand().cast<FloatValue>();
-    auto dst_ty = op.getType().cast<mlir::FloatType>();
+    auto src = mlir::cast<FloatValue>(op.getOperand());
+    auto dst_ty = mlir::cast<mlir::FloatType>(op.getType());
     if (src.getType().getWidth() != 8) {
       return rewriter.notifyMatchFailure(op, "not an 8 bit extf");
     }
@@ -547,8 +548,8 @@ struct RewriteF8UneCst : public mlir::OpRewritePattern<ma::CmpFOp> {
   mlir::LogicalResult matchAndRewrite(
       ma::CmpFOp op, mlir::PatternRewriter& rewriter) const override {
     using FloatValue = mlir::TypedValue<mlir::FloatType>;
-    auto lhs = op.getLhs().cast<FloatValue>();
-    auto rhs = op.getRhs().cast<FloatValue>();
+    auto lhs = mlir::cast<FloatValue>(op.getLhs());
+    auto rhs = mlir::cast<FloatValue>(op.getRhs());
 
     llvm::APFloat rhs_cst(rhs.getType().getFloatSemantics());
     if (lhs.getType().getWidth() != 8 ||
@@ -580,7 +581,7 @@ struct RewriteAbsFPattern : public mlir::OpRewritePattern<mlir::math::AbsFOp> {
   mlir::LogicalResult matchAndRewrite(
       mlir::math::AbsFOp op, mlir::PatternRewriter& rewriter) const override {
     using FloatValue = mlir::TypedValue<mlir::FloatType>;
-    auto src = op.getOperand().cast<FloatValue>();
+    auto src = mlir::cast<FloatValue>(op.getOperand());
     // LowerGpuOpsToNVVMOps has a lowering for abs that doesn't work with bf16.
     // Once that's removed, remove the code for BF16 here.
     if (src.getType().getWidth() != 8 && !src.getType().isBF16()) {
diff --git a/third_party/xla/xla/service/gpu/fusions/mlir/lower_tensors.cc b/third_party/xla/xla/service/gpu/fusions/mlir/lower_tensors.cc
index 0f405d229ce4d9..e04ea59417db25 100644
--- a/third_party/xla/xla/service/gpu/fusions/mlir/lower_tensors.cc
+++ b/third_party/xla/xla/service/gpu/fusions/mlir/lower_tensors.cc
@@ -89,7 +89,9 @@ struct RewriteFunctionSignatures : mlir::OpRewritePattern<mlir::func::FuncOp> {
 
   LogicalResult matchAndRewrite(
       mlir::func::FuncOp op, mlir::PatternRewriter& rewriter) const override {
-    auto is_tensor = [](Type ty) { return ty.isa<mlir::RankedTensorType>(); };
+    auto is_tensor = [](Type ty) {
+      return mlir::isa<mlir::RankedTensorType>(ty);
+    };
     if (!llvm::any_of(op.getFunctionType().getInputs(), is_tensor)) {
       return rewriter.notifyMatchFailure(op,
                                          "the function has no input tensors");
@@ -138,7 +140,7 @@ Value GetLinearIndex(TypedValue<mlir::RankedTensorType> tensor,
   auto byte_shape = ShapeUtil::MakeShape(U8, tensor.getType().getShape());
   if (auto encoding = tensor.getType().getEncoding()) {
     *byte_shape.mutable_layout() = LayoutUtil::MakeLayout(llvm::to_vector(
-        encoding.cast<mlir::DenseElementsAttr>().getValues<int64_t>()));
+        mlir::cast<mlir::DenseElementsAttr>(encoding).getValues<int64_t>()));
   }
   auto linearize_map = mlir::getAffineConstantExpr(0, rewriter.getContext());
   for (auto [dim, stride] :
@@ -236,7 +238,7 @@ struct RewriteTensorInsert : mlir::OpRewritePattern<mlir::tensor::InsertOp> {
       mlir::PatternRewriter& rewriter) const override {
     Value dest = op.getDest();
     while (dest.getDefiningOp()) {
-      int result_number = dest.cast<mlir::OpResult>().getResultNumber();
+      int result_number = mlir::cast<mlir::OpResult>(dest).getResultNumber();
       if (auto insert = dest.getDefiningOp<mlir::tensor::InsertOp>()) {
         dest = insert.getDest();
       } else if (auto scf_if = dest.getDefiningOp<scf::IfOp>()) {
@@ -254,7 +256,7 @@ struct RewriteTensorInsert : mlir::OpRewritePattern<mlir::tensor::InsertOp> {
     }
 
     mlir::ImplicitLocOpBuilder b(op.getLoc(), rewriter);
-    auto tensor_dest = dest.cast<TypedValue<mlir::RankedTensorType>>();
+    auto tensor_dest = mlir::cast<TypedValue<mlir::RankedTensorType>>(dest);
     auto linear_index = GetLinearIndex(tensor_dest, op.getIndices(), rewriter);
     auto element_type = tensor_dest.getType().getElementType();
     Value is_low_nibble = nullptr;
@@ -306,13 +308,13 @@ struct RewriteCall : mlir::OpRewritePattern<mlir::func::CallOp> {
   LogicalResult matchAndRewrite(
       mlir::func::CallOp op, mlir::PatternRewriter& rewriter) const override {
     if (!llvm::any_of(op->getOperandTypes(), [](Type ty) {
-          return ty.isa<mlir::RankedTensorType>();
+          return mlir::isa<mlir::RankedTensorType>(ty);
         })) {
       return rewriter.notifyMatchFailure(op, "the call has no input tensors");
     }
 
     for (const auto&& [index, arg] : llvm::enumerate(op.getOperands())) {
-      if (arg.getType().isa<mlir::RankedTensorType>()) {
+      if (mlir::isa<mlir::RankedTensorType>(arg.getType())) {
         op.setOperand(
             index,
             rewriter
@@ -357,7 +359,7 @@ struct RewriteAllocateShared : mlir::OpRewritePattern<AllocateSharedOp> {
   LogicalResult matchAndRewrite(
       AllocateSharedOp op, mlir::PatternRewriter& rewriter) const override {
     auto module = op->getParentOfType<mlir::ModuleOp>();
-    auto shaped_ty = op.getResult().getType().cast<mlir::ShapedType>();
+    auto shaped_ty = mlir::cast<mlir::ShapedType>(op.getResult().getType());
     constexpr int kGPUSharedMemoryAddrSpace = 3;
     mlir::ImplicitLocOpBuilder b(op.getLoc(), rewriter);
 
diff --git a/third_party/xla/xla/service/gpu/fusions/mlir/lower_xla_gpu_to_scf.cc b/third_party/xla/xla/service/gpu/fusions/mlir/lower_xla_gpu_to_scf.cc
index 29e9887caa752f..5a5f6c0df3fbb7 100644
--- a/third_party/xla/xla/service/gpu/fusions/mlir/lower_xla_gpu_to_scf.cc
+++ b/third_party/xla/xla/service/gpu/fusions/mlir/lower_xla_gpu_to_scf.cc
@@ -33,6 +33,7 @@ limitations under the License.
 #include "mlir/IR/Value.h"  // from @llvm-project
 #include "mlir/IR/ValueRange.h"  // from @llvm-project
 #include "mlir/Pass/Pass.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"  // from @llvm-project
 #include "xla/service/gpu/fusions/mlir/ir/xla_gpu_ops.h"
@@ -95,7 +96,7 @@ struct RewriteShuffleReduce : mlir::OpRewritePattern<ShuffleReduceOp> {
   mlir::LogicalResult matchAndRewrite(
       ShuffleReduceOp op, mlir::PatternRewriter& rewriter) const override {
     int max_distance =
-        op->getAttr("max_distance").cast<mlir::IntegerAttr>().getInt();
+        mlir::cast<mlir::IntegerAttr>(op->getAttr("max_distance")).getInt();
     // TODO(jreiffers): Do this in a verifier.
     if (max_distance & (max_distance - 1) || max_distance >= WarpSize()) {
       return op->emitOpError("max_distance must be a power of 2 < WarpSize()");
@@ -139,7 +140,7 @@ struct RewriteShuffleReduce : mlir::OpRewritePattern<ShuffleReduceOp> {
       };
 
       auto shuffle = [&](mlir::Value value) -> mlir::Value {
-        if (value.getType().isa<mlir::ComplexType>()) {
+        if (mlir::isa<mlir::ComplexType>(value.getType())) {
           return b.create<mlir::complex::CreateOp>(
               value.getType(),
               shuffle_int_or_float(b.create<mlir::complex::ReOp>(value)),
diff --git a/third_party/xla/xla/service/gpu/fusions/mlir/merge_pointers_to_same_slice.cc b/third_party/xla/xla/service/gpu/fusions/mlir/merge_pointers_to_same_slice.cc
index ce9b73648ef554..81d8a796aba998 100644
--- a/third_party/xla/xla/service/gpu/fusions/mlir/merge_pointers_to_same_slice.cc
+++ b/third_party/xla/xla/service/gpu/fusions/mlir/merge_pointers_to_same_slice.cc
@@ -62,7 +62,7 @@ struct PackedArgs {
       }
 
       auto& target_index = slice_to_operand[static_cast<int>(
-          slice_index.cast<mlir::IntegerAttr>().getInt())];
+          mlir::cast<mlir::IntegerAttr>(slice_index).getInt())];
       if (target_index) {
         replacement_args[idx] = *target_index;
         args_to_erase[idx] = true;
diff --git a/third_party/xla/xla/service/gpu/fusions/mlir/simplify_affine.cc b/third_party/xla/xla/service/gpu/fusions/mlir/simplify_affine.cc
index e4020c97a57e7d..9573ca87970734 100644
--- a/third_party/xla/xla/service/gpu/fusions/mlir/simplify_affine.cc
+++ b/third_party/xla/xla/service/gpu/fusions/mlir/simplify_affine.cc
@@ -55,7 +55,7 @@ std::optional<Interval> GetRange(mlir::Value value) {
       return std::nullopt;
     }
     auto values = llvm::to_vector(
-        attr.cast<mlir::ArrayAttr>().getAsValueRange<mlir::IntegerAttr>());
+        mlir::cast<mlir::ArrayAttr>(attr).getAsValueRange<mlir::IntegerAttr>());
     return {{values[0].getSExtValue(), values[1].getSExtValue()}};
   };
 
@@ -63,7 +63,7 @@ std::optional<Interval> GetRange(mlir::Value value) {
     return attr_to_range(value.getDefiningOp()->getAttr("xla.range"));
   }
 
-  auto bbarg = value.dyn_cast<mlir::BlockArgument>();
+  auto bbarg = mlir::dyn_cast<mlir::BlockArgument>(value);
   if (!bbarg) {
     return std::nullopt;
   }
diff --git a/third_party/xla/xla/service/gpu/gpu_executable.cc b/third_party/xla/xla/service/gpu/gpu_executable.cc
index bc5c873b3688d0..dbc474937820bc 100644
--- a/third_party/xla/xla/service/gpu/gpu_executable.cc
+++ b/third_party/xla/xla/service/gpu/gpu_executable.cc
@@ -40,6 +40,7 @@ limitations under the License.
 #include "llvm/ADT/ArrayRef.h"
 #include "mlir/Dialect/Func/IR/FuncOps.h"  // from @llvm-project
 #include "mlir/IR/BuiltinAttributes.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "xla/executable_run_options.h"
 #include "xla/hlo/ir/hlo_input_output_alias_config.h"
 #include "xla/hlo/ir/hlo_instruction.h"
@@ -1082,7 +1083,7 @@ absl::Status GpuExecutable::SetUpMlirAllocation(
         }
       }
       allocations->at(i).set_entry_computation_parameter(
-          param_attr.cast<mlir::IntegerAttr>().getInt(), shape_index,
+          mlir::cast<mlir::IntegerAttr>(param_attr).getInt(), shape_index,
           static_cast<bool>(func.getArgAttr(i, "lmhlo.output_index")));
     }
     // TODO(timshen): this information is redundant. This is here only for
@@ -1096,7 +1097,7 @@ absl::Status GpuExecutable::SetUpMlirAllocation(
       // Reconstruct a shape index from output_index.
       ShapeIndex shape_index;
       for (const llvm::APInt& element :
-           output_index_attr.cast<mlir::DenseIntElementsAttr>()) {
+           mlir::cast<mlir::DenseIntElementsAttr>(output_index_attr)) {
         shape_index.push_back(element.getSExtValue());
       }
       auto& o = (*output_info)[shape_index];
@@ -1107,8 +1108,9 @@ absl::Status GpuExecutable::SetUpMlirAllocation(
         if (func.getArgAttr(i, "lmhlo.must_alias")) {
           kind = HloInputOutputAliasConfig::kMustAlias;
         }
-        o.alias_config.emplace(param_attr.cast<mlir::IntegerAttr>().getInt(),
-                               ShapeIndex{}, kind);
+        o.alias_config.emplace(
+            mlir::cast<mlir::IntegerAttr>(param_attr).getInt(), ShapeIndex{},
+            kind);
       }
       if (func.getArgument(i).use_empty()) {
         o.passthrough = true;
diff --git a/third_party/xla/xla/service/gpu/ir_emission_utils.cc b/third_party/xla/xla/service/gpu/ir_emission_utils.cc
index d48acc877ffb5c..01cdbd70aae325 100644
--- a/third_party/xla/xla/service/gpu/ir_emission_utils.cc
+++ b/third_party/xla/xla/service/gpu/ir_emission_utils.cc
@@ -99,7 +99,7 @@ Shape GetShapeFromTensorType(mlir::Value value) {
 
   mlir::Operation* op = value.getDefiningOp();
   CHECK(op);
-  CHECK(value.getType().isa<mlir::TensorType>());
+  CHECK(mlir::isa<mlir::TensorType>(value.getType()));
   Shape shape;
   if (auto attr = op->getAttrOfType<mlir::StringAttr>(kDefaultLayoutAttrName)) {
     shape = *xla::ParseShape(
@@ -346,7 +346,7 @@ static int64_t GetMemRefSizeInBytes(mlir::MemRefType type) {
   if (type.getElementType().isInteger(/*width=*/1)) {
     return type.getNumElements();
   } else if (auto complexType =
-                 type.getElementType().dyn_cast<mlir::ComplexType>()) {
+                 mlir::dyn_cast<mlir::ComplexType>(type.getElementType())) {
     auto elementType = complexType.getElementType();
     return elementType.getIntOrFloatBitWidth() * type.getNumElements() * 2 /
            CHAR_BIT;
@@ -537,11 +537,11 @@ absl::StatusOr<bool> CanEmitFusedDynamicUpdateSliceInPlaceForGpu(
 
 Shape GetShape(mlir::Value value) {
   Shape shape;
-  if (value.getType().isa<mlir::MemRefType>()) {
+  if (mlir::isa<mlir::MemRefType>(value.getType())) {
     shape = TypeToShape(value.getType());
-  } else if (value.getType().isa<mlir::TensorType>()) {
+  } else if (mlir::isa<mlir::TensorType>(value.getType())) {
     shape = GetShapeFromTensorType(value);
-  } else if (value.getType().isa<mlir::TupleType>()) {
+  } else if (mlir::isa<mlir::TupleType>(value.getType())) {
     shape = TypeToShape(value.getType());
   } else {
     LOG(FATAL) << "Unexpected value type to get shape for";
diff --git a/third_party/xla/xla/service/gpu/ir_emitter_triton.cc b/third_party/xla/xla/service/gpu/ir_emitter_triton.cc
index b41505a8d4d7c6..435db81a7d0f02 100644
--- a/third_party/xla/xla/service/gpu/ir_emitter_triton.cc
+++ b/third_party/xla/xla/service/gpu/ir_emitter_triton.cc
@@ -207,10 +207,10 @@ T ScalarConstantValue(const HloInstruction& instr, PrimitiveType dst_type) {
 // Create a scalar constant.
 template <typename T>
 ma::ConstantOp CreateConst(ImplicitLocOpBuilder b, Type type, T value) {
-  if (type.isa<mlir::IntegerType>()) {
+  if (mlir::isa<mlir::IntegerType>(type)) {
     return b.create<ma::ConstantOp>(b.getIntegerAttr(type, value));
   }
-  if (type.isa<mlir::FloatType>()) {
+  if (mlir::isa<mlir::FloatType>(type)) {
     return b.create<ma::ConstantOp>(
         b.getFloatAttr(type, static_cast<double>(value)));
   }
@@ -222,11 +222,11 @@ template <typename T>
 ma::ConstantOp CreateConst(ImplicitLocOpBuilder& b, Type type, T value,
                            ArrayRef<int64_t> shape) {
   auto tensor_type = mlir::RankedTensorType::get(shape, type);
-  if (auto int_type = type.dyn_cast<mlir::IntegerType>()) {
+  if (auto int_type = mlir::dyn_cast<mlir::IntegerType>(type)) {
     return b.create<ma::ConstantOp>(mlir::DenseElementsAttr::get(
         tensor_type, mlir::APInt(int_type.getIntOrFloatBitWidth(), value)));
   }
-  if (auto float_type = type.dyn_cast<mlir::FloatType>()) {
+  if (auto float_type = mlir::dyn_cast<mlir::FloatType>(type)) {
     return b.create<ma::ConstantOp>(mlir::DenseElementsAttr::get(
         tensor_type, b.getFloatAttr(type, static_cast<double>(value))));
   }
@@ -234,7 +234,7 @@ ma::ConstantOp CreateConst(ImplicitLocOpBuilder& b, Type type, T value,
 }
 
 Value ZerosLike(ImplicitLocOpBuilder& b, Value x) {
-  if (auto src_shaped_ty = x.getType().dyn_cast<ShapedType>()) {
+  if (auto src_shaped_ty = mlir::dyn_cast<ShapedType>(x.getType())) {
     Type src_ty = src_shaped_ty.getElementType();
     return CreateConst(b, src_ty, 0, src_shaped_ty.getShape());
   }
@@ -242,7 +242,7 @@ Value ZerosLike(ImplicitLocOpBuilder& b, Value x) {
 }
 
 Value OnesLike(ImplicitLocOpBuilder& b, Value x) {
-  if (auto src_shaped_ty = x.getType().dyn_cast<ShapedType>()) {
+  if (auto src_shaped_ty = mlir::dyn_cast<ShapedType>(x.getType())) {
     Type src_ty = src_shaped_ty.getElementType();
     return CreateConst(b, src_ty, 1, src_shaped_ty.getShape());
   }
@@ -255,7 +255,7 @@ Value Cast(ImplicitLocOpBuilder& b, Value value, Type dst_element_ty) {
   Type src_element_ty = src_ty;
   Type fp32_ty = b.getF32Type();
   Type dst_ty = dst_element_ty;
-  if (auto src_shaped_ty = src_ty.dyn_cast<ShapedType>()) {
+  if (auto src_shaped_ty = mlir::dyn_cast<ShapedType>(src_ty)) {
     src_element_ty = src_shaped_ty.getElementType();
     dst_ty = src_shaped_ty.clone(src_shaped_ty.getShape(), dst_element_ty);
     fp32_ty = src_shaped_ty.clone(src_shaped_ty.getShape(), b.getF32Type());
@@ -276,8 +276,8 @@ Value Cast(ImplicitLocOpBuilder& b, Value value, Type dst_element_ty) {
   }
 
   // float => float
-  auto src_fp_element_ty = src_element_ty.dyn_cast<mlir::FloatType>();
-  auto dst_fp_element_ty = dst_element_ty.dyn_cast<mlir::FloatType>();
+  auto src_fp_element_ty = mlir::dyn_cast<mlir::FloatType>(src_element_ty);
+  auto dst_fp_element_ty = mlir::dyn_cast<mlir::FloatType>(dst_element_ty);
   if (src_fp_element_ty && dst_fp_element_ty) {
     if (src_fp_element_ty.getFPMantissaWidth() >
         dst_fp_element_ty.getFPMantissaWidth()) {
@@ -287,8 +287,8 @@ Value Cast(ImplicitLocOpBuilder& b, Value value, Type dst_element_ty) {
     }
   }
   // int => int
-  if (src_element_ty.isa<mlir::IntegerType>() &&
-      dst_element_ty.isa<mlir::IntegerType>()) {
+  if (mlir::isa<mlir::IntegerType>(src_element_ty) &&
+      mlir::isa<mlir::IntegerType>(dst_element_ty)) {
     if (src_element_ty.getIntOrFloatBitWidth() <
         dst_element_ty.getIntOrFloatBitWidth()) {
       if (src_element_ty.isInteger(1)) {
@@ -299,7 +299,7 @@ Value Cast(ImplicitLocOpBuilder& b, Value value, Type dst_element_ty) {
     return b.create<ma::TruncIOp>(dst_ty, value);
   }
   // int => float
-  if (src_element_ty.isa<mlir::IntegerType>() && dst_fp_element_ty) {
+  if (mlir::isa<mlir::IntegerType>(src_element_ty) && dst_fp_element_ty) {
     // TODO(b/266862493): Support unsigned integer types.
     if (src_element_ty.isInteger(1)) {
       return b.create<ma::UIToFPOp>(dst_ty, value);
@@ -307,7 +307,7 @@ Value Cast(ImplicitLocOpBuilder& b, Value value, Type dst_element_ty) {
     return b.create<ma::SIToFPOp>(dst_ty, value);
   }
   // float => int
-  if (src_fp_element_ty && dst_element_ty.isa<mlir::IntegerType>()) {
+  if (src_fp_element_ty && mlir::isa<mlir::IntegerType>(dst_element_ty)) {
     // TODO(b/266862493): Support unsigned integer types.
     if (dst_element_ty.isInteger(1)) {
       return b.create<ma::CmpFOp>(ma::CmpFPredicate::UNE, value,
@@ -322,7 +322,7 @@ Value Cast(ImplicitLocOpBuilder& b, Value value, Type dst_element_ty) {
 }
 
 Value Subtract(ImplicitLocOpBuilder& b, ValueRange values) {
-  if (mlir::getElementTypeOrSelf(values[0]).isa<mlir::IntegerType>()) {
+  if (mlir::isa<mlir::IntegerType>(mlir::getElementTypeOrSelf(values[0]))) {
     return b.create<ma::SubIOp>(values[0], values[1]);
   } else {
     return b.create<ma::SubFOp>(values[0], values[1]);
@@ -332,7 +332,7 @@ Value Subtract(ImplicitLocOpBuilder& b, ValueRange values) {
 Value Compare(ImplicitLocOpBuilder& b, ValueRange values,
               mlir::mhlo::ComparisonDirection direction) {
   const Type type = mlir::getElementTypeOrSelf(values[0]);
-  if (type.isa<mlir::IntegerType>()) {
+  if (mlir::isa<mlir::IntegerType>(type)) {
     return b.create<ma::CmpIOp>(
         mlir::mhlo::impl::getCmpPredicate<ma::CmpIPredicate>(
             direction,
@@ -349,7 +349,7 @@ Value Compare(ImplicitLocOpBuilder& b, ValueRange values,
 
 Value Maximum(ImplicitLocOpBuilder& b, const se::DeviceDescription& device_info,
               ValueRange values) {
-  if (mlir::getElementTypeOrSelf(values[0]).isa<mlir::FloatType>()) {
+  if (mlir::isa<mlir::FloatType>(mlir::getElementTypeOrSelf(values[0]))) {
     return b.create<ma::MaximumFOp>(values);
   }
   // logic: isNaN(lhs) || (!isNan(rhs) && lhs >= rhs) ? lhs : rhs
@@ -370,7 +370,7 @@ Value Maximum(ImplicitLocOpBuilder& b, const se::DeviceDescription& device_info,
 
 Value Minimum(ImplicitLocOpBuilder& b, const se::DeviceDescription& device_info,
               ValueRange values) {
-  if (mlir::getElementTypeOrSelf(values[0]).isa<mlir::FloatType>()) {
+  if (mlir::isa<mlir::FloatType>(mlir::getElementTypeOrSelf(values[0]))) {
     return b.create<ma::MinimumFOp>(values);
   }
   // logic: isNaN(lhs) || (!isNan(rhs) && lhs <= rhs) ? lhs : rhs
@@ -435,7 +435,7 @@ absl::StatusOr<Value> EmitElementwise(ImplicitLocOpBuilder& b,
     }
   }
   const bool is_integer =
-      mlir::getElementTypeOrSelf(inputs[0]).isa<mlir::IntegerType>();
+      mlir::isa<mlir::IntegerType>(mlir::getElementTypeOrSelf(inputs[0]));
 
   switch (hlo.opcode()) {
     case HloOpcode::kCopy:
@@ -561,7 +561,7 @@ absl::StatusOr<Value> EmitBroadcast(
       out_shape.push_back(dim.block_size);
     }
   }
-  auto tensor_input = input.dyn_cast<TensorValue>();
+  auto tensor_input = mlir::dyn_cast<TensorValue>(input);
   if (!tensor_input) {
     // Input is scalar.
     return Splat(b, input, out_shape);
@@ -584,7 +584,7 @@ absl::StatusOr<Value> EmitBroadcast(
       ++dim_idx;
     }
   }
-  return Broadcast(b, expanded_input.cast<TensorValue>(), out_shape);
+  return Broadcast(b, mlir::cast<TensorValue>(expanded_input), out_shape);
 }
 
 absl::StatusOr<Value> EmitScope(
@@ -601,7 +601,7 @@ absl::StatusOr<Value> EmitReduce(ImplicitLocOpBuilder& b,
                                  const HloInstruction& hlo_reduce,
                                  Value input) {
   llvm::ArrayRef<int64_t> input_shape =
-      input.cast<TensorValue>().getType().getShape();
+      mlir::cast<TensorValue>(input).getType().getShape();
 
   // At the moment, we should only emit a full reduction over the last axis of
   // a single input.
@@ -692,7 +692,7 @@ absl::StatusOr<Value> EmitReduce(ImplicitLocOpBuilder& b,
   // We want to return a tensor of float32, but the ReturnReduceOp produces an
   // f32 constant when reducing a single dim. To convert to a tensor we splat
   // the result.
-  if (!reduction.getResult().front().dyn_cast<TensorValue>()) {
+  if (!mlir::dyn_cast<TensorValue>(reduction.getResult().front())) {
     result = Splat(b, result, {});
   }
 
@@ -792,7 +792,7 @@ Value EmitTiledBroadcast(
     }
   }
 
-  return Broadcast(b, expanded_input.cast<TensorValue>(),
+  return Broadcast(b, mlir::cast<TensorValue>(expanded_input),
                    padded_output_tile_shape);
 }
 
@@ -958,7 +958,7 @@ void StripParameterAddressSpaces(mlir::RewriterBase& rewriter,
   ml::LLVMFunctionType func_ty = func.getFunctionType();
   SmallVector<Type> generic_func_params(
       llvm::map_range(func_ty.getParams(), [](Type type) -> Type {
-        auto ptr_ty = type.dyn_cast<ml::LLVMPointerType>();
+        auto ptr_ty = mlir::dyn_cast<ml::LLVMPointerType>(type);
         if (!ptr_ty) return type;
         if (ptr_ty.getAddressSpace() != mn::kGlobalMemorySpace) return type;
         return ml::LLVMPointerType::get(ptr_ty.getContext());
@@ -968,8 +968,9 @@ void StripParameterAddressSpaces(mlir::RewriterBase& rewriter,
 
   // Create a function with the new signature.
   SmallVector<mlir::DictionaryAttr> arg_attrs(llvm::map_range(
-      func.getArgAttrsAttr().getValue(),
-      [](mlir::Attribute attr) { return attr.cast<mlir::DictionaryAttr>(); }));
+      func.getArgAttrsAttr().getValue(), [](mlir::Attribute attr) {
+        return mlir::cast<mlir::DictionaryAttr>(attr);
+      }));
   auto generic_func = rewriter.create<ml::LLVMFuncOp>(
       func.getLoc(), func.getSymName(), generic_func_ty, func.getLinkage(),
       func.getDsoLocal(), func.getCConv(), /*comdat=*/nullptr,
@@ -1317,7 +1318,8 @@ class MatMulEmitterHelper {
     CHECK(accum_type.ok()) << "Unexpected algorithm: "
                            << PrecisionConfig::Algorithm_Name(algorithm);
     Type mlir_accum_type = TritonType(b_, accum_type.value());
-    if (auto float_accum_type = mlir_accum_type.dyn_cast<mlir::FloatType>()) {
+    if (auto float_accum_type =
+            mlir::dyn_cast<mlir::FloatType>(mlir_accum_type)) {
       return float_accum_type;
     }
     LOG(FATAL) << "Only floating point accumulator types are supported for "
@@ -1592,11 +1594,10 @@ class MatMulEmitterHelper {
       // Load of a scalar.
       return base;
     }
-    auto tensor_ptr =
+    auto tensor_ptr = mlir::cast<Value>(
         b_.create<mt::MakeTensorPtrOp>(base, bounds, strides, tensor_offsets,
                                        block_dims, dim_order)
-            .getResult()
-            .cast<Value>();
+            .getResult());
     tensor_ptr = b_.create<mt::AdvanceOp>(tensor_ptr.getType(), tensor_ptr,
                                           block_offsets);
     return tensor_ptr;
@@ -1688,7 +1689,7 @@ ConstHloInstructionSet ScopeInputs(const TritonFusionAnalysis& analysis,
 // zero.
 // It is used for Emit6xBfloat16MatMul.
 Value TruncateToBF16TowardsZero(ImplicitLocOpBuilder& b, Value input) {
-  ShapedType input_type = input.getType().dyn_cast<ShapedType>();
+  ShapedType input_type = mlir::dyn_cast<ShapedType>(input.getType());
   Type input_type_as_i32 = input_type.clone(b.getI32Type());
   Value input_as_i32 = b.create<mt::BitcastOp>(input_type_as_i32, input);
   Value mask = CreateConst<uint32_t>(b, b.getI32Type(), 0xFFFF0000u,
@@ -1724,7 +1725,7 @@ Value RoundToBF16(ImplicitLocOpBuilder& b, Value input) {
 Value CheckFiniteF32(ImplicitLocOpBuilder& b, Value input) {
   Value positive_inf = CreateConst<float>(
       b, b.getF32Type(), std::numeric_limits<float>::infinity(),
-      input.getType().cast<ShapedType>().getShape());
+      mlir::cast<ShapedType>(input.getType()).getShape());
   Value abs_input = b.create<mm::AbsFOp>(input);
   return b.create<ma::CmpFOp>(ma::CmpFPredicate::OGT, positive_inf, abs_input);
 }
@@ -1734,9 +1735,9 @@ Value CheckFiniteF32(ImplicitLocOpBuilder& b, Value input) {
 absl::StatusOr<Value> Emit6xBfloat16MatMul(ImplicitLocOpBuilder& b, Value lhs,
                                            Value rhs, Value acc) {
   Type f32 = b.getF32Type();
-  TF_RET_CHECK(lhs.getType().cast<ShapedType>().getElementType() == f32);
-  TF_RET_CHECK(rhs.getType().cast<ShapedType>().getElementType() == f32);
-  TF_RET_CHECK(acc.getType().cast<ShapedType>().getElementType() == f32);
+  TF_RET_CHECK(mlir::cast<ShapedType>(lhs.getType()).getElementType() == f32);
+  TF_RET_CHECK(mlir::cast<ShapedType>(rhs.getType()).getElementType() == f32);
+  TF_RET_CHECK(mlir::cast<ShapedType>(acc.getType()).getElementType() == f32);
 
   Value lhs_high = RoundToBF16(b, TruncateToBF16TowardsZero(b, lhs));
   Value lhs_middle =
@@ -1782,9 +1783,9 @@ absl::StatusOr<Value> Emit6xBfloat16MatMul(ImplicitLocOpBuilder& b, Value lhs,
 absl::StatusOr<Value> Emit3xBfloat16MatMul(ImplicitLocOpBuilder& b, Value lhs,
                                            Value rhs, Value acc) {
   Type f32 = b.getF32Type();
-  TF_RET_CHECK(lhs.getType().cast<ShapedType>().getElementType() == f32);
-  TF_RET_CHECK(rhs.getType().cast<ShapedType>().getElementType() == f32);
-  TF_RET_CHECK(acc.getType().cast<ShapedType>().getElementType() == f32);
+  TF_RET_CHECK(mlir::cast<ShapedType>(lhs.getType()).getElementType() == f32);
+  TF_RET_CHECK(mlir::cast<ShapedType>(rhs.getType()).getElementType() == f32);
+  TF_RET_CHECK(mlir::cast<ShapedType>(acc.getType()).getElementType() == f32);
 
   Value lhs_high = RoundToBF16(b, TruncateToBF16TowardsZero(b, lhs));
   Value lhs_low = RoundToBF16(b, SoftMiddleEight(b, lhs));
@@ -1839,8 +1840,10 @@ bool Is6xBfloat16MatMul(const HloDotInstruction* dot_instr,
     return hlo_module->config()
                .debug_options()
                .xla_gpu_enable_bf16_6way_gemm() &&
-           dot_input_lhs.getType().cast<ShapedType>().getElementType() == f32 &&
-           dot_input_rhs.getType().cast<ShapedType>().getElementType() == f32;
+           mlir::cast<ShapedType>(dot_input_lhs.getType()).getElementType() ==
+               f32 &&
+           mlir::cast<ShapedType>(dot_input_rhs.getType()).getElementType() ==
+               f32;
   }
 
   return algorithm == PrecisionConfig::ALG_DOT_BF16_BF16_F32_X6;
@@ -1859,8 +1862,10 @@ bool Is3xBfloat16MatMul(const HloDotInstruction* dot_instr,
     return hlo_module->config()
                .debug_options()
                .xla_gpu_enable_bf16_3way_gemm() &&
-           dot_input_lhs.getType().cast<ShapedType>().getElementType() == f32 &&
-           dot_input_rhs.getType().cast<ShapedType>().getElementType() == f32;
+           mlir::cast<ShapedType>(dot_input_lhs.getType()).getElementType() ==
+               f32 &&
+           mlir::cast<ShapedType>(dot_input_rhs.getType()).getElementType() ==
+               f32;
   }
 
   return algorithm == PrecisionConfig::ALG_DOT_BF16_BF16_F32_X3;
@@ -2095,10 +2100,9 @@ absl::Status EmitMatMul(mlir::OpBuilder builder,
                   block_k));
       }
       auto apply_mask = [&](int64_t dim, Value input) {
-        auto ty = input.getType().cast<mlir::RankedTensorType>();
-        TensorValue range_expanded = b.create<mt::ExpandDimsOp>(range_k, dim)
-                                         .getResult()
-                                         .cast<TensorValue>();
+        auto ty = mlir::cast<mlir::RankedTensorType>(input.getType());
+        TensorValue range_expanded = mlir::cast<TensorValue>(
+            b.create<mt::ExpandDimsOp>(range_k, dim).getResult());
         Value mask = b.create<mt::BroadcastOp>(
             ty.clone(b.getI1Type()),
             b.create<ma::CmpIOp>(ma::CmpIPredicate::slt, range_expanded,
diff --git a/third_party/xla/xla/service/gpu/ir_emitter_unnested.cc b/third_party/xla/xla/service/gpu/ir_emitter_unnested.cc
index 0b050e41081e73..4588038782f623 100644
--- a/third_party/xla/xla/service/gpu/ir_emitter_unnested.cc
+++ b/third_party/xla/xla/service/gpu/ir_emitter_unnested.cc
@@ -1430,7 +1430,7 @@ absl::Status IrEmitterUnnested::EmitCustomCallThunk(
       if (!backend_config_str.empty()) {
         mlir::Attribute attr = mlir::parseAttribute(
             backend_config_str, ir_emitter_context_->mlir_context());
-        if (auto dict = attr.dyn_cast_or_null<mlir::DictionaryAttr>()) {
+        if (auto dict = mlir::dyn_cast_or_null<mlir::DictionaryAttr>(attr)) {
           TF_ASSIGN_OR_RETURN(attributes, BuildAttributesMap(dict));
           break;
         }
diff --git a/third_party/xla/xla/service/gpu/model/BUILD b/third_party/xla/xla/service/gpu/model/BUILD
index 8320606cb9d0ef..b07f2883b7e10f 100644
--- a/third_party/xla/xla/service/gpu/model/BUILD
+++ b/third_party/xla/xla/service/gpu/model/BUILD
@@ -474,6 +474,7 @@ cc_library(
         "@llvm-project//llvm:Support",
         "@llvm-project//mlir:AsmParser",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
     ],
 )
 
diff --git a/third_party/xla/xla/service/gpu/model/indexing_test_utils.cc b/third_party/xla/xla/service/gpu/model/indexing_test_utils.cc
index e7b7e39ac71325..72becac80c075e 100644
--- a/third_party/xla/xla/service/gpu/model/indexing_test_utils.cc
+++ b/third_party/xla/xla/service/gpu/model/indexing_test_utils.cc
@@ -29,6 +29,7 @@ limitations under the License.
 #include "mlir/IR/AffineExpr.h"  // from @llvm-project
 #include "mlir/IR/BuiltinAttributes.h"  // from @llvm-project
 #include "mlir/IR/MLIRContext.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "xla/hlo/ir/hlo_instruction.h"
 #include "xla/hlo/ir/hlo_opcode.h"
 #include "xla/service/gpu/model/indexing_analysis.h"
@@ -120,8 +121,8 @@ AffineMap ParseAffineMap(absl::string_view serialized_affine_map,
                          MLIRContext* context) {
   std::string full_affine_map_string =
       absl::StrCat("affine_map<", serialized_affine_map, ">");
-  return mlir::parseAttribute(full_affine_map_string, context)
-      .cast<mlir::AffineMapAttr>()
+  return mlir::cast<mlir::AffineMapAttr>(
+             mlir::parseAttribute(full_affine_map_string, context))
       .getValue();
 }
 
@@ -133,8 +134,8 @@ AffineExpr ParseAffineExpr(absl::string_view serialized_affine_expr,
       "affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8, d9)"
       "[s0, s1, s2, s3, s4, s5, s6, s7, s8, s9] -> (",
       serialized_affine_expr, ")>");
-  return mlir::parseAttribute(full_affine_map_string, context)
-      .cast<mlir::AffineMapAttr>()
+  return mlir::cast<mlir::AffineMapAttr>(
+             mlir::parseAttribute(full_affine_map_string, context))
       .getValue()
       .getResult(0);
 }
diff --git a/third_party/xla/xla/translate/hlo_to_mhlo/custom_call_importer.cc b/third_party/xla/xla/translate/hlo_to_mhlo/custom_call_importer.cc
index 4b2217397eb98f..0fd690ac862107 100644
--- a/third_party/xla/xla/translate/hlo_to_mhlo/custom_call_importer.cc
+++ b/third_party/xla/xla/translate/hlo_to_mhlo/custom_call_importer.cc
@@ -44,15 +44,15 @@ absl::StatusOr<mlir::Operation*> ImportDynamicBroadcastInDimOp(
     return Internal("backend_config attribute cannot be empty.");
   }
 
-  auto attr = mlir::parseAttribute(backend_config, builder->getContext())
-                  .dyn_cast<mlir::DictionaryAttr>();
+  auto attr = mlir::dyn_cast<mlir::DictionaryAttr>(
+      mlir::parseAttribute(backend_config, builder->getContext()));
   if (!attr) {
     return Internal(
         "Couldn't parse backend config into a dictionary attribute");
   }
 
   auto broadcast_dimensions_attr =
-      attr.get("broadcast_dimensions").dyn_cast_or_null<mlir::ArrayAttr>();
+      mlir::dyn_cast_or_null<mlir::ArrayAttr>(attr.get("broadcast_dimensions"));
   if (!broadcast_dimensions_attr) {
     return Internal("broadcast_dimensions attribute is required.");
   }
@@ -61,7 +61,7 @@ absl::StatusOr<mlir::Operation*> ImportDynamicBroadcastInDimOp(
   for (auto [i, broadcast_dimension] :
        llvm::enumerate(broadcast_dimensions_attr)) {
     broadcast_dimensions[i] =
-        broadcast_dimension.cast<mlir::IntegerAttr>().getInt();
+        mlir::cast<mlir::IntegerAttr>(broadcast_dimension).getInt();
   }
 
   return builder
@@ -103,15 +103,17 @@ mlir::Type getQuantizedType(mlir::DictionaryAttr& backend_config) {
 
   if (const mlir::Attribute scales_attr = backend_config.get("scale");
       scales_attr) {
-    for (auto scale_attr : scales_attr.cast<mlir::ArrayAttr>()) {
-      scales.push_back(scale_attr.cast<mlir::FloatAttr>().getValueAsDouble());
+    for (auto scale_attr : mlir::cast<mlir::ArrayAttr>(scales_attr)) {
+      scales.push_back(
+          mlir::cast<mlir::FloatAttr>(scale_attr).getValueAsDouble());
     }
   }
 
   auto zero_points_attr = backend_config.get("zero_point");
   if (zero_points_attr) {
-    for (auto zero_point_attr : zero_points_attr.cast<mlir::ArrayAttr>()) {
-      zero_points.push_back(zero_point_attr.cast<mlir::IntegerAttr>().getInt());
+    for (auto zero_point_attr : mlir::cast<mlir::ArrayAttr>(zero_points_attr)) {
+      zero_points.push_back(
+          mlir::cast<mlir::IntegerAttr>(zero_point_attr).getInt());
     }
   }
 
@@ -119,30 +121,30 @@ mlir::Type getQuantizedType(mlir::DictionaryAttr& backend_config) {
       backend_config.get("quantization_dimension");
   if (quantization_dimension_attr) {
     quantization_dimension =
-        quantization_dimension_attr.cast<mlir::IntegerAttr>().getInt();
+        mlir::cast<mlir::IntegerAttr>(quantization_dimension_attr).getInt();
   }
 
   auto storage_max_attr = backend_config.get("storage_max");
   if (storage_max_attr) {
-    storage_max = storage_max_attr.cast<mlir::IntegerAttr>().getInt();
+    storage_max = mlir::cast<mlir::IntegerAttr>(storage_max_attr).getInt();
   }
 
   auto storage_min_attr = backend_config.get("storage_min");
   if (storage_min_attr) {
-    storage_min = storage_min_attr.cast<mlir::IntegerAttr>().getInt();
+    storage_min = mlir::cast<mlir::IntegerAttr>(storage_min_attr).getInt();
   }
 
   auto storage_type_attr = backend_config.get("storage_type");
   if (storage_type_attr) {
-    storage_type = storage_type_attr.cast<mlir::TypeAttr>().getValue();
+    storage_type = mlir::cast<mlir::TypeAttr>(storage_type_attr).getValue();
   }
 
   auto expressed_type_attr = backend_config.get("expressed_type");
   if (expressed_type_attr) {
-    expressed_type = expressed_type_attr.cast<mlir::TypeAttr>().getValue();
+    expressed_type = mlir::cast<mlir::TypeAttr>(expressed_type_attr).getValue();
   }
 
-  auto is_signed = storage_type.cast<mlir::IntegerType>().isSignless();
+  auto is_signed = mlir::cast<mlir::IntegerType>(storage_type).isSignless();
 
   if (quantization_dimension != -1) {
     return mlir::quant::UniformQuantizedPerAxisType::get(
@@ -175,9 +177,8 @@ absl::StatusOr<mlir::Operation*> ImportCustomCallAsOp(
                                     operands, builder);
   }
 
-  auto backend_config =
-      mlir::parseAttribute(backend_config_str, builder->getContext())
-          .dyn_cast<mlir::DictionaryAttr>();
+  auto backend_config = mlir::dyn_cast<mlir::DictionaryAttr>(
+      mlir::parseAttribute(backend_config_str, builder->getContext()));
   if (!backend_config) {
     return Internal(
         "Couldn't parse backend config into a dictionary attribute");
@@ -188,7 +189,7 @@ absl::StatusOr<mlir::Operation*> ImportCustomCallAsOp(
         ->create<mlir::mhlo::UniformQuantizeOp>(
             loc,
             mlir::RankedTensorType::get(
-                result_type.cast<mlir::RankedTensorType>().getShape(),
+                mlir::cast<mlir::RankedTensorType>(result_type).getShape(),
                 getQuantizedType(backend_config)),
             operands)
         .getOperation();
diff --git a/third_party/xla/xla/translate/mhlo_to_hlo/BUILD b/third_party/xla/xla/translate/mhlo_to_hlo/BUILD
index d9cd70f4658ddc..77654530a5c80b 100644
--- a/third_party/xla/xla/translate/mhlo_to_hlo/BUILD
+++ b/third_party/xla/xla/translate/mhlo_to_hlo/BUILD
@@ -29,6 +29,7 @@ cc_library(
         "//xla/service:hlo_proto_cc",
         "//xla/stream_executor:dnn",
         "@llvm-project//mlir:IR",
+        "@llvm-project//mlir:Support",
     ],
 )
 
diff --git a/third_party/xla/xla/translate/mhlo_to_hlo/attribute_exporter.cc b/third_party/xla/xla/translate/mhlo_to_hlo/attribute_exporter.cc
index 21dfb491ec6e9b..da4abeb54be53a 100644
--- a/third_party/xla/xla/translate/mhlo_to_hlo/attribute_exporter.cc
+++ b/third_party/xla/xla/translate/mhlo_to_hlo/attribute_exporter.cc
@@ -17,6 +17,7 @@ limitations under the License.
 
 #include <utility>
 
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "xla/mlir_hlo/mhlo/IR/hlo_ops.h"
 #include "xla/service/hlo_parser.h"
 #include "xla/shape_util.h"
@@ -61,7 +62,7 @@ ConvolutionDimensionNumbers ConvertConvDimensionNumbers(
 absl::StatusOr<std::vector<ReplicaGroup>> ConvertReplicaGroups(
     mlir::DenseIntElementsAttr input) {
   mlir::RankedTensorType type =
-      input.getType().dyn_cast<mlir::RankedTensorType>();
+      mlir::dyn_cast<mlir::RankedTensorType>(input.getType());
   if (!type || type.getRank() != 2 ||
       !type.getElementType().isInteger(/*width=*/64)) {
     return Internal("Execpted replica group to be a rank 2 tensor of i64");
@@ -90,7 +91,7 @@ absl::StatusOr<std::vector<std::pair<int64_t, int64_t>>> ConvertNx2Attribute(
   if (!optional_attr.has_value())
     return std::vector<std::pair<int64_t, int64_t>>{};
   mlir::DenseIntElementsAttr attr = *optional_attr;
-  auto type = attr.getType().dyn_cast<mlir::RankedTensorType>();
+  auto type = mlir::dyn_cast<mlir::RankedTensorType>(attr.getType());
   if (!type || type.getRank() != 2 || type.getShape()[1] != 2)
     return Internal("expected Nx2 attribute to be a tensor of shape Nx2");
   auto it = attr.getValues<int64_t>().begin();
@@ -184,7 +185,7 @@ absl::StatusOr<
 ConvertOutputOperandAliasing(mlir::ArrayAttr aliasArrayAttr) {
   std::vector<std::pair<ShapeIndex, std::pair<int64_t, ShapeIndex>>> aliasInfo;
   for (auto attr : aliasArrayAttr.getValue()) {
-    auto alias = attr.cast<mlir::mhlo::OutputOperandAliasAttr>();
+    auto alias = mlir::cast<mlir::mhlo::OutputOperandAliasAttr>(attr);
     ShapeIndex outputShapeIndex(alias.getOutputTupleIndices());
     ShapeIndex operandShapeIndex(alias.getOperandTupleIndices());
     aliasInfo.push_back(std::make_pair(
@@ -255,7 +256,7 @@ absl::StatusOr<std::vector<int64_t>> ConvertMlirArrayAttrToInt64Array(
   int rank = array.size();
   std::vector<int64_t> converted_array(rank);
   for (int i = 0; i < rank; i++) {
-    mlir::IntegerAttr attr = array[i].dyn_cast<mlir::IntegerAttr>();
+    mlir::IntegerAttr attr = mlir::dyn_cast<mlir::IntegerAttr>(array[i]);
     if (!attr) {
       return Internal("Type Error: Expected layout integer attribute");
     }
diff --git a/third_party/xla/xla/translate/mhlo_to_hlo/location_exporter.cc b/third_party/xla/xla/translate/mhlo_to_hlo/location_exporter.cc
index 0d8969116e70e9..1b98859e91bd0e 100644
--- a/third_party/xla/xla/translate/mhlo_to_hlo/location_exporter.cc
+++ b/third_party/xla/xla/translate/mhlo_to_hlo/location_exporter.cc
@@ -40,7 +40,7 @@ static std::string GetNameFromLocImpl(Location loc) {
   while (!locs.empty()) {
     Location curr_loc = locs.pop_back_val();
 
-    if (auto name_loc = curr_loc.dyn_cast<NameLoc>()) {
+    if (auto name_loc = mlir::dyn_cast<NameLoc>(curr_loc)) {
       // Add name in NameLoc. For NameLoc we also account for names due to ops
       // in functions where the op's name is first.
       auto name = name_loc.getName().strref().split('@').first;
@@ -48,10 +48,10 @@ static std::string GetNameFromLocImpl(Location loc) {
       if (!name.ends_with(":")) {
         loc_names.push_back(name);
       }
-    } else if (auto call_loc = curr_loc.dyn_cast<CallSiteLoc>()) {
+    } else if (auto call_loc = mlir::dyn_cast<CallSiteLoc>(curr_loc)) {
       // Use location of the Callee to generate the name.
       locs.push_back(call_loc.getCallee());
-    } else if (auto fused_loc = curr_loc.dyn_cast<FusedLoc>()) {
+    } else if (auto fused_loc = mlir::dyn_cast<FusedLoc>(curr_loc)) {
       // Push all locations in FusedLoc in reverse order, so locations are
       // visited based on order in FusedLoc.
       auto reversed_fused_locs = llvm::reverse(fused_loc.getLocations());
@@ -70,7 +70,7 @@ static std::string GetOpTypeFromLoc(Location loc) {
   while (!locs.empty()) {
     Location curr_loc = locs.pop_back_val();
 
-    if (auto name_loc = curr_loc.dyn_cast<NameLoc>()) {
+    if (auto name_loc = mlir::dyn_cast<NameLoc>(curr_loc)) {
       // Add name in NameLoc. For NameLoc we also account for names due to ops
       // in functions where the op's name is first.
       auto op_type = name_loc.getName().strref().split('@').first;
@@ -78,10 +78,10 @@ static std::string GetOpTypeFromLoc(Location loc) {
         op_type = op_type.substr(0, op_type.size() - 1);
         loc_op_types.push_back(op_type);
       }
-    } else if (auto call_loc = curr_loc.dyn_cast<CallSiteLoc>()) {
+    } else if (auto call_loc = mlir::dyn_cast<CallSiteLoc>(curr_loc)) {
       // Use location of the Callee to generate the name.
       locs.push_back(call_loc.getCallee());
-    } else if (auto fused_loc = curr_loc.dyn_cast<FusedLoc>()) {
+    } else if (auto fused_loc = mlir::dyn_cast<FusedLoc>(curr_loc)) {
       // The first location is reserved for op_type.
       if (!fused_loc.getLocations().empty())
         locs.push_back(fused_loc.getLocations()[0]);
@@ -92,10 +92,10 @@ static std::string GetOpTypeFromLoc(Location loc) {
 }
 
 static void SetSourceFileAndLine(Location loc, xla::OpMetadata& metadata) {
-  if (auto file_line_col_loc = loc.dyn_cast<mlir::FileLineColLoc>()) {
+  if (auto file_line_col_loc = mlir::dyn_cast<mlir::FileLineColLoc>(loc)) {
     metadata.set_source_file(file_line_col_loc.getFilename().str());
     metadata.set_source_line(file_line_col_loc.getLine());
-  } else if (auto fused_loc = loc.dyn_cast<FusedLoc>()) {
+  } else if (auto fused_loc = mlir::dyn_cast<FusedLoc>(loc)) {
     for (Location it : fused_loc.getLocations()) {
       SetSourceFileAndLine(it, metadata);
     }
@@ -113,7 +113,7 @@ xla::OpMetadata CreateOpMetadataFromLocation(
   std::string op_type = GetOpTypeFromLoc(loc);
   metadata.set_op_type(op_type);
 
-  if (auto name_loc = loc.dyn_cast<mlir::NameLoc>()) {
+  if (auto name_loc = mlir::dyn_cast<mlir::NameLoc>(loc)) {
     loc = name_loc.getChildLoc();
     if (isa<mlir::UnknownLoc>(loc)) return metadata;
 
diff --git a/third_party/xla/xla/translate/mhlo_to_hlo/mlir_hlo_to_hlo.cc b/third_party/xla/xla/translate/mhlo_to_hlo/mlir_hlo_to_hlo.cc
index 8b0177a1f80d3a..fd55c12f002f85 100644
--- a/third_party/xla/xla/translate/mhlo_to_hlo/mlir_hlo_to_hlo.cc
+++ b/third_party/xla/xla/translate/mhlo_to_hlo/mlir_hlo_to_hlo.cc
@@ -56,6 +56,7 @@ limitations under the License.
 #include "mlir/Pass/Pass.h"  // from @llvm-project
 #include "mlir/Pass/PassManager.h"  // from @llvm-project
 #include "mlir/Support/DebugStringHelper.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "mlir/Transforms/RegionUtils.h"  // from @llvm-project
 #include "stablehlo/dialect/StablehloOps.h"  // from @stablehlo
@@ -144,13 +145,13 @@ static mlir::LogicalResult GetXlaOp(
 }
 
 bool IsBoundedOrStatic(mlir::Type ty) {
-  auto ranked_ty = ty.dyn_cast_or_null<mlir::RankedTensorType>();
+  auto ranked_ty = mlir::dyn_cast_or_null<mlir::RankedTensorType>(ty);
   if (!ranked_ty) return false;
 
   if (ranked_ty.hasStaticShape()) return true;
 
-  auto encoding = ranked_ty.getEncoding()
-                      .dyn_cast_or_null<mlir::mhlo::TypeExtensionsAttr>();
+  auto encoding = mlir::dyn_cast_or_null<mlir::mhlo::TypeExtensionsAttr>(
+      ranked_ty.getEncoding());
   if (!encoding || encoding.getBounds().empty()) return false;
 
   int64_t rank = ranked_ty.getRank();
@@ -188,7 +189,7 @@ xla::Array<T> ArrayFromDenseElementsAttr(mlir::DenseElementsAttr dense_attr) {
 
 absl::StatusOr<xla::Literal> CreateArrayLiteralFromAttr(mlir::ElementsAttr attr,
                                                         xla::Layout layout) {
-  auto dense_attr = attr.dyn_cast<mlir::DenseElementsAttr>();
+  auto dense_attr = mlir::dyn_cast<mlir::DenseElementsAttr>(attr);
   if (!dense_attr)
     return tsl::errors::Unimplemented("Only dense elements attr are supported");
 
@@ -260,7 +261,7 @@ static std::vector<xla::CrossProgramPrefetch> Convert_cross_program_prefetches(
     mlir::ArrayAttr prefetches) {
   std::vector<xla::CrossProgramPrefetch> cross_program_prefetches;
   for (auto prefetch : prefetches) {
-    auto cpp = prefetch.cast<mlir::mhlo::CrossProgramPrefetchAttr>();
+    auto cpp = mlir::cast<mlir::mhlo::CrossProgramPrefetchAttr>(prefetch);
     xla::CrossProgramPrefetch xla_cpp;
     xla_cpp.set_parameter(cpp.getParameter());
     for (auto index : cpp.getIndices()) xla_cpp.add_index(index);
@@ -321,11 +322,11 @@ static void SetLayout(xla::Shape& shape, mlir::ArrayAttr layouts) {
   if (shape.IsTuple()) {
     for (int i = 0; i < shape.tuple_shapes_size(); ++i) {
       SetLayout(*shape.mutable_tuple_shapes(i),
-                layouts[i].cast<mlir::DenseIntElementsAttr>());
+                mlir::cast<mlir::DenseIntElementsAttr>(layouts[i]));
     }
   } else {
     assert(layouts.size() == 1);
-    SetLayout(shape, layouts[0].cast<mlir::DenseIntElementsAttr>());
+    SetLayout(shape, mlir::cast<mlir::DenseIntElementsAttr>(layouts[0]));
   }
 }
 
@@ -335,7 +336,7 @@ static std::vector<xla::Shape> ConvertTypesToShapesWithLayout(
   std::vector<xla::Shape> shapes_with_layout;
   for (auto [type, layout] : llvm::zip(value_types, layouts)) {
     xla::Shape shape = xla::TypeToShape(type);
-    SetLayout(shape, layout.cast<mlir::DenseIntElementsAttr>());
+    SetLayout(shape, mlir::cast<mlir::DenseIntElementsAttr>(layout));
     shapes_with_layout.push_back(std::move(shape));
   }
   return shapes_with_layout;
@@ -433,7 +434,7 @@ static std::unique_ptr<xla::PrecisionConfig> Convert_precision_config(
     xla::PrecisionConfig::Precision p;
     auto operand_precision =
         mlir::mhlo::stringifyPrecision(
-            attr.cast<mlir::mhlo::PrecisionAttr>().getValue())
+            mlir::cast<mlir::mhlo::PrecisionAttr>(attr).getValue())
             .str();
     // TODO(jpienaar): Update this to ensure this is captured by verify.
     if (xla::PrecisionConfig::Precision_Parse(operand_precision, &p)) {
@@ -583,7 +584,7 @@ void ConstructFrontendAttributesFromAttribute(
     const mlir::DictionaryAttr& frontend_attributes_dict,
     xla::FrontendAttributes& frontend_attributes) {
   for (const auto& attr : frontend_attributes_dict)
-    if (auto value_str_attr = attr.getValue().dyn_cast<mlir::StringAttr>())
+    if (auto value_str_attr = mlir::dyn_cast<mlir::StringAttr>(attr.getValue()))
       frontend_attributes.mutable_map()->insert(
           {attr.getName().str(), value_str_attr.getValue().str()});
 }
@@ -961,12 +962,13 @@ LogicalResult ExportXlaOp(DynamicPadOp op, OpLoweringContext ctx) {
 }
 
 LogicalResult ExportXlaOp(DynamicReshapeOp op, OpLoweringContext ctx) {
-  auto resultType = op.getResult().getType().dyn_cast<RankedTensorType>();
+  auto resultType = mlir::dyn_cast<RankedTensorType>(op.getResult().getType());
   if (!resultType) return op->emitOpError() << "expected ranked result";
   auto resultBounds = hlo::encodingToBounds(resultType.getEncoding());
   if (resultBounds.empty())
     return op->emitOpError() << "expected bounded result";
-  auto shapeType = op.getOutputShape().getType().dyn_cast<RankedTensorType>();
+  auto shapeType =
+      mlir::dyn_cast<RankedTensorType>(op.getOutputShape().getType());
   if (!shapeType || !shapeType.getElementType().isInteger(32))
     return op->emitOpError() << "expected output shape to be tensor<Nxi32>";
 
@@ -1046,8 +1048,9 @@ LogicalResult ExportXlaOp(AllGatherOp op, OpLoweringContext ctx) {
   auto all_gather_dim = op.getAllGatherDim();
   int64_t shard_count = 0;
   for (size_t i = 0; i < operands.size(); ++i) {
-    TensorType operand_type = op.getOperand(i).getType().cast<TensorType>();
-    TensorType result_type = op.getType(i).cast<TensorType>();
+    TensorType operand_type =
+        mlir::cast<TensorType>(op.getOperand(i).getType());
+    TensorType result_type = mlir::cast<TensorType>(op.getType(i));
     if (!operand_type.hasStaticShape() || !result_type.hasStaticShape())
       return failure();
     if (i == 0) {
@@ -1145,7 +1148,7 @@ LogicalResult ExportXlaOp(ReduceScatterOp op, OpLoweringContext ctx) {
   xla::XlaOp operand;
   if (failed(GetXlaOp(op.getOperand(), value_map, &operand, op)))
     return failure();
-  TensorType operand_type = op.getOperand().getType().cast<TensorType>();
+  TensorType operand_type = mlir::cast<TensorType>(op.getOperand().getType());
   TensorType result_type = op.getType();
   if (!operand_type.hasStaticShape() || !result_type.hasStaticShape())
     return failure();
@@ -1200,8 +1203,8 @@ LogicalResult ExportXlaOp(AsyncStartOp op, OpLoweringContext ctx) {
       dyn_cast_or_null<AllGatherOp>(callee.getBody().front().front());
   if (all_gather_op && SimplyReturnedOp(all_gather_op)) {
     TensorType operand_type =
-        all_gather_op.getOperand(0).getType().cast<TensorType>();
-    TensorType result_type = all_gather_op.getType(0).cast<TensorType>();
+        mlir::cast<TensorType>(all_gather_op.getOperand(0).getType());
+    TensorType result_type = mlir::cast<TensorType>(all_gather_op.getType(0));
     if (!operand_type.hasStaticShape() || !result_type.hasStaticShape())
       return failure();
     if (operands.size() != 1) return failure();
@@ -1213,7 +1216,7 @@ LogicalResult ExportXlaOp(AsyncStartOp op, OpLoweringContext ctx) {
         Convert_replica_groups(all_gather_op.getReplicaGroups()),
         Convert_channel_handle(all_gather_op.getChannelHandle()),
         ExtractLayout(all_gather_op,
-                      result_type.cast<RankedTensorType>().getRank()),
+                      mlir::cast<RankedTensorType>(result_type).getRank()),
         Convert_use_global_device_ids(all_gather_op.getUseGlobalDeviceIds()));
     return success();
   }
@@ -1273,11 +1276,12 @@ LogicalResult ExportXlaOp(AsyncStartOp op, OpLoweringContext ctx) {
   }
   auto recv_op = dyn_cast_or_null<RecvOp>(callee.getBody().front().front());
   if (recv_op && SimplyReturnedOp(recv_op)) {
-    auto result_types = result.getType().cast<AsyncBundleType>().getTypes()[1];
+    auto result_types =
+        mlir::cast<AsyncBundleType>(result.getType()).getTypes()[1];
 
     mlir::Type received_type = mlir::TupleType::get(op->getContext(), {});
     if (isa<TupleType>(result_types)) {
-      received_type = result_types.cast<TupleType>().getType(0);
+      received_type = mlir::cast<TupleType>(result_types).getType(0);
     }
 
     value_map[result] = xla::internal::XlaBuilderFriend::BuildRecv(
@@ -1412,11 +1416,11 @@ LogicalResult ExportXlaOp(AsyncDoneOp op, OpLoweringContext ctx) {
   auto recv_op = dyn_cast_or_null<RecvOp>(callee.getBody().front().front());
   if (recv_op && SimplyReturnedOp(recv_op)) {
     auto result_types =
-        op.getBundle().getType().cast<AsyncBundleType>().getTypes()[1];
+        mlir::cast<AsyncBundleType>(op.getBundle().getType()).getTypes()[1];
 
     mlir::Type received_type = mlir::TupleType::get(op->getContext(), {});
     if (isa<TupleType>(result_types)) {
-      received_type = result_types.cast<TupleType>().getType(0);
+      received_type = mlir::cast<TupleType>(result_types).getType(0);
     }
 
     xla::XlaOp xla_recv = xla::internal::XlaBuilderFriend::BuildRecvDone(
@@ -1463,7 +1467,7 @@ LogicalResult ExportXlaOp(BitcastConvertOp op, OpLoweringContext ctx) {
 }
 
 LogicalResult ExportXlaOp(BroadcastInDimOp op, OpLoweringContext ctx) {
-  auto type = op.getType().dyn_cast<RankedTensorType>();
+  auto type = mlir::dyn_cast<RankedTensorType>(op.getType());
   if (!type) return failure();
   auto& value_map = *ctx.values;
   xla::XlaOp operand;
@@ -1879,7 +1883,7 @@ LogicalResult ExportXlaOp(CustomCallOp op, OpLoweringContext ctx) {
                << " is not a supported attribute for ApproxTopK";
     }
     auto backend_config =
-        op.getBackendConfigAttr().dyn_cast_or_null<mlir::DictionaryAttr>();
+        mlir::dyn_cast_or_null<mlir::DictionaryAttr>(op.getBackendConfigAttr());
     if (!backend_config)
       return op.emitOpError() << "Missing backend_config attribute";
 
@@ -1967,14 +1971,16 @@ LogicalResult ExportXlaOp(CustomCallOp op, OpLoweringContext ctx) {
 
     SmallVector<RankedTensorType> input_types, init_value_types, result_types;
     for (size_t i = 0; i < num_inputs; ++i) {
-      auto input_type = op.getOperand(i).getType().dyn_cast<RankedTensorType>();
+      auto input_type =
+          mlir::dyn_cast<RankedTensorType>(op.getOperand(i).getType());
       if (!input_type) return failure();
       input_types.push_back(input_type);
-      auto init_value_type =
-          op.getOperand(num_inputs + i).getType().dyn_cast<RankedTensorType>();
+      auto init_value_type = mlir::dyn_cast<RankedTensorType>(
+          op.getOperand(num_inputs + i).getType());
       if (!init_value_type) return failure();
       init_value_types.push_back(init_value_type);
-      auto result_type = op.getResult(i).getType().dyn_cast<RankedTensorType>();
+      auto result_type =
+          mlir::dyn_cast<RankedTensorType>(op.getResult(i).getType());
       if (!result_type) return failure();
       result_types.push_back(result_type);
     }
@@ -2025,7 +2031,7 @@ LogicalResult ExportXlaOp(CustomCallOp op, OpLoweringContext ctx) {
              << "ApproxTopK takes exactly 1 called_computation.";
     }
     mlir::func::FuncOp callee = ctx.converter->LookUpSymbol(
-        op.getCalledComputations()[0].cast<FlatSymbolRefAttr>());
+        mlir::cast<FlatSymbolRefAttr>(op.getCalledComputations()[0]));
     mlir::FunctionType callee_type = callee.getFunctionType();
     SmallVector<Type, 4> expected_callee_input_types;
     for (unsigned i = 0; i < num_inputs; ++i) {
@@ -2095,16 +2101,14 @@ LogicalResult ExportXlaOp(CustomCallOp op, OpLoweringContext ctx) {
 
   if (*xla_api_version == xla::CustomCallApiVersion::API_VERSION_TYPED_FFI) {
     // Serialize backend config dictionary as a string.
-    if (auto dict = op.getBackendConfig()
-                        .value_or(mlir::Attribute())
-                        .dyn_cast_or_null<mlir::DictionaryAttr>()) {
+    if (auto dict = mlir::dyn_cast_or_null<mlir::DictionaryAttr>(
+            op.getBackendConfig().value_or(mlir::Attribute()))) {
       llvm::raw_string_ostream(backend_config) << dict;
     }
   } else {
     // Forward backend config string to the HLO instruction.
-    if (auto str = op.getBackendConfig()
-                       .value_or(mlir::Attribute())
-                       .dyn_cast_or_null<mlir::StringAttr>()) {
+    if (auto str = mlir::dyn_cast_or_null<mlir::StringAttr>(
+            op.getBackendConfig().value_or(mlir::Attribute()))) {
       llvm::raw_string_ostream(backend_config) << str.strref();
     }
   }
@@ -2140,7 +2144,7 @@ LogicalResult ExportXlaOp(CustomCallOp op, OpLoweringContext ctx) {
   xla::XlaOp custom_call;
   if (op.getCalledComputations().size() == 1) {
     mlir::func::FuncOp callee = ctx.converter->LookUpSymbol(
-        op.getCalledComputations()[0].cast<FlatSymbolRefAttr>());
+        mlir::cast<FlatSymbolRefAttr>(op.getCalledComputations()[0]));
     if (failed(ctx.converter->RunOnFunction(callee))) return failure();
     xla::XlaComputation& computation =
         ctx.converter->GetLoweredComputation(callee);
@@ -2861,11 +2865,11 @@ LogicalResult ConvertLayout(mlir::Operation* op, const mlir::ArrayAttr& layout,
     }
     for (int i = 0; i < subshapes_data_size; i++) {
       mlir::Attribute child = layout[i];
-      if (child.isa<mlir::UnitAttr>()) {
+      if (mlir::isa<mlir::UnitAttr>(child)) {
         // ignore unit attributes, they are used only for tokens.
         continue;
       }
-      mlir::ArrayAttr c = child.dyn_cast<mlir::ArrayAttr>();
+      mlir::ArrayAttr c = mlir::dyn_cast<mlir::ArrayAttr>(child);
       if (!c) {
         op->emitOpError() << "Type Error: Expected layout array attribute";
         return failure();
@@ -2882,7 +2886,7 @@ LogicalResult ConvertLayout(mlir::Operation* op, const mlir::ArrayAttr& layout,
       }
       std::vector<int64_t> array(rank);
       for (int i = 0; i < rank; i++) {
-        mlir::IntegerAttr attr = layout[i].dyn_cast<mlir::IntegerAttr>();
+        mlir::IntegerAttr attr = mlir::dyn_cast<mlir::IntegerAttr>(layout[i]);
         if (!attr) {
           op->emitOpError() << "Type Error: Expected layout integer attribute";
           return failure();
@@ -2912,7 +2916,7 @@ LogicalResult ConvertInfeedtLayout(mlir::Operation* op,
     // Handles following shape:
     //   single array-shape of infeed data
     mlir::ArrayAttr child_layout =
-        layout[layout_index].dyn_cast<mlir::ArrayAttr>();
+        mlir::dyn_cast<mlir::ArrayAttr>(layout[layout_index]);
     if (!child_layout) {
       op->emitOpError() << "Type Error: Expected layout array attribute";
       return failure();
@@ -2925,7 +2929,8 @@ LogicalResult ConvertInfeedtLayout(mlir::Operation* op,
       }
       std::vector<int64_t> array(rank);
       for (int i = 0; i < rank; i++) {
-        mlir::IntegerAttr attr = child_layout[i].dyn_cast<mlir::IntegerAttr>();
+        mlir::IntegerAttr attr =
+            mlir::dyn_cast<mlir::IntegerAttr>(child_layout[i]);
         if (!attr) {
           op->emitOpError() << "Type Error: Expected layout integer attribute";
           return failure();
@@ -2984,9 +2989,7 @@ LogicalResult ConvertInfeedtLayout(mlir::Operation* op,
 LogicalResult ExportXlaOperatorWrapped(mlir::Operation* inst,
                                        OpLoweringContext ctx) {
   auto op = dyn_cast<mlir::mhlo::AddOp>(inst);
-  if (op && op.getResult()
-                .getType()
-                .cast<mlir::TensorType>()
+  if (op && mlir::cast<mlir::TensorType>(op.getResult().getType())
                 .getElementType()
                 .isSignlessInteger(1)) {
     auto& value_map = *ctx.values;
@@ -3143,7 +3146,7 @@ LogicalResult ConvertToHloModule::Lower(
 
   if (auto op = dyn_cast<mlir::tensor::CastOp>(inst)) {
     Value operand = op.getOperand();
-    auto ty = operand.getType().dyn_cast<ShapedType>();
+    auto ty = mlir::dyn_cast<ShapedType>(operand.getType());
     // If this was a cast from a static or bounded tensors, then it is a noop
     // for export to HLO and we can use the operand.
     if (!ty || !IsBoundedOrStatic(ty)) {
@@ -3163,7 +3166,7 @@ LogicalResult ConvertToHloModule::Lower(
   }
 
   if (matchPattern(inst, m_Constant(&const_attr))) {
-    if (!inst->getResult(0).getType().isa<ShapedType>()) {
+    if (!mlir::isa<ShapedType>(inst->getResult(0).getType())) {
       return inst->emitError(
           "expected shaped type during constant mhlo -> hlo translation");
     }
@@ -3359,7 +3362,7 @@ LogicalResult ConvertToHloModule::RunOnFunction(mlir::func::FuncOp f) {
           if (instr.parameter_number() == i)
             instr.mutable_parameter_replication()
                 ->add_replicated_at_leaf_buffers(
-                    b.cast<mlir::BoolAttr>().getValue());
+                    mlir::cast<mlir::BoolAttr>(b).getValue());
     }
   }
   lowered_computation_[f] = std::move(computation);
@@ -3683,8 +3686,8 @@ absl::Status ConvertMlirHloToHlo(mlir::ModuleOp module,
   if (auto spmd_parameters_sharding = module->getAttrOfType<mlir::ArrayAttr>(
           "mhlo.spmd_parameters_shardings")) {
     for (const auto& sharding : spmd_parameters_sharding.getValue()) {
-      *hlo_module.add_spmd_parameters_shardings() =
-          *xla::ConvertSharding(sharding.cast<mlir::StringAttr>().getValue());
+      *hlo_module.add_spmd_parameters_shardings() = *xla::ConvertSharding(
+          mlir::cast<mlir::StringAttr>(sharding).getValue());
     }
   }
 
diff --git a/third_party/xla/xla/translate/mhlo_to_hlo/translate.cc b/third_party/xla/xla/translate/mhlo_to_hlo/translate.cc
index 409bab6c722cef..3d56686a97e2ac 100644
--- a/third_party/xla/xla/translate/mhlo_to_hlo/translate.cc
+++ b/third_party/xla/xla/translate/mhlo_to_hlo/translate.cc
@@ -16,6 +16,7 @@ limitations under the License.
 
 #include <memory>
 
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "xla/service/hlo.pb.h"
 #include "xla/translate/mhlo_to_hlo/mlir_hlo_to_hlo.h"
 #include "xla/translate/mhlo_to_hlo/type_to_shape.h"
@@ -99,7 +100,7 @@ Status ConvertMlirHloToHloViaBuilder(mlir::ModuleOp module,
             ->mutable_instructions(i)
             ->mutable_parameter_replication()
             ->add_replicated_at_leaf_buffers(
-                b.cast<mlir::BoolAttr>().getValue());
+                mlir::cast<mlir::BoolAttr>(b).getValue());
 
   auto hlo_module = computation.proto();
   hlo_proto->mutable_hlo_module()->Swap(&hlo_module);
diff --git a/third_party/xla/xla/translate/mhlo_to_hlo/type_to_shape.cc b/third_party/xla/xla/translate/mhlo_to_hlo/type_to_shape.cc
index ddc92393ca86a0..bd74bec471dfec 100644
--- a/third_party/xla/xla/translate/mhlo_to_hlo/type_to_shape.cc
+++ b/third_party/xla/xla/translate/mhlo_to_hlo/type_to_shape.cc
@@ -34,6 +34,7 @@ limitations under the License.
 #include "mlir/IR/Diagnostics.h"  // from @llvm-project
 #include "mlir/IR/Location.h"  // from @llvm-project
 #include "mlir/Support/DebugStringHelper.h"  // from @llvm-project
+#include "mlir/Support/LLVM.h"  // from @llvm-project
 #include "mlir/Support/LogicalResult.h"  // from @llvm-project
 #include "stablehlo/dialect/StablehloOps.h"  // from @stablehlo
 #include "xla/mlir/utils/type_util.h"
@@ -85,20 +86,20 @@ Shape TypeToShape(mlir::Type type) {
     mlir::emitError(mlir::UnknownLoc::get(context))
         << "lowering should have been handled by primitive type lowering for "
         << debugString(type);
-  } else if (auto v = type.dyn_cast<mlir::VectorType>()) {
+  } else if (auto v = mlir::dyn_cast<mlir::VectorType>(type)) {
     llvm::SmallVector<int64_t, 4> span(v.getShape().begin(),
                                        v.getShape().end());
     mlir::Type element_type = v.getElementType();
     PrimitiveType primitive_type = ConvertMlirTypeToPrimitiveType(element_type);
     if (primitive_type != PrimitiveType::PRIMITIVE_TYPE_INVALID)
       return ShapeUtil::MakeShape(primitive_type, span);
-  } else if (auto m = type.dyn_cast<mlir::MemRefType>()) {
+  } else if (auto m = mlir::dyn_cast<mlir::MemRefType>(type)) {
     llvm::SmallVector<int64_t, 6> span(m.getShape().begin(),
                                        m.getShape().end());
     mlir::Type element_type = m.getElementType();
     // Treat a memref of a vector as if it was a memref of primitive type with
     // the vector dimensions at the end.
-    if (auto v = element_type.dyn_cast<mlir::VectorType>()) {
+    if (auto v = mlir::dyn_cast<mlir::VectorType>(element_type)) {
       element_type = v.getElementType();
       span.insert(span.end(), v.getShape().begin(), v.getShape().end());
     }
@@ -136,12 +137,13 @@ Shape TypeToShape(mlir::Type type) {
                                              m.getShape().end());
     return ::xla::ShapeUtil::MakeShapeWithDenseLayout(
         primitive_type, dimensions, minor_to_major);
-  } else if (auto t = type.dyn_cast<mlir::RankedTensorType>()) {
+  } else if (auto t = mlir::dyn_cast<mlir::RankedTensorType>(type)) {
     // TODO(jpienaar): This is only handling the base case with primitive
     // element type.
     int64_t rank = t.getRank();
     llvm::SmallVector<int64_t, 4> bounds;
-    if (auto extn = t.getEncoding().dyn_cast_or_null<TypeExtensionsAttr>()) {
+    if (auto extn =
+            mlir::dyn_cast_or_null<TypeExtensionsAttr>(t.getEncoding())) {
       bounds = llvm::to_vector<4>(extn.getBounds());
     } else {
       bounds.assign(rank, ShapedType::kDynamic);
@@ -203,7 +205,7 @@ Shape TypeToShape(mlir::Type type) {
     }
 
     return ShapeUtil::MakeShape(primitive_type, shape, is_dynamic);
-  } else if (auto tuple_type = type.dyn_cast<mlir::TupleType>()) {
+  } else if (auto tuple_type = mlir::dyn_cast<mlir::TupleType>(type)) {
     llvm::SmallVector<Shape, 4> shapes;
     shapes.reserve(tuple_type.size());
     for (mlir::Type sub_type : tuple_type.getTypes()) {
@@ -211,10 +213,11 @@ Shape TypeToShape(mlir::Type type) {
     }
     return ShapeUtil::MakeTupleShape(shapes);
 
-  } else if (type.isa<mlir::mhlo::TokenType>() ||
-             type.isa<mlir::stablehlo::TokenType>()) {
+  } else if (mlir::isa<mlir::mhlo::TokenType>(type) ||
+             mlir::isa<mlir::stablehlo::TokenType>(type)) {
     return ShapeUtil::MakeTokenShape();
-  } else if (auto bundle_type = type.dyn_cast<mlir::mhlo::AsyncBundleType>()) {
+  } else if (auto bundle_type =
+                 mlir::dyn_cast<mlir::mhlo::AsyncBundleType>(type)) {
     auto tuple_type =
         mlir::TupleType::get(type.getContext(), bundle_type.getTypes());
     return TypeToShape(tuple_type);