{"payload":{"header_redesign_enabled":false,"results":[{"id":"577916236","archived":false,"color":"#b2b7f8","followers":2,"has_funding_file":false,"hl_name":"thehavva/Verilog","hl_trunc_description":"Digital design implementation with Verilog language is done with vivado program.","language":"Verilog","mirror":false,"owned_by_organization":false,"public":true,"repo":{"repository":{"id":577916236,"name":"Verilog","owner_id":86909580,"owner_login":"thehavva","updated_at":"2023-01-30T20:12:13.233Z","has_issues":true}},"sponsorable":false,"topics":[],"type":"Public","help_wanted_issues_count":0,"good_first_issue_issues_count":0,"starred_by_current_user":false}],"type":"repositories","page":1,"page_count":1,"elapsed_millis":66,"errors":[],"result_count":1,"facets":[],"protected_org_logins":[],"topics":null,"query_id":"","logged_in":false,"sign_up_path":"/signup?source=code_search_results","sign_in_path":"/login?return_to=https%3A%2F%2Fgithub.com%2Fsearch%3Fq%3Drepo%253Athehavva%252FVerilog%2B%2Blanguage%253AVerilog","metadata":null,"csrf_tokens":{"/thehavva/Verilog/star":{"post":"Cwtp2DphWYcYBX5416B_goXPhWQ06KeH_bpXFwAEjQbyjc6GqoZoGgNfxR360q5NSt11bzSKekXu0_2uOMKT8g"},"/thehavva/Verilog/unstar":{"post":"gdxKCmCnY4MfY5YsTF4FNnAiNQnUvwPzOGhz0pM0dwo4JKgRmS0RlqHvCc2TJm51b_CpMVOM06llOYeOnLcCSA"},"/sponsors/batch_deferred_sponsor_buttons":{"post":"jj3gnboY3lD244LYG-dtk7D7fP_zsNwf3icXfyNydGlfdMlMUbLh_eCt6zXcH43VnJXgeigSW8zcE0aa4yIR7Q"}}},"title":"Repository search results"}