From f7ef60f5716086712dbcd4ac23cc9ba5e8ec1e90 Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Sun, 18 Oct 2020 13:45:24 -0700 Subject: [PATCH] Add support for module parameters --- cocotb_test/simulator.py | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/cocotb_test/simulator.py b/cocotb_test/simulator.py index 201c6bd..16293fd 100644 --- a/cocotb_test/simulator.py +++ b/cocotb_test/simulator.py @@ -40,6 +40,7 @@ def __init__( vhdl_sources=None, includes=None, defines=None, + parameters=None, compile_args=None, simulation_args=None, extra_args=None, @@ -104,6 +105,11 @@ def __init__( self.defines = defines + if parameters is None: + parameters = {} + + self.parameters = parameters + if compile_args is None: compile_args = [] @@ -206,6 +212,9 @@ def get_include_commands(self, includes): def get_define_commands(self, defines): raise NotImplementedError() + def get_parameter_commands(self, parameters): + raise NotImplementedError() + def get_abs_paths(self, paths): paths_abs = [] for path in paths: @@ -298,12 +307,21 @@ def get_define_commands(self, defines): return defines_cmd + def get_parameter_commands(self, parameters): + parameters_cmd = [] + for name, value in parameters.items(): + parameters_cmd.append("-P") + parameters_cmd.append(self.toplevel + "." + name + "=" + str(value)) + + return parameters_cmd + def compile_command(self): cmd_compile = ( ["iverilog", "-o", self.sim_file, "-D", "COCOTB_SIM=1", "-s", self.toplevel, "-g2012"] + self.get_define_commands(self.defines) + self.get_include_commands(self.includes) + + self.get_parameter_commands(self.parameters) + self.compile_args + self.verilog_sources ) @@ -739,6 +757,13 @@ def get_define_commands(self, defines): return defines_cmd + def get_parameter_commands(self, parameters): + parameters_cmd = [] + for name, value in parameters.items(): + parameters_cmd.append("-G" + name + "=" + str(value)) + + return parameters_cmd + def build_command(self): cmd = [] @@ -774,6 +799,7 @@ def build_command(self): + self.compile_args + self.get_define_commands(self.defines) + self.get_include_commands(self.includes) + + self.get_parameter_commands(self.parameters) + [verilator_cpp] + self.verilog_sources )