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Branch: f1c100s-v2019.…
Commits on Jul 31, 2019
  1. sunxi: suniv: add device tree nodes for f1c100s MMC controllers

    thirtythreeforty committed Jul 21, 2019
    The f1c100s has two MMC controllers.  Add device tree nodes for them.
    
    Signed-off-by: George Hilliard <thirtythreeforty@gmail.com>
  2. sunxi-spi: Add suniv pin controller support

    thirtythreeforty committed Jun 18, 2019
    suniv needs slightly different register settings to enable the SPI
    peripheral.  The magic numbers are already provided by the architecture
    support; we just have to check for them here.
    
    Signed-off-by: George Hilliard <thirtythreeforty@gmail.com>
  3. sunxi-spi: restore bus speed and mode after reset

    thirtythreeforty committed Jun 20, 2019
    The sunxi SPI peripheral driver resets the device completely (disabling
    clocks and power) when the bus is released and turns it back on when
    claiming.  On the F1C100s (and maybe others), the peripheral resets back
    to default register settings, losing speed and mode settings.
    
    Restore these settings when resetting the peripheral.
    
    Signed-off-by: George Hilliard <thirtythreeforty@gmail.com>
    Cc: Jagan Teki <jteki@openedev.com>
  4. sunxi_gpio: Add support for suniv-f1c100s

    thirtythreeforty committed Jun 18, 2019
    The f1c100s has a controller pretty similar to that of most sunxi parts,
    but there are only 6 banks.  Add a new compatible entry for this
    peripheral.
    
    Signed-off-by: George Hilliard <thirtythreeforty@gmail.com>
  5. sunxi: Implement clock driver for suniv f1c100s

    thirtythreeforty committed Jun 18, 2019
    The f1c100s has a simple clock tree similar to those of other sunxi
    parts.  Add support for it.
    
    Signed-off-by: George Hilliard <thirtythreeforty@gmail.com>
  6. sunxi: Don't provide enable_cache() on suniv

    thirtythreeforty committed Jun 16, 2019
    The arm926 code provides this function.  Disable it here.
    
    Signed-off-by: George Hilliard <thirtythreeforty@gmail.com>
  7. sunxi: allow to enable MMC driver when using PF UART0

    Icenowy authored and thirtythreeforty committed Jan 20, 2018
    As the pinmux setup of MMC0 at PF is masked, the sunxi MMC driver is now
    harmless for PF uart setup, and it may be used for the extra MMC port.
    
    Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
  8. sunxi: do not set PF MMC0 pinmux when PF uart is used

    Icenowy authored and thirtythreeforty committed Jan 20, 2018
    Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
  9. sunxi: add support for UART at PF for suniv

    Icenowy authored and thirtythreeforty committed Jan 20, 2018
    Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
  10. sunxi: add defconfig for Lichee Pi Nano with SPI Flash support

    Icenowy authored and thirtythreeforty committed Jan 20, 2018
    Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
  11. sunxi: enable SPI NOR on Lichee Pi Nano

    Icenowy authored and thirtythreeforty committed Jan 20, 2018
    The Lichee Pi Nano board has a Winbond W25Q128 SPI flash on it.
    
    Enable it.
    
    Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
  12. sunxi: add SPI0 node for suniv

    Icenowy authored and thirtythreeforty committed Jan 20, 2018
    The suniv SoC has two SPI controllers, in which SPI0 is bootable.
    
    Add device tree node of the controller and its bootable pinmux node.
    
    Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
  13. sunxi: spi-spl: add support for SUNIV

    Icenowy authored and thirtythreeforty committed Jan 19, 2018
    The suniv SoC come with a sun6i-style SPI controller at the base address
    of sun4i SPI controller. The module clock of the SPI controller is also
    missing.
    
    Add support for it.
    
    Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
  14. sunxi: suniv: add boot sequence for SPL to try

    Icenowy authored and thirtythreeforty committed Jan 19, 2018
    The BROM of suniv do not pass the info of boot media to SPL.
    
    Add boot sequence for SPL to try again for the available boot media.
    
    Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
  15. sunxi: suniv: add support for Lichee Pi Nano

    Icenowy authored and thirtythreeforty committed Jan 18, 2018
    Lichee Pi Nano is a board based on F1C100s.
    
    Add support for it.
    
    Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
  16. sunxi: add support for suniv architecture

    Icenowy authored and thirtythreeforty committed Jan 18, 2018
    Add support for the suniv architecture, which is newer ARM9 SoCs by
    Allwinner. The design of it seems to be a mixture of sun3i, sun4i and
    sun6i.
    
    Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
    Rebased-by: George Hilliard <thirtythreeforty@gmail.com>
Commits on Jul 22, 2019
  1. sunxi: Fix build when CONFIG_CMD_PXE or CONFIG_CMD_DHCP are disabled

    Ondrej Jirman authored and thirtythreeforty committed Feb 13, 2019
    Fixes a compilation failure with disabled PXE or DHCP command when using
    sunxi platform.
    
    Signed-off-by: Ondřej Jirman <megous@megous.com>
    Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Commits on Jun 17, 2019
  1. arm: arm926ej-s: add sunxi code

    Icenowy authored and thirtythreeforty committed Jan 18, 2018
    Some Allwinner SoCs use ARM926EJ-S core.
    
    Add Allwinner/sunXi specific code to ARM926EJ-S CPU dircetory.
    
    Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Commits on Jun 16, 2019
  1. arm: arm926ejs: start.S: port save_boot_params support from armv7 code

    Icenowy authored and thirtythreeforty committed Jan 18, 2018
    The ARMv7 start code has support for saving some boot params at the
    entry point, which is used by some SoCs to return to BROM.
    
    Port this to ARM926EJ-S start code.
    
    Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Commits on Apr 9, 2019
  1. Prepare v2019.04

    trini committed Apr 9, 2019
    Signed-off-by: Tom Rini <trini@konsulko.com>
Commits on Apr 8, 2019
  1. arm: sunxi: Enable DM_MMC on required SoCs

    Jagan Teki authored and trini committed Apr 8, 2019
    Enabling DM_MMC is forcing CONFIG_BLK=y so if any board which uses
    SCSI must need to enable DM_SCSI otherwise SCSI reads on that particular
    target making invalid reading to the disk drive.
    
    Allwinner platform do support SCSI on A10, A20 and R40 SoC's out of
    these only A10 have DM_SCSI enabled. So enabling DM_MMC on A20, R40
    would eventually end-up with scsi disk read failures like [1]
    
    So, enable DM_MMC in all places of respective SoC's instead of enabling
    them globally to Allwinner platform.
    
    Now, DM_MMC is enabled in Allwinner SoC's except A20 and R40.
    
    [1] https://lists.denx.de/pipermail/u-boot/2019-April/364057.html
    
    Reported-by: Pablo Sebastián Greco <pgreco@centosproject.org>
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
  2. Merge tag 'fixes-for-2019.04-rc4' of git://git.denx.de/u-boot-staging

    trini committed Apr 8, 2019
    - i.MX8QXP-MEK ethernet fix
  3. dts: imx8qxp-mek: Add PHY post reset delay

    Andrejs Cainikovs Anatolij Gustschin
    Andrejs Cainikovs authored and Anatolij Gustschin committed Mar 1, 2019
    PHY cannot be detected unless we wait about 150 ms.
    
    Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@netmodule.com>
    Reviewed-by: Anatolij Gustschin <agust@denx.de>
    Reviewed-by: Stefano Babic <sbabic@denx.de>
    Acked-by: Joe Hershberger <joe.hershberger@ni.com>
  4. net: dm: fec: Support phy-reset-post-delay property

    Andrejs Cainikovs Anatolij Gustschin
    Andrejs Cainikovs authored and Anatolij Gustschin committed Mar 1, 2019
    As per Linux kernel DT binding doc:
    - phy-reset-post-delay : Post reset delay in milliseconds. If present then
      a delay of phy-reset-post-delay milliseconds will be observed after the
      phy-reset-gpios has been toggled. Can be omitted thus no delay is
      observed. Delay is in range of 1ms to 1000ms. Other delays are invalid.
    
    Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@netmodule.com>
    Reviewed-by: Anatolij Gustschin <agust@denx.de>
    Reviewed-by: Stefano Babic <sbabic@denx.de>
    Acked-by: Joe Hershberger <joe.hershberger@ni.com>
    Acked-by: Lukasz Majewski <lukma@denx.de>
  5. watchdog: Move watchdog_dev to data section (BSS may not be cleared)

    stroese authored and trini committed Apr 3, 2019
    This patch moves all instances of static "watchdog_dev" declarations to
    the "data" section. This may be needed, as the BSS may not be cleared
    in the early U-Boot phase, where watchdog_reset() is already beeing
    called. This may result in incorrect pointer access, as the check to
    "!watchdog_dev" in watchdog_reset() may not be true and the function
    may continue to run.
    
    Signed-off-by: Stefan Roese <sr@denx.de>
    Cc: Heiko Schocher <hs@denx.de>
    Cc: Tom Rini <trini@konsulko.com>
    Cc: Michal Simek <michal.simek@xilinx.com>
    Cc: "Marek Behún" <marek.behun@nic.cz>
    Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
    Tested-by: Michal Simek <michal.simek@xilinx.com> (on zcu100)
    Reviewed-by: Michal Simek <michal.simek@xilinx.com>
  6. net: phy: implement fallback mechanism for negative phy adresses

    Hannes Schmelzer authored and trini committed Mar 29, 2019
    Negative phy-addresses can occour if the caller function was not able to
    determine a valid phy address (from device-tree for example). In this
    case we catch this here and search for ANY phy device on the given mdio-
    bus.
    
    Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
    Tested-by: Michal Simek <michal.simek@xilinx.com>
    Tested-by: Lukasz Majewski <lukma@denx.de>
Commits on Apr 5, 2019
  1. Merge tag 'u-boot-imx-20190405' of git://git.denx.de/u-boot-imx

    trini committed Apr 5, 2019
    Fixes for 2019.04
    
    	- fix bashism for MX8
    	- fix ethernet for MX53
    	- fix docs for i.MX8
Commits on Apr 3, 2019
  1. Merge branch 'master' of git://git.denx.de/u-boot-usb

    trini committed Apr 3, 2019
    - Documentation fix
  2. Merge branch '2019-04-03-master-imports'

    trini committed Apr 3, 2019
    - Important Khadas VIM2 fix
    - Build fix for macOS Mojave
    - Build fix for gcc-4.7 for host tools.
  3. tools/Makefile: build host tools with -std=gnu99

    tpetazzoni authored and trini committed Mar 30, 2019
    Parts of the code are using C99 constructs (such as variables declared
    inside loops), but also GNU extensions (such as typeof), so using
    -std=gnu99 is necessary to build with older versions of gcc that don't
    default to building with gnu99.
    
    It fixes the following build failure:
    
    ./tools/../lib/crc16.c: In function "crc16_ccitt":
    ./tools/../lib/crc16.c:70:2: error: "for" loop initial declarations are only allowed in C99 mode
      for (int i = 0;  i < len;  i++)
      ^
    ./tools/../lib/crc16.c:70:2: note: use option -std=c99 or -std=gnu99 to compile your code
    
    when building the host tools with gcc 4.7.
    
    Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
  4. fix compile error on macOS Mojave

    wangqiang1588 authored and trini committed Mar 31, 2019
  5. configs: khadas_vim2: Fix defconfig

    superna9999 authored and trini committed Apr 3, 2019
    The Khadas VIM2 defconfig was missing the USB PHY config and
    two other misc configs to setup dram banks and call misc_init_r.
    Align it on the other Amlogic SoC based boards defconfig.
    
    Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
  6. phy: Also allow MESON_GXM for MESON_GXL_USB_PHY

    superna9999 authored and trini committed Apr 3, 2019
    The MESON_GXL_USB_PHY is also used on the Amlogic Meson GXM SoCs.
    
    Fixes: 2960e27 ("phy: Add Amlogic Meson USB2 & USB3 Generic PHY drivers")
    Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Commits on Apr 2, 2019
  1. travis-ci: fix at91 missing boards

    ehristev authored and trini committed Apr 1, 2019
    Fix missing at91 boards and split the at91 in two categories:
    at91 arm v7
    at91 arm926esj
    which are the two main cores for the at91 architecture.
    
    Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
  2. DTS: Fix ETH PHY reset on HSC|DDC boards (imx53)

    Lukasz Majewski authored and sbabic committed Apr 1, 2019
    After the commit: "eth: dm: fec: Add gpio phy reset binding"
    SHA1: efd0b79
    
    The FEC ETH driver switched to PHY GPIO reset performed with data defined
    in DTS.
    For the HSC|DDC boards the GPIO reset signal is active low and hence the
    wrong DTS description must be changed (otherwise the reset for ETH is not
    properly setup).
    
    Signed-off-by: Lukasz Majewski <lukma@denx.de>
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