Digilent Atlys Board: Jumpers and Video Connections

Tim Ansell edited this page Sep 4, 2015 · 6 revisions

Open questions

  • Where the fuck is JP2!? - Nothing on the Atlys board seems to be labeled JP2..... The two possibilities seem to be; or

HDMI Connectors

J1: IN J2: Out J3: IN JA: BiDi
Type HDMI Type A HDMI Type A HDMI Type A - HDMI Micro D
Location -
Pin / Signal FPGA Pin FPGA Pin FPGA Pin Pin/Signal FPGA Pin
1: D2+ B12 B8 J16 1: HPD JP3*
2: D2_S GND GND GND 2: RES VCCB2
3: D2- A12 A8 J18 3: D2+ N5
4: D1+ B11 C7 L17 4: D2_S GND
5: D1_S GND GND GND 5: D2- P6
6: D1- A11 A7 L18 6: D1+ T4
7: D0+ G9 D8 K17 7: D1_S GND
8: D0_S GND GND GND 8: D1- V4
9: D0- F9 C8 K18 9: D0+ R3
10: Clk+ D11 B6 H17 10: D0_S GND
11: Clk_S GND GND GND 11: D0- T3
12: Clk- C11 A6 H18 12: Clk+ T9
13: CEC NC 0K to Gnd NC 13: Clk_S GND
14: RES NC NC NC 14: Clk- V9
15: SCL C13 D9 M16 15: CEC VCCB2
16: SDA A13 C9 M18 16: Gnd GND
17: Gnd GND GND GND 17: SCL C13[2]
18: 5V JP4[1] 5V JP8[1] 18: SCA A13[2]
19: HPD 1K to 5V NC 1K to 5V 19: 5V JP3
  • [1]: jumper can disconnect Vdd
  • [2]: shared with J1 I2C signals via jumper JP2

For HDMI Input (HDMI Sink)

  • HPD should be pulled high.

  • 5V pin should disconnected.

  • There is some indication that crappy computers use the 5V pin for detection rather than HPD. Hence maybe we need to connect the 5V?

For HDMI Output (HDMI Source)

  • HPD should be pulled low.
  • 5V pin should be connected.

Atlys HDMI EDID diagram

Atlys HDMI EDID Diagram

  • JP2 connects the EDID lines from J1 IN to JA OUT.
  • JP6 and JP7 connects the EDID lines from J2 OUT to J3 IN.

This seems to indicate that;

  • For EDID to work on J1 IN

    • JP2 must be connected.
    • No monitor must be connected to JA
    • EDID will be on SCL:C13, SDA:A13
  • For EDID to work on J2 OUT

    • JP6 and JP7 must be disconnected.
    • EDID will be on SCL:D9, SDA:C9
  • For EDID to work on J3 IN

    • JP6 and JP7 must be disconnected.
    • EDID will be on SCL:M16, SDA:M18
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