From 03489733b53e0d57e12c4c82ba9d7e7834aba2cf Mon Sep 17 00:00:00 2001 From: Megh Shah Date: Thu, 1 May 2025 14:30:22 +0530 Subject: [PATCH 01/17] Added octospi to SPIF driver --- NimaLTD.I-CUBE-SPIF_conf.h | 3 +- spif.c | 117 +++++++++++++++++++++++++++++++++++++ spif.h | 19 +++++- 3 files changed, 135 insertions(+), 4 deletions(-) diff --git a/NimaLTD.I-CUBE-SPIF_conf.h b/NimaLTD.I-CUBE-SPIF_conf.h index 822cbe1..ee11515 100644 --- a/NimaLTD.I-CUBE-SPIF_conf.h +++ b/NimaLTD.I-CUBE-SPIF_conf.h @@ -29,6 +29,7 @@ #define SPIF_PLATFORM_HAL 0 #define SPIF_PLATFORM_HAL_DMA 1 +#define SPIF_PLATFORM_OCTOSPI 2 #define SPIF_RTOS_DISABLE 0 #define SPIF_RTOS_CMSIS_V1 1 @@ -43,7 +44,7 @@ #define SPIF_DEBUG SPIF_DEBUG_DISABLE /*---------- SPIF_PLATFORM -----------*/ -#define SPIF_PLATFORM SPIF_PLATFORM_HAL +#define SPIF_PLATFORM SPIF_PLATFORM_OCTOSPI /*---------- SPIF_RTOS -----------*/ #define SPIF_RTOS SPIF_RTOS_DISABLE diff --git a/spif.c b/spif.c index b68b3f2..ece82f6 100644 --- a/spif.c +++ b/spif.c @@ -5,6 +5,7 @@ #include "spif.h" + #if SPIF_DEBUG == SPIF_DEBUG_DISABLE #define dprintf(...) #else @@ -196,6 +197,28 @@ bool SPIF_TransmitReceive(SPIF_HandleTypeDef *Handle, uint8_t *Tx, uint8_t *Rx, } } } +#elif (SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI) +OSPI_RegularCmdTypeDef sCommand = {0}; + +// Set up the command to use 4 data lines +sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; +sCommand.DataMode = HAL_OSPI_DATA_4_LINES; // 4-line data mode +sCommand.NbData = Size; // Set the number of data bytes to transmit/receive + +// Prepare the command (this could be any relevant command, like a read or write) +if (HAL_OSPI_Command(Handle->HOspi, &sCommand, Timeout) != HAL_OK) +{ + dprintf("SPIF COMMAND ERROR\r\n"); + return false; +} + if (HAL_OSPI_TransmitReceive(Handle->HOspi, Tx, Rx, Size, Timeout) == HAL_OK) + { + retVal = true; + } + else + { + dprintf("SPIF TIMEOUT\r\n"); + } #endif return retVal; } @@ -238,6 +261,27 @@ bool SPIF_Transmit(SPIF_HandleTypeDef *Handle, uint8_t *Tx, size_t Size, uint32_ } } } +#elif (SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI) +OSPI_RegularCmdTypeDef sCommand = {0}; +sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; +sCommand.DataMode = HAL_OSPI_DATA_4_LINES; // Set to 4 data lines +sCommand.NbData = Size; + +// Send the command to prepare for the transmission +if (HAL_OSPI_Command(Handle->HOspi, &sCommand, Timeout) != HAL_OK) +{ + dprintf("SPIF COMMAND ERROR\r\n"); + return false; +} + + if (HAL_OSPI_Transmit(Handle->HOspi, Tx, Timeout) == HAL_OK) + { + retVal = true; + } + else + { + dprintf("SPIF TIMEOUT\r\n"); + } #endif return retVal; } @@ -280,6 +324,28 @@ bool SPIF_Receive(SPIF_HandleTypeDef *Handle, uint8_t *Rx, size_t Size, uint32_t } } } +#elif (SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI) + OSPI_RegularCmdTypeDef sCommand = {0}; + + // Set up the command for receiving data with 4 data lines + sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; + sCommand.DataMode = HAL_OSPI_DATA_4_LINES; // Set to 4-line data mode + sCommand.NbData = Size; // Number of data bytes to receive + + if (HAL_OSPI_Command(Handle->HOspi, &sCommand, Timeout) != HAL_OK) + { + dprintf("SPIF COMMAND ERROR\r\n"); + return false; + } + + if (HAL_OSPI_Receive(Handle->HOspi, Rx, Timeout) == HAL_OK) + { + retVal = true; + } + else + { + dprintf("SPIF TIMEOUT\r\n"); + } #endif return retVal; } @@ -811,6 +877,55 @@ bool SPIF_ReadFn(SPIF_HandleTypeDef *Handle, uint32_t Address, uint8_t *Data, ui /************************************************************************************************************ ************** Public Functions ************************************************************************************************************/ +#if SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI +/** + * @brief Initialize the SPIF. + * @note Enable and configure the OCTOSPI and Set GPIO as output for CS pin on the CubeMX + * + * @param *Handle: Pointer to SPIF_HandleTypeDef structure + * @param *HOSpi: Pointer to a OSPI_HandleTypeDef structure + * @param *Gpio: Pointer to a GPIO_TypeDef structure for CS + * @param Pin: Pin of CS + * + * @retval bool: true or false + */ + bool SPIF_OCTOSPI_Init(SPIF_HandleTypeDef *Handle, OSPI_HandleTypeDef *HOspi, GPIO_TypeDef *Gpio, uint16_t Pin) + { + bool retVal = false; + do + { + if ((Handle == NULL) || (HOspi == NULL) || (Gpio == NULL) || (Handle->Inited == 1)) + { + dprintf("SPIF_Init() Error, Wrong Parameter\r\n"); + break; + } + memset(Handle, 0, sizeof(SPIF_HandleTypeDef)); + Handle->HOspi = HOspi; + Handle->Gpio = Gpio; + Handle->Pin = Pin; + SPIF_CsPin(Handle, 1); + /* wait for stable VCC */ + while (HAL_GetTick() < 20) + { + SPIF_Delay(1); + } + if (SPIF_WriteDisable(Handle) == false) + { + break; + } + retVal = SPIF_FindChip(Handle); + if (retVal) + { + Handle->Inited = 1; + dprintf("SPIF_OCTOSPI_Init() Done\r\n"); + } + + } while (0); + + return retVal; + } + +#else /** * @brief Initialize the SPIF. @@ -859,6 +974,8 @@ bool SPIF_Init(SPIF_HandleTypeDef *Handle, SPI_HandleTypeDef *HSpi, GPIO_TypeDef return retVal; } +#endif + /***********************************************************************************************************/ /** diff --git a/spif.h b/spif.h index 6ad2631..403ff54 100644 --- a/spif.h +++ b/spif.h @@ -54,7 +54,12 @@ extern "C" #include #include #include "NimaLTD.I-CUBE-SPIF_conf.h" -#include "spi.h" + +#ifdef SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI + #include "octospi.h" +#else + #include "spi.h" +#endif /************************************************************************************************************ ************** Public Definitions @@ -121,7 +126,12 @@ typedef enum typedef struct { - SPI_HandleTypeDef *HSpi; + #ifdef SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI + OSPI_HandleTypeDef *HOspi; + #else + SPI_HandleTypeDef *HSpi; + #endif +// SPI_HandleTypeDef *HSpi; GPIO_TypeDef *Gpio; SPIF_ManufactorTypeDef Manufactor; SPIF_SizeTypeDef Size; @@ -139,8 +149,11 @@ typedef struct /************************************************************************************************************ ************** Public Functions ************************************************************************************************************/ - +#if SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI +bool SPIF_OCTOSPI_Init(SPIF_HandleTypeDef *Handle, OSPI_HandleTypeDef *HOspi, GPIO_TypeDef *Gpio, uint16_t Pin); +#else bool SPIF_Init(SPIF_HandleTypeDef *Handle, SPI_HandleTypeDef *HSpi, GPIO_TypeDef *Gpio, uint16_t Pin); +#endif bool SPIF_EraseChip(SPIF_HandleTypeDef *Handle); bool SPIF_EraseSector(SPIF_HandleTypeDef *Handle, uint32_t Sector); From 162e54c26491aa32097ca6bc2edc311d52c1983c Mon Sep 17 00:00:00 2001 From: Megh Shah Date: Thu, 1 May 2025 14:33:58 +0530 Subject: [PATCH 02/17] fixed header --- spif.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/spif.h b/spif.h index 403ff54..3fe76e1 100644 --- a/spif.h +++ b/spif.h @@ -56,7 +56,7 @@ extern "C" #include "NimaLTD.I-CUBE-SPIF_conf.h" #ifdef SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI - #include "octospi.h" + #include "stm32u5xx_hal_ospi.h" #else #include "spi.h" #endif From 2f2091582e2030532706d841a942338218ce7268 Mon Sep 17 00:00:00 2001 From: Megh Shah Date: Thu, 1 May 2025 17:02:41 +0530 Subject: [PATCH 03/17] Added register definitions for for IS25 --- NimaLTD.I-CUBE-SPIF_conf.h | 4 ++ spif.c | 123 ++++++++++++++++++++++++++++++++++++- spif.h | 15 ++++- 3 files changed, 137 insertions(+), 5 deletions(-) diff --git a/NimaLTD.I-CUBE-SPIF_conf.h b/NimaLTD.I-CUBE-SPIF_conf.h index ee11515..b03e2f5 100644 --- a/NimaLTD.I-CUBE-SPIF_conf.h +++ b/NimaLTD.I-CUBE-SPIF_conf.h @@ -49,6 +49,10 @@ /*---------- SPIF_RTOS -----------*/ #define SPIF_RTOS SPIF_RTOS_DISABLE +/*---------- SPIF_COMPAT -----------*/ +#define SPIF_COMPAT SPIF_COMPAT_IS25XX + + #ifdef __cplusplus } #endif diff --git a/spif.c b/spif.c index ece82f6..27c282d 100644 --- a/spif.c +++ b/spif.c @@ -27,7 +27,7 @@ /************************************************************************************************************ ************** Private Definitions ************************************************************************************************************/ - +#ifdef (SPIF_COMPAT == SPIF_COMPAT_W25XX) #define SPIF_DUMMY_BYTE 0xA5 #define SPIF_CMD_READSFDP 0x5A @@ -90,6 +90,99 @@ #define SPIF_STATUS3_DRV1 (1 << 6) #define SPIF_STATUS3_HOLD (1 << 7) +#elif (SPIF_COMPAT == SPIF_COMPAT_IS25XX) + +#define SPIF_CMD_NORMALREADMODE 0x03 +#define SPIF_CMD_4BYTEADDRREAD 0x13 +#define SPIF_CMD_FASTREAD 0x0B +#define SPIF_CMD_4BYTEADDRFASTREAD 0x0C +#define SPIF_CMD_FASTREADDUALIO 0xBB +#define SPIF_CMD_4BYTEADDRFASTREADDUALIO 0xBC +#define SPIF_CMD_FASTREADDUALOUTPUT 0x3B +#define SPIF_CMD_4BYTEADDRFASTREADDUALOUTPUT 0x3C +#define SPIF_CMD_FASTREADQUADIO 0xEB +#define SPIF_CMD_4BYTEADDRFASTREADQUADIO 0xEC +#define SPIF_CMD_FASTREADQUADOUTPUT 0x6B +#define SPIF_CMD_4BYTEADDRFASTREADQUADOUTPUT 0x6C +#define SPIF_CMD_FASTREADDTRIO 0x0D +#define SPIF_CMD_4BYTEADDRFASTREADDTRIO 0x0E +#define SPIF_CMD_FASTREADDTRIOIO 0xBD +#define SPIF_CMD_4BYTEADDRFASTREADDTRIOIO 0xBE +#define SPIF_CMD_FASTREADQUADDTRIO 0xED +#define SPIF_CMD_4BYTEADDRFASTREADQUADDTRIO 0xEE +#define SPIF_CMD_INPUTPAGEPROGRAM 0x02 +#define SPIF_CMD_4BYTEADDRINPUTPAGEPROGRAM 0x12 +#define SPIF_CMD_QUADPAGEPROGRAM 0x32 +#define SPIF_CMD_4BYTEADDRQUADPAGEPROGRAM 0x34 +#define SPIF_CMD_SECORERASE 0x20 +#define SPIF_CMD_4BYTEADDRSECORERASE 0x21 +#define SPIF_CMD_BLOCKERASE32K 0x52 +#define SPIF_CMD_4BYTEADDRBLOCKERASE32K 0x5C +#define SPIF_CMD_BLOCKERASE64K 0xD8 +#define SPIF_CMD_4BYTEADDRBLOCKERASE64K 0xDC +#define SPIF_CMD_CHIPERASE 0xC7 +#define SPIF_CMD_WRITEENABLE 0x06 +#define SPIF_CMD_WRITEDISABLE 0x04 +#define SPIF_CMD_READSTATUSREG 0x05 +#define SPIF_CMD_WRITESTATUSREG 0x01 +#define SPIF_CMD_READFNREG 0x48 +#define SPIF_CMD_WRITEFNREG 0x42 +#define SPIF_CMD_ENTERQPI 0x35 +#define SPIF_CMD_EXITQPI 0xF5 +#define SPIF_CMD_SUSPEND 0x75 +#define SPIF_CMD_RESUME 0x7A +#define SPIF_CMD_DEEPPOWERDOWN 0xB9 +#define SPIF_CMD_READID 0xAB +#define SPIF_CMD_RELEASEPOWERDOWN 0xAB +#define SPIF_CMD_SETREADPARAMNONVOLATILE 0x65 +#define SPIF_CMD_SETREADPARAMVOLATILE 0xC0 +#define SPIF_CMD_SETEXTEENDEDREADPARAMNONVOLATILE 0x85 +#define SPIF_CMD_SETEXTEENDEDREADPARAMVOLATILE 0x83 +#define SPIF_CMD_READREADPARAMVOLATILE 0x61 +#define SPIF_CMD_READREADEXTENDEDPARAMVOLATILE 0x81 +#define SPIF_CMD_CLEAREXTENDEDREADREG 0x82 +#define SPIF_CMD_READJEDECID 0x9F +#define SPIF_CMD_READMANUFACTURERID 0x90 +#define SPIF_CMD_READJEDECIDQPI 0xAF +#define SPIF_CMD_READUNIQUEID 0x4B +#define SPIF_CMD_READSFDP 0x5A +#define SPIF_CMD_NOOP 0x00 +#define SPIF_CMD_SOFTRESETENABLE 0x66 +#define SPIF_CMD_SOFTRESET 0x99 +#define SPIF_CMD_ERASEINFOROW 0x64 +#define SPIF_CMD_PROGRAMINFOROW 0x62 +#define SPIF_CMD_READINFOROW 0x68 +#define SPIF_CMD_SECTORUNLOCK 0x26 +#define SPIF_CMD_4BYTEADDRSECTORUNLOCK 0x25 +#define SPIF_CMD_SECTORLOCK 0x24 +#define SPIF_CMD_READAUTOBOOTREG 0x14 +#define SPIF_CMD_WRITEAUTOBOOTREG 0x15 +#define SPIF_CMD_READBANKADDRESSREG 0x16 +#define SPIF_CMD_WRITEBANKADDRESSREGVOLATILE 0x17 +#define SPIF_CMD_WRITEBANKADDRESSREGNONVOLATILE 0x18 +#define SPIF_CMD_ENTER4BYTEADDR 0xB7 +#define SPIF_CMD_EXIT4BYTEADDR 0x29 +#define SPIF_CMD_READDYB 0xFA +#define SPIF_CMD_4BYTEADDRREADDYB 0xE0 +#define SPIF_CMD_WRITEDYB 0xFB +#define SPIF_CMD_4BYTEADDRWRITEDYB 0xE1 +#define SPIF_CMD_READPPB 0xFC +#define SPIF_CMD_4BYTEADDRREADPPB 0xE2 +#define SPIF_CMD_PROGPPB 0xFD +#define SPIF_CMD_4BYTEADDRPROGPPB 0xE3 +#define SPIF_CMD_ERASEPPB 0xE4 +#define SPIF_CMD_READASP 0x2B +#define SPIF_CMD_PROGRMASP 0x2F +#define SPIF_CMD_READPPBLOCKBIT 0xA7 +#define SPIF_CMD_WRITEPPBLOCKBIT 0xA6 +#define SPIF_CMD_SETFREEZEBIT 0x91 +#define SPIF_CMD_READPASSWORD 0xE7 +#define SPIF_CMD_PROGRAMPASSWORD 0xE8 +#define SPIF_CMD_UNLOCKPASSWORD 0xE9 +#define SPIF_CMD_SETALLDYBBITS 0x7E +#define SPIF_CMD_CLEARALLDYBBITS 0x98 + +#endif /************************************************************************************************************ ************** Private Functions ************************************************************************************************************/ @@ -877,7 +970,7 @@ bool SPIF_ReadFn(SPIF_HandleTypeDef *Handle, uint32_t Address, uint8_t *Data, ui /************************************************************************************************************ ************** Public Functions ************************************************************************************************************/ -#if SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI +#if (SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI) /** * @brief Initialize the SPIF. * @note Enable and configure the OCTOSPI and Set GPIO as output for CS pin on the CubeMX @@ -1458,3 +1551,29 @@ bool SPIF_ReadBlock(SPIF_HandleTypeDef *Handle, uint32_t BlockNumber, uint8_t *D SPIF_UnLock(Handle); return retVal; } + + +#ifdef (SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI) + +/* + * @brief Write QPI Enable command + * @note Send the QPI-Enable command + * + * @param *Handle: Pointer to SPIF_HandleTypeDef structure + * + * @retval bool: true or false + */ + bool SPIF_QPI_Enable(SPIF_HandleTypeDef *Handle) + { + bool retVal = true; + uint8_t tx[1] = {SPIF_CMD_ENABLE_QPI_MODE}; + SPIF_CsPin(Handle, 0); + if (SPIF_Transmit(Handle, tx, 1, 100) == false) + { + retVal = false; + dprintf("SPIF_QPI_Enable() Error\r\n"); + } + SPIF_CsPin(Handle, 1); + return retVal; + } +#endif \ No newline at end of file diff --git a/spif.h b/spif.h index 3fe76e1..25b9c29 100644 --- a/spif.h +++ b/spif.h @@ -55,7 +55,7 @@ extern "C" #include #include "NimaLTD.I-CUBE-SPIF_conf.h" -#ifdef SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI +#ifdef (SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI) #include "stm32u5xx_hal_ospi.h" #else #include "spi.h" @@ -84,6 +84,11 @@ extern "C" /************************************************************************************************************ ************** Public struct/enum ************************************************************************************************************/ +typedef enum +{ + SPIF_COMPAT_W25XX = 0, + SPIF_COMPAT_IS25XX = 1, +}SPIF_COMPAT typedef enum { @@ -126,7 +131,7 @@ typedef enum typedef struct { - #ifdef SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI + #ifdef (SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI) OSPI_HandleTypeDef *HOspi; #else SPI_HandleTypeDef *HSpi; @@ -149,7 +154,7 @@ typedef struct /************************************************************************************************************ ************** Public Functions ************************************************************************************************************/ -#if SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI +#if (SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI) bool SPIF_OCTOSPI_Init(SPIF_HandleTypeDef *Handle, OSPI_HandleTypeDef *HOspi, GPIO_TypeDef *Gpio, uint16_t Pin); #else bool SPIF_Init(SPIF_HandleTypeDef *Handle, SPI_HandleTypeDef *HSpi, GPIO_TypeDef *Gpio, uint16_t Pin); @@ -169,6 +174,10 @@ bool SPIF_ReadPage(SPIF_HandleTypeDef *Handle, uint32_t PageNumber, uint8_t *Dat bool SPIF_ReadSector(SPIF_HandleTypeDef *Handle, uint32_t SectorNumber, uint8_t *Data, uint32_t Size, uint32_t Offset); bool SPIF_ReadBlock(SPIF_HandleTypeDef *Handle, uint32_t BlockNumber, uint8_t *Data, uint32_t Size, uint32_t Offset); +#ifdef (SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI) +bool SPIF_QPI_Enable(SPIF_HandleTypeDef *Handle); +#endif + #ifdef __cplusplus } #endif From 42b5e113eea77e252df1b7f0099d623f4aa88e4e Mon Sep 17 00:00:00 2001 From: Megh Shah Date: Thu, 1 May 2025 17:25:42 +0530 Subject: [PATCH 04/17] fixed compat condition --- spif.c | 2 +- spif.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/spif.c b/spif.c index 27c282d..907ec8e 100644 --- a/spif.c +++ b/spif.c @@ -1553,7 +1553,7 @@ bool SPIF_ReadBlock(SPIF_HandleTypeDef *Handle, uint32_t BlockNumber, uint8_t *D } -#ifdef (SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI) +#ifdef (SPIF_COMPAT == SPIF_COMPAT_IS25XX) /* * @brief Write QPI Enable command diff --git a/spif.h b/spif.h index 25b9c29..7b6a1d3 100644 --- a/spif.h +++ b/spif.h @@ -174,7 +174,7 @@ bool SPIF_ReadPage(SPIF_HandleTypeDef *Handle, uint32_t PageNumber, uint8_t *Dat bool SPIF_ReadSector(SPIF_HandleTypeDef *Handle, uint32_t SectorNumber, uint8_t *Data, uint32_t Size, uint32_t Offset); bool SPIF_ReadBlock(SPIF_HandleTypeDef *Handle, uint32_t BlockNumber, uint8_t *Data, uint32_t Size, uint32_t Offset); -#ifdef (SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI) +#ifdef (SPIF_COMPAT == SPIF_COMPAT_IS25XX) bool SPIF_QPI_Enable(SPIF_HandleTypeDef *Handle); #endif From ee3608cad7b389942a376b36c122ff8c209ea172 Mon Sep 17 00:00:00 2001 From: Megh Shah Date: Thu, 1 May 2025 18:24:01 +0530 Subject: [PATCH 05/17] fixed mistakes --- NimaLTD.I-CUBE-SPIF_conf.h | 3 +++ spif.c | 28 ++++++++++++++-------------- spif.h | 13 +++++-------- 3 files changed, 22 insertions(+), 22 deletions(-) diff --git a/NimaLTD.I-CUBE-SPIF_conf.h b/NimaLTD.I-CUBE-SPIF_conf.h index b03e2f5..966dbff 100644 --- a/NimaLTD.I-CUBE-SPIF_conf.h +++ b/NimaLTD.I-CUBE-SPIF_conf.h @@ -36,6 +36,9 @@ #define SPIF_RTOS_CMSIS_V2 2 #define SPIF_RTOS_THREADX 3 +#define SPIF_COMPAT_W25XX 0 +#define SPIF_COMPAT_IS25XX 1 + /** MiddleWare name : NimaLTD.I-CUBE-SPIF.2.3.1 MiddleWare fileName : ./NimaLTD.I-CUBE-SPIF_conf.h diff --git a/spif.c b/spif.c index 907ec8e..0c978eb 100644 --- a/spif.c +++ b/spif.c @@ -27,7 +27,7 @@ /************************************************************************************************************ ************** Private Definitions ************************************************************************************************************/ -#ifdef (SPIF_COMPAT == SPIF_COMPAT_W25XX) +#if (SPIF_COMPAT == SPIF_COMPAT_W25XX) #define SPIF_DUMMY_BYTE 0xA5 #define SPIF_CMD_READSFDP 0x5A @@ -92,8 +92,8 @@ #elif (SPIF_COMPAT == SPIF_COMPAT_IS25XX) -#define SPIF_CMD_NORMALREADMODE 0x03 -#define SPIF_CMD_4BYTEADDRREAD 0x13 +#define SPIF_CMD_READDATA3ADD 0x03 +#define SPIF_CMD_READDATA4ADD 0x13 #define SPIF_CMD_FASTREAD 0x0B #define SPIF_CMD_4BYTEADDRFASTREAD 0x0C #define SPIF_CMD_FASTREADDUALIO 0xBB @@ -110,21 +110,21 @@ #define SPIF_CMD_4BYTEADDRFASTREADDTRIOIO 0xBE #define SPIF_CMD_FASTREADQUADDTRIO 0xED #define SPIF_CMD_4BYTEADDRFASTREADQUADDTRIO 0xEE -#define SPIF_CMD_INPUTPAGEPROGRAM 0x02 -#define SPIF_CMD_4BYTEADDRINPUTPAGEPROGRAM 0x12 +#define SPIF_CMD_PAGEPROG3ADD 0x02 +#define SPIF_CMD_PAGEPROG4ADD 0x12 #define SPIF_CMD_QUADPAGEPROGRAM 0x32 #define SPIF_CMD_4BYTEADDRQUADPAGEPROGRAM 0x34 -#define SPIF_CMD_SECORERASE 0x20 -#define SPIF_CMD_4BYTEADDRSECORERASE 0x21 +#define SPIF_CMD_SECTORERASE3ADD 0x20 +#define SPIF_CMD_SECTORERASE4ADD 0x21 #define SPIF_CMD_BLOCKERASE32K 0x52 #define SPIF_CMD_4BYTEADDRBLOCKERASE32K 0x5C #define SPIF_CMD_BLOCKERASE64K 0xD8 #define SPIF_CMD_4BYTEADDRBLOCKERASE64K 0xDC -#define SPIF_CMD_CHIPERASE 0xC7 +#define SPIF_CMD_CHIPERASE1 0xC7 #define SPIF_CMD_WRITEENABLE 0x06 #define SPIF_CMD_WRITEDISABLE 0x04 -#define SPIF_CMD_READSTATUSREG 0x05 -#define SPIF_CMD_WRITESTATUSREG 0x01 +#define SPIF_CMD_READSTATUS1 0x05 +#define SPIF_CMD_WRITESTATUS1 0x01 #define SPIF_CMD_READFNREG 0x48 #define SPIF_CMD_WRITEFNREG 0x42 #define SPIF_CMD_ENTERQPI 0x35 @@ -141,7 +141,7 @@ #define SPIF_CMD_READREADPARAMVOLATILE 0x61 #define SPIF_CMD_READREADEXTENDEDPARAMVOLATILE 0x81 #define SPIF_CMD_CLEAREXTENDEDREADREG 0x82 -#define SPIF_CMD_READJEDECID 0x9F +#define SPIF_CMD_JEDECID 0x9F #define SPIF_CMD_READMANUFACTURERID 0x90 #define SPIF_CMD_READJEDECIDQPI 0xAF #define SPIF_CMD_READUNIQUEID 0x4B @@ -1553,7 +1553,7 @@ bool SPIF_ReadBlock(SPIF_HandleTypeDef *Handle, uint32_t BlockNumber, uint8_t *D } -#ifdef (SPIF_COMPAT == SPIF_COMPAT_IS25XX) +#if (SPIF_COMPAT == SPIF_COMPAT_IS25XX) /* * @brief Write QPI Enable command @@ -1566,7 +1566,7 @@ bool SPIF_ReadBlock(SPIF_HandleTypeDef *Handle, uint32_t BlockNumber, uint8_t *D bool SPIF_QPI_Enable(SPIF_HandleTypeDef *Handle) { bool retVal = true; - uint8_t tx[1] = {SPIF_CMD_ENABLE_QPI_MODE}; + uint8_t tx[1] = {SPIF_CMD_ENTERQPI}; SPIF_CsPin(Handle, 0); if (SPIF_Transmit(Handle, tx, 1, 100) == false) { @@ -1576,4 +1576,4 @@ bool SPIF_ReadBlock(SPIF_HandleTypeDef *Handle, uint32_t BlockNumber, uint8_t *D SPIF_CsPin(Handle, 1); return retVal; } -#endif \ No newline at end of file +#endif diff --git a/spif.h b/spif.h index 7b6a1d3..8f0aa9e 100644 --- a/spif.h +++ b/spif.h @@ -55,7 +55,8 @@ extern "C" #include #include "NimaLTD.I-CUBE-SPIF_conf.h" -#ifdef (SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI) +#if (SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI) +#include "stm32u5xx_hal.h" #include "stm32u5xx_hal_ospi.h" #else #include "spi.h" @@ -84,11 +85,7 @@ extern "C" /************************************************************************************************************ ************** Public struct/enum ************************************************************************************************************/ -typedef enum -{ - SPIF_COMPAT_W25XX = 0, - SPIF_COMPAT_IS25XX = 1, -}SPIF_COMPAT + typedef enum { @@ -131,7 +128,7 @@ typedef enum typedef struct { - #ifdef (SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI) + #if (SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI) OSPI_HandleTypeDef *HOspi; #else SPI_HandleTypeDef *HSpi; @@ -174,7 +171,7 @@ bool SPIF_ReadPage(SPIF_HandleTypeDef *Handle, uint32_t PageNumber, uint8_t *Dat bool SPIF_ReadSector(SPIF_HandleTypeDef *Handle, uint32_t SectorNumber, uint8_t *Data, uint32_t Size, uint32_t Offset); bool SPIF_ReadBlock(SPIF_HandleTypeDef *Handle, uint32_t BlockNumber, uint8_t *Data, uint32_t Size, uint32_t Offset); -#ifdef (SPIF_COMPAT == SPIF_COMPAT_IS25XX) +#if (SPIF_COMPAT == SPIF_COMPAT_IS25XX) bool SPIF_QPI_Enable(SPIF_HandleTypeDef *Handle); #endif From 0b19c63b0460e6c71e89e86ed39597becb0851df Mon Sep 17 00:00:00 2001 From: Megh Shah Date: Fri, 2 May 2025 11:02:34 +0530 Subject: [PATCH 06/17] changed register definition naming to be more consistent --- spif.c | 40 ++++++++++++++++++++-------------------- 1 file changed, 20 insertions(+), 20 deletions(-) diff --git a/spif.c b/spif.c index 0c978eb..b220c67 100644 --- a/spif.c +++ b/spif.c @@ -95,31 +95,31 @@ #define SPIF_CMD_READDATA3ADD 0x03 #define SPIF_CMD_READDATA4ADD 0x13 #define SPIF_CMD_FASTREAD 0x0B -#define SPIF_CMD_4BYTEADDRFASTREAD 0x0C +#define SPIF_CMD_FASTREAD4ADD 0x0C #define SPIF_CMD_FASTREADDUALIO 0xBB -#define SPIF_CMD_4BYTEADDRFASTREADDUALIO 0xBC +#define SPIF_CMD_FASTREADDUALIO4ADD 0xBC #define SPIF_CMD_FASTREADDUALOUTPUT 0x3B -#define SPIF_CMD_4BYTEADDRFASTREADDUALOUTPUT 0x3C +#define SPIF_CMD_FASTREADDUALOUTPUT4ADD 0x3C #define SPIF_CMD_FASTREADQUADIO 0xEB -#define SPIF_CMD_4BYTEADDRFASTREADQUADIO 0xEC +#define SPIF_CMD_FASTREADQUADIO4ADD 0xEC #define SPIF_CMD_FASTREADQUADOUTPUT 0x6B -#define SPIF_CMD_4BYTEADDRFASTREADQUADOUTPUT 0x6C +#define SPIF_CMD_FASTREADQUADOUTPUT4ADD 0x6C #define SPIF_CMD_FASTREADDTRIO 0x0D -#define SPIF_CMD_4BYTEADDRFASTREADDTRIO 0x0E +#define SPIF_CMD_FASTREADDTRIO4ADD 0x0E #define SPIF_CMD_FASTREADDTRIOIO 0xBD -#define SPIF_CMD_4BYTEADDRFASTREADDTRIOIO 0xBE +#define SPIF_CMD_FASTREADDTRIOIO4ADD 0xBE #define SPIF_CMD_FASTREADQUADDTRIO 0xED -#define SPIF_CMD_4BYTEADDRFASTREADQUADDTRIO 0xEE +#define SPIF_CMD_FASTREADQUADDTRIO4ADD 0xEE #define SPIF_CMD_PAGEPROG3ADD 0x02 #define SPIF_CMD_PAGEPROG4ADD 0x12 #define SPIF_CMD_QUADPAGEPROGRAM 0x32 -#define SPIF_CMD_4BYTEADDRQUADPAGEPROGRAM 0x34 +#define SPIF_CMD_QUADPAGEPROGRAM4ADD 0x34 #define SPIF_CMD_SECTORERASE3ADD 0x20 #define SPIF_CMD_SECTORERASE4ADD 0x21 #define SPIF_CMD_BLOCKERASE32K 0x52 -#define SPIF_CMD_4BYTEADDRBLOCKERASE32K 0x5C +#define SPIF_CMD_BLOCKERASE32K4ADD 0x5C #define SPIF_CMD_BLOCKERASE64K 0xD8 -#define SPIF_CMD_4BYTEADDRBLOCKERASE64K 0xDC +#define SPIF_CMD_BLOCKERASE64K4ADD 0xDC #define SPIF_CMD_CHIPERASE1 0xC7 #define SPIF_CMD_WRITEENABLE 0x06 #define SPIF_CMD_WRITEDISABLE 0x04 @@ -136,8 +136,8 @@ #define SPIF_CMD_RELEASEPOWERDOWN 0xAB #define SPIF_CMD_SETREADPARAMNONVOLATILE 0x65 #define SPIF_CMD_SETREADPARAMVOLATILE 0xC0 -#define SPIF_CMD_SETEXTEENDEDREADPARAMNONVOLATILE 0x85 -#define SPIF_CMD_SETEXTEENDEDREADPARAMVOLATILE 0x83 +#define SPIF_CMD_SETEXTENDEDREADPARAMNONVOLATILE 0x85 +#define SPIF_CMD_SETEXTEDEDREADPARAMVOLATILE 0x83 #define SPIF_CMD_READREADPARAMVOLATILE 0x61 #define SPIF_CMD_READREADEXTENDEDPARAMVOLATILE 0x81 #define SPIF_CMD_CLEAREXTENDEDREADREG 0x82 @@ -153,23 +153,23 @@ #define SPIF_CMD_PROGRAMINFOROW 0x62 #define SPIF_CMD_READINFOROW 0x68 #define SPIF_CMD_SECTORUNLOCK 0x26 -#define SPIF_CMD_4BYTEADDRSECTORUNLOCK 0x25 +#define SPIF_CMD_SECTORUNLOCK4ADD 0x25 #define SPIF_CMD_SECTORLOCK 0x24 #define SPIF_CMD_READAUTOBOOTREG 0x14 #define SPIF_CMD_WRITEAUTOBOOTREG 0x15 #define SPIF_CMD_READBANKADDRESSREG 0x16 #define SPIF_CMD_WRITEBANKADDRESSREGVOLATILE 0x17 #define SPIF_CMD_WRITEBANKADDRESSREGNONVOLATILE 0x18 -#define SPIF_CMD_ENTER4BYTEADDR 0xB7 -#define SPIF_CMD_EXIT4BYTEADDR 0x29 +#define SPIF_CMD_ENTER4ADD 0xB7 +#define SPIF_CMD_EXIT4ADD 0x29 #define SPIF_CMD_READDYB 0xFA -#define SPIF_CMD_4BYTEADDRREADDYB 0xE0 +#define SPIF_CMD_READDYB4ADD 0xE0 #define SPIF_CMD_WRITEDYB 0xFB -#define SPIF_CMD_4BYTEADDRWRITEDYB 0xE1 +#define SPIF_CMD_WRITEDYB4ADD 0xE1 #define SPIF_CMD_READPPB 0xFC -#define SPIF_CMD_4BYTEADDRREADPPB 0xE2 +#define SPIF_CMD_READPPB4ADD 0xE2 #define SPIF_CMD_PROGPPB 0xFD -#define SPIF_CMD_4BYTEADDRPROGPPB 0xE3 +#define SPIF_CMD_PROGPPB4ADD 0xE3 #define SPIF_CMD_ERASEPPB 0xE4 #define SPIF_CMD_READASP 0x2B #define SPIF_CMD_PROGRMASP 0x2F From 55869605790b925fe1c83aaeb15e7677d1b73e98 Mon Sep 17 00:00:00 2001 From: Megh Shah Date: Sat, 3 May 2025 16:25:09 +0530 Subject: [PATCH 07/17] Added status registers for IS25 + Added stutus registers for IS25 + Added Fn registers + Added Read Reg definitions + Added Extended Read Reg definitions + Added Autoboot Reg definitions + Added Bank Reg definitions + Added ASPR Reg definitions + Added PPB Lock Reg definitions + Changed SPIF_WriteReg1 to work for IS25 --- spif.c | 113 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++- spif.h | 4 +- 2 files changed, 114 insertions(+), 3 deletions(-) diff --git a/spif.c b/spif.c index b220c67..e73b15d 100644 --- a/spif.c +++ b/spif.c @@ -92,6 +92,8 @@ #elif (SPIF_COMPAT == SPIF_COMPAT_IS25XX) +#define SPIF_DUMMY_BYTE 0xA5 //TODO: confirm value + #define SPIF_CMD_READDATA3ADD 0x03 #define SPIF_CMD_READDATA4ADD 0x13 #define SPIF_CMD_FASTREAD 0x0B @@ -182,7 +184,78 @@ #define SPIF_CMD_SETALLDYBBITS 0x7E #define SPIF_CMD_CLEARALLDYBBITS 0x98 +/*status register definitions*/ +#define SPIF_STATUS_WIP (1 << 0) +#define SPIF_STATUS_WEL (1 << 1) +#define SPIF_STATUS_BP0 (1 << 2) +#define SPIF_STATUS_BP1 (1 << 3) +#define SPIF_STATUS_BP2 (1 << 4) +#define SPIF_STATUS_BP3 (1 << 5) +#define SPIF_STATUS_QE (1 << 6) +#define SPIF_STATUS_SRWD (1 << 7) + +/*Function Register definitions*/ +#define SPIF_FNREG_DEDICATEDRESET (1 << 0) +#define SPIF_FNREG_TBS (1 << 1) +#define SPIF_FNREG_PSUS (1 << 2) +#define SPIF_FNREG_ESUS (1 << 3) +#define SPIF_FNREG_IRLOCK0 (1 << 4) +#define SPIF_FNREG_IRLOCK1 (1 << 5) +#define SPIF_FNREG_IRLOCK2 (1 << 6) +#define SPIF_FNREG_IRLOCK3 (1 << 7) + +/*Read Register definitons*/ +#define SPIF_READREG_BURSTLEN0 (1 << 0) +#define SPIF_READREG_BURSTLEN1 (1 << 1) +#define SPIF_READREG_BURSTLENENABLE (1 << 2) +#define SPIF_READREG_DUMMYCYCLES0 (1 << 3) +#define SPIF_READREG_DUMMYCYCLES1 (1 << 4) +#define SPIF_READREG_DUMMYCYCLES2 (1 << 5) +#define SPIF_READREG_DUMMYCYCLES3 (1 << 6) +#define SPIF_READREG_HOLD_RESET (1 << 7) + +/*Extended Read Register definitions*/ +#define SPIF_EXTENDEDREADREG_WIP (1 << 0) +#define SPIF_EXTENDEDREADREG_PROT_E (1 << 1) +#define SPIF_EXTENDEDREADREG_P_ERR (1 << 2) +#define SPIF_EXTENDEDREADREG_E_ERR (1 << 3) +// bit 4 is reserved +#define SPIF_EXTENDEDREADREG_ODS0 (1 << 5) +#define SPIF_EXTENDEDREADREG_ODS1 (1 << 6) +#define SPIF_EXTENDEDREADREG_ODS2 (1 << 7) + +/* AutoBoot Register definitions */ +#define SPIF_AUTOBootREG_ABSA (0xFFFFFFE0) // Bits AB[31:5] - AutoBoot Start Address +#define SPIF_AUTOBootREG_ABSD (0x0000001E) // Bits AB[4:1] - AutoBoot Start Delay +#define SPIF_AUTOBootREG_ABE (1 << 0) // Bit AB[0] - AutoBoot Enable + +/* Bank Address Register*/ +#define SPIF_BANKADDRESSREG_EXTADD (1 << 7) //3-byte or 4-byte addressing selection Bit +//other bits are all reserved + +/* Advanced Sector/Block Protection Register (ASPR) definitions */ +// bit 0 is reserved +#define SPIF_ASPR_PSTMLB (1 << 1) // Persistent Protection Mode Lock Bit +#define SPIF_ASPR_PWDMLB (1 << 2) // Password Protection Mode Lock Bit +//bit 3 to 14 are reserved +#define SPIF_ASPR_TBPARM (1 << 15) // Top/Bottom Parameter Sector + +/*Password Register*/ +// TODO: define the password register bits + +/*PPB Lock Register*/ +#define SPIF_PPBLOCKREG_PPBLOCK (1 << 0) //PPB Lock Bit +//bit 1 to 6 are reserved +#define SPIF_PPBLOCKREG_FREEZE (1 << 7) + +/*PPB Register*/ +//TODO: confirm if need this definition + +/*DYB register*/ +//TODO: confirm if need this definition + #endif + /************************************************************************************************************ ************** Private Functions ************************************************************************************************************/ @@ -476,7 +549,8 @@ bool SPIF_WriteDisable(SPIF_HandleTypeDef *Handle) } /***********************************************************************************************************/ - +// This reads status register 1 for SPIF_COMPAT_W25XX +// This will also read the only status register for SPIF_COMPAT_IS25XX uint8_t SPIF_ReadReg1(SPIF_HandleTypeDef *Handle) { uint8_t retVal = 0; @@ -495,6 +569,8 @@ uint8_t SPIF_ReadReg1(SPIF_HandleTypeDef *Handle) uint8_t SPIF_ReadReg2(SPIF_HandleTypeDef *Handle) { + #if (SPIF_COMPAT == SPIF_COMPAT_W25XX) + uint8_t retVal = 0; uint8_t tx[2] = {SPIF_CMD_READSTATUS2, SPIF_DUMMY_BYTE}; uint8_t rx[2]; @@ -505,12 +581,18 @@ uint8_t SPIF_ReadReg2(SPIF_HandleTypeDef *Handle) } SPIF_CsPin(Handle, 1); return retVal; + #elif (SPIF_COMPAT == SPIF_COMPAT_IS25XX) + dprintf("SPIF_ReadReg2() not supported\r\n"); + return 0; + #endif } /***********************************************************************************************************/ uint8_t SPIF_ReadReg3(SPIF_HandleTypeDef *Handle) { + #if (SPIF_COMPAT == SPIF_COMPAT_W25XX) + uint8_t retVal = 0; uint8_t tx[2] = {SPIF_CMD_READSTATUS3, SPIF_DUMMY_BYTE}; uint8_t rx[2]; @@ -521,6 +603,10 @@ uint8_t SPIF_ReadReg3(SPIF_HandleTypeDef *Handle) } SPIF_CsPin(Handle, 1); return retVal; + #elif (SPIF_COMPAT == SPIF_COMPAT_IS25XX) + dprintf("SPIF_ReadReg3() not supported\r\n"); + return 0; + #endif } /***********************************************************************************************************/ @@ -529,9 +615,14 @@ bool SPIF_WriteReg1(SPIF_HandleTypeDef *Handle, uint8_t Data) { bool retVal = true; uint8_t tx[2] = {SPIF_CMD_WRITESTATUS1, Data}; + + #if (SPIF_COMPAT == SPIF_COMPAT_W25XX) uint8_t cmd = SPIF_CMD_WRITESTATUSEN; + #endif do { + #if (SPIF_COMPAT == SPIF_COMPAT_W25XX) + SPIF_CsPin(Handle, 0); if (SPIF_Transmit(Handle, &cmd, 1, 100) == false) { @@ -540,6 +631,14 @@ bool SPIF_WriteReg1(SPIF_HandleTypeDef *Handle, uint8_t Data) break; } SPIF_CsPin(Handle, 1); + + #elif (SPIF_COMPAT == SPIF_COMPAT_IS25XX) + if (SPIF_WriteEnable(Handle) == false){ + retVal = false; + break; + } + #endif + SPIF_CsPin(Handle, 0); if (SPIF_Transmit(Handle, tx, 2, 100) == false) { @@ -557,6 +656,8 @@ bool SPIF_WriteReg1(SPIF_HandleTypeDef *Handle, uint8_t Data) bool SPIF_WriteReg2(SPIF_HandleTypeDef *Handle, uint8_t Data) { + #if (SPIF_COMPAT == SPIF_COMPAT_W25XX) + bool retVal = true; uint8_t tx[2] = {SPIF_CMD_WRITESTATUS2, Data}; uint8_t cmd = SPIF_CMD_WRITESTATUSEN; @@ -581,12 +682,18 @@ bool SPIF_WriteReg2(SPIF_HandleTypeDef *Handle, uint8_t Data) } while (0); return retVal; + #elif (SPIF_COMPAT == SPIF_COMPAT_IS25XX) + dprintf("SPIF_WriteReg2() not supported\r\n"); + return false; + #endif } /***********************************************************************************************************/ bool SPIF_WriteReg3(SPIF_HandleTypeDef *Handle, uint8_t Data) { + #if (SPIF_COMPAT == SPIF_COMPAT_W25XX) + bool retVal = true; uint8_t tx[2] = {SPIF_CMD_WRITESTATUS3, Data}; uint8_t cmd = SPIF_CMD_WRITESTATUSEN; @@ -611,6 +718,10 @@ bool SPIF_WriteReg3(SPIF_HandleTypeDef *Handle, uint8_t Data) } while (0); return retVal; + #elif (SPIF_COMPAT == SPIF_COMPAT_IS25XX) + dprintf("SPIF_WriteReg3() not supported\r\n"); + return false; + #endif } /***********************************************************************************************************/ diff --git a/spif.h b/spif.h index 8f0aa9e..c371ec2 100644 --- a/spif.h +++ b/spif.h @@ -56,8 +56,8 @@ extern "C" #include "NimaLTD.I-CUBE-SPIF_conf.h" #if (SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI) -#include "stm32u5xx_hal.h" - #include "stm32u5xx_hal_ospi.h" + #include "stm32u5xx_hal.h" + #include "stm32u5xx_hal_ospi.h" #else #include "spi.h" #endif From f71c982b2589647b94996c4a982fbe7634fe8f32 Mon Sep 17 00:00:00 2001 From: Megh Shah Date: Sat, 3 May 2025 16:59:01 +0530 Subject: [PATCH 08/17] Changed SPIF_WaitForWriting. Added Conditional Compilation in SPIF_WaitForWriting to handle both WS25 and IS25 --- spif.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/spif.c b/spif.c index e73b15d..96982c8 100644 --- a/spif.c +++ b/spif.c @@ -738,7 +738,11 @@ bool SPIF_WaitForWriting(SPIF_HandleTypeDef *Handle, uint32_t Timeout) dprintf("SPIF_WaitForWriting() TIMEOUT\r\n"); break; } + #if (SPIF_COMPAT == SPIF_COMPAT_W25XX) if ((SPIF_ReadReg1(Handle) & SPIF_STATUS1_BUSY) == 0) + #elif (SPIF_COMPAT == SPIF_COMPAT_IS25XX) + if ((SPIF_ReadReg1(Handle) & SPIF_STATUS_WIP) == 0) + #endif { retVal = true; break; From 0ff310229140fb4c877db8252cebcb58c354a453 Mon Sep 17 00:00:00 2001 From: Megh Shah Date: Sat, 3 May 2025 17:31:51 +0530 Subject: [PATCH 09/17] Added general Cmd transmit and receive functions --- spif.c | 70 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ spif.h | 4 ++++ 2 files changed, 74 insertions(+) diff --git a/spif.c b/spif.c index 96982c8..2739347 100644 --- a/spif.c +++ b/spif.c @@ -1692,3 +1692,73 @@ bool SPIF_ReadBlock(SPIF_HandleTypeDef *Handle, uint32_t BlockNumber, uint8_t *D return retVal; } #endif + +/* + * @brief Send Command to SPIF + * @note Send command and data to SPIF + * + * @param *Handle: Pointer to SPIF_HandleTypeDef structure + * @param Cmd: Command to send + * @param *Data: Pointer to Data (input), Data can be null + * @param Size: The length of data should be written. (in byte), Size can be 0 + * + * @retval bool: true or false +*/ +bool SPIF_SendCmd(SPIF_HandleTypeDef *Handle, uint8_t Cmd, uint8_t *Data, uint32_t Size){ + bool retVal = false; + uint8_t tx[1] = {Cmd}; + SPIF_CsPin(Handle, 0); + if (SPIF_WriteEnable(Handle) == false) + { + SPIF_CsPin(Handle, 1); + dprintf("SPIF_SendCmd() Error\r\n"); + return retVal; + } + + if (SPIF_Transmit(Handle, tx, 1, 100) == false) + { + SPIF_CsPin(Handle, 1); + dprintf("SPIF_SendCmd() Error\r\n"); + return retVal; + } + + if (Data != NULL && Size > 0) + { + if (SPIF_Transmit(Handle, Data, Size, 100) == false) + { + SPIF_CsPin(Handle, 1); + dprintf("SPIF_SendCmd() Error\r\n"); + return retVal; + } + } + + SPIF_CsPin(Handle, 1); + retVal = true; + return retVal; +} + + +bool SPIF_SendCmdReceive(SPIF_HandleTypeDef *Handle, uint8_t Cmd, uint8_t *RxData, uint32_t Size) +{ + bool retVal = false; + uint8_t tx[1] = {Cmd}; + SPIF_CsPin(Handle, 0); + if (SPIF_WriteEnable(Handle) == false) + { + SPIF_CsPin(Handle, 1); + dprintf("SPIF_SendCmdReceive() Error\r\n"); + return retVal; + } + + if (SPIF_TransmitReceive(Handle, tx, RxData, Size, 100) == false) + { + SPIF_CsPin(Handle, 1); + dprintf("SPIF_SendCmdReceive() Error\r\n"); + return retVal; + } + + SPIF_WriteDisable(Handle); + SPIF_CsPin(Handle, 1); + retVal = true; + return retVal; +} \ No newline at end of file diff --git a/spif.h b/spif.h index c371ec2..6cb02f6 100644 --- a/spif.h +++ b/spif.h @@ -171,6 +171,10 @@ bool SPIF_ReadPage(SPIF_HandleTypeDef *Handle, uint32_t PageNumber, uint8_t *Dat bool SPIF_ReadSector(SPIF_HandleTypeDef *Handle, uint32_t SectorNumber, uint8_t *Data, uint32_t Size, uint32_t Offset); bool SPIF_ReadBlock(SPIF_HandleTypeDef *Handle, uint32_t BlockNumber, uint8_t *Data, uint32_t Size, uint32_t Offset); +bool SPIF_SendCmd(SPIF_HandleTypeDef *Handle, uint8_t Cmd, uint8_t *Data, uint32_t Size); +bool SPIF_SendCmdReceive(SPIF_HandleTypeDef *Handle, uint8_t Cmd, uint8_t *RxData, uint32_t Size); + + #if (SPIF_COMPAT == SPIF_COMPAT_IS25XX) bool SPIF_QPI_Enable(SPIF_HandleTypeDef *Handle); #endif From 153ab7b98c635abed3b7ffd7bbbdb1061392b712 Mon Sep 17 00:00:00 2001 From: Megh Shah Date: Wed, 14 May 2025 15:49:34 +0530 Subject: [PATCH 10/17] Split interface and compat to different files - Split the SPI and OCTOSPI interfaces into separate files - Split the compatibility layer for IS25xx and W25xx into separate files --- spif.c | 837 ++------------------------------------- spif.h | 251 ++++++------ spif_compat_is25xx.c | 161 ++++++++ spif_compat_is25xx.h | 176 ++++++++ spif_compat_w25xx.c | 222 +++++++++++ spif_compat_w25xx.h | 83 ++++ spif_interface_octospi.c | 136 +++++++ spif_interface_octospi.h | 12 + spif_interface_spi.c | 172 ++++++++ spif_interface_spi.h | 12 + 10 files changed, 1151 insertions(+), 911 deletions(-) create mode 100644 spif_compat_is25xx.c create mode 100644 spif_compat_is25xx.h create mode 100644 spif_compat_w25xx.c create mode 100644 spif_compat_w25xx.h create mode 100644 spif_interface_octospi.c create mode 100644 spif_interface_octospi.h create mode 100644 spif_interface_spi.c create mode 100644 spif_interface_spi.h diff --git a/spif.c b/spif.c index 2739347..bf43e1f 100644 --- a/spif.c +++ b/spif.c @@ -4,15 +4,10 @@ ************************************************************************************************************/ #include "spif.h" +#include +#include "NimaLTD.I-CUBE-SPIF_conf.h" -#if SPIF_DEBUG == SPIF_DEBUG_DISABLE -#define dprintf(...) -#else -#include -#define dprintf(...) printf(__VA_ARGS__) -#endif - #if SPIF_RTOS == SPIF_RTOS_DISABLE #elif SPIF_RTOS == SPIF_RTOS_CMSIS_V1 #include "cmsis_os.h" @@ -24,261 +19,20 @@ #include "app_threadx.h" #endif -/************************************************************************************************************ -************** Private Definitions -************************************************************************************************************/ -#if (SPIF_COMPAT == SPIF_COMPAT_W25XX) -#define SPIF_DUMMY_BYTE 0xA5 - -#define SPIF_CMD_READSFDP 0x5A -#define SPIF_CMD_ID 0x90 -#define SPIF_CMD_JEDECID 0x9F -#define SPIF_CMD_UNIQUEID 0x4B -#define SPIF_CMD_WRITEDISABLE 0x04 -#define SPIF_CMD_READSTATUS1 0x05 -#define SPIF_CMD_READSTATUS2 0x35 -#define SPIF_CMD_READSTATUS3 0x15 -#define SPIF_CMD_WRITESTATUSEN 0x50 -#define SPIF_CMD_WRITESTATUS1 0x01 -#define SPIF_CMD_WRITESTATUS2 0x31 -#define SPIF_CMD_WRITESTATUS3 0x11 -#define SPIF_CMD_WRITEENABLE 0x06 -#define SPIF_CMD_ADDR4BYTE_EN 0xB7 -#define SPIF_CMD_ADDR4BYTE_DIS 0xE9 -#define SPIF_CMD_PAGEPROG3ADD 0x02 -#define SPIF_CMD_PAGEPROG4ADD 0x12 -#define SPIF_CMD_READDATA3ADD 0x03 -#define SPIF_CMD_READDATA4ADD 0x13 -#define SPIF_CMD_FASTREAD3ADD 0x0B -#define SPIF_CMD_FASTREAD4ADD 0x0C -#define SPIF_CMD_SECTORERASE3ADD 0x20 -#define SPIF_CMD_SECTORERASE4ADD 0x21 -#define SPIF_CMD_BLOCKERASE3ADD 0xD8 -#define SPIF_CMD_BLOCKERASE4ADD 0xDC -#define SPIF_CMD_CHIPERASE1 0x60 -#define SPIF_CMD_CHIPERASE2 0xC7 -#define SPIF_CMD_SUSPEND 0x75 -#define SPIF_CMD_RESUME 0x7A -#define SPIF_CMD_POWERDOWN 0xB9 -#define SPIF_CMD_RELEASE 0xAB -#define SPIF_CMD_FRAMSERNO 0xC3 - -#define SPIF_STATUS1_BUSY (1 << 0) -#define SPIF_STATUS1_WEL (1 << 1) -#define SPIF_STATUS1_BP0 (1 << 2) -#define SPIF_STATUS1_BP1 (1 << 3) -#define SPIF_STATUS1_BP2 (1 << 4) -#define SPIF_STATUS1_TP (1 << 5) -#define SPIF_STATUS1_SEC (1 << 6) -#define SPIF_STATUS1_SRP0 (1 << 7) - -#define SPIF_STATUS2_SRP1 (1 << 0) -#define SPIF_STATUS2_QE (1 << 1) -#define SPIF_STATUS2_RESERVE1 (1 << 2) -#define SPIF_STATUS2_LB0 (1 << 3) -#define SPIF_STATUS2_LB1 (1 << 4) -#define SPIF_STATUS2_LB2 (1 << 5) -#define SPIF_STATUS2_CMP (1 << 6) -#define SPIF_STATUS2_SUS (1 << 7) - -#define SPIF_STATUS3_RESERVE1 (1 << 0) -#define SPIF_STATUS3_RESERVE2 (1 << 1) -#define SPIF_STATUS3_WPS (1 << 2) -#define SPIF_STATUS3_RESERVE3 (1 << 3) -#define SPIF_STATUS3_RESERVE4 (1 << 4) -#define SPIF_STATUS3_DRV0 (1 << 5) -#define SPIF_STATUS3_DRV1 (1 << 6) -#define SPIF_STATUS3_HOLD (1 << 7) +#if (SPIF_COMPAT == SPIF_COMPAT_W25XX) + #include "spif_compat_w25xx.h" #elif (SPIF_COMPAT == SPIF_COMPAT_IS25XX) + #include "spif_compat_is25xx.h" +#endif -#define SPIF_DUMMY_BYTE 0xA5 //TODO: confirm value - -#define SPIF_CMD_READDATA3ADD 0x03 -#define SPIF_CMD_READDATA4ADD 0x13 -#define SPIF_CMD_FASTREAD 0x0B -#define SPIF_CMD_FASTREAD4ADD 0x0C -#define SPIF_CMD_FASTREADDUALIO 0xBB -#define SPIF_CMD_FASTREADDUALIO4ADD 0xBC -#define SPIF_CMD_FASTREADDUALOUTPUT 0x3B -#define SPIF_CMD_FASTREADDUALOUTPUT4ADD 0x3C -#define SPIF_CMD_FASTREADQUADIO 0xEB -#define SPIF_CMD_FASTREADQUADIO4ADD 0xEC -#define SPIF_CMD_FASTREADQUADOUTPUT 0x6B -#define SPIF_CMD_FASTREADQUADOUTPUT4ADD 0x6C -#define SPIF_CMD_FASTREADDTRIO 0x0D -#define SPIF_CMD_FASTREADDTRIO4ADD 0x0E -#define SPIF_CMD_FASTREADDTRIOIO 0xBD -#define SPIF_CMD_FASTREADDTRIOIO4ADD 0xBE -#define SPIF_CMD_FASTREADQUADDTRIO 0xED -#define SPIF_CMD_FASTREADQUADDTRIO4ADD 0xEE -#define SPIF_CMD_PAGEPROG3ADD 0x02 -#define SPIF_CMD_PAGEPROG4ADD 0x12 -#define SPIF_CMD_QUADPAGEPROGRAM 0x32 -#define SPIF_CMD_QUADPAGEPROGRAM4ADD 0x34 -#define SPIF_CMD_SECTORERASE3ADD 0x20 -#define SPIF_CMD_SECTORERASE4ADD 0x21 -#define SPIF_CMD_BLOCKERASE32K 0x52 -#define SPIF_CMD_BLOCKERASE32K4ADD 0x5C -#define SPIF_CMD_BLOCKERASE64K 0xD8 -#define SPIF_CMD_BLOCKERASE64K4ADD 0xDC -#define SPIF_CMD_CHIPERASE1 0xC7 -#define SPIF_CMD_WRITEENABLE 0x06 -#define SPIF_CMD_WRITEDISABLE 0x04 -#define SPIF_CMD_READSTATUS1 0x05 -#define SPIF_CMD_WRITESTATUS1 0x01 -#define SPIF_CMD_READFNREG 0x48 -#define SPIF_CMD_WRITEFNREG 0x42 -#define SPIF_CMD_ENTERQPI 0x35 -#define SPIF_CMD_EXITQPI 0xF5 -#define SPIF_CMD_SUSPEND 0x75 -#define SPIF_CMD_RESUME 0x7A -#define SPIF_CMD_DEEPPOWERDOWN 0xB9 -#define SPIF_CMD_READID 0xAB -#define SPIF_CMD_RELEASEPOWERDOWN 0xAB -#define SPIF_CMD_SETREADPARAMNONVOLATILE 0x65 -#define SPIF_CMD_SETREADPARAMVOLATILE 0xC0 -#define SPIF_CMD_SETEXTENDEDREADPARAMNONVOLATILE 0x85 -#define SPIF_CMD_SETEXTEDEDREADPARAMVOLATILE 0x83 -#define SPIF_CMD_READREADPARAMVOLATILE 0x61 -#define SPIF_CMD_READREADEXTENDEDPARAMVOLATILE 0x81 -#define SPIF_CMD_CLEAREXTENDEDREADREG 0x82 -#define SPIF_CMD_JEDECID 0x9F -#define SPIF_CMD_READMANUFACTURERID 0x90 -#define SPIF_CMD_READJEDECIDQPI 0xAF -#define SPIF_CMD_READUNIQUEID 0x4B -#define SPIF_CMD_READSFDP 0x5A -#define SPIF_CMD_NOOP 0x00 -#define SPIF_CMD_SOFTRESETENABLE 0x66 -#define SPIF_CMD_SOFTRESET 0x99 -#define SPIF_CMD_ERASEINFOROW 0x64 -#define SPIF_CMD_PROGRAMINFOROW 0x62 -#define SPIF_CMD_READINFOROW 0x68 -#define SPIF_CMD_SECTORUNLOCK 0x26 -#define SPIF_CMD_SECTORUNLOCK4ADD 0x25 -#define SPIF_CMD_SECTORLOCK 0x24 -#define SPIF_CMD_READAUTOBOOTREG 0x14 -#define SPIF_CMD_WRITEAUTOBOOTREG 0x15 -#define SPIF_CMD_READBANKADDRESSREG 0x16 -#define SPIF_CMD_WRITEBANKADDRESSREGVOLATILE 0x17 -#define SPIF_CMD_WRITEBANKADDRESSREGNONVOLATILE 0x18 -#define SPIF_CMD_ENTER4ADD 0xB7 -#define SPIF_CMD_EXIT4ADD 0x29 -#define SPIF_CMD_READDYB 0xFA -#define SPIF_CMD_READDYB4ADD 0xE0 -#define SPIF_CMD_WRITEDYB 0xFB -#define SPIF_CMD_WRITEDYB4ADD 0xE1 -#define SPIF_CMD_READPPB 0xFC -#define SPIF_CMD_READPPB4ADD 0xE2 -#define SPIF_CMD_PROGPPB 0xFD -#define SPIF_CMD_PROGPPB4ADD 0xE3 -#define SPIF_CMD_ERASEPPB 0xE4 -#define SPIF_CMD_READASP 0x2B -#define SPIF_CMD_PROGRMASP 0x2F -#define SPIF_CMD_READPPBLOCKBIT 0xA7 -#define SPIF_CMD_WRITEPPBLOCKBIT 0xA6 -#define SPIF_CMD_SETFREEZEBIT 0x91 -#define SPIF_CMD_READPASSWORD 0xE7 -#define SPIF_CMD_PROGRAMPASSWORD 0xE8 -#define SPIF_CMD_UNLOCKPASSWORD 0xE9 -#define SPIF_CMD_SETALLDYBBITS 0x7E -#define SPIF_CMD_CLEARALLDYBBITS 0x98 - -/*status register definitions*/ -#define SPIF_STATUS_WIP (1 << 0) -#define SPIF_STATUS_WEL (1 << 1) -#define SPIF_STATUS_BP0 (1 << 2) -#define SPIF_STATUS_BP1 (1 << 3) -#define SPIF_STATUS_BP2 (1 << 4) -#define SPIF_STATUS_BP3 (1 << 5) -#define SPIF_STATUS_QE (1 << 6) -#define SPIF_STATUS_SRWD (1 << 7) - -/*Function Register definitions*/ -#define SPIF_FNREG_DEDICATEDRESET (1 << 0) -#define SPIF_FNREG_TBS (1 << 1) -#define SPIF_FNREG_PSUS (1 << 2) -#define SPIF_FNREG_ESUS (1 << 3) -#define SPIF_FNREG_IRLOCK0 (1 << 4) -#define SPIF_FNREG_IRLOCK1 (1 << 5) -#define SPIF_FNREG_IRLOCK2 (1 << 6) -#define SPIF_FNREG_IRLOCK3 (1 << 7) - -/*Read Register definitons*/ -#define SPIF_READREG_BURSTLEN0 (1 << 0) -#define SPIF_READREG_BURSTLEN1 (1 << 1) -#define SPIF_READREG_BURSTLENENABLE (1 << 2) -#define SPIF_READREG_DUMMYCYCLES0 (1 << 3) -#define SPIF_READREG_DUMMYCYCLES1 (1 << 4) -#define SPIF_READREG_DUMMYCYCLES2 (1 << 5) -#define SPIF_READREG_DUMMYCYCLES3 (1 << 6) -#define SPIF_READREG_HOLD_RESET (1 << 7) - -/*Extended Read Register definitions*/ -#define SPIF_EXTENDEDREADREG_WIP (1 << 0) -#define SPIF_EXTENDEDREADREG_PROT_E (1 << 1) -#define SPIF_EXTENDEDREADREG_P_ERR (1 << 2) -#define SPIF_EXTENDEDREADREG_E_ERR (1 << 3) -// bit 4 is reserved -#define SPIF_EXTENDEDREADREG_ODS0 (1 << 5) -#define SPIF_EXTENDEDREADREG_ODS1 (1 << 6) -#define SPIF_EXTENDEDREADREG_ODS2 (1 << 7) - -/* AutoBoot Register definitions */ -#define SPIF_AUTOBootREG_ABSA (0xFFFFFFE0) // Bits AB[31:5] - AutoBoot Start Address -#define SPIF_AUTOBootREG_ABSD (0x0000001E) // Bits AB[4:1] - AutoBoot Start Delay -#define SPIF_AUTOBootREG_ABE (1 << 0) // Bit AB[0] - AutoBoot Enable - -/* Bank Address Register*/ -#define SPIF_BANKADDRESSREG_EXTADD (1 << 7) //3-byte or 4-byte addressing selection Bit -//other bits are all reserved - -/* Advanced Sector/Block Protection Register (ASPR) definitions */ -// bit 0 is reserved -#define SPIF_ASPR_PSTMLB (1 << 1) // Persistent Protection Mode Lock Bit -#define SPIF_ASPR_PWDMLB (1 << 2) // Password Protection Mode Lock Bit -//bit 3 to 14 are reserved -#define SPIF_ASPR_TBPARM (1 << 15) // Top/Bottom Parameter Sector - -/*Password Register*/ -// TODO: define the password register bits - -/*PPB Lock Register*/ -#define SPIF_PPBLOCKREG_PPBLOCK (1 << 0) //PPB Lock Bit -//bit 1 to 6 are reserved -#define SPIF_PPBLOCKREG_FREEZE (1 << 7) - -/*PPB Register*/ -//TODO: confirm if need this definition - -/*DYB register*/ -//TODO: confirm if need this definition - +#if (SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI) + #include "spif_interface_octospi.h" +#else + #include "spif_interface_spi.h" #endif -/************************************************************************************************************ -************** Private Functions -************************************************************************************************************/ -void SPIF_Delay(uint32_t Delay); -void SPIF_Lock(SPIF_HandleTypeDef *Handle); -void SPIF_UnLock(SPIF_HandleTypeDef *Handle); -void SPIF_CsPin(SPIF_HandleTypeDef *Handle, bool Select); -bool SPIF_TransmitReceive(SPIF_HandleTypeDef *Handle, uint8_t *Tx, uint8_t *Rx, size_t Size, uint32_t Timeout); -bool SPIF_Transmit(SPIF_HandleTypeDef *Handle, uint8_t *Tx, size_t Size, uint32_t Timeout); -bool SPIF_Receive(SPIF_HandleTypeDef *Handle, uint8_t *Rx, size_t Size, uint32_t Timeout); -bool SPIF_WriteEnable(SPIF_HandleTypeDef *Handle); -bool SPIF_WriteDisable(SPIF_HandleTypeDef *Handle); -uint8_t SPIF_ReadReg1(SPIF_HandleTypeDef *Handle); -uint8_t SPIF_ReadReg2(SPIF_HandleTypeDef *Handle); -uint8_t SPIF_ReadReg3(SPIF_HandleTypeDef *Handle); -bool SPIF_WriteReg1(SPIF_HandleTypeDef *Handle, uint8_t Data); -bool SPIF_WriteReg2(SPIF_HandleTypeDef *Handle, uint8_t Data); -bool SPIF_WriteReg3(SPIF_HandleTypeDef *Handle, uint8_t Data); -bool SPIF_WaitForWriting(SPIF_HandleTypeDef *Handle, uint32_t Timeout); -bool SPIF_FindChip(SPIF_HandleTypeDef *Handle); -bool SPIF_WriteFn(SPIF_HandleTypeDef *Handle, uint32_t PageNumber, uint8_t *Data, uint32_t Size, uint32_t Offset); -bool SPIF_ReadFn(SPIF_HandleTypeDef *Handle, uint32_t Address, uint8_t *Data, uint32_t Size); /***********************************************************************************************************/ @@ -327,197 +81,6 @@ void SPIF_CsPin(SPIF_HandleTypeDef *Handle, bool Select) /***********************************************************************************************************/ -bool SPIF_TransmitReceive(SPIF_HandleTypeDef *Handle, uint8_t *Tx, uint8_t *Rx, size_t Size, uint32_t Timeout) -{ - bool retVal = false; -#if (SPIF_PLATFORM == SPIF_PLATFORM_HAL) - if (HAL_SPI_TransmitReceive(Handle->HSpi, Tx, Rx, Size, Timeout) == HAL_OK) - { - retVal = true; - } - else - { - dprintf("SPIF TIMEOUT\r\n"); - } -#elif (SPIF_PLATFORM == SPIF_PLATFORM_HAL_DMA) - uint32_t startTime = HAL_GetTick(); - if (HAL_SPI_TransmitReceive_DMA(Handle->HSpi, Tx, Rx, Size) != HAL_OK) - { - dprintf("SPIF TRANSFER ERROR\r\n"); - } - else - { - while (1) - { - SPIF_Delay(1); - if (HAL_GetTick() - startTime >= Timeout) - { - dprintf("SPIF TIMEOUT\r\n"); - HAL_SPI_DMAStop(Handle->HSpi); - break; - } - if (HAL_SPI_GetState(Handle->HSpi) == HAL_SPI_STATE_READY) - { - retVal = true; - break; - } - } - } -#elif (SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI) -OSPI_RegularCmdTypeDef sCommand = {0}; - -// Set up the command to use 4 data lines -sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; -sCommand.DataMode = HAL_OSPI_DATA_4_LINES; // 4-line data mode -sCommand.NbData = Size; // Set the number of data bytes to transmit/receive - -// Prepare the command (this could be any relevant command, like a read or write) -if (HAL_OSPI_Command(Handle->HOspi, &sCommand, Timeout) != HAL_OK) -{ - dprintf("SPIF COMMAND ERROR\r\n"); - return false; -} - if (HAL_OSPI_TransmitReceive(Handle->HOspi, Tx, Rx, Size, Timeout) == HAL_OK) - { - retVal = true; - } - else - { - dprintf("SPIF TIMEOUT\r\n"); - } -#endif - return retVal; -} - -/***********************************************************************************************************/ - -bool SPIF_Transmit(SPIF_HandleTypeDef *Handle, uint8_t *Tx, size_t Size, uint32_t Timeout) -{ - bool retVal = false; -#if (SPIF_PLATFORM == SPIF_PLATFORM_HAL) - if (HAL_SPI_Transmit(Handle->HSpi, Tx, Size, Timeout) == HAL_OK) - { - retVal = true; - } - else - { - dprintf("SPIF TIMEOUT\r\n"); - } -#elif (SPIF_PLATFORM == SPIF_PLATFORM_HAL_DMA) - uint32_t startTime = HAL_GetTick(); - if (HAL_SPI_Transmit_DMA(Handle->HSpi, Tx, Size) != HAL_OK) - { - dprintf("SPIF TRANSFER ERROR\r\n"); - } - else - { - while (1) - { - SPIF_Delay(1); - if (HAL_GetTick() - startTime >= Timeout) - { - dprintf("SPIF TIMEOUT\r\n"); - HAL_SPI_DMAStop(Handle->HSpi); - break; - } - if (HAL_SPI_GetState(Handle->HSpi) == HAL_SPI_STATE_READY) - { - retVal = true; - break; - } - } - } -#elif (SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI) -OSPI_RegularCmdTypeDef sCommand = {0}; -sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; -sCommand.DataMode = HAL_OSPI_DATA_4_LINES; // Set to 4 data lines -sCommand.NbData = Size; - -// Send the command to prepare for the transmission -if (HAL_OSPI_Command(Handle->HOspi, &sCommand, Timeout) != HAL_OK) -{ - dprintf("SPIF COMMAND ERROR\r\n"); - return false; -} - - if (HAL_OSPI_Transmit(Handle->HOspi, Tx, Timeout) == HAL_OK) - { - retVal = true; - } - else - { - dprintf("SPIF TIMEOUT\r\n"); - } -#endif - return retVal; -} - -/***********************************************************************************************************/ - -bool SPIF_Receive(SPIF_HandleTypeDef *Handle, uint8_t *Rx, size_t Size, uint32_t Timeout) -{ - bool retVal = false; -#if (SPIF_PLATFORM == SPIF_PLATFORM_HAL) - if (HAL_SPI_Receive(Handle->HSpi, Rx, Size, Timeout) == HAL_OK) - { - retVal = true; - } - else - { - dprintf("SPIF TIMEOUT\r\n"); - } -#elif (SPIF_PLATFORM == SPIF_PLATFORM_HAL_DMA) - uint32_t startTime = HAL_GetTick(); - if (HAL_SPI_Receive_DMA(Handle->HSpi, Rx, Size) != HAL_OK) - { - dprintf("SPIF TRANSFER ERROR\r\n"); - } - else - { - while (1) - { - SPIF_Delay(1); - if (HAL_GetTick() - startTime >= Timeout) - { - dprintf("SPIF TIMEOUT\r\n"); - HAL_SPI_DMAStop(Handle->HSpi); - break; - } - if (HAL_SPI_GetState(Handle->HSpi) == HAL_SPI_STATE_READY) - { - retVal = true; - break; - } - } - } -#elif (SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI) - OSPI_RegularCmdTypeDef sCommand = {0}; - - // Set up the command for receiving data with 4 data lines - sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; - sCommand.DataMode = HAL_OSPI_DATA_4_LINES; // Set to 4-line data mode - sCommand.NbData = Size; // Number of data bytes to receive - - if (HAL_OSPI_Command(Handle->HOspi, &sCommand, Timeout) != HAL_OK) - { - dprintf("SPIF COMMAND ERROR\r\n"); - return false; - } - - if (HAL_OSPI_Receive(Handle->HOspi, Rx, Timeout) == HAL_OK) - { - retVal = true; - } - else - { - dprintf("SPIF TIMEOUT\r\n"); - } -#endif - return retVal; -} - -/***********************************************************************************************************/ - bool SPIF_WriteEnable(SPIF_HandleTypeDef *Handle) { bool retVal = true; @@ -548,182 +111,6 @@ bool SPIF_WriteDisable(SPIF_HandleTypeDef *Handle) return retVal; } -/***********************************************************************************************************/ -// This reads status register 1 for SPIF_COMPAT_W25XX -// This will also read the only status register for SPIF_COMPAT_IS25XX -uint8_t SPIF_ReadReg1(SPIF_HandleTypeDef *Handle) -{ - uint8_t retVal = 0; - uint8_t tx[2] = {SPIF_CMD_READSTATUS1, SPIF_DUMMY_BYTE}; - uint8_t rx[2]; - SPIF_CsPin(Handle, 0); - if (SPIF_TransmitReceive(Handle, tx, rx, 2, 100) == true) - { - retVal = rx[1]; - } - SPIF_CsPin(Handle, 1); - return retVal; -} - -/***********************************************************************************************************/ - -uint8_t SPIF_ReadReg2(SPIF_HandleTypeDef *Handle) -{ - #if (SPIF_COMPAT == SPIF_COMPAT_W25XX) - - uint8_t retVal = 0; - uint8_t tx[2] = {SPIF_CMD_READSTATUS2, SPIF_DUMMY_BYTE}; - uint8_t rx[2]; - SPIF_CsPin(Handle, 0); - if (SPIF_TransmitReceive(Handle, tx, rx, 2, 100) == true) - { - retVal = rx[1]; - } - SPIF_CsPin(Handle, 1); - return retVal; - #elif (SPIF_COMPAT == SPIF_COMPAT_IS25XX) - dprintf("SPIF_ReadReg2() not supported\r\n"); - return 0; - #endif -} - -/***********************************************************************************************************/ - -uint8_t SPIF_ReadReg3(SPIF_HandleTypeDef *Handle) -{ - #if (SPIF_COMPAT == SPIF_COMPAT_W25XX) - - uint8_t retVal = 0; - uint8_t tx[2] = {SPIF_CMD_READSTATUS3, SPIF_DUMMY_BYTE}; - uint8_t rx[2]; - SPIF_CsPin(Handle, 0); - if (SPIF_TransmitReceive(Handle, tx, rx, 2, 100) == true) - { - retVal = rx[1]; - } - SPIF_CsPin(Handle, 1); - return retVal; - #elif (SPIF_COMPAT == SPIF_COMPAT_IS25XX) - dprintf("SPIF_ReadReg3() not supported\r\n"); - return 0; - #endif -} - -/***********************************************************************************************************/ - -bool SPIF_WriteReg1(SPIF_HandleTypeDef *Handle, uint8_t Data) -{ - bool retVal = true; - uint8_t tx[2] = {SPIF_CMD_WRITESTATUS1, Data}; - - #if (SPIF_COMPAT == SPIF_COMPAT_W25XX) - uint8_t cmd = SPIF_CMD_WRITESTATUSEN; - #endif - do - { - #if (SPIF_COMPAT == SPIF_COMPAT_W25XX) - - SPIF_CsPin(Handle, 0); - if (SPIF_Transmit(Handle, &cmd, 1, 100) == false) - { - retVal = false; - SPIF_CsPin(Handle, 1); - break; - } - SPIF_CsPin(Handle, 1); - - #elif (SPIF_COMPAT == SPIF_COMPAT_IS25XX) - if (SPIF_WriteEnable(Handle) == false){ - retVal = false; - break; - } - #endif - - SPIF_CsPin(Handle, 0); - if (SPIF_Transmit(Handle, tx, 2, 100) == false) - { - retVal = false; - SPIF_CsPin(Handle, 1); - break; - } - SPIF_CsPin(Handle, 1); - } while (0); - - return retVal; -} - -/***********************************************************************************************************/ - -bool SPIF_WriteReg2(SPIF_HandleTypeDef *Handle, uint8_t Data) -{ - #if (SPIF_COMPAT == SPIF_COMPAT_W25XX) - - bool retVal = true; - uint8_t tx[2] = {SPIF_CMD_WRITESTATUS2, Data}; - uint8_t cmd = SPIF_CMD_WRITESTATUSEN; - do - { - SPIF_CsPin(Handle, 0); - if (SPIF_Transmit(Handle, &cmd, 1, 100) == false) - { - retVal = false; - SPIF_CsPin(Handle, 1); - break; - } - SPIF_CsPin(Handle, 1); - SPIF_CsPin(Handle, 0); - if (SPIF_Transmit(Handle, tx, 2, 100) == false) - { - retVal = false; - SPIF_CsPin(Handle, 1); - break; - } - SPIF_CsPin(Handle, 1); - } while (0); - - return retVal; - #elif (SPIF_COMPAT == SPIF_COMPAT_IS25XX) - dprintf("SPIF_WriteReg2() not supported\r\n"); - return false; - #endif -} - -/***********************************************************************************************************/ - -bool SPIF_WriteReg3(SPIF_HandleTypeDef *Handle, uint8_t Data) -{ - #if (SPIF_COMPAT == SPIF_COMPAT_W25XX) - - bool retVal = true; - uint8_t tx[2] = {SPIF_CMD_WRITESTATUS3, Data}; - uint8_t cmd = SPIF_CMD_WRITESTATUSEN; - do - { - SPIF_CsPin(Handle, 0); - if (SPIF_Transmit(Handle, &cmd, 1, 100) == false) - { - retVal = false; - SPIF_CsPin(Handle, 1); - break; - } - SPIF_CsPin(Handle, 1); - SPIF_CsPin(Handle, 0); - if (SPIF_Transmit(Handle, tx, 2, 100) == false) - { - retVal = false; - SPIF_CsPin(Handle, 1); - break; - } - SPIF_CsPin(Handle, 1); - } while (0); - - return retVal; - #elif (SPIF_COMPAT == SPIF_COMPAT_IS25XX) - dprintf("SPIF_WriteReg3() not supported\r\n"); - return false; - #endif -} - /***********************************************************************************************************/ bool SPIF_WaitForWriting(SPIF_HandleTypeDef *Handle, uint32_t Timeout) @@ -739,9 +126,9 @@ bool SPIF_WaitForWriting(SPIF_HandleTypeDef *Handle, uint32_t Timeout) break; } #if (SPIF_COMPAT == SPIF_COMPAT_W25XX) - if ((SPIF_ReadReg1(Handle) & SPIF_STATUS1_BUSY) == 0) + if ((SPIF_W25XX_ReadReg1(Handle) & SPIF_STATUS1_BUSY) == 0) #elif (SPIF_COMPAT == SPIF_COMPAT_IS25XX) - if ((SPIF_ReadReg1(Handle) & SPIF_STATUS_WIP) == 0) + if ((SPIF_IS25_ReadReg1(Handle) & SPIF_STATUS_WIP) == 0) #endif { retVal = true; @@ -894,6 +281,32 @@ bool SPIF_FindChip(SPIF_HandleTypeDef *Handle) return retVal; } + +bool SPIF_TransmitReceive(SPIF_HandleTypeDef *Handle, uint8_t *Tx, uint8_t *Rx, size_t Size, uint32_t Timeout){ +#if (SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI) + return SPIF_OCTOSPI_TransmitReceive(Handle, Tx, Rx, Size, Timeout); +#else + return SPIF_SPI_TransmitReceive(Handle, Tx, Rx, Size, Timeout); +#endif +} + +bool SPIF_Transmit(SPIF_HandleTypeDef *Handle, uint8_t *Tx, size_t Size, uint32_t Timeout){ +#if (SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI) + return SPIF_OCTOSPI_Transmit(Handle, Tx, Size, Timeout); +#else + return SPIF_SPI_Transmit(Handle, Tx, Size, Timeout); +#endif +} + +bool SPIF_Receive(SPIF_HandleTypeDef *Handle, uint8_t *Rx, size_t Size, uint32_t Timeout){ +#if (SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI) + return SPIF_OCTOSPI_Receive(Handle, Rx, Size, Timeout); +#else + return SPIF_SPI_Receive(Handle, Rx, Size, Timeout); +#endif +} + + /***********************************************************************************************************/ bool SPIF_WriteFn(SPIF_HandleTypeDef *Handle, uint32_t PageNumber, uint8_t *Data, uint32_t Size, uint32_t Offset) @@ -1085,106 +498,6 @@ bool SPIF_ReadFn(SPIF_HandleTypeDef *Handle, uint32_t Address, uint8_t *Data, ui /************************************************************************************************************ ************** Public Functions ************************************************************************************************************/ -#if (SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI) -/** - * @brief Initialize the SPIF. - * @note Enable and configure the OCTOSPI and Set GPIO as output for CS pin on the CubeMX - * - * @param *Handle: Pointer to SPIF_HandleTypeDef structure - * @param *HOSpi: Pointer to a OSPI_HandleTypeDef structure - * @param *Gpio: Pointer to a GPIO_TypeDef structure for CS - * @param Pin: Pin of CS - * - * @retval bool: true or false - */ - bool SPIF_OCTOSPI_Init(SPIF_HandleTypeDef *Handle, OSPI_HandleTypeDef *HOspi, GPIO_TypeDef *Gpio, uint16_t Pin) - { - bool retVal = false; - do - { - if ((Handle == NULL) || (HOspi == NULL) || (Gpio == NULL) || (Handle->Inited == 1)) - { - dprintf("SPIF_Init() Error, Wrong Parameter\r\n"); - break; - } - memset(Handle, 0, sizeof(SPIF_HandleTypeDef)); - Handle->HOspi = HOspi; - Handle->Gpio = Gpio; - Handle->Pin = Pin; - SPIF_CsPin(Handle, 1); - /* wait for stable VCC */ - while (HAL_GetTick() < 20) - { - SPIF_Delay(1); - } - if (SPIF_WriteDisable(Handle) == false) - { - break; - } - retVal = SPIF_FindChip(Handle); - if (retVal) - { - Handle->Inited = 1; - dprintf("SPIF_OCTOSPI_Init() Done\r\n"); - } - - } while (0); - - return retVal; - } - -#else - -/** - * @brief Initialize the SPIF. - * @note Enable and configure the SPI and Set GPIO as output for CS pin on the CubeMX - * - * @param *Handle: Pointer to SPIF_HandleTypeDef structure - * @param *HSpi: Pointer to a SPI_HandleTypeDef structure - * @param *Gpio: Pointer to a GPIO_TypeDef structure for CS - * @param Pin: Pin of CS - * - * @retval bool: true or false - */ -bool SPIF_Init(SPIF_HandleTypeDef *Handle, SPI_HandleTypeDef *HSpi, GPIO_TypeDef *Gpio, uint16_t Pin) -{ - bool retVal = false; - do - { - if ((Handle == NULL) || (HSpi == NULL) || (Gpio == NULL) || (Handle->Inited == 1)) - { - dprintf("SPIF_Init() Error, Wrong Parameter\r\n"); - break; - } - memset(Handle, 0, sizeof(SPIF_HandleTypeDef)); - Handle->HSpi = HSpi; - Handle->Gpio = Gpio; - Handle->Pin = Pin; - SPIF_CsPin(Handle, 1); - /* wait for stable VCC */ - while (HAL_GetTick() < 20) - { - SPIF_Delay(1); - } - if (SPIF_WriteDisable(Handle) == false) - { - break; - } - retVal = SPIF_FindChip(Handle); - if (retVal) - { - Handle->Inited = 1; - dprintf("SPIF_Init() Done\r\n"); - } - - } while (0); - - return retVal; -} - -#endif - -/***********************************************************************************************************/ /** * @brief Full Erase chip. @@ -1303,78 +616,6 @@ bool SPIF_EraseSector(SPIF_HandleTypeDef *Handle, uint32_t Sector) /***********************************************************************************************************/ -/** - * @brief Erase Block. - * @note Send the Erase-Block command and wait for completion - * - * @param *Handle: Pointer to SPIF_HandleTypeDef structure - * @param Sector: Selected Block - * - * @retval bool: true or false - */ -bool SPIF_EraseBlock(SPIF_HandleTypeDef *Handle, uint32_t Block) -{ - SPIF_Lock(Handle); - bool retVal = false; - uint32_t address = Block * SPIF_BLOCK_SIZE; - uint8_t tx[5]; - do - { -#if SPIF_DEBUG != SPIF_DEBUG_DISABLE - uint32_t dbgTime = HAL_GetTick(); -#endif - dprintf("SPIF_EraseBlock() START PAGE %ld\r\n", Block); - if (Block >= Handle->BlockCnt) - { - dprintf("SPIF_EraseBlock() ERROR Block NUMBER\r\n"); - break; - } - if (SPIF_WriteEnable(Handle) == false) - { - break; - } - SPIF_CsPin(Handle, 0); - if (Handle->BlockCnt >= 512) - { - tx[0] = SPIF_CMD_BLOCKERASE4ADD; - tx[1] = (address & 0xFF000000) >> 24; - tx[2] = (address & 0x00FF0000) >> 16; - tx[3] = (address & 0x0000FF00) >> 8; - tx[4] = (address & 0x000000FF); - if (SPIF_Transmit(Handle, tx, 5, 100) == false) - { - SPIF_CsPin(Handle, 1); - break; - } - } - else - { - tx[0] = SPIF_CMD_BLOCKERASE3ADD; - tx[1] = (address & 0x00FF0000) >> 16; - tx[2] = (address & 0x0000FF00) >> 8; - tx[3] = (address & 0x000000FF); - if (SPIF_Transmit(Handle, tx, 4, 100) == false) - { - SPIF_CsPin(Handle, 1); - break; - } - } - SPIF_CsPin(Handle, 1); - if (SPIF_WaitForWriting(Handle, 3000)) - { - dprintf("SPIF_EraseBlock() DONE AFTER %ld ms\r\n", HAL_GetTick() - dbgTime); - retVal = true; - } - - } while (0); - - SPIF_WriteDisable(Handle); - SPIF_UnLock(Handle); - return retVal; -} - -/***********************************************************************************************************/ - /** * @brief Write data array to an Address * @note Write a data array with specified size. @@ -1761,4 +1002,4 @@ bool SPIF_SendCmdReceive(SPIF_HandleTypeDef *Handle, uint8_t Cmd, uint8_t *RxDat SPIF_CsPin(Handle, 1); retVal = true; return retVal; -} \ No newline at end of file +} diff --git a/spif.h b/spif.h index 6cb02f6..471de68 100644 --- a/spif.h +++ b/spif.h @@ -3,68 +3,74 @@ /*********************************************************************************************************** - Author: Nima Askari - Github: https://www.github.com/NimaLTD - LinkedIn: https://www.linkedin.com/in/nimaltd - Youtube: https://www.youtube.com/@nimaltd - Instagram: https://instagram.com/github.NimaLTD + Author: Nima Askari + Github: https://www.github.com/NimaLTD + LinkedIn: https://www.linkedin.com/in/nimaltd + Youtube: https://www.youtube.com/@nimaltd + Instagram: https://instagram.com/github.NimaLTD - Version: 2.3.1 + Version: 2.3.1 - History: - - 2.3.1 - - Fixed SPIF_WriteSector() and SPIF_WriteBlock() - - 2.3.0 - - Added ThreadX Configuration + History: - 2.2.2 - - Compile error + 2.3.1 + - Fixed SPIF_WriteSector() and SPIF_WriteBlock() - 2.2.1 - - Updated SPIF_WriteAddress() + 2.3.0 + - Added ThreadX Configuration - - 2.2.0 - - Added SPI_Trasmit and SPI_Receive again :) + 2.2.2 + - Compile error - 2.1.0 - - Added Support HAL-DMA - - Removed SPI_Trasmit function + 2.2.1 + - Updated SPIF_WriteAddress() - 2.0.1 - - Removed SPI_Receive function - 2.0.0 - - Rewrite again - - Supported STM32CubeMx Packet installer + 2.2.0 + - Added SPI_Trasmit and SPI_Receive again :) -***********************************************************************************************************/ + 2.1.0 + - Added Support HAL-DMA + - Removed SPI_Trasmit function + + 2.0.1 + - Removed SPI_Receive function + + 2.0.0 + - Rewrite again + - Supported STM32CubeMx Packet installer + + ***********************************************************************************************************/ #ifdef __cplusplus extern "C" { #endif +#if SPIF_DEBUG == SPIF_DEBUG_DISABLE +#define dprintf(...) +#else +#include +#define dprintf(...) printf(__VA_ARGS__) +#endif /************************************************************************************************************ -************** Include Headers -************************************************************************************************************/ + ************** Include Headers + ************************************************************************************************************/ #include #include #include "NimaLTD.I-CUBE-SPIF_conf.h" #if (SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI) - #include "stm32u5xx_hal.h" - #include "stm32u5xx_hal_ospi.h" +// #include "stm32u5xx_hal.h" +#include "ospi.h" #else #include "spi.h" #endif /************************************************************************************************************ -************** Public Definitions -************************************************************************************************************/ + ************** Public Definitions + ************************************************************************************************************/ #define SPIF_PAGE_SIZE 0x100 #define SPIF_SECTOR_SIZE 0x1000 @@ -83,101 +89,120 @@ extern "C" #define SPIF_AddressToBlock(Address) ((Address) / SPIF_BLOCK_SIZE) /************************************************************************************************************ -************** Public struct/enum -************************************************************************************************************/ - - -typedef enum -{ - SPIF_MANUFACTOR_ERROR = 0, - SPIF_MANUFACTOR_WINBOND = 0xEF, - SPIF_MANUFACTOR_ISSI = 0xD5, - SPIF_MANUFACTOR_MICRON = 0x20, - SPIF_MANUFACTOR_GIGADEVICE = 0xC8, - SPIF_MANUFACTOR_MACRONIX = 0xC2, - SPIF_MANUFACTOR_SPANSION = 0x01, - SPIF_MANUFACTOR_AMIC = 0x37, - SPIF_MANUFACTOR_SST = 0xBF, - SPIF_MANUFACTOR_HYUNDAI = 0xAD, - SPIF_MANUFACTOR_ATMEL = 0x1F, - SPIF_MANUFACTOR_FUDAN = 0xA1, - SPIF_MANUFACTOR_ESMT = 0x8C, - SPIF_MANUFACTOR_INTEL = 0x89, - SPIF_MANUFACTOR_SANYO = 0x62, - SPIF_MANUFACTOR_FUJITSU = 0x04, - SPIF_MANUFACTOR_EON = 0x1C, - SPIF_MANUFACTOR_PUYA = 0x85, + ************** Public struct/enum + ************************************************************************************************************/ + +typedef enum { + SPIF_MANUFACTOR_ERROR = 0, + SPIF_MANUFACTOR_WINBOND = 0xEF, + SPIF_MANUFACTOR_ISSI = 0xD5, + SPIF_MANUFACTOR_MICRON = 0x20, + SPIF_MANUFACTOR_GIGADEVICE = 0xC8, + SPIF_MANUFACTOR_MACRONIX = 0xC2, + SPIF_MANUFACTOR_SPANSION = 0x01, + SPIF_MANUFACTOR_AMIC = 0x37, + SPIF_MANUFACTOR_SST = 0xBF, + SPIF_MANUFACTOR_HYUNDAI = 0xAD, + SPIF_MANUFACTOR_ATMEL = 0x1F, + SPIF_MANUFACTOR_FUDAN = 0xA1, + SPIF_MANUFACTOR_ESMT = 0x8C, + SPIF_MANUFACTOR_INTEL = 0x89, + SPIF_MANUFACTOR_SANYO = 0x62, + SPIF_MANUFACTOR_FUJITSU = 0x04, + SPIF_MANUFACTOR_EON = 0x1C, + SPIF_MANUFACTOR_PUYA = 0x85, } SPIF_ManufactorTypeDef; -typedef enum -{ - SPIF_SIZE_ERROR = 0, - SPIF_SIZE_1MBIT = 0x11, - SPIF_SIZE_2MBIT = 0x12, - SPIF_SIZE_4MBIT = 0x13, - SPIF_SIZE_8MBIT = 0x14, - SPIF_SIZE_16MBIT = 0x15, - SPIF_SIZE_32MBIT = 0x16, - SPIF_SIZE_64MBIT = 0x17, - SPIF_SIZE_128MBIT = 0x18, - SPIF_SIZE_256MBIT = 0x19, - SPIF_SIZE_512MBIT = 0x20, +typedef enum { + SPIF_SIZE_ERROR = 0, + SPIF_SIZE_1MBIT = 0x11, + SPIF_SIZE_2MBIT = 0x12, + SPIF_SIZE_4MBIT = 0x13, + SPIF_SIZE_8MBIT = 0x14, + SPIF_SIZE_16MBIT = 0x15, + SPIF_SIZE_32MBIT = 0x16, + SPIF_SIZE_64MBIT = 0x17, + SPIF_SIZE_128MBIT = 0x18, + SPIF_SIZE_256MBIT = 0x19, + SPIF_SIZE_512MBIT = 0x20, } SPIF_SizeTypeDef; -typedef struct -{ - #if (SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI) - OSPI_HandleTypeDef *HOspi; - #else - SPI_HandleTypeDef *HSpi; - #endif +typedef struct { +// #if (SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI) +// OSPI_HandleTypeDef *HOspi; +// #else +// SPI_HandleTypeDef *HSpi; +// #endif // SPI_HandleTypeDef *HSpi; - GPIO_TypeDef *Gpio; - SPIF_ManufactorTypeDef Manufactor; - SPIF_SizeTypeDef Size; - uint8_t Inited; - uint8_t MemType; - uint8_t Lock; - uint8_t Reserved; - uint32_t Pin; - uint32_t PageCnt; - uint32_t SectorCnt; - uint32_t BlockCnt; + void *interface; + GPIO_TypeDef *Gpio; + SPIF_ManufactorTypeDef Manufactor; + SPIF_SizeTypeDef Size; + uint8_t Inited; + uint8_t MemType; + uint8_t Lock; + uint8_t Reserved; + uint32_t Pin; + uint32_t PageCnt; + uint32_t SectorCnt; + uint32_t BlockCnt; } SPIF_HandleTypeDef; /************************************************************************************************************ -************** Public Functions -************************************************************************************************************/ -#if (SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI) -bool SPIF_OCTOSPI_Init(SPIF_HandleTypeDef *Handle, OSPI_HandleTypeDef *HOspi, GPIO_TypeDef *Gpio, uint16_t Pin); -#else -bool SPIF_Init(SPIF_HandleTypeDef *Handle, SPI_HandleTypeDef *HSpi, GPIO_TypeDef *Gpio, uint16_t Pin); -#endif + ************** Public Functions + ************************************************************************************************************/ +/*helper functions*/ -bool SPIF_EraseChip(SPIF_HandleTypeDef *Handle); -bool SPIF_EraseSector(SPIF_HandleTypeDef *Handle, uint32_t Sector); -bool SPIF_EraseBlock(SPIF_HandleTypeDef *Handle, uint32_t Block); +void SPIF_Delay(uint32_t Delay); +void SPIF_Lock(SPIF_HandleTypeDef *Handle); +void SPIF_UnLock(SPIF_HandleTypeDef *Handle); +void SPIF_CsPin(SPIF_HandleTypeDef *Handle, bool Select); +bool SPIF_WriteEnable(SPIF_HandleTypeDef *Handle); +bool SPIF_WriteDisable(SPIF_HandleTypeDef *Handle); +bool SPIF_WaitForWriting(SPIF_HandleTypeDef *Handle, uint32_t Timeout); +bool SPIF_FindChip(SPIF_HandleTypeDef *Handle); -bool SPIF_WriteAddress(SPIF_HandleTypeDef *Handle, uint32_t Address, uint8_t *Data, uint32_t Size); -bool SPIF_WritePage(SPIF_HandleTypeDef *Handle, uint32_t PageNumber, uint8_t *Data, uint32_t Size, uint32_t Offset); -bool SPIF_WriteSector(SPIF_HandleTypeDef *Handle, uint32_t SectorNumber, uint8_t *Data, uint32_t Size, uint32_t Offset); -bool SPIF_WriteBlock(SPIF_HandleTypeDef *Handle, uint32_t BlockNumber, uint8_t *Data, uint32_t Size, uint32_t Offset); +bool SPIF_TransmitReceive(SPIF_HandleTypeDef *Handle, uint8_t *Tx, uint8_t *Rx, size_t Size, uint32_t Timeout); +bool SPIF_Transmit(SPIF_HandleTypeDef *Handle, uint8_t *Tx, size_t Size, uint32_t Timeout); +bool SPIF_Receive(SPIF_HandleTypeDef *Handle, uint8_t *Rx, size_t Size, uint32_t Timeout); -bool SPIF_ReadAddress(SPIF_HandleTypeDef *Handle, uint32_t Address, uint8_t *Data, uint32_t Size); -bool SPIF_ReadPage(SPIF_HandleTypeDef *Handle, uint32_t PageNumber, uint8_t *Data, uint32_t Size, uint32_t Offset); -bool SPIF_ReadSector(SPIF_HandleTypeDef *Handle, uint32_t SectorNumber, uint8_t *Data, uint32_t Size, uint32_t Offset); -bool SPIF_ReadBlock(SPIF_HandleTypeDef *Handle, uint32_t BlockNumber, uint8_t *Data, uint32_t Size, uint32_t Offset); -bool SPIF_SendCmd(SPIF_HandleTypeDef *Handle, uint8_t Cmd, uint8_t *Data, uint32_t Size); -bool SPIF_SendCmdReceive(SPIF_HandleTypeDef *Handle, uint8_t Cmd, uint8_t *RxData, uint32_t Size); +// Initialization +//bool SPIF_Init(SPIF_HandleTypeDef *Handle, void *InterfaceHandle, GPIO_TypeDef *Gpio, uint16_t Pin); +// Erase operations +bool SPIF_EraseChip(SPIF_HandleTypeDef *Handle); +bool SPIF_EraseSector(SPIF_HandleTypeDef *Handle, uint32_t Sector); +bool SPIF_EraseBlock(SPIF_HandleTypeDef *Handle, uint32_t Block); -#if (SPIF_COMPAT == SPIF_COMPAT_IS25XX) -bool SPIF_QPI_Enable(SPIF_HandleTypeDef *Handle); -#endif +// Write operations +bool SPIF_WriteAddress(SPIF_HandleTypeDef *Handle, uint32_t Address, + uint8_t *Data, uint32_t Size); +bool SPIF_WritePage(SPIF_HandleTypeDef *Handle, uint32_t PageNumber, + uint8_t *Data, uint32_t Size, uint32_t Offset); +bool SPIF_WriteSector(SPIF_HandleTypeDef *Handle, uint32_t SectorNumber, + uint8_t *Data, uint32_t Size, uint32_t Offset); +bool SPIF_WriteBlock(SPIF_HandleTypeDef *Handle, uint32_t BlockNumber, + uint8_t *Data, uint32_t Size, uint32_t Offset); + +// Read operations +bool SPIF_ReadAddress(SPIF_HandleTypeDef *Handle, uint32_t Address, + uint8_t *Data, uint32_t Size); +bool SPIF_ReadPage(SPIF_HandleTypeDef *Handle, uint32_t PageNumber, + uint8_t *Data, uint32_t Size, uint32_t Offset); +bool SPIF_ReadSector(SPIF_HandleTypeDef *Handle, uint32_t SectorNumber, + uint8_t *Data, uint32_t Size, uint32_t Offset); +bool SPIF_ReadBlock(SPIF_HandleTypeDef *Handle, uint32_t BlockNumber, + uint8_t *Data, uint32_t Size, uint32_t Offset); + +// Command operations +bool SPIF_SendCmd(SPIF_HandleTypeDef *Handle, uint8_t Cmd, uint8_t *Data, + uint32_t Size); +bool SPIF_SendCmdReceive(SPIF_HandleTypeDef *Handle, uint8_t Cmd, + uint8_t *RxData, uint32_t Size); #ifdef __cplusplus } diff --git a/spif_compat_is25xx.c b/spif_compat_is25xx.c new file mode 100644 index 0000000..e9dcc29 --- /dev/null +++ b/spif_compat_is25xx.c @@ -0,0 +1,161 @@ +#include "spif_compat_is25xx.h" +#include "spif.h" +#include "NimaLTD.I-CUBE-SPIF_conf.h" + +#if (SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI) + #include "spif_interface_octospi.h" +#else + #include "spif_interface_spi.h" +#endif + + + + + +uint8_t SPIF_IS25_ReadReg1(SPIF_HandleTypeDef *Handle) +{ + uint8_t retVal = 0; + uint8_t tx[2] = {SPIF_CMD_READSTATUS1, SPIF_DUMMY_BYTE}; + uint8_t rx[2]; + SPIF_CsPin(Handle, 0); + if (SPIF_TransmitReceive(Handle, tx, rx, 2, 100) == true) + { + retVal = rx[1]; + } + SPIF_CsPin(Handle, 1); + return retVal; +} + +bool SPIF_IS25_WriteReg1(SPIF_HandleTypeDef *Handle, uint8_t Data) +{ + bool retVal = true; + uint8_t tx[2] = {SPIF_CMD_WRITESTATUS1, Data}; + + do + { + + if (SPIF_WriteEnable(Handle) == false){ + retVal = false; + break; + } + + SPIF_CsPin(Handle, 0); + if (SPIF_Transmit(Handle, tx, 2, 100) == false) + { + retVal = false; + SPIF_CsPin(Handle, 1); + break; + } + SPIF_CsPin(Handle, 1); + } while (0); + + return retVal; +} + + +/* + * @brief Write QPI Enable command + * @note Send the QPI-Enable command + * + * @param *Handle: Pointer to SPIF_HandleTypeDef structure + * @retval bool: true or false + */ +bool SPIF_IS25_QPI_Enable(SPIF_HandleTypeDef *Handle) +{ + bool retVal = true; + uint8_t tx[1] = {SPIF_CMD_ENTERQPI}; + SPIF_CsPin(Handle, 0); + if (SPIF_Transmit(Handle, tx, 1, 100) == false) + { + retVal = false; + dprintf("SPIF_IS25_QPI_Enable() Error\r\n"); + } + SPIF_CsPin(Handle, 1); + return retVal; + } + + + +/** + * @brief Erase 32K Block. + * @note Send the Erase-Block command and wait for completion + * + * @param *Handle: Pointer to SPIF_HandleTypeDef structure + * @param Sector: Selected Block + * + * @retval bool: true or false + */ +bool SPIF_IS25XX_EraseBlock_32K(SPIF_HandleTypeDef *Handle, uint32_t Block) +{ + SPIF_Lock(Handle); + bool retVal = false; + uint32_t address = Block * SPIF_BLOCK_SIZE; + uint8_t tx[5]; + do + { +#if SPIF_DEBUG != SPIF_DEBUG_DISABLE + uint32_t dbgTime = HAL_GetTick(); +#endif + dprintf("SPIF_EraseBlock() START PAGE %ld\r\n", Block); + if (Block >= Handle->BlockCnt) + { + dprintf("SPIF_EraseBlock() ERROR Block NUMBER\r\n"); + break; + } + if (SPIF_WriteEnable(Handle) == false) + { + break; + } + SPIF_CsPin(Handle, 0); + if (Handle->BlockCnt >= 512) + { + tx[0] = SPIF_CMD_BLOCKERASE32K4ADD; + tx[1] = (address & 0xFF000000) >> 24; + tx[2] = (address & 0x00FF0000) >> 16; + tx[3] = (address & 0x0000FF00) >> 8; + tx[4] = (address & 0x000000FF); + if (SPIF_Transmit(Handle, tx, 5, 100) == false) + { + SPIF_CsPin(Handle, 1); + break; + } + } + else + { + tx[0] = SPIF_CMD_BLOCKERASE32K3ADD; + tx[1] = (address & 0x00FF0000) >> 16; + tx[2] = (address & 0x0000FF00) >> 8; + tx[3] = (address & 0x000000FF); + if (SPIF_Transmit(Handle, tx, 4, 100) == false) + { + SPIF_CsPin(Handle, 1); + break; + } + } + SPIF_CsPin(Handle, 1); + if (SPIF_WaitForWriting(Handle, 3000)) + { + dprintf("SPIF_EraseBlock() DONE AFTER %ld ms\r\n", HAL_GetTick() - dbgTime); + retVal = true; + } + + } while (0); + + SPIF_WriteDisable(Handle); + SPIF_UnLock(Handle); + return retVal; +} + +/** + * @brief Erase 64K Block. + * @note Send the Erase-Block command and wait for completion + * + * @param *Handle: Pointer to SPIF_HandleTypeDef structure + * @param Sector: Selected Block + * + * @retval bool: true or false + */ +bool SPIF_IS25XX_EraseBlock_64K(SPIF_HandleTypeDef *Handle, uint32_t Block){ + //to be implemented + __NOP(); +} diff --git a/spif_compat_is25xx.h b/spif_compat_is25xx.h new file mode 100644 index 0000000..e7997ba --- /dev/null +++ b/spif_compat_is25xx.h @@ -0,0 +1,176 @@ +#ifndef _SPIF_COMPAT_IS25_H_ +#define _SPIF_COMPAT_IS25_H_ + +#include "spif.h" +#include "NimaLTD.I-CUBE-SPIF_conf.h" +/*Register Definitions for IS25XX*/ + +#define SPIF_DUMMY_BYTE 0xA5 //TODO: confirm value + +#define SPIF_CMD_READDATA3ADD 0x03 +#define SPIF_CMD_READDATA4ADD 0x13 +#define SPIF_CMD_FASTREAD3ADD 0x0B +#define SPIF_CMD_FASTREAD4ADD 0x0C +#define SPIF_CMD_FASTREADDUALIO3ADD 0xBB +#define SPIF_CMD_FASTREADDUALIO4ADD 0xBC +#define SPIF_CMD_FASTREADDUALOUTPUT3ADD 0x3B +#define SPIF_CMD_FASTREADDUALOUTPUT4ADD 0x3C +#define SPIF_CMD_FASTREADQUADIO3ADD 0xEB +#define SPIF_CMD_FASTREADQUADIO4ADD 0xEC +#define SPIF_CMD_FASTREADQUADOUTPUT3ADD 0x6B +#define SPIF_CMD_FASTREADQUADOUTPUT4ADD 0x6C +#define SPIF_CMD_FASTREADDTRIO3ADD 0x0D +#define SPIF_CMD_FASTREADDTRIO4ADD 0x0E +#define SPIF_CMD_FASTREADDTRDUALIO3ADD 0xBD +#define SPIF_CMD_FASTREADDTRDUALIO4ADD 0xBE +#define SPIF_CMD_FASTREADQUADDTRIO3ADD 0xED +#define SPIF_CMD_FASTREADQUADDTRIO4ADD 0xEE +#define SPIF_CMD_PAGEPROG3ADD 0x02 +#define SPIF_CMD_PAGEPROG4ADD 0x12 +#define SPIF_CMD_QUADPAGEPROGRAM3ADD 0x32 +#define SPIF_CMD_QUADPAGEPROGRAM4ADD 0x34 +#define SPIF_CMD_SECTORERASE3ADD 0x20 +#define SPIF_CMD_SECTORERASE4ADD 0x21 +#define SPIF_CMD_BLOCKERASE32K3ADD 0x52 +#define SPIF_CMD_BLOCKERASE32K4ADD 0x5C +#define SPIF_CMD_BLOCKERASE64K3ADD 0xD8 +#define SPIF_CMD_BLOCKERASE64K4ADD 0xDC +#define SPIF_CMD_CHIPERASE1 0xC7 +#define SPIF_CMD_WRITEENABLE 0x06 +#define SPIF_CMD_WRITEDISABLE 0x04 +#define SPIF_CMD_READSTATUS1 0x05 +#define SPIF_CMD_WRITESTATUS1 0x01 +#define SPIF_CMD_READFNREG 0x48 +#define SPIF_CMD_WRITEFNREG 0x42 +#define SPIF_CMD_ENTERQPI 0x35 +#define SPIF_CMD_EXITQPI 0xF5 +#define SPIF_CMD_SUSPEND 0x75 +#define SPIF_CMD_RESUME 0x7A +#define SPIF_CMD_DEEPPOWERDOWN 0xB9 +#define SPIF_CMD_READID 0xAB +#define SPIF_CMD_RELEASEPOWERDOWN 0xAB +#define SPIF_CMD_SETREADPARAMNONVOLATILE 0x65 +#define SPIF_CMD_SETREADPARAMVOLATILE 0xC0 +#define SPIF_CMD_SETEXTENDEDREADPARAMNONVOLATILE 0x85 +#define SPIF_CMD_SETEXTEDEDREADPARAMVOLATILE 0x83 +#define SPIF_CMD_READREADPARAMVOLATILE 0x61 +#define SPIF_CMD_READREADEXTENDEDPARAMVOLATILE 0x81 +#define SPIF_CMD_CLEAREXTENDEDREADREG 0x82 +#define SPIF_CMD_JEDECID 0x9F +#define SPIF_CMD_READMANUFACTURERID 0x90 +#define SPIF_CMD_READJEDECIDQPI 0xAF +#define SPIF_CMD_READUNIQUEID 0x4B +#define SPIF_CMD_READSFDP 0x5A +#define SPIF_CMD_NOOP 0x00 +#define SPIF_CMD_SOFTRESETENABLE 0x66 +#define SPIF_CMD_SOFTRESET 0x99 +#define SPIF_CMD_ERASEINFOROW 0x64 +#define SPIF_CMD_PROGRAMINFOROW 0x62 +#define SPIF_CMD_READINFOROW 0x68 +#define SPIF_CMD_SECTORUNLOCK3ADD 0x26 +#define SPIF_CMD_SECTORUNLOCK4ADD 0x25 +#define SPIF_CMD_SECTORLOCK 0x24 +#define SPIF_CMD_READAUTOBOOTREG 0x14 +#define SPIF_CMD_WRITEAUTOBOOTREG 0x15 +#define SPIF_CMD_READBANKADDRESSREG 0x16 +#define SPIF_CMD_WRITEBANKADDRESSREGVOLATILE 0x17 +#define SPIF_CMD_WRITEBANKADDRESSREGNONVOLATILE 0x18 +#define SPIF_CMD_ENTER4ADD 0xB7 +#define SPIF_CMD_EXIT4ADD 0x29 +#define SPIF_CMD_READDYB3ADD 0xFA +#define SPIF_CMD_READDYB4ADD 0xE0 +#define SPIF_CMD_WRITEDYB3ADD 0xFB +#define SPIF_CMD_WRITEDYB4ADD 0xE1 +#define SPIF_CMD_READPPB3ADD 0xFC +#define SPIF_CMD_READPPB4ADD 0xE2 +#define SPIF_CMD_PROGPPB3ADD 0xFD +#define SPIF_CMD_PROGPPB4ADD 0xE3 +#define SPIF_CMD_ERASEPPB 0xE4 +#define SPIF_CMD_READASP 0x2B +#define SPIF_CMD_PROGRMASP 0x2F +#define SPIF_CMD_READPPBLOCKBIT 0xA7 +#define SPIF_CMD_WRITEPPBLOCKBIT 0xA6 +#define SPIF_CMD_SETFREEZEBIT 0x91 +#define SPIF_CMD_READPASSWORD 0xE7 +#define SPIF_CMD_PROGRAMPASSWORD 0xE8 +#define SPIF_CMD_UNLOCKPASSWORD 0xE9 +#define SPIF_CMD_SETALLDYBBITS 0x7E +#define SPIF_CMD_CLEARALLDYBBITS 0x98 + +/*status register definitions*/ +#define SPIF_STATUS_WIP (1 << 0) +#define SPIF_STATUS_WEL (1 << 1) +#define SPIF_STATUS_BP0 (1 << 2) +#define SPIF_STATUS_BP1 (1 << 3) +#define SPIF_STATUS_BP2 (1 << 4) +#define SPIF_STATUS_BP3 (1 << 5) +#define SPIF_STATUS_QE (1 << 6) +#define SPIF_STATUS_SRWD (1 << 7) + +/*Function Register definitions*/ +#define SPIF_FNREG_DEDICATEDRESET (1 << 0) +#define SPIF_FNREG_TBS (1 << 1) +#define SPIF_FNREG_PSUS (1 << 2) +#define SPIF_FNREG_ESUS (1 << 3) +#define SPIF_FNREG_IRLOCK0 (1 << 4) +#define SPIF_FNREG_IRLOCK1 (1 << 5) +#define SPIF_FNREG_IRLOCK2 (1 << 6) +#define SPIF_FNREG_IRLOCK3 (1 << 7) + +/*Read Register definitons*/ +#define SPIF_READREG_BURSTLEN0 (1 << 0) +#define SPIF_READREG_BURSTLEN1 (1 << 1) +#define SPIF_READREG_BURSTLENENABLE (1 << 2) +#define SPIF_READREG_DUMMYCYCLES0 (1 << 3) +#define SPIF_READREG_DUMMYCYCLES1 (1 << 4) +#define SPIF_READREG_DUMMYCYCLES2 (1 << 5) +#define SPIF_READREG_DUMMYCYCLES3 (1 << 6) +#define SPIF_READREG_HOLD_RESET (1 << 7) + +/*Extended Read Register definitions*/ +#define SPIF_EXTENDEDREADREG_WIP (1 << 0) +#define SPIF_EXTENDEDREADREG_PROT_E (1 << 1) +#define SPIF_EXTENDEDREADREG_P_ERR (1 << 2) +#define SPIF_EXTENDEDREADREG_E_ERR (1 << 3) +// bit 4 is reserved +#define SPIF_EXTENDEDREADREG_ODS0 (1 << 5) +#define SPIF_EXTENDEDREADREG_ODS1 (1 << 6) +#define SPIF_EXTENDEDREADREG_ODS2 (1 << 7) + +/* AutoBoot Register definitions */ +#define SPIF_AUTOBootREG_ABSA (0xFFFFFFE0) // Bits AB[31:5] - AutoBoot Start Address +#define SPIF_AUTOBootREG_ABSD (0x0000001E) // Bits AB[4:1] - AutoBoot Start Delay +#define SPIF_AUTOBootREG_ABE (1 << 0) // Bit AB[0] - AutoBoot Enable + +/* Bank Address Register*/ +#define SPIF_BANKADDRESSREG_EXTADD (1 << 7) //3-byte or 4-byte addressing selection Bit +//other bits are all reserved + +/* Advanced Sector/Block Protection Register (ASPR) definitions */ +// bit 0 is reserved +#define SPIF_ASPR_PSTMLB (1 << 1) // Persistent Protection Mode Lock Bit +#define SPIF_ASPR_PWDMLB (1 << 2) // Password Protection Mode Lock Bit +//bit 3 to 14 are reserved +#define SPIF_ASPR_TBPARM (1 << 15) // Top/Bottom Parameter Sector + +/*Password Register*/ +// TODO: define the password register bits + +/*PPB Lock Register*/ +#define SPIF_PPBLOCKREG_PPBLOCK (1 << 0) //PPB Lock Bit +//bit 1 to 6 are reserved +#define SPIF_PPBLOCKREG_FREEZE (1 << 7) + +/*PPB Register*/ +//TODO: confirm if need this definition + +/*DYB register*/ +//TODO: confirm if need this definition +// IS25-specific function prototypes +uint8_t SPIF_IS25_ReadReg1(SPIF_HandleTypeDef *Handle); +bool SPIF_IS25_WriteReg1(SPIF_HandleTypeDef *Handle, uint8_t Data); +bool SPIF_IS25_QPI_Enable(SPIF_HandleTypeDef *Handle); +bool SPIF_IS25XX_EraseBlock_32K(SPIF_HandleTypeDef *Handle, uint32_t Block); +bool SPIF_IS25XX_EraseBlock_64K(SPIF_HandleTypeDef *Handle, uint32_t Block); + +#endif diff --git a/spif_compat_w25xx.c b/spif_compat_w25xx.c new file mode 100644 index 0000000..ae0563d --- /dev/null +++ b/spif_compat_w25xx.c @@ -0,0 +1,222 @@ +#include "spif_compat_w25xx.h" +#include "spif.h" +#include "NimaLTD.I-CUBE-SPIF_conf.h" + + +// This reads status register 1 for SPIF_COMPAT_W25XX +// This will also read the only status register for SPIF_COMPAT_IS25XX +uint8_t SPIF_W25XX_ReadReg1(SPIF_HandleTypeDef *Handle) +{ + uint8_t retVal = 0; + uint8_t tx[2] = {SPIF_CMD_READSTATUS1, SPIF_DUMMY_BYTE}; + uint8_t rx[2]; + SPIF_CsPin(Handle, 0); + if (SPIF_TransmitReceive(Handle, tx, rx, 2, 100) == true) + { + retVal = rx[1]; + } + SPIF_CsPin(Handle, 1); + return retVal; +} + +/***********************************************************************************************************/ + +uint8_t SPIF_W25XX_ReadReg2(SPIF_HandleTypeDef *Handle) +{ + + uint8_t retVal = 0; + uint8_t tx[2] = {SPIF_CMD_READSTATUS2, SPIF_DUMMY_BYTE}; + uint8_t rx[2]; + SPIF_CsPin(Handle, 0); + if (SPIF_TransmitReceive(Handle, tx, rx, 2, 100) == true) + { + retVal = rx[1]; + } + SPIF_CsPin(Handle, 1); + return retVal; +} + + +uint8_t SPIF_W25XX_ReadReg3(SPIF_HandleTypeDef *Handle) +{ + + uint8_t retVal = 0; + uint8_t tx[2] = {SPIF_CMD_READSTATUS3, SPIF_DUMMY_BYTE}; + uint8_t rx[2]; + SPIF_CsPin(Handle, 0); + if (SPIF_TransmitReceive(Handle, tx, rx, 2, 100) == true) + { + retVal = rx[1]; + } + SPIF_CsPin(Handle, 1); + return retVal; + +} + + +bool SPIF_W25XX_WriteReg1(SPIF_HandleTypeDef *Handle, uint8_t Data) +{ + bool retVal = true; + uint8_t tx[2] = {SPIF_CMD_WRITESTATUS1, Data}; + + uint8_t cmd = SPIF_CMD_WRITESTATUSEN; + + do + { + + SPIF_CsPin(Handle, 0); + if (SPIF_Transmit(Handle, &cmd, 1, 100) == false) + { + retVal = false; + SPIF_CsPin(Handle, 1); + break; + } + SPIF_CsPin(Handle, 1); + + SPIF_CsPin(Handle, 0); + if (SPIF_Transmit(Handle, tx, 2, 100) == false) + { + retVal = false; + SPIF_CsPin(Handle, 1); + break; + } + SPIF_CsPin(Handle, 1); + } while (0); + + return retVal; +} + + +bool SPIF_W25XX_WriteReg2(SPIF_HandleTypeDef *Handle, uint8_t Data) +{ + + bool retVal = true; + uint8_t tx[2] = {SPIF_CMD_WRITESTATUS2, Data}; + uint8_t cmd = SPIF_CMD_WRITESTATUSEN; + do + { + SPIF_CsPin(Handle, 0); + if (SPIF_Transmit(Handle, &cmd, 1, 100) == false) + { + retVal = false; + SPIF_CsPin(Handle, 1); + break; + } + SPIF_CsPin(Handle, 1); + SPIF_CsPin(Handle, 0); + if (SPIF_Transmit(Handle, tx, 2, 100) == false) + { + retVal = false; + SPIF_CsPin(Handle, 1); + break; + } + SPIF_CsPin(Handle, 1); + } while (0); + + return retVal; +} + + +bool SPIF_W25XX_WriteReg3(SPIF_HandleTypeDef *Handle, uint8_t Data) +{ + + bool retVal = true; + uint8_t tx[2] = {SPIF_CMD_WRITESTATUS3, Data}; + uint8_t cmd = SPIF_CMD_WRITESTATUSEN; + do + { + SPIF_CsPin(Handle, 0); + if (SPIF_Transmit(Handle, &cmd, 1, 100) == false) + { + retVal = false; + SPIF_CsPin(Handle, 1); + break; + } + SPIF_CsPin(Handle, 1); + SPIF_CsPin(Handle, 0); + if (SPIF_Transmit(Handle, tx, 2, 100) == false) + { + retVal = false; + SPIF_CsPin(Handle, 1); + break; + } + SPIF_CsPin(Handle, 1); + } while (0); + + return retVal; + +} + + +/** + * @brief Erase Block. + * @note Send the Erase-Block command and wait for completion + * + * @param *Handle: Pointer to SPIF_HandleTypeDef structure + * @param Sector: Selected Block + * + * @retval bool: true or false + */ +bool SPIF_W25XX_EraseBlock(SPIF_HandleTypeDef *Handle, uint32_t Block) +{ + SPIF_Lock(Handle); + bool retVal = false; + uint32_t address = Block * SPIF_BLOCK_SIZE; + uint8_t tx[5]; + do + { +#if SPIF_DEBUG != SPIF_DEBUG_DISABLE + uint32_t dbgTime = HAL_GetTick(); +#endif + dprintf("SPIF_EraseBlock() START PAGE %ld\r\n", Block); + if (Block >= Handle->BlockCnt) + { + dprintf("SPIF_EraseBlock() ERROR Block NUMBER\r\n"); + break; + } + if (SPIF_WriteEnable(Handle) == false) + { + break; + } + SPIF_CsPin(Handle, 0); + if (Handle->BlockCnt >= 512) + { + tx[0] = SPIF_CMD_BLOCKERASE4ADD; + tx[1] = (address & 0xFF000000) >> 24; + tx[2] = (address & 0x00FF0000) >> 16; + tx[3] = (address & 0x0000FF00) >> 8; + tx[4] = (address & 0x000000FF); + if (SPIF_Transmit(Handle, tx, 5, 100) == false) + { + SPIF_CsPin(Handle, 1); + break; + } + } + else + { + tx[0] = SPIF_CMD_BLOCKERASE3ADD; + tx[1] = (address & 0x00FF0000) >> 16; + tx[2] = (address & 0x0000FF00) >> 8; + tx[3] = (address & 0x000000FF); + if (SPIF_Transmit(Handle, tx, 4, 100) == false) + { + SPIF_CsPin(Handle, 1); + break; + } + } + SPIF_CsPin(Handle, 1); + if (SPIF_WaitForWriting(Handle, 3000)) + { + dprintf("SPIF_EraseBlock() DONE AFTER %ld ms\r\n", HAL_GetTick() - dbgTime); + retVal = true; + } + + } while (0); + + SPIF_WriteDisable(Handle); + SPIF_UnLock(Handle); + return retVal; +} + + + diff --git a/spif_compat_w25xx.h b/spif_compat_w25xx.h new file mode 100644 index 0000000..e23ece1 --- /dev/null +++ b/spif_compat_w25xx.h @@ -0,0 +1,83 @@ + +#ifndef _SPIF_COMPAT_W25XX_H_ +#define _SPIF_COMPAT_W25XX_H_ + +#include +#include "spif.h" + +/*Register Definition for W25XX*/ +#define SPIF_DUMMY_BYTE 0xA5 + +#define SPIF_CMD_READSFDP 0x5A +#define SPIF_CMD_ID 0x90 +#define SPIF_CMD_JEDECID 0x9F +#define SPIF_CMD_UNIQUEID 0x4B +#define SPIF_CMD_WRITEDISABLE 0x04 +#define SPIF_CMD_READSTATUS1 0x05 +#define SPIF_CMD_READSTATUS2 0x35 +#define SPIF_CMD_READSTATUS3 0x15 +#define SPIF_CMD_WRITESTATUSEN 0x50 +#define SPIF_CMD_WRITESTATUS1 0x01 +#define SPIF_CMD_WRITESTATUS2 0x31 +#define SPIF_CMD_WRITESTATUS3 0x11 +#define SPIF_CMD_WRITEENABLE 0x06 +#define SPIF_CMD_ADDR4BYTE_EN 0xB7 +#define SPIF_CMD_ADDR4BYTE_DIS 0xE9 +#define SPIF_CMD_PAGEPROG3ADD 0x02 +#define SPIF_CMD_PAGEPROG4ADD 0x12 +#define SPIF_CMD_READDATA3ADD 0x03 +#define SPIF_CMD_READDATA4ADD 0x13 +#define SPIF_CMD_FASTREAD3ADD 0x0B +#define SPIF_CMD_FASTREAD4ADD 0x0C +#define SPIF_CMD_SECTORERASE3ADD 0x20 +#define SPIF_CMD_SECTORERASE4ADD 0x21 +#define SPIF_CMD_BLOCKERASE3ADD 0xD8 +#define SPIF_CMD_BLOCKERASE4ADD 0xDC +#define SPIF_CMD_CHIPERASE1 0x60 +#define SPIF_CMD_CHIPERASE2 0xC7 +#define SPIF_CMD_SUSPEND 0x75 +#define SPIF_CMD_RESUME 0x7A +#define SPIF_CMD_POWERDOWN 0xB9 +#define SPIF_CMD_RELEASE 0xAB +#define SPIF_CMD_FRAMSERNO 0xC3 + +#define SPIF_STATUS1_BUSY (1 << 0) +#define SPIF_STATUS1_WEL (1 << 1) +#define SPIF_STATUS1_BP0 (1 << 2) +#define SPIF_STATUS1_BP1 (1 << 3) +#define SPIF_STATUS1_BP2 (1 << 4) +#define SPIF_STATUS1_TP (1 << 5) +#define SPIF_STATUS1_SEC (1 << 6) +#define SPIF_STATUS1_SRP0 (1 << 7) + +#define SPIF_STATUS2_SRP1 (1 << 0) +#define SPIF_STATUS2_QE (1 << 1) +#define SPIF_STATUS2_RESERVE1 (1 << 2) +#define SPIF_STATUS2_LB0 (1 << 3) +#define SPIF_STATUS2_LB1 (1 << 4) +#define SPIF_STATUS2_LB2 (1 << 5) +#define SPIF_STATUS2_CMP (1 << 6) +#define SPIF_STATUS2_SUS (1 << 7) + +#define SPIF_STATUS3_RESERVE1 (1 << 0) +#define SPIF_STATUS3_RESERVE2 (1 << 1) +#define SPIF_STATUS3_WPS (1 << 2) +#define SPIF_STATUS3_RESERVE3 (1 << 3) +#define SPIF_STATUS3_RESERVE4 (1 << 4) +#define SPIF_STATUS3_DRV0 (1 << 5) +#define SPIF_STATUS3_DRV1 (1 << 6) +#define SPIF_STATUS3_HOLD (1 << 7) + + +// W25XX-specific function prototypes +uint8_t SPIF_W25XX_ReadReg1(SPIF_HandleTypeDef *Handle); +uint8_t SPIF_W25XX_ReadReg2(SPIF_HandleTypeDef *Handle); +uint8_t SPIF_W25XX_ReadReg3(SPIF_HandleTypeDef *Handle); +bool SPIF_W25XX_WriteReg1(SPIF_HandleTypeDef *Handle, uint8_t Data); +bool SPIF_W25XX_WriteReg2(SPIF_HandleTypeDef *Handle, uint8_t Data); +bool SPIF_W25XX_WriteReg3(SPIF_HandleTypeDef *Handle, uint8_t Data); + + +bool SPIF_W25XX_EraseBlock(SPIF_HandleTypeDef *Handle, uint32_t Block); + +#endif diff --git a/spif_interface_octospi.c b/spif_interface_octospi.c new file mode 100644 index 0000000..75deca1 --- /dev/null +++ b/spif_interface_octospi.c @@ -0,0 +1,136 @@ +#include "spif_interface_octospi.h" +#include "spif.h" +#include "ospi.h" +#include "NimaLTD.I-CUBE-SPIF_conf.h" + +/** + * @brief Initialize the SPIF. + * @note Enable and configure the SPI and Set GPIO as output for CS pin on the CubeMX + * + * @param *Handle: Pointer to SPIF_HandleTypeDef structure + * @param *HOSpi: Pointer to a SPI_HandleTypeDef structure + * @param *Gpio: Pointer to a GPIO_TypeDef structure for CS + * @param Pin: Pin of CS + * + * @retval bool: true or false + */ +bool SPIF_OCTOSPI_Init(SPIF_HandleTypeDef *Handle, OSPI_HandleTypeDef *HOspi, GPIO_TypeDef *Gpio, uint16_t Pin){ + + bool retVal = false; + do + { + if ((Handle == NULL) || (HOspi == NULL) || (Gpio == NULL) || (Handle->Inited == 1)) + { + dprintf("SPIF_Init() Error, Wrong Parameter\r\n"); + break; + } + memset(Handle, 0, sizeof(SPIF_HandleTypeDef)); + Handle->interface = HOspi; + Handle->Gpio = Gpio; + Handle->Pin = Pin; + SPIF_CsPin(Handle, 1); + /* wait for stable VCC */ + while (HAL_GetTick() < 20) + { + SPIF_Delay(1); + } + if (SPIF_WriteDisable(Handle) == false) + { + break; + } + retVal = SPIF_FindChip(Handle); + if (retVal) + { + Handle->Inited = 1; + dprintf("SPIF_Init() Done\r\n"); + } + + } while (0); + + return retVal; +} + + +bool SPIF_OCTOSPI_TransmitReceive(SPIF_HandleTypeDef *Handle, uint8_t *Tx, uint8_t *Rx, size_t Size, uint32_t Timeout){ + + bool retVal = false; +OSPI_RegularCmdTypeDef sCommand = {0}; + +// Set up the command to use 4 data lines +sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; +sCommand.DataMode = HAL_OSPI_DATA_4_LINES; // 4-line data mode +sCommand.NbData = Size; // Set the number of data bytes to transmit/receive + +// Prepare the command (this could be any relevant command, like a read or write) +if (HAL_OSPI_Command(Handle->interface, &sCommand, Timeout) != HAL_OK) +{ + dprintf("SPIF COMMAND ERROR\r\n"); + return false; +} + if (HAL_OSPI_TransmitReceive(Handle->interface, Tx, Rx, Size, Timeout) == HAL_OK) + { + retVal = true; + } + else + { + dprintf("SPIF TIMEOUT\r\n"); + } + + return retVal; +} + + +bool SPIF_OCTOSPI_Transmit(SPIF_HandleTypeDef *Handle, uint8_t *Tx, size_t Size, uint32_t Timeout){ + + bool retVal = false; +OSPI_RegularCmdTypeDef sCommand = {0}; +sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; +sCommand.DataMode = HAL_OSPI_DATA_4_LINES; // Set to 4 data lines +sCommand.NbData = Size; + +// Send the command to prepare for the transmission +if (HAL_OSPI_Command(Handle->interface, &sCommand, Timeout) != HAL_OK) +{ + dprintf("SPIF COMMAND ERROR\r\n"); + return false; +} + + if (HAL_OSPI_Transmit(Handle->interface, Tx, Timeout) == HAL_OK) + { + retVal = true; + } + else + { + dprintf("SPIF TIMEOUT\r\n"); + } + return retVal; + +} + +bool SPIF_OCTOSPI_Receive(SPIF_HandleTypeDef *Handle, uint8_t *Rx, size_t Size, uint32_t Timeout){ + + bool retVal = false; + OSPI_RegularCmdTypeDef sCommand = {0}; + + // Set up the command for receiving data with 4 data lines + sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; + sCommand.DataMode = HAL_OSPI_DATA_4_LINES; // Set to 4-line data mode + sCommand.NbData = Size; // Number of data bytes to receive + + if (HAL_OSPI_Command(Handle->interface, &sCommand, Timeout) != HAL_OK) + { + dprintf("SPIF COMMAND ERROR\r\n"); + return false; + } + + if (HAL_OSPI_Receive(Handle->interface, Rx, Timeout) == HAL_OK) + { + retVal = true; + } + else + { + dprintf("SPIF TIMEOUT\r\n"); + } + return retVal; + +} diff --git a/spif_interface_octospi.h b/spif_interface_octospi.h new file mode 100644 index 0000000..b996366 --- /dev/null +++ b/spif_interface_octospi.h @@ -0,0 +1,12 @@ +#ifndef _SPIF_INTERFACE_OCTOSPI_H_ +#define _SPIF_INTERFACE_OCTOSPI_H_ + +#include "spif.h" +#include + +bool SPIF_OCTOSPI_Init(SPIF_HandleTypeDef *Handle, OSPI_HandleTypeDef *HOspi, GPIO_TypeDef *Gpio, uint16_t Pin); +bool SPIF_OCTOSPI_TransmitReceive(SPIF_HandleTypeDef *Handle, uint8_t *Tx, uint8_t *Rx, size_t Size, uint32_t Timeout); +bool SPIF_OCTOSPI_Transmit(SPIF_HandleTypeDef *Handle, uint8_t *Tx, size_t Size, uint32_t Timeout); +bool SPIF_OCTOSPI_Receive(SPIF_HandleTypeDef *Handle, uint8_t *Rx, size_t Size, uint32_t Timeout); + +#endif diff --git a/spif_interface_spi.c b/spif_interface_spi.c new file mode 100644 index 0000000..2235148 --- /dev/null +++ b/spif_interface_spi.c @@ -0,0 +1,172 @@ +#include "spif_interface_spi.h" +#include "spif.h" +#include "NimaLTD.I-CUBE-SPIF_conf.h" + +/** + * @brief Initialize the SPIF. + * @note Enable and configure the SPI and Set GPIO as output for CS pin on the CubeMX + * + * @param *Handle: Pointer to SPIF_HandleTypeDef structure + * @param *HSpi: Pointer to a SPI_HandleTypeDef structure + * @param *Gpio: Pointer to a GPIO_TypeDef structure for CS + * @param Pin: Pin of CS + * + * @retval bool: true or false + */ +bool SPIF_SPI_Init(SPIF_HandleTypeDef *Handle, SPI_HandleTypeDef *HSpi, GPIO_TypeDef *Gpio, uint16_t Pin) +{ + bool retVal = false; + do + { + if ((Handle == NULL) || (HSpi == NULL) || (Gpio == NULL) || (Handle->Inited == 1)) + { + dprintf("SPIF_Init() Error, Wrong Parameter\r\n"); + break; + } + memset(Handle, 0, sizeof(SPIF_HandleTypeDef)); + Handle->interface = HSpi; + Handle->Gpio = Gpio; + Handle->Pin = Pin; + SPIF_CsPin(Handle, 1); + /* wait for stable VCC */ + while (HAL_GetTick() < 20) + { + SPIF_Delay(1); + } + if (SPIF_WriteDisable(Handle) == false) + { + break; + } + retVal = SPIF_FindChip(Handle); + if (retVal) + { + Handle->Inited = 1; + dprintf("SPIF_Init() Done\r\n"); + } + + } while (0); + + return retVal; +} + +bool SPIF_SPI_TransmitReceive(SPIF_HandleTypeDef *Handle, uint8_t *Tx, uint8_t *Rx, size_t Size, uint32_t Timeout) +{ + bool retVal = false; +#if (SPIF_PLATFORM == SPIF_PLATFORM_HAL) + if (HAL_SPI_TransmitReceive(Handle->interface, Tx, Rx, Size, Timeout) == HAL_OK) + { + retVal = true; + } + else + { + dprintf("SPIF TIMEOUT\r\n"); + } +#elif (SPIF_PLATFORM == SPIF_PLATFORM_HAL_DMA) + uint32_t startTime = HAL_GetTick(); + if (HAL_SPI_TransmitReceive_DMA(Handle->interface, Tx, Rx, Size) != HAL_OK) + { + dprintf("SPIF TRANSFER ERROR\r\n"); + } + else + { + while (1) + { + SPIF_Delay(1); + if (HAL_GetTick() - startTime >= Timeout) + { + dprintf("SPIF TIMEOUT\r\n"); + HAL_SPI_DMAStop(Handle->interface); + break; + } + if (HAL_SPI_GetState(Handle->interface) == HAL_SPI_STATE_READY) + { + retVal = true; + break; + } + } + } +#endif + return retVal; +} + +bool SPIF_SPI_Transmit(SPIF_HandleTypeDef *Handle, uint8_t *Tx, size_t Size, uint32_t Timeout) +{ + + bool retVal = false; +#if (SPIF_PLATFORM == SPIF_PLATFORM_HAL) + if (HAL_SPI_Transmit(Handle->interface, Tx, Size, Timeout) == HAL_OK) + { + retVal = true; + } + else + { + dprintf("SPIF TIMEOUT\r\n"); + } +#elif (SPIF_PLATFORM == SPIF_PLATFORM_HAL_DMA) + uint32_t startTime = HAL_GetTick(); + if (HAL_SPI_Transmit_DMA(Handle->interface, Tx, Size) != HAL_OK) + { + dprintf("SPIF TRANSFER ERROR\r\n"); + } + else + { + while (1) + { + SPIF_Delay(1); + if (HAL_GetTick() - startTime >= Timeout) + { + dprintf("SPIF TIMEOUT\r\n"); + HAL_SPI_DMAStop(Handle->interface); + break; + } + if (HAL_SPI_GetState(Handle->interface) == HAL_SPI_STATE_READY) + { + retVal = true; + break; + } + } + } +#endif + return retVal; +} + +bool SPIF_SPI_Receive(SPIF_HandleTypeDef *Handle, uint8_t *Rx, size_t Size, uint32_t Timeout) +{ + + bool retVal = false; +#if (SPIF_PLATFORM == SPIF_PLATFORM_HAL) + if (HAL_SPI_Receive(Handle->interface, Rx, Size, Timeout) == HAL_OK) + { + retVal = true; + } + else + { + dprintf("SPIF TIMEOUT\r\n"); + } +#elif (SPIF_PLATFORM == SPIF_PLATFORM_HAL_DMA) + uint32_t startTime = HAL_GetTick(); + if (HAL_SPI_Receive_DMA(Handle->interface, Rx, Size) != HAL_OK) + { + dprintf("SPIF TRANSFER ERROR\r\n"); + } + else + { + while (1) + { + SPIF_Delay(1); + if (HAL_GetTick() - startTime >= Timeout) + { + dprintf("SPIF TIMEOUT\r\n"); + HAL_SPI_DMAStop(Handle->interface); + break; + } + if (HAL_SPI_GetState(Handle->interface) == HAL_SPI_STATE_READY) + { + retVal = true; + break; + } + } + } +#endif + return retVal; +} diff --git a/spif_interface_spi.h b/spif_interface_spi.h new file mode 100644 index 0000000..0f88078 --- /dev/null +++ b/spif_interface_spi.h @@ -0,0 +1,12 @@ +#ifndef _SPIF_INTERFACE_SPI_H_ +#define _SPIF_INTERFACE_SPI_H_ + +#include "spif.h" +#include "spi.h" + +bool SPIF_SPI_Init(SPIF_HandleTypeDef *Handle, SPI_HandleTypeDef *HSpi, GPIO_TypeDef *Gpio, uint16_t Pin); +bool SPIF_SPI_TransmitReceive(SPIF_HandleTypeDef *Handle, uint8_t *Tx, uint8_t *Rx, size_t Size, uint32_t Timeout); +bool SPIF_SPI_Transmit(SPIF_HandleTypeDef *Handle, uint8_t *Tx, size_t Size, uint32_t Timeout); +bool SPIF_SPI_Receive(SPIF_HandleTypeDef *Handle, uint8_t *Rx, size_t Size, uint32_t Timeout); + +#endif From 489a78a79a40465242aeedb33725e30e78206873 Mon Sep 17 00:00:00 2001 From: Megh Shah Date: Fri, 16 May 2025 14:11:28 +0530 Subject: [PATCH 11/17] Split the codebase to make it more modular. - added spif_util.h to hold common structs and enums. - ported the register defintions to source files to prevent conflicts. - changed the functions in spif_compat_is25xx and spif_compat_w25xx to use correct registers. --- spif.c | 562 ------------------------------------- spif.h | 222 ++++++--------- spif_compat_is25xx.c | 538 +++++++++++++++++++++++++++++++++++- spif_compat_is25xx.h | 182 +----------- spif_compat_w25xx.c | 583 ++++++++++++++++++++++++++++++++++++++- spif_compat_w25xx.h | 91 ++---- spif_interface_octospi.c | 85 +++--- spif_interface_octospi.h | 12 +- spif_interface_spi.c | 82 +++--- spif_interface_spi.h | 12 +- spif_util.c | 8 + spif_util.h | 99 +++++++ 12 files changed, 1415 insertions(+), 1061 deletions(-) create mode 100644 spif_util.c create mode 100644 spif_util.h diff --git a/spif.c b/spif.c index bf43e1f..a9a8caf 100644 --- a/spif.c +++ b/spif.c @@ -5,7 +5,6 @@ #include "spif.h" #include -#include "NimaLTD.I-CUBE-SPIF_conf.h" #if SPIF_RTOS == SPIF_RTOS_DISABLE @@ -19,21 +18,6 @@ #include "app_threadx.h" #endif - -#if (SPIF_COMPAT == SPIF_COMPAT_W25XX) - #include "spif_compat_w25xx.h" -#elif (SPIF_COMPAT == SPIF_COMPAT_IS25XX) - #include "spif_compat_is25xx.h" -#endif - -#if (SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI) - #include "spif_interface_octospi.h" -#else - #include "spif_interface_spi.h" -#endif - - - /***********************************************************************************************************/ void SPIF_Delay(uint32_t Delay) @@ -79,541 +63,21 @@ void SPIF_CsPin(SPIF_HandleTypeDef *Handle, bool Select) for (int i = 0; i < 10; i++); } -/***********************************************************************************************************/ -bool SPIF_WriteEnable(SPIF_HandleTypeDef *Handle) -{ - bool retVal = true; - uint8_t tx[1] = {SPIF_CMD_WRITEENABLE}; - SPIF_CsPin(Handle, 0); - if (SPIF_Transmit(Handle, tx, 1, 100) == false) - { - retVal = false; - dprintf("SPIF_WriteEnable() Error\r\n"); - } - SPIF_CsPin(Handle, 1); - return retVal; -} - -/***********************************************************************************************************/ - -bool SPIF_WriteDisable(SPIF_HandleTypeDef *Handle) -{ - bool retVal = true; - uint8_t tx[1] = {SPIF_CMD_WRITEDISABLE}; - SPIF_CsPin(Handle, 0); - if (SPIF_Transmit(Handle, tx, 1, 100) == false) - { - retVal = false; - dprintf("SPIF_WriteDisable() Error\r\n"); - } - SPIF_CsPin(Handle, 1); - return retVal; -} - -/***********************************************************************************************************/ - -bool SPIF_WaitForWriting(SPIF_HandleTypeDef *Handle, uint32_t Timeout) -{ - bool retVal = false; - uint32_t startTime = HAL_GetTick(); - while (1) - { - SPIF_Delay(1); - if (HAL_GetTick() - startTime >= Timeout) - { - dprintf("SPIF_WaitForWriting() TIMEOUT\r\n"); - break; - } - #if (SPIF_COMPAT == SPIF_COMPAT_W25XX) - if ((SPIF_W25XX_ReadReg1(Handle) & SPIF_STATUS1_BUSY) == 0) - #elif (SPIF_COMPAT == SPIF_COMPAT_IS25XX) - if ((SPIF_IS25_ReadReg1(Handle) & SPIF_STATUS_WIP) == 0) - #endif - { - retVal = true; - break; - } - } - return retVal; -} /***********************************************************************************************************/ -bool SPIF_FindChip(SPIF_HandleTypeDef *Handle) -{ - uint8_t tx[4] = {SPIF_CMD_JEDECID, 0xFF, 0xFF, 0xFF}; - uint8_t rx[4]; - bool retVal = false; - do - { - dprintf("SPIF_FindChip()\r\n"); - SPIF_CsPin(Handle, 0); - if (SPIF_TransmitReceive(Handle, tx, rx, 4, 100) == false) - { - SPIF_CsPin(Handle, 1); - break; - } - SPIF_CsPin(Handle, 1); - dprintf("CHIP ID: 0x%02X%02X%02X\r\n", rx[1], rx[2], rx[3]); - Handle->Manufactor = rx[1]; - Handle->MemType = rx[2]; - Handle->Size = rx[3]; - - dprintf("SPIF MANUFACTURE: "); - switch (Handle->Manufactor) - { - case SPIF_MANUFACTOR_WINBOND: - dprintf("WINBOND"); - break; - case SPIF_MANUFACTOR_SPANSION: - dprintf("SPANSION"); - break; - case SPIF_MANUFACTOR_MICRON: - dprintf("MICRON"); - break; - case SPIF_MANUFACTOR_MACRONIX: - dprintf("MACRONIX"); - break; - case SPIF_MANUFACTOR_ISSI: - dprintf("ISSI"); - break; - case SPIF_MANUFACTOR_GIGADEVICE: - dprintf("GIGADEVICE"); - break; - case SPIF_MANUFACTOR_AMIC: - dprintf("AMIC"); - break; - case SPIF_MANUFACTOR_SST: - dprintf("SST"); - break; - case SPIF_MANUFACTOR_HYUNDAI: - dprintf("HYUNDAI"); - break; - case SPIF_MANUFACTOR_FUDAN: - dprintf("FUDAN"); - break; - case SPIF_MANUFACTOR_ESMT: - dprintf("ESMT"); - break; - case SPIF_MANUFACTOR_INTEL: - dprintf("INTEL"); - break; - case SPIF_MANUFACTOR_SANYO: - dprintf("SANYO"); - break; - case SPIF_MANUFACTOR_FUJITSU: - dprintf("FUJITSU"); - break; - case SPIF_MANUFACTOR_EON: - dprintf("EON"); - break; - case SPIF_MANUFACTOR_PUYA: - dprintf("PUYA"); - break; - default: - Handle->Manufactor = SPIF_MANUFACTOR_ERROR; - dprintf("ERROR"); - break; - } - dprintf(" - MEMTYPE: 0x%02X", Handle->MemType); - dprintf(" - SIZE: "); - switch (Handle->Size) - { - case SPIF_SIZE_1MBIT: - Handle->BlockCnt = 2; - dprintf("1 MBIT\r\n"); - break; - case SPIF_SIZE_2MBIT: - Handle->BlockCnt = 4; - dprintf("2 MBIT\r\n"); - break; - case SPIF_SIZE_4MBIT: - Handle->BlockCnt = 8; - dprintf("4 MBIT\r\n"); - break; - case SPIF_SIZE_8MBIT: - Handle->BlockCnt = 16; - dprintf("8 MBIT\r\n"); - break; - case SPIF_SIZE_16MBIT: - Handle->BlockCnt = 32; - dprintf("16 MBIT\r\n"); - break; - case SPIF_SIZE_32MBIT: - Handle->BlockCnt = 64; - dprintf("32 MBIT\r\n"); - break; - case SPIF_SIZE_64MBIT: - Handle->BlockCnt = 128; - dprintf("64 MBIT\r\n"); - break; - case SPIF_SIZE_128MBIT: - Handle->BlockCnt = 256; - dprintf("128 MBIT\r\n"); - break; - case SPIF_SIZE_256MBIT: - Handle->BlockCnt = 512; - dprintf("256 MBIT\r\n"); - break; - case SPIF_SIZE_512MBIT: - Handle->BlockCnt = 1024; - dprintf("512 MBIT\r\n"); - break; - default: - Handle->Size = SPIF_SIZE_ERROR; - dprintf("ERROR\r\n"); - break; - } - - Handle->SectorCnt = Handle->BlockCnt * 16; - Handle->PageCnt = (Handle->SectorCnt * SPIF_SECTOR_SIZE) / SPIF_PAGE_SIZE; - dprintf("SPIF BLOCK CNT: %ld\r\n", Handle->BlockCnt); - dprintf("SPIF SECTOR CNT: %ld\r\n", Handle->SectorCnt); - dprintf("SPIF PAGE CNT: %ld\r\n", Handle->PageCnt); - dprintf("SPIF STATUS1: 0x%02X\r\n", SPIF_ReadReg1(Handle)); - dprintf("SPIF STATUS2: 0x%02X\r\n", SPIF_ReadReg2(Handle)); - dprintf("SPIF STATUS3: 0x%02X\r\n", SPIF_ReadReg3(Handle)); - retVal = true; - - } while (0); - - return retVal; -} - - -bool SPIF_TransmitReceive(SPIF_HandleTypeDef *Handle, uint8_t *Tx, uint8_t *Rx, size_t Size, uint32_t Timeout){ -#if (SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI) - return SPIF_OCTOSPI_TransmitReceive(Handle, Tx, Rx, Size, Timeout); -#else - return SPIF_SPI_TransmitReceive(Handle, Tx, Rx, Size, Timeout); -#endif -} - -bool SPIF_Transmit(SPIF_HandleTypeDef *Handle, uint8_t *Tx, size_t Size, uint32_t Timeout){ -#if (SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI) - return SPIF_OCTOSPI_Transmit(Handle, Tx, Size, Timeout); -#else - return SPIF_SPI_Transmit(Handle, Tx, Size, Timeout); -#endif -} - -bool SPIF_Receive(SPIF_HandleTypeDef *Handle, uint8_t *Rx, size_t Size, uint32_t Timeout){ -#if (SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI) - return SPIF_OCTOSPI_Receive(Handle, Rx, Size, Timeout); -#else - return SPIF_SPI_Receive(Handle, Rx, Size, Timeout); -#endif -} - - -/***********************************************************************************************************/ - -bool SPIF_WriteFn(SPIF_HandleTypeDef *Handle, uint32_t PageNumber, uint8_t *Data, uint32_t Size, uint32_t Offset) -{ - bool retVal = false; - uint32_t address = 0, maximum = SPIF_PAGE_SIZE - Offset; - uint8_t tx[5]; - do - { -#if SPIF_DEBUG != SPIF_DEBUG_DISABLE - uint32_t dbgTime = HAL_GetTick(); -#endif - dprintf("SPIF_WritePage() START PAGE %ld\r\n", PageNumber); - if (PageNumber >= Handle->PageCnt) - { - dprintf("SPIF_WritePage() ERROR PageNumber\r\n"); - break; - } - if (Offset >= SPIF_PAGE_SIZE) - { - dprintf("SPIF_WritePage() ERROR Offset\r\n"); - break; - } - if (Size > maximum) - { - Size = maximum; - } - address = SPIF_PageToAddress(PageNumber) + Offset; -#if SPIF_DEBUG == SPIF_DEBUG_FULL - dprintf("SPIF WRITING {\r\n0x%02X", Data[0]); - for (int i = 1; i < Size; i++) - { - if (i % 8 == 0) - { - dprintf("\r\n"); - } - dprintf(", 0x%02X", Data[i]); - } - dprintf("\r\n}\r\n"); -#endif - if (SPIF_WriteEnable(Handle) == false) - { - break; - } - SPIF_CsPin(Handle, 0); - if (Handle->BlockCnt >= 512) - { - tx[0] = SPIF_CMD_PAGEPROG4ADD; - tx[1] = (address & 0xFF000000) >> 24; - tx[2] = (address & 0x00FF0000) >> 16; - tx[3] = (address & 0x0000FF00) >> 8; - tx[4] = (address & 0x000000FF); - if (SPIF_Transmit(Handle, tx, 5, 100) == false) - { - SPIF_CsPin(Handle, 1); - break; - } - } - else - { - tx[0] = SPIF_CMD_PAGEPROG3ADD; - tx[1] = (address & 0x00FF0000) >> 16; - tx[2] = (address & 0x0000FF00) >> 8; - tx[3] = (address & 0x000000FF); - if (SPIF_Transmit(Handle, tx, 4, 100) == false) - { - SPIF_CsPin(Handle, 1); - break; - } - } - if (SPIF_Transmit(Handle, Data, Size, 1000) == false) - { - SPIF_CsPin(Handle, 1); - break; - } - SPIF_CsPin(Handle, 1); - if (SPIF_WaitForWriting(Handle, 100)) - { - dprintf("SPIF_WritePage() %d BYTES WITERN DONE AFTER %ld ms\r\n", (uint16_t)Size, HAL_GetTick() - dbgTime); - retVal = true; - } - } while (0); - SPIF_WriteDisable(Handle); - return retVal; -} /***********************************************************************************************************/ -bool SPIF_ReadFn(SPIF_HandleTypeDef *Handle, uint32_t Address, uint8_t *Data, uint32_t Size) -{ - bool retVal = false; - uint8_t tx[5]; - do - { -#if SPIF_DEBUG != SPIF_DEBUG_DISABLE - uint32_t dbgTime = HAL_GetTick(); -#endif - dprintf("SPIF_ReadAddress() START ADDRESS %ld\r\n", Address); - SPIF_CsPin(Handle, 0); - if (Handle->BlockCnt >= 512) - { - tx[0] = SPIF_CMD_READDATA4ADD; - tx[1] = (Address & 0xFF000000) >> 24; - tx[2] = (Address & 0x00FF0000) >> 16; - tx[3] = (Address & 0x0000FF00) >> 8; - tx[4] = (Address & 0x000000FF); - if (SPIF_Transmit(Handle, tx, 5, 100) == false) - { - SPIF_CsPin(Handle, 1); - break; - } - } - else - { - tx[0] = SPIF_CMD_READDATA3ADD; - tx[1] = (Address & 0x00FF0000) >> 16; - tx[2] = (Address & 0x0000FF00) >> 8; - tx[3] = (Address & 0x000000FF); - if (SPIF_Transmit(Handle, tx, 4, 100) == false) - { - SPIF_CsPin(Handle, 1); - break; - } - } - uint16_t max_uint16_size = 0xFFFF - 2; - if(Size > max_uint16_size) - { - uint32_t delta = Size; - uint32_t Data_offset = 0; - while(delta > 0) - { - if(delta <= max_uint16_size) - { - if (SPIF_Receive(Handle, (Data+Data_offset), delta, 2000) == false) - { - SPIF_CsPin(Handle, 1); - break; - } - delta = 0; - } - else - { - if (SPIF_Receive(Handle, (Data+Data_offset), max_uint16_size, 2000) == false) - { - SPIF_CsPin(Handle, 1); - break; - } - delta = abs(delta - max_uint16_size); - Data_offset += max_uint16_size; - } - } - if(delta > 0) - { - //break the main do-while loop, so as to return false - break; - } - } - else - { - if(SPIF_Receive(Handle, Data, Size, 2000) == false) - { - SPIF_CsPin(Handle, 1); - break; - } - } - SPIF_CsPin(Handle, 1); - dprintf("SPIF_ReadAddress() %d BYTES READ DONE AFTER %ld ms\r\n", (uint16_t)Size, HAL_GetTick() - dbgTime); -#if SPIF_DEBUG == SPIF_DEBUG_FULL - dprintf("{\r\n0x%02X", Data[0]); - for (int i = 1; i < Size; i++) - { - if (i % 8 == 0) - { - dprintf("\r\n"); - } - dprintf(", 0x%02X", Data[i]); - } - dprintf("\r\n}\r\n"); -#endif - retVal = true; - - } while (0); - - return retVal; -} - /************************************************************************************************************ ************** Public Functions ************************************************************************************************************/ -/** - * @brief Full Erase chip. - * @note Send the Full-Erase-chip command and wait for completion - * - * @param *Handle: Pointer to SPIF_HandleTypeDef structure - * - * @retval bool: true or false - */ -bool SPIF_EraseChip(SPIF_HandleTypeDef *Handle) -{ - SPIF_Lock(Handle); - bool retVal = false; - uint8_t tx[1] = {SPIF_CMD_CHIPERASE1}; - do - { -#if SPIF_DEBUG != SPIF_DEBUG_DISABLE - uint32_t dbgTime = HAL_GetTick(); -#endif - dprintf("SPIF_EraseChip() START\r\n"); - if (SPIF_WriteEnable(Handle) == false) - { - break; - } - SPIF_CsPin(Handle, 0); - if (SPIF_Transmit(Handle, tx, 1, 100) == false) - { - SPIF_CsPin(Handle, 1); - break; - } - SPIF_CsPin(Handle, 1); - if (SPIF_WaitForWriting(Handle, Handle->BlockCnt * 1000)) - { - dprintf("SPIF_EraseChip() DONE AFTER %ld ms\r\n", HAL_GetTick() - dbgTime); - retVal = true; - } - - } while (0); - - SPIF_WriteDisable(Handle); - SPIF_UnLock(Handle); - return retVal; -} - /***********************************************************************************************************/ -/** - * @brief Erase Sector. - * @note Send the Erase-Sector command and wait for completion - * - * @param *Handle: Pointer to SPIF_HandleTypeDef structure - * @param Sector: Selected Sector - * - * @retval bool: true or false - */ -bool SPIF_EraseSector(SPIF_HandleTypeDef *Handle, uint32_t Sector) -{ - SPIF_Lock(Handle); - bool retVal = false; - uint32_t address = Sector * SPIF_SECTOR_SIZE; - uint8_t tx[5]; - do - { -#if SPIF_DEBUG != SPIF_DEBUG_DISABLE - uint32_t dbgTime = HAL_GetTick(); -#endif - dprintf("SPIF_EraseSector() START SECTOR %ld\r\n", Sector); - if (Sector >= Handle->SectorCnt) - { - dprintf("SPIF_EraseSector() ERROR Sector NUMBER\r\n"); - break; - } - if (SPIF_WriteEnable(Handle) == false) - { - break; - } - SPIF_CsPin(Handle, 0); - if (Handle->BlockCnt >= 512) - { - tx[0] = SPIF_CMD_SECTORERASE4ADD; - tx[1] = (address & 0xFF000000) >> 24; - tx[2] = (address & 0x00FF0000) >> 16; - tx[3] = (address & 0x0000FF00) >> 8; - tx[4] = (address & 0x000000FF); - if (SPIF_Transmit(Handle, tx, 5, 100) == false) - { - SPIF_CsPin(Handle, 1); - break; - } - } - else - { - tx[0] = SPIF_CMD_SECTORERASE3ADD; - tx[1] = (address & 0x00FF0000) >> 16; - tx[2] = (address & 0x0000FF00) >> 8; - tx[3] = (address & 0x000000FF); - if (SPIF_Transmit(Handle, tx, 4, 100) == false) - { - SPIF_CsPin(Handle, 1); - break; - } - } - SPIF_CsPin(Handle, 1); - if (SPIF_WaitForWriting(Handle, 1000)) - { - dprintf("SPIF_EraseSector() DONE AFTER %ld ms\r\n", HAL_GetTick() - dbgTime); - retVal = true; - } - - } while (0); - - SPIF_WriteDisable(Handle); - SPIF_UnLock(Handle); - return retVal; -} - /***********************************************************************************************************/ /** @@ -908,32 +372,6 @@ bool SPIF_ReadBlock(SPIF_HandleTypeDef *Handle, uint32_t BlockNumber, uint8_t *D return retVal; } - -#if (SPIF_COMPAT == SPIF_COMPAT_IS25XX) - -/* - * @brief Write QPI Enable command - * @note Send the QPI-Enable command - * - * @param *Handle: Pointer to SPIF_HandleTypeDef structure - * - * @retval bool: true or false - */ - bool SPIF_QPI_Enable(SPIF_HandleTypeDef *Handle) - { - bool retVal = true; - uint8_t tx[1] = {SPIF_CMD_ENTERQPI}; - SPIF_CsPin(Handle, 0); - if (SPIF_Transmit(Handle, tx, 1, 100) == false) - { - retVal = false; - dprintf("SPIF_QPI_Enable() Error\r\n"); - } - SPIF_CsPin(Handle, 1); - return retVal; - } -#endif - /* * @brief Send Command to SPIF * @note Send command and data to SPIF diff --git a/spif.h b/spif.h index 471de68..0d174d1 100644 --- a/spif.h +++ b/spif.h @@ -47,162 +47,94 @@ extern "C" { #endif + /************************************************************************************************************ + ************** Include Headers + ************************************************************************************************************/ + +#include +#include +#include "NimaLTD.I-CUBE-SPIF_conf.h" +#include "spif_util.h" + +#if (SPIF_INTERFACE == SPIF_INTERFACE_OCTOSPI) +#include "stm32u5xx_hal.h" +#include "stm32u5xx_hal_ospi.h" +#else +#include "spi.h" +#endif + + bool SPIF_TransmitReceive(SPIF_HandleTypeDef *Handle, uint8_t *Tx, + uint8_t *Rx, size_t Size, uint32_t Timeout); + bool SPIF_Transmit(SPIF_HandleTypeDef *Handle, uint8_t *Tx, size_t Size, + uint32_t Timeout); + bool SPIF_Receive(SPIF_HandleTypeDef *Handle, uint8_t *Rx, size_t Size, + uint32_t Timeout); + #if SPIF_DEBUG == SPIF_DEBUG_DISABLE #define dprintf(...) #else #include #define dprintf(...) printf(__VA_ARGS__) #endif -/************************************************************************************************************ - ************** Include Headers - ************************************************************************************************************/ -#include -#include -#include "NimaLTD.I-CUBE-SPIF_conf.h" +#if (SPIF_COMPAT == SPIF_COMPAT_W25XX) +#include "spif_compat_w25xx.h" -#if (SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI) -// #include "stm32u5xx_hal.h" -#include "ospi.h" +#elif (SPIF_COMPAT == SPIF_COMPAT_IS25XX) +#include "spif_compat_is25xx.h" + +#endif + + #if (SPIF_PLATFORM == SPIF_INTERFACE_OCTOSPI) + #include "spif_interface_octospi.h" #else - #include "spi.h" + +#include "spif_interface_spi.h" + #endif -/************************************************************************************************************ - ************** Public Definitions - ************************************************************************************************************/ - -#define SPIF_PAGE_SIZE 0x100 -#define SPIF_SECTOR_SIZE 0x1000 -#define SPIF_BLOCK_SIZE 0x10000 - -#define SPIF_PageToSector(PageNumber) (((PageNumber) * SPIF_PAGE_SIZE) / SPIF_SECTOR_SIZE) -#define SPIF_PageToBlock(PageNumber) (((PageNumber) * SPIF_PAGE_SIZE) / SPIF_BLOCK_SIZE) -#define SPIF_SectorToBlock(SectorNumber) (((SectorNumber) * SPIF_SECTOR_SIZE) / SPIF_BLOCK_SIZE) -#define SPIF_SectorToPage(SectorNumber) (((SectorNumber) * SPIF_SECTOR_SIZE) / SPIF_PAGE_SIZE) -#define SPIF_BlockToPage(BlockNumber) (((BlockNumber) * SPIF_BLOCK_SIZE) / SPIF_PAGE_SIZE) -#define SPIF_PageToAddress(PageNumber) ((PageNumber) * SPIF_PAGE_SIZE) -#define SPIF_SectorToAddress(SectorNumber) ((SectorNumber) * SPIF_SECTOR_SIZE) -#define SPIF_BlockToAddress(BlockNumber) ((BlockNumber) * SPIF_BLOCK_SIZE) -#define SPIF_AddressToPage(Address) ((Address) / SPIF_PAGE_SIZE) -#define SPIF_AddressToSector(Address) ((Address) / SPIF_SECTOR_SIZE) -#define SPIF_AddressToBlock(Address) ((Address) / SPIF_BLOCK_SIZE) - -/************************************************************************************************************ - ************** Public struct/enum - ************************************************************************************************************/ - -typedef enum { - SPIF_MANUFACTOR_ERROR = 0, - SPIF_MANUFACTOR_WINBOND = 0xEF, - SPIF_MANUFACTOR_ISSI = 0xD5, - SPIF_MANUFACTOR_MICRON = 0x20, - SPIF_MANUFACTOR_GIGADEVICE = 0xC8, - SPIF_MANUFACTOR_MACRONIX = 0xC2, - SPIF_MANUFACTOR_SPANSION = 0x01, - SPIF_MANUFACTOR_AMIC = 0x37, - SPIF_MANUFACTOR_SST = 0xBF, - SPIF_MANUFACTOR_HYUNDAI = 0xAD, - SPIF_MANUFACTOR_ATMEL = 0x1F, - SPIF_MANUFACTOR_FUDAN = 0xA1, - SPIF_MANUFACTOR_ESMT = 0x8C, - SPIF_MANUFACTOR_INTEL = 0x89, - SPIF_MANUFACTOR_SANYO = 0x62, - SPIF_MANUFACTOR_FUJITSU = 0x04, - SPIF_MANUFACTOR_EON = 0x1C, - SPIF_MANUFACTOR_PUYA = 0x85, - -} SPIF_ManufactorTypeDef; - -typedef enum { - SPIF_SIZE_ERROR = 0, - SPIF_SIZE_1MBIT = 0x11, - SPIF_SIZE_2MBIT = 0x12, - SPIF_SIZE_4MBIT = 0x13, - SPIF_SIZE_8MBIT = 0x14, - SPIF_SIZE_16MBIT = 0x15, - SPIF_SIZE_32MBIT = 0x16, - SPIF_SIZE_64MBIT = 0x17, - SPIF_SIZE_128MBIT = 0x18, - SPIF_SIZE_256MBIT = 0x19, - SPIF_SIZE_512MBIT = 0x20, - -} SPIF_SizeTypeDef; - -typedef struct { -// #if (SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI) -// OSPI_HandleTypeDef *HOspi; -// #else -// SPI_HandleTypeDef *HSpi; -// #endif -// SPI_HandleTypeDef *HSpi; - void *interface; - GPIO_TypeDef *Gpio; - SPIF_ManufactorTypeDef Manufactor; - SPIF_SizeTypeDef Size; - uint8_t Inited; - uint8_t MemType; - uint8_t Lock; - uint8_t Reserved; - uint32_t Pin; - uint32_t PageCnt; - uint32_t SectorCnt; - uint32_t BlockCnt; - -} SPIF_HandleTypeDef; - -/************************************************************************************************************ - ************** Public Functions - ************************************************************************************************************/ -/*helper functions*/ - -void SPIF_Delay(uint32_t Delay); -void SPIF_Lock(SPIF_HandleTypeDef *Handle); -void SPIF_UnLock(SPIF_HandleTypeDef *Handle); -void SPIF_CsPin(SPIF_HandleTypeDef *Handle, bool Select); -bool SPIF_WriteEnable(SPIF_HandleTypeDef *Handle); -bool SPIF_WriteDisable(SPIF_HandleTypeDef *Handle); -bool SPIF_WaitForWriting(SPIF_HandleTypeDef *Handle, uint32_t Timeout); -bool SPIF_FindChip(SPIF_HandleTypeDef *Handle); - -bool SPIF_TransmitReceive(SPIF_HandleTypeDef *Handle, uint8_t *Tx, uint8_t *Rx, size_t Size, uint32_t Timeout); -bool SPIF_Transmit(SPIF_HandleTypeDef *Handle, uint8_t *Tx, size_t Size, uint32_t Timeout); -bool SPIF_Receive(SPIF_HandleTypeDef *Handle, uint8_t *Rx, size_t Size, uint32_t Timeout); - - -// Initialization -//bool SPIF_Init(SPIF_HandleTypeDef *Handle, void *InterfaceHandle, GPIO_TypeDef *Gpio, uint16_t Pin); - -// Erase operations -bool SPIF_EraseChip(SPIF_HandleTypeDef *Handle); -bool SPIF_EraseSector(SPIF_HandleTypeDef *Handle, uint32_t Sector); -bool SPIF_EraseBlock(SPIF_HandleTypeDef *Handle, uint32_t Block); - -// Write operations -bool SPIF_WriteAddress(SPIF_HandleTypeDef *Handle, uint32_t Address, - uint8_t *Data, uint32_t Size); -bool SPIF_WritePage(SPIF_HandleTypeDef *Handle, uint32_t PageNumber, - uint8_t *Data, uint32_t Size, uint32_t Offset); -bool SPIF_WriteSector(SPIF_HandleTypeDef *Handle, uint32_t SectorNumber, - uint8_t *Data, uint32_t Size, uint32_t Offset); -bool SPIF_WriteBlock(SPIF_HandleTypeDef *Handle, uint32_t BlockNumber, - uint8_t *Data, uint32_t Size, uint32_t Offset); - -// Read operations -bool SPIF_ReadAddress(SPIF_HandleTypeDef *Handle, uint32_t Address, - uint8_t *Data, uint32_t Size); -bool SPIF_ReadPage(SPIF_HandleTypeDef *Handle, uint32_t PageNumber, - uint8_t *Data, uint32_t Size, uint32_t Offset); -bool SPIF_ReadSector(SPIF_HandleTypeDef *Handle, uint32_t SectorNumber, - uint8_t *Data, uint32_t Size, uint32_t Offset); -bool SPIF_ReadBlock(SPIF_HandleTypeDef *Handle, uint32_t BlockNumber, - uint8_t *Data, uint32_t Size, uint32_t Offset); - -// Command operations -bool SPIF_SendCmd(SPIF_HandleTypeDef *Handle, uint8_t Cmd, uint8_t *Data, - uint32_t Size); -bool SPIF_SendCmdReceive(SPIF_HandleTypeDef *Handle, uint8_t Cmd, - uint8_t *RxData, uint32_t Size); + /*Helper Functions*/ + void SPIF_Delay(uint32_t Delay); + void SPIF_Lock(SPIF_HandleTypeDef *Handle); + void SPIF_UnLock(SPIF_HandleTypeDef *Handle); + void SPIF_CsPin(SPIF_HandleTypeDef *Handle, bool Select); + + /************************************************************************************************************ + ************** Public Functions + ************************************************************************************************************/ +//#if (SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI) +// bool SPIF_OCTOSPI_Init(SPIF_HandleTypeDef *Handle, +// OSPI_HandleTypeDef *HOspi, GPIO_TypeDef *Gpio, uint16_t Pin); +//#else +// bool SPIF_Init(SPIF_HandleTypeDef *Handle, SPI_HandleTypeDef *HSpi, GPIO_TypeDef *Gpio, uint16_t Pin); +//#endif + + bool SPIF_WriteAddress(SPIF_HandleTypeDef *Handle, uint32_t Address, + uint8_t *Data, uint32_t Size); + bool SPIF_WritePage(SPIF_HandleTypeDef *Handle, uint32_t PageNumber, + uint8_t *Data, uint32_t Size, uint32_t Offset); + bool SPIF_WriteSector(SPIF_HandleTypeDef *Handle, uint32_t SectorNumber, + uint8_t *Data, uint32_t Size, uint32_t Offset); + bool SPIF_WriteBlock(SPIF_HandleTypeDef *Handle, uint32_t BlockNumber, + uint8_t *Data, uint32_t Size, uint32_t Offset); + + bool SPIF_ReadAddress(SPIF_HandleTypeDef *Handle, uint32_t Address, + uint8_t *Data, uint32_t Size); + bool SPIF_ReadPage(SPIF_HandleTypeDef *Handle, uint32_t PageNumber, + uint8_t *Data, uint32_t Size, uint32_t Offset); + bool SPIF_ReadSector(SPIF_HandleTypeDef *Handle, uint32_t SectorNumber, + uint8_t *Data, uint32_t Size, uint32_t Offset); + bool SPIF_ReadBlock(SPIF_HandleTypeDef *Handle, uint32_t BlockNumber, + uint8_t *Data, uint32_t Size, uint32_t Offset); + + bool SPIF_SendCmd(SPIF_HandleTypeDef *Handle, uint8_t Cmd, uint8_t *Data, + uint32_t Size); + bool SPIF_SendCmdReceive(SPIF_HandleTypeDef *Handle, uint8_t Cmd, + uint8_t *RxData, uint32_t Size); + +#if (SPIF_COMPAT == SPIF_COMPAT_IS25XX) + bool SPIF_QPI_Enable(SPIF_HandleTypeDef *Handle); +#endif #ifdef __cplusplus } diff --git a/spif_compat_is25xx.c b/spif_compat_is25xx.c index e9dcc29..ea1fc4a 100644 --- a/spif_compat_is25xx.c +++ b/spif_compat_is25xx.c @@ -1,18 +1,230 @@ #include "spif_compat_is25xx.h" #include "spif.h" -#include "NimaLTD.I-CUBE-SPIF_conf.h" -#if (SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI) - #include "spif_interface_octospi.h" -#else - #include "spif_interface_spi.h" -#endif +#if (SPIF_COMPAT == SPIF_COMPAT_IS25XX) +/*Register Definitions for IS25XX*/ + +#define SPIF_DUMMY_BYTE 0xA5 //TODO: confirm value + +#define SPIF_CMD_READDATA3ADD 0x03 +#define SPIF_CMD_READDATA4ADD 0x13 +#define SPIF_CMD_FASTREAD3ADD 0x0B +#define SPIF_CMD_FASTREAD4ADD 0x0C +#define SPIF_CMD_FASTREADDUALIO3ADD 0xBB +#define SPIF_CMD_FASTREADDUALIO4ADD 0xBC +#define SPIF_CMD_FASTREADDUALOUTPUT3ADD 0x3B +#define SPIF_CMD_FASTREADDUALOUTPUT4ADD 0x3C +#define SPIF_CMD_FASTREADQUADIO3ADD 0xEB +#define SPIF_CMD_FASTREADQUADIO4ADD 0xEC +#define SPIF_CMD_FASTREADQUADOUTPUT3ADD 0x6B +#define SPIF_CMD_FASTREADQUADOUTPUT4ADD 0x6C +#define SPIF_CMD_FASTREADDTRIO3ADD 0x0D +#define SPIF_CMD_FASTREADDTRIO4ADD 0x0E +#define SPIF_CMD_FASTREADDTRDUALIO3ADD 0xBD +#define SPIF_CMD_FASTREADDTRDUALIO4ADD 0xBE +#define SPIF_CMD_FASTREADQUADDTRIO3ADD 0xED +#define SPIF_CMD_FASTREADQUADDTRIO4ADD 0xEE +#define SPIF_CMD_PAGEPROG3ADD 0x02 +#define SPIF_CMD_PAGEPROG4ADD 0x12 +#define SPIF_CMD_QUADPAGEPROGRAM3ADD 0x32 +#define SPIF_CMD_QUADPAGEPROGRAM4ADD 0x34 +#define SPIF_CMD_SECTORERASE3ADD 0x20 +#define SPIF_CMD_SECTORERASE4ADD 0x21 +#define SPIF_CMD_BLOCKERASE32K3ADD 0x52 +#define SPIF_CMD_BLOCKERASE32K4ADD 0x5C +#define SPIF_CMD_BLOCKERASE64K3ADD 0xD8 +#define SPIF_CMD_BLOCKERASE64K4ADD 0xDC +#define SPIF_CMD_CHIPERASE1 0xC7 +#define SPIF_CMD_WRITEENABLE 0x06 +#define SPIF_CMD_WRITEDISABLE 0x04 +#define SPIF_CMD_READSTATUS1 0x05 +#define SPIF_CMD_WRITESTATUS1 0x01 +#define SPIF_CMD_READFNREG 0x48 +#define SPIF_CMD_WRITEFNREG 0x42 +#define SPIF_CMD_ENTERQPI 0x35 +#define SPIF_CMD_EXITQPI 0xF5 +#define SPIF_CMD_SUSPEND 0x75 +#define SPIF_CMD_RESUME 0x7A +#define SPIF_CMD_DEEPPOWERDOWN 0xB9 +#define SPIF_CMD_READID 0xAB +#define SPIF_CMD_RELEASEPOWERDOWN 0xAB +#define SPIF_CMD_SETREADPARAMNONVOLATILE 0x65 +#define SPIF_CMD_SETREADPARAMVOLATILE 0xC0 +#define SPIF_CMD_SETEXTENDEDREADPARAMNONVOLATILE 0x85 +#define SPIF_CMD_SETEXTEDEDREADPARAMVOLATILE 0x83 +#define SPIF_CMD_READREADPARAMVOLATILE 0x61 +#define SPIF_CMD_READREADEXTENDEDPARAMVOLATILE 0x81 +#define SPIF_CMD_CLEAREXTENDEDREADREG 0x82 +#define SPIF_CMD_JEDECID 0x9F +#define SPIF_CMD_READMANUFACTURERID 0x90 +#define SPIF_CMD_READJEDECIDQPI 0xAF +#define SPIF_CMD_READUNIQUEID 0x4B +#define SPIF_CMD_READSFDP 0x5A +#define SPIF_CMD_NOOP 0x00 +#define SPIF_CMD_SOFTRESETENABLE 0x66 +#define SPIF_CMD_SOFTRESET 0x99 +#define SPIF_CMD_ERASEINFOROW 0x64 +#define SPIF_CMD_PROGRAMINFOROW 0x62 +#define SPIF_CMD_READINFOROW 0x68 +#define SPIF_CMD_SECTORUNLOCK3ADD 0x26 +#define SPIF_CMD_SECTORUNLOCK4ADD 0x25 +#define SPIF_CMD_SECTORLOCK 0x24 +#define SPIF_CMD_READAUTOBOOTREG 0x14 +#define SPIF_CMD_WRITEAUTOBOOTREG 0x15 +#define SPIF_CMD_READBANKADDRESSREG 0x16 +#define SPIF_CMD_WRITEBANKADDRESSREGVOLATILE 0x17 +#define SPIF_CMD_WRITEBANKADDRESSREGNONVOLATILE 0x18 +#define SPIF_CMD_ENTER4ADD 0xB7 +#define SPIF_CMD_EXIT4ADD 0x29 +#define SPIF_CMD_READDYB3ADD 0xFA +#define SPIF_CMD_READDYB4ADD 0xE0 +#define SPIF_CMD_WRITEDYB3ADD 0xFB +#define SPIF_CMD_WRITEDYB4ADD 0xE1 +#define SPIF_CMD_READPPB3ADD 0xFC +#define SPIF_CMD_READPPB4ADD 0xE2 +#define SPIF_CMD_PROGPPB3ADD 0xFD +#define SPIF_CMD_PROGPPB4ADD 0xE3 +#define SPIF_CMD_ERASEPPB 0xE4 +#define SPIF_CMD_READASP 0x2B +#define SPIF_CMD_PROGRMASP 0x2F +#define SPIF_CMD_READPPBLOCKBIT 0xA7 +#define SPIF_CMD_WRITEPPBLOCKBIT 0xA6 +#define SPIF_CMD_SETFREEZEBIT 0x91 +#define SPIF_CMD_READPASSWORD 0xE7 +#define SPIF_CMD_PROGRAMPASSWORD 0xE8 +#define SPIF_CMD_UNLOCKPASSWORD 0xE9 +#define SPIF_CMD_SETALLDYBBITS 0x7E +#define SPIF_CMD_CLEARALLDYBBITS 0x98 + +/*status register definitions*/ +#define SPIF_STATUS_WIP (1 << 0) +#define SPIF_STATUS_WEL (1 << 1) +#define SPIF_STATUS_BP0 (1 << 2) +#define SPIF_STATUS_BP1 (1 << 3) +#define SPIF_STATUS_BP2 (1 << 4) +#define SPIF_STATUS_BP3 (1 << 5) +#define SPIF_STATUS_QE (1 << 6) +#define SPIF_STATUS_SRWD (1 << 7) + +/*Function Register definitions*/ +#define SPIF_FNREG_DEDICATEDRESET (1 << 0) +#define SPIF_FNREG_TBS (1 << 1) +#define SPIF_FNREG_PSUS (1 << 2) +#define SPIF_FNREG_ESUS (1 << 3) +#define SPIF_FNREG_IRLOCK0 (1 << 4) +#define SPIF_FNREG_IRLOCK1 (1 << 5) +#define SPIF_FNREG_IRLOCK2 (1 << 6) +#define SPIF_FNREG_IRLOCK3 (1 << 7) + +/*Read Register definitons*/ +#define SPIF_READREG_BURSTLEN0 (1 << 0) +#define SPIF_READREG_BURSTLEN1 (1 << 1) +#define SPIF_READREG_BURSTLENENABLE (1 << 2) +#define SPIF_READREG_DUMMYCYCLES0 (1 << 3) +#define SPIF_READREG_DUMMYCYCLES1 (1 << 4) +#define SPIF_READREG_DUMMYCYCLES2 (1 << 5) +#define SPIF_READREG_DUMMYCYCLES3 (1 << 6) +#define SPIF_READREG_HOLD_RESET (1 << 7) + +/*Extended Read Register definitions*/ +#define SPIF_EXTENDEDREADREG_WIP (1 << 0) +#define SPIF_EXTENDEDREADREG_PROT_E (1 << 1) +#define SPIF_EXTENDEDREADREG_P_ERR (1 << 2) +#define SPIF_EXTENDEDREADREG_E_ERR (1 << 3) +// bit 4 is reserved +#define SPIF_EXTENDEDREADREG_ODS0 (1 << 5) +#define SPIF_EXTENDEDREADREG_ODS1 (1 << 6) +#define SPIF_EXTENDEDREADREG_ODS2 (1 << 7) + +/* AutoBoot Register definitions */ +#define SPIF_AUTOBootREG_ABSA (0xFFFFFFE0) // Bits AB[31:5] - AutoBoot Start Address +#define SPIF_AUTOBootREG_ABSD (0x0000001E) // Bits AB[4:1] - AutoBoot Start Delay +#define SPIF_AUTOBootREG_ABE (1 << 0) // Bit AB[0] - AutoBoot Enable + +/* Bank Address Register*/ +#define SPIF_BANKADDRESSREG_EXTADD (1 << 7) //3-byte or 4-byte addressing selection Bit +//other bits are all reserved +/* Advanced Sector/Block Protection Register (ASPR) definitions */ +// bit 0 is reserved +#define SPIF_ASPR_PSTMLB (1 << 1) // Persistent Protection Mode Lock Bit +#define SPIF_ASPR_PWDMLB (1 << 2) // Password Protection Mode Lock Bit +//bit 3 to 14 are reserved +#define SPIF_ASPR_TBPARM (1 << 15) // Top/Bottom Parameter Sector +/*Password Register*/ +// TODO: define the password register bits +/*PPB Lock Register*/ +#define SPIF_PPBLOCKREG_PPBLOCK (1 << 0) //PPB Lock Bit +//bit 1 to 6 are reserved +#define SPIF_PPBLOCKREG_FREEZE (1 << 7) -uint8_t SPIF_IS25_ReadReg1(SPIF_HandleTypeDef *Handle) +/*PPB Register*/ +//TODO: confirm if need this definition + +/*DYB register*/ +//TODO: confirm if need this definition + + + + +bool SPIF_WriteEnable(SPIF_HandleTypeDef *Handle) +{ + bool retVal = true; + uint8_t tx[1] = {SPIF_CMD_WRITEENABLE}; + SPIF_CsPin(Handle, 0); + if (SPIF_Transmit(Handle, tx, 1, 100) == false) + { + retVal = false; + dprintf("SPIF_WriteEnable() Error\r\n"); + } + SPIF_CsPin(Handle, 1); + return retVal; +} + + +bool SPIF_WriteDisable(SPIF_HandleTypeDef *Handle) +{ + bool retVal = true; + uint8_t tx[1] = {SPIF_CMD_WRITEDISABLE}; + SPIF_CsPin(Handle, 0); + if (SPIF_Transmit(Handle, tx, 1, 100) == false) + { + retVal = false; + dprintf("SPIF_WriteDisable() Error\r\n"); + } + SPIF_CsPin(Handle, 1); + return retVal; +} + + + +bool SPIF_WaitForWriting(SPIF_HandleTypeDef *Handle, uint32_t Timeout) +{ + bool retVal = false; + uint32_t startTime = HAL_GetTick(); + while (1) + { + SPIF_Delay(1); + if (HAL_GetTick() - startTime >= Timeout) + { + dprintf("SPIF_WaitForWriting() TIMEOUT\r\n"); + break; + } + if ((SPIF_ReadReg1(Handle) & SPIF_STATUS_WIP) == 0) + + { + retVal = true; + break; + } + } + return retVal; +} + + +uint8_t SPIF_ReadReg1(SPIF_HandleTypeDef *Handle) { uint8_t retVal = 0; uint8_t tx[2] = {SPIF_CMD_READSTATUS1, SPIF_DUMMY_BYTE}; @@ -26,7 +238,7 @@ uint8_t SPIF_IS25_ReadReg1(SPIF_HandleTypeDef *Handle) return retVal; } -bool SPIF_IS25_WriteReg1(SPIF_HandleTypeDef *Handle, uint8_t Data) +bool SPIF_WriteReg1(SPIF_HandleTypeDef *Handle, uint8_t Data) { bool retVal = true; uint8_t tx[2] = {SPIF_CMD_WRITESTATUS1, Data}; @@ -53,6 +265,307 @@ bool SPIF_IS25_WriteReg1(SPIF_HandleTypeDef *Handle, uint8_t Data) } +bool SPIF_WriteFn(SPIF_HandleTypeDef *Handle, uint32_t PageNumber, uint8_t *Data, uint32_t Size, uint32_t Offset) +{ + bool retVal = false; + uint32_t address = 0, maximum = SPIF_PAGE_SIZE - Offset; + uint8_t tx[5]; + do + { +#if SPIF_DEBUG != SPIF_DEBUG_DISABLE + uint32_t dbgTime = HAL_GetTick(); +#endif + dprintf("SPIF_WritePage() START PAGE %ld\r\n", PageNumber); + if (PageNumber >= Handle->PageCnt) + { + dprintf("SPIF_WritePage() ERROR PageNumber\r\n"); + break; + } + if (Offset >= SPIF_PAGE_SIZE) + { + dprintf("SPIF_WritePage() ERROR Offset\r\n"); + break; + } + if (Size > maximum) + { + Size = maximum; + } + address = SPIF_PageToAddress(PageNumber) + Offset; +#if SPIF_DEBUG == SPIF_DEBUG_FULL + dprintf("SPIF WRITING {\r\n0x%02X", Data[0]); + for (int i = 1; i < Size; i++) + { + if (i % 8 == 0) + { + dprintf("\r\n"); + } + dprintf(", 0x%02X", Data[i]); + } + dprintf("\r\n}\r\n"); +#endif + if (SPIF_WriteEnable(Handle) == false) + { + break; + } + SPIF_CsPin(Handle, 0); + if (Handle->BlockCnt >= 512) + { + tx[0] = SPIF_CMD_PAGEPROG4ADD; + tx[1] = (address & 0xFF000000) >> 24; + tx[2] = (address & 0x00FF0000) >> 16; + tx[3] = (address & 0x0000FF00) >> 8; + tx[4] = (address & 0x000000FF); + if (SPIF_Transmit(Handle, tx, 5, 100) == false) + { + SPIF_CsPin(Handle, 1); + break; + } + } + else + { + tx[0] = SPIF_CMD_PAGEPROG3ADD; + tx[1] = (address & 0x00FF0000) >> 16; + tx[2] = (address & 0x0000FF00) >> 8; + tx[3] = (address & 0x000000FF); + if (SPIF_Transmit(Handle, tx, 4, 100) == false) + { + SPIF_CsPin(Handle, 1); + break; + } + } + if (SPIF_Transmit(Handle, Data, Size, 1000) == false) + { + SPIF_CsPin(Handle, 1); + break; + } + SPIF_CsPin(Handle, 1); + if (SPIF_WaitForWriting(Handle, 100)) + { + dprintf("SPIF_WritePage() %d BYTES WITERN DONE AFTER %ld ms\r\n", (uint16_t)Size, HAL_GetTick() - dbgTime); + retVal = true; + } + + } while (0); + + SPIF_WriteDisable(Handle); + return retVal; +} + + +bool SPIF_ReadFn(SPIF_HandleTypeDef *Handle, uint32_t Address, uint8_t *Data, uint32_t Size) +{ + bool retVal = false; + uint8_t tx[5]; + do + { +#if SPIF_DEBUG != SPIF_DEBUG_DISABLE + uint32_t dbgTime = HAL_GetTick(); +#endif + dprintf("SPIF_ReadAddress() START ADDRESS %ld\r\n", Address); + SPIF_CsPin(Handle, 0); + if (Handle->BlockCnt >= 512) + { + tx[0] = SPIF_CMD_READDATA4ADD; + tx[1] = (Address & 0xFF000000) >> 24; + tx[2] = (Address & 0x00FF0000) >> 16; + tx[3] = (Address & 0x0000FF00) >> 8; + tx[4] = (Address & 0x000000FF); + if (SPIF_Transmit(Handle, tx, 5, 100) == false) + { + SPIF_CsPin(Handle, 1); + break; + } + } + else + { + tx[0] = SPIF_CMD_READDATA3ADD; + tx[1] = (Address & 0x00FF0000) >> 16; + tx[2] = (Address & 0x0000FF00) >> 8; + tx[3] = (Address & 0x000000FF); + if (SPIF_Transmit(Handle, tx, 4, 100) == false) + { + SPIF_CsPin(Handle, 1); + break; + } + } + uint16_t max_uint16_size = 0xFFFF - 2; + if(Size > max_uint16_size) + { + uint32_t delta = Size; + uint32_t Data_offset = 0; + while(delta > 0) + { + if(delta <= max_uint16_size) + { + if (SPIF_Receive(Handle, (Data+Data_offset), delta, 2000) == false) + { + SPIF_CsPin(Handle, 1); + break; + } + delta = 0; + } + else + { + if (SPIF_Receive(Handle, (Data+Data_offset), max_uint16_size, 2000) == false) + { + SPIF_CsPin(Handle, 1); + break; + } + delta = abs(delta - max_uint16_size); + Data_offset += max_uint16_size; + } + } + if(delta > 0) + { + //break the main do-while loop, so as to return false + break; + } + } + else + { + if(SPIF_Receive(Handle, Data, Size, 2000) == false) + { + SPIF_CsPin(Handle, 1); + break; + } + } + SPIF_CsPin(Handle, 1); + dprintf("SPIF_ReadAddress() %d BYTES READ DONE AFTER %ld ms\r\n", (uint16_t)Size, HAL_GetTick() - dbgTime); +#if SPIF_DEBUG == SPIF_DEBUG_FULL + dprintf("{\r\n0x%02X", Data[0]); + for (int i = 1; i < Size; i++) + { + if (i % 8 == 0) + { + dprintf("\r\n"); + } + dprintf(", 0x%02X", Data[i]); + } + dprintf("\r\n}\r\n"); +#endif + retVal = true; + + } while (0); + + return retVal; +} + + +/** + * @brief Full Erase chip. + * @note Send the Full-Erase-chip command and wait for completion + * + * @param *Handle: Pointer to SPIF_HandleTypeDef structure + * + * @retval bool: true or false + */ +bool SPIF_EraseChip(SPIF_HandleTypeDef *Handle) +{ + SPIF_Lock(Handle); + bool retVal = false; + uint8_t tx[1] = {SPIF_CMD_CHIPERASE1}; + do + { +#if SPIF_DEBUG != SPIF_DEBUG_DISABLE + uint32_t dbgTime = HAL_GetTick(); +#endif + dprintf("SPIF_EraseChip() START\r\n"); + if (SPIF_WriteEnable(Handle) == false) + { + break; + } + SPIF_CsPin(Handle, 0); + if (SPIF_Transmit(Handle, tx, 1, 100) == false) + { + SPIF_CsPin(Handle, 1); + break; + } + SPIF_CsPin(Handle, 1); + if (SPIF_WaitForWriting(Handle, Handle->BlockCnt * 1000)) + { + dprintf("SPIF_EraseChip() DONE AFTER %ld ms\r\n", HAL_GetTick() - dbgTime); + retVal = true; + } + + } while (0); + + SPIF_WriteDisable(Handle); + SPIF_UnLock(Handle); + return retVal; +} + + +/** + * @brief Erase Sector. + * @note Send the Erase-Sector command and wait for completion + * + * @param *Handle: Pointer to SPIF_HandleTypeDef structure + * @param Sector: Selected Sector + * + * @retval bool: true or false + */ +bool SPIF_EraseSector(SPIF_HandleTypeDef *Handle, uint32_t Sector) +{ + SPIF_Lock(Handle); + bool retVal = false; + uint32_t address = Sector * SPIF_SECTOR_SIZE; + uint8_t tx[5]; + do + { +#if SPIF_DEBUG != SPIF_DEBUG_DISABLE + uint32_t dbgTime = HAL_GetTick(); +#endif + dprintf("SPIF_EraseSector() START SECTOR %ld\r\n", Sector); + if (Sector >= Handle->SectorCnt) + { + dprintf("SPIF_EraseSector() ERROR Sector NUMBER\r\n"); + break; + } + if (SPIF_WriteEnable(Handle) == false) + { + break; + } + SPIF_CsPin(Handle, 0); + if (Handle->BlockCnt >= 512) + { + tx[0] = SPIF_CMD_SECTORERASE4ADD; + tx[1] = (address & 0xFF000000) >> 24; + tx[2] = (address & 0x00FF0000) >> 16; + tx[3] = (address & 0x0000FF00) >> 8; + tx[4] = (address & 0x000000FF); + if (SPIF_Transmit(Handle, tx, 5, 100) == false) + { + SPIF_CsPin(Handle, 1); + break; + } + } + else + { + tx[0] = SPIF_CMD_SECTORERASE3ADD; + tx[1] = (address & 0x00FF0000) >> 16; + tx[2] = (address & 0x0000FF00) >> 8; + tx[3] = (address & 0x000000FF); + if (SPIF_Transmit(Handle, tx, 4, 100) == false) + { + SPIF_CsPin(Handle, 1); + break; + } + } + SPIF_CsPin(Handle, 1); + if (SPIF_WaitForWriting(Handle, 1000)) + { + dprintf("SPIF_EraseSector() DONE AFTER %ld ms\r\n", HAL_GetTick() - dbgTime); + retVal = true; + } + + } while (0); + + SPIF_WriteDisable(Handle); + SPIF_UnLock(Handle); + return retVal; +} + + /* * @brief Write QPI Enable command * @note Send the QPI-Enable command @@ -60,7 +573,7 @@ bool SPIF_IS25_WriteReg1(SPIF_HandleTypeDef *Handle, uint8_t Data) * @param *Handle: Pointer to SPIF_HandleTypeDef structure * @retval bool: true or false */ -bool SPIF_IS25_QPI_Enable(SPIF_HandleTypeDef *Handle) +bool SPIF_QPI_Enable(SPIF_HandleTypeDef *Handle) { bool retVal = true; uint8_t tx[1] = {SPIF_CMD_ENTERQPI}; @@ -85,7 +598,7 @@ bool SPIF_IS25_QPI_Enable(SPIF_HandleTypeDef *Handle) * * @retval bool: true or false */ -bool SPIF_IS25XX_EraseBlock_32K(SPIF_HandleTypeDef *Handle, uint32_t Block) +bool SPIF_EraseBlock(SPIF_HandleTypeDef *Handle, uint32_t Block) { SPIF_Lock(Handle); bool retVal = false; @@ -155,7 +668,10 @@ bool SPIF_IS25XX_EraseBlock_32K(SPIF_HandleTypeDef *Handle, uint32_t Block) * * @retval bool: true or false */ -bool SPIF_IS25XX_EraseBlock_64K(SPIF_HandleTypeDef *Handle, uint32_t Block){ +bool SPIF_EraseBlock_64K(SPIF_HandleTypeDef *Handle, uint32_t Block){ //to be implemented __NOP(); + return false; } + +#endif diff --git a/spif_compat_is25xx.h b/spif_compat_is25xx.h index e7997ba..fe3a166 100644 --- a/spif_compat_is25xx.h +++ b/spif_compat_is25xx.h @@ -1,176 +1,22 @@ #ifndef _SPIF_COMPAT_IS25_H_ #define _SPIF_COMPAT_IS25_H_ -#include "spif.h" -#include "NimaLTD.I-CUBE-SPIF_conf.h" -/*Register Definitions for IS25XX*/ +#include "spif_util.h" +#include -#define SPIF_DUMMY_BYTE 0xA5 //TODO: confirm value -#define SPIF_CMD_READDATA3ADD 0x03 -#define SPIF_CMD_READDATA4ADD 0x13 -#define SPIF_CMD_FASTREAD3ADD 0x0B -#define SPIF_CMD_FASTREAD4ADD 0x0C -#define SPIF_CMD_FASTREADDUALIO3ADD 0xBB -#define SPIF_CMD_FASTREADDUALIO4ADD 0xBC -#define SPIF_CMD_FASTREADDUALOUTPUT3ADD 0x3B -#define SPIF_CMD_FASTREADDUALOUTPUT4ADD 0x3C -#define SPIF_CMD_FASTREADQUADIO3ADD 0xEB -#define SPIF_CMD_FASTREADQUADIO4ADD 0xEC -#define SPIF_CMD_FASTREADQUADOUTPUT3ADD 0x6B -#define SPIF_CMD_FASTREADQUADOUTPUT4ADD 0x6C -#define SPIF_CMD_FASTREADDTRIO3ADD 0x0D -#define SPIF_CMD_FASTREADDTRIO4ADD 0x0E -#define SPIF_CMD_FASTREADDTRDUALIO3ADD 0xBD -#define SPIF_CMD_FASTREADDTRDUALIO4ADD 0xBE -#define SPIF_CMD_FASTREADQUADDTRIO3ADD 0xED -#define SPIF_CMD_FASTREADQUADDTRIO4ADD 0xEE -#define SPIF_CMD_PAGEPROG3ADD 0x02 -#define SPIF_CMD_PAGEPROG4ADD 0x12 -#define SPIF_CMD_QUADPAGEPROGRAM3ADD 0x32 -#define SPIF_CMD_QUADPAGEPROGRAM4ADD 0x34 -#define SPIF_CMD_SECTORERASE3ADD 0x20 -#define SPIF_CMD_SECTORERASE4ADD 0x21 -#define SPIF_CMD_BLOCKERASE32K3ADD 0x52 -#define SPIF_CMD_BLOCKERASE32K4ADD 0x5C -#define SPIF_CMD_BLOCKERASE64K3ADD 0xD8 -#define SPIF_CMD_BLOCKERASE64K4ADD 0xDC -#define SPIF_CMD_CHIPERASE1 0xC7 -#define SPIF_CMD_WRITEENABLE 0x06 -#define SPIF_CMD_WRITEDISABLE 0x04 -#define SPIF_CMD_READSTATUS1 0x05 -#define SPIF_CMD_WRITESTATUS1 0x01 -#define SPIF_CMD_READFNREG 0x48 -#define SPIF_CMD_WRITEFNREG 0x42 -#define SPIF_CMD_ENTERQPI 0x35 -#define SPIF_CMD_EXITQPI 0xF5 -#define SPIF_CMD_SUSPEND 0x75 -#define SPIF_CMD_RESUME 0x7A -#define SPIF_CMD_DEEPPOWERDOWN 0xB9 -#define SPIF_CMD_READID 0xAB -#define SPIF_CMD_RELEASEPOWERDOWN 0xAB -#define SPIF_CMD_SETREADPARAMNONVOLATILE 0x65 -#define SPIF_CMD_SETREADPARAMVOLATILE 0xC0 -#define SPIF_CMD_SETEXTENDEDREADPARAMNONVOLATILE 0x85 -#define SPIF_CMD_SETEXTEDEDREADPARAMVOLATILE 0x83 -#define SPIF_CMD_READREADPARAMVOLATILE 0x61 -#define SPIF_CMD_READREADEXTENDEDPARAMVOLATILE 0x81 -#define SPIF_CMD_CLEAREXTENDEDREADREG 0x82 -#define SPIF_CMD_JEDECID 0x9F -#define SPIF_CMD_READMANUFACTURERID 0x90 -#define SPIF_CMD_READJEDECIDQPI 0xAF -#define SPIF_CMD_READUNIQUEID 0x4B -#define SPIF_CMD_READSFDP 0x5A -#define SPIF_CMD_NOOP 0x00 -#define SPIF_CMD_SOFTRESETENABLE 0x66 -#define SPIF_CMD_SOFTRESET 0x99 -#define SPIF_CMD_ERASEINFOROW 0x64 -#define SPIF_CMD_PROGRAMINFOROW 0x62 -#define SPIF_CMD_READINFOROW 0x68 -#define SPIF_CMD_SECTORUNLOCK3ADD 0x26 -#define SPIF_CMD_SECTORUNLOCK4ADD 0x25 -#define SPIF_CMD_SECTORLOCK 0x24 -#define SPIF_CMD_READAUTOBOOTREG 0x14 -#define SPIF_CMD_WRITEAUTOBOOTREG 0x15 -#define SPIF_CMD_READBANKADDRESSREG 0x16 -#define SPIF_CMD_WRITEBANKADDRESSREGVOLATILE 0x17 -#define SPIF_CMD_WRITEBANKADDRESSREGNONVOLATILE 0x18 -#define SPIF_CMD_ENTER4ADD 0xB7 -#define SPIF_CMD_EXIT4ADD 0x29 -#define SPIF_CMD_READDYB3ADD 0xFA -#define SPIF_CMD_READDYB4ADD 0xE0 -#define SPIF_CMD_WRITEDYB3ADD 0xFB -#define SPIF_CMD_WRITEDYB4ADD 0xE1 -#define SPIF_CMD_READPPB3ADD 0xFC -#define SPIF_CMD_READPPB4ADD 0xE2 -#define SPIF_CMD_PROGPPB3ADD 0xFD -#define SPIF_CMD_PROGPPB4ADD 0xE3 -#define SPIF_CMD_ERASEPPB 0xE4 -#define SPIF_CMD_READASP 0x2B -#define SPIF_CMD_PROGRMASP 0x2F -#define SPIF_CMD_READPPBLOCKBIT 0xA7 -#define SPIF_CMD_WRITEPPBLOCKBIT 0xA6 -#define SPIF_CMD_SETFREEZEBIT 0x91 -#define SPIF_CMD_READPASSWORD 0xE7 -#define SPIF_CMD_PROGRAMPASSWORD 0xE8 -#define SPIF_CMD_UNLOCKPASSWORD 0xE9 -#define SPIF_CMD_SETALLDYBBITS 0x7E -#define SPIF_CMD_CLEARALLDYBBITS 0x98 - -/*status register definitions*/ -#define SPIF_STATUS_WIP (1 << 0) -#define SPIF_STATUS_WEL (1 << 1) -#define SPIF_STATUS_BP0 (1 << 2) -#define SPIF_STATUS_BP1 (1 << 3) -#define SPIF_STATUS_BP2 (1 << 4) -#define SPIF_STATUS_BP3 (1 << 5) -#define SPIF_STATUS_QE (1 << 6) -#define SPIF_STATUS_SRWD (1 << 7) - -/*Function Register definitions*/ -#define SPIF_FNREG_DEDICATEDRESET (1 << 0) -#define SPIF_FNREG_TBS (1 << 1) -#define SPIF_FNREG_PSUS (1 << 2) -#define SPIF_FNREG_ESUS (1 << 3) -#define SPIF_FNREG_IRLOCK0 (1 << 4) -#define SPIF_FNREG_IRLOCK1 (1 << 5) -#define SPIF_FNREG_IRLOCK2 (1 << 6) -#define SPIF_FNREG_IRLOCK3 (1 << 7) - -/*Read Register definitons*/ -#define SPIF_READREG_BURSTLEN0 (1 << 0) -#define SPIF_READREG_BURSTLEN1 (1 << 1) -#define SPIF_READREG_BURSTLENENABLE (1 << 2) -#define SPIF_READREG_DUMMYCYCLES0 (1 << 3) -#define SPIF_READREG_DUMMYCYCLES1 (1 << 4) -#define SPIF_READREG_DUMMYCYCLES2 (1 << 5) -#define SPIF_READREG_DUMMYCYCLES3 (1 << 6) -#define SPIF_READREG_HOLD_RESET (1 << 7) - -/*Extended Read Register definitions*/ -#define SPIF_EXTENDEDREADREG_WIP (1 << 0) -#define SPIF_EXTENDEDREADREG_PROT_E (1 << 1) -#define SPIF_EXTENDEDREADREG_P_ERR (1 << 2) -#define SPIF_EXTENDEDREADREG_E_ERR (1 << 3) -// bit 4 is reserved -#define SPIF_EXTENDEDREADREG_ODS0 (1 << 5) -#define SPIF_EXTENDEDREADREG_ODS1 (1 << 6) -#define SPIF_EXTENDEDREADREG_ODS2 (1 << 7) - -/* AutoBoot Register definitions */ -#define SPIF_AUTOBootREG_ABSA (0xFFFFFFE0) // Bits AB[31:5] - AutoBoot Start Address -#define SPIF_AUTOBootREG_ABSD (0x0000001E) // Bits AB[4:1] - AutoBoot Start Delay -#define SPIF_AUTOBootREG_ABE (1 << 0) // Bit AB[0] - AutoBoot Enable - -/* Bank Address Register*/ -#define SPIF_BANKADDRESSREG_EXTADD (1 << 7) //3-byte or 4-byte addressing selection Bit -//other bits are all reserved - -/* Advanced Sector/Block Protection Register (ASPR) definitions */ -// bit 0 is reserved -#define SPIF_ASPR_PSTMLB (1 << 1) // Persistent Protection Mode Lock Bit -#define SPIF_ASPR_PWDMLB (1 << 2) // Password Protection Mode Lock Bit -//bit 3 to 14 are reserved -#define SPIF_ASPR_TBPARM (1 << 15) // Top/Bottom Parameter Sector - -/*Password Register*/ -// TODO: define the password register bits - -/*PPB Lock Register*/ -#define SPIF_PPBLOCKREG_PPBLOCK (1 << 0) //PPB Lock Bit -//bit 1 to 6 are reserved -#define SPIF_PPBLOCKREG_FREEZE (1 << 7) - -/*PPB Register*/ -//TODO: confirm if need this definition - -/*DYB register*/ -//TODO: confirm if need this definition // IS25-specific function prototypes -uint8_t SPIF_IS25_ReadReg1(SPIF_HandleTypeDef *Handle); -bool SPIF_IS25_WriteReg1(SPIF_HandleTypeDef *Handle, uint8_t Data); -bool SPIF_IS25_QPI_Enable(SPIF_HandleTypeDef *Handle); -bool SPIF_IS25XX_EraseBlock_32K(SPIF_HandleTypeDef *Handle, uint32_t Block); -bool SPIF_IS25XX_EraseBlock_64K(SPIF_HandleTypeDef *Handle, uint32_t Block); +bool SPIF_WriteEnable(SPIF_HandleTypeDef *Handle); +bool SPIF_WriteDisable(SPIF_HandleTypeDef *Handle); +bool SPIF_WaitForWriting(SPIF_HandleTypeDef *Handle, uint32_t Timeout); +uint8_t SPIF_ReadReg1(SPIF_HandleTypeDef *Handle); +bool SPIF_WriteReg1(SPIF_HandleTypeDef *Handle, uint8_t Data); +bool SPIF_WriteFn(SPIF_HandleTypeDef *Handle, uint32_t PageNumber, uint8_t *Data, uint32_t Size, uint32_t Offset); +bool SPIF_ReadFn(SPIF_HandleTypeDef *Handle, uint32_t Address, uint8_t *Data, uint32_t Size); +bool SPIF_EraseChip(SPIF_HandleTypeDef *Handle); +bool SPIF_EraseSector(SPIF_HandleTypeDef *Handle, uint32_t Sector); +bool SPIF_QPI_Enable(SPIF_HandleTypeDef *Handle); +bool SPIF_EraseBlock(SPIF_HandleTypeDef *Handle, uint32_t Block); +bool SPIF_EraseBlock_64K(SPIF_HandleTypeDef *Handle, uint32_t Block); #endif diff --git a/spif_compat_w25xx.c b/spif_compat_w25xx.c index ae0563d..e848684 100644 --- a/spif_compat_w25xx.c +++ b/spif_compat_w25xx.c @@ -1,11 +1,131 @@ + #include "spif_compat_w25xx.h" #include "spif.h" -#include "NimaLTD.I-CUBE-SPIF_conf.h" + +#if (SPIF_COMPAT == SPIF_COMPAT_W25XX) + +/*Register Definition for W25XX*/ +#define SPIF_DUMMY_BYTE 0xA5 + +#define SPIF_CMD_READSFDP 0x5A +#define SPIF_CMD_ID 0x90 +#define SPIF_CMD_JEDECID 0x9F +#define SPIF_CMD_UNIQUEID 0x4B +#define SPIF_CMD_WRITEDISABLE 0x04 +#define SPIF_CMD_READSTATUS1 0x05 +#define SPIF_CMD_READSTATUS2 0x35 +#define SPIF_CMD_READSTATUS3 0x15 +#define SPIF_CMD_WRITESTATUSEN 0x50 +#define SPIF_CMD_WRITESTATUS1 0x01 +#define SPIF_CMD_WRITESTATUS2 0x31 +#define SPIF_CMD_WRITESTATUS3 0x11 +#define SPIF_CMD_WRITEENABLE 0x06 +#define SPIF_CMD_ADDR4BYTE_EN 0xB7 +#define SPIF_CMD_ADDR4BYTE_DIS 0xE9 +#define SPIF_CMD_PAGEPROG3ADD 0x02 +#define SPIF_CMD_PAGEPROG4ADD 0x12 +#define SPIF_CMD_READDATA3ADD 0x03 +#define SPIF_CMD_READDATA4ADD 0x13 +#define SPIF_CMD_FASTREAD3ADD 0x0B +#define SPIF_CMD_FASTREAD4ADD 0x0C +#define SPIF_CMD_SECTORERASE3ADD 0x20 +#define SPIF_CMD_SECTORERASE4ADD 0x21 +#define SPIF_CMD_BLOCKERASE3ADD 0xD8 +#define SPIF_CMD_BLOCKERASE4ADD 0xDC +#define SPIF_CMD_CHIPERASE1 0x60 +#define SPIF_CMD_CHIPERASE2 0xC7 +#define SPIF_CMD_SUSPEND 0x75 +#define SPIF_CMD_RESUME 0x7A +#define SPIF_CMD_POWERDOWN 0xB9 +#define SPIF_CMD_RELEASE 0xAB +#define SPIF_CMD_FRAMSERNO 0xC3 + +#define SPIF_STATUS1_BUSY (1 << 0) +#define SPIF_STATUS1_WEL (1 << 1) +#define SPIF_STATUS1_BP0 (1 << 2) +#define SPIF_STATUS1_BP1 (1 << 3) +#define SPIF_STATUS1_BP2 (1 << 4) +#define SPIF_STATUS1_TP (1 << 5) +#define SPIF_STATUS1_SEC (1 << 6) +#define SPIF_STATUS1_SRP0 (1 << 7) + +#define SPIF_STATUS2_SRP1 (1 << 0) +#define SPIF_STATUS2_QE (1 << 1) +#define SPIF_STATUS2_RESERVE1 (1 << 2) +#define SPIF_STATUS2_LB0 (1 << 3) +#define SPIF_STATUS2_LB1 (1 << 4) +#define SPIF_STATUS2_LB2 (1 << 5) +#define SPIF_STATUS2_CMP (1 << 6) +#define SPIF_STATUS2_SUS (1 << 7) + +#define SPIF_STATUS3_RESERVE1 (1 << 0) +#define SPIF_STATUS3_RESERVE2 (1 << 1) +#define SPIF_STATUS3_WPS (1 << 2) +#define SPIF_STATUS3_RESERVE3 (1 << 3) +#define SPIF_STATUS3_RESERVE4 (1 << 4) +#define SPIF_STATUS3_DRV0 (1 << 5) +#define SPIF_STATUS3_DRV1 (1 << 6) +#define SPIF_STATUS3_HOLD (1 << 7) + + + +bool SPIF_WriteEnable(SPIF_HandleTypeDef *Handle) +{ + bool retVal = true; + uint8_t tx[1] = {SPIF_CMD_WRITEENABLE}; + SPIF_CsPin(Handle, 0); + if (SPIF_Transmit(Handle, tx, 1, 100) == false) + { + retVal = false; + dprintf("SPIF_WriteEnable() Error\r\n"); + } + SPIF_CsPin(Handle, 1); + return retVal; +} + + +bool SPIF_WriteDisable(SPIF_HandleTypeDef *Handle) +{ + bool retVal = true; + uint8_t tx[1] = {SPIF_CMD_WRITEDISABLE}; + SPIF_CsPin(Handle, 0); + if (SPIF_Transmit(Handle, tx, 1, 100) == false) + { + retVal = false; + dprintf("SPIF_WriteDisable() Error\r\n"); + } + SPIF_CsPin(Handle, 1); + return retVal; +} + + +bool SPIF_WaitForWriting(SPIF_HandleTypeDef *Handle, uint32_t Timeout) +{ + bool retVal = false; + uint32_t startTime = HAL_GetTick(); + while (1) + { + SPIF_Delay(1); + if (HAL_GetTick() - startTime >= Timeout) + { + dprintf("SPIF_WaitForWriting() TIMEOUT\r\n"); + break; + } + if ((SPIF_ReadReg1(Handle) & SPIF_STATUS1_BUSY) == 0) + + { + retVal = true; + break; + } + } + return retVal; +} + // This reads status register 1 for SPIF_COMPAT_W25XX // This will also read the only status register for SPIF_COMPAT_IS25XX -uint8_t SPIF_W25XX_ReadReg1(SPIF_HandleTypeDef *Handle) +uint8_t SPIF_ReadReg1(SPIF_HandleTypeDef *Handle) { uint8_t retVal = 0; uint8_t tx[2] = {SPIF_CMD_READSTATUS1, SPIF_DUMMY_BYTE}; @@ -21,7 +141,7 @@ uint8_t SPIF_W25XX_ReadReg1(SPIF_HandleTypeDef *Handle) /***********************************************************************************************************/ -uint8_t SPIF_W25XX_ReadReg2(SPIF_HandleTypeDef *Handle) +uint8_t SPIF_ReadReg2(SPIF_HandleTypeDef *Handle) { uint8_t retVal = 0; @@ -37,7 +157,7 @@ uint8_t SPIF_W25XX_ReadReg2(SPIF_HandleTypeDef *Handle) } -uint8_t SPIF_W25XX_ReadReg3(SPIF_HandleTypeDef *Handle) +uint8_t SPIF_ReadReg3(SPIF_HandleTypeDef *Handle) { uint8_t retVal = 0; @@ -54,7 +174,7 @@ uint8_t SPIF_W25XX_ReadReg3(SPIF_HandleTypeDef *Handle) } -bool SPIF_W25XX_WriteReg1(SPIF_HandleTypeDef *Handle, uint8_t Data) +bool SPIF_WriteReg1(SPIF_HandleTypeDef *Handle, uint8_t Data) { bool retVal = true; uint8_t tx[2] = {SPIF_CMD_WRITESTATUS1, Data}; @@ -87,7 +207,7 @@ bool SPIF_W25XX_WriteReg1(SPIF_HandleTypeDef *Handle, uint8_t Data) } -bool SPIF_W25XX_WriteReg2(SPIF_HandleTypeDef *Handle, uint8_t Data) +bool SPIF_WriteReg2(SPIF_HandleTypeDef *Handle, uint8_t Data) { bool retVal = true; @@ -117,7 +237,7 @@ bool SPIF_W25XX_WriteReg2(SPIF_HandleTypeDef *Handle, uint8_t Data) } -bool SPIF_W25XX_WriteReg3(SPIF_HandleTypeDef *Handle, uint8_t Data) +bool SPIF_WriteReg3(SPIF_HandleTypeDef *Handle, uint8_t Data) { bool retVal = true; @@ -148,6 +268,310 @@ bool SPIF_W25XX_WriteReg3(SPIF_HandleTypeDef *Handle, uint8_t Data) } +bool SPIF_WriteFn(SPIF_HandleTypeDef *Handle, uint32_t PageNumber, uint8_t *Data, uint32_t Size, uint32_t Offset) +{ + bool retVal = false; + uint32_t address = 0, maximum = SPIF_PAGE_SIZE - Offset; + uint8_t tx[5]; + do + { +#if SPIF_DEBUG != SPIF_DEBUG_DISABLE + uint32_t dbgTime = HAL_GetTick(); +#endif + dprintf("SPIF_WritePage() START PAGE %ld\r\n", PageNumber); + if (PageNumber >= Handle->PageCnt) + { + dprintf("SPIF_WritePage() ERROR PageNumber\r\n"); + break; + } + if (Offset >= SPIF_PAGE_SIZE) + { + dprintf("SPIF_WritePage() ERROR Offset\r\n"); + break; + } + if (Size > maximum) + { + Size = maximum; + } + address = SPIF_PageToAddress(PageNumber) + Offset; +#if SPIF_DEBUG == SPIF_DEBUG_FULL + dprintf("SPIF WRITING {\r\n0x%02X", Data[0]); + for (int i = 1; i < Size; i++) + { + if (i % 8 == 0) + { + dprintf("\r\n"); + } + dprintf(", 0x%02X", Data[i]); + } + dprintf("\r\n}\r\n"); +#endif + if (SPIF_WriteEnable(Handle) == false) + { + break; + } + SPIF_CsPin(Handle, 0); + if (Handle->BlockCnt >= 512) + { + tx[0] = SPIF_CMD_PAGEPROG4ADD; + tx[1] = (address & 0xFF000000) >> 24; + tx[2] = (address & 0x00FF0000) >> 16; + tx[3] = (address & 0x0000FF00) >> 8; + tx[4] = (address & 0x000000FF); + if (SPIF_Transmit(Handle, tx, 5, 100) == false) + { + SPIF_CsPin(Handle, 1); + break; + } + } + else + { + tx[0] = SPIF_CMD_PAGEPROG3ADD; + tx[1] = (address & 0x00FF0000) >> 16; + tx[2] = (address & 0x0000FF00) >> 8; + tx[3] = (address & 0x000000FF); + if (SPIF_Transmit(Handle, tx, 4, 100) == false) + { + SPIF_CsPin(Handle, 1); + break; + } + } + if (SPIF_Transmit(Handle, Data, Size, 1000) == false) + { + SPIF_CsPin(Handle, 1); + break; + } + SPIF_CsPin(Handle, 1); + if (SPIF_WaitForWriting(Handle, 100)) + { + dprintf("SPIF_WritePage() %d BYTES WITERN DONE AFTER %ld ms\r\n", (uint16_t)Size, HAL_GetTick() - dbgTime); + retVal = true; + } + + } while (0); + + SPIF_WriteDisable(Handle); + return retVal; +} + + + +bool SPIF_ReadFn(SPIF_HandleTypeDef *Handle, uint32_t Address, uint8_t *Data, uint32_t Size) +{ + bool retVal = false; + uint8_t tx[5]; + do + { +#if SPIF_DEBUG != SPIF_DEBUG_DISABLE + uint32_t dbgTime = HAL_GetTick(); +#endif + dprintf("SPIF_ReadAddress() START ADDRESS %ld\r\n", Address); + SPIF_CsPin(Handle, 0); + if (Handle->BlockCnt >= 512) + { + tx[0] = SPIF_CMD_READDATA4ADD; + tx[1] = (Address & 0xFF000000) >> 24; + tx[2] = (Address & 0x00FF0000) >> 16; + tx[3] = (Address & 0x0000FF00) >> 8; + tx[4] = (Address & 0x000000FF); + if (SPIF_Transmit(Handle, tx, 5, 100) == false) + { + SPIF_CsPin(Handle, 1); + break; + } + } + else + { + tx[0] = SPIF_CMD_READDATA3ADD; + tx[1] = (Address & 0x00FF0000) >> 16; + tx[2] = (Address & 0x0000FF00) >> 8; + tx[3] = (Address & 0x000000FF); + if (SPIF_Transmit(Handle, tx, 4, 100) == false) + { + SPIF_CsPin(Handle, 1); + break; + } + } + uint16_t max_uint16_size = 0xFFFF - 2; + if(Size > max_uint16_size) + { + uint32_t delta = Size; + uint32_t Data_offset = 0; + while(delta > 0) + { + if(delta <= max_uint16_size) + { + if (SPIF_Receive(Handle, (Data+Data_offset), delta, 2000) == false) + { + SPIF_CsPin(Handle, 1); + break; + } + delta = 0; + } + else + { + if (SPIF_Receive(Handle, (Data+Data_offset), max_uint16_size, 2000) == false) + { + SPIF_CsPin(Handle, 1); + break; + } + delta = abs(delta - max_uint16_size); + Data_offset += max_uint16_size; + } + } + if(delta > 0) + { + //break the main do-while loop, so as to return false + break; + } + } + else + { + if(SPIF_Receive(Handle, Data, Size, 2000) == false) + { + SPIF_CsPin(Handle, 1); + break; + } + } + SPIF_CsPin(Handle, 1); + dprintf("SPIF_ReadAddress() %d BYTES READ DONE AFTER %ld ms\r\n", (uint16_t)Size, HAL_GetTick() - dbgTime); +#if SPIF_DEBUG == SPIF_DEBUG_FULL + dprintf("{\r\n0x%02X", Data[0]); + for (int i = 1; i < Size; i++) + { + if (i % 8 == 0) + { + dprintf("\r\n"); + } + dprintf(", 0x%02X", Data[i]); + } + dprintf("\r\n}\r\n"); +#endif + retVal = true; + + } while (0); + + return retVal; +} + + + +/** + * @brief Full Erase chip. + * @note Send the Full-Erase-chip command and wait for completion + * + * @param *Handle: Pointer to SPIF_HandleTypeDef structure + * + * @retval bool: true or false + */ +bool SPIF_EraseChip(SPIF_HandleTypeDef *Handle) +{ + SPIF_Lock(Handle); + bool retVal = false; + uint8_t tx[1] = {SPIF_CMD_CHIPERASE1}; + do + { +#if SPIF_DEBUG != SPIF_DEBUG_DISABLE + uint32_t dbgTime = HAL_GetTick(); +#endif + dprintf("SPIF_EraseChip() START\r\n"); + if (SPIF_WriteEnable(Handle) == false) + { + break; + } + SPIF_CsPin(Handle, 0); + if (SPIF_Transmit(Handle, tx, 1, 100) == false) + { + SPIF_CsPin(Handle, 1); + break; + } + SPIF_CsPin(Handle, 1); + if (SPIF_WaitForWriting(Handle, Handle->BlockCnt * 1000)) + { + dprintf("SPIF_EraseChip() DONE AFTER %ld ms\r\n", HAL_GetTick() - dbgTime); + retVal = true; + } + + } while (0); + + SPIF_WriteDisable(Handle); + SPIF_UnLock(Handle); + return retVal; +} + + +/** + * @brief Erase Sector. + * @note Send the Erase-Sector command and wait for completion + * + * @param *Handle: Pointer to SPIF_HandleTypeDef structure + * @param Sector: Selected Sector + * + * @retval bool: true or false + */ +bool SPIF_EraseSector(SPIF_HandleTypeDef *Handle, uint32_t Sector) +{ + SPIF_Lock(Handle); + bool retVal = false; + uint32_t address = Sector * SPIF_SECTOR_SIZE; + uint8_t tx[5]; + do + { +#if SPIF_DEBUG != SPIF_DEBUG_DISABLE + uint32_t dbgTime = HAL_GetTick(); +#endif + dprintf("SPIF_EraseSector() START SECTOR %ld\r\n", Sector); + if (Sector >= Handle->SectorCnt) + { + dprintf("SPIF_EraseSector() ERROR Sector NUMBER\r\n"); + break; + } + if (SPIF_WriteEnable(Handle) == false) + { + break; + } + SPIF_CsPin(Handle, 0); + if (Handle->BlockCnt >= 512) + { + tx[0] = SPIF_CMD_SECTORERASE4ADD; + tx[1] = (address & 0xFF000000) >> 24; + tx[2] = (address & 0x00FF0000) >> 16; + tx[3] = (address & 0x0000FF00) >> 8; + tx[4] = (address & 0x000000FF); + if (SPIF_Transmit(Handle, tx, 5, 100) == false) + { + SPIF_CsPin(Handle, 1); + break; + } + } + else + { + tx[0] = SPIF_CMD_SECTORERASE3ADD; + tx[1] = (address & 0x00FF0000) >> 16; + tx[2] = (address & 0x0000FF00) >> 8; + tx[3] = (address & 0x000000FF); + if (SPIF_Transmit(Handle, tx, 4, 100) == false) + { + SPIF_CsPin(Handle, 1); + break; + } + } + SPIF_CsPin(Handle, 1); + if (SPIF_WaitForWriting(Handle, 1000)) + { + dprintf("SPIF_EraseSector() DONE AFTER %ld ms\r\n", HAL_GetTick() - dbgTime); + retVal = true; + } + + } while (0); + + SPIF_WriteDisable(Handle); + SPIF_UnLock(Handle); + return retVal; +} + + + /** * @brief Erase Block. * @note Send the Erase-Block command and wait for completion @@ -157,7 +581,7 @@ bool SPIF_W25XX_WriteReg3(SPIF_HandleTypeDef *Handle, uint8_t Data) * * @retval bool: true or false */ -bool SPIF_W25XX_EraseBlock(SPIF_HandleTypeDef *Handle, uint32_t Block) +bool SPIF_EraseBlock(SPIF_HandleTypeDef *Handle, uint32_t Block) { SPIF_Lock(Handle); bool retVal = false; @@ -219,4 +643,147 @@ bool SPIF_W25XX_EraseBlock(SPIF_HandleTypeDef *Handle, uint32_t Block) } +/***********************************************************************************************************/ +bool SPIF_FindChip(SPIF_HandleTypeDef *Handle) +{ + uint8_t tx[4] = {SPIF_CMD_JEDECID, 0xFF, 0xFF, 0xFF}; + uint8_t rx[4]; + bool retVal = false; + do + { + dprintf("SPIF_FindChip()\r\n"); + SPIF_CsPin(Handle, 0); + if (SPIF_TransmitReceive(Handle, tx, rx, 4, 100) == false) + { + SPIF_CsPin(Handle, 1); + break; + } + SPIF_CsPin(Handle, 1); + dprintf("CHIP ID: 0x%02X%02X%02X\r\n", rx[1], rx[2], rx[3]); + Handle->Manufactor = rx[1]; + Handle->MemType = rx[2]; + Handle->Size = rx[3]; + + dprintf("SPIF MANUFACTURE: "); + switch (Handle->Manufactor) + { + case SPIF_MANUFACTOR_WINBOND: + dprintf("WINBOND"); + break; + case SPIF_MANUFACTOR_SPANSION: + dprintf("SPANSION"); + break; + case SPIF_MANUFACTOR_MICRON: + dprintf("MICRON"); + break; + case SPIF_MANUFACTOR_MACRONIX: + dprintf("MACRONIX"); + break; + case SPIF_MANUFACTOR_ISSI: + dprintf("ISSI"); + break; + case SPIF_MANUFACTOR_GIGADEVICE: + dprintf("GIGADEVICE"); + break; + case SPIF_MANUFACTOR_AMIC: + dprintf("AMIC"); + break; + case SPIF_MANUFACTOR_SST: + dprintf("SST"); + break; + case SPIF_MANUFACTOR_HYUNDAI: + dprintf("HYUNDAI"); + break; + case SPIF_MANUFACTOR_FUDAN: + dprintf("FUDAN"); + break; + case SPIF_MANUFACTOR_ESMT: + dprintf("ESMT"); + break; + case SPIF_MANUFACTOR_INTEL: + dprintf("INTEL"); + break; + case SPIF_MANUFACTOR_SANYO: + dprintf("SANYO"); + break; + case SPIF_MANUFACTOR_FUJITSU: + dprintf("FUJITSU"); + break; + case SPIF_MANUFACTOR_EON: + dprintf("EON"); + break; + case SPIF_MANUFACTOR_PUYA: + dprintf("PUYA"); + break; + default: + Handle->Manufactor = SPIF_MANUFACTOR_ERROR; + dprintf("ERROR"); + break; + } + dprintf(" - MEMTYPE: 0x%02X", Handle->MemType); + dprintf(" - SIZE: "); + switch (Handle->Size) + { + case SPIF_SIZE_1MBIT: + Handle->BlockCnt = 2; + dprintf("1 MBIT\r\n"); + break; + case SPIF_SIZE_2MBIT: + Handle->BlockCnt = 4; + dprintf("2 MBIT\r\n"); + break; + case SPIF_SIZE_4MBIT: + Handle->BlockCnt = 8; + dprintf("4 MBIT\r\n"); + break; + case SPIF_SIZE_8MBIT: + Handle->BlockCnt = 16; + dprintf("8 MBIT\r\n"); + break; + case SPIF_SIZE_16MBIT: + Handle->BlockCnt = 32; + dprintf("16 MBIT\r\n"); + break; + case SPIF_SIZE_32MBIT: + Handle->BlockCnt = 64; + dprintf("32 MBIT\r\n"); + break; + case SPIF_SIZE_64MBIT: + Handle->BlockCnt = 128; + dprintf("64 MBIT\r\n"); + break; + case SPIF_SIZE_128MBIT: + Handle->BlockCnt = 256; + dprintf("128 MBIT\r\n"); + break; + case SPIF_SIZE_256MBIT: + Handle->BlockCnt = 512; + dprintf("256 MBIT\r\n"); + break; + case SPIF_SIZE_512MBIT: + Handle->BlockCnt = 1024; + dprintf("512 MBIT\r\n"); + break; + default: + Handle->Size = SPIF_SIZE_ERROR; + dprintf("ERROR\r\n"); + break; + } + + Handle->SectorCnt = Handle->BlockCnt * 16; + Handle->PageCnt = (Handle->SectorCnt * SPIF_SECTOR_SIZE) / SPIF_PAGE_SIZE; + dprintf("SPIF BLOCK CNT: %ld\r\n", Handle->BlockCnt); + dprintf("SPIF SECTOR CNT: %ld\r\n", Handle->SectorCnt); + dprintf("SPIF PAGE CNT: %ld\r\n", Handle->PageCnt); + dprintf("SPIF STATUS1: 0x%02X\r\n", SPIF_ReadReg1(Handle)); + dprintf("SPIF STATUS2: 0x%02X\r\n", SPIF_ReadReg2(Handle)); + dprintf("SPIF STATUS3: 0x%02X\r\n", SPIF_ReadReg3(Handle)); + retVal = true; + + } while (0); + + return retVal; +} + +#endif diff --git a/spif_compat_w25xx.h b/spif_compat_w25xx.h index e23ece1..5113b7e 100644 --- a/spif_compat_w25xx.h +++ b/spif_compat_w25xx.h @@ -2,82 +2,25 @@ #ifndef _SPIF_COMPAT_W25XX_H_ #define _SPIF_COMPAT_W25XX_H_ -#include -#include "spif.h" - -/*Register Definition for W25XX*/ -#define SPIF_DUMMY_BYTE 0xA5 - -#define SPIF_CMD_READSFDP 0x5A -#define SPIF_CMD_ID 0x90 -#define SPIF_CMD_JEDECID 0x9F -#define SPIF_CMD_UNIQUEID 0x4B -#define SPIF_CMD_WRITEDISABLE 0x04 -#define SPIF_CMD_READSTATUS1 0x05 -#define SPIF_CMD_READSTATUS2 0x35 -#define SPIF_CMD_READSTATUS3 0x15 -#define SPIF_CMD_WRITESTATUSEN 0x50 -#define SPIF_CMD_WRITESTATUS1 0x01 -#define SPIF_CMD_WRITESTATUS2 0x31 -#define SPIF_CMD_WRITESTATUS3 0x11 -#define SPIF_CMD_WRITEENABLE 0x06 -#define SPIF_CMD_ADDR4BYTE_EN 0xB7 -#define SPIF_CMD_ADDR4BYTE_DIS 0xE9 -#define SPIF_CMD_PAGEPROG3ADD 0x02 -#define SPIF_CMD_PAGEPROG4ADD 0x12 -#define SPIF_CMD_READDATA3ADD 0x03 -#define SPIF_CMD_READDATA4ADD 0x13 -#define SPIF_CMD_FASTREAD3ADD 0x0B -#define SPIF_CMD_FASTREAD4ADD 0x0C -#define SPIF_CMD_SECTORERASE3ADD 0x20 -#define SPIF_CMD_SECTORERASE4ADD 0x21 -#define SPIF_CMD_BLOCKERASE3ADD 0xD8 -#define SPIF_CMD_BLOCKERASE4ADD 0xDC -#define SPIF_CMD_CHIPERASE1 0x60 -#define SPIF_CMD_CHIPERASE2 0xC7 -#define SPIF_CMD_SUSPEND 0x75 -#define SPIF_CMD_RESUME 0x7A -#define SPIF_CMD_POWERDOWN 0xB9 -#define SPIF_CMD_RELEASE 0xAB -#define SPIF_CMD_FRAMSERNO 0xC3 - -#define SPIF_STATUS1_BUSY (1 << 0) -#define SPIF_STATUS1_WEL (1 << 1) -#define SPIF_STATUS1_BP0 (1 << 2) -#define SPIF_STATUS1_BP1 (1 << 3) -#define SPIF_STATUS1_BP2 (1 << 4) -#define SPIF_STATUS1_TP (1 << 5) -#define SPIF_STATUS1_SEC (1 << 6) -#define SPIF_STATUS1_SRP0 (1 << 7) - -#define SPIF_STATUS2_SRP1 (1 << 0) -#define SPIF_STATUS2_QE (1 << 1) -#define SPIF_STATUS2_RESERVE1 (1 << 2) -#define SPIF_STATUS2_LB0 (1 << 3) -#define SPIF_STATUS2_LB1 (1 << 4) -#define SPIF_STATUS2_LB2 (1 << 5) -#define SPIF_STATUS2_CMP (1 << 6) -#define SPIF_STATUS2_SUS (1 << 7) - -#define SPIF_STATUS3_RESERVE1 (1 << 0) -#define SPIF_STATUS3_RESERVE2 (1 << 1) -#define SPIF_STATUS3_WPS (1 << 2) -#define SPIF_STATUS3_RESERVE3 (1 << 3) -#define SPIF_STATUS3_RESERVE4 (1 << 4) -#define SPIF_STATUS3_DRV0 (1 << 5) -#define SPIF_STATUS3_DRV1 (1 << 6) -#define SPIF_STATUS3_HOLD (1 << 7) +#include "spif_util.h" +#include // W25XX-specific function prototypes -uint8_t SPIF_W25XX_ReadReg1(SPIF_HandleTypeDef *Handle); -uint8_t SPIF_W25XX_ReadReg2(SPIF_HandleTypeDef *Handle); -uint8_t SPIF_W25XX_ReadReg3(SPIF_HandleTypeDef *Handle); -bool SPIF_W25XX_WriteReg1(SPIF_HandleTypeDef *Handle, uint8_t Data); -bool SPIF_W25XX_WriteReg2(SPIF_HandleTypeDef *Handle, uint8_t Data); -bool SPIF_W25XX_WriteReg3(SPIF_HandleTypeDef *Handle, uint8_t Data); - - -bool SPIF_W25XX_EraseBlock(SPIF_HandleTypeDef *Handle, uint32_t Block); +bool SPIF_WriteEnable(SPIF_HandleTypeDef *Handle); +bool SPIF_WriteDisable(SPIF_HandleTypeDef *Handle); +bool SPIF_WaitForWriting(SPIF_HandleTypeDef *Handle, uint32_t Timeout); +uint8_t SPIF_ReadReg1(SPIF_HandleTypeDef *Handle); +uint8_t SPIF_ReadReg2(SPIF_HandleTypeDef *Handle); +uint8_t SPIF_ReadReg3(SPIF_HandleTypeDef *Handle); +bool SPIF_WriteReg1(SPIF_HandleTypeDef *Handle, uint8_t Data); +bool SPIF_WriteReg2(SPIF_HandleTypeDef *Handle, uint8_t Data); +bool SPIF_WriteReg3(SPIF_HandleTypeDef *Handle, uint8_t Data); +bool SPIF_WriteFn(SPIF_HandleTypeDef *Handle, uint32_t PageNumber, uint8_t *Data, uint32_t Size, uint32_t Offset); +bool SPIF_ReadFn(SPIF_HandleTypeDef *Handle, uint32_t Address, uint8_t *Data, uint32_t Size); +bool SPIF_EraseChip(SPIF_HandleTypeDef *Handle); +bool SPIF_EraseSector(SPIF_HandleTypeDef *Handle, uint32_t Sector); +bool SPIF_EraseBlock(SPIF_HandleTypeDef *Handle, uint32_t Block); +bool SPIF_FindChip(SPIF_HandleTypeDef *Handle); #endif diff --git a/spif_interface_octospi.c b/spif_interface_octospi.c index 75deca1..9b40c3b 100644 --- a/spif_interface_octospi.c +++ b/spif_interface_octospi.c @@ -1,8 +1,7 @@ #include "spif_interface_octospi.h" #include "spif.h" -#include "ospi.h" -#include "NimaLTD.I-CUBE-SPIF_conf.h" +#if (SPIF_INTERFACE == SPIF_INTERFACE_OCTOSPI) /** * @brief Initialize the SPIF. * @note Enable and configure the SPI and Set GPIO as output for CS pin on the CubeMX @@ -14,44 +13,44 @@ * * @retval bool: true or false */ -bool SPIF_OCTOSPI_Init(SPIF_HandleTypeDef *Handle, OSPI_HandleTypeDef *HOspi, GPIO_TypeDef *Gpio, uint16_t Pin){ - - bool retVal = false; - do - { - if ((Handle == NULL) || (HOspi == NULL) || (Gpio == NULL) || (Handle->Inited == 1)) - { - dprintf("SPIF_Init() Error, Wrong Parameter\r\n"); - break; - } - memset(Handle, 0, sizeof(SPIF_HandleTypeDef)); - Handle->interface = HOspi; - Handle->Gpio = Gpio; - Handle->Pin = Pin; - SPIF_CsPin(Handle, 1); - /* wait for stable VCC */ - while (HAL_GetTick() < 20) - { - SPIF_Delay(1); - } - if (SPIF_WriteDisable(Handle) == false) - { - break; - } - retVal = SPIF_FindChip(Handle); - if (retVal) - { - Handle->Inited = 1; - dprintf("SPIF_Init() Done\r\n"); - } - - } while (0); - - return retVal; -} - - -bool SPIF_OCTOSPI_TransmitReceive(SPIF_HandleTypeDef *Handle, uint8_t *Tx, uint8_t *Rx, size_t Size, uint32_t Timeout){ +//bool SPIF_OCTOSPI_Init(SPIF_HandleTypeDef *Handle, OSPI_HandleTypeDef *HOspi, GPIO_TypeDef *Gpio, uint16_t Pin){ +// +// bool retVal = false; +// do +// { +// if ((Handle == NULL) || (HOspi == NULL) || (Gpio == NULL) || (Handle->Inited == 1)) +// { +// dprintf("SPIF_Init() Error, Wrong Parameter\r\n"); +// break; +// } +// memset(Handle, 0, sizeof(SPIF_HandleTypeDef)); +// Handle->interface = HOspi; +// Handle->Gpio = Gpio; +// Handle->Pin = Pin; +// SPIF_CsPin(Handle, 1); +// /* wait for stable VCC */ +// while (HAL_GetTick() < 20) +// { +// SPIF_Delay(1); +// } +// if (SPIF_WriteDisable(Handle) == false) +// { +// break; +// } +// retVal = SPIF_FindChip(Handle); +// if (retVal) +// { +// Handle->Inited = 1; +// dprintf("SPIF_Init() Done\r\n"); +// } +// +// } while (0); +// +// return retVal; +//} + + +bool SPIF_TransmitReceive(SPIF_HandleTypeDef *Handle, uint8_t *Tx, uint8_t *Rx, size_t Size, uint32_t Timeout){ bool retVal = false; OSPI_RegularCmdTypeDef sCommand = {0}; @@ -80,7 +79,7 @@ if (HAL_OSPI_Command(Handle->interface, &sCommand, Timeout) != HAL_OK) } -bool SPIF_OCTOSPI_Transmit(SPIF_HandleTypeDef *Handle, uint8_t *Tx, size_t Size, uint32_t Timeout){ +bool SPIF_Transmit(SPIF_HandleTypeDef *Handle, uint8_t *Tx, size_t Size, uint32_t Timeout){ bool retVal = false; OSPI_RegularCmdTypeDef sCommand = {0}; @@ -107,7 +106,7 @@ if (HAL_OSPI_Command(Handle->interface, &sCommand, Timeout) != HAL_OK) } -bool SPIF_OCTOSPI_Receive(SPIF_HandleTypeDef *Handle, uint8_t *Rx, size_t Size, uint32_t Timeout){ +bool SPIF_Receive(SPIF_HandleTypeDef *Handle, uint8_t *Rx, size_t Size, uint32_t Timeout){ bool retVal = false; OSPI_RegularCmdTypeDef sCommand = {0}; @@ -134,3 +133,5 @@ bool SPIF_OCTOSPI_Receive(SPIF_HandleTypeDef *Handle, uint8_t *Rx, size_t Size, return retVal; } + +#endif diff --git a/spif_interface_octospi.h b/spif_interface_octospi.h index b996366..ad3ad78 100644 --- a/spif_interface_octospi.h +++ b/spif_interface_octospi.h @@ -1,12 +1,12 @@ #ifndef _SPIF_INTERFACE_OCTOSPI_H_ #define _SPIF_INTERFACE_OCTOSPI_H_ -#include "spif.h" -#include +#include "spif_util.h" +#include "stm32u5xx_hal_ospi.h" -bool SPIF_OCTOSPI_Init(SPIF_HandleTypeDef *Handle, OSPI_HandleTypeDef *HOspi, GPIO_TypeDef *Gpio, uint16_t Pin); -bool SPIF_OCTOSPI_TransmitReceive(SPIF_HandleTypeDef *Handle, uint8_t *Tx, uint8_t *Rx, size_t Size, uint32_t Timeout); -bool SPIF_OCTOSPI_Transmit(SPIF_HandleTypeDef *Handle, uint8_t *Tx, size_t Size, uint32_t Timeout); -bool SPIF_OCTOSPI_Receive(SPIF_HandleTypeDef *Handle, uint8_t *Rx, size_t Size, uint32_t Timeout); +//bool SPIF_OCTOSPI_Init(SPIF_HandleTypeDef *Handle, OSPI_HandleTypeDef *HOspi, GPIO_TypeDef *Gpio, uint16_t Pin); +//bool SPIF_OCTOSPI_TransmitReceive(SPIF_HandleTypeDef *Handle, uint8_t *Tx, uint8_t *Rx, size_t Size, uint32_t Timeout); +//bool SPIF_OCTOSPI_Transmit(SPIF_HandleTypeDef *Handle, uint8_t *Tx, size_t Size, uint32_t Timeout); +//bool SPIF_OCTOSPI_Receive(SPIF_HandleTypeDef *Handle, uint8_t *Rx, size_t Size, uint32_t Timeout); #endif diff --git a/spif_interface_spi.c b/spif_interface_spi.c index 2235148..b1c857b 100644 --- a/spif_interface_spi.c +++ b/spif_interface_spi.c @@ -1,6 +1,8 @@ + #include "spif_interface_spi.h" #include "spif.h" -#include "NimaLTD.I-CUBE-SPIF_conf.h" + +#if(SPIF_INTERFACE == SPIF_INTERFACE_SPI) /** * @brief Initialize the SPIF. @@ -13,43 +15,43 @@ * * @retval bool: true or false */ -bool SPIF_SPI_Init(SPIF_HandleTypeDef *Handle, SPI_HandleTypeDef *HSpi, GPIO_TypeDef *Gpio, uint16_t Pin) -{ - bool retVal = false; - do - { - if ((Handle == NULL) || (HSpi == NULL) || (Gpio == NULL) || (Handle->Inited == 1)) - { - dprintf("SPIF_Init() Error, Wrong Parameter\r\n"); - break; - } - memset(Handle, 0, sizeof(SPIF_HandleTypeDef)); - Handle->interface = HSpi; - Handle->Gpio = Gpio; - Handle->Pin = Pin; - SPIF_CsPin(Handle, 1); - /* wait for stable VCC */ - while (HAL_GetTick() < 20) - { - SPIF_Delay(1); - } - if (SPIF_WriteDisable(Handle) == false) - { - break; - } - retVal = SPIF_FindChip(Handle); - if (retVal) - { - Handle->Inited = 1; - dprintf("SPIF_Init() Done\r\n"); - } - - } while (0); +//bool SPIF_Init(SPIF_HandleTypeDef *Handle, SPI_HandleTypeDef *HSpi, GPIO_TypeDef *Gpio, uint16_t Pin) +//{ +// bool retVal = false; +// do +// { +// if ((Handle == NULL) || (HSpi == NULL) || (Gpio == NULL) || (Handle->Inited == 1)) +// { +// dprintf("SPIF_Init() Error, Wrong Parameter\r\n"); +// break; +// } +// memset(Handle, 0, sizeof(SPIF_HandleTypeDef)); +// Handle->interface = HSpi; +// Handle->Gpio = Gpio; +// Handle->Pin = Pin; +// SPIF_CsPin(Handle, 1); +// /* wait for stable VCC */ +// while (HAL_GetTick() < 20) +// { +// SPIF_Delay(1); +// } +// if (SPIF_WriteDisable(Handle) == false) +// { +// break; +// } +// retVal = SPIF_FindChip(Handle); +// if (retVal) +// { +// Handle->Inited = 1; +// dprintf("SPIF_Init() Done\r\n"); +// } +// +// } while (0); +// +// return retVal; +//} - return retVal; -} - -bool SPIF_SPI_TransmitReceive(SPIF_HandleTypeDef *Handle, uint8_t *Tx, uint8_t *Rx, size_t Size, uint32_t Timeout) +bool SPIF_TransmitReceive(SPIF_HandleTypeDef *Handle, uint8_t *Tx, uint8_t *Rx, size_t Size, uint32_t Timeout) { bool retVal = false; #if (SPIF_PLATFORM == SPIF_PLATFORM_HAL) @@ -89,7 +91,7 @@ bool SPIF_SPI_TransmitReceive(SPIF_HandleTypeDef *Handle, uint8_t *Tx, uint8_t * return retVal; } -bool SPIF_SPI_Transmit(SPIF_HandleTypeDef *Handle, uint8_t *Tx, size_t Size, uint32_t Timeout) +bool SPIF_Transmit(SPIF_HandleTypeDef *Handle, uint8_t *Tx, size_t Size, uint32_t Timeout) { bool retVal = false; @@ -130,7 +132,7 @@ bool SPIF_SPI_Transmit(SPIF_HandleTypeDef *Handle, uint8_t *Tx, size_t Size, uin return retVal; } -bool SPIF_SPI_Receive(SPIF_HandleTypeDef *Handle, uint8_t *Rx, size_t Size, uint32_t Timeout) +bool SPIF_Receive(SPIF_HandleTypeDef *Handle, uint8_t *Rx, size_t Size, uint32_t Timeout) { bool retVal = false; @@ -170,3 +172,5 @@ bool SPIF_SPI_Receive(SPIF_HandleTypeDef *Handle, uint8_t *Rx, size_t Size, uint #endif return retVal; } + +#endif diff --git a/spif_interface_spi.h b/spif_interface_spi.h index 0f88078..8f73dc4 100644 --- a/spif_interface_spi.h +++ b/spif_interface_spi.h @@ -1,12 +1,12 @@ #ifndef _SPIF_INTERFACE_SPI_H_ #define _SPIF_INTERFACE_SPI_H_ -#include "spif.h" -#include "spi.h" +#include "spif_util.h" +#include "stm32u5xx_hal_spi.h" -bool SPIF_SPI_Init(SPIF_HandleTypeDef *Handle, SPI_HandleTypeDef *HSpi, GPIO_TypeDef *Gpio, uint16_t Pin); -bool SPIF_SPI_TransmitReceive(SPIF_HandleTypeDef *Handle, uint8_t *Tx, uint8_t *Rx, size_t Size, uint32_t Timeout); -bool SPIF_SPI_Transmit(SPIF_HandleTypeDef *Handle, uint8_t *Tx, size_t Size, uint32_t Timeout); -bool SPIF_SPI_Receive(SPIF_HandleTypeDef *Handle, uint8_t *Rx, size_t Size, uint32_t Timeout); +//bool SPIF_Init(SPIF_HandleTypeDef *Handle, SPI_HandleTypeDef *HSpi, GPIO_TypeDef *Gpio, uint16_t Pin); +//bool SPIF_TransmitReceive(SPIF_HandleTypeDef *Handle, uint8_t *Tx, uint8_t *Rx, size_t Size, uint32_t Timeout); +//bool SPIF_Transmit(SPIF_HandleTypeDef *Handle, uint8_t *Tx, size_t Size, uint32_t Timeout); +//bool SPIF_Receive(SPIF_HandleTypeDef *Handle, uint8_t *Rx, size_t Size, uint32_t Timeout); #endif diff --git a/spif_util.c b/spif_util.c new file mode 100644 index 0000000..a1626fd --- /dev/null +++ b/spif_util.c @@ -0,0 +1,8 @@ +/* + * spif_util.c + * + * Created on: May 15, 2025 + * Author: Megh Shah + */ + + diff --git a/spif_util.h b/spif_util.h new file mode 100644 index 0000000..e7f824d --- /dev/null +++ b/spif_util.h @@ -0,0 +1,99 @@ +/* + * spif_types.h + * + * Created on: May 15, 2025 + * Author: Megh Shah + */ + +#ifndef INC_SPIF_UTIL_H_ +#define INC_SPIF_UTIL_H_ + +#include +#include +#include "stm32u5xx_hal.h" + + + +/************************************************************************************************************ + ************** Public Definitions + ************************************************************************************************************/ + +#define SPIF_PAGE_SIZE 0x100 +#define SPIF_SECTOR_SIZE 0x1000 +#define SPIF_BLOCK_SIZE 0x10000 + +#define SPIF_PageToSector(PageNumber) (((PageNumber) * SPIF_PAGE_SIZE) / SPIF_SECTOR_SIZE) +#define SPIF_PageToBlock(PageNumber) (((PageNumber) * SPIF_PAGE_SIZE) / SPIF_BLOCK_SIZE) +#define SPIF_SectorToBlock(SectorNumber) (((SectorNumber) * SPIF_SECTOR_SIZE) / SPIF_BLOCK_SIZE) +#define SPIF_SectorToPage(SectorNumber) (((SectorNumber) * SPIF_SECTOR_SIZE) / SPIF_PAGE_SIZE) +#define SPIF_BlockToPage(BlockNumber) (((BlockNumber) * SPIF_BLOCK_SIZE) / SPIF_PAGE_SIZE) +#define SPIF_PageToAddress(PageNumber) ((PageNumber) * SPIF_PAGE_SIZE) +#define SPIF_SectorToAddress(SectorNumber) ((SectorNumber) * SPIF_SECTOR_SIZE) +#define SPIF_BlockToAddress(BlockNumber) ((BlockNumber) * SPIF_BLOCK_SIZE) +#define SPIF_AddressToPage(Address) ((Address) / SPIF_PAGE_SIZE) +#define SPIF_AddressToSector(Address) ((Address) / SPIF_SECTOR_SIZE) +#define SPIF_AddressToBlock(Address) ((Address) / SPIF_BLOCK_SIZE) + + +/************************************************************************************************************ + ************** Public struct/enum + ************************************************************************************************************/ + +typedef enum { + SPIF_MANUFACTOR_ERROR = 0, + SPIF_MANUFACTOR_WINBOND = 0xEF, + SPIF_MANUFACTOR_ISSI = 0xD5, + SPIF_MANUFACTOR_MICRON = 0x20, + SPIF_MANUFACTOR_GIGADEVICE = 0xC8, + SPIF_MANUFACTOR_MACRONIX = 0xC2, + SPIF_MANUFACTOR_SPANSION = 0x01, + SPIF_MANUFACTOR_AMIC = 0x37, + SPIF_MANUFACTOR_SST = 0xBF, + SPIF_MANUFACTOR_HYUNDAI = 0xAD, + SPIF_MANUFACTOR_ATMEL = 0x1F, + SPIF_MANUFACTOR_FUDAN = 0xA1, + SPIF_MANUFACTOR_ESMT = 0x8C, + SPIF_MANUFACTOR_INTEL = 0x89, + SPIF_MANUFACTOR_SANYO = 0x62, + SPIF_MANUFACTOR_FUJITSU = 0x04, + SPIF_MANUFACTOR_EON = 0x1C, + SPIF_MANUFACTOR_PUYA = 0x85, + +} SPIF_ManufactorTypeDef; + +typedef enum { + SPIF_SIZE_ERROR = 0, + SPIF_SIZE_1MBIT = 0x11, + SPIF_SIZE_2MBIT = 0x12, + SPIF_SIZE_4MBIT = 0x13, + SPIF_SIZE_8MBIT = 0x14, + SPIF_SIZE_16MBIT = 0x15, + SPIF_SIZE_32MBIT = 0x16, + SPIF_SIZE_64MBIT = 0x17, + SPIF_SIZE_128MBIT = 0x18, + SPIF_SIZE_256MBIT = 0x19, + SPIF_SIZE_512MBIT = 0x20, + +} SPIF_SizeTypeDef; + +typedef struct { + void *interface; + GPIO_TypeDef *Gpio; + SPIF_ManufactorTypeDef Manufactor; + SPIF_SizeTypeDef Size; + uint8_t Inited; + uint8_t MemType; + uint8_t Lock; + uint8_t Reserved; + uint32_t Pin; + uint32_t PageCnt; + uint32_t SectorCnt; + uint32_t BlockCnt; + +} SPIF_HandleTypeDef; + + + + + +#endif /* INC_SPIF_UTIL_H_ */ From dea987b92049e33201d15da0110ae13ae4fdda1d Mon Sep 17 00:00:00 2001 From: Megh Shah Date: Fri, 16 May 2025 14:17:15 +0530 Subject: [PATCH 12/17] Corrected spif_util.c and spif_util.h - Corrected spif_util.c and spif_util.h to hold common functions. --- spif_util.c | 48 ++++++++++++++++++++++++++++++++++++++++++++++++ spif_util.h | 6 ++++++ 2 files changed, 54 insertions(+) diff --git a/spif_util.c b/spif_util.c index a1626fd..10f26f2 100644 --- a/spif_util.c +++ b/spif_util.c @@ -5,4 +5,52 @@ * Author: Megh Shah */ +#include "spif_util.h" + +/***********************************************************************************************************/ + +void SPIF_Delay(uint32_t Delay) +{ +#if SPIF_RTOS == SPIF_RTOS_DISABLE + HAL_Delay(Delay); +#elif (SPIF_RTOS == SPIF_RTOS_CMSIS_V1) || (SPIF_RTOS == SPIF_RTOS_CMSIS_V2) + uint32_t d = (configTICK_RATE_HZ * Delay) / 1000; + if (d == 0) + d = 1; + osDelay(d); +#elif SPIF_RTOS == SPIF_RTOS_THREADX + uint32_t d = (TX_TIMER_TICKS_PER_SECOND * Delay) / 1000; + if (d == 0) + d = 1; + tx_thread_sleep(d); +#endif +} + +/***********************************************************************************************************/ + +void SPIF_Lock(SPIF_HandleTypeDef *Handle) +{ + while (Handle->Lock) + { + SPIF_Delay(1); + } + Handle->Lock = 1; +} + +/***********************************************************************************************************/ + +void SPIF_UnLock(SPIF_HandleTypeDef *Handle) +{ + Handle->Lock = 0; +} + +/***********************************************************************************************************/ + +void SPIF_CsPin(SPIF_HandleTypeDef *Handle, bool Select) +{ + HAL_GPIO_WritePin(Handle->Gpio, Handle->Pin, (GPIO_PinState)Select); + for (int i = 0; i < 10; i++); +} + + diff --git a/spif_util.h b/spif_util.h index e7f824d..5b691c9 100644 --- a/spif_util.h +++ b/spif_util.h @@ -93,6 +93,12 @@ typedef struct { } SPIF_HandleTypeDef; +/*Helper Functions*/ +void SPIF_Delay(uint32_t Delay); +void SPIF_Lock(SPIF_HandleTypeDef *Handle); +void SPIF_UnLock(SPIF_HandleTypeDef *Handle); +void SPIF_CsPin(SPIF_HandleTypeDef *Handle, bool Select); + From 9dbc736ef3ab51196f744c3fbcc2aa69eeca412a Mon Sep 17 00:00:00 2001 From: Megh Shah Date: Fri, 16 May 2025 16:37:46 +0530 Subject: [PATCH 13/17] Changed SPI to emulate OctoSPI phases - Added the init function for SPIF. - Added SPIF_EmulatedPhases struct to SPIF_HandleTypeDef. - Changed the functions in compat files to use emulated phases. - Changed the functions of OctoSPI to use phases properly. --- spif.c | 96 ++--- spif.h | 8 +- spif_compat_is25xx.c | 903 ++++++++++++++++++++------------------- spif_compat_is25xx.h | 1 + spif_compat_w25xx.c | 246 +++++++---- spif_interface_octospi.c | 247 +++++------ spif_interface_spi.c | 235 ++++++---- spif_interface_spi.h | 5 + spif_util.c | 58 +++ spif_util.h | 23 + 10 files changed, 1035 insertions(+), 787 deletions(-) diff --git a/spif.c b/spif.c index a9a8caf..7c02a93 100644 --- a/spif.c +++ b/spif.c @@ -20,53 +20,6 @@ /***********************************************************************************************************/ -void SPIF_Delay(uint32_t Delay) -{ -#if SPIF_RTOS == SPIF_RTOS_DISABLE - HAL_Delay(Delay); -#elif (SPIF_RTOS == SPIF_RTOS_CMSIS_V1) || (SPIF_RTOS == SPIF_RTOS_CMSIS_V2) - uint32_t d = (configTICK_RATE_HZ * Delay) / 1000; - if (d == 0) - d = 1; - osDelay(d); -#elif SPIF_RTOS == SPIF_RTOS_THREADX - uint32_t d = (TX_TIMER_TICKS_PER_SECOND * Delay) / 1000; - if (d == 0) - d = 1; - tx_thread_sleep(d); -#endif -} - -/***********************************************************************************************************/ - -void SPIF_Lock(SPIF_HandleTypeDef *Handle) -{ - while (Handle->Lock) - { - SPIF_Delay(1); - } - Handle->Lock = 1; -} - -/***********************************************************************************************************/ - -void SPIF_UnLock(SPIF_HandleTypeDef *Handle) -{ - Handle->Lock = 0; -} - -/***********************************************************************************************************/ - -void SPIF_CsPin(SPIF_HandleTypeDef *Handle, bool Select) -{ - HAL_GPIO_WritePin(Handle->Gpio, Handle->Pin, (GPIO_PinState)Select); - for (int i = 0; i < 10; i++); -} - - - -/***********************************************************************************************************/ - @@ -76,9 +29,54 @@ void SPIF_CsPin(SPIF_HandleTypeDef *Handle, bool Select) ************** Public Functions ************************************************************************************************************/ -/***********************************************************************************************************/ -/***********************************************************************************************************/ +/** + * @brief Initialize the SPIF. + * @note Enable and configure the SPI and Set GPIO as output for CS pin on the CubeMX + * + * @param *Handle: Pointer to SPIF_HandleTypeDef structure + * @param *interface: Pointer to either SPI_HandleTypeDef or OSPI_HandleTypeDef structure + * @param *Gpio: Pointer to a GPIO_TypeDef structure for CS + * @param Pin: Pin of CS + * + * @retval bool: true or false + */ +bool SPIF_Init(SPIF_HandleTypeDef *Handle, void *interface, GPIO_TypeDef *Gpio, uint16_t Pin) +{ + bool retVal = false; + do + { + if ((Handle == NULL) || (interface == NULL) || (Gpio == NULL) || (Handle->Inited == 1)) + { + dprintf("SPIF_Init() Error, Wrong Parameter\r\n"); + break; + } + memset(Handle, 0, sizeof(SPIF_HandleTypeDef)); + Handle->interface = interface; + Handle->Gpio = Gpio; + Handle->Pin = Pin; + SPIF_CsPin(Handle, 1); + /* wait for stable VCC */ + while (HAL_GetTick() < 20) + { + SPIF_Delay(1); + } + if (SPIF_WriteDisable(Handle) == false) + { + break; + } + retVal = SPIF_FindChip(Handle); + if (retVal) + { + Handle->Inited = 1; + dprintf("SPIF_Init() Done\r\n"); + } + + } while (0); + + return retVal; +} + /** * @brief Write data array to an Address diff --git a/spif.h b/spif.h index 0d174d1..c61916e 100644 --- a/spif.h +++ b/spif.h @@ -60,7 +60,7 @@ extern "C" #include "stm32u5xx_hal.h" #include "stm32u5xx_hal_ospi.h" #else -#include "spi.h" +#include "stm32u5xx_hal_spi.h" #endif bool SPIF_TransmitReceive(SPIF_HandleTypeDef *Handle, uint8_t *Tx, @@ -93,11 +93,7 @@ extern "C" #endif - /*Helper Functions*/ - void SPIF_Delay(uint32_t Delay); - void SPIF_Lock(SPIF_HandleTypeDef *Handle); - void SPIF_UnLock(SPIF_HandleTypeDef *Handle); - void SPIF_CsPin(SPIF_HandleTypeDef *Handle, bool Select); + /************************************************************************************************************ ************** Public Functions diff --git a/spif_compat_is25xx.c b/spif_compat_is25xx.c index ea1fc4a..612e164 100644 --- a/spif_compat_is25xx.c +++ b/spif_compat_is25xx.c @@ -1,7 +1,6 @@ #include "spif_compat_is25xx.h" #include "spif.h" - #if (SPIF_COMPAT == SPIF_COMPAT_IS25XX) /*Register Definitions for IS25XX*/ @@ -155,7 +154,6 @@ /*Password Register*/ // TODO: define the password register bits - /*PPB Lock Register*/ #define SPIF_PPBLOCKREG_PPBLOCK (1 << 0) //PPB Lock Bit //bit 1 to 6 are reserved @@ -163,134 +161,132 @@ /*PPB Register*/ //TODO: confirm if need this definition - /*DYB register*/ //TODO: confirm if need this definition - - - -bool SPIF_WriteEnable(SPIF_HandleTypeDef *Handle) -{ - bool retVal = true; - uint8_t tx[1] = {SPIF_CMD_WRITEENABLE}; - SPIF_CsPin(Handle, 0); - if (SPIF_Transmit(Handle, tx, 1, 100) == false) - { - retVal = false; - dprintf("SPIF_WriteEnable() Error\r\n"); - } - SPIF_CsPin(Handle, 1); - return retVal; +bool SPIF_WriteEnable(SPIF_HandleTypeDef *Handle) { + bool retVal = true; + uint8_t tx[1] = { SPIF_CMD_WRITEENABLE }; + + SPIF_SetInstructionPhase(Handle, true, 1, SPIF_CMD_WRITEENABLE); + SPIF_SetAddressPhase(Handle, false, 0, 0); + SPIF_SetDummyCycles(Handle, 0); + SPIF_SetDataPhase(Handle, false); + + SPIF_CsPin(Handle, 0); + if (SPIF_Transmit(Handle, tx, 1, 100) == false) { + retVal = false; + dprintf("SPIF_WriteEnable() Error\r\n"); + } + SPIF_CsPin(Handle, 1); + return retVal; } - -bool SPIF_WriteDisable(SPIF_HandleTypeDef *Handle) -{ - bool retVal = true; - uint8_t tx[1] = {SPIF_CMD_WRITEDISABLE}; - SPIF_CsPin(Handle, 0); - if (SPIF_Transmit(Handle, tx, 1, 100) == false) - { - retVal = false; - dprintf("SPIF_WriteDisable() Error\r\n"); - } - SPIF_CsPin(Handle, 1); - return retVal; +bool SPIF_WriteDisable(SPIF_HandleTypeDef *Handle) { + bool retVal = true; + uint8_t tx[1] = { SPIF_CMD_WRITEDISABLE }; + + SPIF_SetInstructionPhase(Handle, true, 1, SPIF_CMD_WRITEDISABLE); + SPIF_SetAddressPhase(Handle, false, 0, 0); + SPIF_SetDummyCycles(Handle, 0); + SPIF_SetDataPhase(Handle, false); + + SPIF_CsPin(Handle, 0); + if (SPIF_Transmit(Handle, tx, 1, 100) == false) { + retVal = false; + dprintf("SPIF_WriteDisable() Error\r\n"); + } + SPIF_CsPin(Handle, 1); + return retVal; } +bool SPIF_WaitForWriting(SPIF_HandleTypeDef *Handle, uint32_t Timeout) { + bool retVal = false; + uint32_t startTime = HAL_GetTick(); + while (1) { + SPIF_Delay(1); + if (HAL_GetTick() - startTime >= Timeout) { + dprintf("SPIF_WaitForWriting() TIMEOUT\r\n"); + break; + } + if ((SPIF_ReadReg1(Handle) & SPIF_STATUS_WIP) == 0) + + { + retVal = true; + break; + } + } + return retVal; +} - -bool SPIF_WaitForWriting(SPIF_HandleTypeDef *Handle, uint32_t Timeout) -{ - bool retVal = false; - uint32_t startTime = HAL_GetTick(); - while (1) - { - SPIF_Delay(1); - if (HAL_GetTick() - startTime >= Timeout) - { - dprintf("SPIF_WaitForWriting() TIMEOUT\r\n"); - break; - } - if ((SPIF_ReadReg1(Handle) & SPIF_STATUS_WIP) == 0) - - { - retVal = true; - break; - } - } - return retVal; +uint8_t SPIF_ReadReg1(SPIF_HandleTypeDef *Handle) { + uint8_t retVal = 0; +// uint8_t tx[2] = { SPIF_CMD_READSTATUS1, SPIF_DUMMY_BYTE }; + uint8_t rx[2]; + + SPIF_SetInstructionPhase(Handle, true, 1, SPIF_CMD_READSTATUS1); + SPIF_SetAddressPhase(Handle, false, 0, 0); + SPIF_SetDummyCycles(Handle, 1); + SPIF_SetDataPhase(Handle, false); + + SPIF_CsPin(Handle, 0); + if (SPIF_Receive(Handle, rx, 2, 100) == true) { + retVal = rx[1]; + } + SPIF_CsPin(Handle, 1); + return retVal; } +bool SPIF_WriteReg1(SPIF_HandleTypeDef *Handle, uint8_t Data) { + bool retVal = true; + uint8_t tx[1] = { Data }; -uint8_t SPIF_ReadReg1(SPIF_HandleTypeDef *Handle) -{ - uint8_t retVal = 0; - uint8_t tx[2] = {SPIF_CMD_READSTATUS1, SPIF_DUMMY_BYTE}; - uint8_t rx[2]; - SPIF_CsPin(Handle, 0); - if (SPIF_TransmitReceive(Handle, tx, rx, 2, 100) == true) - { - retVal = rx[1]; - } - SPIF_CsPin(Handle, 1); - return retVal; -} + SPIF_SetInstructionPhase(Handle, true, 1, SPIF_CMD_WRITESTATUS1); + SPIF_SetAddressPhase(Handle, false, 0, 0); + SPIF_SetDummyCycles(Handle, 0); + SPIF_SetDataPhase(Handle, true); -bool SPIF_WriteReg1(SPIF_HandleTypeDef *Handle, uint8_t Data) -{ - bool retVal = true; - uint8_t tx[2] = {SPIF_CMD_WRITESTATUS1, Data}; - - do - { - - if (SPIF_WriteEnable(Handle) == false){ - retVal = false; - break; - } + do { - SPIF_CsPin(Handle, 0); - if (SPIF_Transmit(Handle, tx, 2, 100) == false) - { - retVal = false; - SPIF_CsPin(Handle, 1); - break; - } - SPIF_CsPin(Handle, 1); - } while (0); + if (SPIF_WriteEnable(Handle) == false) { + retVal = false; + break; + } - return retVal; -} + SPIF_CsPin(Handle, 0); + if (SPIF_Transmit(Handle, tx, 1, 100) == false) { + retVal = false; + SPIF_CsPin(Handle, 1); + break; + } + SPIF_CsPin(Handle, 1); + } while (0); + return retVal; +} -bool SPIF_WriteFn(SPIF_HandleTypeDef *Handle, uint32_t PageNumber, uint8_t *Data, uint32_t Size, uint32_t Offset) -{ - bool retVal = false; - uint32_t address = 0, maximum = SPIF_PAGE_SIZE - Offset; - uint8_t tx[5]; - do - { +bool SPIF_WriteFn(SPIF_HandleTypeDef *Handle, uint32_t PageNumber, + uint8_t *Data, uint32_t Size, uint32_t Offset) { + bool retVal = false; + uint32_t address = 0, maximum = SPIF_PAGE_SIZE - Offset; +// uint8_t tx[5] = { 0 }; + do { #if SPIF_DEBUG != SPIF_DEBUG_DISABLE uint32_t dbgTime = HAL_GetTick(); #endif - dprintf("SPIF_WritePage() START PAGE %ld\r\n", PageNumber); - if (PageNumber >= Handle->PageCnt) - { - dprintf("SPIF_WritePage() ERROR PageNumber\r\n"); - break; - } - if (Offset >= SPIF_PAGE_SIZE) - { - dprintf("SPIF_WritePage() ERROR Offset\r\n"); - break; - } - if (Size > maximum) - { - Size = maximum; - } - address = SPIF_PageToAddress(PageNumber) + Offset; + dprintf("SPIF_WritePage() START PAGE %ld\r\n", PageNumber); + if (PageNumber >= Handle->PageCnt) { + dprintf("SPIF_WritePage() ERROR PageNumber\r\n"); + break; + } + if (Offset >= SPIF_PAGE_SIZE) { + dprintf("SPIF_WritePage() ERROR Offset\r\n"); + break; + } + if (Size > maximum) { + Size = maximum; + } + address = SPIF_PageToAddress(PageNumber) + Offset; #if SPIF_DEBUG == SPIF_DEBUG_FULL dprintf("SPIF WRITING {\r\n0x%02X", Data[0]); for (int i = 1; i < Size; i++) @@ -303,134 +299,103 @@ bool SPIF_WriteFn(SPIF_HandleTypeDef *Handle, uint32_t PageNumber, uint8_t *Data } dprintf("\r\n}\r\n"); #endif - if (SPIF_WriteEnable(Handle) == false) - { - break; - } - SPIF_CsPin(Handle, 0); - if (Handle->BlockCnt >= 512) - { - tx[0] = SPIF_CMD_PAGEPROG4ADD; - tx[1] = (address & 0xFF000000) >> 24; - tx[2] = (address & 0x00FF0000) >> 16; - tx[3] = (address & 0x0000FF00) >> 8; - tx[4] = (address & 0x000000FF); - if (SPIF_Transmit(Handle, tx, 5, 100) == false) - { - SPIF_CsPin(Handle, 1); - break; - } - } - else - { - tx[0] = SPIF_CMD_PAGEPROG3ADD; - tx[1] = (address & 0x00FF0000) >> 16; - tx[2] = (address & 0x0000FF00) >> 8; - tx[3] = (address & 0x000000FF); - if (SPIF_Transmit(Handle, tx, 4, 100) == false) - { - SPIF_CsPin(Handle, 1); - break; - } - } - if (SPIF_Transmit(Handle, Data, Size, 1000) == false) - { - SPIF_CsPin(Handle, 1); - break; - } - SPIF_CsPin(Handle, 1); - if (SPIF_WaitForWriting(Handle, 100)) - { - dprintf("SPIF_WritePage() %d BYTES WITERN DONE AFTER %ld ms\r\n", (uint16_t)Size, HAL_GetTick() - dbgTime); - retVal = true; - } - - } while (0); - - SPIF_WriteDisable(Handle); - return retVal; + if (SPIF_WriteEnable(Handle) == false) { + break; + } + SPIF_CsPin(Handle, 0); + if (Handle->BlockCnt >= 512) { + SPIF_SetInstructionPhase(Handle, true, 1, SPIF_CMD_PAGEPROG4ADD); + SPIF_SetAddressPhase(Handle, true, 4, address); + SPIF_SetDummyCycles(Handle, 0); + SPIF_SetDataPhase(Handle, true); + + if (SPIF_Transmit(Handle, Data, Size, 1000) == false) { + SPIF_CsPin(Handle, 1); + break; + } + + } else { + SPIF_SetInstructionPhase(Handle, true, 1, SPIF_CMD_PAGEPROG3ADD); + SPIF_SetAddressPhase(Handle, true, 3, address); + SPIF_SetDummyCycles(Handle, 0); + SPIF_SetDataPhase(Handle, true); + if (SPIF_Transmit(Handle, Data, Size, 1000) == false) { + SPIF_CsPin(Handle, 1); + break; + } + + } + + SPIF_CsPin(Handle, 1); + if (SPIF_WaitForWriting(Handle, 100)) { + dprintf("SPIF_WritePage() %d BYTES WITERN DONE AFTER %ld ms\r\n", (uint16_t)Size, HAL_GetTick() - dbgTime); + retVal = true; + } + + } while (0); + + SPIF_WriteDisable(Handle); + return retVal; } - -bool SPIF_ReadFn(SPIF_HandleTypeDef *Handle, uint32_t Address, uint8_t *Data, uint32_t Size) -{ - bool retVal = false; - uint8_t tx[5]; - do - { +bool SPIF_ReadFn(SPIF_HandleTypeDef *Handle, uint32_t Address, uint8_t *Data, + uint32_t Size) { + bool retVal = false; +// uint8_t tx[5]; + do { #if SPIF_DEBUG != SPIF_DEBUG_DISABLE uint32_t dbgTime = HAL_GetTick(); #endif - dprintf("SPIF_ReadAddress() START ADDRESS %ld\r\n", Address); - SPIF_CsPin(Handle, 0); - if (Handle->BlockCnt >= 512) - { - tx[0] = SPIF_CMD_READDATA4ADD; - tx[1] = (Address & 0xFF000000) >> 24; - tx[2] = (Address & 0x00FF0000) >> 16; - tx[3] = (Address & 0x0000FF00) >> 8; - tx[4] = (Address & 0x000000FF); - if (SPIF_Transmit(Handle, tx, 5, 100) == false) - { - SPIF_CsPin(Handle, 1); - break; - } - } - else - { - tx[0] = SPIF_CMD_READDATA3ADD; - tx[1] = (Address & 0x00FF0000) >> 16; - tx[2] = (Address & 0x0000FF00) >> 8; - tx[3] = (Address & 0x000000FF); - if (SPIF_Transmit(Handle, tx, 4, 100) == false) - { - SPIF_CsPin(Handle, 1); - break; - } - } - uint16_t max_uint16_size = 0xFFFF - 2; - if(Size > max_uint16_size) - { - uint32_t delta = Size; - uint32_t Data_offset = 0; - while(delta > 0) - { - if(delta <= max_uint16_size) - { - if (SPIF_Receive(Handle, (Data+Data_offset), delta, 2000) == false) - { - SPIF_CsPin(Handle, 1); - break; - } - delta = 0; - } - else - { - if (SPIF_Receive(Handle, (Data+Data_offset), max_uint16_size, 2000) == false) - { - SPIF_CsPin(Handle, 1); - break; - } - delta = abs(delta - max_uint16_size); - Data_offset += max_uint16_size; - } - } - if(delta > 0) - { - //break the main do-while loop, so as to return false - break; - } - } - else - { - if(SPIF_Receive(Handle, Data, Size, 2000) == false) - { - SPIF_CsPin(Handle, 1); - break; - } - } - SPIF_CsPin(Handle, 1); - dprintf("SPIF_ReadAddress() %d BYTES READ DONE AFTER %ld ms\r\n", (uint16_t)Size, HAL_GetTick() - dbgTime); + dprintf("SPIF_ReadAddress() START ADDRESS %ld\r\n", Address); + SPIF_CsPin(Handle, 0); + if (Handle->BlockCnt >= 512) { + SPIF_SetInstructionPhase(Handle, true, 1, SPIF_CMD_READDATA4ADD); + SPIF_SetAddressPhase(Handle, true, 4, Address); + SPIF_SetDummyCycles(Handle, 0); + SPIF_SetDataPhase(Handle, false); + + } else { + + SPIF_SetInstructionPhase(Handle, true, 1,SPIF_CMD_READDATA3ADD ); + SPIF_SetAddressPhase(Handle, true, 3, Address); + SPIF_SetDummyCycles(Handle, 0); + SPIF_SetDataPhase(Handle, false); + + } + uint16_t max_uint16_size = 0xFFFF - 2; + if (Size > max_uint16_size) { + uint32_t delta = Size; + uint32_t Data_offset = 0; + while (delta > 0) { + if (delta <= max_uint16_size) { + if (SPIF_Receive(Handle, (Data + Data_offset), delta, + 2000) == false) { + SPIF_CsPin(Handle, 1); + break; + } + delta = 0; + } else { + if (SPIF_Receive(Handle, (Data + Data_offset), + max_uint16_size, 2000) == false) { + SPIF_CsPin(Handle, 1); + break; + } + delta = abs(delta - max_uint16_size); + Data_offset += max_uint16_size; + } + } + if (delta > 0) { + //break the main do-while loop, so as to return false + break; + } + } else { + if (SPIF_Receive(Handle, Data, Size, 2000) == false) { + SPIF_CsPin(Handle, 1); + break; + } + } + SPIF_CsPin(Handle, 1); + dprintf("SPIF_ReadAddress() %d BYTES READ DONE AFTER %ld ms\r\n", (uint16_t)Size, HAL_GetTick() - dbgTime); #if SPIF_DEBUG == SPIF_DEBUG_FULL dprintf("{\r\n0x%02X", Data[0]); for (int i = 1; i < Size; i++) @@ -443,235 +408,303 @@ bool SPIF_ReadFn(SPIF_HandleTypeDef *Handle, uint32_t Address, uint8_t *Data, ui } dprintf("\r\n}\r\n"); #endif - retVal = true; + retVal = true; - } while (0); + } while (0); - return retVal; + return retVal; } - /** - * @brief Full Erase chip. - * @note Send the Full-Erase-chip command and wait for completion - * - * @param *Handle: Pointer to SPIF_HandleTypeDef structure - * - * @retval bool: true or false - */ -bool SPIF_EraseChip(SPIF_HandleTypeDef *Handle) -{ - SPIF_Lock(Handle); - bool retVal = false; - uint8_t tx[1] = {SPIF_CMD_CHIPERASE1}; - do - { + * @brief Full Erase chip. + * @note Send the Full-Erase-chip command and wait for completion + * + * @param *Handle: Pointer to SPIF_HandleTypeDef structure + * + * @retval bool: true or false + */ +bool SPIF_EraseChip(SPIF_HandleTypeDef *Handle) { + SPIF_Lock(Handle); + bool retVal = false; + uint8_t tx[1] = { 0 }; + do { #if SPIF_DEBUG != SPIF_DEBUG_DISABLE uint32_t dbgTime = HAL_GetTick(); #endif - dprintf("SPIF_EraseChip() START\r\n"); - if (SPIF_WriteEnable(Handle) == false) - { - break; - } - SPIF_CsPin(Handle, 0); - if (SPIF_Transmit(Handle, tx, 1, 100) == false) - { - SPIF_CsPin(Handle, 1); - break; - } - SPIF_CsPin(Handle, 1); - if (SPIF_WaitForWriting(Handle, Handle->BlockCnt * 1000)) - { - dprintf("SPIF_EraseChip() DONE AFTER %ld ms\r\n", HAL_GetTick() - dbgTime); - retVal = true; - } - - } while (0); - - SPIF_WriteDisable(Handle); - SPIF_UnLock(Handle); - return retVal; + dprintf("SPIF_EraseChip() START\r\n"); + if (SPIF_WriteEnable(Handle) == false) { + break; + } + SPIF_SetInstructionPhase(Handle, true, 1, SPIF_CMD_CHIPERASE1); + SPIF_SetAddressPhase(Handle, false, 0, 0); + SPIF_SetDummyCycles(Handle, 0); + SPIF_SetDataPhase(Handle, false); + + SPIF_CsPin(Handle, 0); + if (SPIF_Transmit(Handle, tx, 1, 100) == false) { + SPIF_CsPin(Handle, 1); + break; + } + SPIF_CsPin(Handle, 1); + if (SPIF_WaitForWriting(Handle, Handle->BlockCnt * 1000)) { + dprintf("SPIF_EraseChip() DONE AFTER %ld ms\r\n", HAL_GetTick() - dbgTime); + retVal = true; + } + + } while (0); + + SPIF_WriteDisable(Handle); + SPIF_UnLock(Handle); + return retVal; } - /** - * @brief Erase Sector. - * @note Send the Erase-Sector command and wait for completion - * - * @param *Handle: Pointer to SPIF_HandleTypeDef structure - * @param Sector: Selected Sector - * - * @retval bool: true or false - */ -bool SPIF_EraseSector(SPIF_HandleTypeDef *Handle, uint32_t Sector) -{ - SPIF_Lock(Handle); - bool retVal = false; - uint32_t address = Sector * SPIF_SECTOR_SIZE; - uint8_t tx[5]; - do - { + * @brief Erase Sector. + * @note Send the Erase-Sector command and wait for completion + * + * @param *Handle: Pointer to SPIF_HandleTypeDef structure + * @param Sector: Selected Sector + * + * @retval bool: true or false + */ +bool SPIF_EraseSector(SPIF_HandleTypeDef *Handle, uint32_t Sector) { + SPIF_Lock(Handle); + bool retVal = false; + uint32_t address = Sector * SPIF_SECTOR_SIZE; + uint8_t tx[5]; + do { #if SPIF_DEBUG != SPIF_DEBUG_DISABLE uint32_t dbgTime = HAL_GetTick(); #endif - dprintf("SPIF_EraseSector() START SECTOR %ld\r\n", Sector); - if (Sector >= Handle->SectorCnt) - { - dprintf("SPIF_EraseSector() ERROR Sector NUMBER\r\n"); - break; - } - if (SPIF_WriteEnable(Handle) == false) - { - break; - } - SPIF_CsPin(Handle, 0); - if (Handle->BlockCnt >= 512) - { - tx[0] = SPIF_CMD_SECTORERASE4ADD; - tx[1] = (address & 0xFF000000) >> 24; - tx[2] = (address & 0x00FF0000) >> 16; - tx[3] = (address & 0x0000FF00) >> 8; - tx[4] = (address & 0x000000FF); - if (SPIF_Transmit(Handle, tx, 5, 100) == false) - { - SPIF_CsPin(Handle, 1); - break; - } - } - else - { - tx[0] = SPIF_CMD_SECTORERASE3ADD; - tx[1] = (address & 0x00FF0000) >> 16; - tx[2] = (address & 0x0000FF00) >> 8; - tx[3] = (address & 0x000000FF); - if (SPIF_Transmit(Handle, tx, 4, 100) == false) - { - SPIF_CsPin(Handle, 1); - break; - } - } - SPIF_CsPin(Handle, 1); - if (SPIF_WaitForWriting(Handle, 1000)) - { - dprintf("SPIF_EraseSector() DONE AFTER %ld ms\r\n", HAL_GetTick() - dbgTime); - retVal = true; - } - - } while (0); - - SPIF_WriteDisable(Handle); - SPIF_UnLock(Handle); - return retVal; + dprintf("SPIF_EraseSector() START SECTOR %ld\r\n", Sector); + if (Sector >= Handle->SectorCnt) { + dprintf("SPIF_EraseSector() ERROR Sector NUMBER\r\n"); + break; + } + if (SPIF_WriteEnable(Handle) == false) { + break; + } + + if (Handle->BlockCnt >= 512) { + SPIF_SetInstructionPhase(Handle, true, 1,SPIF_CMD_SECTORERASE4ADD ); + SPIF_SetAddressPhase(Handle, true, 4, address); + SPIF_SetDummyCycles(Handle, 0); + SPIF_SetDataPhase(Handle, false); + SPIF_CsPin(Handle, 0); + + if (SPIF_Transmit(Handle, tx, 5, 100) == false) { + SPIF_CsPin(Handle, 1); + break; + } + } else { + SPIF_SetInstructionPhase(Handle, true, 1,SPIF_CMD_SECTORERASE3ADD ); + SPIF_SetAddressPhase(Handle, true, 3, address); + SPIF_SetDummyCycles(Handle, 0); + SPIF_SetDataPhase(Handle, false); + SPIF_CsPin(Handle, 0); + + if (SPIF_Transmit(Handle, tx, 4, 100) == false) { + SPIF_CsPin(Handle, 1); + break; + } + } + SPIF_CsPin(Handle, 1); + if (SPIF_WaitForWriting(Handle, 1000)) { + dprintf("SPIF_EraseSector() DONE AFTER %ld ms\r\n", HAL_GetTick() - dbgTime); + retVal = true; + } + + } while (0); + + SPIF_WriteDisable(Handle); + SPIF_UnLock(Handle); + return retVal; } - /* - * @brief Write QPI Enable command - * @note Send the QPI-Enable command - * - * @param *Handle: Pointer to SPIF_HandleTypeDef structure - * @retval bool: true or false - */ -bool SPIF_QPI_Enable(SPIF_HandleTypeDef *Handle) -{ - bool retVal = true; - uint8_t tx[1] = {SPIF_CMD_ENTERQPI}; - SPIF_CsPin(Handle, 0); - if (SPIF_Transmit(Handle, tx, 1, 100) == false) - { - retVal = false; - dprintf("SPIF_IS25_QPI_Enable() Error\r\n"); - } - SPIF_CsPin(Handle, 1); - return retVal; - } - - + * @brief Write QPI Enable command + * @note Send the QPI-Enable command + * + * @param *Handle: Pointer to SPIF_HandleTypeDef structure + * @retval bool: true or false + */ +bool SPIF_QPI_Enable(SPIF_HandleTypeDef *Handle) { + bool retVal = true; + uint8_t tx[1] = { SPIF_CMD_ENTERQPI }; + + SPIF_SetInstructionPhase(Handle, true, 1,SPIF_CMD_ENTERQPI ); + SPIF_SetAddressPhase(Handle, false, 0, 0); + SPIF_SetDummyCycles(Handle, 0); + SPIF_SetDataPhase(Handle, false); + + SPIF_CsPin(Handle, 0); + + if (SPIF_Transmit(Handle, tx, 1, 100) == false) { + retVal = false; + dprintf("SPIF_IS25_QPI_Enable() Error\r\n"); + } + SPIF_CsPin(Handle, 1); + return retVal; +} /** - * @brief Erase 32K Block. - * @note Send the Erase-Block command and wait for completion - * - * @param *Handle: Pointer to SPIF_HandleTypeDef structure - * @param Sector: Selected Block - * - * @retval bool: true or false - */ -bool SPIF_EraseBlock(SPIF_HandleTypeDef *Handle, uint32_t Block) -{ - SPIF_Lock(Handle); - bool retVal = false; - uint32_t address = Block * SPIF_BLOCK_SIZE; - uint8_t tx[5]; - do - { + * @brief Erase 32K Block. + * @note Send the Erase-Block command and wait for completion + * + * @param *Handle: Pointer to SPIF_HandleTypeDef structure + * @param Sector: Selected Block + * + * @retval bool: true or false + */ +bool SPIF_EraseBlock(SPIF_HandleTypeDef *Handle, uint32_t Block) { + SPIF_Lock(Handle); + bool retVal = false; + uint32_t address = Block * SPIF_BLOCK_SIZE; + uint8_t tx[5]; + do { #if SPIF_DEBUG != SPIF_DEBUG_DISABLE uint32_t dbgTime = HAL_GetTick(); #endif - dprintf("SPIF_EraseBlock() START PAGE %ld\r\n", Block); - if (Block >= Handle->BlockCnt) - { - dprintf("SPIF_EraseBlock() ERROR Block NUMBER\r\n"); - break; - } - if (SPIF_WriteEnable(Handle) == false) - { - break; - } - SPIF_CsPin(Handle, 0); - if (Handle->BlockCnt >= 512) - { - tx[0] = SPIF_CMD_BLOCKERASE32K4ADD; - tx[1] = (address & 0xFF000000) >> 24; - tx[2] = (address & 0x00FF0000) >> 16; - tx[3] = (address & 0x0000FF00) >> 8; - tx[4] = (address & 0x000000FF); - if (SPIF_Transmit(Handle, tx, 5, 100) == false) - { - SPIF_CsPin(Handle, 1); - break; - } - } - else - { - tx[0] = SPIF_CMD_BLOCKERASE32K3ADD; - tx[1] = (address & 0x00FF0000) >> 16; - tx[2] = (address & 0x0000FF00) >> 8; - tx[3] = (address & 0x000000FF); - if (SPIF_Transmit(Handle, tx, 4, 100) == false) - { - SPIF_CsPin(Handle, 1); - break; - } - } - SPIF_CsPin(Handle, 1); - if (SPIF_WaitForWriting(Handle, 3000)) - { - dprintf("SPIF_EraseBlock() DONE AFTER %ld ms\r\n", HAL_GetTick() - dbgTime); - retVal = true; - } - - } while (0); - - SPIF_WriteDisable(Handle); - SPIF_UnLock(Handle); - return retVal; + dprintf("SPIF_EraseBlock() START PAGE %ld\r\n", Block); + if (Block >= Handle->BlockCnt) { + dprintf("SPIF_EraseBlock() ERROR Block NUMBER\r\n"); + break; + } + if (SPIF_WriteEnable(Handle) == false) { + break; + } + SPIF_CsPin(Handle, 0); + if (Handle->BlockCnt >= 512) { + SPIF_SetInstructionPhase(Handle, true, 1,SPIF_CMD_BLOCKERASE32K4ADD ); + SPIF_SetAddressPhase(Handle, true, 4, address); + SPIF_SetDummyCycles(Handle, 0); + SPIF_SetDataPhase(Handle, false); + SPIF_CsPin(Handle, 0); + + if (SPIF_Transmit(Handle, tx, 5, 100) == false) { + SPIF_CsPin(Handle, 1); + break; + } + } else { + SPIF_SetInstructionPhase(Handle, true, 1,SPIF_CMD_BLOCKERASE32K3ADD ); + SPIF_SetAddressPhase(Handle, true, 3, address); + SPIF_SetDummyCycles(Handle, 0); + SPIF_SetDataPhase(Handle, false); + + if (SPIF_Transmit(Handle, tx, 4, 100) == false) { + SPIF_CsPin(Handle, 1); + break; + } + } + SPIF_CsPin(Handle, 1); + if (SPIF_WaitForWriting(Handle, 3000)) { + dprintf("SPIF_EraseBlock() DONE AFTER %ld ms\r\n", HAL_GetTick() - dbgTime); + retVal = true; + } + + } while (0); + + SPIF_WriteDisable(Handle); + SPIF_UnLock(Handle); + return retVal; } /** - * @brief Erase 64K Block. - * @note Send the Erase-Block command and wait for completion - * - * @param *Handle: Pointer to SPIF_HandleTypeDef structure - * @param Sector: Selected Block - * - * @retval bool: true or false - */ -bool SPIF_EraseBlock_64K(SPIF_HandleTypeDef *Handle, uint32_t Block){ + * @brief Erase 64K Block. + * @note Send the Erase-Block command and wait for completion + * + * @param *Handle: Pointer to SPIF_HandleTypeDef structure + * @param Sector: Selected Block + * + * @retval bool: true or false + */ +bool SPIF_EraseBlock_64K(SPIF_HandleTypeDef *Handle, uint32_t Block) { //to be implemented __NOP(); return false; } +bool SPIF_FindChip(SPIF_HandleTypeDef *Handle) { +// uint8_t tx[4] = { SPIF_CMD_JEDECID, 0xFF, 0xFF, 0xFF }; + uint8_t rx[4]; + bool retVal = false; + do { + dprintf("SPIF_FindChip()\r\n"); + SPIF_SetInstructionPhase(Handle, true, 1,SPIF_CMD_JEDECID ); + SPIF_SetAddressPhase(Handle, false, 0, 0); + SPIF_SetDummyCycles(Handle, 3); + SPIF_SetDataPhase(Handle, false); + + SPIF_CsPin(Handle, 0); + if (SPIF_Receive(Handle, rx, 4, 100) == false) { + SPIF_CsPin(Handle, 1); + break; + } + SPIF_CsPin(Handle, 1); + dprintf("CHIP ID: 0x%02X%02X%02X\r\n", rx[1], rx[2], rx[3]); + Handle->Manufactor = rx[1]; + Handle->MemType = rx[2]; + Handle->Size = rx[3]; + + dprintf(" - SIZE: "); + switch (Handle->Size) { + case SPIF_SIZE_1MBIT: + Handle->BlockCnt = 2; + dprintf("1 MBIT\r\n"); + break; + case SPIF_SIZE_2MBIT: + Handle->BlockCnt = 4; + dprintf("2 MBIT\r\n"); + break; + case SPIF_SIZE_4MBIT: + Handle->BlockCnt = 8; + dprintf("4 MBIT\r\n"); + break; + case SPIF_SIZE_8MBIT: + Handle->BlockCnt = 16; + dprintf("8 MBIT\r\n"); + break; + case SPIF_SIZE_16MBIT: + Handle->BlockCnt = 32; + dprintf("16 MBIT\r\n"); + break; + case SPIF_SIZE_32MBIT: + Handle->BlockCnt = 64; + dprintf("32 MBIT\r\n"); + break; + case SPIF_SIZE_64MBIT: + Handle->BlockCnt = 128; + dprintf("64 MBIT\r\n"); + break; + case SPIF_SIZE_128MBIT: + Handle->BlockCnt = 256; + dprintf("128 MBIT\r\n"); + break; + case SPIF_SIZE_256MBIT: + Handle->BlockCnt = 512; + dprintf("256 MBIT\r\n"); + break; + case SPIF_SIZE_512MBIT: + Handle->BlockCnt = 1024; + dprintf("512 MBIT\r\n"); + break; + default: + Handle->Size = SPIF_SIZE_ERROR; + dprintf("ERROR\r\n"); + break; + } + + Handle->SectorCnt = Handle->BlockCnt * 16; + Handle->PageCnt = (Handle->SectorCnt * SPIF_SECTOR_SIZE) + / SPIF_PAGE_SIZE; + dprintf("SPIF BLOCK CNT: %ld\r\n", Handle->BlockCnt); dprintf("SPIF SECTOR CNT: %ld\r\n", Handle->SectorCnt); dprintf("SPIF PAGE CNT: %ld\r\n", Handle->PageCnt); dprintf("SPIF STATUS1: 0x%02X\r\n", SPIF_ReadReg1(Handle)); +// dprintf("SPIF STATUS2: 0x%02X\r\n", SPIF_ReadReg2(Handle)); +// dprintf("SPIF STATUS3: 0x%02X\r\n", SPIF_ReadReg3(Handle)); + retVal = true; + + } while (0); + + return retVal; +} + #endif diff --git a/spif_compat_is25xx.h b/spif_compat_is25xx.h index fe3a166..936e9ed 100644 --- a/spif_compat_is25xx.h +++ b/spif_compat_is25xx.h @@ -18,5 +18,6 @@ bool SPIF_EraseSector(SPIF_HandleTypeDef *Handle, uint32_t Sector); bool SPIF_QPI_Enable(SPIF_HandleTypeDef *Handle); bool SPIF_EraseBlock(SPIF_HandleTypeDef *Handle, uint32_t Block); bool SPIF_EraseBlock_64K(SPIF_HandleTypeDef *Handle, uint32_t Block); +bool SPIF_FindChip(SPIF_HandleTypeDef *Handle); #endif diff --git a/spif_compat_w25xx.c b/spif_compat_w25xx.c index e848684..70840e2 100644 --- a/spif_compat_w25xx.c +++ b/spif_compat_w25xx.c @@ -73,6 +73,11 @@ bool SPIF_WriteEnable(SPIF_HandleTypeDef *Handle) { bool retVal = true; uint8_t tx[1] = {SPIF_CMD_WRITEENABLE}; + SPIF_SetInstructionPhase(Handle, true, 1, SPIF_CMD_WRITEENABLE); + SPIF_SetAddressPhase(Handle, false, 0, 0); + SPIF_SetDummyCycles(Handle, 0); + SPIF_SetDataPhase(Handle, false); + SPIF_CsPin(Handle, 0); if (SPIF_Transmit(Handle, tx, 1, 100) == false) { @@ -88,6 +93,10 @@ bool SPIF_WriteDisable(SPIF_HandleTypeDef *Handle) { bool retVal = true; uint8_t tx[1] = {SPIF_CMD_WRITEDISABLE}; + SPIF_SetInstructionPhase(Handle, true, 1, SPIF_CMD_WRITEDISABLE); + SPIF_SetAddressPhase(Handle, false, 0, 0); + SPIF_SetDummyCycles(Handle, 0); + SPIF_SetDataPhase(Handle, false); SPIF_CsPin(Handle, 0); if (SPIF_Transmit(Handle, tx, 1, 100) == false) { @@ -128,10 +137,14 @@ bool SPIF_WaitForWriting(SPIF_HandleTypeDef *Handle, uint32_t Timeout) uint8_t SPIF_ReadReg1(SPIF_HandleTypeDef *Handle) { uint8_t retVal = 0; - uint8_t tx[2] = {SPIF_CMD_READSTATUS1, SPIF_DUMMY_BYTE}; +// uint8_t tx[2] = {SPIF_CMD_READSTATUS1, SPIF_DUMMY_BYTE}; uint8_t rx[2]; + SPIF_SetInstructionPhase(Handle, true, 1, SPIF_CMD_READSTATUS1); + SPIF_SetAddressPhase(Handle, false, 0, 0); + SPIF_SetDummyCycles(Handle, 1); + SPIF_SetDataPhase(Handle, false); SPIF_CsPin(Handle, 0); - if (SPIF_TransmitReceive(Handle, tx, rx, 2, 100) == true) + if (SPIF_Receive(Handle, rx, 2, 100) == true) { retVal = rx[1]; } @@ -145,10 +158,14 @@ uint8_t SPIF_ReadReg2(SPIF_HandleTypeDef *Handle) { uint8_t retVal = 0; - uint8_t tx[2] = {SPIF_CMD_READSTATUS2, SPIF_DUMMY_BYTE}; +// uint8_t tx[2] = {SPIF_CMD_READSTATUS2, SPIF_DUMMY_BYTE}; uint8_t rx[2]; + SPIF_SetInstructionPhase(Handle, true, 1, SPIF_CMD_READSTATUS2); + SPIF_SetAddressPhase(Handle, false, 0, 0); + SPIF_SetDummyCycles(Handle, 1); + SPIF_SetDataPhase(Handle, false); SPIF_CsPin(Handle, 0); - if (SPIF_TransmitReceive(Handle, tx, rx, 2, 100) == true) + if (SPIF_Receive(Handle, rx, 2, 100) == true) { retVal = rx[1]; } @@ -161,10 +178,14 @@ uint8_t SPIF_ReadReg3(SPIF_HandleTypeDef *Handle) { uint8_t retVal = 0; - uint8_t tx[2] = {SPIF_CMD_READSTATUS3, SPIF_DUMMY_BYTE}; +// uint8_t tx[2] = {SPIF_CMD_READSTATUS3, SPIF_DUMMY_BYTE}; uint8_t rx[2]; + SPIF_SetInstructionPhase(Handle, true, 1, SPIF_CMD_READSTATUS3); + SPIF_SetAddressPhase(Handle, false, 0, 0); + SPIF_SetDummyCycles(Handle, 1); + SPIF_SetDataPhase(Handle, false); SPIF_CsPin(Handle, 0); - if (SPIF_TransmitReceive(Handle, tx, rx, 2, 100) == true) + if (SPIF_Receive(Handle, rx, 2, 100) == true) { retVal = rx[1]; } @@ -177,13 +198,17 @@ uint8_t SPIF_ReadReg3(SPIF_HandleTypeDef *Handle) bool SPIF_WriteReg1(SPIF_HandleTypeDef *Handle, uint8_t Data) { bool retVal = true; - uint8_t tx[2] = {SPIF_CMD_WRITESTATUS1, Data}; + uint8_t tx[1] = { Data}; uint8_t cmd = SPIF_CMD_WRITESTATUSEN; do { - + SPIF_SetInstructionPhase(Handle, true, 1, SPIF_CMD_WRITESTATUSEN); + SPIF_SetAddressPhase(Handle, false, 0, 0); + SPIF_SetDummyCycles(Handle, 0); + SPIF_SetDataPhase(Handle, false); + SPIF_CsPin(Handle, 0); if (SPIF_Transmit(Handle, &cmd, 1, 100) == false) { @@ -193,8 +218,13 @@ bool SPIF_WriteReg1(SPIF_HandleTypeDef *Handle, uint8_t Data) } SPIF_CsPin(Handle, 1); + SPIF_SetInstructionPhase(Handle, true, 1, SPIF_CMD_WRITESTATUS1); + SPIF_SetAddressPhase(Handle, false, 0, 0); + SPIF_SetDummyCycles(Handle, 0); + SPIF_SetDataPhase(Handle, true); + SPIF_CsPin(Handle, 0); - if (SPIF_Transmit(Handle, tx, 2, 100) == false) + if (SPIF_Transmit(Handle, tx, 1, 100) == false) { retVal = false; SPIF_CsPin(Handle, 1); @@ -211,27 +241,38 @@ bool SPIF_WriteReg2(SPIF_HandleTypeDef *Handle, uint8_t Data) { bool retVal = true; - uint8_t tx[2] = {SPIF_CMD_WRITESTATUS2, Data}; + uint8_t tx[1] = { Data}; uint8_t cmd = SPIF_CMD_WRITESTATUSEN; do - { - SPIF_CsPin(Handle, 0); - if (SPIF_Transmit(Handle, &cmd, 1, 100) == false) { - retVal = false; + SPIF_SetInstructionPhase(Handle, true, 1, SPIF_CMD_WRITESTATUSEN); + SPIF_SetAddressPhase(Handle, false, 0, 0); + SPIF_SetDummyCycles(Handle, 0); + SPIF_SetDataPhase(Handle, false); + + SPIF_CsPin(Handle, 0); + if (SPIF_Transmit(Handle, &cmd, 1, 100) == false) + { + retVal = false; + SPIF_CsPin(Handle, 1); + break; + } SPIF_CsPin(Handle, 1); - break; - } - SPIF_CsPin(Handle, 1); - SPIF_CsPin(Handle, 0); - if (SPIF_Transmit(Handle, tx, 2, 100) == false) - { - retVal = false; + + SPIF_SetInstructionPhase(Handle, true, 1, SPIF_CMD_WRITESTATUS2); + SPIF_SetAddressPhase(Handle, false, 0, 0); + SPIF_SetDummyCycles(Handle, 0); + SPIF_SetDataPhase(Handle, true); + + SPIF_CsPin(Handle, 0); + if (SPIF_Transmit(Handle, tx, 1, 100) == false) + { + retVal = false; + SPIF_CsPin(Handle, 1); + break; + } SPIF_CsPin(Handle, 1); - break; - } - SPIF_CsPin(Handle, 1); - } while (0); + } while (0); return retVal; } @@ -241,27 +282,38 @@ bool SPIF_WriteReg3(SPIF_HandleTypeDef *Handle, uint8_t Data) { bool retVal = true; - uint8_t tx[2] = {SPIF_CMD_WRITESTATUS3, Data}; + uint8_t tx[1] = { Data}; uint8_t cmd = SPIF_CMD_WRITESTATUSEN; do - { - SPIF_CsPin(Handle, 0); - if (SPIF_Transmit(Handle, &cmd, 1, 100) == false) { - retVal = false; + SPIF_SetInstructionPhase(Handle, true, 1, SPIF_CMD_WRITESTATUSEN); + SPIF_SetAddressPhase(Handle, false, 0, 0); + SPIF_SetDummyCycles(Handle, 0); + SPIF_SetDataPhase(Handle, false); + + SPIF_CsPin(Handle, 0); + if (SPIF_Transmit(Handle, &cmd, 1, 100) == false) + { + retVal = false; + SPIF_CsPin(Handle, 1); + break; + } SPIF_CsPin(Handle, 1); - break; - } - SPIF_CsPin(Handle, 1); - SPIF_CsPin(Handle, 0); - if (SPIF_Transmit(Handle, tx, 2, 100) == false) - { - retVal = false; + + SPIF_SetInstructionPhase(Handle, true, 1, SPIF_CMD_WRITESTATUS3); + SPIF_SetAddressPhase(Handle, false, 0, 0); + SPIF_SetDummyCycles(Handle, 0); + SPIF_SetDataPhase(Handle, true); + + SPIF_CsPin(Handle, 0); + if (SPIF_Transmit(Handle, tx, 1, 100) == false) + { + retVal = false; + SPIF_CsPin(Handle, 1); + break; + } SPIF_CsPin(Handle, 1); - break; - } - SPIF_CsPin(Handle, 1); - } while (0); + } while (0); return retVal; @@ -272,7 +324,7 @@ bool SPIF_WriteFn(SPIF_HandleTypeDef *Handle, uint32_t PageNumber, uint8_t *Data { bool retVal = false; uint32_t address = 0, maximum = SPIF_PAGE_SIZE - Offset; - uint8_t tx[5]; +// uint8_t tx[5]; do { #if SPIF_DEBUG != SPIF_DEBUG_DISABLE @@ -313,28 +365,23 @@ bool SPIF_WriteFn(SPIF_HandleTypeDef *Handle, uint32_t PageNumber, uint8_t *Data SPIF_CsPin(Handle, 0); if (Handle->BlockCnt >= 512) { - tx[0] = SPIF_CMD_PAGEPROG4ADD; - tx[1] = (address & 0xFF000000) >> 24; - tx[2] = (address & 0x00FF0000) >> 16; - tx[3] = (address & 0x0000FF00) >> 8; - tx[4] = (address & 0x000000FF); - if (SPIF_Transmit(Handle, tx, 5, 100) == false) - { - SPIF_CsPin(Handle, 1); - break; - } + SPIF_SetInstructionPhase(Handle, true, 1, SPIF_CMD_PAGEPROG4ADD); + SPIF_SetAddressPhase(Handle, true, 4, address); + SPIF_SetDummyCycles(Handle, 0); + SPIF_SetDataPhase(Handle, true); + + + + } else { - tx[0] = SPIF_CMD_PAGEPROG3ADD; - tx[1] = (address & 0x00FF0000) >> 16; - tx[2] = (address & 0x0000FF00) >> 8; - tx[3] = (address & 0x000000FF); - if (SPIF_Transmit(Handle, tx, 4, 100) == false) - { - SPIF_CsPin(Handle, 1); - break; - } + SPIF_SetInstructionPhase(Handle, true, 1,SPIF_CMD_PAGEPROG3ADD ); + SPIF_SetAddressPhase(Handle, true, 3, address); + SPIF_SetDummyCycles(Handle, 0); + SPIF_SetDataPhase(Handle, true); + + } if (SPIF_Transmit(Handle, Data, Size, 1000) == false) { @@ -359,7 +406,7 @@ bool SPIF_WriteFn(SPIF_HandleTypeDef *Handle, uint32_t PageNumber, uint8_t *Data bool SPIF_ReadFn(SPIF_HandleTypeDef *Handle, uint32_t Address, uint8_t *Data, uint32_t Size) { bool retVal = false; - uint8_t tx[5]; +// uint8_t tx[5]; do { #if SPIF_DEBUG != SPIF_DEBUG_DISABLE @@ -369,28 +416,21 @@ bool SPIF_ReadFn(SPIF_HandleTypeDef *Handle, uint32_t Address, uint8_t *Data, ui SPIF_CsPin(Handle, 0); if (Handle->BlockCnt >= 512) { - tx[0] = SPIF_CMD_READDATA4ADD; - tx[1] = (Address & 0xFF000000) >> 24; - tx[2] = (Address & 0x00FF0000) >> 16; - tx[3] = (Address & 0x0000FF00) >> 8; - tx[4] = (Address & 0x000000FF); - if (SPIF_Transmit(Handle, tx, 5, 100) == false) - { - SPIF_CsPin(Handle, 1); - break; - } + SPIF_SetInstructionPhase(Handle, true, 1, SPIF_CMD_READDATA4ADD); + SPIF_SetAddressPhase(Handle, true, 4, Address); + SPIF_SetDummyCycles(Handle, 0); + SPIF_SetDataPhase(Handle, false); + + } else { - tx[0] = SPIF_CMD_READDATA3ADD; - tx[1] = (Address & 0x00FF0000) >> 16; - tx[2] = (Address & 0x0000FF00) >> 8; - tx[3] = (Address & 0x000000FF); - if (SPIF_Transmit(Handle, tx, 4, 100) == false) - { - SPIF_CsPin(Handle, 1); - break; - } + SPIF_SetInstructionPhase(Handle, true, 1, SPIF_CMD_READDATA3ADD); + SPIF_SetAddressPhase(Handle, true, 3, Address); + SPIF_SetDummyCycles(Handle, 0); + SPIF_SetDataPhase(Handle, false); + + } uint16_t max_uint16_size = 0xFFFF - 2; if(Size > max_uint16_size) @@ -479,6 +519,11 @@ bool SPIF_EraseChip(SPIF_HandleTypeDef *Handle) { break; } + SPIF_SetInstructionPhase(Handle, true, 1, SPIF_CMD_CHIPERASE1); + SPIF_SetAddressPhase(Handle, false, 0, 0); + SPIF_SetDummyCycles(Handle, 0); + SPIF_SetDataPhase(Handle, false); + SPIF_CsPin(Handle, 0); if (SPIF_Transmit(Handle, tx, 1, 100) == false) { @@ -533,11 +578,11 @@ bool SPIF_EraseSector(SPIF_HandleTypeDef *Handle, uint32_t Sector) SPIF_CsPin(Handle, 0); if (Handle->BlockCnt >= 512) { - tx[0] = SPIF_CMD_SECTORERASE4ADD; - tx[1] = (address & 0xFF000000) >> 24; - tx[2] = (address & 0x00FF0000) >> 16; - tx[3] = (address & 0x0000FF00) >> 8; - tx[4] = (address & 0x000000FF); + SPIF_SetInstructionPhase(Handle, true, 1, SPIF_CMD_SECTORERASE4ADD); + SPIF_SetAddressPhase(Handle, true, 4, address); + SPIF_SetDummyCycles(Handle, 0); + SPIF_SetDataPhase(Handle, false); + if (SPIF_Transmit(Handle, tx, 5, 100) == false) { SPIF_CsPin(Handle, 1); @@ -546,6 +591,10 @@ bool SPIF_EraseSector(SPIF_HandleTypeDef *Handle, uint32_t Sector) } else { + SPIF_SetInstructionPhase(Handle, true, 1, SPIF_CMD_SECTORERASE3ADD); + SPIF_SetAddressPhase(Handle, true, 3, address); + SPIF_SetDummyCycles(Handle, 0); + SPIF_SetDataPhase(Handle, false); tx[0] = SPIF_CMD_SECTORERASE3ADD; tx[1] = (address & 0x00FF0000) >> 16; tx[2] = (address & 0x0000FF00) >> 8; @@ -605,11 +654,12 @@ bool SPIF_EraseBlock(SPIF_HandleTypeDef *Handle, uint32_t Block) SPIF_CsPin(Handle, 0); if (Handle->BlockCnt >= 512) { - tx[0] = SPIF_CMD_BLOCKERASE4ADD; - tx[1] = (address & 0xFF000000) >> 24; - tx[2] = (address & 0x00FF0000) >> 16; - tx[3] = (address & 0x0000FF00) >> 8; - tx[4] = (address & 0x000000FF); + SPIF_SetInstructionPhase(Handle, true, 1, SPIF_CMD_BLOCKERASE4ADD); + SPIF_SetAddressPhase(Handle, true, 4, address); + SPIF_SetDummyCycles(Handle, 0); + SPIF_SetDataPhase(Handle, false); + + if (SPIF_Transmit(Handle, tx, 5, 100) == false) { SPIF_CsPin(Handle, 1); @@ -618,6 +668,11 @@ bool SPIF_EraseBlock(SPIF_HandleTypeDef *Handle, uint32_t Block) } else { + SPIF_SetInstructionPhase(Handle, true, 1, SPIF_CMD_BLOCKERASE3ADD); + SPIF_SetAddressPhase(Handle, true, 3, address); + SPIF_SetDummyCycles(Handle, 0); + SPIF_SetDataPhase(Handle, false); + tx[0] = SPIF_CMD_BLOCKERASE3ADD; tx[1] = (address & 0x00FF0000) >> 16; tx[2] = (address & 0x0000FF00) >> 8; @@ -647,14 +702,19 @@ bool SPIF_EraseBlock(SPIF_HandleTypeDef *Handle, uint32_t Block) bool SPIF_FindChip(SPIF_HandleTypeDef *Handle) { - uint8_t tx[4] = {SPIF_CMD_JEDECID, 0xFF, 0xFF, 0xFF}; +// uint8_t tx[4] = {SPIF_CMD_JEDECID, 0xFF, 0xFF, 0xFF}; uint8_t rx[4]; bool retVal = false; do { dprintf("SPIF_FindChip()\r\n"); + SPIF_SetInstructionPhase(Handle, true, 1, SPIF_CMD_JEDECID); + SPIF_SetAddressPhase(Handle, false, 0, 0); + SPIF_SetDummyCycles(Handle, 3); + SPIF_SetDataPhase(Handle, false); + SPIF_CsPin(Handle, 0); - if (SPIF_TransmitReceive(Handle, tx, rx, 4, 100) == false) + if (SPIF_Receive(Handle, rx, 4, 100) == false) { SPIF_CsPin(Handle, 1); break; diff --git a/spif_interface_octospi.c b/spif_interface_octospi.c index 9b40c3b..fc4a3c9 100644 --- a/spif_interface_octospi.c +++ b/spif_interface_octospi.c @@ -1,136 +1,143 @@ #include "spif_interface_octospi.h" +#include "stm32u5xx_hal_ospi.h" #include "spif.h" #if (SPIF_INTERFACE == SPIF_INTERFACE_OCTOSPI) -/** - * @brief Initialize the SPIF. - * @note Enable and configure the SPI and Set GPIO as output for CS pin on the CubeMX - * - * @param *Handle: Pointer to SPIF_HandleTypeDef structure - * @param *HOSpi: Pointer to a SPI_HandleTypeDef structure - * @param *Gpio: Pointer to a GPIO_TypeDef structure for CS - * @param Pin: Pin of CS - * - * @retval bool: true or false - */ -//bool SPIF_OCTOSPI_Init(SPIF_HandleTypeDef *Handle, OSPI_HandleTypeDef *HOspi, GPIO_TypeDef *Gpio, uint16_t Pin){ -// -// bool retVal = false; -// do -// { -// if ((Handle == NULL) || (HOspi == NULL) || (Gpio == NULL) || (Handle->Inited == 1)) -// { -// dprintf("SPIF_Init() Error, Wrong Parameter\r\n"); -// break; -// } -// memset(Handle, 0, sizeof(SPIF_HandleTypeDef)); -// Handle->interface = HOspi; -// Handle->Gpio = Gpio; -// Handle->Pin = Pin; -// SPIF_CsPin(Handle, 1); -// /* wait for stable VCC */ -// while (HAL_GetTick() < 20) -// { -// SPIF_Delay(1); -// } -// if (SPIF_WriteDisable(Handle) == false) -// { -// break; -// } -// retVal = SPIF_FindChip(Handle); -// if (retVal) -// { -// Handle->Inited = 1; -// dprintf("SPIF_Init() Done\r\n"); -// } -// -// } while (0); -// -// return retVal; -//} - - -bool SPIF_TransmitReceive(SPIF_HandleTypeDef *Handle, uint8_t *Tx, uint8_t *Rx, size_t Size, uint32_t Timeout){ - - bool retVal = false; -OSPI_RegularCmdTypeDef sCommand = {0}; - -// Set up the command to use 4 data lines -sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; -sCommand.DataMode = HAL_OSPI_DATA_4_LINES; // 4-line data mode -sCommand.NbData = Size; // Set the number of data bytes to transmit/receive -// Prepare the command (this could be any relevant command, like a read or write) -if (HAL_OSPI_Command(Handle->interface, &sCommand, Timeout) != HAL_OK) -{ - dprintf("SPIF COMMAND ERROR\r\n"); - return false; -} - if (HAL_OSPI_TransmitReceive(Handle->interface, Tx, Rx, Size, Timeout) == HAL_OK) - { - retVal = true; - } - else - { - dprintf("SPIF TIMEOUT\r\n"); - } - - return retVal; -} +bool SPIF_TransmitReceive(SPIF_HandleTypeDef *Handle, uint8_t *Tx, uint8_t *Rx, + size_t Size, uint32_t Timeout) { + bool retVal = false; -bool SPIF_Transmit(SPIF_HandleTypeDef *Handle, uint8_t *Tx, size_t Size, uint32_t Timeout){ - - bool retVal = false; -OSPI_RegularCmdTypeDef sCommand = {0}; -sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; -sCommand.DataMode = HAL_OSPI_DATA_4_LINES; // Set to 4 data lines -sCommand.NbData = Size; + OSPI_RegularCmdTypeDef sCommand = { 0 }; + OSPI_HandleTypeDef *hospi = (OSPI_HandleTypeDef*) Handle->interface; + SPIF_EmulatedPhases *pc = &Handle->phase_config; -// Send the command to prepare for the transmission -if (HAL_OSPI_Command(Handle->interface, &sCommand, Timeout) != HAL_OK) -{ - dprintf("SPIF COMMAND ERROR\r\n"); - return false; + sCommand.InstructionMode = + pc->instructionEnabled ? + HAL_OSPI_INSTRUCTION_4_LINES : HAL_OSPI_INSTRUCTION_NONE; + sCommand.InstructionSize = + pc->instructionSize == 2 ? + HAL_OSPI_INSTRUCTION_16_BITS : HAL_OSPI_INSTRUCTION_8_BITS; + sCommand.Instruction = pc->instruction; + + sCommand.AddressMode = + pc->addressEnabled ? + HAL_OSPI_ADDRESS_4_LINES : HAL_OSPI_ADDRESS_NONE; + sCommand.AddressSize = + pc->addressSize == 4 ? + HAL_OSPI_ADDRESS_32_BITS : HAL_OSPI_ADDRESS_24_BITS; + sCommand.Address = pc->addressEnabled ? pc->address : 0; + + sCommand.DummyCycles = pc->dummyCycles; + + // Data configuration + sCommand.DataMode = + pc->dataEnabled ? HAL_OSPI_DATA_4_LINES : HAL_OSPI_DATA_NONE; + sCommand.NbData = pc->dataEnabled ? Size : 0; + +// Prepare the command (this could be any relevant command, like a read or write) + if (HAL_OSPI_Command(hospi, &sCommand, Timeout) != HAL_OK) { + dprintf("SPIF COMMAND ERROR\r\n"); + return false; + } + if (HAL_OSPI_TransmitReceive(hospi, Tx, Rx, Size, Timeout) + == HAL_OK) { + retVal = true; + } else { + dprintf("SPIF TIMEOUT\r\n"); + } + + return retVal; } - if (HAL_OSPI_Transmit(Handle->interface, Tx, Timeout) == HAL_OK) - { - retVal = true; - } - else - { - dprintf("SPIF TIMEOUT\r\n"); - } - return retVal; +bool SPIF_Transmit(SPIF_HandleTypeDef *Handle, uint8_t *Tx, size_t Size, + uint32_t Timeout) { + + bool retVal = false; + OSPI_RegularCmdTypeDef sCommand = { 0 }; + OSPI_HandleTypeDef *hospi = (OSPI_HandleTypeDef*) Handle->interface; + SPIF_EmulatedPhases *pc = &Handle->phase_config; + + sCommand.InstructionMode = + pc->instructionEnabled ? + HAL_OSPI_INSTRUCTION_4_LINES : HAL_OSPI_INSTRUCTION_NONE; + sCommand.InstructionSize = + pc->instructionSize == 2 ? + HAL_OSPI_INSTRUCTION_16_BITS : HAL_OSPI_INSTRUCTION_8_BITS; + sCommand.Instruction = pc->instruction; + + sCommand.AddressMode = + pc->addressEnabled ? + HAL_OSPI_ADDRESS_4_LINES : HAL_OSPI_ADDRESS_NONE; + sCommand.AddressSize = + pc->addressSize == 4 ? + HAL_OSPI_ADDRESS_32_BITS : HAL_OSPI_ADDRESS_24_BITS; + sCommand.Address = pc->addressEnabled ? pc->address : 0; + + sCommand.DummyCycles = pc->dummyCycles; + + // Data configuration + sCommand.DataMode = + pc->dataEnabled ? HAL_OSPI_DATA_4_LINES : HAL_OSPI_DATA_NONE; + sCommand.NbData = pc->dataEnabled ? Size : 0; + +// Send the command to prepare for the transmission + if (HAL_OSPI_Command(hospi, &sCommand, Timeout) != HAL_OK) { + dprintf("SPIF COMMAND ERROR\r\n"); + return false; + } + + if (HAL_OSPI_Transmit(hospi, Tx, Timeout) == HAL_OK) { + retVal = true; + } else { + dprintf("SPIF TIMEOUT\r\n"); + } + return retVal; } -bool SPIF_Receive(SPIF_HandleTypeDef *Handle, uint8_t *Rx, size_t Size, uint32_t Timeout){ - - bool retVal = false; - OSPI_RegularCmdTypeDef sCommand = {0}; - - // Set up the command for receiving data with 4 data lines - sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; - sCommand.DataMode = HAL_OSPI_DATA_4_LINES; // Set to 4-line data mode - sCommand.NbData = Size; // Number of data bytes to receive - - if (HAL_OSPI_Command(Handle->interface, &sCommand, Timeout) != HAL_OK) - { - dprintf("SPIF COMMAND ERROR\r\n"); - return false; - } - - if (HAL_OSPI_Receive(Handle->interface, Rx, Timeout) == HAL_OK) - { - retVal = true; - } - else - { - dprintf("SPIF TIMEOUT\r\n"); - } - return retVal; +bool SPIF_Receive(SPIF_HandleTypeDef *Handle, uint8_t *Rx, size_t Size, + uint32_t Timeout) { + + bool retVal = false; + OSPI_RegularCmdTypeDef sCommand = { 0 }; + OSPI_HandleTypeDef *hospi = (OSPI_HandleTypeDef*) Handle->interface; + SPIF_EmulatedPhases *pc = &Handle->phase_config; + + sCommand.InstructionMode = + pc->instructionEnabled ? + HAL_OSPI_INSTRUCTION_4_LINES : HAL_OSPI_INSTRUCTION_NONE; + sCommand.InstructionSize = + pc->instructionSize == 2 ? + HAL_OSPI_INSTRUCTION_16_BITS : HAL_OSPI_INSTRUCTION_8_BITS; + sCommand.Instruction = pc->instruction; + + sCommand.AddressMode = + pc->addressEnabled ? + HAL_OSPI_ADDRESS_4_LINES : HAL_OSPI_ADDRESS_NONE; + sCommand.AddressSize = + pc->addressSize == 4 ? + HAL_OSPI_ADDRESS_32_BITS : HAL_OSPI_ADDRESS_24_BITS; + sCommand.Address = pc->addressEnabled ? pc->address : 0; + + sCommand.DummyCycles = pc->dummyCycles; + + // Data configuration + sCommand.DataMode = + pc->dataEnabled ? HAL_OSPI_DATA_4_LINES : HAL_OSPI_DATA_NONE; + sCommand.NbData = pc->dataEnabled ? Size : 0; + if (HAL_OSPI_Command(hospi, &sCommand, Timeout) != HAL_OK) { + dprintf("SPIF COMMAND ERROR\r\n"); + return false; + } + + if (HAL_OSPI_Receive(hospi, Rx, Timeout) == HAL_OK) { + retVal = true; + } else { + dprintf("SPIF TIMEOUT\r\n"); + } + return retVal; } diff --git a/spif_interface_spi.c b/spif_interface_spi.c index b1c857b..d537961 100644 --- a/spif_interface_spi.c +++ b/spif_interface_spi.c @@ -1,68 +1,89 @@ - #include "spif_interface_spi.h" #include "spif.h" #if(SPIF_INTERFACE == SPIF_INTERFACE_SPI) -/** - * @brief Initialize the SPIF. - * @note Enable and configure the SPI and Set GPIO as output for CS pin on the CubeMX - * - * @param *Handle: Pointer to SPIF_HandleTypeDef structure - * @param *HSpi: Pointer to a SPI_HandleTypeDef structure - * @param *Gpio: Pointer to a GPIO_TypeDef structure for CS - * @param Pin: Pin of CS - * - * @retval bool: true or false - */ -//bool SPIF_Init(SPIF_HandleTypeDef *Handle, SPI_HandleTypeDef *HSpi, GPIO_TypeDef *Gpio, uint16_t Pin) -//{ -// bool retVal = false; -// do -// { -// if ((Handle == NULL) || (HSpi == NULL) || (Gpio == NULL) || (Handle->Inited == 1)) -// { -// dprintf("SPIF_Init() Error, Wrong Parameter\r\n"); -// break; -// } -// memset(Handle, 0, sizeof(SPIF_HandleTypeDef)); -// Handle->interface = HSpi; -// Handle->Gpio = Gpio; -// Handle->Pin = Pin; -// SPIF_CsPin(Handle, 1); -// /* wait for stable VCC */ -// while (HAL_GetTick() < 20) -// { -// SPIF_Delay(1); -// } -// if (SPIF_WriteDisable(Handle) == false) -// { -// break; -// } -// retVal = SPIF_FindChip(Handle); -// if (retVal) -// { -// Handle->Inited = 1; -// dprintf("SPIF_Init() Done\r\n"); -// } -// -// } while (0); -// -// return retVal; -//} - -bool SPIF_TransmitReceive(SPIF_HandleTypeDef *Handle, uint8_t *Tx, uint8_t *Rx, size_t Size, uint32_t Timeout) -{ - bool retVal = false; +// Instruction Phase +bool SPI_SendInstruction(SPIF_HandleTypeDef *Handle, uint32_t Timeout) { + bool retVal = false; + SPIF_EmulatedPhases *pc = &Handle->phase_config; + + SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef*) Handle->interface; + retVal = HAL_SPI_Transmit(hspi, &pc->instruction, pc->instructionSize, + Timeout) == HAL_OK; + + return retVal; + +} + +// Address Phase +bool SPI_SendAddress(SPIF_HandleTypeDef *Handle, uint32_t Timeout) { + bool retVal = false; + SPIF_EmulatedPhases *pc = &Handle->phase_config; + uint32_t Address = pc->address; + SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef*) Handle->interface; + uint8_t addrBytes[4] = { 0 }; + for (int i = 0; i < pc->addressSize; i++) { + addrBytes[i] = (Address >> (8 * i)) & 0xFF; + } + retVal = HAL_SPI_Transmit(hspi, addrBytes, pc->addressSize, Timeout) + == HAL_OK; + return retVal; +} + +// Dummy Cycles Phase +bool SPI_SendDummyCycles(SPIF_HandleTypeDef *Handle, uint32_t Timeout) { + SPIF_EmulatedPhases *pc = &Handle->phase_config; + if (pc->dummyCycles > 0) { + SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef*) Handle->interface; + uint8_t dummy = 0x00; + for (int i = 0; i < pc->dummyCycles; i++) { + if (HAL_SPI_Transmit(hspi, &dummy, 1, Timeout) != HAL_OK) { + return false; + } + } + } + return true; +} + + +bool SPIF_TransmitReceive(SPIF_HandleTypeDef *Handle, uint8_t *Tx, uint8_t *Rx, + size_t Size, uint32_t Timeout) { + bool retVal = false; + #if (SPIF_PLATFORM == SPIF_PLATFORM_HAL) - if (HAL_SPI_TransmitReceive(Handle->interface, Tx, Rx, Size, Timeout) == HAL_OK) - { - retVal = true; - } - else - { - dprintf("SPIF TIMEOUT\r\n"); - } + SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef*) Handle->interface; + SPIF_EmulatedPhases *pc = &Handle->phase_config; + + if (pc->instructionEnabled) { + retVal = SPI_SendInstruction(Handle, Timeout); + if (!retVal) { + return retVal; + } + } + + if (pc->addressEnabled) { + retVal = SPI_SendAddress(Handle, Timeout); + if (!retVal) { + return retVal; + } + } + + if (pc->dummyCycles > 0) { + retVal = SPI_SendDummyCycles(Handle, Timeout); + if (!retVal) { + return retVal; + } + } + + if (pc->dataEnabled) { + if (HAL_SPI_TransmitReceive(hspi, Tx, Rx, Size, Timeout) + == HAL_OK) { + retVal = true; + } else { + dprintf("SPIF TIMEOUT\r\n"); + } + } #elif (SPIF_PLATFORM == SPIF_PLATFORM_HAL_DMA) uint32_t startTime = HAL_GetTick(); if (HAL_SPI_TransmitReceive_DMA(Handle->interface, Tx, Rx, Size) != HAL_OK) @@ -88,22 +109,47 @@ bool SPIF_TransmitReceive(SPIF_HandleTypeDef *Handle, uint8_t *Tx, uint8_t *Rx, } } #endif - return retVal; + return retVal; } -bool SPIF_Transmit(SPIF_HandleTypeDef *Handle, uint8_t *Tx, size_t Size, uint32_t Timeout) -{ +bool SPIF_Transmit(SPIF_HandleTypeDef *Handle, uint8_t *Tx, size_t Size, + uint32_t Timeout) { + + bool retVal = false; - bool retVal = false; #if (SPIF_PLATFORM == SPIF_PLATFORM_HAL) - if (HAL_SPI_Transmit(Handle->interface, Tx, Size, Timeout) == HAL_OK) - { - retVal = true; - } - else - { - dprintf("SPIF TIMEOUT\r\n"); - } + + SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef*) Handle->interface; + SPIF_EmulatedPhases *pc = &Handle->phase_config; + + if (pc->instructionEnabled) { + retVal = SPI_SendInstruction(Handle, Timeout); + if (!retVal) { + return retVal; + } + } + + if (pc->addressEnabled) { + retVal = SPI_SendAddress(Handle, Timeout); + if (!retVal) { + return retVal; + } + } + + if (pc->dummyCycles > 0) { + retVal = SPI_SendDummyCycles(Handle, Timeout); + if (!retVal) { + return retVal; + } + } + + if (pc->dataEnabled) { + if (HAL_SPI_Transmit(hspi, Tx, Size, Timeout) == HAL_OK) { + retVal = true; + } else { + dprintf("SPIF TIMEOUT\r\n"); + } + } #elif (SPIF_PLATFORM == SPIF_PLATFORM_HAL_DMA) uint32_t startTime = HAL_GetTick(); if (HAL_SPI_Transmit_DMA(Handle->interface, Tx, Size) != HAL_OK) @@ -129,22 +175,43 @@ bool SPIF_Transmit(SPIF_HandleTypeDef *Handle, uint8_t *Tx, size_t Size, uint32_ } } #endif - return retVal; + return retVal; } -bool SPIF_Receive(SPIF_HandleTypeDef *Handle, uint8_t *Rx, size_t Size, uint32_t Timeout) -{ +bool SPIF_Receive(SPIF_HandleTypeDef *Handle, uint8_t *Rx, size_t Size, + uint32_t Timeout) { - bool retVal = false; + bool retVal = false; #if (SPIF_PLATFORM == SPIF_PLATFORM_HAL) - if (HAL_SPI_Receive(Handle->interface, Rx, Size, Timeout) == HAL_OK) - { - retVal = true; - } - else - { - dprintf("SPIF TIMEOUT\r\n"); - } + SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef*) Handle->interface; + SPIF_EmulatedPhases *pc = &Handle->phase_config; + + if (pc->instructionEnabled) { + retVal = SPI_SendInstruction(Handle, Timeout); + if (!retVal) { + return retVal; + } + } + + if (pc->addressEnabled) { + retVal = SPI_SendAddress(Handle, Timeout); + if (!retVal) { + return retVal; + } + } + + if (pc->dummyCycles > 0) { + retVal = SPI_SendDummyCycles(Handle, Timeout); + if (!retVal) { + return retVal; + } + } + + if (HAL_SPI_Receive(hspi, Rx, Size, Timeout) == HAL_OK) { + retVal = true; + } else { + dprintf("SPIF TIMEOUT\r\n"); + } #elif (SPIF_PLATFORM == SPIF_PLATFORM_HAL_DMA) uint32_t startTime = HAL_GetTick(); if (HAL_SPI_Receive_DMA(Handle->interface, Rx, Size) != HAL_OK) @@ -170,7 +237,7 @@ bool SPIF_Receive(SPIF_HandleTypeDef *Handle, uint8_t *Rx, size_t Size, uint32_t } } #endif - return retVal; + return retVal; } #endif diff --git a/spif_interface_spi.h b/spif_interface_spi.h index 8f73dc4..906828a 100644 --- a/spif_interface_spi.h +++ b/spif_interface_spi.h @@ -4,6 +4,11 @@ #include "spif_util.h" #include "stm32u5xx_hal_spi.h" + +bool SPI_SendInstruction(SPIF_HandleTypeDef *Handle, uint32_t Timeout); +bool SPI_SendAddress(SPIF_HandleTypeDef *Handle, uint32_t Timeout); +bool SPI_SendDummyCycles(SPIF_HandleTypeDef *Handle, uint32_t Timeout); + //bool SPIF_Init(SPIF_HandleTypeDef *Handle, SPI_HandleTypeDef *HSpi, GPIO_TypeDef *Gpio, uint16_t Pin); //bool SPIF_TransmitReceive(SPIF_HandleTypeDef *Handle, uint8_t *Tx, uint8_t *Rx, size_t Size, uint32_t Timeout); //bool SPIF_Transmit(SPIF_HandleTypeDef *Handle, uint8_t *Tx, size_t Size, uint32_t Timeout); diff --git a/spif_util.c b/spif_util.c index 10f26f2..8cc190c 100644 --- a/spif_util.c +++ b/spif_util.c @@ -52,5 +52,63 @@ void SPIF_CsPin(SPIF_HandleTypeDef *Handle, bool Select) for (int i = 0; i < 10; i++); } +/***********************************************************************************************************/ +/* +* @brief Sets the instruction phase parameters +* +* @param phases Pointer to the SPIF_EmulatedPhases structure +* @param enabled Whether the instruction phase is enabled +* @param size Size of the instruction in bytes +* @param instruction The instruction value +*/ +void SPIF_SetCommandPhase(SPIF_HandleTypeDef* handle, bool enabled, uint8_t size, uint8_t instruction) { + + handle->phase_config.instructionEnabled= enabled; + handle->phase_config.instructionSize = size; + handle->phase_config.instruction = instruction; + +} + + +/** + * @brief Sets the address phase parameters + * + * @param phases Pointer to the SPIF_EmulatedPhases structure + * @param enabled Whether the address phase is enabled + * @param size Size of the address in bytes (typically 1-4) + * @param address The address value + */ +void SPIF_SetAddressPhase(SPIF_HandleTypeDef *handle, bool enabled, uint8_t size, uint32_t address) { + + + handle->phase_config.addressEnabled = enabled; + handle->phase_config.addressSize = size; + handle->phase_config.address = address; + +} + + +/** + * @brief Sets the dummy cycles parameter + * + * @param phases Pointer to the SPIF_EmulatedPhases structure + * @param cycles Number of dummy cycles + */ +void SPIF_SetDummyCycles(SPIF_HandleTypeDef *handle, uint8_t cycles) { + + handle->phase_config.dummyCycles = cycles; +} + + +/** + * @brief Sets the data phase parameters + * + * @param phases Pointer to the SPIF_EmulatedPhases structure + * @param enabled Whether the data phase is enabled + * @param length Length of data in bytes + */ +void SPIF_SetDataPhase(SPIF_HandleTypeDef *handle, bool enabled) { + handle->phase_config.dataEnabled = enabled; +} diff --git a/spif_util.h b/spif_util.h index 5b691c9..77ddbf4 100644 --- a/spif_util.h +++ b/spif_util.h @@ -76,6 +76,24 @@ typedef enum { } SPIF_SizeTypeDef; +typedef struct { + // --- Instruction Phase --- + bool instructionEnabled; + uint8_t instructionSize; + uint8_t instruction; + + // --- Address Phase --- + bool addressEnabled; + uint8_t addressSize; + uint32_t address; + + // Dummy Cycles --- + uint8_t dummyCycles; + + // --- Data Phase --- + bool dataEnabled; +} SPIF_EmulatedPhases; + typedef struct { void *interface; GPIO_TypeDef *Gpio; @@ -90,6 +108,7 @@ typedef struct { uint32_t SectorCnt; uint32_t BlockCnt; + SPIF_EmulatedPhases phase_config; } SPIF_HandleTypeDef; @@ -100,6 +119,10 @@ void SPIF_UnLock(SPIF_HandleTypeDef *Handle); void SPIF_CsPin(SPIF_HandleTypeDef *Handle, bool Select); +void SPIF_SetInstructionPhase(SPIF_HandleTypeDef* handle, bool enabled, uint8_t size, uint8_t instruction); +void SPIF_SetAddressPhase(SPIF_HandleTypeDef *handle, bool enabled, uint8_t size, uint32_t address); +void SPIF_SetDummyCycles(SPIF_HandleTypeDef *handle, uint8_t cycles); +void SPIF_SetDataPhase(SPIF_HandleTypeDef *handle, bool enabled); #endif /* INC_SPIF_UTIL_H_ */ From 7904e4aec2f9e4e80e31a01bb2bbd29a19e0bb63 Mon Sep 17 00:00:00 2001 From: Megh Shah Date: Mon, 2 Jun 2025 14:44:51 +0530 Subject: [PATCH 14/17] Put function definitions in spif_util.h - Moved interface function definitions to spif_util.h - Moved debug from spif.h to spif_util.h --- spif.h | 14 +------------- spif_interface_spi.h | 2 +- spif_util.h | 14 ++++++++++++++ 3 files changed, 16 insertions(+), 14 deletions(-) diff --git a/spif.h b/spif.h index c61916e..e45912e 100644 --- a/spif.h +++ b/spif.h @@ -63,19 +63,7 @@ extern "C" #include "stm32u5xx_hal_spi.h" #endif - bool SPIF_TransmitReceive(SPIF_HandleTypeDef *Handle, uint8_t *Tx, - uint8_t *Rx, size_t Size, uint32_t Timeout); - bool SPIF_Transmit(SPIF_HandleTypeDef *Handle, uint8_t *Tx, size_t Size, - uint32_t Timeout); - bool SPIF_Receive(SPIF_HandleTypeDef *Handle, uint8_t *Rx, size_t Size, - uint32_t Timeout); - -#if SPIF_DEBUG == SPIF_DEBUG_DISABLE -#define dprintf(...) -#else -#include -#define dprintf(...) printf(__VA_ARGS__) -#endif + #if (SPIF_COMPAT == SPIF_COMPAT_W25XX) #include "spif_compat_w25xx.h" diff --git a/spif_interface_spi.h b/spif_interface_spi.h index 906828a..fb7e6cf 100644 --- a/spif_interface_spi.h +++ b/spif_interface_spi.h @@ -2,7 +2,7 @@ #define _SPIF_INTERFACE_SPI_H_ #include "spif_util.h" -#include "stm32u5xx_hal_spi.h" +#include "spi.h" bool SPI_SendInstruction(SPIF_HandleTypeDef *Handle, uint32_t Timeout); diff --git a/spif_util.h b/spif_util.h index 77ddbf4..83f862b 100644 --- a/spif_util.h +++ b/spif_util.h @@ -13,6 +13,13 @@ #include "stm32u5xx_hal.h" +#if SPIF_DEBUG == SPIF_DEBUG_DISABLE +#define dprintf(...) +#else +#include +#define dprintf(...) printf(__VA_ARGS__) +#endif + /************************************************************************************************************ ************** Public Definitions @@ -124,5 +131,12 @@ void SPIF_SetAddressPhase(SPIF_HandleTypeDef *handle, bool enabled, uint8_t size void SPIF_SetDummyCycles(SPIF_HandleTypeDef *handle, uint8_t cycles); void SPIF_SetDataPhase(SPIF_HandleTypeDef *handle, bool enabled); +bool SPIF_TransmitReceive(SPIF_HandleTypeDef *Handle, uint8_t *Tx, + uint8_t *Rx, size_t Size, uint32_t Timeout); +bool SPIF_Transmit(SPIF_HandleTypeDef *Handle, uint8_t *Tx, size_t Size, + uint32_t Timeout); +bool SPIF_Receive(SPIF_HandleTypeDef *Handle, uint8_t *Rx, size_t Size, + uint32_t Timeout); + #endif /* INC_SPIF_UTIL_H_ */ From cd20f5bc8607fe006361d69769b2444f3f770a54 Mon Sep 17 00:00:00 2001 From: Megh Shah Date: Mon, 2 Jun 2025 15:23:36 +0530 Subject: [PATCH 15/17] split spif_util into spif_internal and spif_common - put all the private definitions and functions into spif_internal - put all the common definitions and functions into spif_common --- spif.h | 2 +- spif_common.h | 92 +++++++++++++++++++++++++++++++ spif_compat_is25xx.h | 2 +- spif_compat_w25xx.h | 2 +- spif_interface_octospi.c | 2 +- spif_interface_octospi.h | 2 +- spif_interface_spi.c | 8 ++- spif_interface_spi.h | 7 +-- spif_internal.c | 114 +++++++++++++++++++++++++++++++++++++++ spif_internal.h | 71 ++++++++++++++++++++++++ 10 files changed, 291 insertions(+), 11 deletions(-) create mode 100644 spif_common.h create mode 100644 spif_internal.c create mode 100644 spif_internal.h diff --git a/spif.h b/spif.h index e45912e..919ef87 100644 --- a/spif.h +++ b/spif.h @@ -54,7 +54,7 @@ extern "C" #include #include #include "NimaLTD.I-CUBE-SPIF_conf.h" -#include "spif_util.h" +#include "spif_common.h" #if (SPIF_INTERFACE == SPIF_INTERFACE_OCTOSPI) #include "stm32u5xx_hal.h" diff --git a/spif_common.h b/spif_common.h new file mode 100644 index 0000000..58b1e58 --- /dev/null +++ b/spif_common.h @@ -0,0 +1,92 @@ +/* + * spif_common.h + * + * Created on: Jun 2, 2025 + * Author: Megh Shah + */ + +#ifndef INC_SPIF_COMMON_H_ +#define INC_SPIF_COMMON_H_ + +#include +#include "stm32u5xx_hal.h" +#include + +/************************************************************************************************************ + ************** Public struct/enum + ************************************************************************************************************/ + +typedef enum { + SPIF_MANUFACTOR_ERROR = 0, + SPIF_MANUFACTOR_WINBOND = 0xEF, + SPIF_MANUFACTOR_ISSI = 0xD5, + SPIF_MANUFACTOR_MICRON = 0x20, + SPIF_MANUFACTOR_GIGADEVICE = 0xC8, + SPIF_MANUFACTOR_MACRONIX = 0xC2, + SPIF_MANUFACTOR_SPANSION = 0x01, + SPIF_MANUFACTOR_AMIC = 0x37, + SPIF_MANUFACTOR_SST = 0xBF, + SPIF_MANUFACTOR_HYUNDAI = 0xAD, + SPIF_MANUFACTOR_ATMEL = 0x1F, + SPIF_MANUFACTOR_FUDAN = 0xA1, + SPIF_MANUFACTOR_ESMT = 0x8C, + SPIF_MANUFACTOR_INTEL = 0x89, + SPIF_MANUFACTOR_SANYO = 0x62, + SPIF_MANUFACTOR_FUJITSU = 0x04, + SPIF_MANUFACTOR_EON = 0x1C, + SPIF_MANUFACTOR_PUYA = 0x85, + +} SPIF_ManufactorTypeDef; + +typedef enum { + SPIF_SIZE_ERROR = 0, + SPIF_SIZE_1MBIT = 0x11, + SPIF_SIZE_2MBIT = 0x12, + SPIF_SIZE_4MBIT = 0x13, + SPIF_SIZE_8MBIT = 0x14, + SPIF_SIZE_16MBIT = 0x15, + SPIF_SIZE_32MBIT = 0x16, + SPIF_SIZE_64MBIT = 0x17, + SPIF_SIZE_128MBIT = 0x18, + SPIF_SIZE_256MBIT = 0x19, + SPIF_SIZE_512MBIT = 0x20, + +} SPIF_SizeTypeDef; + +typedef struct { + // --- Instruction Phase --- + bool instructionEnabled; + uint8_t instructionSize; + uint8_t instruction; + + // --- Address Phase --- + bool addressEnabled; + uint8_t addressSize; + uint32_t address; + + // Dummy Cycles --- + uint8_t dummyCycles; + + // --- Data Phase --- + bool dataEnabled; +} SPIF_EmulatedPhases; + +typedef struct { + void *interface; + GPIO_TypeDef *Gpio; + SPIF_ManufactorTypeDef Manufactor; + SPIF_SizeTypeDef Size; + uint8_t Inited; + uint8_t MemType; + uint8_t Lock; + uint8_t Reserved; + uint32_t Pin; + uint32_t PageCnt; + uint32_t SectorCnt; + uint32_t BlockCnt; + + SPIF_EmulatedPhases phase_config; +} SPIF_HandleTypeDef; + + +#endif /* INC_SPIF_COMMON_H_ */ diff --git a/spif_compat_is25xx.h b/spif_compat_is25xx.h index 936e9ed..8099552 100644 --- a/spif_compat_is25xx.h +++ b/spif_compat_is25xx.h @@ -1,7 +1,7 @@ #ifndef _SPIF_COMPAT_IS25_H_ #define _SPIF_COMPAT_IS25_H_ -#include "spif_util.h" +#include "spif_common.h" #include diff --git a/spif_compat_w25xx.h b/spif_compat_w25xx.h index 5113b7e..637dd68 100644 --- a/spif_compat_w25xx.h +++ b/spif_compat_w25xx.h @@ -2,7 +2,7 @@ #ifndef _SPIF_COMPAT_W25XX_H_ #define _SPIF_COMPAT_W25XX_H_ -#include "spif_util.h" +#include "spif_common.h" #include diff --git a/spif_interface_octospi.c b/spif_interface_octospi.c index fc4a3c9..f4aeaf0 100644 --- a/spif_interface_octospi.c +++ b/spif_interface_octospi.c @@ -1,4 +1,4 @@ -#include "spif_interface_octospi.h" +#include "spif_internal.h" #include "stm32u5xx_hal_ospi.h" #include "spif.h" diff --git a/spif_interface_octospi.h b/spif_interface_octospi.h index ad3ad78..89a97a1 100644 --- a/spif_interface_octospi.h +++ b/spif_interface_octospi.h @@ -1,7 +1,7 @@ #ifndef _SPIF_INTERFACE_OCTOSPI_H_ #define _SPIF_INTERFACE_OCTOSPI_H_ -#include "spif_util.h" +#include "spif_internal.h" #include "stm32u5xx_hal_ospi.h" //bool SPIF_OCTOSPI_Init(SPIF_HandleTypeDef *Handle, OSPI_HandleTypeDef *HOspi, GPIO_TypeDef *Gpio, uint16_t Pin); diff --git a/spif_interface_spi.c b/spif_interface_spi.c index d537961..58c169d 100644 --- a/spif_interface_spi.c +++ b/spif_interface_spi.c @@ -1,8 +1,14 @@ -#include "spif_interface_spi.h" +#include "spif_internal.h" #include "spif.h" #if(SPIF_INTERFACE == SPIF_INTERFACE_SPI) + +bool SPI_SendInstruction(SPIF_HandleTypeDef *Handle, uint32_t Timeout); +bool SPI_SendAddress(SPIF_HandleTypeDef *Handle, uint32_t Timeout); +bool SPI_SendDummyCycles(SPIF_HandleTypeDef *Handle, uint32_t Timeout); + + // Instruction Phase bool SPI_SendInstruction(SPIF_HandleTypeDef *Handle, uint32_t Timeout) { bool retVal = false; diff --git a/spif_interface_spi.h b/spif_interface_spi.h index fb7e6cf..87f0eeb 100644 --- a/spif_interface_spi.h +++ b/spif_interface_spi.h @@ -1,13 +1,10 @@ #ifndef _SPIF_INTERFACE_SPI_H_ #define _SPIF_INTERFACE_SPI_H_ -#include "spif_util.h" -#include "spi.h" +#include "spif_internal.h" +#include "stm32u5xx_hal_spi.h" -bool SPI_SendInstruction(SPIF_HandleTypeDef *Handle, uint32_t Timeout); -bool SPI_SendAddress(SPIF_HandleTypeDef *Handle, uint32_t Timeout); -bool SPI_SendDummyCycles(SPIF_HandleTypeDef *Handle, uint32_t Timeout); //bool SPIF_Init(SPIF_HandleTypeDef *Handle, SPI_HandleTypeDef *HSpi, GPIO_TypeDef *Gpio, uint16_t Pin); //bool SPIF_TransmitReceive(SPIF_HandleTypeDef *Handle, uint8_t *Tx, uint8_t *Rx, size_t Size, uint32_t Timeout); diff --git a/spif_internal.c b/spif_internal.c new file mode 100644 index 0000000..43b5005 --- /dev/null +++ b/spif_internal.c @@ -0,0 +1,114 @@ +/* + * spif_util.c + * + * Created on: May 15, 2025 + * Author: Megh Shah + */ + +#include "spif_internal.h" + +/***********************************************************************************************************/ + +void SPIF_Delay(uint32_t Delay) +{ +#if SPIF_RTOS == SPIF_RTOS_DISABLE + HAL_Delay(Delay); +#elif (SPIF_RTOS == SPIF_RTOS_CMSIS_V1) || (SPIF_RTOS == SPIF_RTOS_CMSIS_V2) + uint32_t d = (configTICK_RATE_HZ * Delay) / 1000; + if (d == 0) + d = 1; + osDelay(d); +#elif SPIF_RTOS == SPIF_RTOS_THREADX + uint32_t d = (TX_TIMER_TICKS_PER_SECOND * Delay) / 1000; + if (d == 0) + d = 1; + tx_thread_sleep(d); +#endif +} + +/***********************************************************************************************************/ + +void SPIF_Lock(SPIF_HandleTypeDef *Handle) +{ + while (Handle->Lock) + { + SPIF_Delay(1); + } + Handle->Lock = 1; +} + +/***********************************************************************************************************/ + +void SPIF_UnLock(SPIF_HandleTypeDef *Handle) +{ + Handle->Lock = 0; +} + +/***********************************************************************************************************/ + +void SPIF_CsPin(SPIF_HandleTypeDef *Handle, bool Select) +{ + HAL_GPIO_WritePin(Handle->Gpio, Handle->Pin, (GPIO_PinState)Select); + for (int i = 0; i < 10; i++); +} + +/***********************************************************************************************************/ +/* +* @brief Sets the instruction phase parameters +* +* @param phases Pointer to the SPIF_EmulatedPhases structure +* @param enabled Whether the instruction phase is enabled +* @param size Size of the instruction in bytes +* @param instruction The instruction value +*/ +void SPIF_SetCommandPhase(SPIF_HandleTypeDef* handle, bool enabled, uint8_t size, uint8_t instruction) { + + handle->phase_config.instructionEnabled= enabled; + handle->phase_config.instructionSize = size; + handle->phase_config.instruction = instruction; + +} + + +/** + * @brief Sets the address phase parameters + * + * @param phases Pointer to the SPIF_EmulatedPhases structure + * @param enabled Whether the address phase is enabled + * @param size Size of the address in bytes (typically 1-4) + * @param address The address value + */ +void SPIF_SetAddressPhase(SPIF_HandleTypeDef *handle, bool enabled, uint8_t size, uint32_t address) { + + + handle->phase_config.addressEnabled = enabled; + handle->phase_config.addressSize = size; + handle->phase_config.address = address; + +} + + +/** + * @brief Sets the dummy cycles parameter + * + * @param phases Pointer to the SPIF_EmulatedPhases structure + * @param cycles Number of dummy cycles + */ +void SPIF_SetDummyCycles(SPIF_HandleTypeDef *handle, uint8_t cycles) { + + handle->phase_config.dummyCycles = cycles; + +} + + +/** + * @brief Sets the data phase parameters + * + * @param phases Pointer to the SPIF_EmulatedPhases structure + * @param enabled Whether the data phase is enabled + * @param length Length of data in bytes + */ +void SPIF_SetDataPhase(SPIF_HandleTypeDef *handle, bool enabled) { + + handle->phase_config.dataEnabled = enabled; +} diff --git a/spif_internal.h b/spif_internal.h new file mode 100644 index 0000000..8571ae9 --- /dev/null +++ b/spif_internal.h @@ -0,0 +1,71 @@ +/* + * spif_types.h + * + * Created on: May 15, 2025 + * Author: Megh Shah + */ + +#ifndef INC_SPIF_INTERNAL_H_ +#define INC_SPIF_INTERNAL_H_ + +#include +#include +#include "stm32u5xx_hal.h" + +#include "spif_common.h" + + +#if SPIF_DEBUG == SPIF_DEBUG_DISABLE +#define dprintf(...) +#else +#include +#define dprintf(...) printf(__VA_ARGS__) +#endif + + + + +/************************************************************************************************************ + ************** Public Definitions + ************************************************************************************************************/ + +#define SPIF_PAGE_SIZE 0x100 +#define SPIF_SECTOR_SIZE 0x1000 +#define SPIF_BLOCK_SIZE 0x10000 + +#define SPIF_PageToSector(PageNumber) (((PageNumber) * SPIF_PAGE_SIZE) / SPIF_SECTOR_SIZE) +#define SPIF_PageToBlock(PageNumber) (((PageNumber) * SPIF_PAGE_SIZE) / SPIF_BLOCK_SIZE) +#define SPIF_SectorToBlock(SectorNumber) (((SectorNumber) * SPIF_SECTOR_SIZE) / SPIF_BLOCK_SIZE) +#define SPIF_SectorToPage(SectorNumber) (((SectorNumber) * SPIF_SECTOR_SIZE) / SPIF_PAGE_SIZE) +#define SPIF_BlockToPage(BlockNumber) (((BlockNumber) * SPIF_BLOCK_SIZE) / SPIF_PAGE_SIZE) +#define SPIF_PageToAddress(PageNumber) ((PageNumber) * SPIF_PAGE_SIZE) +#define SPIF_SectorToAddress(SectorNumber) ((SectorNumber) * SPIF_SECTOR_SIZE) +#define SPIF_BlockToAddress(BlockNumber) ((BlockNumber) * SPIF_BLOCK_SIZE) +#define SPIF_AddressToPage(Address) ((Address) / SPIF_PAGE_SIZE) +#define SPIF_AddressToSector(Address) ((Address) / SPIF_SECTOR_SIZE) +#define SPIF_AddressToBlock(Address) ((Address) / SPIF_BLOCK_SIZE) + + + + +/*Helper Functions*/ +void SPIF_Delay(uint32_t Delay); +void SPIF_Lock(SPIF_HandleTypeDef *Handle); +void SPIF_UnLock(SPIF_HandleTypeDef *Handle); +void SPIF_CsPin(SPIF_HandleTypeDef *Handle, bool Select); + + +void SPIF_SetInstructionPhase(SPIF_HandleTypeDef* handle, bool enabled, uint8_t size, uint8_t instruction); +void SPIF_SetAddressPhase(SPIF_HandleTypeDef *handle, bool enabled, uint8_t size, uint32_t address); +void SPIF_SetDummyCycles(SPIF_HandleTypeDef *handle, uint8_t cycles); +void SPIF_SetDataPhase(SPIF_HandleTypeDef *handle, bool enabled); + +bool SPIF_TransmitReceive(SPIF_HandleTypeDef *Handle, uint8_t *Tx, + uint8_t *Rx, size_t Size, uint32_t Timeout); +bool SPIF_Transmit(SPIF_HandleTypeDef *Handle, uint8_t *Tx, size_t Size, + uint32_t Timeout); +bool SPIF_Receive(SPIF_HandleTypeDef *Handle, uint8_t *Rx, size_t Size, + uint32_t Timeout); + + +#endif /* INC_SPIF_INTERNAL_H_ */ From fd936e68319fd8bbdeb40005c77a8f46bb29ee5e Mon Sep 17 00:00:00 2001 From: Megh Shah Date: Mon, 2 Jun 2025 15:31:15 +0530 Subject: [PATCH 16/17] removed spif_util --- spif.h | 7 +-- spif_util.c | 114 ----------------------------------------- spif_util.h | 142 ---------------------------------------------------- 3 files changed, 1 insertion(+), 262 deletions(-) delete mode 100644 spif_util.c delete mode 100644 spif_util.h diff --git a/spif.h b/spif.h index 919ef87..5d9979c 100644 --- a/spif.h +++ b/spif.h @@ -86,12 +86,7 @@ extern "C" /************************************************************************************************************ ************** Public Functions ************************************************************************************************************/ -//#if (SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI) -// bool SPIF_OCTOSPI_Init(SPIF_HandleTypeDef *Handle, -// OSPI_HandleTypeDef *HOspi, GPIO_TypeDef *Gpio, uint16_t Pin); -//#else -// bool SPIF_Init(SPIF_HandleTypeDef *Handle, SPI_HandleTypeDef *HSpi, GPIO_TypeDef *Gpio, uint16_t Pin); -//#endif + bool SPIF_WriteAddress(SPIF_HandleTypeDef *Handle, uint32_t Address, uint8_t *Data, uint32_t Size); diff --git a/spif_util.c b/spif_util.c deleted file mode 100644 index 8cc190c..0000000 --- a/spif_util.c +++ /dev/null @@ -1,114 +0,0 @@ -/* - * spif_util.c - * - * Created on: May 15, 2025 - * Author: Megh Shah - */ - -#include "spif_util.h" - -/***********************************************************************************************************/ - -void SPIF_Delay(uint32_t Delay) -{ -#if SPIF_RTOS == SPIF_RTOS_DISABLE - HAL_Delay(Delay); -#elif (SPIF_RTOS == SPIF_RTOS_CMSIS_V1) || (SPIF_RTOS == SPIF_RTOS_CMSIS_V2) - uint32_t d = (configTICK_RATE_HZ * Delay) / 1000; - if (d == 0) - d = 1; - osDelay(d); -#elif SPIF_RTOS == SPIF_RTOS_THREADX - uint32_t d = (TX_TIMER_TICKS_PER_SECOND * Delay) / 1000; - if (d == 0) - d = 1; - tx_thread_sleep(d); -#endif -} - -/***********************************************************************************************************/ - -void SPIF_Lock(SPIF_HandleTypeDef *Handle) -{ - while (Handle->Lock) - { - SPIF_Delay(1); - } - Handle->Lock = 1; -} - -/***********************************************************************************************************/ - -void SPIF_UnLock(SPIF_HandleTypeDef *Handle) -{ - Handle->Lock = 0; -} - -/***********************************************************************************************************/ - -void SPIF_CsPin(SPIF_HandleTypeDef *Handle, bool Select) -{ - HAL_GPIO_WritePin(Handle->Gpio, Handle->Pin, (GPIO_PinState)Select); - for (int i = 0; i < 10; i++); -} - -/***********************************************************************************************************/ -/* -* @brief Sets the instruction phase parameters -* -* @param phases Pointer to the SPIF_EmulatedPhases structure -* @param enabled Whether the instruction phase is enabled -* @param size Size of the instruction in bytes -* @param instruction The instruction value -*/ -void SPIF_SetCommandPhase(SPIF_HandleTypeDef* handle, bool enabled, uint8_t size, uint8_t instruction) { - - handle->phase_config.instructionEnabled= enabled; - handle->phase_config.instructionSize = size; - handle->phase_config.instruction = instruction; - -} - - -/** - * @brief Sets the address phase parameters - * - * @param phases Pointer to the SPIF_EmulatedPhases structure - * @param enabled Whether the address phase is enabled - * @param size Size of the address in bytes (typically 1-4) - * @param address The address value - */ -void SPIF_SetAddressPhase(SPIF_HandleTypeDef *handle, bool enabled, uint8_t size, uint32_t address) { - - - handle->phase_config.addressEnabled = enabled; - handle->phase_config.addressSize = size; - handle->phase_config.address = address; - -} - - -/** - * @brief Sets the dummy cycles parameter - * - * @param phases Pointer to the SPIF_EmulatedPhases structure - * @param cycles Number of dummy cycles - */ -void SPIF_SetDummyCycles(SPIF_HandleTypeDef *handle, uint8_t cycles) { - - handle->phase_config.dummyCycles = cycles; - -} - - -/** - * @brief Sets the data phase parameters - * - * @param phases Pointer to the SPIF_EmulatedPhases structure - * @param enabled Whether the data phase is enabled - * @param length Length of data in bytes - */ -void SPIF_SetDataPhase(SPIF_HandleTypeDef *handle, bool enabled) { - - handle->phase_config.dataEnabled = enabled; -} diff --git a/spif_util.h b/spif_util.h deleted file mode 100644 index 83f862b..0000000 --- a/spif_util.h +++ /dev/null @@ -1,142 +0,0 @@ -/* - * spif_types.h - * - * Created on: May 15, 2025 - * Author: Megh Shah - */ - -#ifndef INC_SPIF_UTIL_H_ -#define INC_SPIF_UTIL_H_ - -#include -#include -#include "stm32u5xx_hal.h" - - -#if SPIF_DEBUG == SPIF_DEBUG_DISABLE -#define dprintf(...) -#else -#include -#define dprintf(...) printf(__VA_ARGS__) -#endif - - -/************************************************************************************************************ - ************** Public Definitions - ************************************************************************************************************/ - -#define SPIF_PAGE_SIZE 0x100 -#define SPIF_SECTOR_SIZE 0x1000 -#define SPIF_BLOCK_SIZE 0x10000 - -#define SPIF_PageToSector(PageNumber) (((PageNumber) * SPIF_PAGE_SIZE) / SPIF_SECTOR_SIZE) -#define SPIF_PageToBlock(PageNumber) (((PageNumber) * SPIF_PAGE_SIZE) / SPIF_BLOCK_SIZE) -#define SPIF_SectorToBlock(SectorNumber) (((SectorNumber) * SPIF_SECTOR_SIZE) / SPIF_BLOCK_SIZE) -#define SPIF_SectorToPage(SectorNumber) (((SectorNumber) * SPIF_SECTOR_SIZE) / SPIF_PAGE_SIZE) -#define SPIF_BlockToPage(BlockNumber) (((BlockNumber) * SPIF_BLOCK_SIZE) / SPIF_PAGE_SIZE) -#define SPIF_PageToAddress(PageNumber) ((PageNumber) * SPIF_PAGE_SIZE) -#define SPIF_SectorToAddress(SectorNumber) ((SectorNumber) * SPIF_SECTOR_SIZE) -#define SPIF_BlockToAddress(BlockNumber) ((BlockNumber) * SPIF_BLOCK_SIZE) -#define SPIF_AddressToPage(Address) ((Address) / SPIF_PAGE_SIZE) -#define SPIF_AddressToSector(Address) ((Address) / SPIF_SECTOR_SIZE) -#define SPIF_AddressToBlock(Address) ((Address) / SPIF_BLOCK_SIZE) - - -/************************************************************************************************************ - ************** Public struct/enum - ************************************************************************************************************/ - -typedef enum { - SPIF_MANUFACTOR_ERROR = 0, - SPIF_MANUFACTOR_WINBOND = 0xEF, - SPIF_MANUFACTOR_ISSI = 0xD5, - SPIF_MANUFACTOR_MICRON = 0x20, - SPIF_MANUFACTOR_GIGADEVICE = 0xC8, - SPIF_MANUFACTOR_MACRONIX = 0xC2, - SPIF_MANUFACTOR_SPANSION = 0x01, - SPIF_MANUFACTOR_AMIC = 0x37, - SPIF_MANUFACTOR_SST = 0xBF, - SPIF_MANUFACTOR_HYUNDAI = 0xAD, - SPIF_MANUFACTOR_ATMEL = 0x1F, - SPIF_MANUFACTOR_FUDAN = 0xA1, - SPIF_MANUFACTOR_ESMT = 0x8C, - SPIF_MANUFACTOR_INTEL = 0x89, - SPIF_MANUFACTOR_SANYO = 0x62, - SPIF_MANUFACTOR_FUJITSU = 0x04, - SPIF_MANUFACTOR_EON = 0x1C, - SPIF_MANUFACTOR_PUYA = 0x85, - -} SPIF_ManufactorTypeDef; - -typedef enum { - SPIF_SIZE_ERROR = 0, - SPIF_SIZE_1MBIT = 0x11, - SPIF_SIZE_2MBIT = 0x12, - SPIF_SIZE_4MBIT = 0x13, - SPIF_SIZE_8MBIT = 0x14, - SPIF_SIZE_16MBIT = 0x15, - SPIF_SIZE_32MBIT = 0x16, - SPIF_SIZE_64MBIT = 0x17, - SPIF_SIZE_128MBIT = 0x18, - SPIF_SIZE_256MBIT = 0x19, - SPIF_SIZE_512MBIT = 0x20, - -} SPIF_SizeTypeDef; - -typedef struct { - // --- Instruction Phase --- - bool instructionEnabled; - uint8_t instructionSize; - uint8_t instruction; - - // --- Address Phase --- - bool addressEnabled; - uint8_t addressSize; - uint32_t address; - - // Dummy Cycles --- - uint8_t dummyCycles; - - // --- Data Phase --- - bool dataEnabled; -} SPIF_EmulatedPhases; - -typedef struct { - void *interface; - GPIO_TypeDef *Gpio; - SPIF_ManufactorTypeDef Manufactor; - SPIF_SizeTypeDef Size; - uint8_t Inited; - uint8_t MemType; - uint8_t Lock; - uint8_t Reserved; - uint32_t Pin; - uint32_t PageCnt; - uint32_t SectorCnt; - uint32_t BlockCnt; - - SPIF_EmulatedPhases phase_config; -} SPIF_HandleTypeDef; - - -/*Helper Functions*/ -void SPIF_Delay(uint32_t Delay); -void SPIF_Lock(SPIF_HandleTypeDef *Handle); -void SPIF_UnLock(SPIF_HandleTypeDef *Handle); -void SPIF_CsPin(SPIF_HandleTypeDef *Handle, bool Select); - - -void SPIF_SetInstructionPhase(SPIF_HandleTypeDef* handle, bool enabled, uint8_t size, uint8_t instruction); -void SPIF_SetAddressPhase(SPIF_HandleTypeDef *handle, bool enabled, uint8_t size, uint32_t address); -void SPIF_SetDummyCycles(SPIF_HandleTypeDef *handle, uint8_t cycles); -void SPIF_SetDataPhase(SPIF_HandleTypeDef *handle, bool enabled); - -bool SPIF_TransmitReceive(SPIF_HandleTypeDef *Handle, uint8_t *Tx, - uint8_t *Rx, size_t Size, uint32_t Timeout); -bool SPIF_Transmit(SPIF_HandleTypeDef *Handle, uint8_t *Tx, size_t Size, - uint32_t Timeout); -bool SPIF_Receive(SPIF_HandleTypeDef *Handle, uint8_t *Rx, size_t Size, - uint32_t Timeout); - - -#endif /* INC_SPIF_UTIL_H_ */ From 23bf2b71e2a65f0b6a3c8f5af8e0a2bde64ba19a Mon Sep 17 00:00:00 2001 From: Megh Shah Date: Mon, 2 Jun 2025 15:42:55 +0530 Subject: [PATCH 17/17] Removed spif_interface*.h --- spif.c | 2 +- spif.h | 21 +++++++++++++-------- spif_common.h | 12 ++++++++++++ spif_compat_is25xx.h | 1 + spif_compat_w25xx.h | 1 + spif_interface_octospi.h | 12 ------------ spif_interface_spi.h | 14 -------------- spif_internal.h | 9 --------- 8 files changed, 28 insertions(+), 44 deletions(-) delete mode 100644 spif_interface_octospi.h delete mode 100644 spif_interface_spi.h diff --git a/spif.c b/spif.c index 7c02a93..c3a8e5a 100644 --- a/spif.c +++ b/spif.c @@ -5,7 +5,7 @@ #include "spif.h" #include - +#include "spif_internal.h" #if SPIF_RTOS == SPIF_RTOS_DISABLE #elif SPIF_RTOS == SPIF_RTOS_CMSIS_V1 diff --git a/spif.h b/spif.h index 5d9979c..d5db61f 100644 --- a/spif.h +++ b/spif.h @@ -73,20 +73,25 @@ extern "C" #endif - #if (SPIF_PLATFORM == SPIF_INTERFACE_OCTOSPI) - #include "spif_interface_octospi.h" -#else - -#include "spif_interface_spi.h" - -#endif +// #if (SPIF_PLATFORM == SPIF_INTERFACE_OCTOSPI) +// #include "spif_interface_octospi.h" +//#else +// +//#include "spif_interface_spi.h" +// +//#endif /************************************************************************************************************ ************** Public Functions ************************************************************************************************************/ - +//#if (SPIF_PLATFORM == SPIF_PLATFORM_OCTOSPI) +// bool SPIF_OCTOSPI_Init(SPIF_HandleTypeDef *Handle, +// OSPI_HandleTypeDef *HOspi, GPIO_TypeDef *Gpio, uint16_t Pin); +//#else +// bool SPIF_Init(SPIF_HandleTypeDef *Handle, SPI_HandleTypeDef *HSpi, GPIO_TypeDef *Gpio, uint16_t Pin); +//#endif bool SPIF_WriteAddress(SPIF_HandleTypeDef *Handle, uint32_t Address, uint8_t *Data, uint32_t Size); diff --git a/spif_common.h b/spif_common.h index 58b1e58..1781d2d 100644 --- a/spif_common.h +++ b/spif_common.h @@ -12,6 +12,18 @@ #include "stm32u5xx_hal.h" #include + + + +#if SPIF_DEBUG == SPIF_DEBUG_DISABLE +#define dprintf(...) +#else +#include +#define dprintf(...) printf(__VA_ARGS__) +#endif + + + /************************************************************************************************************ ************** Public struct/enum ************************************************************************************************************/ diff --git a/spif_compat_is25xx.h b/spif_compat_is25xx.h index 8099552..2a87a07 100644 --- a/spif_compat_is25xx.h +++ b/spif_compat_is25xx.h @@ -2,6 +2,7 @@ #define _SPIF_COMPAT_IS25_H_ #include "spif_common.h" +#include "spif_internal.h" #include diff --git a/spif_compat_w25xx.h b/spif_compat_w25xx.h index 637dd68..0b87bac 100644 --- a/spif_compat_w25xx.h +++ b/spif_compat_w25xx.h @@ -3,6 +3,7 @@ #define _SPIF_COMPAT_W25XX_H_ #include "spif_common.h" +#include "spif_internal.h" #include diff --git a/spif_interface_octospi.h b/spif_interface_octospi.h deleted file mode 100644 index 89a97a1..0000000 --- a/spif_interface_octospi.h +++ /dev/null @@ -1,12 +0,0 @@ -#ifndef _SPIF_INTERFACE_OCTOSPI_H_ -#define _SPIF_INTERFACE_OCTOSPI_H_ - -#include "spif_internal.h" -#include "stm32u5xx_hal_ospi.h" - -//bool SPIF_OCTOSPI_Init(SPIF_HandleTypeDef *Handle, OSPI_HandleTypeDef *HOspi, GPIO_TypeDef *Gpio, uint16_t Pin); -//bool SPIF_OCTOSPI_TransmitReceive(SPIF_HandleTypeDef *Handle, uint8_t *Tx, uint8_t *Rx, size_t Size, uint32_t Timeout); -//bool SPIF_OCTOSPI_Transmit(SPIF_HandleTypeDef *Handle, uint8_t *Tx, size_t Size, uint32_t Timeout); -//bool SPIF_OCTOSPI_Receive(SPIF_HandleTypeDef *Handle, uint8_t *Rx, size_t Size, uint32_t Timeout); - -#endif diff --git a/spif_interface_spi.h b/spif_interface_spi.h deleted file mode 100644 index 87f0eeb..0000000 --- a/spif_interface_spi.h +++ /dev/null @@ -1,14 +0,0 @@ -#ifndef _SPIF_INTERFACE_SPI_H_ -#define _SPIF_INTERFACE_SPI_H_ - -#include "spif_internal.h" -#include "stm32u5xx_hal_spi.h" - - - -//bool SPIF_Init(SPIF_HandleTypeDef *Handle, SPI_HandleTypeDef *HSpi, GPIO_TypeDef *Gpio, uint16_t Pin); -//bool SPIF_TransmitReceive(SPIF_HandleTypeDef *Handle, uint8_t *Tx, uint8_t *Rx, size_t Size, uint32_t Timeout); -//bool SPIF_Transmit(SPIF_HandleTypeDef *Handle, uint8_t *Tx, size_t Size, uint32_t Timeout); -//bool SPIF_Receive(SPIF_HandleTypeDef *Handle, uint8_t *Rx, size_t Size, uint32_t Timeout); - -#endif diff --git a/spif_internal.h b/spif_internal.h index 8571ae9..9e15362 100644 --- a/spif_internal.h +++ b/spif_internal.h @@ -15,15 +15,6 @@ #include "spif_common.h" -#if SPIF_DEBUG == SPIF_DEBUG_DISABLE -#define dprintf(...) -#else -#include -#define dprintf(...) printf(__VA_ARGS__) -#endif - - - /************************************************************************************************************ ************** Public Definitions