diff --git a/boards/opentitan/src/aes_test.rs b/boards/opentitan/src/aes_test.rs index 28303725e0..b7adff25a2 100644 --- a/boards/opentitan/src/aes_test.rs +++ b/boards/opentitan/src/aes_test.rs @@ -2,7 +2,7 @@ //! //! To test ECB mode, add the following line to the opentitan boot sequence: //! ``` -//! aes_test::run_aes128_ecb(); +//! aes_test::run_aes128_ecb(&peripherals.aes); //! ``` //! You should see the following output: //! ``` @@ -13,24 +13,24 @@ //! ``` use capsules::test::aes::TestAes128Ecb; -use earlgrey::aes::{Aes, AES}; +use earlgrey::aes::Aes; use kernel::hil::symmetric_encryption::{AES128, AES128_BLOCK_SIZE, AES128_KEY_SIZE}; use kernel::static_init; -pub unsafe fn run_aes128_ecb() { - let t = static_init_test_ecb(); - AES.set_client(t); +pub unsafe fn run_aes128_ecb(aes: &'static Aes) { + let t = static_init_test_ecb(aes); + aes.set_client(t); t.run(); } -unsafe fn static_init_test_ecb() -> &'static mut TestAes128Ecb<'static, Aes<'static>> { +unsafe fn static_init_test_ecb(aes: &'static Aes) -> &'static TestAes128Ecb<'static, Aes<'static>> { let source = static_init!([u8; 4 * AES128_BLOCK_SIZE], [0; 4 * AES128_BLOCK_SIZE]); let data = static_init!([u8; 6 * AES128_BLOCK_SIZE], [0; 6 * AES128_BLOCK_SIZE]); let key = static_init!([u8; AES128_KEY_SIZE], [0; AES128_KEY_SIZE]); static_init!( TestAes128Ecb<'static, Aes>, - TestAes128Ecb::new(&AES, key, source, data) + TestAes128Ecb::new(aes, key, source, data) ) } diff --git a/boards/opentitan/src/io.rs b/boards/opentitan/src/io.rs index d3701859ce..8c6f502237 100644 --- a/boards/opentitan/src/io.rs +++ b/boards/opentitan/src/io.rs @@ -22,9 +22,13 @@ impl Write for Writer { impl IoWrite for Writer { fn write(&mut self, buf: &[u8]) { - unsafe { - earlgrey::uart::UART0.transmit_sync(buf); - } + // This creates a second instance of the UART peripheral, and should only be used + // during panic. + earlgrey::uart::Uart::new( + earlgrey::uart::UART0_BASE, + earlgrey::chip_config::CONFIG.peripheral_freq, + ) + .transmit_sync(buf); } } @@ -33,9 +37,13 @@ impl IoWrite for Writer { #[no_mangle] #[panic_handler] pub unsafe extern "C" fn panic_fmt(pi: &PanicInfo) -> ! { - // turn off the non panic leds, just in case - let first_led = &mut led::LedLow::new(&mut earlgrey::gpio::PORT[7]); - gpio::Pin::make_output(&earlgrey::gpio::PORT[7]); + let first_led_pin = &mut earlgrey::gpio::GpioPin::new( + earlgrey::gpio::GPIO0_BASE, + earlgrey::gpio::PADCTRL_BASE, + earlgrey::gpio::pins::pin7, + ); + gpio::Pin::make_output(first_led_pin); + let first_led = &mut led::LedLow::new(first_led_pin); let writer = &mut WRITER; diff --git a/boards/opentitan/src/main.rs b/boards/opentitan/src/main.rs index 1ae3b5b4d9..494a96486c 100644 --- a/boards/opentitan/src/main.rs +++ b/boards/opentitan/src/main.rs @@ -10,6 +10,7 @@ use capsules::virtual_alarm::{MuxAlarm, VirtualMuxAlarm}; use capsules::virtual_hmac::VirtualMuxHmac; +use earlgrey::chip::EarlGreyDefaultPeripherals; use kernel::capabilities; use kernel::common::dynamic_deferred_call::{DynamicDeferredCall, DynamicDeferredCallClientState}; use kernel::component::Component; @@ -37,7 +38,10 @@ static mut PROCESSES: [Option<&'static dyn kernel::procs::ProcessType>; 4] = [None, None, None, None]; static mut CHIP: Option< - &'static earlgrey::chip::EarlGrey>, + &'static earlgrey::chip::EarlGrey< + VirtualMuxAlarm<'static, earlgrey::timer::RvTimer>, + EarlGreyDefaultPeripherals, + >, > = None; // How should the kernel respond when a process faults. @@ -102,6 +106,11 @@ pub unsafe fn reset_handler() { // Ibex-specific handler earlgrey::chip::configure_trap_handler(); + let peripherals = static_init!( + EarlGreyDefaultPeripherals, + EarlGreyDefaultPeripherals::new() + ); + // initialize capabilities let process_mgmt_cap = create_capability!(capabilities::ProcessManagementCapability); let memory_allocation_cap = create_capability!(capabilities::MemoryAllocationCapability); @@ -120,14 +129,14 @@ pub unsafe fn reset_handler() { // Configure kernel debug gpios as early as possible kernel::debug::assign_gpios( - Some(&earlgrey::gpio::PORT[7]), // First LED + Some(&peripherals.gpio_port[7]), // First LED None, None, ); // Create a shared UART channel for the console and for kernel debug. let uart_mux = components::console::UartMuxComponent::new( - &earlgrey::uart::UART0, + &peripherals.uart0, earlgrey::uart::UART0_BAUDRATE, dynamic_deferred_caller, ) @@ -138,35 +147,35 @@ pub unsafe fn reset_handler() { let led = components::led::LedsComponent::new(components::led_component_helper!( earlgrey::gpio::GpioPin, ( - &earlgrey::gpio::PORT[8], + &peripherals.gpio_port[8], kernel::hil::gpio::ActivationMode::ActiveHigh ), ( - &earlgrey::gpio::PORT[9], + &peripherals.gpio_port[9], kernel::hil::gpio::ActivationMode::ActiveHigh ), ( - &earlgrey::gpio::PORT[10], + &peripherals.gpio_port[10], kernel::hil::gpio::ActivationMode::ActiveHigh ), ( - &earlgrey::gpio::PORT[11], + &peripherals.gpio_port[11], kernel::hil::gpio::ActivationMode::ActiveHigh ), ( - &earlgrey::gpio::PORT[12], + &peripherals.gpio_port[12], kernel::hil::gpio::ActivationMode::ActiveHigh ), ( - &earlgrey::gpio::PORT[13], + &peripherals.gpio_port[13], kernel::hil::gpio::ActivationMode::ActiveHigh ), ( - &earlgrey::gpio::PORT[14], + &peripherals.gpio_port[14], kernel::hil::gpio::ActivationMode::ActiveHigh ), ( - &earlgrey::gpio::PORT[15], + &peripherals.gpio_port[15], kernel::hil::gpio::ActivationMode::ActiveHigh ) )) @@ -176,28 +185,28 @@ pub unsafe fn reset_handler() { board_kernel, components::gpio_component_helper!( earlgrey::gpio::GpioPin, - 0 => &earlgrey::gpio::PORT[0], - 1 => &earlgrey::gpio::PORT[1], - 2 => &earlgrey::gpio::PORT[2], - 3 => &earlgrey::gpio::PORT[3], - 4 => &earlgrey::gpio::PORT[4], - 5 => &earlgrey::gpio::PORT[5], - 6 => &earlgrey::gpio::PORT[6], - 7 => &earlgrey::gpio::PORT[15] + 0 => &peripherals.gpio_port[0], + 1 => &peripherals.gpio_port[1], + 2 => &peripherals.gpio_port[2], + 3 => &peripherals.gpio_port[3], + 4 => &peripherals.gpio_port[4], + 5 => &peripherals.gpio_port[5], + 6 => &peripherals.gpio_port[6], + 7 => &peripherals.gpio_port[15] ), ) .finalize(components::gpio_component_buf!(earlgrey::gpio::GpioPin)); - let alarm = &earlgrey::timer::TIMER; - alarm.setup(); + let hardware_alarm = static_init!(earlgrey::timer::RvTimer, earlgrey::timer::RvTimer::new()); + hardware_alarm.setup(); // Create a shared virtualization mux layer on top of a single hardware // alarm. let mux_alarm = static_init!( MuxAlarm<'static, earlgrey::timer::RvTimer>, - MuxAlarm::new(alarm) + MuxAlarm::new(hardware_alarm) ); - hil::time::Alarm::set_alarm_client(&earlgrey::timer::TIMER, mux_alarm); + hil::time::Alarm::set_alarm_client(hardware_alarm, mux_alarm); // Alarm let virtual_alarm_user = static_init!( @@ -218,8 +227,11 @@ pub unsafe fn reset_handler() { hil::time::Alarm::set_alarm_client(virtual_alarm_user, alarm); let chip = static_init!( - earlgrey::chip::EarlGrey>, - earlgrey::chip::EarlGrey::new(scheduler_timer_virtual_alarm) + earlgrey::chip::EarlGrey< + VirtualMuxAlarm<'static, earlgrey::timer::RvTimer>, + EarlGreyDefaultPeripherals, + >, + earlgrey::chip::EarlGrey::new(scheduler_timer_virtual_alarm, peripherals, hardware_alarm) ); scheduler_timer_virtual_alarm.set_alarm_client(chip.scheduler_timer()); CHIP = Some(chip); @@ -242,7 +254,7 @@ pub unsafe fn reset_handler() { let hmac_data_buffer = static_init!([u8; 64], [0; 64]); let hmac_dest_buffer = static_init!([u8; 32], [0; 32]); - let mux_hmac = components::hmac::HmacMuxComponent::new(&earlgrey::hmac::HMAC).finalize( + let mux_hmac = components::hmac::HmacMuxComponent::new(&peripherals.hmac).finalize( components::hmac_mux_component_helper!(lowrisc::hmac::Hmac, [u8; 32]), ); @@ -260,13 +272,13 @@ pub unsafe fn reset_handler() { let i2c_master = static_init!( capsules::i2c_master::I2CMasterDriver>, capsules::i2c_master::I2CMasterDriver::new( - &earlgrey::i2c::I2C, + &peripherals.i2c, &mut capsules::i2c_master::BUF, board_kernel.create_grant(&memory_allocation_cap) ) ); - earlgrey::i2c::I2C.set_master_client(i2c_master); + peripherals.i2c.set_master_client(i2c_master); // USB support is currently broken in the OpenTitan hardware // See https://github.com/lowRISC/opentitan/issues/2598 for more details @@ -283,7 +295,7 @@ pub unsafe fn reset_handler() { // Flash let nonvolatile_storage = components::nonvolatile_storage::NonvolatileStorageComponent::new( board_kernel, - &earlgrey::flash_ctrl::FLASH_CTRL, + &peripherals.flash_ctrl, 0x20000000, // Start address for userspace accessible region 0x8000, // Length of userspace accessible region &_sstorage as *const u8 as usize, // Start address of kernel region diff --git a/boards/opentitan/src/usb.rs b/boards/opentitan/src/usb.rs index 2ee2a847b5..91461ebbb1 100644 --- a/boards/opentitan/src/usb.rs +++ b/boards/opentitan/src/usb.rs @@ -11,6 +11,7 @@ #![allow(dead_code)] // Components are intended to be conditionally included +use earlgrey::usbdev::Usb; use kernel::capabilities; use kernel::component::Component; use kernel::create_capability; @@ -18,11 +19,12 @@ use kernel::static_init; pub struct UsbComponent { board_kernel: &'static kernel::Kernel, + usb: &'static Usb<'static>, } impl UsbComponent { - pub fn new(board_kernel: &'static kernel::Kernel) -> UsbComponent { - UsbComponent { board_kernel } + pub fn new(usb: &'static Usb, board_kernel: &'static kernel::Kernel) -> Self { + Self { usb, board_kernel } } } @@ -40,7 +42,7 @@ impl Component for UsbComponent { let usb_client = static_init!( capsules::usb::usbc_client::Client<'static, lowrisc::usbdev::Usb<'static>>, capsules::usb::usbc_client::Client::new( - &earlgrey::usbdev::USB, + self.usb, capsules::usb::usbc_client::MAX_CTRL_PACKET_SIZE_EARLGREY ) ); diff --git a/chips/earlgrey/src/aes.rs b/chips/earlgrey/src/aes.rs index 36e57820b3..601d15ff80 100644 --- a/chips/earlgrey/src/aes.rs +++ b/chips/earlgrey/src/aes.rs @@ -80,7 +80,7 @@ pub struct Aes<'a> { } impl<'a> Aes<'a> { - const fn new() -> Aes<'a> { + pub const fn new() -> Aes<'a> { Aes { registers: AES_BASE, client: OptionalCell::empty(), @@ -341,8 +341,6 @@ impl<'a> hil::symmetric_encryption::AES128<'a> for Aes<'a> { } } -pub static mut AES: Aes<'static> = Aes::new(); - impl kernel::hil::symmetric_encryption::AES128ECB for Aes<'_> { fn set_mode_aes128ecb(&self, encrypting: bool) { self.configure(encrypting); diff --git a/chips/earlgrey/src/chip.rs b/chips/earlgrey/src/chip.rs index 82f45e49c6..29aafe7b1d 100644 --- a/chips/earlgrey/src/chip.rs +++ b/chips/earlgrey/src/chip.rs @@ -5,36 +5,95 @@ use core::hint::unreachable_unchecked; use kernel; use kernel::debug; use kernel::hil::time::Alarm; -use kernel::Chip; +use kernel::{Chip, InterruptService}; use rv32i::csr::{mcause, mie::mie, mip::mip, mtvec::mtvec, CSR}; use rv32i::syscall::SysCall; use rv32i::PMPConfigMacro; use crate::chip_config::CONFIG; -use crate::flash_ctrl; -use crate::gpio; -use crate::hmac; use crate::interrupts; use crate::plic; -use crate::pwrmgr; -use crate::timer; -use crate::uart; -use crate::usbdev; PMPConfigMacro!(4); -pub struct EarlGrey> { +pub struct EarlGrey<'a, A: 'static + Alarm<'static>, I: InterruptService<()> + 'a> { userspace_kernel_boundary: SysCall, pmp: PMP, scheduler_timer: kernel::VirtualSchedulerTimer, + timer: &'static crate::timer::RvTimer<'static>, + pwrmgr: lowrisc::pwrmgr::PwrMgr, + plic_interrupt_service: &'a I, } -impl> EarlGrey { - pub unsafe fn new(alarm: &'static A) -> Self { +pub struct EarlGreyDefaultPeripherals<'a> { + pub aes: crate::aes::Aes<'a>, + pub hmac: lowrisc::hmac::Hmac<'a>, + pub usb: lowrisc::usbdev::Usb<'a>, + pub uart0: lowrisc::uart::Uart<'a>, + pub gpio_port: crate::gpio::Port<'a>, + pub i2c: lowrisc::i2c::I2c<'a>, + pub flash_ctrl: lowrisc::flash_ctrl::FlashCtrl<'a>, +} + +impl<'a> EarlGreyDefaultPeripherals<'a> { + pub fn new() -> Self { + Self { + aes: crate::aes::Aes::new(), + hmac: lowrisc::hmac::Hmac::new(crate::hmac::HMAC0_BASE), + usb: lowrisc::usbdev::Usb::new(crate::usbdev::USB0_BASE), + uart0: lowrisc::uart::Uart::new(crate::uart::UART0_BASE, CONFIG.peripheral_freq), + gpio_port: crate::gpio::Port::new(), + i2c: lowrisc::i2c::I2c::new(crate::i2c::I2C_BASE, (1 / CONFIG.cpu_freq) * 1000 * 1000), + flash_ctrl: lowrisc::flash_ctrl::FlashCtrl::new( + crate::flash_ctrl::FLASH_CTRL_BASE, + lowrisc::flash_ctrl::FlashRegion::REGION0, + ), + } + } +} + +impl<'a> InterruptService<()> for EarlGreyDefaultPeripherals<'a> { + unsafe fn service_interrupt(&self, interrupt: u32) -> bool { + match interrupt { + interrupts::UART_TX_WATERMARK..=interrupts::UART_RX_PARITY_ERR => { + self.uart0.handle_interrupt(); + } + int_pin @ interrupts::GPIO_PIN0..=interrupts::GPIO_PIN31 => { + let pin = &self.gpio_port[(int_pin - interrupts::GPIO_PIN0) as usize]; + pin.handle_interrupt(); + } + interrupts::HMAC_HMAC_DONE..=interrupts::HMAC_HMAC_ERR => { + self.hmac.handle_interrupt(); + } + interrupts::USBDEV_PKT_RECEIVED..=interrupts::USBDEV_CONNECTED => { + self.usb.handle_interrupt(); + } + interrupts::FLASH_PROG_EMPTY..=interrupts::FLASH_OP_ERROR => { + self.flash_ctrl.handle_interrupt() + } + _ => return false, + } + true + } + + unsafe fn service_deferred_call(&self, _: ()) -> bool { + false + } +} + +impl<'a, A: 'static + Alarm<'static>, I: InterruptService<()> + 'a> EarlGrey<'a, A, I> { + pub unsafe fn new( + virtual_alarm: &'static A, + plic_interrupt_service: &'a I, + timer: &'static crate::timer::RvTimer, + ) -> Self { Self { userspace_kernel_boundary: SysCall::new(), pmp: PMP::new(), - scheduler_timer: kernel::VirtualSchedulerTimer::new(alarm), + scheduler_timer: kernel::VirtualSchedulerTimer::new(virtual_alarm), + pwrmgr: lowrisc::pwrmgr::PwrMgr::new(crate::pwrmgr::PWRMGR_BASE), + timer, + plic_interrupt_service, } } @@ -46,32 +105,11 @@ impl> EarlGrey { unsafe fn handle_plic_interrupts(&self) { while let Some(interrupt) = plic::next_pending() { - match interrupt { - interrupts::UART_TX_WATERMARK..=interrupts::UART_RX_PARITY_ERR => { - uart::UART0.handle_interrupt() - } - int_pin @ interrupts::GPIO_PIN0..=interrupts::GPIO_PIN31 => { - let pin = &gpio::PORT[(int_pin - interrupts::GPIO_PIN0) as usize]; - pin.handle_interrupt(); - } - interrupts::HMAC_HMAC_DONE..=interrupts::HMAC_HMAC_ERR => { - hmac::HMAC.handle_interrupt() - } - interrupts::USBDEV_PKT_RECEIVED..=interrupts::USBDEV_CONNECTED => { - usbdev::USB.handle_interrupt() - } - interrupts::PWRMGRWAKEUP => { - pwrmgr::PWRMGR.handle_interrupt(); - self.check_until_true_or_interrupt( - || pwrmgr::PWRMGR.check_clock_propagation(), - None, - ); - } - interrupts::FLASH_PROG_EMPTY..=interrupts::FLASH_OP_ERROR => { - flash_ctrl::FLASH_CTRL.handle_interrupt() - } - - _ => debug!("Pidx {:#x}", interrupt), + if interrupt == interrupts::PWRMGRWAKEUP { + self.pwrmgr.handle_interrupt(); + self.check_until_true_or_interrupt(|| self.pwrmgr.check_clock_propagation(), None); + } else if !self.plic_interrupt_service.service_interrupt(interrupt) { + debug!("Pidx {}", interrupt); } plic::complete(interrupt); } @@ -111,7 +149,9 @@ impl> EarlGrey { } } -impl> kernel::Chip for EarlGrey { +impl<'a, A: 'static + Alarm<'static>, I: InterruptService<()> + 'a> kernel::Chip + for EarlGrey<'a, A, I> +{ type MPU = PMP; type UserspaceKernelBoundary = SysCall; type SchedulerTimer = kernel::VirtualSchedulerTimer; @@ -138,9 +178,7 @@ impl> kernel::Chip for EarlGrey { let mip = CSR.mip.extract(); if mip.is_set(mip::mtimer) { - unsafe { - timer::TIMER.service_interrupt(); - } + self.timer.service_interrupt(); } if mip.is_set(mip::mext) { unsafe { @@ -165,8 +203,8 @@ impl> kernel::Chip for EarlGrey { fn sleep(&self) { unsafe { - pwrmgr::PWRMGR.enable_low_power(); - self.check_until_true_or_interrupt(|| pwrmgr::PWRMGR.check_clock_propagation(), None); + self.pwrmgr.enable_low_power(); + self.check_until_true_or_interrupt(|| self.pwrmgr.check_clock_propagation(), None); rv32i::support::wfi(); } } diff --git a/chips/earlgrey/src/flash_ctrl.rs b/chips/earlgrey/src/flash_ctrl.rs index 343812463e..cab5e73673 100644 --- a/chips/earlgrey/src/flash_ctrl.rs +++ b/chips/earlgrey/src/flash_ctrl.rs @@ -1,7 +1,5 @@ use kernel::common::StaticRef; -use lowrisc::flash_ctrl::{FlashCtrl, FlashCtrlRegisters, FlashRegion}; +use lowrisc::flash_ctrl::FlashCtrlRegisters; -pub static mut FLASH_CTRL: FlashCtrl = FlashCtrl::new(FLASH_CTRL_BASE, FlashRegion::REGION0); - -const FLASH_CTRL_BASE: StaticRef = +pub const FLASH_CTRL_BASE: StaticRef = unsafe { StaticRef::new(0x4003_0000 as *const FlashCtrlRegisters) }; diff --git a/chips/earlgrey/src/gpio.rs b/chips/earlgrey/src/gpio.rs index 6de567f641..08faef33e5 100644 --- a/chips/earlgrey/src/gpio.rs +++ b/chips/earlgrey/src/gpio.rs @@ -3,20 +3,61 @@ use core::ops::{Index, IndexMut}; use kernel::common::StaticRef; -pub use lowrisc::gpio::GpioPin; -use lowrisc::gpio::{pins, GpioRegisters}; +use lowrisc::gpio::GpioRegisters; +pub use lowrisc::gpio::{pins, GpioPin}; use lowrisc::padctrl::PadCtrlRegisters; -const PADCTRL_BASE: StaticRef = +pub const PADCTRL_BASE: StaticRef = unsafe { StaticRef::new(0x4016_0000 as *const PadCtrlRegisters) }; -const GPIO0_BASE: StaticRef = +pub const GPIO0_BASE: StaticRef = unsafe { StaticRef::new(0x4001_0000 as *const GpioRegisters) }; pub struct Port<'a> { pins: [GpioPin<'a>; 32], } +impl<'a> Port<'a> { + pub const fn new() -> Self { + Self { + pins: [ + GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin0), + GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin1), + GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin2), + GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin3), + GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin4), + GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin5), + GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin6), + GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin7), + GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin8), + GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin9), + GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin10), + GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin11), + GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin12), + GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin13), + GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin14), + GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin15), + GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin16), + GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin17), + GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin18), + GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin19), + GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin20), + GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin21), + GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin22), + GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin23), + GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin24), + GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin25), + GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin26), + GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin27), + GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin28), + GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin29), + GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin30), + GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin31), + ], + } + } +} + impl<'a> Index for Port<'a> { type Output = GpioPin<'a>; @@ -30,40 +71,3 @@ impl<'a> IndexMut for Port<'a> { &mut self.pins[index] } } - -pub static mut PORT: Port = Port { - pins: [ - GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin0), - GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin1), - GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin2), - GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin3), - GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin4), - GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin5), - GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin6), - GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin7), - GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin8), - GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin9), - GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin10), - GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin11), - GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin12), - GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin13), - GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin14), - GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin15), - GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin16), - GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin17), - GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin18), - GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin19), - GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin20), - GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin21), - GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin22), - GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin23), - GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin24), - GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin25), - GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin26), - GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin27), - GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin28), - GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin29), - GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin30), - GpioPin::new(GPIO0_BASE, PADCTRL_BASE, pins::pin31), - ], -}; diff --git a/chips/earlgrey/src/hmac.rs b/chips/earlgrey/src/hmac.rs index abd5315c1f..af39758bf9 100644 --- a/chips/earlgrey/src/hmac.rs +++ b/chips/earlgrey/src/hmac.rs @@ -1,7 +1,5 @@ use kernel::common::StaticRef; -use lowrisc::hmac::{Hmac, HmacRegisters}; +use lowrisc::hmac::HmacRegisters; -pub static mut HMAC: Hmac = Hmac::new(HMAC0_BASE); - -const HMAC0_BASE: StaticRef = +pub const HMAC0_BASE: StaticRef = unsafe { StaticRef::new(0x4012_0000 as *const HmacRegisters) }; diff --git a/chips/earlgrey/src/i2c.rs b/chips/earlgrey/src/i2c.rs index 5e9842a22f..119c24ff21 100644 --- a/chips/earlgrey/src/i2c.rs +++ b/chips/earlgrey/src/i2c.rs @@ -1,9 +1,6 @@ -use crate::chip_config::CONFIG; use kernel::common::StaticRef; -use lowrisc::i2c::{I2c, I2cRegisters}; - -pub static mut I2C: I2c = I2c::new(I2C_BASE, (1 / CONFIG.cpu_freq) * 1000 * 1000); +use lowrisc::i2c::I2cRegisters; // This is a placeholder address as the I2C MMIO interface isn't avaliable yet -const I2C_BASE: StaticRef = +pub const I2C_BASE: StaticRef = unsafe { StaticRef::new(0x4005_0000 as *const I2cRegisters) }; diff --git a/chips/earlgrey/src/lib.rs b/chips/earlgrey/src/lib.rs index 7d8a0075b7..eea17b53a2 100644 --- a/chips/earlgrey/src/lib.rs +++ b/chips/earlgrey/src/lib.rs @@ -5,7 +5,7 @@ #![crate_name = "earlgrey"] #![crate_type = "rlib"] -mod chip_config; +pub mod chip_config; mod interrupts; pub mod aes; diff --git a/chips/earlgrey/src/pwrmgr.rs b/chips/earlgrey/src/pwrmgr.rs index 71a3e35119..39cb0e8568 100644 --- a/chips/earlgrey/src/pwrmgr.rs +++ b/chips/earlgrey/src/pwrmgr.rs @@ -1,7 +1,5 @@ use kernel::common::StaticRef; -use lowrisc::pwrmgr::{PwrMgr, PwrMgrRegisters}; +use lowrisc::pwrmgr::PwrMgrRegisters; -pub static mut PWRMGR: PwrMgr = PwrMgr::new(PWRMGR_BASE); - -const PWRMGR_BASE: StaticRef = +pub(crate) const PWRMGR_BASE: StaticRef = unsafe { StaticRef::new(0x400A_0000 as *const PwrMgrRegisters) }; diff --git a/chips/earlgrey/src/timer.rs b/chips/earlgrey/src/timer.rs index ed1234557a..99bce0cfb7 100644 --- a/chips/earlgrey/src/timer.rs +++ b/chips/earlgrey/src/timer.rs @@ -60,9 +60,9 @@ pub struct RvTimer<'a> { } impl<'a> RvTimer<'a> { - const fn new(base: StaticRef) -> RvTimer<'a> { + pub const fn new() -> RvTimer<'a> { RvTimer { - registers: base, + registers: TIMER_BASE, alarm_client: OptionalCell::empty(), overflow_client: OptionalCell::empty(), } @@ -194,5 +194,3 @@ impl<'a> time::Alarm<'a> for RvTimer<'a> { const TIMER_BASE: StaticRef = unsafe { StaticRef::new(0x4008_0000 as *const TimerRegisters) }; - -pub static mut TIMER: RvTimer = RvTimer::new(TIMER_BASE); diff --git a/chips/earlgrey/src/uart.rs b/chips/earlgrey/src/uart.rs index 63d9b72005..f5097eb4e9 100644 --- a/chips/earlgrey/src/uart.rs +++ b/chips/earlgrey/src/uart.rs @@ -1,10 +1,10 @@ -use crate::chip_config::CONFIG; use kernel::common::StaticRef; -use lowrisc::uart::{Uart, UartRegisters}; +pub use lowrisc::uart::Uart; +use lowrisc::uart::UartRegisters; -pub const UART0_BAUDRATE: u32 = CONFIG.uart_baudrate; +use crate::chip_config::CONFIG; -pub static mut UART0: Uart = Uart::new(UART0_BASE, CONFIG.peripheral_freq); +pub const UART0_BAUDRATE: u32 = CONFIG.uart_baudrate; -const UART0_BASE: StaticRef = +pub const UART0_BASE: StaticRef = unsafe { StaticRef::new(0x4000_0000 as *const UartRegisters) }; diff --git a/chips/earlgrey/src/usbdev.rs b/chips/earlgrey/src/usbdev.rs index 29508b1f35..62fd231926 100644 --- a/chips/earlgrey/src/usbdev.rs +++ b/chips/earlgrey/src/usbdev.rs @@ -1,7 +1,6 @@ use kernel::common::StaticRef; -use lowrisc::usbdev::{Usb, UsbRegisters}; +pub use lowrisc::usbdev::Usb; +use lowrisc::usbdev::UsbRegisters; -pub static mut USB: Usb = Usb::new(USB0_BASE); - -const USB0_BASE: StaticRef = +pub const USB0_BASE: StaticRef = unsafe { StaticRef::new(0x4015_0000 as *const UsbRegisters) };