2023-03-20-DSLogic-U3Pro16-Teardown.md

layout	title	date	categories
post	DSLogic U3Pro16 Review and Teardown	2023-03-20 00:00:00 -1000

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Introduction

The year was 2020, and offices all over the world shut down. A house remodel had just started, so my work area moved from a comfortably airconditioned corporate building to a very messy garage.

Since I'm in the business of developing, and debugging, hardware, a few pieces of work equipment came along for the ride, including a Saleae Logic Pro 16. There's no way around it: they make some of the best USB logic analyzers. Plenty of competitors have matched or surpassed their digital features, but none have the ability to record the 16 channels in analog format as well.

While I had the Saleae for work stuff, I may once in a while also have used it for some hobby-related activities.

But eventually corporate offices reopened, the Saleae went back to its original habitat, and I found myself without a good 16-channel USB logic analyzer. Buying a Saleae for myself was out of the question: even after the $150 hobbyist discount, I can't justify the $1350 price tag.

After looking around for a while, I decided to give the DSLogic U3Pro16 from DreamSourceLab a chance. I bought it on Amazon for $299.

(Click to enlarge)

In this blog post, I'll look at some of the features, my experience with the software, and I'll also open it up to discover what's inside.

The DSLogic U3Pro16

DreamSourceLab currently sells 3 logic analyzers:

• the $149 DSLogic Plus (16 channels)
• the $299 DSLogic U3Pro16 (16 channels)
• the $399 DSLogic U3Pro32 (32 channels)

The only functional difference between the U3Pro16 and U3Pro32 is the number of channels; they're otherwise identical. It's tempting to go for the 32 channel version but I've rarely had the need to record more than 16 channels and if I really need it, I can always fall back to my HP 1670G logic analyzer, a pristine $200 flea market treasure with a whopping 136 channels. It even has the digital storage scope option with 2 analog channels, 500MHz bandwidth and 2GSa/s sampling rate.

The DSLogic Plus also has 16 channels, but its acquisition memory is only 256Mbits vs 2Gbits for the U3Pro16, and it has to make do with USB 2.0 instead of a USB 3.0 interface, a crucial difference when streaming acquistion data straight to the PC to avoid the limitations of the acquistion memory. There's also a difference in sample rate, 400MHz for the Plus, 1GHz for the U3Pro16, but that's not very important in practice.

In the Box

The DSLogic comes with a nice, elongated hard case.

Inside, you'll find:

• the device itself, a slick aluminum case
• a USB-C to USB-A cable
• 5 4-way probe cables and 1 3-way clock and trigger cable
• 18 test clips

Probe Cables and Clips

You read it right, my device came with 5 4-way probe cables, not 4. I don't know if DreamSourceLab added one extra in case you lose one, or if they mistakenly included one too much, but it's definitely good to have a spare.

The cables are quite stiff and are not as pliable as those that comes with a Saleae. The case has been designed such that the probe cables can be stored without the need to bend them. I like it.

The quality of the test clips is not great, but they are no different than those of the 5 times more expensive Saleae Logic 16 Pro. They're clones of the HP/Agilent logic analyzer grabbers that I got from eBay and will do the job, but I much prefer the ones from Tektronix.

From left to right: Tektronix, Agilent, Saleae, and DSLogic clips

Compared to the other ones, the Tektronix probes are narrow which makes it easier to place multiple ones next to each other one fine-pitch pin arrays.

If you're thinking about upgrading your current probes: stay away from fakes. As I write this, you can find packs of 20 probes on eBay for $40 (incl shipping), so around $2 per probe. Search for "Tektronix SMG50" or "Tektronix 020-1386-01".

Meanwhile, you can buy a pack of 12 fake ones on Amazon for $16, or $1.3 a piece. They work, but they aren't any better than the probes that come standard with the DSLogic:

Fake probe on the left, Tek probe on the right

The stem of the fake ones is much thicker, and the hooks are different too.

The Tek probe has rounded hooks:

The hooks of a fake probe are flat, and don't attach as well to their target:

If you need to probe targets with a pitch that is smaller than 1.25mm, you should check out these micro clips that I reviewed ages ago.

The Controller Hardware

Each cable supports 4 probes and plugs into the main unit with 8 0.05" pins in 4x2 configuration. The cable itself has a tiny PCB sticking out that slots into a gap of the aluminum enclosure. This way it's not possible to plug in the cable incorectly... unlike the Saleae. It's great.

When we open up the device, we can see Infieon (formerly Cypress) CYUSB3014-BZX EZ-USB FX3 SuperSpeed controller. A Saleae Logic Pro uses the same device.

These are your standard to-go-to USB interface devices when you need a microcontroller in addition to the core USB functionatility. They're relatively cheap too, you can get them for $14 in single digital quantities at LCSC.com.

The other size of the PCB is much busier.

(Click to enlarge)

The big ticket components are:

• a Spartan-6 XC6SLX16 FPGA

  Reponsible data acquisition, triggering, run-length encoding/compression, data storage to DRAM, and sending data to the CYUSB-3014.

  A Saleae Logic 16 Pro has a smaller Spartan-6 LX9. That makes sense: it's triggering options aren't as advanced as the DSLogic and since it doesn't have DDR memory, it doesn't need a memory controller on the FPGA.

• a DDR3-1600 DRAM

  It's a Micron MT41K128M16JT-125 with 2Gbits of storage and a 16-bit data bus.

• an Analog Devices ADF4360-7 clock generator

  I found this a bit surprising. A Spartan-6 LX16 FPGA has 2 clock managment tiles (CMT) that each have 1 real PLL and 2 DCMs (digital clock manager) with delay locked loop, digital frequency synthesizer, etc. The VCO of the PLL can be configured with a frequency up to 1080 MHz which should be sufficient to capture signals at 1GHz, but clearly there was a need for something more or better.

  The ADF4360-7 can generate an output clock as fast a 1800MHz.

There's obviously an extensive supporting cast:

• a Macronix MX25R2035F serial flash

  This is used to configure the FPGA.

• anSGM2054 DDR termination voltage controller

• an LM26480 FPGA power regulator

• two clock oscillators: 24MHz and 19.2MHz

• a TI HD3SS3220 USB-C Mux

• a SP3010-04UTG for USB ESD protection

  Marked QH4

Two 5x2 pin connectors J7 and J8 on the right size of the PCB are almost certainly used to connect programming and debugging cables to the FPGA and the CYUSB-3014.

(Click to enlarge)

The Input Circuit

I spent a bit of time Ohm-ing out the input circuit. Here's what I came up with:

The cable itself has a 100k Ohm series resistor and a 100k Ohm shunt resistor to ground at the entrance of the PCB that act as by-two resistive divider. The series resistor also limits the current going into the device.

Before going to a second 33 Ohm series resistor that goes into the FPGA, there's an ESD protection device. I'm not 100% sure, but my guess is that it's a SRV05-4D-TP or some variant thereof.

I'm not 100% sure why the 33 Ohm resistor is there. It's common to have these type of resistors on high speed lines to avoid reflection, but since there's already a 100k resistor in the path, I don't think that makes much sense here. It might be there for additional protection of the ESD structure that resides inside the FPGA IOs?

A DSLogic has a fully programmable input threshold voltage. If that's the case, then where's the opamp to compare the input voltage against this threshold voltage. (There is such a comparator on a Saleae Logic Pro!)

The answer to that question is: "it's in the FPGA!"

FPGA IOs can support many different I/O standards: single-ended ones, think CMOS and TTL, and a whole bunch of differential standards too. Differential protocols compare a positive and a negative version of the same signal, but nothing prevents anyone from assigning a static value to the negative input of a differential pair and making the input circuit behave as a regular single-end pair with programmable threshold. Like this:

There is plenty of literature out there about using the LVDS comparator in single-ended mode. It's even possible to create pretty fast analog-digital convertors this way, but that's outside the scope of this blog post.

Impact of Input Circuit on Circuit Under Test

6 years ago, OpenTechLab reviewed the DSLogic Plus, the successor of the DSLogic U3Pro16. Joel spent a lot of time looking at its input circuit. He mentions a 7.6k Ohm pull-down resistor at the input, different than the 100k Ohm that I measured. There's no mention of a series resistor in the cable or about the way adjustable thresholds are handled, but I think that the DSLogic Pro has a simular input circuit.

His review continues with an in-depth analysis of how measuring a signal can impact the signal itself, he even builds a simulation model of the whole system, and does a real-world comparison between a DSLogic measurement and a fake-Saleae one.

While his measurements are convincing, I wasn't able to repeat his results on a similar setup with a DSLogic U3Pro and a Saleae Logic Pro: for both cases, a 200MHz signal was still good enough. I need to spend a bit more time to better understand the difference between my and his setup...

Either way, I recommend watching this video.

Additional IOs: External Clock, Trigger In, Trigger Out

In addition to the 16 input pins that are used to record data, the DSLogic has 3 special IOs and a seperate 3-wire cable to wire them up. They are marked with the character "OIC" above the connector, which stands for Output, Input, Clock.

• Clock

  Instead of using a free-running internal clock, the 16 input signals can be sampled with an external sampling clock.

  This corresponds to a mode that's called "state clocking" in big-iron Tektronix and HP/Agilent/Keysight logic analyzers.

  Using an external clock that is the same as the one that is used to generate the signals that you want to record is a major benefit: you will always record the signal at the right time as long as setup and hold requirements are met. When using a free-running internal sampling clock, you must use a sample rate that is a factor of 2 or more higher to get an accurate representation of what's going on in the system.

  The DSLogic U16Pro provides the option to sample the data signals at the positive or negative edge of the external clock. On one hand, I would have prefered more options in moving the edge of the clock back and forth. It's something that should be doable with the DLLs that are part of the DCMs blocks of a Spartan-6. But on the other, external clocking is not supported at all by Saleae analyzers.

  The maximum clock speed of the external clock input is 50MHz, significantly lower than the free-running sample speed. This is the usually the case as well for big iron logic analyzers. For example, my old Agilent 1670G has a free running sampling speed of 500MHz and a maxumim state clock speed of 150MHz.

• Trigger In

  According to the manuals: "TI is the input for an external trigger signal". That's a great feature, but I couldn't figure out a way in DSView on how to enable it. After a bit of googling, I found the following comment in issue on GitHub:

  This "TI" signal has no function now. It's reserved for compatible and further extension.

  This comment is dated July 29, 2018. A closer look at the U3Pro16 datasheets shows the description of the "TI" input as "Reserved"...

• Trigger Out

  When a trigger is activated inside the U3Pro, a pulse is generated on this pin.

  The manual doesn't give more details, but after futzing around with the horrible oscilloscope UI of my 1670G, I was able to capture a 500ms trigger out pulse of 1.8V.

Software: From Saleae Logic to PulseView to DSView

When Saleae first came to market, they raised the bar for logic analyzer software with Logic, which had a GUI that allowed scrolling and zooming in and out of waveforms at blazing speed. Logic also added a few protocol decoders, and an C++ API to create your own decoders.

It was the inspiration of PulseView, an open source equivalent that acts as the front-end application of SigRok, an open source library and tool that acts as the waveform acquisition backend.

PulseView supports protocol decoders as well, but it has an easier to use Python API, and it allows stacked protocol decoders: a low-level decoder might convert the recorded signals into, say, I2C transactions. A higher level I2C EPROM decoder could then decode these I2C into read and write operations. PulseView has tons of protocol decoders, from simple UART transactions, all the way to USB 2.0 decoders.

When the DSLogic logic analyzer hit the market after a successful Kickstarter campaign, it shipped with DSView, DreamSourceLab's closed source waveform viewer. However, people soon discovered that it was a reskinned version of PulseView. A big no-no since the latter is developed under a GPL3 license.

After a bit of drama, DreamSourceLab made DSView available on GitHub under the required GPL3 as well, with attribution to the sigrok project. DSView is a hard fork of PulseView and there are still some bad feelings because DreamSourceLab doesn't push changes to the PulseView project, but at least they've legally in the clear for the past 6 years.

The default choice would be to use DSView to control your DSLogic, but Sigrok/PulseView supports DSView as well.

In the figure below, you can see DSView in demo mode, no hardware device connected, and the example of the 3 stacked protocol described earlier:

(Click to enlarge)

For this review, I'll be using DSView.

Saleae has since upgrade Logic to Logic2, and now also supports stacked protocol decoders. It still uses a C++ API though. You can find an example decoder here.

Installing DSView on a Linux Machine

DreamSourceLab provides Windows and MacOS binaries for DSView, but not for Linux. When you click the Download button for Linux, it returns a tar file with the source code, which you're expected to compile yourself!

I wasn't looking forward to running into the usual issues with package dependencies and build failures, but after following the instructions in the INSTALL file, I ended up with a working executable on first try.

DSView UI

The UI of DSView is straightforward and similar to Saleae Logic 2. There are things that annoy me in both tools but I don't have a strong preference.

DSView can pan and zoom in or out just as fast as Logic 2.

You really should try DSView with a Demo Device. It will give you a good feel about what you can do. The stacked protocol decoders area amazing. You can export decoded protocols as CSV files, but only one protocol at a time. It would be nice if you can export multiple protocols in the same CSV file so that you can easier compare transaction flow between interfaces.

Triggers

One of the biggest benefit of the DSLogic over a Saleae is their trigger capability. Saleae Logic 2.4.13 offers the following options:

You can set a rising edge, falling edge, a high or a low level on 1 signal, and in combination with some static values on other signals, and that's it. There's not even a rising-or-falling edge option. It's frankly a bit embarrasing. When you have a full FPGA at your disposal, triggering functionality is not hard to implement.

Meanwhile, even in Simple Trigger mode, the DSLogic can trigger on multiple edges at the same time, something that can be useful when using an external sampling clock.

But the DSLogic really shines when enabling the Advanced Trigger option.

In Stage Trigger mode, you can create state sequences that are up to 16 phases long, with 2 16-bit comparisons and a counter per stage.

Alternatively, Serial Trigger mode is a powerful enough to capture protocols like I2C, as shown below, where a start flag is triggered by a falling edge of SDA when SCL is high, a stop flag by a rising edge of SDA when SCL is high, and data bits are captured on the rising edge of SCL:

You don't always need powerful trigger options, but they're great to have when you do.

References

Reviews

• Logic Analyzer Shopping

  Comparison between Saleae Logic Pro 16, Innomaker LA2016, Innomaker LA5016, DSLogic Plus, and DSLogic U3Pro16

LVDS comparator

• Can I use differential I/O pins of FPGA as high speed comparator?

• Logic analyzer with Kintex-7

• FPGA ADC design

• LVDS inputs on Cyclone II

  Comments by Xilinx engineer about the design of Spartan 3 LVDS comparator

• APP NOTE: make an analog to digital converter using FPGA pins

• TAKING ADVANTAGE OF LVDS INPUT BUFFERS TO IMPLEMENT SIGMA-DELTA A/D CONVERTERS IN FPGAS

• A 7.4-Bit ENOB 600 MS/s FPGA-Based Online Calibrated Slope ADC without External Components

• An FPGA-based 7-ENOB 600 MSample/s ADC without any External Components

• 200 MS/s ADC implemented in a FPGA employing TDCs