Multi-platform embedded deep learning framework (多平台高性能嵌入式深度学习框架)
#120 opened about 1 year ago by Xreki
C++
Updated Apr 30, 2019
An open source ecosystem for IoT development 👽 Cross-platform IDE and unified debugger. Remote unit testing and firmw…
#147 opened about 4 years ago by ivankravets
5
Python
Updated May 4, 2019
GPGPU microprocessor architecture
#88 opened almost 2 years ago by jbush001
1
C
Updated May 4, 2019
CAES Language for Synchronous Hardware
Haskell
Updated May 3, 2019
❄️ Visual editor for open FPGA boards
JavaScript
Updated Apr 25, 2019
A FPGA friendly 32 bit RISC-V CPU implementation
Assembly
Updated May 1, 2019
An OpenCL-based FPGA Accelerator for Convolutional Neural Networks
C++
Updated Mar 11, 2019
Ariane is a 6-stage RISC-V CPU capable of booting Linux
SystemVerilog
Updated May 1, 2019
PlatformIO IDE for Atom: The next generation integrated development environment for IoT
JavaScript
Updated Dec 12, 2018
Scots Army Knife for electronics
Python
Updated May 4, 2019
The USRP™ Hardware Driver Repository
C++
Updated Apr 30, 2019
collection of works aiming at reducing model sizes or the ASIC/FPGA accelerator for machine learning
Updated Apr 11, 2019
HDL libraries and projects
Verilog
Updated May 3, 2019
A small, light weight, RISC CPU soft core
Verilog
Updated Apr 1, 2019
SpinalHDL core
Scala
Updated May 3, 2019
FuseSoC is a package manager and a set of build tools for FPGA/ASIC development
#201 opened about 1 year ago by olofk
good first bug
enhancement
#155 opened almost 2 years ago by olofk
good first bug
enhancement
#152 opened almost 2 years ago by olofk
Python
Updated Apr 14, 2019
VUnit is a unit testing framework for VHDL/SystemVerilog
good first issue
enhancement
#307 opened over 1 year ago by alinaivanovaoff
8
VHDL
Updated Apr 30, 2019
Documenting the Xilinx 7-series bit-stream format.
#521 opened 4 months ago by kgugala
good first issue
enhancement
#483 opened 4 months ago by mcmasterg
good first issue
help wanted
#10 opened over 1 year ago by mithro
Python
Updated May 4, 2019
A Just-In-Time Compiler for Verilog from VMware Research
C++
Updated Apr 27, 2019
PlatformIO IDE for VSCode: The next generation integrated development environment for IoT
JavaScript
Updated Apr 22, 2019
IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Com…
VHDL
Updated Apr 13, 2019
🌟 IceZUM Alhambra: an Arduino-like Open FPGA electronic board
Verilog
Updated Feb 3, 2018
Verilog to Routing -- Open Source CAD Flow for FPGA Research
#545 opened 8 days ago by kmurray
#531 opened 26 days ago by kmurray
1
Good First Issue
docs
enhancement
#388 opened 8 months ago by mithro
C
Updated May 3, 2019
Generic system-wide modern C++ for heterogeneous platforms with SYCL from Khronos Group
#110 opened over 1 year ago by yu810226
#105 opened over 1 year ago by yu810226
#106 opened over 1 year ago by yu810226
C++
Updated Apr 9, 2019
FPGA Haskell machine with game changing performance. Reduceron is Matthew Naylor, Colin Runciman and Jason Reich's hi…
Haskell
Updated Feb 9, 2019
A 32-bit RISC-V / MIPS ISA retargetable CPU core & SoC, 1.63 DMIPS/MHz
VHDL
Updated Apr 26, 2019
SDAccel Examples
C++
Updated Apr 29, 2019
🌱 Open source ecosystem for open FPGA boards
Python
Updated May 2, 2019
An open source library for image processing on FPGA.
Verilog
Updated Jun 16, 2015
FireSim: Easy-to-use, Scalable, FPGA-accelerated Cycle-accurate Hardware Simulation in the Cloud (e.g. RISC-V Rocket …
#253 opened 2 months ago by sagark
#255 opened 2 months ago by sagark
2
good first issue
enhancement
#260 opened 2 months ago by sagark
Python
Updated May 3, 2019