A cross platform C99 library to get cpu features at runtime.
C
Updated Apr 26, 2019
inVtero.net: A high speed (Gbps) Forensics, Memory integrity & assurance. Includes offensive & defensive memory capab…
C#
Updated Nov 26, 2017
Verilog
Updated Apr 25, 2019
FISC - Flexible Instruction Set Computer - Is the new Instruction Set Architecture inspired by ARMv8 and x86-64
VHDL
Updated Jun 30, 2017
[2009 – 2012] MDSP: functional simulation of a Multimedia Digital Signal Processor
C++
Updated Nov 1, 2018
Virtualization of a 32-bit ARM-like processor with native execution.
Rust
Updated Mar 29, 2019
Verilog
Updated Nov 21, 2018
An implementation of the LC-3 architecture in VHDL, as described in the book "Introduction to Computing Systems by P&P".
VHDL
Updated Aug 18, 2017
A pedagogical processor on FPGA, developed at NIIT University.
VHDL
Updated Oct 1, 2018
A small RISC-V core (SystemVerilog)
SystemVerilog
Updated Apr 30, 2019
An investigation of different topologies in OpenPiton
Assembly
Updated May 1, 2018
Experiments with low level assembly language
Updated Oct 25, 2017
A real time computing machine
C
Updated Apr 12, 2017
Aufbau und Funktionsweise von Prozessoren
TeX
Updated Jan 19, 2018
One Instruction Set Computer
Python
Updated Aug 18, 2017
A real time computing machine
C
Updated Aug 18, 2017
Repository for the course MO601 - Computer Architecture II
TeX
Updated Nov 10, 2018
Concepts in Advanced Pipeline Design
SystemVerilog
Updated Apr 5, 2017
some tlb experimentation code: calculate L1, L2 miss penalties and show cross-HT interference.
Python
Updated Nov 24, 2018
program execution simulator on processors
Python
Updated Apr 27, 2019