openroad

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Here are 32 public repositories matching this topic...

google / skywater-pdk

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Open source process design kit for usage with SkyWater Technology Foundry's 130nm node.

magic asic eda pdk asic-library openroad openram skywater

Updated Jan 7, 2023
Python

The-OpenROAD-Project / OpenLane

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OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.

magic asic rtl verilog vlsi foundry yosys klayout caravel netgen system-on-chip openroad openram skywater 130nm soc-design rtl2gds

Updated Jan 27, 2023
Verilog

The-OpenROAD-Project / OpenROAD

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OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/

cpp tcl eda rtl verilog def gdsii timing-analysis openroad lef opendb-database

Updated Jan 27, 2023
Verilog

google / gf180mcu-pdk

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PDK for GlobalFoundries' 180nm MCU bulk process technology (GF180MCU).

asic eda pdk openroad 180nm globalfoundries gf180mcu

Updated Jan 26, 2023
Makefile

efabless / caravel_mpw-one

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Caravel is a standard SoC hardness with on chip resources to control and read/write operations from a user-dedicated space.

magic yosys caravel picorv32 openroad openram sky130

Updated Feb 22, 2022
Verilog

efabless / caravel

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Caravel is a standard SoC harness with on chip resources to control and read/write operations from a user-dedicated space.

magic yosys caravel picorv32 openroad vexriscv openram sky130

Updated Jan 22, 2023
Verilog

The-OpenROAD-Project / OpenROAD-flow-scripts

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OpenROAD's scripts implementing an RTL-to-GDS Flow. Documentation at https://openroad-flow-scripts.readthedocs.io/en/latest/

tcl eda rtl verilog def gdsii timing-analysis openroad lef opendb-database

Updated Jan 27, 2023
Verilog

google / open-source-pdks

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Index of the fully open source process design kits (PDKs) maintained by Google.

asic eda silicon pdk openroad skywater 130nm sky130 180nm globalfoundries gf180mcu

Updated Sep 4, 2022

google / skywater-pdk-libs-sky130_fd_pr_reram

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SKY130 ReRAM and examples (SkyWater Provided)

asic eda silicon ngspice xyce pdk openroad reram skywater 130nm

Updated Apr 20, 2022

google / globalfoundries-pdk-libs-gf180mcu_fd_pr

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Primitives for GF180MCU provided by GlobalFoundries.

asic eda pdk openroad 180nm globalfoundries gf180mcu

Updated Jan 26, 2023
Python

google / globalfoundries-pdk-libs-gf180mcu_fd_sc_mcu7t5v0

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7 track standard cells for GF180MCU provided by GlobalFoundries.

asic eda pdk openroad 180nm standard-cells globalfoundries gf180mcu

Updated Dec 1, 2022
Verilog

google / globalfoundries-pdk-libs-gf180mcu_fd_sc_mcu9t5v0

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9 track standard cells for GF180MCU provided by GlobalFoundries.

asic eda pdk openroad 180nm standard-cells globalfoundries gf180mcu

Updated Dec 5, 2022
Verilog

google / globalfoundries-pdk-libs-gf180mcu_fd_io

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IO and periphery cells for the GF180MCU provided by GlobalFoundries.

asic eda io pdk openroad 180nm globalfoundries gf180mcu

Updated Dec 3, 2022
Verilog

google / skywater-pdk-libs-sky130_fd_sc_hd

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"High density" digital standard cells for SKY130 provided by SkyWater.

asic eda ic silicon integrated-circuits openroad sky130 standard-cells

Updated Sep 17, 2022
Verilog

The-OpenROAD-Project / OpenROAD-Cloud

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The source code that empowers OpenROAD Cloud

automation eda cloud-computing brown-university openroad scale-lab

Updated Jun 29, 2020

google / globalfoundries-pdk-ip-gf180mcu_fd_ip_sram

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SRAM macros created for the GF180MCU provided by GlobalFoundries.

asic eda ip sram pdk openroad 180nm globalfoundries gf180mcu

Updated Aug 3, 2022
Verilog

google / globalfoundries-pdk-libs-gf180mcu_osu_sc

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Digital standard cells for GF180MCU provided by Oklahoma State University.

asic eda pdk openroad 180nm globalfoundries gf180mcu

Updated Jan 24, 2023

google / globalfoundries-pdk-libs-gf180mcu_fd_bd_sram

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SRAM build space for the GF180MCU provided by GlobalFoundries.

asic eda sram pdk openroad 180nm globalfoundries gf180mcu

Updated Jul 20, 2022

aasthadave9 / Advanced-Physical-Design-Using-OpenLANE-Sky130

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This repository documents my work on Advanced Physical Design Using OpenLANE/Sky130. The objective of this project was to implement an opensource RTL2GDS flow using OpenLANE and opensource PDK provided by Google/SkyWater130

linux open-source asic hardware vlsi-physical-design openroad rtl2gds openlane sky130