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hkallweitdavem330
hkallweit
authored and
davem330
committed
r8169: add support for RTL8125B
Add support for RTL8125B rev.b. In my tests 2.5Gbps worked well w/o firmware, however for a stable link at 1Gbps firmware revision 0.0.2 is needed. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
1 parent b3ba9ae commit 0439297

3 files changed

Lines changed: 141 additions & 23 deletions

File tree

‎drivers/net/ethernet/realtek/r8169.h‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -65,6 +65,7 @@ enum mac_version {
6565
RTL_GIGA_MAC_VER_52,
6666
RTL_GIGA_MAC_VER_60,
6767
RTL_GIGA_MAC_VER_61,
68+
RTL_GIGA_MAC_VER_63,
6869
RTL_GIGA_MAC_NONE
6970
};
7071

‎drivers/net/ethernet/realtek/r8169_main.c‎

Lines changed: 87 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -56,6 +56,7 @@
5656
#define FIRMWARE_8107E_1 "rtl_nic/rtl8107e-1.fw"
5757
#define FIRMWARE_8107E_2 "rtl_nic/rtl8107e-2.fw"
5858
#define FIRMWARE_8125A_3 "rtl_nic/rtl8125a-3.fw"
59+
#define FIRMWARE_8125B_2 "rtl_nic/rtl8125b-2.fw"
5960

6061
/* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
6162
The RTL chips use a 64 element hash table based on the Ethernet CRC. */
@@ -146,6 +147,8 @@ static const struct {
146147
[RTL_GIGA_MAC_VER_52] = {"RTL8168fp/RTL8117", FIRMWARE_8168FP_3},
147148
[RTL_GIGA_MAC_VER_60] = {"RTL8125A" },
148149
[RTL_GIGA_MAC_VER_61] = {"RTL8125A", FIRMWARE_8125A_3},
150+
/* reserve 62 for CFG_METHOD_4 in the vendor driver */
151+
[RTL_GIGA_MAC_VER_63] = {"RTL8125B", FIRMWARE_8125B_2},
149152
};
150153

151154
static const struct pci_device_id rtl8169_pci_tbl[] = {
@@ -335,6 +338,7 @@ enum rtl8125_registers {
335338
IntrStatus_8125 = 0x3c,
336339
TxPoll_8125 = 0x90,
337340
MAC0_BKP = 0x19e0,
341+
EEE_TXIDLE_TIMER_8125 = 0x6048,
338342
};
339343

340344
#define RX_VLAN_INNER_8125 BIT(22)
@@ -655,6 +659,7 @@ MODULE_FIRMWARE(FIRMWARE_8168FP_3);
655659
MODULE_FIRMWARE(FIRMWARE_8107E_1);
656660
MODULE_FIRMWARE(FIRMWARE_8107E_2);
657661
MODULE_FIRMWARE(FIRMWARE_8125A_3);
662+
MODULE_FIRMWARE(FIRMWARE_8125B_2);
658663

659664
static inline struct device *tp_to_dev(struct rtl8169_private *tp)
660665
{
@@ -966,7 +971,7 @@ static void rtl_writephy(struct rtl8169_private *tp, int location, int val)
966971
case RTL_GIGA_MAC_VER_31:
967972
r8168dp_2_mdio_write(tp, location, val);
968973
break;
969-
case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_61:
974+
case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_63:
970975
r8168g_mdio_write(tp, location, val);
971976
break;
972977
default:
@@ -983,7 +988,7 @@ static int rtl_readphy(struct rtl8169_private *tp, int location)
983988
case RTL_GIGA_MAC_VER_28:
984989
case RTL_GIGA_MAC_VER_31:
985990
return r8168dp_2_mdio_read(tp, location);
986-
case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_61:
991+
case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_63:
987992
return r8168g_mdio_read(tp, location);
988993
default:
989994
return r8169_mdio_read(tp, location);
@@ -1389,7 +1394,7 @@ static void __rtl8169_set_wol(struct rtl8169_private *tp, u32 wolopts)
13891394
break;
13901395
case RTL_GIGA_MAC_VER_34:
13911396
case RTL_GIGA_MAC_VER_37:
1392-
case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_61:
1397+
case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_63:
13931398
options = RTL_R8(tp, Config2) & ~PME_SIGNAL;
13941399
if (wolopts)
13951400
options |= PME_SIGNAL;
@@ -1935,7 +1940,10 @@ static enum mac_version rtl8169_get_mac_version(u16 xid, bool gmii)
19351940
u16 val;
19361941
enum mac_version ver;
19371942
} mac_info[] = {
1938-
/* 8125 family. */
1943+
/* 8125B family. */
1944+
{ 0x7cf, 0x641, RTL_GIGA_MAC_VER_63 },
1945+
1946+
/* 8125A family. */
19391947
{ 0x7cf, 0x608, RTL_GIGA_MAC_VER_60 },
19401948
{ 0x7c8, 0x608, RTL_GIGA_MAC_VER_61 },
19411949

@@ -2073,6 +2081,17 @@ static void rtl8125a_config_eee_mac(struct rtl8169_private *tp)
20732081
r8168_mac_ocp_modify(tp, 0xeb62, 0, BIT(2) | BIT(1));
20742082
}
20752083

2084+
static void rtl8125_set_eee_txidle_timer(struct rtl8169_private *tp)
2085+
{
2086+
RTL_W16(tp, EEE_TXIDLE_TIMER_8125, tp->dev->mtu + ETH_HLEN + 0x20);
2087+
}
2088+
2089+
static void rtl8125b_config_eee_mac(struct rtl8169_private *tp)
2090+
{
2091+
rtl8125_set_eee_txidle_timer(tp);
2092+
r8168_mac_ocp_modify(tp, 0xe040, 0, BIT(1) | BIT(0));
2093+
}
2094+
20762095
static void rtl_rar_exgmac_set(struct rtl8169_private *tp, u8 *addr)
20772096
{
20782097
const u16 w[] = {
@@ -2174,7 +2193,7 @@ static void rtl_wol_suspend_quirk(struct rtl8169_private *tp)
21742193
case RTL_GIGA_MAC_VER_32:
21752194
case RTL_GIGA_MAC_VER_33:
21762195
case RTL_GIGA_MAC_VER_34:
2177-
case RTL_GIGA_MAC_VER_37 ... RTL_GIGA_MAC_VER_61:
2196+
case RTL_GIGA_MAC_VER_37 ... RTL_GIGA_MAC_VER_63:
21782197
RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) |
21792198
AcceptBroadcast | AcceptMulticast | AcceptMyPhys);
21802199
break;
@@ -2208,11 +2227,7 @@ static void rtl_pll_power_down(struct rtl8169_private *tp)
22082227
case RTL_GIGA_MAC_VER_46:
22092228
case RTL_GIGA_MAC_VER_47:
22102229
case RTL_GIGA_MAC_VER_48:
2211-
case RTL_GIGA_MAC_VER_50:
2212-
case RTL_GIGA_MAC_VER_51:
2213-
case RTL_GIGA_MAC_VER_52:
2214-
case RTL_GIGA_MAC_VER_60:
2215-
case RTL_GIGA_MAC_VER_61:
2230+
case RTL_GIGA_MAC_VER_50 ... RTL_GIGA_MAC_VER_63:
22162231
RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) & ~0x80);
22172232
break;
22182233
case RTL_GIGA_MAC_VER_40:
@@ -2244,11 +2259,7 @@ static void rtl_pll_power_up(struct rtl8169_private *tp)
22442259
case RTL_GIGA_MAC_VER_46:
22452260
case RTL_GIGA_MAC_VER_47:
22462261
case RTL_GIGA_MAC_VER_48:
2247-
case RTL_GIGA_MAC_VER_50:
2248-
case RTL_GIGA_MAC_VER_51:
2249-
case RTL_GIGA_MAC_VER_52:
2250-
case RTL_GIGA_MAC_VER_60:
2251-
case RTL_GIGA_MAC_VER_61:
2262+
case RTL_GIGA_MAC_VER_50 ... RTL_GIGA_MAC_VER_63:
22522263
RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) | 0xc0);
22532264
break;
22542265
case RTL_GIGA_MAC_VER_40:
@@ -2279,7 +2290,7 @@ static void rtl_init_rxcfg(struct rtl8169_private *tp)
22792290
case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_52:
22802291
RTL_W32(tp, RxConfig, RX128_INT_EN | RX_MULTI_EN | RX_DMA_BURST | RX_EARLY_OFF);
22812292
break;
2282-
case RTL_GIGA_MAC_VER_60 ... RTL_GIGA_MAC_VER_61:
2293+
case RTL_GIGA_MAC_VER_60 ... RTL_GIGA_MAC_VER_63:
22832294
RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST);
22842295
break;
22852296
default:
@@ -2442,6 +2453,12 @@ DECLARE_RTL_COND(rtl_rxtx_empty_cond)
24422453
return (RTL_R8(tp, MCU) & RXTX_EMPTY) == RXTX_EMPTY;
24432454
}
24442455

2456+
DECLARE_RTL_COND(rtl_rxtx_empty_cond_2)
2457+
{
2458+
/* IntrMitigate has new functionality on RTL8125 */
2459+
return (RTL_R16(tp, IntrMitigate) & 0x0103) == 0x0103;
2460+
}
2461+
24452462
static void rtl_wait_txrx_fifo_empty(struct rtl8169_private *tp)
24462463
{
24472464
switch (tp->mac_version) {
@@ -2452,6 +2469,11 @@ static void rtl_wait_txrx_fifo_empty(struct rtl8169_private *tp)
24522469
case RTL_GIGA_MAC_VER_60 ... RTL_GIGA_MAC_VER_61:
24532470
rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond, 100, 42);
24542471
break;
2472+
case RTL_GIGA_MAC_VER_63:
2473+
RTL_W8(tp, ChipCmd, RTL_R8(tp, ChipCmd) | StopReq);
2474+
rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond, 100, 42);
2475+
rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond_2, 100, 42);
2476+
break;
24552477
default:
24562478
break;
24572479
}
@@ -3523,18 +3545,27 @@ static void rtl_hw_start_8125_common(struct rtl8169_private *tp)
35233545
/* disable new tx descriptor format */
35243546
r8168_mac_ocp_modify(tp, 0xeb58, 0x0001, 0x0000);
35253547

3526-
r8168_mac_ocp_modify(tp, 0xe614, 0x0700, 0x0400);
3527-
r8168_mac_ocp_modify(tp, 0xe63e, 0x0c30, 0x0020);
3548+
if (tp->mac_version == RTL_GIGA_MAC_VER_63)
3549+
r8168_mac_ocp_modify(tp, 0xe614, 0x0700, 0x0200);
3550+
else
3551+
r8168_mac_ocp_modify(tp, 0xe614, 0x0700, 0x0400);
3552+
3553+
if (tp->mac_version == RTL_GIGA_MAC_VER_63)
3554+
r8168_mac_ocp_modify(tp, 0xe63e, 0x0c30, 0x0000);
3555+
else
3556+
r8168_mac_ocp_modify(tp, 0xe63e, 0x0c30, 0x0020);
3557+
35283558
r8168_mac_ocp_modify(tp, 0xc0b4, 0x0000, 0x000c);
35293559
r8168_mac_ocp_modify(tp, 0xeb6a, 0x00ff, 0x0033);
35303560
r8168_mac_ocp_modify(tp, 0xeb50, 0x03e0, 0x0040);
35313561
r8168_mac_ocp_modify(tp, 0xe056, 0x00f0, 0x0030);
35323562
r8168_mac_ocp_modify(tp, 0xe040, 0x1000, 0x0000);
3563+
r8168_mac_ocp_modify(tp, 0xea1c, 0x0003, 0x0001);
35333564
r8168_mac_ocp_modify(tp, 0xe0c0, 0x4f0f, 0x4403);
3534-
r8168_mac_ocp_modify(tp, 0xe052, 0x0080, 0x0067);
3565+
r8168_mac_ocp_modify(tp, 0xe052, 0x0080, 0x0068);
35353566
r8168_mac_ocp_modify(tp, 0xc0ac, 0x0080, 0x1f00);
35363567
r8168_mac_ocp_modify(tp, 0xd430, 0x0fff, 0x047f);
3537-
r8168_mac_ocp_modify(tp, 0xe84c, 0x0000, 0x00c0);
3568+
35383569
r8168_mac_ocp_modify(tp, 0xea1c, 0x0004, 0x0000);
35393570
r8168_mac_ocp_modify(tp, 0xeb54, 0x0000, 0x0001);
35403571
udelay(1);
@@ -3545,7 +3576,10 @@ static void rtl_hw_start_8125_common(struct rtl8169_private *tp)
35453576

35463577
rtl_loop_wait_low(tp, &rtl_mac_ocp_e00e_cond, 1000, 10);
35473578

3548-
rtl8125a_config_eee_mac(tp);
3579+
if (tp->mac_version == RTL_GIGA_MAC_VER_63)
3580+
rtl8125b_config_eee_mac(tp);
3581+
else
3582+
rtl8125a_config_eee_mac(tp);
35493583

35503584
RTL_W32(tp, MISC, RTL_R32(tp, MISC) & ~RXDV_GATED_EN);
35513585
udelay(10);
@@ -3617,6 +3651,26 @@ static void rtl_hw_start_8125a_2(struct rtl8169_private *tp)
36173651
rtl_hw_start_8125_common(tp);
36183652
}
36193653

3654+
static void rtl_hw_start_8125b(struct rtl8169_private *tp)
3655+
{
3656+
static const struct ephy_info e_info_8125b[] = {
3657+
{ 0x0b, 0xffff, 0xa908 },
3658+
{ 0x1e, 0xffff, 0x20eb },
3659+
{ 0x4b, 0xffff, 0xa908 },
3660+
{ 0x5e, 0xffff, 0x20eb },
3661+
{ 0x22, 0x0030, 0x0020 },
3662+
{ 0x62, 0x0030, 0x0020 },
3663+
};
3664+
3665+
rtl_set_def_aspm_entry_latency(tp);
3666+
rtl_hw_aspm_clkreq_enable(tp, false);
3667+
3668+
rtl_ephy_init(tp, e_info_8125b);
3669+
rtl_hw_start_8125_common(tp);
3670+
3671+
rtl_hw_aspm_clkreq_enable(tp, true);
3672+
}
3673+
36203674
static void rtl_hw_config(struct rtl8169_private *tp)
36213675
{
36223676
static const rtl_generic_fct hw_configs[] = {
@@ -3667,6 +3721,7 @@ static void rtl_hw_config(struct rtl8169_private *tp)
36673721
[RTL_GIGA_MAC_VER_52] = rtl_hw_start_8117,
36683722
[RTL_GIGA_MAC_VER_60] = rtl_hw_start_8125a_1,
36693723
[RTL_GIGA_MAC_VER_61] = rtl_hw_start_8125a_2,
3724+
[RTL_GIGA_MAC_VER_63] = rtl_hw_start_8125b,
36703725
};
36713726

36723727
if (hw_configs[tp->mac_version])
@@ -3753,6 +3808,15 @@ static int rtl8169_change_mtu(struct net_device *dev, int new_mtu)
37533808
netdev_update_features(dev);
37543809
rtl_jumbo_config(tp);
37553810

3811+
switch (tp->mac_version) {
3812+
case RTL_GIGA_MAC_VER_61:
3813+
case RTL_GIGA_MAC_VER_63:
3814+
rtl8125_set_eee_txidle_timer(tp);
3815+
break;
3816+
default:
3817+
break;
3818+
}
3819+
37563820
return 0;
37573821
}
37583822

@@ -3899,7 +3963,7 @@ static void rtl8169_cleanup(struct rtl8169_private *tp, bool going_down)
38993963
RTL_W8(tp, ChipCmd, RTL_R8(tp, ChipCmd) | StopReq);
39003964
rtl_loop_wait_high(tp, &rtl_txcfg_empty_cond, 100, 666);
39013965
break;
3902-
case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_61:
3966+
case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_63:
39033967
rtl_enable_rxdvgate(tp);
39043968
fsleep(2000);
39053969
break;
@@ -5075,7 +5139,7 @@ static void rtl_hw_initialize(struct rtl8169_private *tp)
50755139
case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_48:
50765140
rtl_hw_init_8168g(tp);
50775141
break;
5078-
case RTL_GIGA_MAC_VER_60 ... RTL_GIGA_MAC_VER_61:
5142+
case RTL_GIGA_MAC_VER_60 ... RTL_GIGA_MAC_VER_63:
50795143
rtl_hw_init_8125(tp);
50805144
break;
50815145
default:

‎drivers/net/ethernet/realtek/r8169_phy_config.c‎

Lines changed: 53 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -97,6 +97,14 @@ static void rtl8125a_config_eee_phy(struct phy_device *phydev)
9797
phy_modify_paged(phydev, 0xa6d, 0x14, 0x0010, 0x0000);
9898
}
9999

100+
static void rtl8125b_config_eee_phy(struct phy_device *phydev)
101+
{
102+
phy_modify_paged(phydev, 0xa6d, 0x12, 0x0001, 0x0000);
103+
phy_modify_paged(phydev, 0xa6d, 0x14, 0x0010, 0x0000);
104+
phy_modify_paged(phydev, 0xa42, 0x14, 0x0080, 0x0000);
105+
phy_modify_paged(phydev, 0xa4a, 0x11, 0x0200, 0x0000);
106+
}
107+
100108
static void rtl8169s_hw_phy_config(struct rtl8169_private *tp,
101109
struct phy_device *phydev)
102110
{
@@ -1147,6 +1155,11 @@ static void rtl8106e_hw_phy_config(struct rtl8169_private *tp,
11471155
rtl_writephy_batch(phydev, phy_reg_init);
11481156
}
11491157

1158+
static void rtl8125_legacy_force_mode(struct phy_device *phydev)
1159+
{
1160+
phy_modify_paged(phydev, 0xa5b, 0x12, BIT(15), 0);
1161+
}
1162+
11501163
static void rtl8125a_1_hw_phy_config(struct rtl8169_private *tp,
11511164
struct phy_device *phydev)
11521165
{
@@ -1250,6 +1263,45 @@ static void rtl8125a_2_hw_phy_config(struct rtl8169_private *tp,
12501263
rtl8125a_config_eee_phy(phydev);
12511264
}
12521265

1266+
static void rtl8125b_hw_phy_config(struct rtl8169_private *tp,
1267+
struct phy_device *phydev)
1268+
{
1269+
r8169_apply_firmware(tp);
1270+
1271+
phy_modify_paged(phydev, 0xa44, 0x11, 0x0000, 0x0800);
1272+
phy_modify_paged(phydev, 0xac4, 0x13, 0x00f0, 0x0090);
1273+
phy_modify_paged(phydev, 0xad3, 0x10, 0x0003, 0x0001);
1274+
1275+
phy_write(phydev, 0x1f, 0x0b87);
1276+
phy_write(phydev, 0x16, 0x80f5);
1277+
phy_write(phydev, 0x17, 0x760e);
1278+
phy_write(phydev, 0x16, 0x8107);
1279+
phy_write(phydev, 0x17, 0x360e);
1280+
phy_write(phydev, 0x16, 0x8551);
1281+
phy_modify(phydev, 0x17, 0xff00, 0x0800);
1282+
phy_write(phydev, 0x1f, 0x0000);
1283+
1284+
phy_modify_paged(phydev, 0xbf0, 0x10, 0xe000, 0xa000);
1285+
phy_modify_paged(phydev, 0xbf4, 0x13, 0x0f00, 0x0300);
1286+
1287+
r8168g_phy_param(phydev, 0x8044, 0xffff, 0x2417);
1288+
r8168g_phy_param(phydev, 0x804a, 0xffff, 0x2417);
1289+
r8168g_phy_param(phydev, 0x8050, 0xffff, 0x2417);
1290+
r8168g_phy_param(phydev, 0x8056, 0xffff, 0x2417);
1291+
r8168g_phy_param(phydev, 0x805c, 0xffff, 0x2417);
1292+
r8168g_phy_param(phydev, 0x8062, 0xffff, 0x2417);
1293+
r8168g_phy_param(phydev, 0x8068, 0xffff, 0x2417);
1294+
r8168g_phy_param(phydev, 0x806e, 0xffff, 0x2417);
1295+
r8168g_phy_param(phydev, 0x8074, 0xffff, 0x2417);
1296+
r8168g_phy_param(phydev, 0x807a, 0xffff, 0x2417);
1297+
1298+
phy_modify_paged(phydev, 0xa4c, 0x15, 0x0000, 0x0040);
1299+
phy_modify_paged(phydev, 0xbf8, 0x12, 0xe000, 0xa000);
1300+
1301+
rtl8125_legacy_force_mode(phydev);
1302+
rtl8125b_config_eee_phy(phydev);
1303+
}
1304+
12531305
void r8169_hw_phy_config(struct rtl8169_private *tp, struct phy_device *phydev,
12541306
enum mac_version ver)
12551307
{
@@ -1308,6 +1360,7 @@ void r8169_hw_phy_config(struct rtl8169_private *tp, struct phy_device *phydev,
13081360
[RTL_GIGA_MAC_VER_52] = rtl8117_hw_phy_config,
13091361
[RTL_GIGA_MAC_VER_60] = rtl8125a_1_hw_phy_config,
13101362
[RTL_GIGA_MAC_VER_61] = rtl8125a_2_hw_phy_config,
1363+
[RTL_GIGA_MAC_VER_63] = rtl8125b_hw_phy_config,
13111364
};
13121365

13131366
if (phy_configs[ver])

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