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EHCI: maintain the ehci->command value properly

The ehci-hcd driver is a little haphazard about keeping track of the
state of the USBCMD register.  The ehci->command field is supposed to
hold the register's value (apart from a few special bits) at all
times, but it isn't maintained properly.

This patch (as1543) cleans up the situation.  It keeps ehci->command
up-to-date, and uses that value rather than reading the register from
the hardware whenever possible.

Signed-off-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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AlanStern authored and gregkh committed Apr 23, 2012
1 parent 09091a4 commit 3d9545cc375d117554a9b35dfddadf9189c62775
@@ -1025,10 +1025,8 @@ static ssize_t debug_lpm_write(struct file *file, const char __user *user_buf,
if (strict_strtoul(buf + 5, 16, &hird))
return -EINVAL;
printk(KERN_INFO "setting hird %s %lu\n", buf + 6, hird);
temp = ehci_readl(ehci, &ehci->regs->command);
temp &= ~CMD_HIRD;
temp |= hird << 24;
ehci_writel(ehci, temp, &ehci->regs->command);
ehci->command = (ehci->command & ~CMD_HIRD) | (hird << 24);
ehci_writel(ehci, ehci->command, &ehci->regs->command);
} else if (strncmp(buf, "disable", 7) == 0) {
if (strict_strtoul(buf + 8, 10, &port))
return -EINVAL;
@@ -226,8 +226,13 @@ static int ehci_halt (struct ehci_hcd *ehci)
if ((temp & STS_HALT) != 0)
return 0;

/*
* This routine gets called during probe before ehci->command
* has been initialized, so we can't rely on its value.
*/
ehci->command &= ~CMD_RUN;
temp = ehci_readl(ehci, &ehci->regs->command);
temp &= ~CMD_RUN;
temp &= ~(CMD_RUN | CMD_IAAD);
ehci_writel(ehci, temp, &ehci->regs->command);
return handshake (ehci, &ehci->regs->status,
STS_HALT, STS_HALT, 16 * 125);
@@ -347,6 +352,7 @@ static int ehci_reset (struct ehci_hcd *ehci)
if (ehci->debug)
dbgp_external_startup();

ehci->command = ehci_readl(ehci, &ehci->regs->command);
ehci->port_c_suspend = ehci->suspended_ports =
ehci->resuming_ports = 0;
return retval;
@@ -363,16 +369,14 @@ static void ehci_quiesce (struct ehci_hcd *ehci)
#endif

/* wait for any schedule enables/disables to take effect */
temp = ehci_readl(ehci, &ehci->regs->command) << 10;
temp &= STS_ASS | STS_PSS;
temp = (ehci->command << 10) & (STS_ASS | STS_PSS);
if (handshake_on_error_set_halt(ehci, &ehci->regs->status,
STS_ASS | STS_PSS, temp, 16 * 125))
return;

/* then disable anything that's still active */
temp = ehci_readl(ehci, &ehci->regs->command);
temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE);
ehci_writel(ehci, temp, &ehci->regs->command);
ehci->command &= ~(CMD_ASE | CMD_PSE);
ehci_writel(ehci, ehci->command, &ehci->regs->command);

/* hardware can take 16 microframes to turn off ... */
handshake_on_error_set_halt(ehci, &ehci->regs->status,
@@ -233,7 +233,6 @@ static int ehci_bus_suspend (struct usb_hcd *hcd)
/* stop schedules, clean any completed work */
if (ehci->rh_state == EHCI_RH_RUNNING)
ehci_quiesce (ehci);
ehci->command = ehci_readl(ehci, &ehci->regs->command);
ehci_work(ehci);

/* Unlike other USB host controller types, EHCI doesn't have
@@ -374,6 +373,7 @@ static int ehci_bus_resume (struct usb_hcd *hcd)
ehci_writel(ehci, (u32) ehci->async->qh_dma, &ehci->regs->async_next);

/* restore CMD_RUN, framelist size, and irq threshold */
ehci->command |= CMD_RUN;
ehci_writel(ehci, ehci->command, &ehci->regs->command);
ehci->rh_state = EHCI_RH_RUNNING;

@@ -981,14 +981,12 @@ static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
head = ehci->async;
timer_action_done (ehci, TIMER_ASYNC_OFF);
if (!head->qh_next.qh) {
u32 cmd = ehci_readl(ehci, &ehci->regs->command);

if (!(cmd & CMD_ASE)) {
if (!(ehci->command & CMD_ASE)) {
/* in case a clear of CMD_ASE didn't take yet */
(void)handshake(ehci, &ehci->regs->status,
STS_ASS, 0, 150);
cmd |= CMD_ASE;
ehci_writel(ehci, cmd, &ehci->regs->command);
ehci->command |= CMD_ASE;
ehci_writel(ehci, ehci->command, &ehci->regs->command);
/* posted write need not be known to HC yet ... */
}
}
@@ -1204,7 +1202,6 @@ static void end_unlink_async (struct ehci_hcd *ehci)

static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
{
int cmd = ehci_readl(ehci, &ehci->regs->command);
struct ehci_qh *prev;

#ifdef DEBUG
@@ -1222,8 +1219,8 @@ static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
if (ehci->rh_state != EHCI_RH_HALTED
&& !ehci->reclaim) {
/* ... and CMD_IAAD clear */
ehci_writel(ehci, cmd & ~CMD_ASE,
&ehci->regs->command);
ehci->command &= ~CMD_ASE;
ehci_writel(ehci, ehci->command, &ehci->regs->command);
wmb ();
// handshake later, if we need to
timer_action_done (ehci, TIMER_ASYNC_OFF);
@@ -1253,8 +1250,7 @@ static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
return;
}

cmd |= CMD_IAAD;
ehci_writel(ehci, cmd, &ehci->regs->command);
ehci_writel(ehci, ehci->command | CMD_IAAD, &ehci->regs->command);
(void)ehci_readl(ehci, &ehci->regs->command);
iaa_watchdog_start(ehci);
}
@@ -481,7 +481,6 @@ static int tt_no_collision (

static int enable_periodic (struct ehci_hcd *ehci)
{
u32 cmd;
int status;

if (ehci->periodic_sched++)
@@ -497,8 +496,8 @@ static int enable_periodic (struct ehci_hcd *ehci)
return status;
}

cmd = ehci_readl(ehci, &ehci->regs->command) | CMD_PSE;
ehci_writel(ehci, cmd, &ehci->regs->command);
ehci->command |= CMD_PSE;
ehci_writel(ehci, ehci->command, &ehci->regs->command);
/* posted write ... PSS happens later */

/* make sure ehci_work scans these */
@@ -511,7 +510,6 @@ static int enable_periodic (struct ehci_hcd *ehci)

static int disable_periodic (struct ehci_hcd *ehci)
{
u32 cmd;
int status;

if (--ehci->periodic_sched)
@@ -537,8 +535,8 @@ static int disable_periodic (struct ehci_hcd *ehci)
return status;
}

cmd = ehci_readl(ehci, &ehci->regs->command) & ~CMD_PSE;
ehci_writel(ehci, cmd, &ehci->regs->command);
ehci->command &= ~CMD_PSE;
ehci_writel(ehci, ehci->command, &ehci->regs->command);
/* posted write ... */

free_cached_lists(ehci);

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