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Merge branch 'pfc' of git://git.kernel.org/pub/scm/linux/kernel/git/h…

…orms/renesas into next/sh-pinmux

From Simon Horman. Based on agreement between me, Paul Mundt, Linus
Walleij and Simon, we're mergning this large branch of pinctrl conversion
through arm-soc, even though it contains the corresponding conversions
for arch/sh. Main reason for this is tight dependencies (that will now
mostly be broken) between the arch/sh and mach-shmobile implementations.

There will be more of this in 3.10 to do device-tree bindings, but this is
the initial conversion.

* 'pfc' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (80 commits)
  sh-pfc: Move sh_pfc.h from include/linux/ to driver directory
  sh-pfc: Remove pinmux_info definition
  sh: Remove unused sh_pfc_register_info() function
  sh: shx3: pinmux: Use driver-provided pinmux info
  sh: sh7786: pinmux: Use driver-provided pinmux info
  sh: sh7785: pinmux: Use driver-provided pinmux info
  sh: sh7757: pinmux: Use driver-provided pinmux info
  sh: sh7734: pinmux: Use driver-provided pinmux info
  sh: sh7724: pinmux: Use driver-provided pinmux info
  sh: sh7723: pinmux: Use driver-provided pinmux info
  sh: sh7722: pinmux: Use driver-provided pinmux info
  sh: sh7720: pinmux: Use driver-provided pinmux info
  sh: sh7269: pinmux: Use driver-provided pinmux info
  sh: sh7264: pinmux: Use driver-provided pinmux info
  sh: sh7203: pinmux: Use driver-provided pinmux info
  ARM: shmobile: sh73a0: Use driver-provided pinmux info
  ARM: shmobile: sh7372: Use driver-provided pinmux info
  ARM: shmobile: r8a7779: Use driver-provided pinmux info
  ARM: shmobile: r8a7740: Use driver-provided pinmux info
  sh-pfc: Add shx3 pinmux support
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
  • Loading branch information...
olofj committed Jan 29, 2013
2 parents 949db15 + c332380 commit 7e5fc7793179ea5ef12f4287512b142813c6ac7c
Showing with 21,897 additions and 21,520 deletions.
  1. +1 −0 arch/arm/Kconfig
  2. +0 −8 arch/arm/mach-shmobile/Makefile
  3. +26 −0 arch/arm/mach-shmobile/setup-r8a7740.c
  4. +25 −0 arch/arm/mach-shmobile/setup-r8a7779.c
  5. +26 −0 arch/arm/mach-shmobile/setup-sh7372.c
  6. +25 −0 arch/arm/mach-shmobile/setup-sh73a0.c
  7. +12 −0 arch/sh/Kconfig
  8. +1 −1 arch/sh/include/asm/gpio.h
  9. +26 −0 arch/sh/include/cpu-common/cpu/pfc.h
  10. +1 −1 arch/sh/include/cpu-sh4/cpu/sh7723.h
  11. +3 −5 arch/sh/include/cpu-sh4/cpu/sh7786.h
  12. +1 −1 arch/sh/kernel/cpu/Makefile
  13. +33 −0 arch/sh/kernel/cpu/pfc.c
  14. +2 −1,580 arch/sh/kernel/cpu/sh2a/pinmux-sh7203.c
  15. +2 −2,119 arch/sh/kernel/cpu/sh2a/pinmux-sh7264.c
  16. +2 −2,821 arch/sh/kernel/cpu/sh2a/pinmux-sh7269.c
  17. +2 −1,224 arch/sh/kernel/cpu/sh3/pinmux-sh7720.c
  18. +2 −1,776 arch/sh/kernel/cpu/sh4a/pinmux-sh7722.c
  19. +2 −1,891 arch/sh/kernel/cpu/sh4a/pinmux-sh7723.c
  20. +2 −2,208 arch/sh/kernel/cpu/sh4a/pinmux-sh7724.c
  21. +4 −2,466 arch/sh/kernel/cpu/sh4a/pinmux-sh7734.c
  22. +2 −2,265 arch/sh/kernel/cpu/sh4a/pinmux-sh7757.c
  23. +2 −1,292 arch/sh/kernel/cpu/sh4a/pinmux-sh7785.c
  24. +2 −820 arch/sh/kernel/cpu/sh4a/pinmux-sh7786.c
  25. +2 −571 arch/sh/kernel/cpu/sh4a/pinmux-shx3.c
  26. +1 −1 drivers/pinctrl/Kconfig
  27. +2 −0 drivers/pinctrl/Makefile
  28. +116 −0 drivers/pinctrl/sh-pfc/Kconfig
  29. +21 −0 drivers/pinctrl/sh-pfc/Makefile
  30. +209 −146 drivers/{sh/pfc → pinctrl/sh-pfc}/core.c
  31. +72 −0 drivers/pinctrl/sh-pfc/core.h
  32. +26 −88 drivers/{sh/pfc → pinctrl/sh-pfc}/gpio.c
  33. +3 −8 {arch/arm/mach-shmobile → drivers/pinctrl/sh-pfc}/pfc-r8a7740.c
  34. +4 −25 {arch/arm/mach-shmobile → drivers/pinctrl/sh-pfc}/pfc-r8a7779.c
  35. +1,592 −0 drivers/pinctrl/sh-pfc/pfc-sh7203.c
  36. +2,131 −0 drivers/pinctrl/sh-pfc/pfc-sh7264.c
  37. +2,834 −0 drivers/pinctrl/sh-pfc/pfc-sh7269.c
  38. +3 −8 {arch/arm/mach-shmobile → drivers/pinctrl/sh-pfc}/pfc-sh7372.c
  39. +3 −8 {arch/arm/mach-shmobile → drivers/pinctrl/sh-pfc}/pfc-sh73a0.c
  40. +1,236 −0 drivers/pinctrl/sh-pfc/pfc-sh7720.c
  41. +1,779 −0 drivers/pinctrl/sh-pfc/pfc-sh7722.c
  42. +1,903 −0 drivers/pinctrl/sh-pfc/pfc-sh7723.c
  43. +2,225 −0 drivers/pinctrl/sh-pfc/pfc-sh7724.c
  44. +2,475 −0 drivers/pinctrl/sh-pfc/pfc-sh7734.c
  45. +2,282 −0 drivers/pinctrl/sh-pfc/pfc-sh7757.c
  46. +1,304 −0 drivers/pinctrl/sh-pfc/pfc-sh7785.c
  47. +837 −0 drivers/pinctrl/sh-pfc/pfc-sh7786.c
  48. +582 −0 drivers/pinctrl/sh-pfc/pfc-shx3.c
  49. +50 −114 drivers/{sh/pfc → pinctrl/sh-pfc}/pinctrl.c
  50. +1 −42 {include/linux → drivers/pinctrl/sh-pfc}/sh_pfc.h
  51. +0 −1 drivers/sh/Kconfig
  52. +0 −1 drivers/sh/Makefile
  53. +0 −26 drivers/sh/pfc/Kconfig
  54. +0 −3 drivers/sh/pfc/Makefile
View
@@ -698,6 +698,7 @@ config ARCH_SHMOBILE
select MULTI_IRQ_HANDLER
select NEED_MACH_MEMORY_H
select NO_IOPORT
+ select PINCTRL
select PM_GENERIC_DOMAINS if PM
select SPARSE_IRQ
help
@@ -19,13 +19,6 @@ smp-$(CONFIG_ARCH_SH73A0) += smp-sh73a0.o
smp-$(CONFIG_ARCH_R8A7779) += smp-r8a7779.o
smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o
-# Pinmux setup
-pfc-y :=
-pfc-$(CONFIG_ARCH_SH7372) += pfc-sh7372.o
-pfc-$(CONFIG_ARCH_SH73A0) += pfc-sh73a0.o
-pfc-$(CONFIG_ARCH_R8A7740) += pfc-r8a7740.o
-pfc-$(CONFIG_ARCH_R8A7779) += pfc-r8a7779.o
-
# IRQ objects
obj-$(CONFIG_ARCH_SH7372) += entry-intc.o
obj-$(CONFIG_ARCH_R8A7740) += entry-intc.o
@@ -51,4 +44,3 @@ obj-$(CONFIG_MACH_KZM9G) += board-kzm9g.o
# Framework support
obj-$(CONFIG_SMP) += $(smp-y)
-obj-$(CONFIG_GENERIC_GPIO) += $(pfc-y)
@@ -68,6 +68,32 @@ void __init r8a7740_map_io(void)
iotable_init(r8a7740_io_desc, ARRAY_SIZE(r8a7740_io_desc));
}
+/* PFC */
+static struct resource r8a7740_pfc_resources[] = {
+ [0] = {
+ .start = 0xe6050000,
+ .end = 0xe6057fff,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = 0xe605800c,
+ .end = 0xe605802b,
+ .flags = IORESOURCE_MEM,
+ }
+};
+
+static struct platform_device r8a7740_pfc_device = {
+ .name = "pfc-r8a7740",
+ .id = -1,
+ .resource = r8a7740_pfc_resources,
+ .num_resources = ARRAY_SIZE(r8a7740_pfc_resources),
+};
+
+void __init r8a7740_pinmux_init(void)
+{
+ platform_device_register(&r8a7740_pfc_device);
+}
+
/* SCIFA0 */
static struct plat_sci_port scif0_platform_data = {
.mapbase = 0xe6c40000,
@@ -60,6 +60,31 @@ void __init r8a7779_map_io(void)
iotable_init(r8a7779_io_desc, ARRAY_SIZE(r8a7779_io_desc));
}
+static struct resource r8a7779_pfc_resources[] = {
+ [0] = {
+ .start = 0xfffc0000,
+ .end = 0xfffc023b,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = 0xffc40000,
+ .end = 0xffc46fff,
+ .flags = IORESOURCE_MEM,
+ }
+};
+
+static struct platform_device r8a7779_pfc_device = {
+ .name = "pfc-r8a7779",
+ .id = -1,
+ .resource = r8a7779_pfc_resources,
+ .num_resources = ARRAY_SIZE(r8a7779_pfc_resources),
+};
+
+void __init r8a7779_pinmux_init(void)
+{
+ platform_device_register(&r8a7779_pfc_device);
+}
+
static struct plat_sci_port scif0_platform_data = {
.mapbase = 0xffe40000,
.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
@@ -60,6 +60,32 @@ void __init sh7372_map_io(void)
iotable_init(sh7372_io_desc, ARRAY_SIZE(sh7372_io_desc));
}
+/* PFC */
+static struct resource sh7372_pfc_resources[] = {
+ [0] = {
+ .start = 0xe6050000,
+ .end = 0xe6057fff,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = 0xe605800c,
+ .end = 0xe6058027,
+ .flags = IORESOURCE_MEM,
+ }
+};
+
+static struct platform_device sh7372_pfc_device = {
+ .name = "pfc-sh7372",
+ .id = -1,
+ .resource = sh7372_pfc_resources,
+ .num_resources = ARRAY_SIZE(sh7372_pfc_resources),
+};
+
+void __init sh7372_pinmux_init(void)
+{
+ platform_device_register(&sh7372_pfc_device);
+}
+
/* SCIFA0 */
static struct plat_sci_port scif0_platform_data = {
.mapbase = 0xe6c40000,
@@ -57,6 +57,31 @@ void __init sh73a0_map_io(void)
iotable_init(sh73a0_io_desc, ARRAY_SIZE(sh73a0_io_desc));
}
+static struct resource sh73a0_pfc_resources[] = {
+ [0] = {
+ .start = 0xe6050000,
+ .end = 0xe6057fff,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = 0xe605801c,
+ .end = 0xe6058027,
+ .flags = IORESOURCE_MEM,
+ }
+};
+
+static struct platform_device sh73a0_pfc_device = {
+ .name = "pfc-sh73a0",
+ .id = -1,
+ .resource = sh73a0_pfc_resources,
+ .num_resources = ARRAY_SIZE(sh73a0_pfc_resources),
+};
+
+void __init sh73a0_pinmux_init(void)
+{
+ platform_device_register(&sh73a0_pfc_device);
+}
+
static struct plat_sci_port scif0_platform_data = {
.mapbase = 0xe6c40000,
.flags = UPF_BOOT_AUTOCONF,
View
@@ -276,6 +276,7 @@ config CPU_SUBTYPE_SH7203
select SYS_SUPPORTS_CMT
select SYS_SUPPORTS_MTU2
select ARCH_WANT_OPTIONAL_GPIOLIB
+ select PINCTRL
config CPU_SUBTYPE_SH7206
bool "Support SH7206 processor"
@@ -296,13 +297,15 @@ config CPU_SUBTYPE_SH7264
select CPU_HAS_FPU
select SYS_SUPPORTS_CMT
select SYS_SUPPORTS_MTU2
+ select PINCTRL
config CPU_SUBTYPE_SH7269
bool "Support SH7269 processor"
select CPU_SH2A
select CPU_HAS_FPU
select SYS_SUPPORTS_CMT
select SYS_SUPPORTS_MTU2
+ select PINCTRL
config CPU_SUBTYPE_MXG
bool "Support MX-G processor"
@@ -364,6 +367,7 @@ config CPU_SUBTYPE_SH7720
select ARCH_WANT_OPTIONAL_GPIOLIB
select USB_ARCH_HAS_OHCI
select USB_OHCI_SH if USB_OHCI_HCD
+ select PINCTRL
help
Select SH7720 if you have a SH3-DSP SH7720 CPU.
@@ -429,6 +433,7 @@ config CPU_SUBTYPE_SH7723
select ARCH_SPARSEMEM_ENABLE
select SYS_SUPPORTS_CMT
select ARCH_WANT_OPTIONAL_GPIOLIB
+ select PINCTRL
help
Select SH7723 if you have an SH-MobileR2 CPU.
@@ -440,6 +445,7 @@ config CPU_SUBTYPE_SH7724
select ARCH_SPARSEMEM_ENABLE
select SYS_SUPPORTS_CMT
select ARCH_WANT_OPTIONAL_GPIOLIB
+ select PINCTRL
help
Select SH7724 if you have an SH-MobileR2R CPU.
@@ -450,6 +456,7 @@ config CPU_SUBTYPE_SH7734
select ARCH_WANT_OPTIONAL_GPIOLIB
select USB_ARCH_HAS_OHCI
select USB_ARCH_HAS_EHCI
+ select PINCTRL
help
Select SH7734 if you have a SH4A SH7734 CPU.
@@ -460,6 +467,7 @@ config CPU_SUBTYPE_SH7757
select ARCH_WANT_OPTIONAL_GPIOLIB
select USB_ARCH_HAS_OHCI
select USB_ARCH_HAS_EHCI
+ select PINCTRL
help
Select SH7757 if you have a SH4A SH7757 CPU.
@@ -486,6 +494,7 @@ config CPU_SUBTYPE_SH7785
select ARCH_SPARSEMEM_ENABLE
select SYS_SUPPORTS_NUMA
select ARCH_WANT_OPTIONAL_GPIOLIB
+ select PINCTRL
config CPU_SUBTYPE_SH7786
bool "Support SH7786 processor"
@@ -498,13 +507,15 @@ config CPU_SUBTYPE_SH7786
select USB_OHCI_SH if USB_OHCI_HCD
select USB_ARCH_HAS_EHCI
select USB_EHCI_SH if USB_EHCI_HCD
+ select PINCTRL
config CPU_SUBTYPE_SHX3
bool "Support SH-X3 processor"
select CPU_SH4A
select CPU_SHX3
select GENERIC_CLOCKEVENTS_BROADCAST if SMP
select ARCH_REQUIRE_GPIOLIB
+ select PINCTRL
# SH4AL-DSP Processor Support
@@ -523,6 +534,7 @@ config CPU_SUBTYPE_SH7722
select SYS_SUPPORTS_NUMA
select SYS_SUPPORTS_CMT
select ARCH_WANT_OPTIONAL_GPIOLIB
+ select PINCTRL
config CPU_SUBTYPE_SH7366
bool "Support SH7366 processor"
@@ -20,7 +20,7 @@
#endif
#define ARCH_NR_GPIOS 512
-#include <linux/sh_pfc.h>
+#include <asm-generic/gpio.h>
#ifdef CONFIG_GPIOLIB
@@ -0,0 +1,26 @@
+/*
+ * SH Pin Function Control Initialization
+ *
+ * Copyright (C) 2012 Renesas Solutions Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __ARCH_SH_CPU_PFC_H__
+#define __ARCH_SH_CPU_PFC_H__
+
+#include <linux/types.h>
+
+struct resource;
+
+int sh_pfc_register(const char *name,
+ struct resource *resource, u32 num_resources);
+
+#endif /* __ARCH_SH_CPU_PFC_H__ */
@@ -184,7 +184,7 @@ enum {
/* SIUA */
GPIO_FN_SIUAFCK, GPIO_FN_SIUAILR, GPIO_FN_SIUAIBT, GPIO_FN_SIUAISLD,
GPIO_FN_SIUAOLR, GPIO_FN_SIUAOBT, GPIO_FN_SIUAOSLD, GPIO_FN_SIUAMCK,
- GPIO_FN_SIUAISPD, GPIO_FN_SIUOSPD,
+ GPIO_FN_SIUAISPD, GPIO_FN_SIUAOSPD,
/* SIUB */
GPIO_FN_SIUBFCK, GPIO_FN_SIUBILR, GPIO_FN_SIUBIBT, GPIO_FN_SIUBISLD,
@@ -32,24 +32,22 @@ enum {
GPIO_PD3, GPIO_PD2, GPIO_PD1, GPIO_PD0,
/* PE */
- GPIO_PE5, GPIO_PE4, GPIO_PE3, GPIO_PE2,
- GPIO_PE1, GPIO_PE0,
+ GPIO_PE7, GPIO_PE6,
/* PF */
GPIO_PF7, GPIO_PF6, GPIO_PF5, GPIO_PF4,
GPIO_PF3, GPIO_PF2, GPIO_PF1, GPIO_PF0,
/* PG */
- GPIO_PG7, GPIO_PG6, GPIO_PG5, GPIO_PG4,
- GPIO_PG3, GPIO_PG2, GPIO_PG1, GPIO_PG0,
+ GPIO_PG7, GPIO_PG6, GPIO_PG5,
/* PH */
GPIO_PH7, GPIO_PH6, GPIO_PH5, GPIO_PH4,
GPIO_PH3, GPIO_PH2, GPIO_PH1, GPIO_PH0,
/* PJ */
GPIO_PJ7, GPIO_PJ6, GPIO_PJ5, GPIO_PJ4,
- GPIO_PJ3, GPIO_PJ2, GPIO_PJ1, GPIO_PJ0,
+ GPIO_PJ3, GPIO_PJ2, GPIO_PJ1,
/* DU */
GPIO_FN_DCLKIN, GPIO_FN_DCLKOUT, GPIO_FN_ODDF,
@@ -18,4 +18,4 @@ obj-$(CONFIG_ARCH_SHMOBILE) += shmobile/
obj-$(CONFIG_SH_ADC) += adc.o
obj-$(CONFIG_SH_CLK_CPG_LEGACY) += clock-cpg.o
-obj-y += irq/ init.o clock.o fpu.o proc.o
+obj-y += irq/ init.o clock.o fpu.o pfc.o proc.o
View
@@ -0,0 +1,33 @@
+/*
+ * SH Pin Function Control Initialization
+ *
+ * Copyright (C) 2012 Renesas Solutions Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/init.h>
+#include <linux/platform_device.h>
+
+#include <cpu/pfc.h>
+
+static struct platform_device sh_pfc_device = {
+ .id = -1,
+};
+
+int __init sh_pfc_register(const char *name,
+ struct resource *resource, u32 num_resources)
+{
+ sh_pfc_device.name = name;
+ sh_pfc_device.num_resources = num_resources;
+ sh_pfc_device.resource = resource;
+
+ return platform_device_register(&sh_pfc_device);
+}
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