diff --git a/manticore/native/cpu/arm.py b/manticore/native/cpu/arm.py
index 0def2f980..7a4f0c8f2 100644
--- a/manticore/native/cpu/arm.py
+++ b/manticore/native/cpu/arm.py
@@ -1510,13 +1510,9 @@ def STMDA(cpu, base, *regs):
     def STMDB(cpu, base, *regs):
         cpu._STM(cs.arm.ARM_INS_STMDB, base, regs)
 
-    def _bitwise_instruction(cpu, operation, dest, op1, op2=None):
-        if op2:
-            op2_val, carry = op2.read(with_carry=True)
-            result = operation(op1.read(), op2_val)
-        else:
-            op1_val, carry = op1.read(with_carry=True)
-            result = operation(op1_val)
+    def _bitwise_instruction(cpu, operation, dest, op1, op2):
+        op2_val, carry = op2.read(with_carry=True)
+        result = operation(op1.read(), op2_val)
         if dest is not None:
             dest.write(result)
         cpu.set_flags(C=carry, N=HighBit(result), Z=(result == 0))