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PicoRV32 - A Size-Optimized RISC-V CPU
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MNT VA2000, an Open Source Amiga 2/3/4000 Graphics Card (Zorro II/III), written in Verilog
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RTL, Cmodel, and testbench for NVDLA
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The Ultra-Low Power RISC Core
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opensouce RISC-V implemented from scratch in one night!
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An open source GPU based off of the AMD Southern Islands ISA.
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Silicon proven Verilog library for IC and FPGA designers
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HDL libraries and projects
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A small, light weight, RISC CPU soft core
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MIPS CPU implemented in Verilog
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mor1kx - an OpenRISC 1000 processor IP core
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Verilog Ethernet components
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🌟 IceZUM Alhambra: an Arduino-like Open FPGA electronic board -
Aprender a diseñar sistemas digitales sintetizables en FPGAs usando SOLO herramientas libres #verilog #icestorm #lattice #Linux
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A litecoin scrypt miner implemented with FPGA on-chip memory.
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High performance motor control
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VHDL implementation of the RISC-V System-on-Chip based on bare "Rocket Chip".
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NetFPGA 1G infrastructure and gateware
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An open source library for image processing on FPGA.
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Enabling Flexible FPGA High-Level Synthesis of Tensorflow Deep Neural Networks
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RISC-V Formal Verification Framework
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Open source implementation of a x86 processor
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Repository for basic (and not so basic) Verilog blocks with high re-use potential
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Defines a lossless compressed data format that is independent of CPU type, operating system, file system, and character set, and is suitable for compression using the XP10 algorithm.
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RIDECORE (RIsc-v Dynamic Execution CORE) is an Out-of-Order RISC-V processor written in Verilog HDL.
