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  1. Files used with hackster examples

    VHDL 23 11 Built by @ATaylorCEngFIET
  2. Arduino MIPI DSI Shield

    VHDL 222 68 Built by @twlostow
  3. A completely open source implementation of a Bitcoin Miner for Altera and Xilinx FPGAs. This project hopes to promote the free and open development of FPGA based mining solutions and secure the future of the Bitcoin project as a whole. A binary release is currently available for the Terasic DE2-115 Development Board, and there are compile-able p…

    VHDL 830 420 Built by @fpgaminer @IAmNotDorian @teknohog @progranism @makomk
  4. Official repository of the AWS EC2 FPGA Hardware and Software Development Kit

    VHDL 760 270 Built by @kristopk @AWSGH @AWSwinefred @AWSNB @AWSaalluri
  5. A work-in-progress for what is to be a software-free web server for static content.

    VHDL 722 32 Built by @hamsternz @JackAWatt
  6. VHDL 2008/93/87 simulator

    VHDL 689 126 Built by @tgingold @gingold-adacore @Paebbels @1138-4EB @Brian-Drummond
  7. GPL v3 2D/3D graphics engine in verilog

    VHDL 432 88 Built by @asicguy
  8. Parallella board design files

    VHDL 369 171 Built by @aolofsson @avivbur @olofk @oz-shmueli
  9. Community created parallella projects

    VHDL 368 141 Built by @olajep @aolofsson @wizard97 @9600 @DonQuichotteComputers
  10. VUnit is a unit testing framework for VHDL/SystemVerilog

    VHDL 289 108 Built by @kraigher @LarsAsplund @slaweksiluk @umarcor @1138-4EB
  11. VHDL compiler and simulator

    VHDL 280 45 Built by @nickg @hiyuh @mitchsm @peteut @kraigher
  12. GameCube Digital AV converter

    VHDL 259 44 Built by @ikorb @thekevbot
  13. Core sources and tools for the MIST board

    VHDL 254 50 Built by @harbaum @gyurco @renaudhelias @wsoltys @sebdel
  14. IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Technische Universität Dresden, Germany

    VHDL 242 57 Built by @Paebbels @preusser @mzabeltud @cjchin @FranzForstmayr
  15. A 32-bit RISC-V / MIPS ISA retargetable CPU core & SoC, 1.63 DMIPS/MHz

    VHDL 225 73 Built by @gornjas @emard @goran-mahovlic @XarkLabs @ojura
  16. RISC-V by VectorBlox

    VHDL 209 46 Built by @vanjoe @rdeiaco @vbx-aseverance @prashantrar
  17. Reverse engineered SystemVerilog RTL version of the Yamaha OPL3 (YMF262) FM Synthesizer

    VHDL 192 26 Built by @gtaylormb @stohrendorf
  18. A completely open source implementation of a Bitcoin Miner for Altera and Xilinx FPGAs. This project hopes to promote the free and open development of FPGA based mining solutions and secure the future of the Bitcoin project as a whole. A binary release is currently available for the Terasic DE2-115 Development Board, and there are compile-able p…

    VHDL 148 420 Built by @fpgaminer @IAmNotDorian @teknohog @progranism @makomk
  19. A Forth CPU and System on a Chip, based on the J1, written in VHDL

    VHDL 148 10 Built by @howerj
  20. An implementation of DisplayPort protocol for FPGAs

    VHDL 147 22 Built by @hamsternz @pwolf23
  21. Open Source 4k CSI-2 Rx core for Xilinx FPGAs

    VHDL 142 44 Built by @daveshah1 @olofk
  22. Space Invaders game implemented with VHDL

    VHDL 130 14 Built by @fabioperez
  23. Public repository for PicoEVB (Xilinx Artix XC7A50T based)

    VHDL 117 23 Built by @RHSResearchLLC @joshrsmith
  24. A simple RISC-V processor for use in FPGA designs.

    VHDL 112 16 Built by @skordal @siorpaes
  25. Original hand-coded firmware for the HDMI2USB - HDMI/DVI Capture - project

    VHDL 97 24 Built by @mithro @shenki @ajitmathew @makestuff @jahanzeb
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