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MFC r257305:

  Add preliminary support for RTL8168G, RTL8168GU and RTL8411B.
  RTL8168GU has two variants(GMII and MII) but it uses the same chip
  revision id.  Driver checks PCI device id of controller and
  sets internal capability flag(i.e. jumbo frame and link speed down
  in WOL).
Approved by:	re (delphij)
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1 parent 2d1cef2 commit a23f29cf609aad19c131c079deec7d25ac39dc64 yongari committed Nov 4, 2013
Showing with 23 additions and 2 deletions.
  1. +20 −2 sys/dev/re/if_re.c
  2. +3 −0 sys/pci/if_rlreg.h
View
@@ -181,7 +181,7 @@ static const struct rl_type re_devs[] = {
{ RT_VENDORID, RT_DEVICEID_8101E, 0,
"RealTek 810xE PCIe 10/100baseTX" },
{ RT_VENDORID, RT_DEVICEID_8168, 0,
- "RealTek 8168/8111 B/C/CP/D/DP/E/F PCIe Gigabit Ethernet" },
+ "RealTek 8168/8111 B/C/CP/D/DP/E/F/G PCIe Gigabit Ethernet" },
{ RT_VENDORID, RT_DEVICEID_8169, 0,
"RealTek 8169/8169S/8169SB(L)/8110S/8110SB(L) Gigabit Ethernet" },
{ RT_VENDORID, RT_DEVICEID_8169SC, 0,
@@ -234,7 +234,10 @@ static const struct rl_hwrev re_hwrevs[] = {
{ RL_HWREV_8168E, RL_8169, "8168E/8111E", RL_JUMBO_MTU_9K},
{ RL_HWREV_8168E_VL, RL_8169, "8168E/8111E-VL", RL_JUMBO_MTU_6K},
{ RL_HWREV_8168F, RL_8169, "8168F/8111F", RL_JUMBO_MTU_9K},
+ { RL_HWREV_8168G, RL_8169, "8168G/8111G", RL_JUMBO_MTU_9K},
+ { RL_HWREV_8168GU, RL_8169, "8168GU/8111GU", RL_JUMBO_MTU_9K},
{ RL_HWREV_8411, RL_8169, "8411", RL_JUMBO_MTU_9K},
+ { RL_HWREV_8411B, RL_8169, "8411B", RL_JUMBO_MTU_9K},
{ 0, 0, NULL, 0 }
};
@@ -1459,12 +1462,25 @@ re_attach(device_t dev)
break;
case RL_HWREV_8168E_VL:
case RL_HWREV_8168F:
+ case RL_HWREV_8168G:
case RL_HWREV_8411:
+ case RL_HWREV_8411B:
sc->rl_flags |= RL_FLAG_PHYWAKE | RL_FLAG_PAR |
RL_FLAG_DESCV2 | RL_FLAG_MACSTAT | RL_FLAG_CMDSTOP |
RL_FLAG_AUTOPAD | RL_FLAG_JUMBOV2 |
RL_FLAG_CMDSTOP_WAIT_TXQ | RL_FLAG_WOL_MANLINK;
break;
+ case RL_HWREV_8168GU:
+ if (pci_get_device(dev) == RT_DEVICEID_8101E) {
+ /* RTL8106EUS */
+ sc->rl_flags |= RL_FLAG_FASTETHER;
+ } else
+ sc->rl_flags |= RL_FLAG_JUMBOV2 | RL_FLAG_WOL_MANLINK;
+
+ sc->rl_flags |= RL_FLAG_PHYWAKE | RL_FLAG_PAR |
+ RL_FLAG_DESCV2 | RL_FLAG_MACSTAT | RL_FLAG_CMDSTOP |
+ RL_FLAG_AUTOPAD | RL_FLAG_CMDSTOP_WAIT_TXQ;
+ break;
case RL_HWREV_8169_8110SB:
case RL_HWREV_8169_8110SBL:
case RL_HWREV_8169_8110SC:
@@ -3335,7 +3351,9 @@ re_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
switch (command) {
case SIOCSIFMTU:
if (ifr->ifr_mtu < ETHERMIN ||
- ifr->ifr_mtu > sc->rl_hwrev->rl_max_mtu) {
+ ifr->ifr_mtu > sc->rl_hwrev->rl_max_mtu ||
+ ((sc->rl_flags & RL_FLAG_FASTETHER) != 0 &&
+ ifr->ifr_mtu > RL_MTU)) {
error = EINVAL;
break;
}
View
@@ -192,6 +192,9 @@
#define RL_HWREV_8106E 0x44800000
#define RL_HWREV_8168F 0x48000000
#define RL_HWREV_8411 0x48800000
+#define RL_HWREV_8168G 0x4C000000
+#define RL_HWREV_8168GU 0x50800000
+#define RL_HWREV_8411B 0x5C800000
#define RL_HWREV_8139 0x60000000
#define RL_HWREV_8139A 0x70000000
#define RL_HWREV_8139AG 0x70800000

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