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feat: extend to 900MHz

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edy555 committed Jul 24, 2019
1 parent 9681d9b commit 10a58f95804c15ddc9dd84c40f799fe977d96ee4
Showing with 8 additions and 4 deletions.
  1. +1 −1 main.c
  2. +7 −3 si5351.c
2 main.c
@@ -587,7 +587,7 @@ freq_mode_centerspan(void)


#define START_MIN 50000
#define STOP_MAX 300000000
#define STOP_MAX 900000000

void
set_sweep_frequency(int type, float frequency)
@@ -309,6 +309,10 @@ si5351_set_frequency_with_offset(int freq, int offset, uint8_t drive_strength)
int delay = 5;
uint32_t ofreq = freq + offset;
uint32_t rdiv = SI5351_R_DIV_1;
if (freq > 300000000) {
freq /= 3;
ofreq /= 5;
}
if (freq <= 100000000) {
band = 0;
} else if (freq < 150000000) {
@@ -356,13 +360,13 @@ si5351_set_frequency_with_offset(int freq, int offset, uint8_t drive_strength)
case 1:
// Set PLL twice on changing from band 2
if (current_band == 2) {
si5351_set_frequency_fixeddiv(0, SI5351_PLL_A, freq + offset, 6,
si5351_set_frequency_fixeddiv(0, SI5351_PLL_A, ofreq, 6,
SI5351_CLK_DRIVE_STRENGTH_2MA);
si5351_set_frequency_fixeddiv(1, SI5351_PLL_B, freq, 6, drive_strength);
}

// div by 6 mode. both PLL A and B are dedicated for CLK0, CLK1
si5351_set_frequency_fixeddiv(0, SI5351_PLL_A, freq + offset, 6,
si5351_set_frequency_fixeddiv(0, SI5351_PLL_A, ofreq, 6,
SI5351_CLK_DRIVE_STRENGTH_2MA);
si5351_set_frequency_fixeddiv(1, SI5351_PLL_B, freq, 6, drive_strength);
si5351_set_frequency_fixedpll(2, SI5351_PLL_B, freq * 6, CLK2_FREQUENCY,
@@ -374,7 +378,7 @@ si5351_set_frequency_with_offset(int freq, int offset, uint8_t drive_strength)
si5351_set_frequency_fixeddiv(1, SI5351_PLL_B, freq, 4, drive_strength);
si5351_set_frequency_fixedpll(2, SI5351_PLL_B, freq * 4, CLK2_FREQUENCY,
SI5351_R_DIV_1, SI5351_CLK_DRIVE_STRENGTH_2MA);
si5351_set_frequency_fixeddiv(0, SI5351_PLL_A, freq + offset, 4,
si5351_set_frequency_fixeddiv(0, SI5351_PLL_A, ofreq, 4,
SI5351_CLK_DRIVE_STRENGTH_2MA);
break;
}

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