chipyard/sims/firesim-staging/sample_config_build_recipes.yaml at dbc082e2206f787c3aba12b9b171e1704e15b707 · ucb-bar/chipyard · GitHub

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# Build-time build recipe configuration for the FireSim Simulation Manager

# Quad-core, Rocket-based recipes
# REQUIRED FOR TUTORIALS
firesim_rocket_quadcore_nic_l2_llc4mb_ddr3:
    PLATFORM: f1
    TARGET_PROJECT: firesim
    TARGET_PROJECT_MAKEFRAG: ../../generators/firechip/chip/src/main/makefrag/firesim
    DESIGN: FireSim
    TARGET_CONFIG: WithNIC_WithDefaultFireSimBridges_WithFireSimHighPerfConfigTweaks_chipyard.QuadRocketConfig
    PLATFORM_CONFIG: WithAutoILA_FRFCFS16GBQuadRankLLC4MB_BaseF1Config
    deploy_quintuplet: null
    platform_config_args:
        fpga_frequency: 90
        build_strategy: TIMING
    post_build_hook: null
    metasim_customruntimeconfig: null
    bit_builder_recipe: bit-builder-recipes/f1.yaml

# NB: This has a faster host-clock frequency than the NIC-based design, because
# its uncore runs at half rate relative to the tile.
firesim_rocket_quadcore_no_nic_l2_llc4mb_ddr3:
    PLATFORM: f1
    TARGET_PROJECT: firesim
    TARGET_PROJECT_MAKEFRAG: ../../generators/firechip/chip/src/main/makefrag/firesim
    DESIGN: FireSim
    TARGET_CONFIG: WithDefaultFireSimBridges_WithFireSimTestChipConfigTweaks_chipyard.QuadRocketConfig
    PLATFORM_CONFIG: WithAutoILA_FRFCFS16GBQuadRankLLC4MB_BaseF1Config
    deploy_quintuplet: null
    platform_config_args:
        fpga_frequency: 140
        build_strategy: TIMING
    post_build_hook: null
    metasim_customruntimeconfig: null
    bit_builder_recipe: bit-builder-recipes/f1.yaml

# Single-core, BOOM-based recipes
# REQUIRED FOR TUTORIALS
firesim_boom_singlecore_nic_l2_llc4mb_ddr3:
    PLATFORM: f1
    TARGET_PROJECT: firesim
    TARGET_PROJECT_MAKEFRAG: ../../generators/firechip/chip/src/main/makefrag/firesim
    DESIGN: FireSim
    TARGET_CONFIG: WithNIC_WithDefaultFireSimBridges_WithFireSimHighPerfConfigTweaks_chipyard.LargeBoomV3Config
    PLATFORM_CONFIG: WithAutoILA_FRFCFS16GBQuadRankLLC4MB_BaseF1Config
    deploy_quintuplet: null
    platform_config_args:
        fpga_frequency: 65
        build_strategy: TIMING
    post_build_hook: null
    metasim_customruntimeconfig: null
    bit_builder_recipe: bit-builder-recipes/f1.yaml

# NB: This has a faster host-clock frequency than the NIC-based design, because
# its uncore runs at half rate relative to the tile.
firesim_boom_singlecore_no_nic_l2_llc4mb_ddr3:
    PLATFORM: f1
    TARGET_PROJECT: firesim
    TARGET_PROJECT_MAKEFRAG: ../../generators/firechip/chip/src/main/makefrag/firesim
    DESIGN: FireSim
    TARGET_CONFIG: WithDefaultFireSimBridges_WithFireSimTestChipConfigTweaks_chipyard.LargeBoomV3Config
    PLATFORM_CONFIG: WithAutoILA_FRFCFS16GBQuadRankLLC4MB_BaseF1Config
    deploy_quintuplet: null
    platform_config_args:
        fpga_frequency: 65
        build_strategy: TIMING
    post_build_hook: null
    metasim_customruntimeconfig: null
    bit_builder_recipe: bit-builder-recipes/f1.yaml

# Single-core, CVA6-based recipes
firesim_cva6_singlecore_no_nic_l2_llc4mb_ddr3:
    PLATFORM: f1
    TARGET_PROJECT: firesim
    TARGET_PROJECT_MAKEFRAG: ../../generators/firechip/chip/src/main/makefrag/firesim
    DESIGN: FireSim
    TARGET_CONFIG: WithDefaultFireSimBridges_WithFireSimConfigTweaks_chipyard.CVA6Config
    PLATFORM_CONFIG: WithAutoILA_FRFCFS16GBQuadRankLLC4MB_BaseF1Config
    deploy_quintuplet: null
    platform_config_args:
        fpga_frequency: 90
        build_strategy: TIMING
    post_build_hook: null
    metasim_customruntimeconfig: null
    bit_builder_recipe: bit-builder-recipes/f1.yaml

# Single-core, Rocket-based recipes with Gemmini
firesim_rocket_singlecore_gemmini_no_nic_l2_llc4mb_ddr3:
    PLATFORM: f1
    TARGET_PROJECT: firesim
    TARGET_PROJECT_MAKEFRAG: ../../generators/firechip/chip/src/main/makefrag/firesim
    DESIGN: FireSim
    TARGET_CONFIG: WithDefaultFireSimBridges_WithFireSimConfigTweaks_chipyard.GemminiRocketConfig
    PLATFORM_CONFIG: WithAutoILA_FRFCFS16GBQuadRankLLC4MB_BaseF1Config
    deploy_quintuplet: null
    platform_config_args:
        fpga_frequency: 110
        build_strategy: TIMING
    post_build_hook: null
    metasim_customruntimeconfig: null
    bit_builder_recipe: bit-builder-recipes/f1.yaml

# RAM Optimizations enabled by adding _MCRams PLATFORM_CONFIG string
firesim_boom_singlecore_no_nic_l2_llc4mb_ddr3_ramopts:
    PLATFORM: f1
    TARGET_PROJECT: firesim
    TARGET_PROJECT_MAKEFRAG: ../../generators/firechip/chip/src/main/makefrag/firesim
    DESIGN: FireSim
    TARGET_CONFIG: WithDefaultFireSimBridges_WithFireSimTestChipConfigTweaks_chipyard.LargeBoomV3Config
    PLATFORM_CONFIG: WithAutoILA_MCRams_FRFCFS16GBQuadRankLLC4MB_BaseF1Config
    deploy_quintuplet: null
    platform_config_args:
        fpga_frequency: 90
        build_strategy: TIMING
    post_build_hook: null
    metasim_customruntimeconfig: null
    bit_builder_recipe: bit-builder-recipes/f1.yaml

# Supernode configurations -- multiple instances of an SoC in a single simulator
firesim_supernode_rocket_singlecore_nic_l2_lbp:
    PLATFORM: f1
    TARGET_PROJECT: firesim
    TARGET_PROJECT_MAKEFRAG: ../../generators/firechip/chip/src/main/makefrag/firesim
    DESIGN: FireSim
    TARGET_CONFIG: WithNIC_SupernodeFireSimRocketConfig
    PLATFORM_CONFIG: WithAutoILA_BaseF1Config
    deploy_quintuplet: null
    platform_config_args:
        fpga_frequency: 85
        build_strategy: TIMING
    post_build_hook: null
    metasim_customruntimeconfig: null
    bit_builder_recipe: bit-builder-recipes/f1.yaml

# Additional Tutorial Config
firesim_rocket_singlecore_no_nic_l2_lbp:
    PLATFORM: f1
    TARGET_PROJECT: firesim
    TARGET_PROJECT_MAKEFRAG: ../../generators/firechip/chip/src/main/makefrag/firesim
    DESIGN: FireSim
    TARGET_CONFIG: WithDefaultFireSimBridges_WithFireSimHighPerfConfigTweaks_chipyard.RocketConfig
    PLATFORM_CONFIG: BaseF1Config
    deploy_quintuplet: null
    platform_config_args:
        fpga_frequency: 90
        build_strategy: TIMING
    post_build_hook: null
    metasim_customruntimeconfig: null
    bit_builder_recipe: bit-builder-recipes/f1.yaml

# Additional Tutorial Config
firesim_rocket_singlecore_sha3_nic_l2_llc4mb_ddr3:
    PLATFORM: f1
    TARGET_PROJECT: firesim
    TARGET_PROJECT_MAKEFRAG: ../../generators/firechip/chip/src/main/makefrag/firesim
    DESIGN: FireSim
    TARGET_CONFIG: WithNIC_WithDefaultFireSimBridges_WithFireSimHighPerfConfigTweaks_chipyard.Sha3RocketConfig
    PLATFORM_CONFIG: FRFCFS16GBQuadRankLLC4MB_BaseF1Config
    deploy_quintuplet: null
    platform_config_args:
        fpga_frequency: 65
        build_strategy: TIMING
    post_build_hook: null
    metasim_customruntimeconfig: null
    bit_builder_recipe: bit-builder-recipes/f1.yaml

# Additional Tutorial Config
firesim_rocket_singlecore_sha3_no_nic_l2_llc4mb_ddr3:
    PLATFORM: f1
    TARGET_PROJECT: firesim
    TARGET_PROJECT_MAKEFRAG: ../../generators/firechip/chip/src/main/makefrag/firesim
    DESIGN: FireSim
    TARGET_CONFIG: WithDefaultFireSimBridges_WithFireSimHighPerfConfigTweaks_chipyard.Sha3RocketConfig
    PLATFORM_CONFIG: FRFCFS16GBQuadRankLLC4MB_BaseF1Config
    deploy_quintuplet: null
    platform_config_args:
        fpga_frequency: 65
        build_strategy: TIMING
    post_build_hook: null
    metasim_customruntimeconfig: null
    bit_builder_recipe: bit-builder-recipes/f1.yaml

# Additional Tutorial Config
firesim_rocket_singlecore_sha3_no_nic_l2_llc4mb_ddr3_printf:
    PLATFORM: f1
    TARGET_PROJECT: firesim
    TARGET_PROJECT_MAKEFRAG: ../../generators/firechip/chip/src/main/makefrag/firesim
    DESIGN: FireSim
    TARGET_CONFIG: WithDefaultFireSimBridges_WithFireSimHighPerfConfigTweaks_chipyard.Sha3RocketPrintfConfig
    PLATFORM_CONFIG: WithPrintfSynthesis_FRFCFS16GBQuadRankLLC4MB_BaseF1Config
    deploy_quintuplet: null
    platform_config_args:
        fpga_frequency: 30
        build_strategy: TIMING
    post_build_hook: null
    metasim_customruntimeconfig: null
    bit_builder_recipe: bit-builder-recipes/f1.yaml

# Additional Xilinx Vitis/XRT-only Config
vitis_firesim_rocket_singlecore_no_nic:
    PLATFORM: vitis
    TARGET_PROJECT: firesim
    TARGET_PROJECT_MAKEFRAG: ../../generators/firechip/chip/src/main/makefrag/firesim
    DESIGN: FireSim
    TARGET_CONFIG: FireSimRocketMMIOOnlyConfig
    PLATFORM_CONFIG: BaseVitisConfig
    deploy_quintuplet: null
    platform_config_args:
        fpga_frequency: 30 # previously reached 140. using 30 for build speed
        build_strategy: TIMING
    post_build_hook: null
    metasim_customruntimeconfig: null
    bit_builder_recipe: bit-builder-recipes/vitis.yaml

# Additional Tutorial Config
firesim_gemmini_rocket_singlecore_no_nic:
    PLATFORM: f1
    TARGET_PROJECT: firesim
    TARGET_PROJECT_MAKEFRAG: ../../generators/firechip/chip/src/main/makefrag/firesim
    DESIGN: FireSim
    TARGET_CONFIG: FireSimLeanGemminiRocketConfig
    PLATFORM_CONFIG: BaseF1Config
    deploy_quintuplet: null
    platform_config_args:
        fpga_frequency: 30 # AJG: conservative for now, later sweep for higher frequency
        build_strategy: TIMING
    post_build_hook: null
    metasim_customruntimeconfig: null
    bit_builder_recipe: bit-builder-recipes/f1.yaml

# Additional Tutorial Config
firesim_gemmini_printf_rocket_singlecore_no_nic:
    PLATFORM: f1
    TARGET_PROJECT: firesim
    TARGET_PROJECT_MAKEFRAG: ../../generators/firechip/chip/src/main/makefrag/firesim
    DESIGN: FireSim
    TARGET_CONFIG: FireSimLeanGemminiPrintfRocketConfig
    PLATFORM_CONFIG: WithPrintfSynthesis_BaseF1Config
    deploy_quintuplet: null
    platform_config_args:
        fpga_frequency: 10 # AJG: conservative for now, later sweep for higher frequency
        build_strategy: TIMING
    post_build_hook: null
    metasim_customruntimeconfig: null
    bit_builder_recipe: bit-builder-recipes/f1.yaml

# Additional Xilinx Alveo U250-only Configs
alveo_u250_firesim_rocket_singlecore_no_nic:
    PLATFORM: xilinx_alveo_u250
    TARGET_PROJECT: firesim
    TARGET_PROJECT_MAKEFRAG: ../../generators/firechip/chip/src/main/makefrag/firesim
    DESIGN: FireSim
    TARGET_CONFIG: FireSimRocketConfig
    PLATFORM_CONFIG: BaseXilinxAlveoU250Config
    deploy_quintuplet: null
    platform_config_args:
        fpga_frequency: 60
        build_strategy: TIMING
    post_build_hook: null
    metasim_customruntimeconfig: null
    bit_builder_recipe: bit-builder-recipes/xilinx_alveo_u250.yaml

alveo_u250_firesim_rocket_quadcore_no_nic:
    PLATFORM: xilinx_alveo_u250
    TARGET_PROJECT: firesim
    TARGET_PROJECT_MAKEFRAG: ../../generators/firechip/chip/src/main/makefrag/firesim
    DESIGN: FireSim
    TARGET_CONFIG: FireSimQuadRocketConfig
    PLATFORM_CONFIG: BaseXilinxAlveoU250Config
    deploy_quintuplet: null
    platform_config_args:
        fpga_frequency: 60
        build_strategy: TIMING
    post_build_hook: null
    metasim_customruntimeconfig: null
    bit_builder_recipe: bit-builder-recipes/xilinx_alveo_u250.yaml

alveo_u250_firesim_boom_singlecore_no_nic:
    PLATFORM: xilinx_alveo_u250
    TARGET_PROJECT: firesim
    TARGET_PROJECT_MAKEFRAG: ../../generators/firechip/chip/src/main/makefrag/firesim
    DESIGN: FireSim
    TARGET_CONFIG: FireSimLargeBoomConfig
    PLATFORM_CONFIG: BaseXilinxAlveoU250Config
    deploy_quintuplet: null
    platform_config_args:
        fpga_frequency: 60
        build_strategy: TIMING
    post_build_hook: null
    metasim_customruntimeconfig: null
    bit_builder_recipe: bit-builder-recipes/xilinx_alveo_u250.yaml

alveo_u250_firesim_rocket_singlecore_nic:
    PLATFORM: xilinx_alveo_u250
    TARGET_PROJECT: firesim
    TARGET_PROJECT_MAKEFRAG: ../../generators/firechip/chip/src/main/makefrag/firesim
    DESIGN: FireSim
    TARGET_CONFIG: WithNIC_FireSimRocketConfig
    PLATFORM_CONFIG: BaseXilinxAlveoU250Config
    deploy_quintuplet: null
    platform_config_args:
        fpga_frequency: 60
        build_strategy: TIMING
    post_build_hook: null
    metasim_customruntimeconfig: null
    bit_builder_recipe: bit-builder-recipes/xilinx_alveo_u250.yaml

# Additional Tutorial Config
# Additional Xilinx Alveo U250-only Config
alveo_u250_firesim_gemmini_rocket_singlecore_no_nic:
    PLATFORM: xilinx_alveo_u250
    TARGET_PROJECT: firesim
    TARGET_PROJECT_MAKEFRAG: ../../generators/firechip/chip/src/main/makefrag/firesim
    DESIGN: FireSim
    TARGET_CONFIG: FireSimLeanGemminiRocketConfig
    PLATFORM_CONFIG: BaseXilinxAlveoU250Config
    deploy_quintuplet: null
    platform_config_args:
        fpga_frequency: 60
        build_strategy: TIMING
    post_build_hook: null
    metasim_customruntimeconfig: null
    bit_builder_recipe: bit-builder-recipes/xilinx_alveo_u250.yaml

# Additional Xilinx Alveo U280-only Config
alveo_u280_firesim_rocket_singlecore_no_nic:
    PLATFORM: xilinx_alveo_u280
    TARGET_PROJECT: firesim
    TARGET_PROJECT_MAKEFRAG: ../../generators/firechip/chip/src/main/makefrag/firesim
    DESIGN: FireSim
    TARGET_CONFIG: FireSimRocketConfig
    PLATFORM_CONFIG: BaseXilinxAlveoU280Config
    deploy_quintuplet: null
    platform_config_args:
        fpga_frequency: 60
        build_strategy: TIMING
    post_build_hook: null
    metasim_customruntimeconfig: null
    bit_builder_recipe: bit-builder-recipes/xilinx_alveo_u280.yaml

# Additional Xilinx Alveo U200-only Config
alveo_u200_firesim_rocket_singlecore_no_nic:
    PLATFORM: xilinx_alveo_u200
    TARGET_PROJECT: firesim
    DESIGN: FireSim
    TARGET_CONFIG: FireSimRocketConfig
    PLATFORM_CONFIG: BaseXilinxAlveoU200Config
    deploy_quintuplet: null
    platform_config_args:
        fpga_frequency: 60
        build_strategy: TIMING
    post_build_hook: null
    metasim_customruntimeconfig: null
    bit_builder_recipe: bit-builder-recipes/xilinx_alveo_u200.yaml

# Xilinx VCU118-only Config
xilinx_vcu118_firesim_rocket_singlecore_4GB_no_nic:
    PLATFORM: xilinx_vcu118
    TARGET_PROJECT: firesim
    TARGET_PROJECT_MAKEFRAG: ../../generators/firechip/chip/src/main/makefrag/firesim
    DESIGN: FireSim
    TARGET_CONFIG: FireSimRocket4GiBDRAMConfig
    PLATFORM_CONFIG: BaseXilinxVCU118Config
    deploy_quintuplet: null
    platform_config_args:
        fpga_frequency: 90
        build_strategy: TIMING
    post_build_hook: null
    metasim_customruntimeconfig: null
    bit_builder_recipe: bit-builder-recipes/xilinx_vcu118.yaml

# RHSResearch Nitefury II-only Config
nitefury_firesim_rocket_singlecore_no_nic:
    PLATFORM: rhsresearch_nitefury_ii
    TARGET_PROJECT: firesim
    TARGET_PROJECT_MAKEFRAG: ../../generators/firechip/chip/src/main/makefrag/firesim
    DESIGN: FireSim
    TARGET_CONFIG: FireSimRocket1GiBDRAMConfig
    PLATFORM_CONFIG: BaseNitefuryConfig
    deploy_quintuplet: null
    platform_config_args:
        fpga_frequency: 50
        build_strategy: TIMING
    post_build_hook: null
    metasim_customruntimeconfig: null
    bit_builder_recipe: bit-builder-recipes/rhsresearch_nitefury_ii.yaml

# DOC include start: F1 Rocket Partition Build Recipe
################################################################################################
# Fast-mode : pull out a RocketTile out from your SoC
################################################################################################
f1_rocket_split_soc_fast:
    PLATFORM: f1
    TARGET_PROJECT: firesim
    TARGET_PROJECT_MAKEFRAG: ../../generators/firechip/chip/src/main/makefrag/firesim
    DESIGN: FireSim
    TARGET_CONFIG: FireSimRocketConfig
    PLATFORM_CONFIG: RocketTileF1PCIMBase
    deploy_quintuplet: null
    platform_config_args:
        fpga_frequency: 90
        build_strategy: TIMING
    post_build_hook: null
    metasim_customruntimeconfig: null
    bit_builder_recipe: bit-builder-recipes/f1.yaml

f1_rocket_split_tile_fast:
    PLATFORM: f1
    TARGET_PROJECT: firesim
    TARGET_PROJECT_MAKEFRAG: ../../generators/firechip/chip/src/main/makefrag/firesim
    DESIGN: FireSim
    TARGET_CONFIG: FireSimRocketConfig
    PLATFORM_CONFIG: RocketTileF1PCIMPartition0
    deploy_quintuplet: null
    platform_config_args:
        fpga_frequency: 90
        build_strategy: TIMING
    post_build_hook: null
    metasim_customruntimeconfig: null
    bit_builder_recipe: bit-builder-recipes/f1.yaml
# DOC include end: F1 Rocket Partition Build Recipe

# DOC include start: F1 Exact Rocket Partition Build Recipe
################################################################################################
# Exact-mode : pull out a RocketTile out from your SoC
################################################################################################
f1_firesim_rocket_soc_exact:
    PLATFORM: f1
    TARGET_PROJECT: firesim
    DESIGN: FireSim
    TARGET_CONFIG: FireSimRocketConfig
    TARGET_PROJECT_MAKEFRAG: ../../generators/firechip/chip/src/main/makefrag/firesim
    PLATFORM_CONFIG: ExactMode_RocketTileF1PCIMBase
    deploy_quintuplet: null
    platform_config_args:
        fpga_frequency: 90
        build_strategy: TIMING
    post_build_hook: null
    metasim_customruntimeconfig: null
    bit_builder_recipe: bit-builder-recipes/f1.yaml

f1_firesim_rocket_tile_exact:
    PLATFORM: f1
    TARGET_PROJECT: firesim
    TARGET_PROJECT_MAKEFRAG: ../../generators/firechip/chip/src/main/makefrag/firesim
    DESIGN: FireSim
    TARGET_CONFIG: FireSimRocketConfig
    PLATFORM_CONFIG: ExactMode_RocketTileF1PCIMPartition0
    deploy_quintuplet: null
    platform_config_args:
        fpga_frequency: 90
        build_strategy: TIMING
    post_build_hook: null
    metasim_customruntimeconfig: null
    bit_builder_recipe: bit-builder-recipes/f1.yaml
# DOC include end: F1 Exact Rocket Partition Build Recipe

##############################################################################
# Splitting the design onto 3 FPGAs
##############################################################################
xilinx_u250_firesim_dual_rocket_split_base:
    PLATFORM: xilinx_alveo_u250
    TARGET_PROJECT: firesim
    TARGET_PROJECT_MAKEFRAG: ../../generators/firechip/chip/src/main/makefrag/firesim
    DESIGN: FireSim
    TARGET_CONFIG: WithDefaultFireSimBridges_WithFireSimConfigTweaks_chipyard.DualRocketConfig
    PLATFORM_CONFIG: DualRocketTileQSFPBase
    deploy_quintuplet: null
    platform_config_args:
        fpga_frequency: 90
        build_strategy: TIMING
    post_build_hook: null
    metasim_customruntimeconfig: null
    bit_builder_recipe: bit-builder-recipes/xilinx_alveo_u250.yaml

xilinx_u250_firesim_dual_rocket_split_0:
    PLATFORM: xilinx_alveo_u250
    TARGET_PROJECT: firesim
    TARGET_PROJECT_MAKEFRAG: ../../generators/firechip/chip/src/main/makefrag/firesim
    DESIGN: FireSim
    TARGET_CONFIG: WithDefaultFireSimBridges_WithFireSimConfigTweaks_chipyard.DualRocketConfig
    PLATFORM_CONFIG: DualRocketTileQSFP0
    deploy_quintuplet: null
    platform_config_args:
        fpga_frequency: 90
        build_strategy: TIMING
    post_build_hook: null
    metasim_customruntimeconfig: null
    bit_builder_recipe: bit-builder-recipes/xilinx_alveo_u250.yaml

xilinx_u250_firesim_dual_rocket_split_1:
    PLATFORM: xilinx_alveo_u250
    TARGET_PROJECT: firesim
    TARGET_PROJECT_MAKEFRAG: ../../generators/firechip/chip/src/main/makefrag/firesim
    DESIGN: FireSim
    TARGET_CONFIG: WithDefaultFireSimBridges_WithFireSimConfigTweaks_chipyard.DualRocketConfig
    PLATFORM_CONFIG: DualRocketTileQSFP1
    deploy_quintuplet: null
    platform_config_args:
        fpga_frequency: 90
        build_strategy: TIMING
    post_build_hook: null
    metasim_customruntimeconfig: null
    bit_builder_recipe: bit-builder-recipes/xilinx_alveo_u250.yaml

# DOC include start: Xilinx U250 NoC Partition Build Recipe
##############################################################################
# Using the NoC-partition-mode to partition the design across 3 FPGAs
# connected as a ring.
##############################################################################
xilinx_u250_quad_rocket_ring_base:
    PLATFORM: xilinx_alveo_u250
    TARGET_PROJECT: firesim
    TARGET_PROJECT_MAKEFRAG: ../../generators/firechip/chip/src/main/makefrag/firesim
    DESIGN: FireSim
    TARGET_CONFIG: FireSimQuadRocketSbusRingNoCConfig
    PLATFORM_CONFIG: QuadTileRingNoCBase
    deploy_quintuplet: null
    platform_config_args:
        fpga_frequency: 90
        build_strategy: TIMING
    post_build_hook: null
    metasim_customruntimeconfig: null
    bit_builder_recipe: bit-builder-recipes/xilinx_alveo_u250.yaml

xilinx_u250_quad_rocket_ring_0:
    PLATFORM: xilinx_alveo_u250
    TARGET_PROJECT: firesim
    TARGET_PROJECT_MAKEFRAG: ../../generators/firechip/chip/src/main/makefrag/firesim
    DESIGN: FireSim
    TARGET_CONFIG: FireSimQuadRocketSbusRingNoCConfig
    PLATFORM_CONFIG: QuadTileRingNoC0
    deploy_quintuplet: null
    platform_config_args:
        fpga_frequency: 90
        build_strategy: TIMING
    post_build_hook: null
    metasim_customruntimeconfig: null
    bit_builder_recipe: bit-builder-recipes/xilinx_alveo_u250.yaml

xilinx_u250_quad_rocket_ring_1:
    PLATFORM: xilinx_alveo_u250
    TARGET_PROJECT: firesim
    TARGET_PROJECT_MAKEFRAG: ../../generators/firechip/chip/src/main/makefrag/firesim
    DESIGN: FireSim
    TARGET_CONFIG: FireSimQuadRocketSbusRingNoCConfig
    PLATFORM_CONFIG: QuadTileRingNoC1
    deploy_quintuplet: null
    platform_config_args:
        fpga_frequency: 90
        build_strategy: TIMING
    post_build_hook: null
    metasim_customruntimeconfig: null
    bit_builder_recipe: bit-builder-recipes/xilinx_alveo_u250.yaml
# DOC include end: Xilinx U250 NoC Partition Build Recipe