From d8bbc71821786ca129000e18d44aaa07ec15e668 Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Tue, 9 May 2023 17:20:12 -0700 Subject: [PATCH 1/5] Always generate objdump for run-binary-debug targets --- common.mk | 3 +++ 1 file changed, 3 insertions(+) diff --git a/common.mk b/common.mk index cf2236ff1c..a8e2e9a83f 100644 --- a/common.mk +++ b/common.mk @@ -309,6 +309,9 @@ run-binary-fast: $(SIM_PREREQ) check-binary | $(output_dir) # run simulator with as much debug info as possible run-binary-debug: $(SIM_DEBUG_PREREQ) check-binary | $(output_dir) +ifneq (none,$(BINARY)) + riscv64-unknown-elf-objdump -D $(BINARY) > $(sim_out_name).dump +endif (set -o pipefail && $(NUMA_PREFIX) $(sim_debug) $(PERMISSIVE_ON) $(SIM_FLAGS) $(EXTRA_SIM_FLAGS) $(SEED_FLAG) $(VERBOSE_FLAGS) $(WAVEFORM_FLAG) $(PERMISSIVE_OFF) $(BINARY) >(spike-dasm > $(sim_out_name).out) | tee $(sim_out_name).log) run-fast: run-asm-tests-fast run-bmark-tests-fast From ff3b66e2f2a0658e5e4fed8c89017c63174eb2f2 Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Tue, 9 May 2023 17:38:46 -0700 Subject: [PATCH 2/5] Makefile should error if BINARY is set incorrectly --- common.mk | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/common.mk b/common.mk index a8e2e9a83f..2dce97ec9b 100644 --- a/common.mk +++ b/common.mk @@ -292,6 +292,11 @@ check-binary: ifeq (,$(BINARY)) $(error BINARY variable is not set. Set it to the simulation binary) endif +ifneq (none,$(BINARY)) +ifeq ("$(wildcard $(BINARY))","") + $(error BINARY=$(BINARY) not found) +endif +endif # allow you to override sim prereq ifeq (,$(BREAK_SIM_PREREQ)) From 94f83e319a830678646225ac186dc24c2d281f7b Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Tue, 9 May 2023 17:39:48 -0700 Subject: [PATCH 3/5] Fix bugs in spike-cosim --- .../src/main/resources/csrc/cospike.cc | 21 ++++++++++--------- 1 file changed, 11 insertions(+), 10 deletions(-) diff --git a/generators/chipyard/src/main/resources/csrc/cospike.cc b/generators/chipyard/src/main/resources/csrc/cospike.cc index f531e61f55..6cf8910b39 100644 --- a/generators/chipyard/src/main/resources/csrc/cospike.cc +++ b/generators/chipyard/src/main/resources/csrc/cospike.cc @@ -284,9 +284,9 @@ extern "C" void cospike_cosim(long long int cycle, printf("%d exception %lx\n", cycle, cause); if (valid) { printf("%d Cosim: %lx", cycle, iaddr); - if (has_wdata) { - printf(" s: %lx", wdata); - } + // if (has_wdata) { + // printf(" s: %lx", wdata); + // } printf("\n"); } if (valid || raise_interrupt || raise_exception) { @@ -299,7 +299,7 @@ extern "C" void cospike_cosim(long long int cycle, } } - if (valid) { + if (valid && !raise_exception) { if (s_pc != iaddr) { printf("%d PC mismatch spike %llx != DUT %llx\n", cycle, s_pc, iaddr); if (unlikely(cospike_debug)) { @@ -373,12 +373,13 @@ extern "C" void cospike_cosim(long long int cycle, bool csr_read = (insn & 0x7f) == 0x73; if (csr_read) printf("CSR read %lx\n", csr_addr); - if (csr_read && ((csr_addr == 0xf13) || // mimpid - (csr_addr == 0xf12) || // marchid - (csr_addr == 0xf11) || // mvendorid - (csr_addr == 0xb00) || // mcycle - (csr_addr == 0xb02) || // minstret - (csr_addr >= 0x3b0 && csr_addr <= 0x3ef) // pmpaddr + if (csr_read && ((csr_addr == 0xf13) || // mimpid + (csr_addr == 0xf12) || // marchid + (csr_addr == 0xf11) || // mvendorid + (csr_addr == 0xb00) || // mcycle + (csr_addr == 0xb02) || // minstret + (csr_addr >= 0x7a0 && csr_addr <= 0x7aa) || // debug trigger registers + (csr_addr >= 0x3b0 && csr_addr <= 0x3ef) // pmpaddr )) { printf("CSR override\n"); s->XPR.write(rd, wdata); From c2ca66ac4d2f534f522fcae47aff95a7422b4287 Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Wed, 17 May 2023 15:21:11 -0700 Subject: [PATCH 4/5] Support ssip interrupts in spike-cosim --- generators/chipyard/src/main/resources/csrc/cospike.cc | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/generators/chipyard/src/main/resources/csrc/cospike.cc b/generators/chipyard/src/main/resources/csrc/cospike.cc index 6cf8910b39..dd60d07882 100644 --- a/generators/chipyard/src/main/resources/csrc/cospike.cc +++ b/generators/chipyard/src/main/resources/csrc/cospike.cc @@ -266,12 +266,15 @@ extern "C" void cospike_cosim(long long int cycle, #endif uint64_t s_pc = s->pc; uint64_t interrupt_cause = cause & 0x7FFFFFFFFFFFFFFF; + bool ssip_interrupt = interrupt_cause == 0x1; bool msip_interrupt = interrupt_cause == 0x3; bool debug_interrupt = interrupt_cause == 0xe; if (raise_interrupt) { printf("%d interrupt %lx\n", cycle, cause); - if (msip_interrupt) { + if (ssip_interrupt) { + // do nothing + } else if (msip_interrupt) { s->mip->backdoor_write_with_mask(MIP_MSIP, MIP_MSIP); } else if (debug_interrupt) { return; From abf2af16b4ef6a7d9fffeff0d50d1601489a5ae1 Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Wed, 17 May 2023 16:06:24 -0700 Subject: [PATCH 5/5] Cospike should always include zicntr --- generators/chipyard/src/main/resources/csrc/cospike.cc | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/generators/chipyard/src/main/resources/csrc/cospike.cc b/generators/chipyard/src/main/resources/csrc/cospike.cc index dd60d07882..b30806ce5c 100644 --- a/generators/chipyard/src/main/resources/csrc/cospike.cc +++ b/generators/chipyard/src/main/resources/csrc/cospike.cc @@ -63,7 +63,8 @@ extern "C" void cospike_set_sysinfo(char* isa, int pmpregions, ) { if (!info) { info = new system_info_t; - info->isa = std::string(isa); + // technically the targets aren't zicntr compliant, but they implement the zicntr registers + info->isa = std::string(isa) + "_zicntr"; info->pmpregions = pmpregions; info->mem0_base = mem0_base; info->mem0_size = mem0_size;