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| target | ||
| *.jar | ||
| *.stamp | ||
| /vsim | ||
| /verisim | ||
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| Original file line number | Diff line number | Diff line change |
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| @@ -1,5 +1,3 @@ | ||
| simulator-* | ||
| generated-src/ | ||
| verilator/ | ||
| DVEfiles/ | ||
| *.log | ||
| !.gitignore | ||
| !Makefile | ||
| !Makefrag-verilator |
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| Original file line number | Diff line number | Diff line change |
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| @@ -1,7 +1,2 @@ | ||
| /DVEfiles | ||
| /csrc | ||
| /simv-* | ||
| /output | ||
| /generated-src | ||
| /ucli.key | ||
| /vc_hdrs.h | ||
| !Makefile | ||
| !.gitignore |