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Digilent Design Contest 2019 project
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constraints
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README.md
pmod_adc_reading_writing_coklu_kanal_3.ino

README.md

10ISTK---Sign-Language-Translator

#Digilent Design Contest 2019 project

#ZyboZ7-20 board is used for this project

#final_project.vhd is Top Module , vga_driver.vhd and clk_wiz_0 are components.

#Clocking wizard is used for creating 25MHz clock

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