diff --git a/bindings/dotnet/UnicornManaged/Const/Ppc.fs b/bindings/dotnet/UnicornManaged/Const/Ppc.fs
diff --git a/bindings/dotnet/UnicornManaged/Const/Riscv.fs b/bindings/dotnet/UnicornManaged/Const/Riscv.fs
@@ -13,13 +13,15 @@ module Riscv =
     let UC_CPU_RISCV32_BASE32 = 1
     let UC_CPU_RISCV32_SIFIVE_E31 = 2
     let UC_CPU_RISCV32_SIFIVE_U34 = 3
+    let UC_CPU_RISCV32_ENDING = 4
 
     // RISCV64 CPU
 
     let UC_CPU_RISCV64_ANY = 0
     let UC_CPU_RISCV64_BASE64 = 1
     let UC_CPU_RISCV64_SIFIVE_E51 = 2
     let UC_CPU_RISCV64_SIFIVE_U54 = 3
+    let UC_CPU_RISCV64_ENDING = 4
 
     // RISCV registers
 

diff --git a/bindings/dotnet/UnicornManaged/Const/S390x.fs b/bindings/dotnet/UnicornManaged/Const/S390x.fs
@@ -47,6 +47,7 @@ module S390x =
     let UC_CPU_S390X_GEN15B = 35
     let UC_CPU_S390X_QEMU = 36
     let UC_CPU_S390X_MAX = 37
+    let UC_CPU_S390X_ENDING = 38
 
     // S390X registers
 

diff --git a/bindings/dotnet/UnicornManaged/Const/Sparc.fs b/bindings/dotnet/UnicornManaged/Const/Sparc.fs
@@ -22,6 +22,7 @@ module Sparc =
     let UC_CPU_SPARC32_TI_SUPERSPARC_II = 10
     let UC_CPU_SPARC32_LEON2 = 11
     let UC_CPU_SPARC32_LEON3 = 12
+    let UC_CPU_SPARC32_ENDING = 13
 
     // SPARC64 CPU
 
@@ -42,6 +43,7 @@ module Sparc =
     let UC_CPU_SPARC64_SUN_ULTRASPARC_T1 = 14
     let UC_CPU_SPARC64_SUN_ULTRASPARC_T2 = 15
     let UC_CPU_SPARC64_NEC_ULTRASPARC_I = 16
+    let UC_CPU_SPARC64_ENDING = 17
 
     // SPARC registers
 

diff --git a/bindings/dotnet/UnicornManaged/Const/X86.fs b/bindings/dotnet/UnicornManaged/Const/X86.fs
@@ -47,6 +47,7 @@ module X86 =
     let UC_CPU_X86_EPYC = 35
     let UC_CPU_X86_DHYANA = 36
     let UC_CPU_X86_EPYC_ROME = 37
+    let UC_CPU_X86_ENDING = 38
 
     // X86 registers
 

diff --git a/bindings/go/unicorn/arm64_const.go b/bindings/go/unicorn/arm64_const.go
@@ -4,10 +4,11 @@ const (
 
 // ARM64 CPU
 
-	CPU_AARCH64_A57 = 0
-	CPU_AARCH64_A53 = 1
-	CPU_AARCH64_A72 = 2
-	CPU_AARCH64_MAX = 3
+	CPU_ARM64_A57 = 0
+	CPU_ARM64_A53 = 1
+	CPU_ARM64_A72 = 2
+	CPU_ARM64_MAX = 3
+	CPU_ARM64_ENDING = 4
 
 // ARM64 registers
 

diff --git a/bindings/go/unicorn/arm_const.go b/bindings/go/unicorn/arm_const.go
@@ -38,6 +38,7 @@ const (
 	CPU_ARM_PXA270C0 = 31
 	CPU_ARM_PXA270C5 = 32
 	CPU_ARM_MAX = 33
+	CPU_ARM_ENDING = 34
 
 // ARM registers
 

diff --git a/bindings/go/unicorn/m68k_const.go b/bindings/go/unicorn/m68k_const.go
@@ -13,6 +13,7 @@ const (
 	CPU_M68K_M5208 = 6
 	CPU_M68K_CFV4E = 7
 	CPU_M68K_ANY = 8
+	CPU_M68K_ENDING = 9
 
 // M68K registers
 

diff --git a/bindings/go/unicorn/mips_const.go b/bindings/go/unicorn/mips_const.go
@@ -20,6 +20,7 @@ const (
 	CPU_MIPS32_P5600 = 13
 	CPU_MIPS32_MIPS32R6_GENERIC = 14
 	CPU_MIPS32_I7200 = 15
+	CPU_MIPS32_ENDING = 16
 
 // MIPS64 CPUS
 
@@ -36,6 +37,7 @@ const (
 	CPU_MIPS64_LOONGSON_2E = 10
 	CPU_MIPS64_LOONGSON_2F = 11
 	CPU_MIPS64_MIPS64DSPR2 = 12
+	CPU_MIPS64_ENDING = 13
 
 // MIPS registers
 

diff --git a/bindings/go/unicorn/ppc_const.go b/bindings/go/unicorn/ppc_const.go
diff --git a/bindings/go/unicorn/riscv_const.go b/bindings/go/unicorn/riscv_const.go
@@ -8,13 +8,15 @@ const (
 	CPU_RISCV32_BASE32 = 1
 	CPU_RISCV32_SIFIVE_E31 = 2
 	CPU_RISCV32_SIFIVE_U34 = 3
+	CPU_RISCV32_ENDING = 4
 
 // RISCV64 CPU
 
 	CPU_RISCV64_ANY = 0
 	CPU_RISCV64_BASE64 = 1
 	CPU_RISCV64_SIFIVE_E51 = 2
 	CPU_RISCV64_SIFIVE_U54 = 3
+	CPU_RISCV64_ENDING = 4
 
 // RISCV registers
 

diff --git a/bindings/go/unicorn/s390x_const.go b/bindings/go/unicorn/s390x_const.go
@@ -42,6 +42,7 @@ const (
 	CPU_S390X_GEN15B = 35
 	CPU_S390X_QEMU = 36
 	CPU_S390X_MAX = 37
+	CPU_S390X_ENDING = 38
 
 // S390X registers
 

diff --git a/bindings/go/unicorn/sparc_const.go b/bindings/go/unicorn/sparc_const.go
@@ -17,6 +17,7 @@ const (
 	CPU_SPARC32_TI_SUPERSPARC_II = 10
 	CPU_SPARC32_LEON2 = 11
 	CPU_SPARC32_LEON3 = 12
+	CPU_SPARC32_ENDING = 13
 
 // SPARC64 CPU
 
@@ -37,6 +38,7 @@ const (
 	CPU_SPARC64_SUN_ULTRASPARC_T1 = 14
 	CPU_SPARC64_SUN_ULTRASPARC_T2 = 15
 	CPU_SPARC64_NEC_ULTRASPARC_I = 16
+	CPU_SPARC64_ENDING = 17
 
 // SPARC registers
 

diff --git a/bindings/go/unicorn/x86_const.go b/bindings/go/unicorn/x86_const.go
@@ -42,6 +42,7 @@ const (
 	CPU_X86_EPYC = 35
 	CPU_X86_DHYANA = 36
 	CPU_X86_EPYC_ROME = 37
+	CPU_X86_ENDING = 38
 
 // X86 registers
 

diff --git a/bindings/java/unicorn/Arm64Const.java b/bindings/java/unicorn/Arm64Const.java
@@ -6,10 +6,11 @@ public interface Arm64Const {
 
 // ARM64 CPU
 
-   public static final int UC_CPU_AARCH64_A57 = 0;
-   public static final int UC_CPU_AARCH64_A53 = 1;
-   public static final int UC_CPU_AARCH64_A72 = 2;
-   public static final int UC_CPU_AARCH64_MAX = 3;
+   public static final int UC_CPU_ARM64_A57 = 0;
+   public static final int UC_CPU_ARM64_A53 = 1;
+   public static final int UC_CPU_ARM64_A72 = 2;
+   public static final int UC_CPU_ARM64_MAX = 3;
+   public static final int UC_CPU_ARM64_ENDING = 4;
 
 // ARM64 registers
 

diff --git a/bindings/java/unicorn/ArmConst.java b/bindings/java/unicorn/ArmConst.java
@@ -40,6 +40,7 @@ public interface ArmConst {
    public static final int UC_CPU_ARM_PXA270C0 = 31;
    public static final int UC_CPU_ARM_PXA270C5 = 32;
    public static final int UC_CPU_ARM_MAX = 33;
+   public static final int UC_CPU_ARM_ENDING = 34;
 
 // ARM registers
 

diff --git a/bindings/java/unicorn/M68kConst.java b/bindings/java/unicorn/M68kConst.java
@@ -15,6 +15,7 @@ public interface M68kConst {
    public static final int UC_CPU_M68K_M5208 = 6;
    public static final int UC_CPU_M68K_CFV4E = 7;
    public static final int UC_CPU_M68K_ANY = 8;
+   public static final int UC_CPU_M68K_ENDING = 9;
 
 // M68K registers
 

diff --git a/bindings/java/unicorn/MipsConst.java b/bindings/java/unicorn/MipsConst.java
@@ -22,6 +22,7 @@ public interface MipsConst {
    public static final int UC_CPU_MIPS32_P5600 = 13;
    public static final int UC_CPU_MIPS32_MIPS32R6_GENERIC = 14;
    public static final int UC_CPU_MIPS32_I7200 = 15;
+   public static final int UC_CPU_MIPS32_ENDING = 16;
 
 // MIPS64 CPUS
 
@@ -38,6 +39,7 @@ public interface MipsConst {
    public static final int UC_CPU_MIPS64_LOONGSON_2E = 10;
    public static final int UC_CPU_MIPS64_LOONGSON_2F = 11;
    public static final int UC_CPU_MIPS64_MIPS64DSPR2 = 12;
+   public static final int UC_CPU_MIPS64_ENDING = 13;
 
 // MIPS registers
 

diff --git a/bindings/java/unicorn/PpcConst.java b/bindings/java/unicorn/PpcConst.java
diff --git a/bindings/java/unicorn/RiscvConst.java b/bindings/java/unicorn/RiscvConst.java
@@ -10,13 +10,15 @@ public interface RiscvConst {
    public static final int UC_CPU_RISCV32_BASE32 = 1;
    public static final int UC_CPU_RISCV32_SIFIVE_E31 = 2;
    public static final int UC_CPU_RISCV32_SIFIVE_U34 = 3;
+   public static final int UC_CPU_RISCV32_ENDING = 4;
 
 // RISCV64 CPU
 
    public static final int UC_CPU_RISCV64_ANY = 0;
    public static final int UC_CPU_RISCV64_BASE64 = 1;
    public static final int UC_CPU_RISCV64_SIFIVE_E51 = 2;
    public static final int UC_CPU_RISCV64_SIFIVE_U54 = 3;
+   public static final int UC_CPU_RISCV64_ENDING = 4;
 
 // RISCV registers
 

diff --git a/bindings/java/unicorn/S390xConst.java b/bindings/java/unicorn/S390xConst.java
@@ -44,6 +44,7 @@ public interface S390xConst {
    public static final int UC_CPU_S390X_GEN15B = 35;
    public static final int UC_CPU_S390X_QEMU = 36;
    public static final int UC_CPU_S390X_MAX = 37;
+   public static final int UC_CPU_S390X_ENDING = 38;
 
 // S390X registers
 

diff --git a/bindings/java/unicorn/SparcConst.java b/bindings/java/unicorn/SparcConst.java
@@ -19,6 +19,7 @@ public interface SparcConst {
    public static final int UC_CPU_SPARC32_TI_SUPERSPARC_II = 10;
    public static final int UC_CPU_SPARC32_LEON2 = 11;
    public static final int UC_CPU_SPARC32_LEON3 = 12;
+   public static final int UC_CPU_SPARC32_ENDING = 13;
 
 // SPARC64 CPU
 
@@ -39,6 +40,7 @@ public interface SparcConst {
    public static final int UC_CPU_SPARC64_SUN_ULTRASPARC_T1 = 14;
    public static final int UC_CPU_SPARC64_SUN_ULTRASPARC_T2 = 15;
    public static final int UC_CPU_SPARC64_NEC_ULTRASPARC_I = 16;
+   public static final int UC_CPU_SPARC64_ENDING = 17;
 
 // SPARC registers
 

diff --git a/bindings/java/unicorn/X86Const.java b/bindings/java/unicorn/X86Const.java
@@ -44,6 +44,7 @@ public interface X86Const {
    public static final int UC_CPU_X86_EPYC = 35;
    public static final int UC_CPU_X86_DHYANA = 36;
    public static final int UC_CPU_X86_EPYC_ROME = 37;
+   public static final int UC_CPU_X86_ENDING = 38;
 
 // X86 registers
 

diff --git a/bindings/pascal/unicorn/Arm64Const.pas b/bindings/pascal/unicorn/Arm64Const.pas
@@ -7,10 +7,11 @@ interface
 const
 // ARM64 CPU
 
-  UC_CPU_AARCH64_A57 = 0;
-  UC_CPU_AARCH64_A53 = 1;
-  UC_CPU_AARCH64_A72 = 2;
-  UC_CPU_AARCH64_MAX = 3;
+  UC_CPU_ARM64_A57 = 0;
+  UC_CPU_ARM64_A53 = 1;
+  UC_CPU_ARM64_A72 = 2;
+  UC_CPU_ARM64_MAX = 3;
+  UC_CPU_ARM64_ENDING = 4;
 
 // ARM64 registers
 

diff --git a/bindings/pascal/unicorn/ArmConst.pas b/bindings/pascal/unicorn/ArmConst.pas
@@ -41,6 +41,7 @@ interface
   UC_CPU_ARM_PXA270C0 = 31;
   UC_CPU_ARM_PXA270C5 = 32;
   UC_CPU_ARM_MAX = 33;
+  UC_CPU_ARM_ENDING = 34;
 
 // ARM registers
 

diff --git a/bindings/pascal/unicorn/M68kConst.pas b/bindings/pascal/unicorn/M68kConst.pas
@@ -16,6 +16,7 @@ interface
   UC_CPU_M68K_M5208 = 6;
   UC_CPU_M68K_CFV4E = 7;
   UC_CPU_M68K_ANY = 8;
+  UC_CPU_M68K_ENDING = 9;
 
 // M68K registers
 

diff --git a/bindings/pascal/unicorn/MipsConst.pas b/bindings/pascal/unicorn/MipsConst.pas
@@ -23,6 +23,7 @@ interface
   UC_CPU_MIPS32_P5600 = 13;
   UC_CPU_MIPS32_MIPS32R6_GENERIC = 14;
   UC_CPU_MIPS32_I7200 = 15;
+  UC_CPU_MIPS32_ENDING = 16;
 
 // MIPS64 CPUS
 
@@ -39,6 +40,7 @@ interface
   UC_CPU_MIPS64_LOONGSON_2E = 10;
   UC_CPU_MIPS64_LOONGSON_2F = 11;
   UC_CPU_MIPS64_MIPS64DSPR2 = 12;
+  UC_CPU_MIPS64_ENDING = 13;
 
 // MIPS registers
 

diff --git a/bindings/pascal/unicorn/PpcConst.pas b/bindings/pascal/unicorn/PpcConst.pas
diff --git a/bindings/pascal/unicorn/RiscvConst.pas b/bindings/pascal/unicorn/RiscvConst.pas
@@ -11,13 +11,15 @@ interface
   UC_CPU_RISCV32_BASE32 = 1;
   UC_CPU_RISCV32_SIFIVE_E31 = 2;
   UC_CPU_RISCV32_SIFIVE_U34 = 3;
+  UC_CPU_RISCV32_ENDING = 4;
 
 // RISCV64 CPU
 
   UC_CPU_RISCV64_ANY = 0;
   UC_CPU_RISCV64_BASE64 = 1;
   UC_CPU_RISCV64_SIFIVE_E51 = 2;
   UC_CPU_RISCV64_SIFIVE_U54 = 3;
+  UC_CPU_RISCV64_ENDING = 4;
 
 // RISCV registers
 

diff --git a/bindings/pascal/unicorn/S390xConst.pas b/bindings/pascal/unicorn/S390xConst.pas
@@ -45,6 +45,7 @@ interface
   UC_CPU_S390X_GEN15B = 35;
   UC_CPU_S390X_QEMU = 36;
   UC_CPU_S390X_MAX = 37;
+  UC_CPU_S390X_ENDING = 38;
 
 // S390X registers
 

diff --git a/bindings/pascal/unicorn/SparcConst.pas b/bindings/pascal/unicorn/SparcConst.pas
@@ -20,6 +20,7 @@ interface
   UC_CPU_SPARC32_TI_SUPERSPARC_II = 10;
   UC_CPU_SPARC32_LEON2 = 11;
   UC_CPU_SPARC32_LEON3 = 12;
+  UC_CPU_SPARC32_ENDING = 13;
 
 // SPARC64 CPU
 
@@ -40,6 +41,7 @@ interface
   UC_CPU_SPARC64_SUN_ULTRASPARC_T1 = 14;
   UC_CPU_SPARC64_SUN_ULTRASPARC_T2 = 15;
   UC_CPU_SPARC64_NEC_ULTRASPARC_I = 16;
+  UC_CPU_SPARC64_ENDING = 17;
 
 // SPARC registers
 

diff --git a/bindings/pascal/unicorn/X86Const.pas b/bindings/pascal/unicorn/X86Const.pas
@@ -45,6 +45,7 @@ interface
   UC_CPU_X86_EPYC = 35;
   UC_CPU_X86_DHYANA = 36;
   UC_CPU_X86_EPYC_ROME = 37;
+  UC_CPU_X86_ENDING = 38;
 
 // X86 registers
 

diff --git a/bindings/python/unicorn/arm64_const.py b/bindings/python/unicorn/arm64_const.py
@@ -2,10 +2,11 @@
 
 # ARM64 CPU
 
-UC_CPU_AARCH64_A57 = 0
-UC_CPU_AARCH64_A53 = 1
-UC_CPU_AARCH64_A72 = 2
-UC_CPU_AARCH64_MAX = 3
+UC_CPU_ARM64_A57 = 0
+UC_CPU_ARM64_A53 = 1
+UC_CPU_ARM64_A72 = 2
+UC_CPU_ARM64_MAX = 3
+UC_CPU_ARM64_ENDING = 4
 
 # ARM64 registers
 

diff --git a/bindings/python/unicorn/arm_const.py b/bindings/python/unicorn/arm_const.py
@@ -36,6 +36,7 @@
 UC_CPU_ARM_PXA270C0 = 31
 UC_CPU_ARM_PXA270C5 = 32
 UC_CPU_ARM_MAX = 33
+UC_CPU_ARM_ENDING = 34
 
 # ARM registers
 

diff --git a/bindings/python/unicorn/m68k_const.py b/bindings/python/unicorn/m68k_const.py
@@ -11,6 +11,7 @@
 UC_CPU_M68K_M5208 = 6
 UC_CPU_M68K_CFV4E = 7
 UC_CPU_M68K_ANY = 8
+UC_CPU_M68K_ENDING = 9
 
 # M68K registers
 

diff --git a/bindings/python/unicorn/mips_const.py b/bindings/python/unicorn/mips_const.py
@@ -18,6 +18,7 @@
 UC_CPU_MIPS32_P5600 = 13
 UC_CPU_MIPS32_MIPS32R6_GENERIC = 14
 UC_CPU_MIPS32_I7200 = 15
+UC_CPU_MIPS32_ENDING = 16
 
 # MIPS64 CPUS
 
@@ -34,6 +35,7 @@
 UC_CPU_MIPS64_LOONGSON_2E = 10
 UC_CPU_MIPS64_LOONGSON_2F = 11
 UC_CPU_MIPS64_MIPS64DSPR2 = 12
+UC_CPU_MIPS64_ENDING = 13
 
 # MIPS registers
 

diff --git a/bindings/python/unicorn/ppc_const.py b/bindings/python/unicorn/ppc_const.py
diff --git a/bindings/python/unicorn/riscv_const.py b/bindings/python/unicorn/riscv_const.py
@@ -6,13 +6,15 @@
 UC_CPU_RISCV32_BASE32 = 1
 UC_CPU_RISCV32_SIFIVE_E31 = 2
 UC_CPU_RISCV32_SIFIVE_U34 = 3
+UC_CPU_RISCV32_ENDING = 4
 
 # RISCV64 CPU
 
 UC_CPU_RISCV64_ANY = 0
 UC_CPU_RISCV64_BASE64 = 1
 UC_CPU_RISCV64_SIFIVE_E51 = 2
 UC_CPU_RISCV64_SIFIVE_U54 = 3
+UC_CPU_RISCV64_ENDING = 4
 
 # RISCV registers
 

diff --git a/bindings/python/unicorn/s390x_const.py b/bindings/python/unicorn/s390x_const.py
@@ -40,6 +40,7 @@
 UC_CPU_S390X_GEN15B = 35
 UC_CPU_S390X_QEMU = 36
 UC_CPU_S390X_MAX = 37
+UC_CPU_S390X_ENDING = 38
 
 # S390X registers
 

diff --git a/bindings/python/unicorn/sparc_const.py b/bindings/python/unicorn/sparc_const.py
@@ -15,6 +15,7 @@
 UC_CPU_SPARC32_TI_SUPERSPARC_II = 10
 UC_CPU_SPARC32_LEON2 = 11
 UC_CPU_SPARC32_LEON3 = 12
+UC_CPU_SPARC32_ENDING = 13
 
 # SPARC64 CPU
 
@@ -35,6 +36,7 @@
 UC_CPU_SPARC64_SUN_ULTRASPARC_T1 = 14
 UC_CPU_SPARC64_SUN_ULTRASPARC_T2 = 15
 UC_CPU_SPARC64_NEC_ULTRASPARC_I = 16
+UC_CPU_SPARC64_ENDING = 17
 
 # SPARC registers
 

diff --git a/bindings/python/unicorn/x86_const.py b/bindings/python/unicorn/x86_const.py
@@ -40,6 +40,7 @@
 UC_CPU_X86_EPYC = 35
 UC_CPU_X86_DHYANA = 36
 UC_CPU_X86_EPYC_ROME = 37
+UC_CPU_X86_ENDING = 38
 
 # X86 registers
 

diff --git a/bindings/ruby/unicorn_gem/lib/unicorn_engine/arm64_const.rb b/bindings/ruby/unicorn_gem/lib/unicorn_engine/arm64_const.rb
@@ -4,10 +4,11 @@ module UnicornEngine
 
 # ARM64 CPU
 
-	UC_CPU_AARCH64_A57 = 0
-	UC_CPU_AARCH64_A53 = 1
-	UC_CPU_AARCH64_A72 = 2
-	UC_CPU_AARCH64_MAX = 3
+	UC_CPU_ARM64_A57 = 0
+	UC_CPU_ARM64_A53 = 1
+	UC_CPU_ARM64_A72 = 2
+	UC_CPU_ARM64_MAX = 3
+	UC_CPU_ARM64_ENDING = 4
 
 # ARM64 registers
 

diff --git a/bindings/ruby/unicorn_gem/lib/unicorn_engine/arm_const.rb b/bindings/ruby/unicorn_gem/lib/unicorn_engine/arm_const.rb
@@ -38,6 +38,7 @@ module UnicornEngine
 	UC_CPU_ARM_PXA270C0 = 31
 	UC_CPU_ARM_PXA270C5 = 32
 	UC_CPU_ARM_MAX = 33
+	UC_CPU_ARM_ENDING = 34
 
 # ARM registers
 

diff --git a/bindings/ruby/unicorn_gem/lib/unicorn_engine/m68k_const.rb b/bindings/ruby/unicorn_gem/lib/unicorn_engine/m68k_const.rb
@@ -13,6 +13,7 @@ module UnicornEngine
 	UC_CPU_M68K_M5208 = 6
 	UC_CPU_M68K_CFV4E = 7
 	UC_CPU_M68K_ANY = 8
+	UC_CPU_M68K_ENDING = 9
 
 # M68K registers
 

diff --git a/bindings/ruby/unicorn_gem/lib/unicorn_engine/mips_const.rb b/bindings/ruby/unicorn_gem/lib/unicorn_engine/mips_const.rb
@@ -20,6 +20,7 @@ module UnicornEngine
 	UC_CPU_MIPS32_P5600 = 13
 	UC_CPU_MIPS32_MIPS32R6_GENERIC = 14
 	UC_CPU_MIPS32_I7200 = 15
+	UC_CPU_MIPS32_ENDING = 16
 
 # MIPS64 CPUS
 
@@ -36,6 +37,7 @@ module UnicornEngine
 	UC_CPU_MIPS64_LOONGSON_2E = 10
 	UC_CPU_MIPS64_LOONGSON_2F = 11
 	UC_CPU_MIPS64_MIPS64DSPR2 = 12
+	UC_CPU_MIPS64_ENDING = 13
 
 # MIPS registers
 

diff --git a/bindings/ruby/unicorn_gem/lib/unicorn_engine/ppc_const.rb b/bindings/ruby/unicorn_gem/lib/unicorn_engine/ppc_const.rb
diff --git a/bindings/ruby/unicorn_gem/lib/unicorn_engine/riscv_const.rb b/bindings/ruby/unicorn_gem/lib/unicorn_engine/riscv_const.rb
@@ -8,13 +8,15 @@ module UnicornEngine
 	UC_CPU_RISCV32_BASE32 = 1
 	UC_CPU_RISCV32_SIFIVE_E31 = 2
 	UC_CPU_RISCV32_SIFIVE_U34 = 3
+	UC_CPU_RISCV32_ENDING = 4
 
 # RISCV64 CPU
 
 	UC_CPU_RISCV64_ANY = 0
 	UC_CPU_RISCV64_BASE64 = 1
 	UC_CPU_RISCV64_SIFIVE_E51 = 2
 	UC_CPU_RISCV64_SIFIVE_U54 = 3
+	UC_CPU_RISCV64_ENDING = 4
 
 # RISCV registers
 

diff --git a/bindings/ruby/unicorn_gem/lib/unicorn_engine/s390x_const.rb b/bindings/ruby/unicorn_gem/lib/unicorn_engine/s390x_const.rb
@@ -42,6 +42,7 @@ module UnicornEngine
 	UC_CPU_S390X_GEN15B = 35
 	UC_CPU_S390X_QEMU = 36
 	UC_CPU_S390X_MAX = 37
+	UC_CPU_S390X_ENDING = 38
 
 # S390X registers
 

diff --git a/bindings/ruby/unicorn_gem/lib/unicorn_engine/sparc_const.rb b/bindings/ruby/unicorn_gem/lib/unicorn_engine/sparc_const.rb
@@ -17,6 +17,7 @@ module UnicornEngine
 	UC_CPU_SPARC32_TI_SUPERSPARC_II = 10
 	UC_CPU_SPARC32_LEON2 = 11
 	UC_CPU_SPARC32_LEON3 = 12
+	UC_CPU_SPARC32_ENDING = 13
 
 # SPARC64 CPU
 
@@ -37,6 +38,7 @@ module UnicornEngine
 	UC_CPU_SPARC64_SUN_ULTRASPARC_T1 = 14
 	UC_CPU_SPARC64_SUN_ULTRASPARC_T2 = 15
 	UC_CPU_SPARC64_NEC_ULTRASPARC_I = 16
+	UC_CPU_SPARC64_ENDING = 17
 
 # SPARC registers
 

diff --git a/bindings/ruby/unicorn_gem/lib/unicorn_engine/x86_const.rb b/bindings/ruby/unicorn_gem/lib/unicorn_engine/x86_const.rb
@@ -42,6 +42,7 @@ module UnicornEngine
 	UC_CPU_X86_EPYC = 35
 	UC_CPU_X86_DHYANA = 36
 	UC_CPU_X86_EPYC_ROME = 37
+	UC_CPU_X86_ENDING = 38
 
 # X86 registers