A simulator for arm processor which supports a subset of Armv-8 instruction set
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all_inst
all_inst.s
branch_excepgen_syst_instructions.py
common_functions.py
data_processing_immediate.py
data_processing_register.py
debug.py
fetch_instructions.py
identify_instruction_class.py
instruction.py
load_store_instructions.py
manual.notes
one
one.s
pipeline.py
reading_elf.py
registers.py
run.sh
sim.sh
simulator.py
translator.py