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Custom ISA computer designed in Logisim and then rewritten in Verilog
Verilog Python Assembly
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Logisim
Programs
Verilog
.DS_Store
Instruction Set.txt
README.md
assemble.py

README.md

Computer

My hardware implementation of a fully-functioning computer with a custom-designed ISA, written in Verilog.

WIP

Verilog version is work-in-progress.

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