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'_05F' inserted in top-level port names containing double underscores #1127

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veripoolbot opened this issue Jan 30, 2017 · 1 comment
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@veripoolbot veripoolbot commented Jan 30, 2017


Author Name: Stephen Henry (@stephenry)
Original Redmine Issue: 1127 from https://www.veripool.org

Original Assignee: Wilson Snyder (@wsnyder)


When Verilating a top-level module with port names containing double underscores, the resultant/emitted SystemC port names have '_05F' inserted. I haven't found any discussion suggesting that this would be expected behavior, so I suspect it is a bug.

Verilog:

module foo (output foo__a);
always_comb foo__a = 'b1;
endmodule

Emitted SystemC:
sc_out foo___05Fa;

Version:

Verilator 3.874 2015-06-06 rev verilator_3_872-20-g0d43051

OS X 10.12/Homebrew

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@veripoolbot veripoolbot commented Feb 4, 2017


Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2017-02-04T18:54:59Z


Verilator does this to avoid possible conflicts with generated symbols. I updated the documentation to describe this, will be in 3.902.

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